system.c 3.7 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146
  1. /*
  2. * Copyright (C) 1999 ARM Limited
  3. * Copyright (C) 2000 Deep Blue Solutions Ltd
  4. * Copyright 2006-2007 Freescale Semiconductor, Inc. All Rights Reserved.
  5. * Copyright 2008 Juergen Beisert, kernel@pengutronix.de
  6. * Copyright 2009 Ilya Yanok, Emcraft Systems Ltd, yanok@emcraft.com
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License as published by
  10. * the Free Software Foundation; either version 2 of the License, or
  11. * (at your option) any later version.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. */
  18. #include <linux/kernel.h>
  19. #include <linux/clk.h>
  20. #include <linux/io.h>
  21. #include <linux/err.h>
  22. #include <linux/delay.h>
  23. #include <linux/of.h>
  24. #include <linux/of_address.h>
  25. #include <asm/system_misc.h>
  26. #include <asm/proc-fns.h>
  27. #include <asm/mach-types.h>
  28. #include <asm/hardware/cache-l2x0.h>
  29. #include "common.h"
  30. #include "hardware.h"
  31. static void __iomem *wdog_base;
  32. static struct clk *wdog_clk;
  33. /*
  34. * Reset the system. It is called by machine_restart().
  35. */
  36. void mxc_restart(enum reboot_mode mode, const char *cmd)
  37. {
  38. unsigned int wcr_enable;
  39. if (cpu_is_imx6q() || cpu_is_imx6dl())
  40. imx_src_prepare_restart();
  41. if (wdog_clk)
  42. clk_enable(wdog_clk);
  43. if (cpu_is_mx1())
  44. wcr_enable = (1 << 0);
  45. else
  46. wcr_enable = (1 << 2);
  47. /* Assert SRS signal */
  48. __raw_writew(wcr_enable, wdog_base);
  49. /* write twice to ensure the request will not get ignored */
  50. __raw_writew(wcr_enable, wdog_base);
  51. /* wait for reset to assert... */
  52. mdelay(500);
  53. pr_err("%s: Watchdog reset failed to assert reset\n", __func__);
  54. /* delay to allow the serial port to show the message */
  55. mdelay(50);
  56. /* we'll take a jump through zero as a poor second */
  57. soft_restart(0);
  58. }
  59. void __init mxc_arch_reset_init(void __iomem *base)
  60. {
  61. wdog_base = base;
  62. wdog_clk = clk_get_sys("imx2-wdt.0", NULL);
  63. if (IS_ERR(wdog_clk)) {
  64. pr_warn("%s: failed to get wdog clock\n", __func__);
  65. wdog_clk = NULL;
  66. return;
  67. }
  68. clk_prepare(wdog_clk);
  69. }
  70. void __init mxc_arch_reset_init_dt(void)
  71. {
  72. struct device_node *np;
  73. np = of_find_compatible_node(NULL, NULL, "fsl,imx21-wdt");
  74. wdog_base = of_iomap(np, 0);
  75. WARN_ON(!wdog_base);
  76. wdog_clk = of_clk_get(np, 0);
  77. if (IS_ERR(wdog_clk)) {
  78. pr_warn("%s: failed to get wdog clock\n", __func__);
  79. wdog_clk = NULL;
  80. return;
  81. }
  82. clk_prepare(wdog_clk);
  83. }
  84. #ifdef CONFIG_CACHE_L2X0
  85. void __init imx_init_l2cache(void)
  86. {
  87. void __iomem *l2x0_base;
  88. struct device_node *np;
  89. unsigned int val;
  90. np = of_find_compatible_node(NULL, NULL, "arm,pl310-cache");
  91. if (!np)
  92. goto out;
  93. l2x0_base = of_iomap(np, 0);
  94. if (!l2x0_base) {
  95. of_node_put(np);
  96. goto out;
  97. }
  98. /* Configure the L2 PREFETCH and POWER registers */
  99. val = readl_relaxed(l2x0_base + L2X0_PREFETCH_CTRL);
  100. val |= 0x70800000;
  101. /*
  102. * The L2 cache controller(PL310) version on the i.MX6D/Q is r3p1-50rel0
  103. * The L2 cache controller(PL310) version on the i.MX6DL/SOLO/SL is r3p2
  104. * But according to ARM PL310 errata: 752271
  105. * ID: 752271: Double linefill feature can cause data corruption
  106. * Fault Status: Present in: r3p0, r3p1, r3p1-50rel0. Fixed in r3p2
  107. * Workaround: The only workaround to this erratum is to disable the
  108. * double linefill feature. This is the default behavior.
  109. */
  110. if (cpu_is_imx6q())
  111. val &= ~(1 << 30 | 1 << 23);
  112. writel_relaxed(val, l2x0_base + L2X0_PREFETCH_CTRL);
  113. val = L2X0_DYNAMIC_CLK_GATING_EN | L2X0_STNDBY_MODE_EN;
  114. writel_relaxed(val, l2x0_base + L2X0_POWER_CTRL);
  115. iounmap(l2x0_base);
  116. of_node_put(np);
  117. out:
  118. l2x0_of_init(0, ~0UL);
  119. }
  120. #endif