kirkwood-ts219.dtsi 2.0 KB

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  1. / {
  2. model = "QNAP TS219 family";
  3. compatible = "qnap,ts219", "marvell,kirkwood";
  4. memory {
  5. device_type = "memory";
  6. reg = <0x00000000 0x20000000>;
  7. };
  8. chosen {
  9. bootargs = "console=ttyS0,115200n8";
  10. };
  11. ocp@f1000000 {
  12. i2c@11000 {
  13. status = "okay";
  14. clock-frequency = <400000>;
  15. pinctrl-0 = <&pmx_twsi0>;
  16. pinctrl-names = "default";
  17. s35390a: s35390a@30 {
  18. compatible = "s35390a";
  19. reg = <0x30>;
  20. };
  21. };
  22. serial@12000 {
  23. clock-frequency = <200000000>;
  24. status = "okay";
  25. pinctrl-0 = <&pmx_uart0>;
  26. pinctrl-names = "default";
  27. };
  28. serial@12100 {
  29. clock-frequency = <200000000>;
  30. status = "okay";
  31. pinctrl-0 = <&pmx_uart1>;
  32. pinctrl-names = "default";
  33. };
  34. poweroff@12100 {
  35. compatible = "qnap,power-off";
  36. reg = <0x12000 0x100>;
  37. clocks = <&gate_clk 7>;
  38. };
  39. spi@10600 {
  40. status = "okay";
  41. pinctrl-0 = <&pmx_spi>;
  42. pinctrl-names = "default";
  43. m25p128@0 {
  44. #address-cells = <1>;
  45. #size-cells = <1>;
  46. compatible = "m25p128";
  47. reg = <0>;
  48. spi-max-frequency = <20000000>;
  49. mode = <0>;
  50. partition@0000000 {
  51. reg = <0x00000000 0x00080000>;
  52. label = "U-Boot";
  53. };
  54. partition@00200000 {
  55. reg = <0x00200000 0x00200000>;
  56. label = "Kernel";
  57. };
  58. partition@00400000 {
  59. reg = <0x00400000 0x00900000>;
  60. label = "RootFS1";
  61. };
  62. partition@00d00000 {
  63. reg = <0x00d00000 0x00300000>;
  64. label = "RootFS2";
  65. };
  66. partition@00040000 {
  67. reg = <0x00080000 0x00040000>;
  68. label = "U-Boot Config";
  69. };
  70. partition@000c0000 {
  71. reg = <0x000c0000 0x00140000>;
  72. label = "NAS Config";
  73. };
  74. };
  75. };
  76. sata@80000 {
  77. pinctrl-0 = <&pmx_sata0 &pmx_sata1>;
  78. pinctrl-names = "default";
  79. status = "okay";
  80. nr-ports = <2>;
  81. };
  82. pcie-controller {
  83. status = "okay";
  84. pcie@1,0 {
  85. status = "okay";
  86. };
  87. };
  88. };
  89. };
  90. &mdio {
  91. status = "okay";
  92. ethphy0: ethernet-phy {
  93. device_type = "ethernet-phy";
  94. /* overwrite reg property in board file */
  95. };
  96. };
  97. &eth0 {
  98. status = "okay";
  99. ethernet0-port@0 {
  100. phy-handle = <&ethphy0>;
  101. };
  102. };