config.c 4.6 KB

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  1. /***************************************************************************/
  2. /*
  3. * linux/arch/m68knommu/platform/520x/config.c
  4. *
  5. * Copyright (C) 2005, Freescale (www.freescale.com)
  6. * Copyright (C) 2005, Intec Automation (mike@steroidmicros.com)
  7. * Copyright (C) 1999-2007, Greg Ungerer (gerg@snapgear.com)
  8. * Copyright (C) 2001-2003, SnapGear Inc. (www.snapgear.com)
  9. */
  10. /***************************************************************************/
  11. #include <linux/kernel.h>
  12. #include <linux/param.h>
  13. #include <linux/init.h>
  14. #include <linux/io.h>
  15. #include <asm/machdep.h>
  16. #include <asm/coldfire.h>
  17. #include <asm/mcfsim.h>
  18. #include <asm/mcfuart.h>
  19. /***************************************************************************/
  20. static struct mcf_platform_uart m520x_uart_platform[] = {
  21. {
  22. .mapbase = MCF_MBAR + MCFUART_BASE1,
  23. .irq = MCFINT_VECBASE + MCFINT_UART0,
  24. },
  25. {
  26. .mapbase = MCF_MBAR + MCFUART_BASE2,
  27. .irq = MCFINT_VECBASE + MCFINT_UART1,
  28. },
  29. {
  30. .mapbase = MCF_MBAR + MCFUART_BASE3,
  31. .irq = MCFINT_VECBASE + MCFINT_UART2,
  32. },
  33. { },
  34. };
  35. static struct platform_device m520x_uart = {
  36. .name = "mcfuart",
  37. .id = 0,
  38. .dev.platform_data = m520x_uart_platform,
  39. };
  40. static struct resource m520x_fec_resources[] = {
  41. {
  42. .start = MCF_MBAR + 0x30000,
  43. .end = MCF_MBAR + 0x30000 + 0x7ff,
  44. .flags = IORESOURCE_MEM,
  45. },
  46. {
  47. .start = 64 + 36,
  48. .end = 64 + 36,
  49. .flags = IORESOURCE_IRQ,
  50. },
  51. {
  52. .start = 64 + 40,
  53. .end = 64 + 40,
  54. .flags = IORESOURCE_IRQ,
  55. },
  56. {
  57. .start = 64 + 42,
  58. .end = 64 + 42,
  59. .flags = IORESOURCE_IRQ,
  60. },
  61. };
  62. static struct platform_device m520x_fec = {
  63. .name = "fec",
  64. .id = 0,
  65. .num_resources = ARRAY_SIZE(m520x_fec_resources),
  66. .resource = m520x_fec_resources,
  67. };
  68. static struct platform_device *m520x_devices[] __initdata = {
  69. &m520x_uart,
  70. &m520x_fec,
  71. };
  72. /***************************************************************************/
  73. #define INTC0 (MCF_MBAR + MCFICM_INTC0)
  74. static void __init m520x_uart_init_line(int line, int irq)
  75. {
  76. u32 imr;
  77. u16 par;
  78. u8 par2;
  79. writeb(0x03, INTC0 + MCFINTC_ICR0 + MCFINT_UART0 + line);
  80. imr = readl(INTC0 + MCFINTC_IMRL);
  81. imr &= ~((1 << (irq - MCFINT_VECBASE)) | 1);
  82. writel(imr, INTC0 + MCFINTC_IMRL);
  83. switch (line) {
  84. case 0:
  85. par = readw(MCF_IPSBAR + MCF_GPIO_PAR_UART);
  86. par |= MCF_GPIO_PAR_UART_PAR_UTXD0 |
  87. MCF_GPIO_PAR_UART_PAR_URXD0;
  88. writew(par, MCF_IPSBAR + MCF_GPIO_PAR_UART);
  89. break;
  90. case 1:
  91. par = readw(MCF_IPSBAR + MCF_GPIO_PAR_UART);
  92. par |= MCF_GPIO_PAR_UART_PAR_UTXD1 |
  93. MCF_GPIO_PAR_UART_PAR_URXD1;
  94. writew(par, MCF_IPSBAR + MCF_GPIO_PAR_UART);
  95. break;
  96. case 2:
  97. par2 = readb(MCF_IPSBAR + MCF_GPIO_PAR_FECI2C);
  98. par2 &= ~0x0F;
  99. par2 |= MCF_GPIO_PAR_FECI2C_PAR_SCL_UTXD2 |
  100. MCF_GPIO_PAR_FECI2C_PAR_SDA_URXD2;
  101. writeb(par2, MCF_IPSBAR + MCF_GPIO_PAR_FECI2C);
  102. break;
  103. }
  104. }
  105. static void __init m520x_uarts_init(void)
  106. {
  107. const int nrlines = ARRAY_SIZE(m520x_uart_platform);
  108. int line;
  109. for (line = 0; (line < nrlines); line++)
  110. m520x_uart_init_line(line, m520x_uart_platform[line].irq);
  111. }
  112. /***************************************************************************/
  113. static void __init m520x_fec_init(void)
  114. {
  115. u32 imr;
  116. u8 v;
  117. /* Unmask FEC interrupts at ColdFire interrupt controller */
  118. writeb(0x4, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 36);
  119. writeb(0x4, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 40);
  120. writeb(0x4, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_ICR0 + 42);
  121. imr = readl(MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
  122. imr &= ~0x0001FFF0;
  123. writel(imr, MCF_IPSBAR + MCFICM_INTC0 + MCFINTC_IMRH);
  124. /* Set multi-function pins to ethernet mode */
  125. v = readb(MCF_IPSBAR + MCF_GPIO_PAR_FEC);
  126. writeb(v | 0xf0, MCF_IPSBAR + MCF_GPIO_PAR_FEC);
  127. v = readb(MCF_IPSBAR + MCF_GPIO_PAR_FECI2C);
  128. writeb(v | 0x0f, MCF_IPSBAR + MCF_GPIO_PAR_FECI2C);
  129. }
  130. /***************************************************************************/
  131. /*
  132. * Program the vector to be an auto-vectored.
  133. */
  134. void mcf_autovector(unsigned int vec)
  135. {
  136. /* Everything is auto-vectored on the 520x devices */
  137. }
  138. /***************************************************************************/
  139. static void m520x_cpu_reset(void)
  140. {
  141. local_irq_disable();
  142. __raw_writeb(MCF_RCR_SWRESET, MCF_RCR);
  143. }
  144. /***************************************************************************/
  145. void __init config_BSP(char *commandp, int size)
  146. {
  147. mach_reset = m520x_cpu_reset;
  148. m520x_uarts_init();
  149. m520x_fec_init();
  150. }
  151. /***************************************************************************/
  152. static int __init init_BSP(void)
  153. {
  154. platform_add_devices(m520x_devices, ARRAY_SIZE(m520x_devices));
  155. return 0;
  156. }
  157. arch_initcall(init_BSP);
  158. /***************************************************************************/