twl6030-irq.c 11 KB

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  1. /*
  2. * twl6030-irq.c - TWL6030 irq support
  3. *
  4. * Copyright (C) 2005-2009 Texas Instruments, Inc.
  5. *
  6. * Modifications to defer interrupt handling to a kernel thread:
  7. * Copyright (C) 2006 MontaVista Software, Inc.
  8. *
  9. * Based on tlv320aic23.c:
  10. * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
  11. *
  12. * Code cleanup and modifications to IRQ handler.
  13. * by syed khasim <x0khasim@ti.com>
  14. *
  15. * TWL6030 specific code and IRQ handling changes by
  16. * Jagadeesh Bhaskar Pakaravoor <j-pakaravoor@ti.com>
  17. * Balaji T K <balajitk@ti.com>
  18. *
  19. * This program is free software; you can redistribute it and/or modify
  20. * it under the terms of the GNU General Public License as published by
  21. * the Free Software Foundation; either version 2 of the License, or
  22. * (at your option) any later version.
  23. *
  24. * This program is distributed in the hope that it will be useful,
  25. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  26. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  27. * GNU General Public License for more details.
  28. *
  29. * You should have received a copy of the GNU General Public License
  30. * along with this program; if not, write to the Free Software
  31. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  32. */
  33. #include <linux/init.h>
  34. #include <linux/export.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/irq.h>
  37. #include <linux/kthread.h>
  38. #include <linux/i2c/twl.h>
  39. #include <linux/platform_device.h>
  40. #include <linux/suspend.h>
  41. #include <linux/of.h>
  42. #include <linux/irqdomain.h>
  43. #include "twl-core.h"
  44. /*
  45. * TWL6030 (unlike its predecessors, which had two level interrupt handling)
  46. * three interrupt registers INT_STS_A, INT_STS_B and INT_STS_C.
  47. * It exposes status bits saying who has raised an interrupt. There are
  48. * three mask registers that corresponds to these status registers, that
  49. * enables/disables these interrupts.
  50. *
  51. * We set up IRQs starting at a platform-specified base. An interrupt map table,
  52. * specifies mapping between interrupt number and the associated module.
  53. */
  54. #define TWL6030_NR_IRQS 20
  55. static int twl6030_interrupt_mapping[24] = {
  56. PWR_INTR_OFFSET, /* Bit 0 PWRON */
  57. PWR_INTR_OFFSET, /* Bit 1 RPWRON */
  58. PWR_INTR_OFFSET, /* Bit 2 BAT_VLOW */
  59. RTC_INTR_OFFSET, /* Bit 3 RTC_ALARM */
  60. RTC_INTR_OFFSET, /* Bit 4 RTC_PERIOD */
  61. HOTDIE_INTR_OFFSET, /* Bit 5 HOT_DIE */
  62. SMPSLDO_INTR_OFFSET, /* Bit 6 VXXX_SHORT */
  63. SMPSLDO_INTR_OFFSET, /* Bit 7 VMMC_SHORT */
  64. SMPSLDO_INTR_OFFSET, /* Bit 8 VUSIM_SHORT */
  65. BATDETECT_INTR_OFFSET, /* Bit 9 BAT */
  66. SIMDETECT_INTR_OFFSET, /* Bit 10 SIM */
  67. MMCDETECT_INTR_OFFSET, /* Bit 11 MMC */
  68. RSV_INTR_OFFSET, /* Bit 12 Reserved */
  69. MADC_INTR_OFFSET, /* Bit 13 GPADC_RT_EOC */
  70. MADC_INTR_OFFSET, /* Bit 14 GPADC_SW_EOC */
  71. GASGAUGE_INTR_OFFSET, /* Bit 15 CC_AUTOCAL */
  72. USBOTG_INTR_OFFSET, /* Bit 16 ID_WKUP */
  73. USBOTG_INTR_OFFSET, /* Bit 17 VBUS_WKUP */
  74. USBOTG_INTR_OFFSET, /* Bit 18 ID */
  75. USB_PRES_INTR_OFFSET, /* Bit 19 VBUS */
  76. CHARGER_INTR_OFFSET, /* Bit 20 CHRG_CTRL */
  77. CHARGERFAULT_INTR_OFFSET, /* Bit 21 EXT_CHRG */
  78. CHARGERFAULT_INTR_OFFSET, /* Bit 22 INT_CHRG */
  79. RSV_INTR_OFFSET, /* Bit 23 Reserved */
  80. };
  81. /*----------------------------------------------------------------------*/
  82. static unsigned twl6030_irq_base;
  83. static int twl_irq;
  84. static bool twl_irq_wake_enabled;
  85. static atomic_t twl6030_wakeirqs = ATOMIC_INIT(0);
  86. static int twl6030_irq_pm_notifier(struct notifier_block *notifier,
  87. unsigned long pm_event, void *unused)
  88. {
  89. int chained_wakeups;
  90. switch (pm_event) {
  91. case PM_SUSPEND_PREPARE:
  92. chained_wakeups = atomic_read(&twl6030_wakeirqs);
  93. if (chained_wakeups && !twl_irq_wake_enabled) {
  94. if (enable_irq_wake(twl_irq))
  95. pr_err("twl6030 IRQ wake enable failed\n");
  96. else
  97. twl_irq_wake_enabled = true;
  98. } else if (!chained_wakeups && twl_irq_wake_enabled) {
  99. disable_irq_wake(twl_irq);
  100. twl_irq_wake_enabled = false;
  101. }
  102. disable_irq(twl_irq);
  103. break;
  104. case PM_POST_SUSPEND:
  105. enable_irq(twl_irq);
  106. break;
  107. default:
  108. break;
  109. }
  110. return NOTIFY_DONE;
  111. }
  112. static struct notifier_block twl6030_irq_pm_notifier_block = {
  113. .notifier_call = twl6030_irq_pm_notifier,
  114. };
  115. /*
  116. * Threaded irq handler for the twl6030 interrupt.
  117. * We query the interrupt controller in the twl6030 to determine
  118. * which module is generating the interrupt request and call
  119. * handle_nested_irq for that module.
  120. */
  121. static irqreturn_t twl6030_irq_thread(int irq, void *data)
  122. {
  123. int i, ret;
  124. union {
  125. u8 bytes[4];
  126. u32 int_sts;
  127. } sts;
  128. /* read INT_STS_A, B and C in one shot using a burst read */
  129. ret = twl_i2c_read(TWL_MODULE_PIH, sts.bytes, REG_INT_STS_A, 3);
  130. if (ret) {
  131. pr_warn("twl6030_irq: I2C error %d reading PIH ISR\n", ret);
  132. return IRQ_HANDLED;
  133. }
  134. sts.bytes[3] = 0; /* Only 24 bits are valid*/
  135. /*
  136. * Since VBUS status bit is not reliable for VBUS disconnect
  137. * use CHARGER VBUS detection status bit instead.
  138. */
  139. if (sts.bytes[2] & 0x10)
  140. sts.bytes[2] |= 0x08;
  141. for (i = 0; sts.int_sts; sts.int_sts >>= 1, i++)
  142. if (sts.int_sts & 0x1) {
  143. int module_irq = twl6030_irq_base +
  144. twl6030_interrupt_mapping[i];
  145. handle_nested_irq(module_irq);
  146. pr_debug("twl6030_irq: PIH ISR %u, virq%u\n",
  147. i, module_irq);
  148. }
  149. /*
  150. * NOTE:
  151. * Simulation confirms that documentation is wrong w.r.t the
  152. * interrupt status clear operation. A single *byte* write to
  153. * any one of STS_A to STS_C register results in all three
  154. * STS registers being reset. Since it does not matter which
  155. * value is written, all three registers are cleared on a
  156. * single byte write, so we just use 0x0 to clear.
  157. */
  158. ret = twl_i2c_write_u8(TWL_MODULE_PIH, 0x00, REG_INT_STS_A);
  159. if (ret)
  160. pr_warn("twl6030_irq: I2C error in clearing PIH ISR\n");
  161. return IRQ_HANDLED;
  162. }
  163. /*----------------------------------------------------------------------*/
  164. static inline void activate_irq(int irq)
  165. {
  166. #ifdef CONFIG_ARM
  167. /* ARM requires an extra step to clear IRQ_NOREQUEST, which it
  168. * sets on behalf of every irq_chip. Also sets IRQ_NOPROBE.
  169. */
  170. set_irq_flags(irq, IRQF_VALID);
  171. #else
  172. /* same effect on other architectures */
  173. irq_set_noprobe(irq);
  174. #endif
  175. }
  176. static int twl6030_irq_set_wake(struct irq_data *d, unsigned int on)
  177. {
  178. if (on)
  179. atomic_inc(&twl6030_wakeirqs);
  180. else
  181. atomic_dec(&twl6030_wakeirqs);
  182. return 0;
  183. }
  184. int twl6030_interrupt_unmask(u8 bit_mask, u8 offset)
  185. {
  186. int ret;
  187. u8 unmask_value;
  188. ret = twl_i2c_read_u8(TWL_MODULE_PIH, &unmask_value,
  189. REG_INT_STS_A + offset);
  190. unmask_value &= (~(bit_mask));
  191. ret |= twl_i2c_write_u8(TWL_MODULE_PIH, unmask_value,
  192. REG_INT_STS_A + offset); /* unmask INT_MSK_A/B/C */
  193. return ret;
  194. }
  195. EXPORT_SYMBOL(twl6030_interrupt_unmask);
  196. int twl6030_interrupt_mask(u8 bit_mask, u8 offset)
  197. {
  198. int ret;
  199. u8 mask_value;
  200. ret = twl_i2c_read_u8(TWL_MODULE_PIH, &mask_value,
  201. REG_INT_STS_A + offset);
  202. mask_value |= (bit_mask);
  203. ret |= twl_i2c_write_u8(TWL_MODULE_PIH, mask_value,
  204. REG_INT_STS_A + offset); /* mask INT_MSK_A/B/C */
  205. return ret;
  206. }
  207. EXPORT_SYMBOL(twl6030_interrupt_mask);
  208. int twl6030_mmc_card_detect_config(void)
  209. {
  210. int ret;
  211. u8 reg_val = 0;
  212. /* Unmasking the Card detect Interrupt line for MMC1 from Phoenix */
  213. twl6030_interrupt_unmask(TWL6030_MMCDETECT_INT_MASK,
  214. REG_INT_MSK_LINE_B);
  215. twl6030_interrupt_unmask(TWL6030_MMCDETECT_INT_MASK,
  216. REG_INT_MSK_STS_B);
  217. /*
  218. * Initially Configuring MMC_CTRL for receiving interrupts &
  219. * Card status on TWL6030 for MMC1
  220. */
  221. ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &reg_val, TWL6030_MMCCTRL);
  222. if (ret < 0) {
  223. pr_err("twl6030: Failed to read MMCCTRL, error %d\n", ret);
  224. return ret;
  225. }
  226. reg_val &= ~VMMC_AUTO_OFF;
  227. reg_val |= SW_FC;
  228. ret = twl_i2c_write_u8(TWL6030_MODULE_ID0, reg_val, TWL6030_MMCCTRL);
  229. if (ret < 0) {
  230. pr_err("twl6030: Failed to write MMCCTRL, error %d\n", ret);
  231. return ret;
  232. }
  233. /* Configuring PullUp-PullDown register */
  234. ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &reg_val,
  235. TWL6030_CFG_INPUT_PUPD3);
  236. if (ret < 0) {
  237. pr_err("twl6030: Failed to read CFG_INPUT_PUPD3, error %d\n",
  238. ret);
  239. return ret;
  240. }
  241. reg_val &= ~(MMC_PU | MMC_PD);
  242. ret = twl_i2c_write_u8(TWL6030_MODULE_ID0, reg_val,
  243. TWL6030_CFG_INPUT_PUPD3);
  244. if (ret < 0) {
  245. pr_err("twl6030: Failed to write CFG_INPUT_PUPD3, error %d\n",
  246. ret);
  247. return ret;
  248. }
  249. return twl6030_irq_base + MMCDETECT_INTR_OFFSET;
  250. }
  251. EXPORT_SYMBOL(twl6030_mmc_card_detect_config);
  252. int twl6030_mmc_card_detect(struct device *dev, int slot)
  253. {
  254. int ret = -EIO;
  255. u8 read_reg = 0;
  256. struct platform_device *pdev = to_platform_device(dev);
  257. if (pdev->id) {
  258. /* TWL6030 provide's Card detect support for
  259. * only MMC1 controller.
  260. */
  261. pr_err("Unknown MMC controller %d in %s\n", pdev->id, __func__);
  262. return ret;
  263. }
  264. /*
  265. * BIT0 of MMC_CTRL on TWL6030 provides card status for MMC1
  266. * 0 - Card not present ,1 - Card present
  267. */
  268. ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &read_reg,
  269. TWL6030_MMCCTRL);
  270. if (ret >= 0)
  271. ret = read_reg & STS_MMC;
  272. return ret;
  273. }
  274. EXPORT_SYMBOL(twl6030_mmc_card_detect);
  275. int twl6030_init_irq(struct device *dev, int irq_num)
  276. {
  277. struct device_node *node = dev->of_node;
  278. int nr_irqs, irq_base, irq_end;
  279. static struct irq_chip twl6030_irq_chip;
  280. int status = 0;
  281. int i;
  282. u8 mask[3];
  283. nr_irqs = TWL6030_NR_IRQS;
  284. irq_base = irq_alloc_descs(-1, 0, nr_irqs, 0);
  285. if (IS_ERR_VALUE(irq_base)) {
  286. dev_err(dev, "Fail to allocate IRQ descs\n");
  287. return irq_base;
  288. }
  289. irq_domain_add_legacy(node, nr_irqs, irq_base, 0,
  290. &irq_domain_simple_ops, NULL);
  291. irq_end = irq_base + nr_irqs;
  292. mask[0] = 0xFF;
  293. mask[1] = 0xFF;
  294. mask[2] = 0xFF;
  295. /* mask all int lines */
  296. twl_i2c_write(TWL_MODULE_PIH, &mask[0], REG_INT_MSK_LINE_A, 3);
  297. /* mask all int sts */
  298. twl_i2c_write(TWL_MODULE_PIH, &mask[0], REG_INT_MSK_STS_A, 3);
  299. /* clear INT_STS_A,B,C */
  300. twl_i2c_write(TWL_MODULE_PIH, &mask[0], REG_INT_STS_A, 3);
  301. twl6030_irq_base = irq_base;
  302. /*
  303. * install an irq handler for each of the modules;
  304. * clone dummy irq_chip since PIH can't *do* anything
  305. */
  306. twl6030_irq_chip = dummy_irq_chip;
  307. twl6030_irq_chip.name = "twl6030";
  308. twl6030_irq_chip.irq_set_type = NULL;
  309. twl6030_irq_chip.irq_set_wake = twl6030_irq_set_wake;
  310. for (i = irq_base; i < irq_end; i++) {
  311. irq_set_chip_and_handler(i, &twl6030_irq_chip,
  312. handle_simple_irq);
  313. irq_set_chip_data(i, (void *)irq_num);
  314. irq_set_nested_thread(i, true);
  315. irq_set_parent(i, irq_num);
  316. activate_irq(i);
  317. }
  318. dev_info(dev, "PIH (irq %d) nested IRQs %d..%d\n",
  319. irq_num, irq_base, irq_end);
  320. /* install an irq handler to demultiplex the TWL6030 interrupt */
  321. status = request_threaded_irq(irq_num, NULL, twl6030_irq_thread,
  322. IRQF_ONESHOT, "TWL6030-PIH", NULL);
  323. if (status < 0) {
  324. dev_err(dev, "could not claim irq %d: %d\n", irq_num, status);
  325. goto fail_irq;
  326. }
  327. twl_irq = irq_num;
  328. register_pm_notifier(&twl6030_irq_pm_notifier_block);
  329. return irq_base;
  330. fail_irq:
  331. for (i = irq_base; i < irq_end; i++)
  332. irq_set_chip_and_handler(i, NULL, NULL);
  333. return status;
  334. }
  335. int twl6030_exit_irq(void)
  336. {
  337. if (twl_irq) {
  338. unregister_pm_notifier(&twl6030_irq_pm_notifier_block);
  339. free_irq(twl_irq, NULL);
  340. }
  341. return 0;
  342. }