cnt32_to_63.h 3.1 KB

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  1. /*
  2. * Extend a 32-bit counter to 63 bits
  3. *
  4. * Author: Nicolas Pitre
  5. * Created: December 3, 2006
  6. * Copyright: MontaVista Software, Inc.
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2
  10. * as published by the Free Software Foundation.
  11. */
  12. #ifndef __LINUX_CNT32_TO_63_H__
  13. #define __LINUX_CNT32_TO_63_H__
  14. #include <linux/compiler.h>
  15. #include <linux/types.h>
  16. #include <asm/byteorder.h>
  17. #include <asm/system.h>
  18. /* this is used only to give gcc a clue about good code generation */
  19. union cnt32_to_63 {
  20. struct {
  21. #if defined(__LITTLE_ENDIAN)
  22. u32 lo, hi;
  23. #elif defined(__BIG_ENDIAN)
  24. u32 hi, lo;
  25. #endif
  26. };
  27. u64 val;
  28. };
  29. /**
  30. * cnt32_to_63 - Expand a 32-bit counter to a 63-bit counter
  31. * @cnt_lo: The low part of the counter
  32. *
  33. * Many hardware clock counters are only 32 bits wide and therefore have
  34. * a relatively short period making wrap-arounds rather frequent. This
  35. * is a problem when implementing sched_clock() for example, where a 64-bit
  36. * non-wrapping monotonic value is expected to be returned.
  37. *
  38. * To overcome that limitation, let's extend a 32-bit counter to 63 bits
  39. * in a completely lock free fashion. Bits 0 to 31 of the clock are provided
  40. * by the hardware while bits 32 to 62 are stored in memory. The top bit in
  41. * memory is used to synchronize with the hardware clock half-period. When
  42. * the top bit of both counters (hardware and in memory) differ then the
  43. * memory is updated with a new value, incrementing it when the hardware
  44. * counter wraps around.
  45. *
  46. * Because a word store in memory is atomic then the incremented value will
  47. * always be in synch with the top bit indicating to any potential concurrent
  48. * reader if the value in memory is up to date or not with regards to the
  49. * needed increment. And any race in updating the value in memory is harmless
  50. * as the same value would simply be stored more than once.
  51. *
  52. * The restrictions for the algorithm to work properly are:
  53. *
  54. * 1) this code must be called at least once per each half period of the
  55. * 32-bit counter;
  56. *
  57. * 2) this code must not be preempted for a duration longer than the
  58. * 32-bit counter half period minus the longest period between two
  59. * calls to this code.
  60. *
  61. * Those requirements ensure proper update to the state bit in memory.
  62. * This is usually not a problem in practice, but if it is then a kernel
  63. * timer should be scheduled to manage for this code to be executed often
  64. * enough.
  65. *
  66. * Note that the top bit (bit 63) in the returned value should be considered
  67. * as garbage. It is not cleared here because callers are likely to use a
  68. * multiplier on the returned value which can get rid of the top bit
  69. * implicitly by making the multiplier even, therefore saving on a runtime
  70. * clear-bit instruction. Otherwise caller must remember to clear the top
  71. * bit explicitly.
  72. */
  73. #define cnt32_to_63(cnt_lo) \
  74. ({ \
  75. static u32 __m_cnt_hi; \
  76. union cnt32_to_63 __x; \
  77. __x.hi = __m_cnt_hi; \
  78. smp_rmb(); \
  79. __x.lo = (cnt_lo); \
  80. if (unlikely((s32)(__x.hi ^ __x.lo) < 0)) \
  81. __m_cnt_hi = __x.hi = (__x.hi ^ 0x80000000) + (__x.hi >> 31); \
  82. __x.val; \
  83. })
  84. #endif