e1000_ethtool.c 56 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269127012711272127312741275127612771278127912801281128212831284128512861287128812891290129112921293129412951296129712981299130013011302130313041305130613071308130913101311131213131314131513161317131813191320132113221323132413251326132713281329133013311332133313341335133613371338133913401341134213431344134513461347134813491350135113521353135413551356135713581359136013611362136313641365136613671368136913701371137213731374137513761377137813791380138113821383138413851386138713881389139013911392139313941395139613971398139914001401140214031404140514061407140814091410141114121413141414151416141714181419142014211422142314241425142614271428142914301431143214331434143514361437143814391440144114421443144414451446144714481449145014511452145314541455145614571458145914601461146214631464146514661467146814691470147114721473147414751476147714781479148014811482148314841485148614871488148914901491149214931494149514961497149814991500150115021503150415051506150715081509151015111512151315141515151615171518151915201521152215231524152515261527152815291530153115321533153415351536153715381539154015411542154315441545154615471548154915501551155215531554155515561557155815591560156115621563156415651566156715681569157015711572157315741575157615771578157915801581158215831584158515861587158815891590159115921593159415951596159715981599160016011602160316041605160616071608160916101611161216131614161516161617161816191620162116221623162416251626162716281629163016311632163316341635163616371638163916401641164216431644164516461647164816491650165116521653165416551656165716581659166016611662166316641665166616671668166916701671167216731674167516761677167816791680168116821683168416851686168716881689169016911692169316941695169616971698169917001701170217031704170517061707170817091710171117121713171417151716171717181719172017211722172317241725172617271728172917301731173217331734173517361737173817391740174117421743174417451746174717481749175017511752175317541755175617571758175917601761176217631764176517661767176817691770177117721773177417751776177717781779178017811782178317841785178617871788178917901791179217931794179517961797179817991800180118021803180418051806180718081809181018111812181318141815181618171818181918201821182218231824182518261827182818291830183118321833183418351836183718381839184018411842184318441845184618471848184918501851185218531854185518561857185818591860186118621863186418651866186718681869187018711872187318741875187618771878187918801881188218831884188518861887188818891890189118921893189418951896189718981899190019011902190319041905190619071908190919101911
  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. /* ethtool support for e1000 */
  21. #include "e1000.h"
  22. #include <asm/uaccess.h>
  23. extern char e1000_driver_name[];
  24. extern char e1000_driver_version[];
  25. extern int e1000_up(struct e1000_adapter *adapter);
  26. extern void e1000_down(struct e1000_adapter *adapter);
  27. extern void e1000_reset(struct e1000_adapter *adapter);
  28. extern int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
  29. extern int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
  30. extern int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
  31. extern void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
  32. extern void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
  33. extern void e1000_update_stats(struct e1000_adapter *adapter);
  34. struct e1000_stats {
  35. char stat_string[ETH_GSTRING_LEN];
  36. int sizeof_stat;
  37. int stat_offset;
  38. };
  39. #define E1000_STAT(m) sizeof(((struct e1000_adapter *)0)->m), \
  40. offsetof(struct e1000_adapter, m)
  41. static const struct e1000_stats e1000_gstrings_stats[] = {
  42. { "rx_packets", E1000_STAT(net_stats.rx_packets) },
  43. { "tx_packets", E1000_STAT(net_stats.tx_packets) },
  44. { "rx_bytes", E1000_STAT(net_stats.rx_bytes) },
  45. { "tx_bytes", E1000_STAT(net_stats.tx_bytes) },
  46. { "rx_errors", E1000_STAT(net_stats.rx_errors) },
  47. { "tx_errors", E1000_STAT(net_stats.tx_errors) },
  48. { "tx_dropped", E1000_STAT(net_stats.tx_dropped) },
  49. { "multicast", E1000_STAT(net_stats.multicast) },
  50. { "collisions", E1000_STAT(net_stats.collisions) },
  51. { "rx_length_errors", E1000_STAT(net_stats.rx_length_errors) },
  52. { "rx_over_errors", E1000_STAT(net_stats.rx_over_errors) },
  53. { "rx_crc_errors", E1000_STAT(net_stats.rx_crc_errors) },
  54. { "rx_frame_errors", E1000_STAT(net_stats.rx_frame_errors) },
  55. { "rx_no_buffer_count", E1000_STAT(stats.rnbc) },
  56. { "rx_missed_errors", E1000_STAT(net_stats.rx_missed_errors) },
  57. { "tx_aborted_errors", E1000_STAT(net_stats.tx_aborted_errors) },
  58. { "tx_carrier_errors", E1000_STAT(net_stats.tx_carrier_errors) },
  59. { "tx_fifo_errors", E1000_STAT(net_stats.tx_fifo_errors) },
  60. { "tx_heartbeat_errors", E1000_STAT(net_stats.tx_heartbeat_errors) },
  61. { "tx_window_errors", E1000_STAT(net_stats.tx_window_errors) },
  62. { "tx_abort_late_coll", E1000_STAT(stats.latecol) },
  63. { "tx_deferred_ok", E1000_STAT(stats.dc) },
  64. { "tx_single_coll_ok", E1000_STAT(stats.scc) },
  65. { "tx_multi_coll_ok", E1000_STAT(stats.mcc) },
  66. { "tx_timeout_count", E1000_STAT(tx_timeout_count) },
  67. { "rx_long_length_errors", E1000_STAT(stats.roc) },
  68. { "rx_short_length_errors", E1000_STAT(stats.ruc) },
  69. { "rx_align_errors", E1000_STAT(stats.algnerrc) },
  70. { "tx_tcp_seg_good", E1000_STAT(stats.tsctc) },
  71. { "tx_tcp_seg_failed", E1000_STAT(stats.tsctfc) },
  72. { "rx_flow_control_xon", E1000_STAT(stats.xonrxc) },
  73. { "rx_flow_control_xoff", E1000_STAT(stats.xoffrxc) },
  74. { "tx_flow_control_xon", E1000_STAT(stats.xontxc) },
  75. { "tx_flow_control_xoff", E1000_STAT(stats.xofftxc) },
  76. { "rx_long_byte_count", E1000_STAT(stats.gorcl) },
  77. { "rx_csum_offload_good", E1000_STAT(hw_csum_good) },
  78. { "rx_csum_offload_errors", E1000_STAT(hw_csum_err) },
  79. { "rx_header_split", E1000_STAT(rx_hdr_split) },
  80. { "alloc_rx_buff_failed", E1000_STAT(alloc_rx_buff_failed) },
  81. };
  82. #define E1000_QUEUE_STATS_LEN 0
  83. #define E1000_GLOBAL_STATS_LEN \
  84. sizeof(e1000_gstrings_stats) / sizeof(struct e1000_stats)
  85. #define E1000_STATS_LEN (E1000_GLOBAL_STATS_LEN + E1000_QUEUE_STATS_LEN)
  86. static const char e1000_gstrings_test[][ETH_GSTRING_LEN] = {
  87. "Register test (offline)", "Eeprom test (offline)",
  88. "Interrupt test (offline)", "Loopback test (offline)",
  89. "Link test (on/offline)"
  90. };
  91. #define E1000_TEST_LEN sizeof(e1000_gstrings_test) / ETH_GSTRING_LEN
  92. static int
  93. e1000_get_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
  94. {
  95. struct e1000_adapter *adapter = netdev_priv(netdev);
  96. struct e1000_hw *hw = &adapter->hw;
  97. if (hw->media_type == e1000_media_type_copper) {
  98. ecmd->supported = (SUPPORTED_10baseT_Half |
  99. SUPPORTED_10baseT_Full |
  100. SUPPORTED_100baseT_Half |
  101. SUPPORTED_100baseT_Full |
  102. SUPPORTED_1000baseT_Full|
  103. SUPPORTED_Autoneg |
  104. SUPPORTED_TP);
  105. ecmd->advertising = ADVERTISED_TP;
  106. if (hw->autoneg == 1) {
  107. ecmd->advertising |= ADVERTISED_Autoneg;
  108. /* the e1000 autoneg seems to match ethtool nicely */
  109. ecmd->advertising |= hw->autoneg_advertised;
  110. }
  111. ecmd->port = PORT_TP;
  112. ecmd->phy_address = hw->phy_addr;
  113. if (hw->mac_type == e1000_82543)
  114. ecmd->transceiver = XCVR_EXTERNAL;
  115. else
  116. ecmd->transceiver = XCVR_INTERNAL;
  117. } else {
  118. ecmd->supported = (SUPPORTED_1000baseT_Full |
  119. SUPPORTED_FIBRE |
  120. SUPPORTED_Autoneg);
  121. ecmd->advertising = (ADVERTISED_1000baseT_Full |
  122. ADVERTISED_FIBRE |
  123. ADVERTISED_Autoneg);
  124. ecmd->port = PORT_FIBRE;
  125. if (hw->mac_type >= e1000_82545)
  126. ecmd->transceiver = XCVR_INTERNAL;
  127. else
  128. ecmd->transceiver = XCVR_EXTERNAL;
  129. }
  130. if (netif_carrier_ok(adapter->netdev)) {
  131. e1000_get_speed_and_duplex(hw, &adapter->link_speed,
  132. &adapter->link_duplex);
  133. ecmd->speed = adapter->link_speed;
  134. /* unfortunatly FULL_DUPLEX != DUPLEX_FULL
  135. * and HALF_DUPLEX != DUPLEX_HALF */
  136. if (adapter->link_duplex == FULL_DUPLEX)
  137. ecmd->duplex = DUPLEX_FULL;
  138. else
  139. ecmd->duplex = DUPLEX_HALF;
  140. } else {
  141. ecmd->speed = -1;
  142. ecmd->duplex = -1;
  143. }
  144. ecmd->autoneg = ((hw->media_type == e1000_media_type_fiber) ||
  145. hw->autoneg) ? AUTONEG_ENABLE : AUTONEG_DISABLE;
  146. return 0;
  147. }
  148. static int
  149. e1000_set_settings(struct net_device *netdev, struct ethtool_cmd *ecmd)
  150. {
  151. struct e1000_adapter *adapter = netdev_priv(netdev);
  152. struct e1000_hw *hw = &adapter->hw;
  153. /* When SoL/IDER sessions are active, autoneg/speed/duplex
  154. * cannot be changed */
  155. if (e1000_check_phy_reset_block(hw)) {
  156. DPRINTK(DRV, ERR, "Cannot change link characteristics "
  157. "when SoL/IDER is active.\n");
  158. return -EINVAL;
  159. }
  160. if (ecmd->autoneg == AUTONEG_ENABLE) {
  161. hw->autoneg = 1;
  162. if (hw->media_type == e1000_media_type_fiber)
  163. hw->autoneg_advertised = ADVERTISED_1000baseT_Full |
  164. ADVERTISED_FIBRE |
  165. ADVERTISED_Autoneg;
  166. else
  167. hw->autoneg_advertised = ADVERTISED_10baseT_Half |
  168. ADVERTISED_10baseT_Full |
  169. ADVERTISED_100baseT_Half |
  170. ADVERTISED_100baseT_Full |
  171. ADVERTISED_1000baseT_Full|
  172. ADVERTISED_Autoneg |
  173. ADVERTISED_TP;
  174. ecmd->advertising = hw->autoneg_advertised;
  175. } else
  176. if (e1000_set_spd_dplx(adapter, ecmd->speed + ecmd->duplex))
  177. return -EINVAL;
  178. /* reset the link */
  179. if (netif_running(adapter->netdev)) {
  180. e1000_down(adapter);
  181. e1000_reset(adapter);
  182. e1000_up(adapter);
  183. } else
  184. e1000_reset(adapter);
  185. return 0;
  186. }
  187. static void
  188. e1000_get_pauseparam(struct net_device *netdev,
  189. struct ethtool_pauseparam *pause)
  190. {
  191. struct e1000_adapter *adapter = netdev_priv(netdev);
  192. struct e1000_hw *hw = &adapter->hw;
  193. pause->autoneg =
  194. (adapter->fc_autoneg ? AUTONEG_ENABLE : AUTONEG_DISABLE);
  195. if (hw->fc == e1000_fc_rx_pause)
  196. pause->rx_pause = 1;
  197. else if (hw->fc == e1000_fc_tx_pause)
  198. pause->tx_pause = 1;
  199. else if (hw->fc == e1000_fc_full) {
  200. pause->rx_pause = 1;
  201. pause->tx_pause = 1;
  202. }
  203. }
  204. static int
  205. e1000_set_pauseparam(struct net_device *netdev,
  206. struct ethtool_pauseparam *pause)
  207. {
  208. struct e1000_adapter *adapter = netdev_priv(netdev);
  209. struct e1000_hw *hw = &adapter->hw;
  210. adapter->fc_autoneg = pause->autoneg;
  211. if (pause->rx_pause && pause->tx_pause)
  212. hw->fc = e1000_fc_full;
  213. else if (pause->rx_pause && !pause->tx_pause)
  214. hw->fc = e1000_fc_rx_pause;
  215. else if (!pause->rx_pause && pause->tx_pause)
  216. hw->fc = e1000_fc_tx_pause;
  217. else if (!pause->rx_pause && !pause->tx_pause)
  218. hw->fc = e1000_fc_none;
  219. hw->original_fc = hw->fc;
  220. if (adapter->fc_autoneg == AUTONEG_ENABLE) {
  221. if (netif_running(adapter->netdev)) {
  222. e1000_down(adapter);
  223. e1000_up(adapter);
  224. } else
  225. e1000_reset(adapter);
  226. } else
  227. return ((hw->media_type == e1000_media_type_fiber) ?
  228. e1000_setup_link(hw) : e1000_force_mac_fc(hw));
  229. return 0;
  230. }
  231. static uint32_t
  232. e1000_get_rx_csum(struct net_device *netdev)
  233. {
  234. struct e1000_adapter *adapter = netdev_priv(netdev);
  235. return adapter->rx_csum;
  236. }
  237. static int
  238. e1000_set_rx_csum(struct net_device *netdev, uint32_t data)
  239. {
  240. struct e1000_adapter *adapter = netdev_priv(netdev);
  241. adapter->rx_csum = data;
  242. if (netif_running(netdev)) {
  243. e1000_down(adapter);
  244. e1000_up(adapter);
  245. } else
  246. e1000_reset(adapter);
  247. return 0;
  248. }
  249. static uint32_t
  250. e1000_get_tx_csum(struct net_device *netdev)
  251. {
  252. return (netdev->features & NETIF_F_HW_CSUM) != 0;
  253. }
  254. static int
  255. e1000_set_tx_csum(struct net_device *netdev, uint32_t data)
  256. {
  257. struct e1000_adapter *adapter = netdev_priv(netdev);
  258. if (adapter->hw.mac_type < e1000_82543) {
  259. if (!data)
  260. return -EINVAL;
  261. return 0;
  262. }
  263. if (data)
  264. netdev->features |= NETIF_F_HW_CSUM;
  265. else
  266. netdev->features &= ~NETIF_F_HW_CSUM;
  267. return 0;
  268. }
  269. #ifdef NETIF_F_TSO
  270. static int
  271. e1000_set_tso(struct net_device *netdev, uint32_t data)
  272. {
  273. struct e1000_adapter *adapter = netdev_priv(netdev);
  274. if ((adapter->hw.mac_type < e1000_82544) ||
  275. (adapter->hw.mac_type == e1000_82547))
  276. return data ? -EINVAL : 0;
  277. if (data)
  278. netdev->features |= NETIF_F_TSO;
  279. else
  280. netdev->features &= ~NETIF_F_TSO;
  281. DPRINTK(PROBE, INFO, "TSO is %s\n", data ? "Enabled" : "Disabled");
  282. adapter->tso_force = TRUE;
  283. return 0;
  284. }
  285. #endif /* NETIF_F_TSO */
  286. static uint32_t
  287. e1000_get_msglevel(struct net_device *netdev)
  288. {
  289. struct e1000_adapter *adapter = netdev_priv(netdev);
  290. return adapter->msg_enable;
  291. }
  292. static void
  293. e1000_set_msglevel(struct net_device *netdev, uint32_t data)
  294. {
  295. struct e1000_adapter *adapter = netdev_priv(netdev);
  296. adapter->msg_enable = data;
  297. }
  298. static int
  299. e1000_get_regs_len(struct net_device *netdev)
  300. {
  301. #define E1000_REGS_LEN 32
  302. return E1000_REGS_LEN * sizeof(uint32_t);
  303. }
  304. static void
  305. e1000_get_regs(struct net_device *netdev,
  306. struct ethtool_regs *regs, void *p)
  307. {
  308. struct e1000_adapter *adapter = netdev_priv(netdev);
  309. struct e1000_hw *hw = &adapter->hw;
  310. uint32_t *regs_buff = p;
  311. uint16_t phy_data;
  312. memset(p, 0, E1000_REGS_LEN * sizeof(uint32_t));
  313. regs->version = (1 << 24) | (hw->revision_id << 16) | hw->device_id;
  314. regs_buff[0] = E1000_READ_REG(hw, CTRL);
  315. regs_buff[1] = E1000_READ_REG(hw, STATUS);
  316. regs_buff[2] = E1000_READ_REG(hw, RCTL);
  317. regs_buff[3] = E1000_READ_REG(hw, RDLEN);
  318. regs_buff[4] = E1000_READ_REG(hw, RDH);
  319. regs_buff[5] = E1000_READ_REG(hw, RDT);
  320. regs_buff[6] = E1000_READ_REG(hw, RDTR);
  321. regs_buff[7] = E1000_READ_REG(hw, TCTL);
  322. regs_buff[8] = E1000_READ_REG(hw, TDLEN);
  323. regs_buff[9] = E1000_READ_REG(hw, TDH);
  324. regs_buff[10] = E1000_READ_REG(hw, TDT);
  325. regs_buff[11] = E1000_READ_REG(hw, TIDV);
  326. regs_buff[12] = adapter->hw.phy_type; /* PHY type (IGP=1, M88=0) */
  327. if (hw->phy_type == e1000_phy_igp) {
  328. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  329. IGP01E1000_PHY_AGC_A);
  330. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_A &
  331. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  332. regs_buff[13] = (uint32_t)phy_data; /* cable length */
  333. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  334. IGP01E1000_PHY_AGC_B);
  335. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_B &
  336. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  337. regs_buff[14] = (uint32_t)phy_data; /* cable length */
  338. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  339. IGP01E1000_PHY_AGC_C);
  340. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_C &
  341. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  342. regs_buff[15] = (uint32_t)phy_data; /* cable length */
  343. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  344. IGP01E1000_PHY_AGC_D);
  345. e1000_read_phy_reg(hw, IGP01E1000_PHY_AGC_D &
  346. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  347. regs_buff[16] = (uint32_t)phy_data; /* cable length */
  348. regs_buff[17] = 0; /* extended 10bt distance (not needed) */
  349. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
  350. e1000_read_phy_reg(hw, IGP01E1000_PHY_PORT_STATUS &
  351. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  352. regs_buff[18] = (uint32_t)phy_data; /* cable polarity */
  353. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT,
  354. IGP01E1000_PHY_PCS_INIT_REG);
  355. e1000_read_phy_reg(hw, IGP01E1000_PHY_PCS_INIT_REG &
  356. IGP01E1000_PHY_PAGE_SELECT, &phy_data);
  357. regs_buff[19] = (uint32_t)phy_data; /* cable polarity */
  358. regs_buff[20] = 0; /* polarity correction enabled (always) */
  359. regs_buff[22] = 0; /* phy receive errors (unavailable) */
  360. regs_buff[23] = regs_buff[18]; /* mdix mode */
  361. e1000_write_phy_reg(hw, IGP01E1000_PHY_PAGE_SELECT, 0x0);
  362. } else {
  363. e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_STATUS, &phy_data);
  364. regs_buff[13] = (uint32_t)phy_data; /* cable length */
  365. regs_buff[14] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  366. regs_buff[15] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  367. regs_buff[16] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  368. e1000_read_phy_reg(hw, M88E1000_PHY_SPEC_CTRL, &phy_data);
  369. regs_buff[17] = (uint32_t)phy_data; /* extended 10bt distance */
  370. regs_buff[18] = regs_buff[13]; /* cable polarity */
  371. regs_buff[19] = 0; /* Dummy (to align w/ IGP phy reg dump) */
  372. regs_buff[20] = regs_buff[17]; /* polarity correction */
  373. /* phy receive errors */
  374. regs_buff[22] = adapter->phy_stats.receive_errors;
  375. regs_buff[23] = regs_buff[13]; /* mdix mode */
  376. }
  377. regs_buff[21] = adapter->phy_stats.idle_errors; /* phy idle errors */
  378. e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_data);
  379. regs_buff[24] = (uint32_t)phy_data; /* phy local receiver status */
  380. regs_buff[25] = regs_buff[24]; /* phy remote receiver status */
  381. if (hw->mac_type >= e1000_82540 &&
  382. hw->media_type == e1000_media_type_copper) {
  383. regs_buff[26] = E1000_READ_REG(hw, MANC);
  384. }
  385. }
  386. static int
  387. e1000_get_eeprom_len(struct net_device *netdev)
  388. {
  389. struct e1000_adapter *adapter = netdev_priv(netdev);
  390. return adapter->hw.eeprom.word_size * 2;
  391. }
  392. static int
  393. e1000_get_eeprom(struct net_device *netdev,
  394. struct ethtool_eeprom *eeprom, uint8_t *bytes)
  395. {
  396. struct e1000_adapter *adapter = netdev_priv(netdev);
  397. struct e1000_hw *hw = &adapter->hw;
  398. uint16_t *eeprom_buff;
  399. int first_word, last_word;
  400. int ret_val = 0;
  401. uint16_t i;
  402. if (eeprom->len == 0)
  403. return -EINVAL;
  404. eeprom->magic = hw->vendor_id | (hw->device_id << 16);
  405. first_word = eeprom->offset >> 1;
  406. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  407. eeprom_buff = kmalloc(sizeof(uint16_t) *
  408. (last_word - first_word + 1), GFP_KERNEL);
  409. if (!eeprom_buff)
  410. return -ENOMEM;
  411. if (hw->eeprom.type == e1000_eeprom_spi)
  412. ret_val = e1000_read_eeprom(hw, first_word,
  413. last_word - first_word + 1,
  414. eeprom_buff);
  415. else {
  416. for (i = 0; i < last_word - first_word + 1; i++)
  417. if ((ret_val = e1000_read_eeprom(hw, first_word + i, 1,
  418. &eeprom_buff[i])))
  419. break;
  420. }
  421. /* Device's eeprom is always little-endian, word addressable */
  422. for (i = 0; i < last_word - first_word + 1; i++)
  423. le16_to_cpus(&eeprom_buff[i]);
  424. memcpy(bytes, (uint8_t *)eeprom_buff + (eeprom->offset & 1),
  425. eeprom->len);
  426. kfree(eeprom_buff);
  427. return ret_val;
  428. }
  429. static int
  430. e1000_set_eeprom(struct net_device *netdev,
  431. struct ethtool_eeprom *eeprom, uint8_t *bytes)
  432. {
  433. struct e1000_adapter *adapter = netdev_priv(netdev);
  434. struct e1000_hw *hw = &adapter->hw;
  435. uint16_t *eeprom_buff;
  436. void *ptr;
  437. int max_len, first_word, last_word, ret_val = 0;
  438. uint16_t i;
  439. if (eeprom->len == 0)
  440. return -EOPNOTSUPP;
  441. if (eeprom->magic != (hw->vendor_id | (hw->device_id << 16)))
  442. return -EFAULT;
  443. max_len = hw->eeprom.word_size * 2;
  444. first_word = eeprom->offset >> 1;
  445. last_word = (eeprom->offset + eeprom->len - 1) >> 1;
  446. eeprom_buff = kmalloc(max_len, GFP_KERNEL);
  447. if (!eeprom_buff)
  448. return -ENOMEM;
  449. ptr = (void *)eeprom_buff;
  450. if (eeprom->offset & 1) {
  451. /* need read/modify/write of first changed EEPROM word */
  452. /* only the second byte of the word is being modified */
  453. ret_val = e1000_read_eeprom(hw, first_word, 1,
  454. &eeprom_buff[0]);
  455. ptr++;
  456. }
  457. if (((eeprom->offset + eeprom->len) & 1) && (ret_val == 0)) {
  458. /* need read/modify/write of last changed EEPROM word */
  459. /* only the first byte of the word is being modified */
  460. ret_val = e1000_read_eeprom(hw, last_word, 1,
  461. &eeprom_buff[last_word - first_word]);
  462. }
  463. /* Device's eeprom is always little-endian, word addressable */
  464. for (i = 0; i < last_word - first_word + 1; i++)
  465. le16_to_cpus(&eeprom_buff[i]);
  466. memcpy(ptr, bytes, eeprom->len);
  467. for (i = 0; i < last_word - first_word + 1; i++)
  468. eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]);
  469. ret_val = e1000_write_eeprom(hw, first_word,
  470. last_word - first_word + 1, eeprom_buff);
  471. /* Update the checksum over the first part of the EEPROM if needed
  472. * and flush shadow RAM for 82573 conrollers */
  473. if ((ret_val == 0) && ((first_word <= EEPROM_CHECKSUM_REG) ||
  474. (hw->mac_type == e1000_82573)))
  475. e1000_update_eeprom_checksum(hw);
  476. kfree(eeprom_buff);
  477. return ret_val;
  478. }
  479. static void
  480. e1000_get_drvinfo(struct net_device *netdev,
  481. struct ethtool_drvinfo *drvinfo)
  482. {
  483. struct e1000_adapter *adapter = netdev_priv(netdev);
  484. char firmware_version[32];
  485. uint16_t eeprom_data;
  486. strncpy(drvinfo->driver, e1000_driver_name, 32);
  487. strncpy(drvinfo->version, e1000_driver_version, 32);
  488. /* EEPROM image version # is reported as firmware version # for
  489. * 8257{1|2|3} controllers */
  490. e1000_read_eeprom(&adapter->hw, 5, 1, &eeprom_data);
  491. switch (adapter->hw.mac_type) {
  492. case e1000_82571:
  493. case e1000_82572:
  494. case e1000_82573:
  495. case e1000_80003es2lan:
  496. sprintf(firmware_version, "%d.%d-%d",
  497. (eeprom_data & 0xF000) >> 12,
  498. (eeprom_data & 0x0FF0) >> 4,
  499. eeprom_data & 0x000F);
  500. break;
  501. default:
  502. sprintf(firmware_version, "N/A");
  503. }
  504. strncpy(drvinfo->fw_version, firmware_version, 32);
  505. strncpy(drvinfo->bus_info, pci_name(adapter->pdev), 32);
  506. drvinfo->n_stats = E1000_STATS_LEN;
  507. drvinfo->testinfo_len = E1000_TEST_LEN;
  508. drvinfo->regdump_len = e1000_get_regs_len(netdev);
  509. drvinfo->eedump_len = e1000_get_eeprom_len(netdev);
  510. }
  511. static void
  512. e1000_get_ringparam(struct net_device *netdev,
  513. struct ethtool_ringparam *ring)
  514. {
  515. struct e1000_adapter *adapter = netdev_priv(netdev);
  516. e1000_mac_type mac_type = adapter->hw.mac_type;
  517. struct e1000_tx_ring *txdr = adapter->tx_ring;
  518. struct e1000_rx_ring *rxdr = adapter->rx_ring;
  519. ring->rx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_RXD :
  520. E1000_MAX_82544_RXD;
  521. ring->tx_max_pending = (mac_type < e1000_82544) ? E1000_MAX_TXD :
  522. E1000_MAX_82544_TXD;
  523. ring->rx_mini_max_pending = 0;
  524. ring->rx_jumbo_max_pending = 0;
  525. ring->rx_pending = rxdr->count;
  526. ring->tx_pending = txdr->count;
  527. ring->rx_mini_pending = 0;
  528. ring->rx_jumbo_pending = 0;
  529. }
  530. static int
  531. e1000_set_ringparam(struct net_device *netdev,
  532. struct ethtool_ringparam *ring)
  533. {
  534. struct e1000_adapter *adapter = netdev_priv(netdev);
  535. e1000_mac_type mac_type = adapter->hw.mac_type;
  536. struct e1000_tx_ring *txdr, *tx_old, *tx_new;
  537. struct e1000_rx_ring *rxdr, *rx_old, *rx_new;
  538. int i, err, tx_ring_size, rx_ring_size;
  539. if ((ring->rx_mini_pending) || (ring->rx_jumbo_pending))
  540. return -EINVAL;
  541. tx_ring_size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  542. rx_ring_size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  543. if (netif_running(adapter->netdev))
  544. e1000_down(adapter);
  545. tx_old = adapter->tx_ring;
  546. rx_old = adapter->rx_ring;
  547. adapter->tx_ring = kmalloc(tx_ring_size, GFP_KERNEL);
  548. if (!adapter->tx_ring) {
  549. err = -ENOMEM;
  550. goto err_setup_rx;
  551. }
  552. memset(adapter->tx_ring, 0, tx_ring_size);
  553. adapter->rx_ring = kmalloc(rx_ring_size, GFP_KERNEL);
  554. if (!adapter->rx_ring) {
  555. kfree(adapter->tx_ring);
  556. err = -ENOMEM;
  557. goto err_setup_rx;
  558. }
  559. memset(adapter->rx_ring, 0, rx_ring_size);
  560. txdr = adapter->tx_ring;
  561. rxdr = adapter->rx_ring;
  562. rxdr->count = max(ring->rx_pending,(uint32_t)E1000_MIN_RXD);
  563. rxdr->count = min(rxdr->count,(uint32_t)(mac_type < e1000_82544 ?
  564. E1000_MAX_RXD : E1000_MAX_82544_RXD));
  565. E1000_ROUNDUP(rxdr->count, REQ_RX_DESCRIPTOR_MULTIPLE);
  566. txdr->count = max(ring->tx_pending,(uint32_t)E1000_MIN_TXD);
  567. txdr->count = min(txdr->count,(uint32_t)(mac_type < e1000_82544 ?
  568. E1000_MAX_TXD : E1000_MAX_82544_TXD));
  569. E1000_ROUNDUP(txdr->count, REQ_TX_DESCRIPTOR_MULTIPLE);
  570. for (i = 0; i < adapter->num_tx_queues; i++)
  571. txdr[i].count = txdr->count;
  572. for (i = 0; i < adapter->num_rx_queues; i++)
  573. rxdr[i].count = rxdr->count;
  574. if (netif_running(adapter->netdev)) {
  575. /* Try to get new resources before deleting old */
  576. if ((err = e1000_setup_all_rx_resources(adapter)))
  577. goto err_setup_rx;
  578. if ((err = e1000_setup_all_tx_resources(adapter)))
  579. goto err_setup_tx;
  580. /* save the new, restore the old in order to free it,
  581. * then restore the new back again */
  582. rx_new = adapter->rx_ring;
  583. tx_new = adapter->tx_ring;
  584. adapter->rx_ring = rx_old;
  585. adapter->tx_ring = tx_old;
  586. e1000_free_all_rx_resources(adapter);
  587. e1000_free_all_tx_resources(adapter);
  588. kfree(tx_old);
  589. kfree(rx_old);
  590. adapter->rx_ring = rx_new;
  591. adapter->tx_ring = tx_new;
  592. if ((err = e1000_up(adapter)))
  593. return err;
  594. }
  595. return 0;
  596. err_setup_tx:
  597. e1000_free_all_rx_resources(adapter);
  598. err_setup_rx:
  599. adapter->rx_ring = rx_old;
  600. adapter->tx_ring = tx_old;
  601. e1000_up(adapter);
  602. return err;
  603. }
  604. #define REG_PATTERN_TEST(R, M, W) \
  605. { \
  606. uint32_t pat, value; \
  607. uint32_t test[] = \
  608. {0x5A5A5A5A, 0xA5A5A5A5, 0x00000000, 0xFFFFFFFF}; \
  609. for (pat = 0; pat < sizeof(test)/sizeof(test[0]); pat++) { \
  610. E1000_WRITE_REG(&adapter->hw, R, (test[pat] & W)); \
  611. value = E1000_READ_REG(&adapter->hw, R); \
  612. if (value != (test[pat] & W & M)) { \
  613. DPRINTK(DRV, ERR, "pattern test reg %04X failed: got " \
  614. "0x%08X expected 0x%08X\n", \
  615. E1000_##R, value, (test[pat] & W & M)); \
  616. *data = (adapter->hw.mac_type < e1000_82543) ? \
  617. E1000_82542_##R : E1000_##R; \
  618. return 1; \
  619. } \
  620. } \
  621. }
  622. #define REG_SET_AND_CHECK(R, M, W) \
  623. { \
  624. uint32_t value; \
  625. E1000_WRITE_REG(&adapter->hw, R, W & M); \
  626. value = E1000_READ_REG(&adapter->hw, R); \
  627. if ((W & M) != (value & M)) { \
  628. DPRINTK(DRV, ERR, "set/check reg %04X test failed: got 0x%08X "\
  629. "expected 0x%08X\n", E1000_##R, (value & M), (W & M)); \
  630. *data = (adapter->hw.mac_type < e1000_82543) ? \
  631. E1000_82542_##R : E1000_##R; \
  632. return 1; \
  633. } \
  634. }
  635. static int
  636. e1000_reg_test(struct e1000_adapter *adapter, uint64_t *data)
  637. {
  638. uint32_t value, before, after;
  639. uint32_t i, toggle;
  640. /* The status register is Read Only, so a write should fail.
  641. * Some bits that get toggled are ignored.
  642. */
  643. switch (adapter->hw.mac_type) {
  644. /* there are several bits on newer hardware that are r/w */
  645. case e1000_82571:
  646. case e1000_82572:
  647. case e1000_80003es2lan:
  648. toggle = 0x7FFFF3FF;
  649. break;
  650. case e1000_82573:
  651. toggle = 0x7FFFF033;
  652. break;
  653. default:
  654. toggle = 0xFFFFF833;
  655. break;
  656. }
  657. before = E1000_READ_REG(&adapter->hw, STATUS);
  658. value = (E1000_READ_REG(&adapter->hw, STATUS) & toggle);
  659. E1000_WRITE_REG(&adapter->hw, STATUS, toggle);
  660. after = E1000_READ_REG(&adapter->hw, STATUS) & toggle;
  661. if (value != after) {
  662. DPRINTK(DRV, ERR, "failed STATUS register test got: "
  663. "0x%08X expected: 0x%08X\n", after, value);
  664. *data = 1;
  665. return 1;
  666. }
  667. /* restore previous status */
  668. E1000_WRITE_REG(&adapter->hw, STATUS, before);
  669. REG_PATTERN_TEST(FCAL, 0xFFFFFFFF, 0xFFFFFFFF);
  670. REG_PATTERN_TEST(FCAH, 0x0000FFFF, 0xFFFFFFFF);
  671. REG_PATTERN_TEST(FCT, 0x0000FFFF, 0xFFFFFFFF);
  672. REG_PATTERN_TEST(VET, 0x0000FFFF, 0xFFFFFFFF);
  673. REG_PATTERN_TEST(RDTR, 0x0000FFFF, 0xFFFFFFFF);
  674. REG_PATTERN_TEST(RDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
  675. REG_PATTERN_TEST(RDLEN, 0x000FFF80, 0x000FFFFF);
  676. REG_PATTERN_TEST(RDH, 0x0000FFFF, 0x0000FFFF);
  677. REG_PATTERN_TEST(RDT, 0x0000FFFF, 0x0000FFFF);
  678. REG_PATTERN_TEST(FCRTH, 0x0000FFF8, 0x0000FFF8);
  679. REG_PATTERN_TEST(FCTTV, 0x0000FFFF, 0x0000FFFF);
  680. REG_PATTERN_TEST(TIPG, 0x3FFFFFFF, 0x3FFFFFFF);
  681. REG_PATTERN_TEST(TDBAH, 0xFFFFFFFF, 0xFFFFFFFF);
  682. REG_PATTERN_TEST(TDLEN, 0x000FFF80, 0x000FFFFF);
  683. REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x00000000);
  684. REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0x003FFFFB);
  685. REG_SET_AND_CHECK(TCTL, 0xFFFFFFFF, 0x00000000);
  686. if (adapter->hw.mac_type >= e1000_82543) {
  687. REG_SET_AND_CHECK(RCTL, 0x06DFB3FE, 0xFFFFFFFF);
  688. REG_PATTERN_TEST(RDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
  689. REG_PATTERN_TEST(TXCW, 0xC000FFFF, 0x0000FFFF);
  690. REG_PATTERN_TEST(TDBAL, 0xFFFFFFF0, 0xFFFFFFFF);
  691. REG_PATTERN_TEST(TIDV, 0x0000FFFF, 0x0000FFFF);
  692. for (i = 0; i < E1000_RAR_ENTRIES; i++) {
  693. REG_PATTERN_TEST(RA + ((i << 1) << 2), 0xFFFFFFFF,
  694. 0xFFFFFFFF);
  695. REG_PATTERN_TEST(RA + (((i << 1) + 1) << 2), 0x8003FFFF,
  696. 0xFFFFFFFF);
  697. }
  698. } else {
  699. REG_SET_AND_CHECK(RCTL, 0xFFFFFFFF, 0x01FFFFFF);
  700. REG_PATTERN_TEST(RDBAL, 0xFFFFF000, 0xFFFFFFFF);
  701. REG_PATTERN_TEST(TXCW, 0x0000FFFF, 0x0000FFFF);
  702. REG_PATTERN_TEST(TDBAL, 0xFFFFF000, 0xFFFFFFFF);
  703. }
  704. for (i = 0; i < E1000_MC_TBL_SIZE; i++)
  705. REG_PATTERN_TEST(MTA + (i << 2), 0xFFFFFFFF, 0xFFFFFFFF);
  706. *data = 0;
  707. return 0;
  708. }
  709. static int
  710. e1000_eeprom_test(struct e1000_adapter *adapter, uint64_t *data)
  711. {
  712. uint16_t temp;
  713. uint16_t checksum = 0;
  714. uint16_t i;
  715. *data = 0;
  716. /* Read and add up the contents of the EEPROM */
  717. for (i = 0; i < (EEPROM_CHECKSUM_REG + 1); i++) {
  718. if ((e1000_read_eeprom(&adapter->hw, i, 1, &temp)) < 0) {
  719. *data = 1;
  720. break;
  721. }
  722. checksum += temp;
  723. }
  724. /* If Checksum is not Correct return error else test passed */
  725. if ((checksum != (uint16_t) EEPROM_SUM) && !(*data))
  726. *data = 2;
  727. return *data;
  728. }
  729. static irqreturn_t
  730. e1000_test_intr(int irq,
  731. void *data,
  732. struct pt_regs *regs)
  733. {
  734. struct net_device *netdev = (struct net_device *) data;
  735. struct e1000_adapter *adapter = netdev_priv(netdev);
  736. adapter->test_icr |= E1000_READ_REG(&adapter->hw, ICR);
  737. return IRQ_HANDLED;
  738. }
  739. static int
  740. e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data)
  741. {
  742. struct net_device *netdev = adapter->netdev;
  743. uint32_t mask, i=0, shared_int = TRUE;
  744. uint32_t irq = adapter->pdev->irq;
  745. *data = 0;
  746. /* Hook up test interrupt handler just for this test */
  747. if (!request_irq(irq, &e1000_test_intr, 0, netdev->name, netdev)) {
  748. shared_int = FALSE;
  749. } else if (request_irq(irq, &e1000_test_intr, SA_SHIRQ,
  750. netdev->name, netdev)){
  751. *data = 1;
  752. return -1;
  753. }
  754. /* Disable all the interrupts */
  755. E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
  756. msec_delay(10);
  757. /* Test each interrupt */
  758. for (; i < 10; i++) {
  759. /* Interrupt to test */
  760. mask = 1 << i;
  761. if (!shared_int) {
  762. /* Disable the interrupt to be reported in
  763. * the cause register and then force the same
  764. * interrupt and see if one gets posted. If
  765. * an interrupt was posted to the bus, the
  766. * test failed.
  767. */
  768. adapter->test_icr = 0;
  769. E1000_WRITE_REG(&adapter->hw, IMC, mask);
  770. E1000_WRITE_REG(&adapter->hw, ICS, mask);
  771. msec_delay(10);
  772. if (adapter->test_icr & mask) {
  773. *data = 3;
  774. break;
  775. }
  776. }
  777. /* Enable the interrupt to be reported in
  778. * the cause register and then force the same
  779. * interrupt and see if one gets posted. If
  780. * an interrupt was not posted to the bus, the
  781. * test failed.
  782. */
  783. adapter->test_icr = 0;
  784. E1000_WRITE_REG(&adapter->hw, IMS, mask);
  785. E1000_WRITE_REG(&adapter->hw, ICS, mask);
  786. msec_delay(10);
  787. if (!(adapter->test_icr & mask)) {
  788. *data = 4;
  789. break;
  790. }
  791. if (!shared_int) {
  792. /* Disable the other interrupts to be reported in
  793. * the cause register and then force the other
  794. * interrupts and see if any get posted. If
  795. * an interrupt was posted to the bus, the
  796. * test failed.
  797. */
  798. adapter->test_icr = 0;
  799. E1000_WRITE_REG(&adapter->hw, IMC, ~mask & 0x00007FFF);
  800. E1000_WRITE_REG(&adapter->hw, ICS, ~mask & 0x00007FFF);
  801. msec_delay(10);
  802. if (adapter->test_icr) {
  803. *data = 5;
  804. break;
  805. }
  806. }
  807. }
  808. /* Disable all the interrupts */
  809. E1000_WRITE_REG(&adapter->hw, IMC, 0xFFFFFFFF);
  810. msec_delay(10);
  811. /* Unhook test interrupt handler */
  812. free_irq(irq, netdev);
  813. return *data;
  814. }
  815. static void
  816. e1000_free_desc_rings(struct e1000_adapter *adapter)
  817. {
  818. struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
  819. struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
  820. struct pci_dev *pdev = adapter->pdev;
  821. int i;
  822. if (txdr->desc && txdr->buffer_info) {
  823. for (i = 0; i < txdr->count; i++) {
  824. if (txdr->buffer_info[i].dma)
  825. pci_unmap_single(pdev, txdr->buffer_info[i].dma,
  826. txdr->buffer_info[i].length,
  827. PCI_DMA_TODEVICE);
  828. if (txdr->buffer_info[i].skb)
  829. dev_kfree_skb(txdr->buffer_info[i].skb);
  830. }
  831. }
  832. if (rxdr->desc && rxdr->buffer_info) {
  833. for (i = 0; i < rxdr->count; i++) {
  834. if (rxdr->buffer_info[i].dma)
  835. pci_unmap_single(pdev, rxdr->buffer_info[i].dma,
  836. rxdr->buffer_info[i].length,
  837. PCI_DMA_FROMDEVICE);
  838. if (rxdr->buffer_info[i].skb)
  839. dev_kfree_skb(rxdr->buffer_info[i].skb);
  840. }
  841. }
  842. if (txdr->desc) {
  843. pci_free_consistent(pdev, txdr->size, txdr->desc, txdr->dma);
  844. txdr->desc = NULL;
  845. }
  846. if (rxdr->desc) {
  847. pci_free_consistent(pdev, rxdr->size, rxdr->desc, rxdr->dma);
  848. rxdr->desc = NULL;
  849. }
  850. kfree(txdr->buffer_info);
  851. txdr->buffer_info = NULL;
  852. kfree(rxdr->buffer_info);
  853. rxdr->buffer_info = NULL;
  854. return;
  855. }
  856. static int
  857. e1000_setup_desc_rings(struct e1000_adapter *adapter)
  858. {
  859. struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
  860. struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
  861. struct pci_dev *pdev = adapter->pdev;
  862. uint32_t rctl;
  863. int size, i, ret_val;
  864. /* Setup Tx descriptor ring and Tx buffers */
  865. if (!txdr->count)
  866. txdr->count = E1000_DEFAULT_TXD;
  867. size = txdr->count * sizeof(struct e1000_buffer);
  868. if (!(txdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
  869. ret_val = 1;
  870. goto err_nomem;
  871. }
  872. memset(txdr->buffer_info, 0, size);
  873. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  874. E1000_ROUNDUP(txdr->size, 4096);
  875. if (!(txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma))) {
  876. ret_val = 2;
  877. goto err_nomem;
  878. }
  879. memset(txdr->desc, 0, txdr->size);
  880. txdr->next_to_use = txdr->next_to_clean = 0;
  881. E1000_WRITE_REG(&adapter->hw, TDBAL,
  882. ((uint64_t) txdr->dma & 0x00000000FFFFFFFF));
  883. E1000_WRITE_REG(&adapter->hw, TDBAH, ((uint64_t) txdr->dma >> 32));
  884. E1000_WRITE_REG(&adapter->hw, TDLEN,
  885. txdr->count * sizeof(struct e1000_tx_desc));
  886. E1000_WRITE_REG(&adapter->hw, TDH, 0);
  887. E1000_WRITE_REG(&adapter->hw, TDT, 0);
  888. E1000_WRITE_REG(&adapter->hw, TCTL,
  889. E1000_TCTL_PSP | E1000_TCTL_EN |
  890. E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT |
  891. E1000_FDX_COLLISION_DISTANCE << E1000_COLD_SHIFT);
  892. for (i = 0; i < txdr->count; i++) {
  893. struct e1000_tx_desc *tx_desc = E1000_TX_DESC(*txdr, i);
  894. struct sk_buff *skb;
  895. unsigned int size = 1024;
  896. if (!(skb = alloc_skb(size, GFP_KERNEL))) {
  897. ret_val = 3;
  898. goto err_nomem;
  899. }
  900. skb_put(skb, size);
  901. txdr->buffer_info[i].skb = skb;
  902. txdr->buffer_info[i].length = skb->len;
  903. txdr->buffer_info[i].dma =
  904. pci_map_single(pdev, skb->data, skb->len,
  905. PCI_DMA_TODEVICE);
  906. tx_desc->buffer_addr = cpu_to_le64(txdr->buffer_info[i].dma);
  907. tx_desc->lower.data = cpu_to_le32(skb->len);
  908. tx_desc->lower.data |= cpu_to_le32(E1000_TXD_CMD_EOP |
  909. E1000_TXD_CMD_IFCS |
  910. E1000_TXD_CMD_RPS);
  911. tx_desc->upper.data = 0;
  912. }
  913. /* Setup Rx descriptor ring and Rx buffers */
  914. if (!rxdr->count)
  915. rxdr->count = E1000_DEFAULT_RXD;
  916. size = rxdr->count * sizeof(struct e1000_buffer);
  917. if (!(rxdr->buffer_info = kmalloc(size, GFP_KERNEL))) {
  918. ret_val = 4;
  919. goto err_nomem;
  920. }
  921. memset(rxdr->buffer_info, 0, size);
  922. rxdr->size = rxdr->count * sizeof(struct e1000_rx_desc);
  923. if (!(rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma))) {
  924. ret_val = 5;
  925. goto err_nomem;
  926. }
  927. memset(rxdr->desc, 0, rxdr->size);
  928. rxdr->next_to_use = rxdr->next_to_clean = 0;
  929. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  930. E1000_WRITE_REG(&adapter->hw, RCTL, rctl & ~E1000_RCTL_EN);
  931. E1000_WRITE_REG(&adapter->hw, RDBAL,
  932. ((uint64_t) rxdr->dma & 0xFFFFFFFF));
  933. E1000_WRITE_REG(&adapter->hw, RDBAH, ((uint64_t) rxdr->dma >> 32));
  934. E1000_WRITE_REG(&adapter->hw, RDLEN, rxdr->size);
  935. E1000_WRITE_REG(&adapter->hw, RDH, 0);
  936. E1000_WRITE_REG(&adapter->hw, RDT, 0);
  937. rctl = E1000_RCTL_EN | E1000_RCTL_BAM | E1000_RCTL_SZ_2048 |
  938. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  939. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  940. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  941. for (i = 0; i < rxdr->count; i++) {
  942. struct e1000_rx_desc *rx_desc = E1000_RX_DESC(*rxdr, i);
  943. struct sk_buff *skb;
  944. if (!(skb = alloc_skb(E1000_RXBUFFER_2048 + NET_IP_ALIGN,
  945. GFP_KERNEL))) {
  946. ret_val = 6;
  947. goto err_nomem;
  948. }
  949. skb_reserve(skb, NET_IP_ALIGN);
  950. rxdr->buffer_info[i].skb = skb;
  951. rxdr->buffer_info[i].length = E1000_RXBUFFER_2048;
  952. rxdr->buffer_info[i].dma =
  953. pci_map_single(pdev, skb->data, E1000_RXBUFFER_2048,
  954. PCI_DMA_FROMDEVICE);
  955. rx_desc->buffer_addr = cpu_to_le64(rxdr->buffer_info[i].dma);
  956. memset(skb->data, 0x00, skb->len);
  957. }
  958. return 0;
  959. err_nomem:
  960. e1000_free_desc_rings(adapter);
  961. return ret_val;
  962. }
  963. static void
  964. e1000_phy_disable_receiver(struct e1000_adapter *adapter)
  965. {
  966. /* Write out to PHY registers 29 and 30 to disable the Receiver. */
  967. e1000_write_phy_reg(&adapter->hw, 29, 0x001F);
  968. e1000_write_phy_reg(&adapter->hw, 30, 0x8FFC);
  969. e1000_write_phy_reg(&adapter->hw, 29, 0x001A);
  970. e1000_write_phy_reg(&adapter->hw, 30, 0x8FF0);
  971. }
  972. static void
  973. e1000_phy_reset_clk_and_crs(struct e1000_adapter *adapter)
  974. {
  975. uint16_t phy_reg;
  976. /* Because we reset the PHY above, we need to re-force TX_CLK in the
  977. * Extended PHY Specific Control Register to 25MHz clock. This
  978. * value defaults back to a 2.5MHz clock when the PHY is reset.
  979. */
  980. e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
  981. phy_reg |= M88E1000_EPSCR_TX_CLK_25;
  982. e1000_write_phy_reg(&adapter->hw,
  983. M88E1000_EXT_PHY_SPEC_CTRL, phy_reg);
  984. /* In addition, because of the s/w reset above, we need to enable
  985. * CRS on TX. This must be set for both full and half duplex
  986. * operation.
  987. */
  988. e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
  989. phy_reg |= M88E1000_PSCR_ASSERT_CRS_ON_TX;
  990. e1000_write_phy_reg(&adapter->hw,
  991. M88E1000_PHY_SPEC_CTRL, phy_reg);
  992. }
  993. static int
  994. e1000_nonintegrated_phy_loopback(struct e1000_adapter *adapter)
  995. {
  996. uint32_t ctrl_reg;
  997. uint16_t phy_reg;
  998. /* Setup the Device Control Register for PHY loopback test. */
  999. ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
  1000. ctrl_reg |= (E1000_CTRL_ILOS | /* Invert Loss-Of-Signal */
  1001. E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
  1002. E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
  1003. E1000_CTRL_SPD_1000 | /* Force Speed to 1000 */
  1004. E1000_CTRL_FD); /* Force Duplex to FULL */
  1005. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
  1006. /* Read the PHY Specific Control Register (0x10) */
  1007. e1000_read_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, &phy_reg);
  1008. /* Clear Auto-Crossover bits in PHY Specific Control Register
  1009. * (bits 6:5).
  1010. */
  1011. phy_reg &= ~M88E1000_PSCR_AUTO_X_MODE;
  1012. e1000_write_phy_reg(&adapter->hw, M88E1000_PHY_SPEC_CTRL, phy_reg);
  1013. /* Perform software reset on the PHY */
  1014. e1000_phy_reset(&adapter->hw);
  1015. /* Have to setup TX_CLK and TX_CRS after software reset */
  1016. e1000_phy_reset_clk_and_crs(adapter);
  1017. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8100);
  1018. /* Wait for reset to complete. */
  1019. udelay(500);
  1020. /* Have to setup TX_CLK and TX_CRS after software reset */
  1021. e1000_phy_reset_clk_and_crs(adapter);
  1022. /* Write out to PHY registers 29 and 30 to disable the Receiver. */
  1023. e1000_phy_disable_receiver(adapter);
  1024. /* Set the loopback bit in the PHY control register. */
  1025. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
  1026. phy_reg |= MII_CR_LOOPBACK;
  1027. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
  1028. /* Setup TX_CLK and TX_CRS one more time. */
  1029. e1000_phy_reset_clk_and_crs(adapter);
  1030. /* Check Phy Configuration */
  1031. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
  1032. if (phy_reg != 0x4100)
  1033. return 9;
  1034. e1000_read_phy_reg(&adapter->hw, M88E1000_EXT_PHY_SPEC_CTRL, &phy_reg);
  1035. if (phy_reg != 0x0070)
  1036. return 10;
  1037. e1000_read_phy_reg(&adapter->hw, 29, &phy_reg);
  1038. if (phy_reg != 0x001A)
  1039. return 11;
  1040. return 0;
  1041. }
  1042. static int
  1043. e1000_integrated_phy_loopback(struct e1000_adapter *adapter)
  1044. {
  1045. uint32_t ctrl_reg = 0;
  1046. uint32_t stat_reg = 0;
  1047. adapter->hw.autoneg = FALSE;
  1048. if (adapter->hw.phy_type == e1000_phy_m88) {
  1049. /* Auto-MDI/MDIX Off */
  1050. e1000_write_phy_reg(&adapter->hw,
  1051. M88E1000_PHY_SPEC_CTRL, 0x0808);
  1052. /* reset to update Auto-MDI/MDIX */
  1053. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x9140);
  1054. /* autoneg off */
  1055. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x8140);
  1056. } else if (adapter->hw.phy_type == e1000_phy_gg82563) {
  1057. e1000_write_phy_reg(&adapter->hw,
  1058. GG82563_PHY_KMRN_MODE_CTRL,
  1059. 0x1CE);
  1060. }
  1061. /* force 1000, set loopback */
  1062. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, 0x4140);
  1063. /* Now set up the MAC to the same speed/duplex as the PHY. */
  1064. ctrl_reg = E1000_READ_REG(&adapter->hw, CTRL);
  1065. ctrl_reg &= ~E1000_CTRL_SPD_SEL; /* Clear the speed sel bits */
  1066. ctrl_reg |= (E1000_CTRL_FRCSPD | /* Set the Force Speed Bit */
  1067. E1000_CTRL_FRCDPX | /* Set the Force Duplex Bit */
  1068. E1000_CTRL_SPD_1000 |/* Force Speed to 1000 */
  1069. E1000_CTRL_FD); /* Force Duplex to FULL */
  1070. if (adapter->hw.media_type == e1000_media_type_copper &&
  1071. adapter->hw.phy_type == e1000_phy_m88) {
  1072. ctrl_reg |= E1000_CTRL_ILOS; /* Invert Loss of Signal */
  1073. } else {
  1074. /* Set the ILOS bit on the fiber Nic is half
  1075. * duplex link is detected. */
  1076. stat_reg = E1000_READ_REG(&adapter->hw, STATUS);
  1077. if ((stat_reg & E1000_STATUS_FD) == 0)
  1078. ctrl_reg |= (E1000_CTRL_ILOS | E1000_CTRL_SLU);
  1079. }
  1080. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl_reg);
  1081. /* Disable the receiver on the PHY so when a cable is plugged in, the
  1082. * PHY does not begin to autoneg when a cable is reconnected to the NIC.
  1083. */
  1084. if (adapter->hw.phy_type == e1000_phy_m88)
  1085. e1000_phy_disable_receiver(adapter);
  1086. udelay(500);
  1087. return 0;
  1088. }
  1089. static int
  1090. e1000_set_phy_loopback(struct e1000_adapter *adapter)
  1091. {
  1092. uint16_t phy_reg = 0;
  1093. uint16_t count = 0;
  1094. switch (adapter->hw.mac_type) {
  1095. case e1000_82543:
  1096. if (adapter->hw.media_type == e1000_media_type_copper) {
  1097. /* Attempt to setup Loopback mode on Non-integrated PHY.
  1098. * Some PHY registers get corrupted at random, so
  1099. * attempt this 10 times.
  1100. */
  1101. while (e1000_nonintegrated_phy_loopback(adapter) &&
  1102. count++ < 10);
  1103. if (count < 11)
  1104. return 0;
  1105. }
  1106. break;
  1107. case e1000_82544:
  1108. case e1000_82540:
  1109. case e1000_82545:
  1110. case e1000_82545_rev_3:
  1111. case e1000_82546:
  1112. case e1000_82546_rev_3:
  1113. case e1000_82541:
  1114. case e1000_82541_rev_2:
  1115. case e1000_82547:
  1116. case e1000_82547_rev_2:
  1117. case e1000_82571:
  1118. case e1000_82572:
  1119. case e1000_82573:
  1120. case e1000_80003es2lan:
  1121. return e1000_integrated_phy_loopback(adapter);
  1122. break;
  1123. default:
  1124. /* Default PHY loopback work is to read the MII
  1125. * control register and assert bit 14 (loopback mode).
  1126. */
  1127. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_reg);
  1128. phy_reg |= MII_CR_LOOPBACK;
  1129. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_reg);
  1130. return 0;
  1131. break;
  1132. }
  1133. return 8;
  1134. }
  1135. static int
  1136. e1000_setup_loopback_test(struct e1000_adapter *adapter)
  1137. {
  1138. struct e1000_hw *hw = &adapter->hw;
  1139. uint32_t rctl;
  1140. if (hw->media_type == e1000_media_type_fiber ||
  1141. hw->media_type == e1000_media_type_internal_serdes) {
  1142. switch (hw->mac_type) {
  1143. case e1000_82545:
  1144. case e1000_82546:
  1145. case e1000_82545_rev_3:
  1146. case e1000_82546_rev_3:
  1147. return e1000_set_phy_loopback(adapter);
  1148. break;
  1149. case e1000_82571:
  1150. case e1000_82572:
  1151. #define E1000_SERDES_LB_ON 0x410
  1152. e1000_set_phy_loopback(adapter);
  1153. E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_ON);
  1154. msec_delay(10);
  1155. return 0;
  1156. break;
  1157. default:
  1158. rctl = E1000_READ_REG(hw, RCTL);
  1159. rctl |= E1000_RCTL_LBM_TCVR;
  1160. E1000_WRITE_REG(hw, RCTL, rctl);
  1161. return 0;
  1162. }
  1163. } else if (hw->media_type == e1000_media_type_copper)
  1164. return e1000_set_phy_loopback(adapter);
  1165. return 7;
  1166. }
  1167. static void
  1168. e1000_loopback_cleanup(struct e1000_adapter *adapter)
  1169. {
  1170. struct e1000_hw *hw = &adapter->hw;
  1171. uint32_t rctl;
  1172. uint16_t phy_reg;
  1173. rctl = E1000_READ_REG(hw, RCTL);
  1174. rctl &= ~(E1000_RCTL_LBM_TCVR | E1000_RCTL_LBM_MAC);
  1175. E1000_WRITE_REG(hw, RCTL, rctl);
  1176. switch (hw->mac_type) {
  1177. case e1000_82571:
  1178. case e1000_82572:
  1179. if (hw->media_type == e1000_media_type_fiber ||
  1180. hw->media_type == e1000_media_type_internal_serdes) {
  1181. #define E1000_SERDES_LB_OFF 0x400
  1182. E1000_WRITE_REG(hw, SCTL, E1000_SERDES_LB_OFF);
  1183. msec_delay(10);
  1184. break;
  1185. }
  1186. /* Fall Through */
  1187. case e1000_82545:
  1188. case e1000_82546:
  1189. case e1000_82545_rev_3:
  1190. case e1000_82546_rev_3:
  1191. default:
  1192. hw->autoneg = TRUE;
  1193. if (hw->phy_type == e1000_phy_gg82563) {
  1194. e1000_write_phy_reg(hw,
  1195. GG82563_PHY_KMRN_MODE_CTRL,
  1196. 0x180);
  1197. }
  1198. e1000_read_phy_reg(hw, PHY_CTRL, &phy_reg);
  1199. if (phy_reg & MII_CR_LOOPBACK) {
  1200. phy_reg &= ~MII_CR_LOOPBACK;
  1201. e1000_write_phy_reg(hw, PHY_CTRL, phy_reg);
  1202. e1000_phy_reset(hw);
  1203. }
  1204. break;
  1205. }
  1206. }
  1207. static void
  1208. e1000_create_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
  1209. {
  1210. memset(skb->data, 0xFF, frame_size);
  1211. frame_size &= ~1;
  1212. memset(&skb->data[frame_size / 2], 0xAA, frame_size / 2 - 1);
  1213. memset(&skb->data[frame_size / 2 + 10], 0xBE, 1);
  1214. memset(&skb->data[frame_size / 2 + 12], 0xAF, 1);
  1215. }
  1216. static int
  1217. e1000_check_lbtest_frame(struct sk_buff *skb, unsigned int frame_size)
  1218. {
  1219. frame_size &= ~1;
  1220. if (*(skb->data + 3) == 0xFF) {
  1221. if ((*(skb->data + frame_size / 2 + 10) == 0xBE) &&
  1222. (*(skb->data + frame_size / 2 + 12) == 0xAF)) {
  1223. return 0;
  1224. }
  1225. }
  1226. return 13;
  1227. }
  1228. static int
  1229. e1000_run_loopback_test(struct e1000_adapter *adapter)
  1230. {
  1231. struct e1000_tx_ring *txdr = &adapter->test_tx_ring;
  1232. struct e1000_rx_ring *rxdr = &adapter->test_rx_ring;
  1233. struct pci_dev *pdev = adapter->pdev;
  1234. int i, j, k, l, lc, good_cnt, ret_val=0;
  1235. unsigned long time;
  1236. E1000_WRITE_REG(&adapter->hw, RDT, rxdr->count - 1);
  1237. /* Calculate the loop count based on the largest descriptor ring
  1238. * The idea is to wrap the largest ring a number of times using 64
  1239. * send/receive pairs during each loop
  1240. */
  1241. if (rxdr->count <= txdr->count)
  1242. lc = ((txdr->count / 64) * 2) + 1;
  1243. else
  1244. lc = ((rxdr->count / 64) * 2) + 1;
  1245. k = l = 0;
  1246. for (j = 0; j <= lc; j++) { /* loop count loop */
  1247. for (i = 0; i < 64; i++) { /* send the packets */
  1248. e1000_create_lbtest_frame(txdr->buffer_info[i].skb,
  1249. 1024);
  1250. pci_dma_sync_single_for_device(pdev,
  1251. txdr->buffer_info[k].dma,
  1252. txdr->buffer_info[k].length,
  1253. PCI_DMA_TODEVICE);
  1254. if (unlikely(++k == txdr->count)) k = 0;
  1255. }
  1256. E1000_WRITE_REG(&adapter->hw, TDT, k);
  1257. msec_delay(200);
  1258. time = jiffies; /* set the start time for the receive */
  1259. good_cnt = 0;
  1260. do { /* receive the sent packets */
  1261. pci_dma_sync_single_for_cpu(pdev,
  1262. rxdr->buffer_info[l].dma,
  1263. rxdr->buffer_info[l].length,
  1264. PCI_DMA_FROMDEVICE);
  1265. ret_val = e1000_check_lbtest_frame(
  1266. rxdr->buffer_info[l].skb,
  1267. 1024);
  1268. if (!ret_val)
  1269. good_cnt++;
  1270. if (unlikely(++l == rxdr->count)) l = 0;
  1271. /* time + 20 msecs (200 msecs on 2.4) is more than
  1272. * enough time to complete the receives, if it's
  1273. * exceeded, break and error off
  1274. */
  1275. } while (good_cnt < 64 && jiffies < (time + 20));
  1276. if (good_cnt != 64) {
  1277. ret_val = 13; /* ret_val is the same as mis-compare */
  1278. break;
  1279. }
  1280. if (jiffies >= (time + 2)) {
  1281. ret_val = 14; /* error code for time out error */
  1282. break;
  1283. }
  1284. } /* end loop count loop */
  1285. return ret_val;
  1286. }
  1287. static int
  1288. e1000_loopback_test(struct e1000_adapter *adapter, uint64_t *data)
  1289. {
  1290. /* PHY loopback cannot be performed if SoL/IDER
  1291. * sessions are active */
  1292. if (e1000_check_phy_reset_block(&adapter->hw)) {
  1293. DPRINTK(DRV, ERR, "Cannot do PHY loopback test "
  1294. "when SoL/IDER is active.\n");
  1295. *data = 0;
  1296. goto out;
  1297. }
  1298. if ((*data = e1000_setup_desc_rings(adapter)))
  1299. goto out;
  1300. if ((*data = e1000_setup_loopback_test(adapter)))
  1301. goto err_loopback;
  1302. *data = e1000_run_loopback_test(adapter);
  1303. e1000_loopback_cleanup(adapter);
  1304. err_loopback:
  1305. e1000_free_desc_rings(adapter);
  1306. out:
  1307. return *data;
  1308. }
  1309. static int
  1310. e1000_link_test(struct e1000_adapter *adapter, uint64_t *data)
  1311. {
  1312. *data = 0;
  1313. if (adapter->hw.media_type == e1000_media_type_internal_serdes) {
  1314. int i = 0;
  1315. adapter->hw.serdes_link_down = TRUE;
  1316. /* On some blade server designs, link establishment
  1317. * could take as long as 2-3 minutes */
  1318. do {
  1319. e1000_check_for_link(&adapter->hw);
  1320. if (adapter->hw.serdes_link_down == FALSE)
  1321. return *data;
  1322. msec_delay(20);
  1323. } while (i++ < 3750);
  1324. *data = 1;
  1325. } else {
  1326. e1000_check_for_link(&adapter->hw);
  1327. if (adapter->hw.autoneg) /* if auto_neg is set wait for it */
  1328. msec_delay(4000);
  1329. if (!(E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU)) {
  1330. *data = 1;
  1331. }
  1332. }
  1333. return *data;
  1334. }
  1335. static int
  1336. e1000_diag_test_count(struct net_device *netdev)
  1337. {
  1338. return E1000_TEST_LEN;
  1339. }
  1340. static void
  1341. e1000_diag_test(struct net_device *netdev,
  1342. struct ethtool_test *eth_test, uint64_t *data)
  1343. {
  1344. struct e1000_adapter *adapter = netdev_priv(netdev);
  1345. boolean_t if_running = netif_running(netdev);
  1346. if (eth_test->flags == ETH_TEST_FL_OFFLINE) {
  1347. /* Offline tests */
  1348. /* save speed, duplex, autoneg settings */
  1349. uint16_t autoneg_advertised = adapter->hw.autoneg_advertised;
  1350. uint8_t forced_speed_duplex = adapter->hw.forced_speed_duplex;
  1351. uint8_t autoneg = adapter->hw.autoneg;
  1352. /* Link test performed before hardware reset so autoneg doesn't
  1353. * interfere with test result */
  1354. if (e1000_link_test(adapter, &data[4]))
  1355. eth_test->flags |= ETH_TEST_FL_FAILED;
  1356. if (if_running)
  1357. e1000_down(adapter);
  1358. else
  1359. e1000_reset(adapter);
  1360. if (e1000_reg_test(adapter, &data[0]))
  1361. eth_test->flags |= ETH_TEST_FL_FAILED;
  1362. e1000_reset(adapter);
  1363. if (e1000_eeprom_test(adapter, &data[1]))
  1364. eth_test->flags |= ETH_TEST_FL_FAILED;
  1365. e1000_reset(adapter);
  1366. if (e1000_intr_test(adapter, &data[2]))
  1367. eth_test->flags |= ETH_TEST_FL_FAILED;
  1368. e1000_reset(adapter);
  1369. if (e1000_loopback_test(adapter, &data[3]))
  1370. eth_test->flags |= ETH_TEST_FL_FAILED;
  1371. /* restore speed, duplex, autoneg settings */
  1372. adapter->hw.autoneg_advertised = autoneg_advertised;
  1373. adapter->hw.forced_speed_duplex = forced_speed_duplex;
  1374. adapter->hw.autoneg = autoneg;
  1375. e1000_reset(adapter);
  1376. if (if_running)
  1377. e1000_up(adapter);
  1378. } else {
  1379. /* Online tests */
  1380. if (e1000_link_test(adapter, &data[4]))
  1381. eth_test->flags |= ETH_TEST_FL_FAILED;
  1382. /* Offline tests aren't run; pass by default */
  1383. data[0] = 0;
  1384. data[1] = 0;
  1385. data[2] = 0;
  1386. data[3] = 0;
  1387. }
  1388. msleep_interruptible(4 * 1000);
  1389. }
  1390. static void
  1391. e1000_get_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
  1392. {
  1393. struct e1000_adapter *adapter = netdev_priv(netdev);
  1394. struct e1000_hw *hw = &adapter->hw;
  1395. switch (adapter->hw.device_id) {
  1396. case E1000_DEV_ID_82542:
  1397. case E1000_DEV_ID_82543GC_FIBER:
  1398. case E1000_DEV_ID_82543GC_COPPER:
  1399. case E1000_DEV_ID_82544EI_FIBER:
  1400. case E1000_DEV_ID_82546EB_QUAD_COPPER:
  1401. case E1000_DEV_ID_82545EM_FIBER:
  1402. case E1000_DEV_ID_82545EM_COPPER:
  1403. case E1000_DEV_ID_82546GB_QUAD_COPPER:
  1404. wol->supported = 0;
  1405. wol->wolopts = 0;
  1406. return;
  1407. case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
  1408. /* device id 10B5 port-A supports wol */
  1409. if (!adapter->ksp3_port_a) {
  1410. wol->supported = 0;
  1411. return;
  1412. }
  1413. /* KSP3 does not suppport UCAST wake-ups for any interface */
  1414. wol->supported = WAKE_MCAST | WAKE_BCAST | WAKE_MAGIC;
  1415. if (adapter->wol & E1000_WUFC_EX)
  1416. DPRINTK(DRV, ERR, "Interface does not support "
  1417. "directed (unicast) frame wake-up packets\n");
  1418. wol->wolopts = 0;
  1419. goto do_defaults;
  1420. case E1000_DEV_ID_82546EB_FIBER:
  1421. case E1000_DEV_ID_82546GB_FIBER:
  1422. case E1000_DEV_ID_82571EB_FIBER:
  1423. /* Wake events only supported on port A for dual fiber */
  1424. if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1) {
  1425. wol->supported = 0;
  1426. wol->wolopts = 0;
  1427. return;
  1428. }
  1429. /* Fall Through */
  1430. default:
  1431. wol->supported = WAKE_UCAST | WAKE_MCAST |
  1432. WAKE_BCAST | WAKE_MAGIC;
  1433. wol->wolopts = 0;
  1434. do_defaults:
  1435. if (adapter->wol & E1000_WUFC_EX)
  1436. wol->wolopts |= WAKE_UCAST;
  1437. if (adapter->wol & E1000_WUFC_MC)
  1438. wol->wolopts |= WAKE_MCAST;
  1439. if (adapter->wol & E1000_WUFC_BC)
  1440. wol->wolopts |= WAKE_BCAST;
  1441. if (adapter->wol & E1000_WUFC_MAG)
  1442. wol->wolopts |= WAKE_MAGIC;
  1443. return;
  1444. }
  1445. }
  1446. static int
  1447. e1000_set_wol(struct net_device *netdev, struct ethtool_wolinfo *wol)
  1448. {
  1449. struct e1000_adapter *adapter = netdev_priv(netdev);
  1450. struct e1000_hw *hw = &adapter->hw;
  1451. switch (adapter->hw.device_id) {
  1452. case E1000_DEV_ID_82542:
  1453. case E1000_DEV_ID_82543GC_FIBER:
  1454. case E1000_DEV_ID_82543GC_COPPER:
  1455. case E1000_DEV_ID_82544EI_FIBER:
  1456. case E1000_DEV_ID_82546EB_QUAD_COPPER:
  1457. case E1000_DEV_ID_82546GB_QUAD_COPPER:
  1458. case E1000_DEV_ID_82545EM_FIBER:
  1459. case E1000_DEV_ID_82545EM_COPPER:
  1460. return wol->wolopts ? -EOPNOTSUPP : 0;
  1461. case E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3:
  1462. /* device id 10B5 port-A supports wol */
  1463. if (!adapter->ksp3_port_a)
  1464. return wol->wolopts ? -EOPNOTSUPP : 0;
  1465. if (wol->wolopts & WAKE_UCAST) {
  1466. DPRINTK(DRV, ERR, "Interface does not support "
  1467. "directed (unicast) frame wake-up packets\n");
  1468. return -EOPNOTSUPP;
  1469. }
  1470. case E1000_DEV_ID_82546EB_FIBER:
  1471. case E1000_DEV_ID_82546GB_FIBER:
  1472. case E1000_DEV_ID_82571EB_FIBER:
  1473. /* Wake events only supported on port A for dual fiber */
  1474. if (E1000_READ_REG(hw, STATUS) & E1000_STATUS_FUNC_1)
  1475. return wol->wolopts ? -EOPNOTSUPP : 0;
  1476. /* Fall Through */
  1477. default:
  1478. if (wol->wolopts & (WAKE_PHY | WAKE_ARP | WAKE_MAGICSECURE))
  1479. return -EOPNOTSUPP;
  1480. adapter->wol = 0;
  1481. if (wol->wolopts & WAKE_UCAST)
  1482. adapter->wol |= E1000_WUFC_EX;
  1483. if (wol->wolopts & WAKE_MCAST)
  1484. adapter->wol |= E1000_WUFC_MC;
  1485. if (wol->wolopts & WAKE_BCAST)
  1486. adapter->wol |= E1000_WUFC_BC;
  1487. if (wol->wolopts & WAKE_MAGIC)
  1488. adapter->wol |= E1000_WUFC_MAG;
  1489. }
  1490. return 0;
  1491. }
  1492. /* toggle LED 4 times per second = 2 "blinks" per second */
  1493. #define E1000_ID_INTERVAL (HZ/4)
  1494. /* bit defines for adapter->led_status */
  1495. #define E1000_LED_ON 0
  1496. static void
  1497. e1000_led_blink_callback(unsigned long data)
  1498. {
  1499. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1500. if (test_and_change_bit(E1000_LED_ON, &adapter->led_status))
  1501. e1000_led_off(&adapter->hw);
  1502. else
  1503. e1000_led_on(&adapter->hw);
  1504. mod_timer(&adapter->blink_timer, jiffies + E1000_ID_INTERVAL);
  1505. }
  1506. static int
  1507. e1000_phys_id(struct net_device *netdev, uint32_t data)
  1508. {
  1509. struct e1000_adapter *adapter = netdev_priv(netdev);
  1510. if (!data || data > (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ))
  1511. data = (uint32_t)(MAX_SCHEDULE_TIMEOUT / HZ);
  1512. if (adapter->hw.mac_type < e1000_82571) {
  1513. if (!adapter->blink_timer.function) {
  1514. init_timer(&adapter->blink_timer);
  1515. adapter->blink_timer.function = e1000_led_blink_callback;
  1516. adapter->blink_timer.data = (unsigned long) adapter;
  1517. }
  1518. e1000_setup_led(&adapter->hw);
  1519. mod_timer(&adapter->blink_timer, jiffies);
  1520. msleep_interruptible(data * 1000);
  1521. del_timer_sync(&adapter->blink_timer);
  1522. } else if (adapter->hw.mac_type < e1000_82573) {
  1523. E1000_WRITE_REG(&adapter->hw, LEDCTL,
  1524. (E1000_LEDCTL_LED2_BLINK_RATE |
  1525. E1000_LEDCTL_LED0_BLINK | E1000_LEDCTL_LED2_BLINK |
  1526. (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) |
  1527. (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED0_MODE_SHIFT) |
  1528. (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED1_MODE_SHIFT)));
  1529. msleep_interruptible(data * 1000);
  1530. } else {
  1531. E1000_WRITE_REG(&adapter->hw, LEDCTL,
  1532. (E1000_LEDCTL_LED2_BLINK_RATE |
  1533. E1000_LEDCTL_LED1_BLINK | E1000_LEDCTL_LED2_BLINK |
  1534. (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED2_MODE_SHIFT) |
  1535. (E1000_LEDCTL_MODE_LINK_ACTIVITY << E1000_LEDCTL_LED1_MODE_SHIFT) |
  1536. (E1000_LEDCTL_MODE_LED_OFF << E1000_LEDCTL_LED0_MODE_SHIFT)));
  1537. msleep_interruptible(data * 1000);
  1538. }
  1539. e1000_led_off(&adapter->hw);
  1540. clear_bit(E1000_LED_ON, &adapter->led_status);
  1541. e1000_cleanup_led(&adapter->hw);
  1542. return 0;
  1543. }
  1544. static int
  1545. e1000_nway_reset(struct net_device *netdev)
  1546. {
  1547. struct e1000_adapter *adapter = netdev_priv(netdev);
  1548. if (netif_running(netdev)) {
  1549. e1000_down(adapter);
  1550. e1000_up(adapter);
  1551. }
  1552. return 0;
  1553. }
  1554. static int
  1555. e1000_get_stats_count(struct net_device *netdev)
  1556. {
  1557. return E1000_STATS_LEN;
  1558. }
  1559. static void
  1560. e1000_get_ethtool_stats(struct net_device *netdev,
  1561. struct ethtool_stats *stats, uint64_t *data)
  1562. {
  1563. struct e1000_adapter *adapter = netdev_priv(netdev);
  1564. int i;
  1565. e1000_update_stats(adapter);
  1566. for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
  1567. char *p = (char *)adapter+e1000_gstrings_stats[i].stat_offset;
  1568. data[i] = (e1000_gstrings_stats[i].sizeof_stat ==
  1569. sizeof(uint64_t)) ? *(uint64_t *)p : *(uint32_t *)p;
  1570. }
  1571. /* BUG_ON(i != E1000_STATS_LEN); */
  1572. }
  1573. static void
  1574. e1000_get_strings(struct net_device *netdev, uint32_t stringset, uint8_t *data)
  1575. {
  1576. uint8_t *p = data;
  1577. int i;
  1578. switch (stringset) {
  1579. case ETH_SS_TEST:
  1580. memcpy(data, *e1000_gstrings_test,
  1581. E1000_TEST_LEN*ETH_GSTRING_LEN);
  1582. break;
  1583. case ETH_SS_STATS:
  1584. for (i = 0; i < E1000_GLOBAL_STATS_LEN; i++) {
  1585. memcpy(p, e1000_gstrings_stats[i].stat_string,
  1586. ETH_GSTRING_LEN);
  1587. p += ETH_GSTRING_LEN;
  1588. }
  1589. /* BUG_ON(p - data != E1000_STATS_LEN * ETH_GSTRING_LEN); */
  1590. break;
  1591. }
  1592. }
  1593. static struct ethtool_ops e1000_ethtool_ops = {
  1594. .get_settings = e1000_get_settings,
  1595. .set_settings = e1000_set_settings,
  1596. .get_drvinfo = e1000_get_drvinfo,
  1597. .get_regs_len = e1000_get_regs_len,
  1598. .get_regs = e1000_get_regs,
  1599. .get_wol = e1000_get_wol,
  1600. .set_wol = e1000_set_wol,
  1601. .get_msglevel = e1000_get_msglevel,
  1602. .set_msglevel = e1000_set_msglevel,
  1603. .nway_reset = e1000_nway_reset,
  1604. .get_link = ethtool_op_get_link,
  1605. .get_eeprom_len = e1000_get_eeprom_len,
  1606. .get_eeprom = e1000_get_eeprom,
  1607. .set_eeprom = e1000_set_eeprom,
  1608. .get_ringparam = e1000_get_ringparam,
  1609. .set_ringparam = e1000_set_ringparam,
  1610. .get_pauseparam = e1000_get_pauseparam,
  1611. .set_pauseparam = e1000_set_pauseparam,
  1612. .get_rx_csum = e1000_get_rx_csum,
  1613. .set_rx_csum = e1000_set_rx_csum,
  1614. .get_tx_csum = e1000_get_tx_csum,
  1615. .set_tx_csum = e1000_set_tx_csum,
  1616. .get_sg = ethtool_op_get_sg,
  1617. .set_sg = ethtool_op_set_sg,
  1618. #ifdef NETIF_F_TSO
  1619. .get_tso = ethtool_op_get_tso,
  1620. .set_tso = e1000_set_tso,
  1621. #endif
  1622. .self_test_count = e1000_diag_test_count,
  1623. .self_test = e1000_diag_test,
  1624. .get_strings = e1000_get_strings,
  1625. .phys_id = e1000_phys_id,
  1626. .get_stats_count = e1000_get_stats_count,
  1627. .get_ethtool_stats = e1000_get_ethtool_stats,
  1628. .get_perm_addr = ethtool_op_get_perm_addr,
  1629. };
  1630. void e1000_set_ethtool_ops(struct net_device *netdev)
  1631. {
  1632. SET_ETHTOOL_OPS(netdev, &e1000_ethtool_ops);
  1633. }