qla_os.c 104 KB

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  1. /*
  2. * QLogic Fibre Channel HBA Driver
  3. * Copyright (c) 2003-2008 QLogic Corporation
  4. *
  5. * See LICENSE.qla2xxx for copyright and licensing details.
  6. */
  7. #include "qla_def.h"
  8. #include <linux/moduleparam.h>
  9. #include <linux/vmalloc.h>
  10. #include <linux/delay.h>
  11. #include <linux/kthread.h>
  12. #include <linux/mutex.h>
  13. #include <linux/kobject.h>
  14. #include <linux/slab.h>
  15. #include <scsi/scsi_tcq.h>
  16. #include <scsi/scsicam.h>
  17. #include <scsi/scsi_transport.h>
  18. #include <scsi/scsi_transport_fc.h>
  19. /*
  20. * Driver version
  21. */
  22. char qla2x00_version_str[40];
  23. static int apidev_major;
  24. /*
  25. * SRB allocation cache
  26. */
  27. static struct kmem_cache *srb_cachep;
  28. /*
  29. * CT6 CTX allocation cache
  30. */
  31. static struct kmem_cache *ctx_cachep;
  32. int ql2xlogintimeout = 20;
  33. module_param(ql2xlogintimeout, int, S_IRUGO|S_IRUSR);
  34. MODULE_PARM_DESC(ql2xlogintimeout,
  35. "Login timeout value in seconds.");
  36. int qlport_down_retry;
  37. module_param(qlport_down_retry, int, S_IRUGO|S_IRUSR);
  38. MODULE_PARM_DESC(qlport_down_retry,
  39. "Maximum number of command retries to a port that returns "
  40. "a PORT-DOWN status.");
  41. int ql2xplogiabsentdevice;
  42. module_param(ql2xplogiabsentdevice, int, S_IRUGO|S_IWUSR);
  43. MODULE_PARM_DESC(ql2xplogiabsentdevice,
  44. "Option to enable PLOGI to devices that are not present after "
  45. "a Fabric scan. This is needed for several broken switches. "
  46. "Default is 0 - no PLOGI. 1 - perfom PLOGI.");
  47. int ql2xloginretrycount = 0;
  48. module_param(ql2xloginretrycount, int, S_IRUGO|S_IRUSR);
  49. MODULE_PARM_DESC(ql2xloginretrycount,
  50. "Specify an alternate value for the NVRAM login retry count.");
  51. int ql2xallocfwdump = 1;
  52. module_param(ql2xallocfwdump, int, S_IRUGO|S_IRUSR);
  53. MODULE_PARM_DESC(ql2xallocfwdump,
  54. "Option to enable allocation of memory for a firmware dump "
  55. "during HBA initialization. Memory allocation requirements "
  56. "vary by ISP type. Default is 1 - allocate memory.");
  57. int ql2xextended_error_logging;
  58. module_param(ql2xextended_error_logging, int, S_IRUGO|S_IWUSR);
  59. MODULE_PARM_DESC(ql2xextended_error_logging,
  60. "Option to enable extended error logging, "
  61. "Default is 0 - no logging. 1 - log errors.");
  62. int ql2xshiftctondsd = 6;
  63. module_param(ql2xshiftctondsd, int, S_IRUGO|S_IRUSR);
  64. MODULE_PARM_DESC(ql2xshiftctondsd,
  65. "Set to control shifting of command type processing "
  66. "based on total number of SG elements.");
  67. static void qla2x00_free_device(scsi_qla_host_t *);
  68. int ql2xfdmienable=1;
  69. module_param(ql2xfdmienable, int, S_IRUGO|S_IRUSR);
  70. MODULE_PARM_DESC(ql2xfdmienable,
  71. "Enables FDMI registrations. "
  72. "0 - no FDMI. Default is 1 - perform FDMI.");
  73. #define MAX_Q_DEPTH 32
  74. static int ql2xmaxqdepth = MAX_Q_DEPTH;
  75. module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR);
  76. MODULE_PARM_DESC(ql2xmaxqdepth,
  77. "Maximum queue depth to report for target devices.");
  78. /* Do not change the value of this after module load */
  79. int ql2xenabledif = 1;
  80. module_param(ql2xenabledif, int, S_IRUGO|S_IWUSR);
  81. MODULE_PARM_DESC(ql2xenabledif,
  82. " Enable T10-CRC-DIF "
  83. " Default is 0 - No DIF Support. 1 - Enable it");
  84. int ql2xenablehba_err_chk;
  85. module_param(ql2xenablehba_err_chk, int, S_IRUGO|S_IWUSR);
  86. MODULE_PARM_DESC(ql2xenablehba_err_chk,
  87. " Enable T10-CRC-DIF Error isolation by HBA"
  88. " Default is 0 - Error isolation disabled, 1 - Enable it");
  89. int ql2xiidmaenable=1;
  90. module_param(ql2xiidmaenable, int, S_IRUGO|S_IRUSR);
  91. MODULE_PARM_DESC(ql2xiidmaenable,
  92. "Enables iIDMA settings "
  93. "Default is 1 - perform iIDMA. 0 - no iIDMA.");
  94. int ql2xmaxqueues = 1;
  95. module_param(ql2xmaxqueues, int, S_IRUGO|S_IRUSR);
  96. MODULE_PARM_DESC(ql2xmaxqueues,
  97. "Enables MQ settings "
  98. "Default is 1 for single queue. Set it to number \
  99. of queues in MQ mode.");
  100. int ql2xmultique_tag;
  101. module_param(ql2xmultique_tag, int, S_IRUGO|S_IRUSR);
  102. MODULE_PARM_DESC(ql2xmultique_tag,
  103. "Enables CPU affinity settings for the driver "
  104. "Default is 0 for no affinity of request and response IO. "
  105. "Set it to 1 to turn on the cpu affinity.");
  106. int ql2xfwloadbin;
  107. module_param(ql2xfwloadbin, int, S_IRUGO|S_IRUSR);
  108. MODULE_PARM_DESC(ql2xfwloadbin,
  109. "Option to specify location from which to load ISP firmware:\n"
  110. " 2 -- load firmware via the request_firmware() (hotplug)\n"
  111. " interface.\n"
  112. " 1 -- load firmware from flash.\n"
  113. " 0 -- use default semantics.\n");
  114. int ql2xetsenable;
  115. module_param(ql2xetsenable, int, S_IRUGO|S_IRUSR);
  116. MODULE_PARM_DESC(ql2xetsenable,
  117. "Enables firmware ETS burst."
  118. "Default is 0 - skip ETS enablement.");
  119. int ql2xdbwr;
  120. module_param(ql2xdbwr, int, S_IRUGO|S_IRUSR);
  121. MODULE_PARM_DESC(ql2xdbwr,
  122. "Option to specify scheme for request queue posting\n"
  123. " 0 -- Regular doorbell.\n"
  124. " 1 -- CAMRAM doorbell (faster).\n");
  125. int ql2xdontresethba;
  126. module_param(ql2xdontresethba, int, S_IRUGO|S_IRUSR);
  127. MODULE_PARM_DESC(ql2xdontresethba,
  128. "Option to specify reset behaviour\n"
  129. " 0 (Default) -- Reset on failure.\n"
  130. " 1 -- Do not reset on failure.\n");
  131. int ql2xasynctmfenable;
  132. module_param(ql2xasynctmfenable, int, S_IRUGO|S_IRUSR);
  133. MODULE_PARM_DESC(ql2xasynctmfenable,
  134. "Enables issue of TM IOCBs asynchronously via IOCB mechanism"
  135. "Default is 0 - Issue TM IOCBs via mailbox mechanism.");
  136. /*
  137. * SCSI host template entry points
  138. */
  139. static int qla2xxx_slave_configure(struct scsi_device * device);
  140. static int qla2xxx_slave_alloc(struct scsi_device *);
  141. static int qla2xxx_scan_finished(struct Scsi_Host *, unsigned long time);
  142. static void qla2xxx_scan_start(struct Scsi_Host *);
  143. static void qla2xxx_slave_destroy(struct scsi_device *);
  144. static int qla2xxx_queuecommand(struct scsi_cmnd *cmd,
  145. void (*fn)(struct scsi_cmnd *));
  146. static int qla2xxx_eh_abort(struct scsi_cmnd *);
  147. static int qla2xxx_eh_device_reset(struct scsi_cmnd *);
  148. static int qla2xxx_eh_target_reset(struct scsi_cmnd *);
  149. static int qla2xxx_eh_bus_reset(struct scsi_cmnd *);
  150. static int qla2xxx_eh_host_reset(struct scsi_cmnd *);
  151. static int qla2x00_change_queue_depth(struct scsi_device *, int, int);
  152. static int qla2x00_change_queue_type(struct scsi_device *, int);
  153. struct scsi_host_template qla2xxx_driver_template = {
  154. .module = THIS_MODULE,
  155. .name = QLA2XXX_DRIVER_NAME,
  156. .queuecommand = qla2xxx_queuecommand,
  157. .eh_abort_handler = qla2xxx_eh_abort,
  158. .eh_device_reset_handler = qla2xxx_eh_device_reset,
  159. .eh_target_reset_handler = qla2xxx_eh_target_reset,
  160. .eh_bus_reset_handler = qla2xxx_eh_bus_reset,
  161. .eh_host_reset_handler = qla2xxx_eh_host_reset,
  162. .slave_configure = qla2xxx_slave_configure,
  163. .slave_alloc = qla2xxx_slave_alloc,
  164. .slave_destroy = qla2xxx_slave_destroy,
  165. .scan_finished = qla2xxx_scan_finished,
  166. .scan_start = qla2xxx_scan_start,
  167. .change_queue_depth = qla2x00_change_queue_depth,
  168. .change_queue_type = qla2x00_change_queue_type,
  169. .this_id = -1,
  170. .cmd_per_lun = 3,
  171. .use_clustering = ENABLE_CLUSTERING,
  172. .sg_tablesize = SG_ALL,
  173. .max_sectors = 0xFFFF,
  174. .shost_attrs = qla2x00_host_attrs,
  175. };
  176. static struct scsi_transport_template *qla2xxx_transport_template = NULL;
  177. struct scsi_transport_template *qla2xxx_transport_vport_template = NULL;
  178. /* TODO Convert to inlines
  179. *
  180. * Timer routines
  181. */
  182. __inline__ void
  183. qla2x00_start_timer(scsi_qla_host_t *vha, void *func, unsigned long interval)
  184. {
  185. init_timer(&vha->timer);
  186. vha->timer.expires = jiffies + interval * HZ;
  187. vha->timer.data = (unsigned long)vha;
  188. vha->timer.function = (void (*)(unsigned long))func;
  189. add_timer(&vha->timer);
  190. vha->timer_active = 1;
  191. }
  192. static inline void
  193. qla2x00_restart_timer(scsi_qla_host_t *vha, unsigned long interval)
  194. {
  195. /* Currently used for 82XX only. */
  196. if (vha->device_flags & DFLG_DEV_FAILED)
  197. return;
  198. mod_timer(&vha->timer, jiffies + interval * HZ);
  199. }
  200. static __inline__ void
  201. qla2x00_stop_timer(scsi_qla_host_t *vha)
  202. {
  203. del_timer_sync(&vha->timer);
  204. vha->timer_active = 0;
  205. }
  206. static int qla2x00_do_dpc(void *data);
  207. static void qla2x00_rst_aen(scsi_qla_host_t *);
  208. static int qla2x00_mem_alloc(struct qla_hw_data *, uint16_t, uint16_t,
  209. struct req_que **, struct rsp_que **);
  210. static void qla2x00_mem_free(struct qla_hw_data *);
  211. static void qla2x00_sp_free_dma(srb_t *);
  212. /* -------------------------------------------------------------------------- */
  213. static int qla2x00_alloc_queues(struct qla_hw_data *ha)
  214. {
  215. ha->req_q_map = kzalloc(sizeof(struct req_que *) * ha->max_req_queues,
  216. GFP_KERNEL);
  217. if (!ha->req_q_map) {
  218. qla_printk(KERN_WARNING, ha,
  219. "Unable to allocate memory for request queue ptrs\n");
  220. goto fail_req_map;
  221. }
  222. ha->rsp_q_map = kzalloc(sizeof(struct rsp_que *) * ha->max_rsp_queues,
  223. GFP_KERNEL);
  224. if (!ha->rsp_q_map) {
  225. qla_printk(KERN_WARNING, ha,
  226. "Unable to allocate memory for response queue ptrs\n");
  227. goto fail_rsp_map;
  228. }
  229. set_bit(0, ha->rsp_qid_map);
  230. set_bit(0, ha->req_qid_map);
  231. return 1;
  232. fail_rsp_map:
  233. kfree(ha->req_q_map);
  234. ha->req_q_map = NULL;
  235. fail_req_map:
  236. return -ENOMEM;
  237. }
  238. static void qla2x00_free_req_que(struct qla_hw_data *ha, struct req_que *req)
  239. {
  240. if (req && req->ring)
  241. dma_free_coherent(&ha->pdev->dev,
  242. (req->length + 1) * sizeof(request_t),
  243. req->ring, req->dma);
  244. kfree(req);
  245. req = NULL;
  246. }
  247. static void qla2x00_free_rsp_que(struct qla_hw_data *ha, struct rsp_que *rsp)
  248. {
  249. if (rsp && rsp->ring)
  250. dma_free_coherent(&ha->pdev->dev,
  251. (rsp->length + 1) * sizeof(response_t),
  252. rsp->ring, rsp->dma);
  253. kfree(rsp);
  254. rsp = NULL;
  255. }
  256. static void qla2x00_free_queues(struct qla_hw_data *ha)
  257. {
  258. struct req_que *req;
  259. struct rsp_que *rsp;
  260. int cnt;
  261. for (cnt = 0; cnt < ha->max_req_queues; cnt++) {
  262. req = ha->req_q_map[cnt];
  263. qla2x00_free_req_que(ha, req);
  264. }
  265. kfree(ha->req_q_map);
  266. ha->req_q_map = NULL;
  267. for (cnt = 0; cnt < ha->max_rsp_queues; cnt++) {
  268. rsp = ha->rsp_q_map[cnt];
  269. qla2x00_free_rsp_que(ha, rsp);
  270. }
  271. kfree(ha->rsp_q_map);
  272. ha->rsp_q_map = NULL;
  273. }
  274. static int qla25xx_setup_mode(struct scsi_qla_host *vha)
  275. {
  276. uint16_t options = 0;
  277. int ques, req, ret;
  278. struct qla_hw_data *ha = vha->hw;
  279. if (!(ha->fw_attributes & BIT_6)) {
  280. qla_printk(KERN_INFO, ha,
  281. "Firmware is not multi-queue capable\n");
  282. goto fail;
  283. }
  284. if (ql2xmultique_tag) {
  285. /* create a request queue for IO */
  286. options |= BIT_7;
  287. req = qla25xx_create_req_que(ha, options, 0, 0, -1,
  288. QLA_DEFAULT_QUE_QOS);
  289. if (!req) {
  290. qla_printk(KERN_WARNING, ha,
  291. "Can't create request queue\n");
  292. goto fail;
  293. }
  294. ha->wq = create_workqueue("qla2xxx_wq");
  295. vha->req = ha->req_q_map[req];
  296. options |= BIT_1;
  297. for (ques = 1; ques < ha->max_rsp_queues; ques++) {
  298. ret = qla25xx_create_rsp_que(ha, options, 0, 0, req);
  299. if (!ret) {
  300. qla_printk(KERN_WARNING, ha,
  301. "Response Queue create failed\n");
  302. goto fail2;
  303. }
  304. }
  305. ha->flags.cpu_affinity_enabled = 1;
  306. DEBUG2(qla_printk(KERN_INFO, ha,
  307. "CPU affinity mode enabled, no. of response"
  308. " queues:%d, no. of request queues:%d\n",
  309. ha->max_rsp_queues, ha->max_req_queues));
  310. }
  311. return 0;
  312. fail2:
  313. qla25xx_delete_queues(vha);
  314. destroy_workqueue(ha->wq);
  315. ha->wq = NULL;
  316. fail:
  317. ha->mqenable = 0;
  318. kfree(ha->req_q_map);
  319. kfree(ha->rsp_q_map);
  320. ha->max_req_queues = ha->max_rsp_queues = 1;
  321. return 1;
  322. }
  323. static char *
  324. qla2x00_pci_info_str(struct scsi_qla_host *vha, char *str)
  325. {
  326. struct qla_hw_data *ha = vha->hw;
  327. static char *pci_bus_modes[] = {
  328. "33", "66", "100", "133",
  329. };
  330. uint16_t pci_bus;
  331. strcpy(str, "PCI");
  332. pci_bus = (ha->pci_attr & (BIT_9 | BIT_10)) >> 9;
  333. if (pci_bus) {
  334. strcat(str, "-X (");
  335. strcat(str, pci_bus_modes[pci_bus]);
  336. } else {
  337. pci_bus = (ha->pci_attr & BIT_8) >> 8;
  338. strcat(str, " (");
  339. strcat(str, pci_bus_modes[pci_bus]);
  340. }
  341. strcat(str, " MHz)");
  342. return (str);
  343. }
  344. static char *
  345. qla24xx_pci_info_str(struct scsi_qla_host *vha, char *str)
  346. {
  347. static char *pci_bus_modes[] = { "33", "66", "100", "133", };
  348. struct qla_hw_data *ha = vha->hw;
  349. uint32_t pci_bus;
  350. int pcie_reg;
  351. pcie_reg = pci_find_capability(ha->pdev, PCI_CAP_ID_EXP);
  352. if (pcie_reg) {
  353. char lwstr[6];
  354. uint16_t pcie_lstat, lspeed, lwidth;
  355. pcie_reg += 0x12;
  356. pci_read_config_word(ha->pdev, pcie_reg, &pcie_lstat);
  357. lspeed = pcie_lstat & (BIT_0 | BIT_1 | BIT_2 | BIT_3);
  358. lwidth = (pcie_lstat &
  359. (BIT_4 | BIT_5 | BIT_6 | BIT_7 | BIT_8 | BIT_9)) >> 4;
  360. strcpy(str, "PCIe (");
  361. if (lspeed == 1)
  362. strcat(str, "2.5GT/s ");
  363. else if (lspeed == 2)
  364. strcat(str, "5.0GT/s ");
  365. else
  366. strcat(str, "<unknown> ");
  367. snprintf(lwstr, sizeof(lwstr), "x%d)", lwidth);
  368. strcat(str, lwstr);
  369. return str;
  370. }
  371. strcpy(str, "PCI");
  372. pci_bus = (ha->pci_attr & CSRX_PCIX_BUS_MODE_MASK) >> 8;
  373. if (pci_bus == 0 || pci_bus == 8) {
  374. strcat(str, " (");
  375. strcat(str, pci_bus_modes[pci_bus >> 3]);
  376. } else {
  377. strcat(str, "-X ");
  378. if (pci_bus & BIT_2)
  379. strcat(str, "Mode 2");
  380. else
  381. strcat(str, "Mode 1");
  382. strcat(str, " (");
  383. strcat(str, pci_bus_modes[pci_bus & ~BIT_2]);
  384. }
  385. strcat(str, " MHz)");
  386. return str;
  387. }
  388. static char *
  389. qla2x00_fw_version_str(struct scsi_qla_host *vha, char *str)
  390. {
  391. char un_str[10];
  392. struct qla_hw_data *ha = vha->hw;
  393. sprintf(str, "%d.%02d.%02d ", ha->fw_major_version,
  394. ha->fw_minor_version,
  395. ha->fw_subminor_version);
  396. if (ha->fw_attributes & BIT_9) {
  397. strcat(str, "FLX");
  398. return (str);
  399. }
  400. switch (ha->fw_attributes & 0xFF) {
  401. case 0x7:
  402. strcat(str, "EF");
  403. break;
  404. case 0x17:
  405. strcat(str, "TP");
  406. break;
  407. case 0x37:
  408. strcat(str, "IP");
  409. break;
  410. case 0x77:
  411. strcat(str, "VI");
  412. break;
  413. default:
  414. sprintf(un_str, "(%x)", ha->fw_attributes);
  415. strcat(str, un_str);
  416. break;
  417. }
  418. if (ha->fw_attributes & 0x100)
  419. strcat(str, "X");
  420. return (str);
  421. }
  422. static char *
  423. qla24xx_fw_version_str(struct scsi_qla_host *vha, char *str)
  424. {
  425. struct qla_hw_data *ha = vha->hw;
  426. sprintf(str, "%d.%02d.%02d (%x)", ha->fw_major_version,
  427. ha->fw_minor_version, ha->fw_subminor_version, ha->fw_attributes);
  428. return str;
  429. }
  430. static inline srb_t *
  431. qla2x00_get_new_sp(scsi_qla_host_t *vha, fc_port_t *fcport,
  432. struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
  433. {
  434. srb_t *sp;
  435. struct qla_hw_data *ha = vha->hw;
  436. sp = mempool_alloc(ha->srb_mempool, GFP_ATOMIC);
  437. if (!sp)
  438. return sp;
  439. sp->fcport = fcport;
  440. sp->cmd = cmd;
  441. sp->flags = 0;
  442. CMD_SP(cmd) = (void *)sp;
  443. cmd->scsi_done = done;
  444. sp->ctx = NULL;
  445. return sp;
  446. }
  447. static int
  448. qla2xxx_queuecommand(struct scsi_cmnd *cmd, void (*done)(struct scsi_cmnd *))
  449. {
  450. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  451. fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
  452. struct fc_rport *rport = starget_to_rport(scsi_target(cmd->device));
  453. struct qla_hw_data *ha = vha->hw;
  454. struct scsi_qla_host *base_vha = pci_get_drvdata(ha->pdev);
  455. srb_t *sp;
  456. int rval;
  457. if (ha->flags.eeh_busy) {
  458. if (ha->flags.pci_channel_io_perm_failure)
  459. cmd->result = DID_NO_CONNECT << 16;
  460. else
  461. cmd->result = DID_REQUEUE << 16;
  462. goto qc24_fail_command;
  463. }
  464. rval = fc_remote_port_chkready(rport);
  465. if (rval) {
  466. cmd->result = rval;
  467. goto qc24_fail_command;
  468. }
  469. /* Close window on fcport/rport state-transitioning. */
  470. if (fcport->drport)
  471. goto qc24_target_busy;
  472. if (!vha->flags.difdix_supported &&
  473. scsi_get_prot_op(cmd) != SCSI_PROT_NORMAL) {
  474. DEBUG2(qla_printk(KERN_ERR, ha,
  475. "DIF Cap Not Reg, fail DIF capable cmd's:%x\n",
  476. cmd->cmnd[0]));
  477. cmd->result = DID_NO_CONNECT << 16;
  478. goto qc24_fail_command;
  479. }
  480. if (atomic_read(&fcport->state) != FCS_ONLINE) {
  481. if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD ||
  482. atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
  483. cmd->result = DID_NO_CONNECT << 16;
  484. goto qc24_fail_command;
  485. }
  486. goto qc24_target_busy;
  487. }
  488. spin_unlock_irq(vha->host->host_lock);
  489. sp = qla2x00_get_new_sp(base_vha, fcport, cmd, done);
  490. if (!sp)
  491. goto qc24_host_busy_lock;
  492. rval = ha->isp_ops->start_scsi(sp);
  493. if (rval != QLA_SUCCESS)
  494. goto qc24_host_busy_free_sp;
  495. spin_lock_irq(vha->host->host_lock);
  496. return 0;
  497. qc24_host_busy_free_sp:
  498. qla2x00_sp_free_dma(sp);
  499. mempool_free(sp, ha->srb_mempool);
  500. qc24_host_busy_lock:
  501. spin_lock_irq(vha->host->host_lock);
  502. return SCSI_MLQUEUE_HOST_BUSY;
  503. qc24_target_busy:
  504. return SCSI_MLQUEUE_TARGET_BUSY;
  505. qc24_fail_command:
  506. done(cmd);
  507. return 0;
  508. }
  509. /*
  510. * qla2x00_eh_wait_on_command
  511. * Waits for the command to be returned by the Firmware for some
  512. * max time.
  513. *
  514. * Input:
  515. * cmd = Scsi Command to wait on.
  516. *
  517. * Return:
  518. * Not Found : 0
  519. * Found : 1
  520. */
  521. static int
  522. qla2x00_eh_wait_on_command(struct scsi_cmnd *cmd)
  523. {
  524. #define ABORT_POLLING_PERIOD 1000
  525. #define ABORT_WAIT_ITER ((10 * 1000) / (ABORT_POLLING_PERIOD))
  526. unsigned long wait_iter = ABORT_WAIT_ITER;
  527. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  528. struct qla_hw_data *ha = vha->hw;
  529. int ret = QLA_SUCCESS;
  530. if (unlikely(pci_channel_offline(ha->pdev)) || ha->flags.eeh_busy) {
  531. DEBUG17(qla_printk(KERN_WARNING, ha, "return:eh_wait\n"));
  532. return ret;
  533. }
  534. while (CMD_SP(cmd) && wait_iter--) {
  535. msleep(ABORT_POLLING_PERIOD);
  536. }
  537. if (CMD_SP(cmd))
  538. ret = QLA_FUNCTION_FAILED;
  539. return ret;
  540. }
  541. /*
  542. * qla2x00_wait_for_hba_online
  543. * Wait till the HBA is online after going through
  544. * <= MAX_RETRIES_OF_ISP_ABORT or
  545. * finally HBA is disabled ie marked offline
  546. *
  547. * Input:
  548. * ha - pointer to host adapter structure
  549. *
  550. * Note:
  551. * Does context switching-Release SPIN_LOCK
  552. * (if any) before calling this routine.
  553. *
  554. * Return:
  555. * Success (Adapter is online) : 0
  556. * Failed (Adapter is offline/disabled) : 1
  557. */
  558. int
  559. qla2x00_wait_for_hba_online(scsi_qla_host_t *vha)
  560. {
  561. int return_status;
  562. unsigned long wait_online;
  563. struct qla_hw_data *ha = vha->hw;
  564. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  565. wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
  566. while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
  567. test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
  568. test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
  569. ha->dpc_active) && time_before(jiffies, wait_online)) {
  570. msleep(1000);
  571. }
  572. if (base_vha->flags.online)
  573. return_status = QLA_SUCCESS;
  574. else
  575. return_status = QLA_FUNCTION_FAILED;
  576. return (return_status);
  577. }
  578. /*
  579. * qla2x00_wait_for_reset_ready
  580. * Wait till the HBA is online after going through
  581. * <= MAX_RETRIES_OF_ISP_ABORT or
  582. * finally HBA is disabled ie marked offline or flash
  583. * operations are in progress.
  584. *
  585. * Input:
  586. * ha - pointer to host adapter structure
  587. *
  588. * Note:
  589. * Does context switching-Release SPIN_LOCK
  590. * (if any) before calling this routine.
  591. *
  592. * Return:
  593. * Success (Adapter is online/no flash ops) : 0
  594. * Failed (Adapter is offline/disabled/flash ops in progress) : 1
  595. */
  596. int
  597. qla2x00_wait_for_reset_ready(scsi_qla_host_t *vha)
  598. {
  599. int return_status;
  600. unsigned long wait_online;
  601. struct qla_hw_data *ha = vha->hw;
  602. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  603. wait_online = jiffies + (MAX_LOOP_TIMEOUT * HZ);
  604. while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
  605. test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
  606. test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
  607. ha->optrom_state != QLA_SWAITING ||
  608. ha->dpc_active) && time_before(jiffies, wait_online))
  609. msleep(1000);
  610. if (base_vha->flags.online && ha->optrom_state == QLA_SWAITING)
  611. return_status = QLA_SUCCESS;
  612. else
  613. return_status = QLA_FUNCTION_FAILED;
  614. DEBUG2(printk("%s return_status=%d\n", __func__, return_status));
  615. return return_status;
  616. }
  617. int
  618. qla2x00_wait_for_chip_reset(scsi_qla_host_t *vha)
  619. {
  620. int return_status;
  621. unsigned long wait_reset;
  622. struct qla_hw_data *ha = vha->hw;
  623. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  624. wait_reset = jiffies + (MAX_LOOP_TIMEOUT * HZ);
  625. while (((test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags)) ||
  626. test_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags) ||
  627. test_bit(ISP_ABORT_RETRY, &base_vha->dpc_flags) ||
  628. ha->dpc_active) && time_before(jiffies, wait_reset)) {
  629. msleep(1000);
  630. if (!test_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags) &&
  631. ha->flags.chip_reset_done)
  632. break;
  633. }
  634. if (ha->flags.chip_reset_done)
  635. return_status = QLA_SUCCESS;
  636. else
  637. return_status = QLA_FUNCTION_FAILED;
  638. return return_status;
  639. }
  640. /*
  641. * qla2x00_wait_for_loop_ready
  642. * Wait for MAX_LOOP_TIMEOUT(5 min) value for loop
  643. * to be in LOOP_READY state.
  644. * Input:
  645. * ha - pointer to host adapter structure
  646. *
  647. * Note:
  648. * Does context switching-Release SPIN_LOCK
  649. * (if any) before calling this routine.
  650. *
  651. *
  652. * Return:
  653. * Success (LOOP_READY) : 0
  654. * Failed (LOOP_NOT_READY) : 1
  655. */
  656. static inline int
  657. qla2x00_wait_for_loop_ready(scsi_qla_host_t *vha)
  658. {
  659. int return_status = QLA_SUCCESS;
  660. unsigned long loop_timeout ;
  661. struct qla_hw_data *ha = vha->hw;
  662. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  663. /* wait for 5 min at the max for loop to be ready */
  664. loop_timeout = jiffies + (MAX_LOOP_TIMEOUT * HZ);
  665. while ((!atomic_read(&base_vha->loop_down_timer) &&
  666. atomic_read(&base_vha->loop_state) == LOOP_DOWN) ||
  667. atomic_read(&base_vha->loop_state) != LOOP_READY) {
  668. if (atomic_read(&base_vha->loop_state) == LOOP_DEAD) {
  669. return_status = QLA_FUNCTION_FAILED;
  670. break;
  671. }
  672. msleep(1000);
  673. if (time_after_eq(jiffies, loop_timeout)) {
  674. return_status = QLA_FUNCTION_FAILED;
  675. break;
  676. }
  677. }
  678. return (return_status);
  679. }
  680. /**************************************************************************
  681. * qla2xxx_eh_abort
  682. *
  683. * Description:
  684. * The abort function will abort the specified command.
  685. *
  686. * Input:
  687. * cmd = Linux SCSI command packet to be aborted.
  688. *
  689. * Returns:
  690. * Either SUCCESS or FAILED.
  691. *
  692. * Note:
  693. * Only return FAILED if command not returned by firmware.
  694. **************************************************************************/
  695. static int
  696. qla2xxx_eh_abort(struct scsi_cmnd *cmd)
  697. {
  698. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  699. srb_t *sp;
  700. int ret, i;
  701. unsigned int id, lun;
  702. unsigned long serial;
  703. unsigned long flags;
  704. int wait = 0;
  705. struct qla_hw_data *ha = vha->hw;
  706. struct req_que *req = vha->req;
  707. srb_t *spt;
  708. fc_block_scsi_eh(cmd);
  709. if (!CMD_SP(cmd))
  710. return SUCCESS;
  711. ret = SUCCESS;
  712. id = cmd->device->id;
  713. lun = cmd->device->lun;
  714. serial = cmd->serial_number;
  715. spt = (srb_t *) CMD_SP(cmd);
  716. if (!spt)
  717. return SUCCESS;
  718. /* Check active list for command command. */
  719. spin_lock_irqsave(&ha->hardware_lock, flags);
  720. for (i = 1; i < MAX_OUTSTANDING_COMMANDS; i++) {
  721. sp = req->outstanding_cmds[i];
  722. if (sp == NULL)
  723. continue;
  724. if ((sp->ctx) && !(sp->flags & SRB_FCP_CMND_DMA_VALID) &&
  725. !IS_PROT_IO(sp))
  726. continue;
  727. if (sp->cmd != cmd)
  728. continue;
  729. DEBUG2(printk("%s(%ld): aborting sp %p from RISC."
  730. " pid=%ld.\n", __func__, vha->host_no, sp, serial));
  731. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  732. if (ha->isp_ops->abort_command(sp)) {
  733. DEBUG2(printk("%s(%ld): abort_command "
  734. "mbx failed.\n", __func__, vha->host_no));
  735. ret = FAILED;
  736. } else {
  737. DEBUG3(printk("%s(%ld): abort_command "
  738. "mbx success.\n", __func__, vha->host_no));
  739. wait = 1;
  740. }
  741. spin_lock_irqsave(&ha->hardware_lock, flags);
  742. break;
  743. }
  744. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  745. /* Wait for the command to be returned. */
  746. if (wait) {
  747. if (qla2x00_eh_wait_on_command(cmd) != QLA_SUCCESS) {
  748. qla_printk(KERN_ERR, ha,
  749. "scsi(%ld:%d:%d): Abort handler timed out -- %lx "
  750. "%x.\n", vha->host_no, id, lun, serial, ret);
  751. ret = FAILED;
  752. }
  753. }
  754. qla_printk(KERN_INFO, ha,
  755. "scsi(%ld:%d:%d): Abort command issued -- %d %lx %x.\n",
  756. vha->host_no, id, lun, wait, serial, ret);
  757. return ret;
  758. }
  759. enum nexus_wait_type {
  760. WAIT_HOST = 0,
  761. WAIT_TARGET,
  762. WAIT_LUN,
  763. };
  764. static int
  765. qla2x00_eh_wait_for_pending_commands(scsi_qla_host_t *vha, unsigned int t,
  766. unsigned int l, srb_t *sp, enum nexus_wait_type type)
  767. {
  768. int cnt, match, status;
  769. unsigned long flags;
  770. struct qla_hw_data *ha = vha->hw;
  771. struct req_que *req;
  772. status = QLA_SUCCESS;
  773. if (!sp)
  774. return status;
  775. spin_lock_irqsave(&ha->hardware_lock, flags);
  776. req = vha->req;
  777. for (cnt = 1; status == QLA_SUCCESS &&
  778. cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
  779. sp = req->outstanding_cmds[cnt];
  780. if (!sp)
  781. continue;
  782. if ((sp->ctx) && !IS_PROT_IO(sp))
  783. continue;
  784. if (vha->vp_idx != sp->fcport->vha->vp_idx)
  785. continue;
  786. match = 0;
  787. switch (type) {
  788. case WAIT_HOST:
  789. match = 1;
  790. break;
  791. case WAIT_TARGET:
  792. match = sp->cmd->device->id == t;
  793. break;
  794. case WAIT_LUN:
  795. match = (sp->cmd->device->id == t &&
  796. sp->cmd->device->lun == l);
  797. break;
  798. }
  799. if (!match)
  800. continue;
  801. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  802. status = qla2x00_eh_wait_on_command(sp->cmd);
  803. spin_lock_irqsave(&ha->hardware_lock, flags);
  804. }
  805. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  806. return status;
  807. }
  808. void qla82xx_wait_for_pending_commands(scsi_qla_host_t *vha)
  809. {
  810. int cnt;
  811. srb_t *sp;
  812. struct req_que *req = vha->req;
  813. DEBUG2(qla_printk(KERN_INFO, vha->hw,
  814. "Waiting for pending commands\n"));
  815. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
  816. sp = req->outstanding_cmds[cnt];
  817. if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0,
  818. sp, WAIT_HOST) == QLA_SUCCESS) {
  819. DEBUG2(qla_printk(KERN_INFO, vha->hw,
  820. "Done wait for pending commands\n"));
  821. }
  822. }
  823. }
  824. static char *reset_errors[] = {
  825. "HBA not online",
  826. "HBA not ready",
  827. "Task management failed",
  828. "Waiting for command completions",
  829. };
  830. static int
  831. __qla2xxx_eh_generic_reset(char *name, enum nexus_wait_type type,
  832. struct scsi_cmnd *cmd, int (*do_reset)(struct fc_port *, unsigned int, int))
  833. {
  834. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  835. fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
  836. int err;
  837. fc_block_scsi_eh(cmd);
  838. if (!fcport)
  839. return FAILED;
  840. qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET ISSUED.\n",
  841. vha->host_no, cmd->device->id, cmd->device->lun, name);
  842. err = 0;
  843. if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
  844. goto eh_reset_failed;
  845. err = 1;
  846. if (qla2x00_wait_for_loop_ready(vha) != QLA_SUCCESS)
  847. goto eh_reset_failed;
  848. err = 2;
  849. if (do_reset(fcport, cmd->device->lun, cmd->request->cpu + 1)
  850. != QLA_SUCCESS)
  851. goto eh_reset_failed;
  852. err = 3;
  853. if (qla2x00_eh_wait_for_pending_commands(vha, cmd->device->id,
  854. cmd->device->lun, (srb_t *) CMD_SP(cmd), type) != QLA_SUCCESS)
  855. goto eh_reset_failed;
  856. qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET SUCCEEDED.\n",
  857. vha->host_no, cmd->device->id, cmd->device->lun, name);
  858. return SUCCESS;
  859. eh_reset_failed:
  860. qla_printk(KERN_INFO, vha->hw, "scsi(%ld:%d:%d): %s RESET FAILED: %s.\n"
  861. , vha->host_no, cmd->device->id, cmd->device->lun, name,
  862. reset_errors[err]);
  863. return FAILED;
  864. }
  865. static int
  866. qla2xxx_eh_device_reset(struct scsi_cmnd *cmd)
  867. {
  868. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  869. struct qla_hw_data *ha = vha->hw;
  870. return __qla2xxx_eh_generic_reset("DEVICE", WAIT_LUN, cmd,
  871. ha->isp_ops->lun_reset);
  872. }
  873. static int
  874. qla2xxx_eh_target_reset(struct scsi_cmnd *cmd)
  875. {
  876. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  877. struct qla_hw_data *ha = vha->hw;
  878. return __qla2xxx_eh_generic_reset("TARGET", WAIT_TARGET, cmd,
  879. ha->isp_ops->target_reset);
  880. }
  881. /**************************************************************************
  882. * qla2xxx_eh_bus_reset
  883. *
  884. * Description:
  885. * The bus reset function will reset the bus and abort any executing
  886. * commands.
  887. *
  888. * Input:
  889. * cmd = Linux SCSI command packet of the command that cause the
  890. * bus reset.
  891. *
  892. * Returns:
  893. * SUCCESS/FAILURE (defined as macro in scsi.h).
  894. *
  895. **************************************************************************/
  896. static int
  897. qla2xxx_eh_bus_reset(struct scsi_cmnd *cmd)
  898. {
  899. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  900. fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
  901. int ret = FAILED;
  902. unsigned int id, lun;
  903. unsigned long serial;
  904. srb_t *sp = (srb_t *) CMD_SP(cmd);
  905. fc_block_scsi_eh(cmd);
  906. id = cmd->device->id;
  907. lun = cmd->device->lun;
  908. serial = cmd->serial_number;
  909. if (!fcport)
  910. return ret;
  911. qla_printk(KERN_INFO, vha->hw,
  912. "scsi(%ld:%d:%d): BUS RESET ISSUED.\n", vha->host_no, id, lun);
  913. if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS) {
  914. DEBUG2(printk("%s failed:board disabled\n",__func__));
  915. goto eh_bus_reset_done;
  916. }
  917. if (qla2x00_wait_for_loop_ready(vha) == QLA_SUCCESS) {
  918. if (qla2x00_loop_reset(vha) == QLA_SUCCESS)
  919. ret = SUCCESS;
  920. }
  921. if (ret == FAILED)
  922. goto eh_bus_reset_done;
  923. /* Flush outstanding commands. */
  924. if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, sp, WAIT_HOST) !=
  925. QLA_SUCCESS)
  926. ret = FAILED;
  927. eh_bus_reset_done:
  928. qla_printk(KERN_INFO, vha->hw, "%s: reset %s\n", __func__,
  929. (ret == FAILED) ? "failed" : "succeded");
  930. return ret;
  931. }
  932. /**************************************************************************
  933. * qla2xxx_eh_host_reset
  934. *
  935. * Description:
  936. * The reset function will reset the Adapter.
  937. *
  938. * Input:
  939. * cmd = Linux SCSI command packet of the command that cause the
  940. * adapter reset.
  941. *
  942. * Returns:
  943. * Either SUCCESS or FAILED.
  944. *
  945. * Note:
  946. **************************************************************************/
  947. static int
  948. qla2xxx_eh_host_reset(struct scsi_cmnd *cmd)
  949. {
  950. scsi_qla_host_t *vha = shost_priv(cmd->device->host);
  951. fc_port_t *fcport = (struct fc_port *) cmd->device->hostdata;
  952. struct qla_hw_data *ha = vha->hw;
  953. int ret = FAILED;
  954. unsigned int id, lun;
  955. unsigned long serial;
  956. srb_t *sp = (srb_t *) CMD_SP(cmd);
  957. scsi_qla_host_t *base_vha = pci_get_drvdata(ha->pdev);
  958. fc_block_scsi_eh(cmd);
  959. id = cmd->device->id;
  960. lun = cmd->device->lun;
  961. serial = cmd->serial_number;
  962. if (!fcport)
  963. return ret;
  964. qla_printk(KERN_INFO, ha,
  965. "scsi(%ld:%d:%d): ADAPTER RESET ISSUED.\n", vha->host_no, id, lun);
  966. if (qla2x00_wait_for_reset_ready(vha) != QLA_SUCCESS)
  967. goto eh_host_reset_lock;
  968. /*
  969. * Fixme-may be dpc thread is active and processing
  970. * loop_resync,so wait a while for it to
  971. * be completed and then issue big hammer.Otherwise
  972. * it may cause I/O failure as big hammer marks the
  973. * devices as lost kicking of the port_down_timer
  974. * while dpc is stuck for the mailbox to complete.
  975. */
  976. qla2x00_wait_for_loop_ready(vha);
  977. if (vha != base_vha) {
  978. if (qla2x00_vp_abort_isp(vha))
  979. goto eh_host_reset_lock;
  980. } else {
  981. if (IS_QLA82XX(vha->hw)) {
  982. if (!qla82xx_fcoe_ctx_reset(vha)) {
  983. /* Ctx reset success */
  984. ret = SUCCESS;
  985. goto eh_host_reset_lock;
  986. }
  987. /* fall thru if ctx reset failed */
  988. }
  989. if (ha->wq)
  990. flush_workqueue(ha->wq);
  991. set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  992. if (ha->isp_ops->abort_isp(base_vha)) {
  993. clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  994. /* failed. schedule dpc to try */
  995. set_bit(ISP_ABORT_NEEDED, &base_vha->dpc_flags);
  996. if (qla2x00_wait_for_hba_online(vha) != QLA_SUCCESS)
  997. goto eh_host_reset_lock;
  998. }
  999. clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  1000. }
  1001. /* Waiting for command to be returned to OS.*/
  1002. if (qla2x00_eh_wait_for_pending_commands(vha, 0, 0, sp, WAIT_HOST) ==
  1003. QLA_SUCCESS)
  1004. ret = SUCCESS;
  1005. eh_host_reset_lock:
  1006. qla_printk(KERN_INFO, ha, "%s: reset %s\n", __func__,
  1007. (ret == FAILED) ? "failed" : "succeded");
  1008. return ret;
  1009. }
  1010. /*
  1011. * qla2x00_loop_reset
  1012. * Issue loop reset.
  1013. *
  1014. * Input:
  1015. * ha = adapter block pointer.
  1016. *
  1017. * Returns:
  1018. * 0 = success
  1019. */
  1020. int
  1021. qla2x00_loop_reset(scsi_qla_host_t *vha)
  1022. {
  1023. int ret;
  1024. struct fc_port *fcport;
  1025. struct qla_hw_data *ha = vha->hw;
  1026. if (ha->flags.enable_target_reset) {
  1027. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  1028. if (fcport->port_type != FCT_TARGET)
  1029. continue;
  1030. ret = ha->isp_ops->target_reset(fcport, 0, 0);
  1031. if (ret != QLA_SUCCESS) {
  1032. DEBUG2_3(printk("%s(%ld): bus_reset failed: "
  1033. "target_reset=%d d_id=%x.\n", __func__,
  1034. vha->host_no, ret, fcport->d_id.b24));
  1035. }
  1036. }
  1037. }
  1038. if (ha->flags.enable_lip_full_login && !IS_QLA8XXX_TYPE(ha)) {
  1039. ret = qla2x00_full_login_lip(vha);
  1040. if (ret != QLA_SUCCESS) {
  1041. DEBUG2_3(printk("%s(%ld): failed: "
  1042. "full_login_lip=%d.\n", __func__, vha->host_no,
  1043. ret));
  1044. }
  1045. atomic_set(&vha->loop_state, LOOP_DOWN);
  1046. atomic_set(&vha->loop_down_timer, LOOP_DOWN_TIME);
  1047. qla2x00_mark_all_devices_lost(vha, 0);
  1048. qla2x00_wait_for_loop_ready(vha);
  1049. }
  1050. if (ha->flags.enable_lip_reset) {
  1051. ret = qla2x00_lip_reset(vha);
  1052. if (ret != QLA_SUCCESS) {
  1053. DEBUG2_3(printk("%s(%ld): failed: "
  1054. "lip_reset=%d.\n", __func__, vha->host_no, ret));
  1055. } else
  1056. qla2x00_wait_for_loop_ready(vha);
  1057. }
  1058. /* Issue marker command only when we are going to start the I/O */
  1059. vha->marker_needed = 1;
  1060. return QLA_SUCCESS;
  1061. }
  1062. void
  1063. qla2x00_abort_all_cmds(scsi_qla_host_t *vha, int res)
  1064. {
  1065. int que, cnt;
  1066. unsigned long flags;
  1067. srb_t *sp;
  1068. struct srb_ctx *ctx;
  1069. struct qla_hw_data *ha = vha->hw;
  1070. struct req_que *req;
  1071. spin_lock_irqsave(&ha->hardware_lock, flags);
  1072. for (que = 0; que < ha->max_req_queues; que++) {
  1073. req = ha->req_q_map[que];
  1074. if (!req)
  1075. continue;
  1076. for (cnt = 1; cnt < MAX_OUTSTANDING_COMMANDS; cnt++) {
  1077. sp = req->outstanding_cmds[cnt];
  1078. if (sp) {
  1079. req->outstanding_cmds[cnt] = NULL;
  1080. if (!sp->ctx ||
  1081. (sp->flags & SRB_FCP_CMND_DMA_VALID) ||
  1082. IS_PROT_IO(sp)) {
  1083. sp->cmd->result = res;
  1084. qla2x00_sp_compl(ha, sp);
  1085. } else {
  1086. ctx = sp->ctx;
  1087. if (ctx->type == SRB_LOGIN_CMD ||
  1088. ctx->type == SRB_LOGOUT_CMD) {
  1089. ctx->u.iocb_cmd->free(sp);
  1090. } else {
  1091. struct fc_bsg_job *bsg_job =
  1092. ctx->u.bsg_job;
  1093. if (bsg_job->request->msgcode
  1094. == FC_BSG_HST_CT)
  1095. kfree(sp->fcport);
  1096. bsg_job->req->errors = 0;
  1097. bsg_job->reply->result = res;
  1098. bsg_job->job_done(bsg_job);
  1099. kfree(sp->ctx);
  1100. mempool_free(sp,
  1101. ha->srb_mempool);
  1102. }
  1103. }
  1104. }
  1105. }
  1106. }
  1107. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1108. }
  1109. static int
  1110. qla2xxx_slave_alloc(struct scsi_device *sdev)
  1111. {
  1112. struct fc_rport *rport = starget_to_rport(scsi_target(sdev));
  1113. if (!rport || fc_remote_port_chkready(rport))
  1114. return -ENXIO;
  1115. sdev->hostdata = *(fc_port_t **)rport->dd_data;
  1116. return 0;
  1117. }
  1118. static int
  1119. qla2xxx_slave_configure(struct scsi_device *sdev)
  1120. {
  1121. scsi_qla_host_t *vha = shost_priv(sdev->host);
  1122. struct qla_hw_data *ha = vha->hw;
  1123. struct fc_rport *rport = starget_to_rport(sdev->sdev_target);
  1124. struct req_que *req = vha->req;
  1125. if (sdev->tagged_supported)
  1126. scsi_activate_tcq(sdev, req->max_q_depth);
  1127. else
  1128. scsi_deactivate_tcq(sdev, req->max_q_depth);
  1129. rport->dev_loss_tmo = ha->port_down_retry_count;
  1130. return 0;
  1131. }
  1132. static void
  1133. qla2xxx_slave_destroy(struct scsi_device *sdev)
  1134. {
  1135. sdev->hostdata = NULL;
  1136. }
  1137. static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth)
  1138. {
  1139. fc_port_t *fcport = (struct fc_port *) sdev->hostdata;
  1140. if (!scsi_track_queue_full(sdev, qdepth))
  1141. return;
  1142. DEBUG2(qla_printk(KERN_INFO, fcport->vha->hw,
  1143. "scsi(%ld:%d:%d:%d): Queue depth adjusted-down to %d.\n",
  1144. fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
  1145. sdev->queue_depth));
  1146. }
  1147. static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth)
  1148. {
  1149. fc_port_t *fcport = sdev->hostdata;
  1150. struct scsi_qla_host *vha = fcport->vha;
  1151. struct qla_hw_data *ha = vha->hw;
  1152. struct req_que *req = NULL;
  1153. req = vha->req;
  1154. if (!req)
  1155. return;
  1156. if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth)
  1157. return;
  1158. if (sdev->ordered_tags)
  1159. scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth);
  1160. else
  1161. scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth);
  1162. DEBUG2(qla_printk(KERN_INFO, ha,
  1163. "scsi(%ld:%d:%d:%d): Queue depth adjusted-up to %d.\n",
  1164. fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun,
  1165. sdev->queue_depth));
  1166. }
  1167. static int
  1168. qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason)
  1169. {
  1170. switch (reason) {
  1171. case SCSI_QDEPTH_DEFAULT:
  1172. scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth);
  1173. break;
  1174. case SCSI_QDEPTH_QFULL:
  1175. qla2x00_handle_queue_full(sdev, qdepth);
  1176. break;
  1177. case SCSI_QDEPTH_RAMP_UP:
  1178. qla2x00_adjust_sdev_qdepth_up(sdev, qdepth);
  1179. break;
  1180. default:
  1181. return -EOPNOTSUPP;
  1182. }
  1183. return sdev->queue_depth;
  1184. }
  1185. static int
  1186. qla2x00_change_queue_type(struct scsi_device *sdev, int tag_type)
  1187. {
  1188. if (sdev->tagged_supported) {
  1189. scsi_set_tag_type(sdev, tag_type);
  1190. if (tag_type)
  1191. scsi_activate_tcq(sdev, sdev->queue_depth);
  1192. else
  1193. scsi_deactivate_tcq(sdev, sdev->queue_depth);
  1194. } else
  1195. tag_type = 0;
  1196. return tag_type;
  1197. }
  1198. /**
  1199. * qla2x00_config_dma_addressing() - Configure OS DMA addressing method.
  1200. * @ha: HA context
  1201. *
  1202. * At exit, the @ha's flags.enable_64bit_addressing set to indicated
  1203. * supported addressing method.
  1204. */
  1205. static void
  1206. qla2x00_config_dma_addressing(struct qla_hw_data *ha)
  1207. {
  1208. /* Assume a 32bit DMA mask. */
  1209. ha->flags.enable_64bit_addressing = 0;
  1210. if (!dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(64))) {
  1211. /* Any upper-dword bits set? */
  1212. if (MSD(dma_get_required_mask(&ha->pdev->dev)) &&
  1213. !pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(64))) {
  1214. /* Ok, a 64bit DMA mask is applicable. */
  1215. ha->flags.enable_64bit_addressing = 1;
  1216. ha->isp_ops->calc_req_entries = qla2x00_calc_iocbs_64;
  1217. ha->isp_ops->build_iocbs = qla2x00_build_scsi_iocbs_64;
  1218. return;
  1219. }
  1220. }
  1221. dma_set_mask(&ha->pdev->dev, DMA_BIT_MASK(32));
  1222. pci_set_consistent_dma_mask(ha->pdev, DMA_BIT_MASK(32));
  1223. }
  1224. static void
  1225. qla2x00_enable_intrs(struct qla_hw_data *ha)
  1226. {
  1227. unsigned long flags = 0;
  1228. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1229. spin_lock_irqsave(&ha->hardware_lock, flags);
  1230. ha->interrupts_on = 1;
  1231. /* enable risc and host interrupts */
  1232. WRT_REG_WORD(&reg->ictrl, ICR_EN_INT | ICR_EN_RISC);
  1233. RD_REG_WORD(&reg->ictrl);
  1234. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1235. }
  1236. static void
  1237. qla2x00_disable_intrs(struct qla_hw_data *ha)
  1238. {
  1239. unsigned long flags = 0;
  1240. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  1241. spin_lock_irqsave(&ha->hardware_lock, flags);
  1242. ha->interrupts_on = 0;
  1243. /* disable risc and host interrupts */
  1244. WRT_REG_WORD(&reg->ictrl, 0);
  1245. RD_REG_WORD(&reg->ictrl);
  1246. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1247. }
  1248. static void
  1249. qla24xx_enable_intrs(struct qla_hw_data *ha)
  1250. {
  1251. unsigned long flags = 0;
  1252. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  1253. spin_lock_irqsave(&ha->hardware_lock, flags);
  1254. ha->interrupts_on = 1;
  1255. WRT_REG_DWORD(&reg->ictrl, ICRX_EN_RISC_INT);
  1256. RD_REG_DWORD(&reg->ictrl);
  1257. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1258. }
  1259. static void
  1260. qla24xx_disable_intrs(struct qla_hw_data *ha)
  1261. {
  1262. unsigned long flags = 0;
  1263. struct device_reg_24xx __iomem *reg = &ha->iobase->isp24;
  1264. if (IS_NOPOLLING_TYPE(ha))
  1265. return;
  1266. spin_lock_irqsave(&ha->hardware_lock, flags);
  1267. ha->interrupts_on = 0;
  1268. WRT_REG_DWORD(&reg->ictrl, 0);
  1269. RD_REG_DWORD(&reg->ictrl);
  1270. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  1271. }
  1272. static struct isp_operations qla2100_isp_ops = {
  1273. .pci_config = qla2100_pci_config,
  1274. .reset_chip = qla2x00_reset_chip,
  1275. .chip_diag = qla2x00_chip_diag,
  1276. .config_rings = qla2x00_config_rings,
  1277. .reset_adapter = qla2x00_reset_adapter,
  1278. .nvram_config = qla2x00_nvram_config,
  1279. .update_fw_options = qla2x00_update_fw_options,
  1280. .load_risc = qla2x00_load_risc,
  1281. .pci_info_str = qla2x00_pci_info_str,
  1282. .fw_version_str = qla2x00_fw_version_str,
  1283. .intr_handler = qla2100_intr_handler,
  1284. .enable_intrs = qla2x00_enable_intrs,
  1285. .disable_intrs = qla2x00_disable_intrs,
  1286. .abort_command = qla2x00_abort_command,
  1287. .target_reset = qla2x00_abort_target,
  1288. .lun_reset = qla2x00_lun_reset,
  1289. .fabric_login = qla2x00_login_fabric,
  1290. .fabric_logout = qla2x00_fabric_logout,
  1291. .calc_req_entries = qla2x00_calc_iocbs_32,
  1292. .build_iocbs = qla2x00_build_scsi_iocbs_32,
  1293. .prep_ms_iocb = qla2x00_prep_ms_iocb,
  1294. .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
  1295. .read_nvram = qla2x00_read_nvram_data,
  1296. .write_nvram = qla2x00_write_nvram_data,
  1297. .fw_dump = qla2100_fw_dump,
  1298. .beacon_on = NULL,
  1299. .beacon_off = NULL,
  1300. .beacon_blink = NULL,
  1301. .read_optrom = qla2x00_read_optrom_data,
  1302. .write_optrom = qla2x00_write_optrom_data,
  1303. .get_flash_version = qla2x00_get_flash_version,
  1304. .start_scsi = qla2x00_start_scsi,
  1305. .abort_isp = qla2x00_abort_isp,
  1306. };
  1307. static struct isp_operations qla2300_isp_ops = {
  1308. .pci_config = qla2300_pci_config,
  1309. .reset_chip = qla2x00_reset_chip,
  1310. .chip_diag = qla2x00_chip_diag,
  1311. .config_rings = qla2x00_config_rings,
  1312. .reset_adapter = qla2x00_reset_adapter,
  1313. .nvram_config = qla2x00_nvram_config,
  1314. .update_fw_options = qla2x00_update_fw_options,
  1315. .load_risc = qla2x00_load_risc,
  1316. .pci_info_str = qla2x00_pci_info_str,
  1317. .fw_version_str = qla2x00_fw_version_str,
  1318. .intr_handler = qla2300_intr_handler,
  1319. .enable_intrs = qla2x00_enable_intrs,
  1320. .disable_intrs = qla2x00_disable_intrs,
  1321. .abort_command = qla2x00_abort_command,
  1322. .target_reset = qla2x00_abort_target,
  1323. .lun_reset = qla2x00_lun_reset,
  1324. .fabric_login = qla2x00_login_fabric,
  1325. .fabric_logout = qla2x00_fabric_logout,
  1326. .calc_req_entries = qla2x00_calc_iocbs_32,
  1327. .build_iocbs = qla2x00_build_scsi_iocbs_32,
  1328. .prep_ms_iocb = qla2x00_prep_ms_iocb,
  1329. .prep_ms_fdmi_iocb = qla2x00_prep_ms_fdmi_iocb,
  1330. .read_nvram = qla2x00_read_nvram_data,
  1331. .write_nvram = qla2x00_write_nvram_data,
  1332. .fw_dump = qla2300_fw_dump,
  1333. .beacon_on = qla2x00_beacon_on,
  1334. .beacon_off = qla2x00_beacon_off,
  1335. .beacon_blink = qla2x00_beacon_blink,
  1336. .read_optrom = qla2x00_read_optrom_data,
  1337. .write_optrom = qla2x00_write_optrom_data,
  1338. .get_flash_version = qla2x00_get_flash_version,
  1339. .start_scsi = qla2x00_start_scsi,
  1340. .abort_isp = qla2x00_abort_isp,
  1341. };
  1342. static struct isp_operations qla24xx_isp_ops = {
  1343. .pci_config = qla24xx_pci_config,
  1344. .reset_chip = qla24xx_reset_chip,
  1345. .chip_diag = qla24xx_chip_diag,
  1346. .config_rings = qla24xx_config_rings,
  1347. .reset_adapter = qla24xx_reset_adapter,
  1348. .nvram_config = qla24xx_nvram_config,
  1349. .update_fw_options = qla24xx_update_fw_options,
  1350. .load_risc = qla24xx_load_risc,
  1351. .pci_info_str = qla24xx_pci_info_str,
  1352. .fw_version_str = qla24xx_fw_version_str,
  1353. .intr_handler = qla24xx_intr_handler,
  1354. .enable_intrs = qla24xx_enable_intrs,
  1355. .disable_intrs = qla24xx_disable_intrs,
  1356. .abort_command = qla24xx_abort_command,
  1357. .target_reset = qla24xx_abort_target,
  1358. .lun_reset = qla24xx_lun_reset,
  1359. .fabric_login = qla24xx_login_fabric,
  1360. .fabric_logout = qla24xx_fabric_logout,
  1361. .calc_req_entries = NULL,
  1362. .build_iocbs = NULL,
  1363. .prep_ms_iocb = qla24xx_prep_ms_iocb,
  1364. .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
  1365. .read_nvram = qla24xx_read_nvram_data,
  1366. .write_nvram = qla24xx_write_nvram_data,
  1367. .fw_dump = qla24xx_fw_dump,
  1368. .beacon_on = qla24xx_beacon_on,
  1369. .beacon_off = qla24xx_beacon_off,
  1370. .beacon_blink = qla24xx_beacon_blink,
  1371. .read_optrom = qla24xx_read_optrom_data,
  1372. .write_optrom = qla24xx_write_optrom_data,
  1373. .get_flash_version = qla24xx_get_flash_version,
  1374. .start_scsi = qla24xx_start_scsi,
  1375. .abort_isp = qla2x00_abort_isp,
  1376. };
  1377. static struct isp_operations qla25xx_isp_ops = {
  1378. .pci_config = qla25xx_pci_config,
  1379. .reset_chip = qla24xx_reset_chip,
  1380. .chip_diag = qla24xx_chip_diag,
  1381. .config_rings = qla24xx_config_rings,
  1382. .reset_adapter = qla24xx_reset_adapter,
  1383. .nvram_config = qla24xx_nvram_config,
  1384. .update_fw_options = qla24xx_update_fw_options,
  1385. .load_risc = qla24xx_load_risc,
  1386. .pci_info_str = qla24xx_pci_info_str,
  1387. .fw_version_str = qla24xx_fw_version_str,
  1388. .intr_handler = qla24xx_intr_handler,
  1389. .enable_intrs = qla24xx_enable_intrs,
  1390. .disable_intrs = qla24xx_disable_intrs,
  1391. .abort_command = qla24xx_abort_command,
  1392. .target_reset = qla24xx_abort_target,
  1393. .lun_reset = qla24xx_lun_reset,
  1394. .fabric_login = qla24xx_login_fabric,
  1395. .fabric_logout = qla24xx_fabric_logout,
  1396. .calc_req_entries = NULL,
  1397. .build_iocbs = NULL,
  1398. .prep_ms_iocb = qla24xx_prep_ms_iocb,
  1399. .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
  1400. .read_nvram = qla25xx_read_nvram_data,
  1401. .write_nvram = qla25xx_write_nvram_data,
  1402. .fw_dump = qla25xx_fw_dump,
  1403. .beacon_on = qla24xx_beacon_on,
  1404. .beacon_off = qla24xx_beacon_off,
  1405. .beacon_blink = qla24xx_beacon_blink,
  1406. .read_optrom = qla25xx_read_optrom_data,
  1407. .write_optrom = qla24xx_write_optrom_data,
  1408. .get_flash_version = qla24xx_get_flash_version,
  1409. .start_scsi = qla24xx_dif_start_scsi,
  1410. .abort_isp = qla2x00_abort_isp,
  1411. };
  1412. static struct isp_operations qla81xx_isp_ops = {
  1413. .pci_config = qla25xx_pci_config,
  1414. .reset_chip = qla24xx_reset_chip,
  1415. .chip_diag = qla24xx_chip_diag,
  1416. .config_rings = qla24xx_config_rings,
  1417. .reset_adapter = qla24xx_reset_adapter,
  1418. .nvram_config = qla81xx_nvram_config,
  1419. .update_fw_options = qla81xx_update_fw_options,
  1420. .load_risc = qla81xx_load_risc,
  1421. .pci_info_str = qla24xx_pci_info_str,
  1422. .fw_version_str = qla24xx_fw_version_str,
  1423. .intr_handler = qla24xx_intr_handler,
  1424. .enable_intrs = qla24xx_enable_intrs,
  1425. .disable_intrs = qla24xx_disable_intrs,
  1426. .abort_command = qla24xx_abort_command,
  1427. .target_reset = qla24xx_abort_target,
  1428. .lun_reset = qla24xx_lun_reset,
  1429. .fabric_login = qla24xx_login_fabric,
  1430. .fabric_logout = qla24xx_fabric_logout,
  1431. .calc_req_entries = NULL,
  1432. .build_iocbs = NULL,
  1433. .prep_ms_iocb = qla24xx_prep_ms_iocb,
  1434. .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
  1435. .read_nvram = NULL,
  1436. .write_nvram = NULL,
  1437. .fw_dump = qla81xx_fw_dump,
  1438. .beacon_on = qla24xx_beacon_on,
  1439. .beacon_off = qla24xx_beacon_off,
  1440. .beacon_blink = qla24xx_beacon_blink,
  1441. .read_optrom = qla25xx_read_optrom_data,
  1442. .write_optrom = qla24xx_write_optrom_data,
  1443. .get_flash_version = qla24xx_get_flash_version,
  1444. .start_scsi = qla24xx_start_scsi,
  1445. .abort_isp = qla2x00_abort_isp,
  1446. };
  1447. static struct isp_operations qla82xx_isp_ops = {
  1448. .pci_config = qla82xx_pci_config,
  1449. .reset_chip = qla82xx_reset_chip,
  1450. .chip_diag = qla24xx_chip_diag,
  1451. .config_rings = qla82xx_config_rings,
  1452. .reset_adapter = qla24xx_reset_adapter,
  1453. .nvram_config = qla81xx_nvram_config,
  1454. .update_fw_options = qla24xx_update_fw_options,
  1455. .load_risc = qla82xx_load_risc,
  1456. .pci_info_str = qla82xx_pci_info_str,
  1457. .fw_version_str = qla24xx_fw_version_str,
  1458. .intr_handler = qla82xx_intr_handler,
  1459. .enable_intrs = qla82xx_enable_intrs,
  1460. .disable_intrs = qla82xx_disable_intrs,
  1461. .abort_command = qla24xx_abort_command,
  1462. .target_reset = qla24xx_abort_target,
  1463. .lun_reset = qla24xx_lun_reset,
  1464. .fabric_login = qla24xx_login_fabric,
  1465. .fabric_logout = qla24xx_fabric_logout,
  1466. .calc_req_entries = NULL,
  1467. .build_iocbs = NULL,
  1468. .prep_ms_iocb = qla24xx_prep_ms_iocb,
  1469. .prep_ms_fdmi_iocb = qla24xx_prep_ms_fdmi_iocb,
  1470. .read_nvram = qla24xx_read_nvram_data,
  1471. .write_nvram = qla24xx_write_nvram_data,
  1472. .fw_dump = qla24xx_fw_dump,
  1473. .beacon_on = qla24xx_beacon_on,
  1474. .beacon_off = qla24xx_beacon_off,
  1475. .beacon_blink = qla24xx_beacon_blink,
  1476. .read_optrom = qla82xx_read_optrom_data,
  1477. .write_optrom = qla82xx_write_optrom_data,
  1478. .get_flash_version = qla24xx_get_flash_version,
  1479. .start_scsi = qla82xx_start_scsi,
  1480. .abort_isp = qla82xx_abort_isp,
  1481. };
  1482. static inline void
  1483. qla2x00_set_isp_flags(struct qla_hw_data *ha)
  1484. {
  1485. ha->device_type = DT_EXTENDED_IDS;
  1486. switch (ha->pdev->device) {
  1487. case PCI_DEVICE_ID_QLOGIC_ISP2100:
  1488. ha->device_type |= DT_ISP2100;
  1489. ha->device_type &= ~DT_EXTENDED_IDS;
  1490. ha->fw_srisc_address = RISC_START_ADDRESS_2100;
  1491. break;
  1492. case PCI_DEVICE_ID_QLOGIC_ISP2200:
  1493. ha->device_type |= DT_ISP2200;
  1494. ha->device_type &= ~DT_EXTENDED_IDS;
  1495. ha->fw_srisc_address = RISC_START_ADDRESS_2100;
  1496. break;
  1497. case PCI_DEVICE_ID_QLOGIC_ISP2300:
  1498. ha->device_type |= DT_ISP2300;
  1499. ha->device_type |= DT_ZIO_SUPPORTED;
  1500. ha->fw_srisc_address = RISC_START_ADDRESS_2300;
  1501. break;
  1502. case PCI_DEVICE_ID_QLOGIC_ISP2312:
  1503. ha->device_type |= DT_ISP2312;
  1504. ha->device_type |= DT_ZIO_SUPPORTED;
  1505. ha->fw_srisc_address = RISC_START_ADDRESS_2300;
  1506. break;
  1507. case PCI_DEVICE_ID_QLOGIC_ISP2322:
  1508. ha->device_type |= DT_ISP2322;
  1509. ha->device_type |= DT_ZIO_SUPPORTED;
  1510. if (ha->pdev->subsystem_vendor == 0x1028 &&
  1511. ha->pdev->subsystem_device == 0x0170)
  1512. ha->device_type |= DT_OEM_001;
  1513. ha->fw_srisc_address = RISC_START_ADDRESS_2300;
  1514. break;
  1515. case PCI_DEVICE_ID_QLOGIC_ISP6312:
  1516. ha->device_type |= DT_ISP6312;
  1517. ha->fw_srisc_address = RISC_START_ADDRESS_2300;
  1518. break;
  1519. case PCI_DEVICE_ID_QLOGIC_ISP6322:
  1520. ha->device_type |= DT_ISP6322;
  1521. ha->fw_srisc_address = RISC_START_ADDRESS_2300;
  1522. break;
  1523. case PCI_DEVICE_ID_QLOGIC_ISP2422:
  1524. ha->device_type |= DT_ISP2422;
  1525. ha->device_type |= DT_ZIO_SUPPORTED;
  1526. ha->device_type |= DT_FWI2;
  1527. ha->device_type |= DT_IIDMA;
  1528. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1529. break;
  1530. case PCI_DEVICE_ID_QLOGIC_ISP2432:
  1531. ha->device_type |= DT_ISP2432;
  1532. ha->device_type |= DT_ZIO_SUPPORTED;
  1533. ha->device_type |= DT_FWI2;
  1534. ha->device_type |= DT_IIDMA;
  1535. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1536. break;
  1537. case PCI_DEVICE_ID_QLOGIC_ISP8432:
  1538. ha->device_type |= DT_ISP8432;
  1539. ha->device_type |= DT_ZIO_SUPPORTED;
  1540. ha->device_type |= DT_FWI2;
  1541. ha->device_type |= DT_IIDMA;
  1542. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1543. break;
  1544. case PCI_DEVICE_ID_QLOGIC_ISP5422:
  1545. ha->device_type |= DT_ISP5422;
  1546. ha->device_type |= DT_FWI2;
  1547. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1548. break;
  1549. case PCI_DEVICE_ID_QLOGIC_ISP5432:
  1550. ha->device_type |= DT_ISP5432;
  1551. ha->device_type |= DT_FWI2;
  1552. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1553. break;
  1554. case PCI_DEVICE_ID_QLOGIC_ISP2532:
  1555. ha->device_type |= DT_ISP2532;
  1556. ha->device_type |= DT_ZIO_SUPPORTED;
  1557. ha->device_type |= DT_FWI2;
  1558. ha->device_type |= DT_IIDMA;
  1559. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1560. break;
  1561. case PCI_DEVICE_ID_QLOGIC_ISP8001:
  1562. ha->device_type |= DT_ISP8001;
  1563. ha->device_type |= DT_ZIO_SUPPORTED;
  1564. ha->device_type |= DT_FWI2;
  1565. ha->device_type |= DT_IIDMA;
  1566. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1567. break;
  1568. case PCI_DEVICE_ID_QLOGIC_ISP8021:
  1569. ha->device_type |= DT_ISP8021;
  1570. ha->device_type |= DT_ZIO_SUPPORTED;
  1571. ha->device_type |= DT_FWI2;
  1572. ha->fw_srisc_address = RISC_START_ADDRESS_2400;
  1573. /* Initialize 82XX ISP flags */
  1574. qla82xx_init_flags(ha);
  1575. break;
  1576. }
  1577. if (IS_QLA82XX(ha))
  1578. ha->port_no = !(ha->portnum & 1);
  1579. else
  1580. /* Get adapter physical port no from interrupt pin register. */
  1581. pci_read_config_byte(ha->pdev, PCI_INTERRUPT_PIN, &ha->port_no);
  1582. if (ha->port_no & 1)
  1583. ha->flags.port0 = 1;
  1584. else
  1585. ha->flags.port0 = 0;
  1586. }
  1587. static int
  1588. qla2x00_iospace_config(struct qla_hw_data *ha)
  1589. {
  1590. resource_size_t pio;
  1591. uint16_t msix;
  1592. int cpus;
  1593. if (IS_QLA82XX(ha))
  1594. return qla82xx_iospace_config(ha);
  1595. if (pci_request_selected_regions(ha->pdev, ha->bars,
  1596. QLA2XXX_DRIVER_NAME)) {
  1597. qla_printk(KERN_WARNING, ha,
  1598. "Failed to reserve PIO/MMIO regions (%s)\n",
  1599. pci_name(ha->pdev));
  1600. goto iospace_error_exit;
  1601. }
  1602. if (!(ha->bars & 1))
  1603. goto skip_pio;
  1604. /* We only need PIO for Flash operations on ISP2312 v2 chips. */
  1605. pio = pci_resource_start(ha->pdev, 0);
  1606. if (pci_resource_flags(ha->pdev, 0) & IORESOURCE_IO) {
  1607. if (pci_resource_len(ha->pdev, 0) < MIN_IOBASE_LEN) {
  1608. qla_printk(KERN_WARNING, ha,
  1609. "Invalid PCI I/O region size (%s)...\n",
  1610. pci_name(ha->pdev));
  1611. pio = 0;
  1612. }
  1613. } else {
  1614. qla_printk(KERN_WARNING, ha,
  1615. "region #0 not a PIO resource (%s)...\n",
  1616. pci_name(ha->pdev));
  1617. pio = 0;
  1618. }
  1619. ha->pio_address = pio;
  1620. skip_pio:
  1621. /* Use MMIO operations for all accesses. */
  1622. if (!(pci_resource_flags(ha->pdev, 1) & IORESOURCE_MEM)) {
  1623. qla_printk(KERN_ERR, ha,
  1624. "region #1 not an MMIO resource (%s), aborting\n",
  1625. pci_name(ha->pdev));
  1626. goto iospace_error_exit;
  1627. }
  1628. if (pci_resource_len(ha->pdev, 1) < MIN_IOBASE_LEN) {
  1629. qla_printk(KERN_ERR, ha,
  1630. "Invalid PCI mem region size (%s), aborting\n",
  1631. pci_name(ha->pdev));
  1632. goto iospace_error_exit;
  1633. }
  1634. ha->iobase = ioremap(pci_resource_start(ha->pdev, 1), MIN_IOBASE_LEN);
  1635. if (!ha->iobase) {
  1636. qla_printk(KERN_ERR, ha,
  1637. "cannot remap MMIO (%s), aborting\n", pci_name(ha->pdev));
  1638. goto iospace_error_exit;
  1639. }
  1640. /* Determine queue resources */
  1641. ha->max_req_queues = ha->max_rsp_queues = 1;
  1642. if ((ql2xmaxqueues <= 1 && !ql2xmultique_tag) ||
  1643. (ql2xmaxqueues > 1 && ql2xmultique_tag) ||
  1644. (!IS_QLA25XX(ha) && !IS_QLA81XX(ha)))
  1645. goto mqiobase_exit;
  1646. ha->mqiobase = ioremap(pci_resource_start(ha->pdev, 3),
  1647. pci_resource_len(ha->pdev, 3));
  1648. if (ha->mqiobase) {
  1649. /* Read MSIX vector size of the board */
  1650. pci_read_config_word(ha->pdev, QLA_PCI_MSIX_CONTROL, &msix);
  1651. ha->msix_count = msix;
  1652. /* Max queues are bounded by available msix vectors */
  1653. /* queue 0 uses two msix vectors */
  1654. if (ql2xmultique_tag) {
  1655. cpus = num_online_cpus();
  1656. ha->max_rsp_queues = (ha->msix_count - 1 > cpus) ?
  1657. (cpus + 1) : (ha->msix_count - 1);
  1658. ha->max_req_queues = 2;
  1659. } else if (ql2xmaxqueues > 1) {
  1660. ha->max_req_queues = ql2xmaxqueues > QLA_MQ_SIZE ?
  1661. QLA_MQ_SIZE : ql2xmaxqueues;
  1662. DEBUG2(qla_printk(KERN_INFO, ha, "QoS mode set, max no"
  1663. " of request queues:%d\n", ha->max_req_queues));
  1664. }
  1665. qla_printk(KERN_INFO, ha,
  1666. "MSI-X vector count: %d\n", msix);
  1667. } else
  1668. qla_printk(KERN_INFO, ha, "BAR 3 not enabled\n");
  1669. mqiobase_exit:
  1670. ha->msix_count = ha->max_rsp_queues + 1;
  1671. return (0);
  1672. iospace_error_exit:
  1673. return (-ENOMEM);
  1674. }
  1675. static void
  1676. qla2xxx_scan_start(struct Scsi_Host *shost)
  1677. {
  1678. scsi_qla_host_t *vha = shost_priv(shost);
  1679. if (vha->hw->flags.running_gold_fw)
  1680. return;
  1681. set_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags);
  1682. set_bit(LOCAL_LOOP_UPDATE, &vha->dpc_flags);
  1683. set_bit(RSCN_UPDATE, &vha->dpc_flags);
  1684. set_bit(NPIV_CONFIG_NEEDED, &vha->dpc_flags);
  1685. }
  1686. static int
  1687. qla2xxx_scan_finished(struct Scsi_Host *shost, unsigned long time)
  1688. {
  1689. scsi_qla_host_t *vha = shost_priv(shost);
  1690. if (!vha->host)
  1691. return 1;
  1692. if (time > vha->hw->loop_reset_delay * HZ)
  1693. return 1;
  1694. return atomic_read(&vha->loop_state) == LOOP_READY;
  1695. }
  1696. /*
  1697. * PCI driver interface
  1698. */
  1699. static int __devinit
  1700. qla2x00_probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
  1701. {
  1702. int ret = -ENODEV;
  1703. struct Scsi_Host *host;
  1704. scsi_qla_host_t *base_vha = NULL;
  1705. struct qla_hw_data *ha;
  1706. char pci_info[30];
  1707. char fw_str[30];
  1708. struct scsi_host_template *sht;
  1709. int bars, max_id, mem_only = 0;
  1710. uint16_t req_length = 0, rsp_length = 0;
  1711. struct req_que *req = NULL;
  1712. struct rsp_que *rsp = NULL;
  1713. bars = pci_select_bars(pdev, IORESOURCE_MEM | IORESOURCE_IO);
  1714. sht = &qla2xxx_driver_template;
  1715. if (pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2422 ||
  1716. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2432 ||
  1717. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8432 ||
  1718. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5422 ||
  1719. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP5432 ||
  1720. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP2532 ||
  1721. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8001 ||
  1722. pdev->device == PCI_DEVICE_ID_QLOGIC_ISP8021) {
  1723. bars = pci_select_bars(pdev, IORESOURCE_MEM);
  1724. mem_only = 1;
  1725. }
  1726. if (mem_only) {
  1727. if (pci_enable_device_mem(pdev))
  1728. goto probe_out;
  1729. } else {
  1730. if (pci_enable_device(pdev))
  1731. goto probe_out;
  1732. }
  1733. /* This may fail but that's ok */
  1734. pci_enable_pcie_error_reporting(pdev);
  1735. ha = kzalloc(sizeof(struct qla_hw_data), GFP_KERNEL);
  1736. if (!ha) {
  1737. DEBUG(printk("Unable to allocate memory for ha\n"));
  1738. goto probe_out;
  1739. }
  1740. ha->pdev = pdev;
  1741. /* Clear our data area */
  1742. ha->bars = bars;
  1743. ha->mem_only = mem_only;
  1744. spin_lock_init(&ha->hardware_lock);
  1745. /* Set ISP-type information. */
  1746. qla2x00_set_isp_flags(ha);
  1747. /* Set EEH reset type to fundamental if required by hba */
  1748. if ( IS_QLA24XX(ha) || IS_QLA25XX(ha) || IS_QLA81XX(ha)) {
  1749. pdev->needs_freset = 1;
  1750. }
  1751. /* Configure PCI I/O space */
  1752. ret = qla2x00_iospace_config(ha);
  1753. if (ret)
  1754. goto probe_hw_failed;
  1755. qla_printk(KERN_INFO, ha,
  1756. "Found an ISP%04X, irq %d, iobase 0x%p\n", pdev->device, pdev->irq,
  1757. ha->iobase);
  1758. ha->prev_topology = 0;
  1759. ha->init_cb_size = sizeof(init_cb_t);
  1760. ha->link_data_rate = PORT_SPEED_UNKNOWN;
  1761. ha->optrom_size = OPTROM_SIZE_2300;
  1762. /* Assign ISP specific operations. */
  1763. max_id = MAX_TARGETS_2200;
  1764. if (IS_QLA2100(ha)) {
  1765. max_id = MAX_TARGETS_2100;
  1766. ha->mbx_count = MAILBOX_REGISTER_COUNT_2100;
  1767. req_length = REQUEST_ENTRY_CNT_2100;
  1768. rsp_length = RESPONSE_ENTRY_CNT_2100;
  1769. ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
  1770. ha->gid_list_info_size = 4;
  1771. ha->flash_conf_off = ~0;
  1772. ha->flash_data_off = ~0;
  1773. ha->nvram_conf_off = ~0;
  1774. ha->nvram_data_off = ~0;
  1775. ha->isp_ops = &qla2100_isp_ops;
  1776. } else if (IS_QLA2200(ha)) {
  1777. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1778. req_length = REQUEST_ENTRY_CNT_2200;
  1779. rsp_length = RESPONSE_ENTRY_CNT_2100;
  1780. ha->max_loop_id = SNS_LAST_LOOP_ID_2100;
  1781. ha->gid_list_info_size = 4;
  1782. ha->flash_conf_off = ~0;
  1783. ha->flash_data_off = ~0;
  1784. ha->nvram_conf_off = ~0;
  1785. ha->nvram_data_off = ~0;
  1786. ha->isp_ops = &qla2100_isp_ops;
  1787. } else if (IS_QLA23XX(ha)) {
  1788. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1789. req_length = REQUEST_ENTRY_CNT_2200;
  1790. rsp_length = RESPONSE_ENTRY_CNT_2300;
  1791. ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
  1792. ha->gid_list_info_size = 6;
  1793. if (IS_QLA2322(ha) || IS_QLA6322(ha))
  1794. ha->optrom_size = OPTROM_SIZE_2322;
  1795. ha->flash_conf_off = ~0;
  1796. ha->flash_data_off = ~0;
  1797. ha->nvram_conf_off = ~0;
  1798. ha->nvram_data_off = ~0;
  1799. ha->isp_ops = &qla2300_isp_ops;
  1800. } else if (IS_QLA24XX_TYPE(ha)) {
  1801. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1802. req_length = REQUEST_ENTRY_CNT_24XX;
  1803. rsp_length = RESPONSE_ENTRY_CNT_2300;
  1804. ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
  1805. ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
  1806. ha->gid_list_info_size = 8;
  1807. ha->optrom_size = OPTROM_SIZE_24XX;
  1808. ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA24XX;
  1809. ha->isp_ops = &qla24xx_isp_ops;
  1810. ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
  1811. ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
  1812. ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
  1813. ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
  1814. } else if (IS_QLA25XX(ha)) {
  1815. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1816. req_length = REQUEST_ENTRY_CNT_24XX;
  1817. rsp_length = RESPONSE_ENTRY_CNT_2300;
  1818. ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
  1819. ha->init_cb_size = sizeof(struct mid_init_cb_24xx);
  1820. ha->gid_list_info_size = 8;
  1821. ha->optrom_size = OPTROM_SIZE_25XX;
  1822. ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
  1823. ha->isp_ops = &qla25xx_isp_ops;
  1824. ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
  1825. ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
  1826. ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
  1827. ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
  1828. } else if (IS_QLA81XX(ha)) {
  1829. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1830. req_length = REQUEST_ENTRY_CNT_24XX;
  1831. rsp_length = RESPONSE_ENTRY_CNT_2300;
  1832. ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
  1833. ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
  1834. ha->gid_list_info_size = 8;
  1835. ha->optrom_size = OPTROM_SIZE_81XX;
  1836. ha->nvram_npiv_size = QLA_MAX_VPORTS_QLA25XX;
  1837. ha->isp_ops = &qla81xx_isp_ops;
  1838. ha->flash_conf_off = FARX_ACCESS_FLASH_CONF_81XX;
  1839. ha->flash_data_off = FARX_ACCESS_FLASH_DATA_81XX;
  1840. ha->nvram_conf_off = ~0;
  1841. ha->nvram_data_off = ~0;
  1842. } else if (IS_QLA82XX(ha)) {
  1843. ha->mbx_count = MAILBOX_REGISTER_COUNT;
  1844. req_length = REQUEST_ENTRY_CNT_82XX;
  1845. rsp_length = RESPONSE_ENTRY_CNT_82XX;
  1846. ha->max_loop_id = SNS_LAST_LOOP_ID_2300;
  1847. ha->init_cb_size = sizeof(struct mid_init_cb_81xx);
  1848. ha->gid_list_info_size = 8;
  1849. ha->optrom_size = OPTROM_SIZE_82XX;
  1850. ha->isp_ops = &qla82xx_isp_ops;
  1851. ha->flash_conf_off = FARX_ACCESS_FLASH_CONF;
  1852. ha->flash_data_off = FARX_ACCESS_FLASH_DATA;
  1853. ha->nvram_conf_off = FARX_ACCESS_NVRAM_CONF;
  1854. ha->nvram_data_off = FARX_ACCESS_NVRAM_DATA;
  1855. }
  1856. mutex_init(&ha->vport_lock);
  1857. init_completion(&ha->mbx_cmd_comp);
  1858. complete(&ha->mbx_cmd_comp);
  1859. init_completion(&ha->mbx_intr_comp);
  1860. set_bit(0, (unsigned long *) ha->vp_idx_map);
  1861. qla2x00_config_dma_addressing(ha);
  1862. ret = qla2x00_mem_alloc(ha, req_length, rsp_length, &req, &rsp);
  1863. if (!ret) {
  1864. qla_printk(KERN_WARNING, ha,
  1865. "[ERROR] Failed to allocate memory for adapter\n");
  1866. goto probe_hw_failed;
  1867. }
  1868. req->max_q_depth = MAX_Q_DEPTH;
  1869. if (ql2xmaxqdepth != 0 && ql2xmaxqdepth <= 0xffffU)
  1870. req->max_q_depth = ql2xmaxqdepth;
  1871. base_vha = qla2x00_create_host(sht, ha);
  1872. if (!base_vha) {
  1873. qla_printk(KERN_WARNING, ha,
  1874. "[ERROR] Failed to allocate memory for scsi_host\n");
  1875. ret = -ENOMEM;
  1876. qla2x00_mem_free(ha);
  1877. qla2x00_free_req_que(ha, req);
  1878. qla2x00_free_rsp_que(ha, rsp);
  1879. goto probe_hw_failed;
  1880. }
  1881. pci_set_drvdata(pdev, base_vha);
  1882. host = base_vha->host;
  1883. base_vha->req = req;
  1884. host->can_queue = req->length + 128;
  1885. if (IS_QLA2XXX_MIDTYPE(ha))
  1886. base_vha->mgmt_svr_loop_id = 10 + base_vha->vp_idx;
  1887. else
  1888. base_vha->mgmt_svr_loop_id = MANAGEMENT_SERVER +
  1889. base_vha->vp_idx;
  1890. if (IS_QLA2100(ha))
  1891. host->sg_tablesize = 32;
  1892. host->max_id = max_id;
  1893. host->this_id = 255;
  1894. host->cmd_per_lun = 3;
  1895. host->unique_id = host->host_no;
  1896. host->max_cmd_len = MAX_CMDSZ;
  1897. host->max_channel = MAX_BUSES - 1;
  1898. host->max_lun = MAX_LUNS;
  1899. host->transportt = qla2xxx_transport_template;
  1900. sht->vendor_id = (SCSI_NL_VID_TYPE_PCI | PCI_VENDOR_ID_QLOGIC);
  1901. /* Set up the irqs */
  1902. ret = qla2x00_request_irqs(ha, rsp);
  1903. if (ret)
  1904. goto probe_init_failed;
  1905. pci_save_state(pdev);
  1906. /* Alloc arrays of request and response ring ptrs */
  1907. que_init:
  1908. if (!qla2x00_alloc_queues(ha)) {
  1909. qla_printk(KERN_WARNING, ha,
  1910. "[ERROR] Failed to allocate memory for queue"
  1911. " pointers\n");
  1912. goto probe_init_failed;
  1913. }
  1914. ha->rsp_q_map[0] = rsp;
  1915. ha->req_q_map[0] = req;
  1916. rsp->req = req;
  1917. req->rsp = rsp;
  1918. set_bit(0, ha->req_qid_map);
  1919. set_bit(0, ha->rsp_qid_map);
  1920. /* FWI2-capable only. */
  1921. req->req_q_in = &ha->iobase->isp24.req_q_in;
  1922. req->req_q_out = &ha->iobase->isp24.req_q_out;
  1923. rsp->rsp_q_in = &ha->iobase->isp24.rsp_q_in;
  1924. rsp->rsp_q_out = &ha->iobase->isp24.rsp_q_out;
  1925. if (ha->mqenable) {
  1926. req->req_q_in = &ha->mqiobase->isp25mq.req_q_in;
  1927. req->req_q_out = &ha->mqiobase->isp25mq.req_q_out;
  1928. rsp->rsp_q_in = &ha->mqiobase->isp25mq.rsp_q_in;
  1929. rsp->rsp_q_out = &ha->mqiobase->isp25mq.rsp_q_out;
  1930. }
  1931. if (IS_QLA82XX(ha)) {
  1932. req->req_q_out = &ha->iobase->isp82.req_q_out[0];
  1933. rsp->rsp_q_in = &ha->iobase->isp82.rsp_q_in[0];
  1934. rsp->rsp_q_out = &ha->iobase->isp82.rsp_q_out[0];
  1935. }
  1936. if (qla2x00_initialize_adapter(base_vha)) {
  1937. qla_printk(KERN_WARNING, ha,
  1938. "Failed to initialize adapter\n");
  1939. DEBUG2(printk("scsi(%ld): Failed to initialize adapter - "
  1940. "Adapter flags %x.\n",
  1941. base_vha->host_no, base_vha->device_flags));
  1942. if (IS_QLA82XX(ha)) {
  1943. qla82xx_idc_lock(ha);
  1944. qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
  1945. QLA82XX_DEV_FAILED);
  1946. qla82xx_idc_unlock(ha);
  1947. qla_printk(KERN_INFO, ha, "HW State: FAILED\n");
  1948. }
  1949. ret = -ENODEV;
  1950. goto probe_failed;
  1951. }
  1952. if (ha->mqenable) {
  1953. if (qla25xx_setup_mode(base_vha)) {
  1954. qla_printk(KERN_WARNING, ha,
  1955. "Can't create queues, falling back to single"
  1956. " queue mode\n");
  1957. goto que_init;
  1958. }
  1959. }
  1960. if (ha->flags.running_gold_fw)
  1961. goto skip_dpc;
  1962. /*
  1963. * Startup the kernel thread for this host adapter
  1964. */
  1965. ha->dpc_thread = kthread_create(qla2x00_do_dpc, ha,
  1966. "%s_dpc", base_vha->host_str);
  1967. if (IS_ERR(ha->dpc_thread)) {
  1968. qla_printk(KERN_WARNING, ha,
  1969. "Unable to start DPC thread!\n");
  1970. ret = PTR_ERR(ha->dpc_thread);
  1971. goto probe_failed;
  1972. }
  1973. skip_dpc:
  1974. list_add_tail(&base_vha->list, &ha->vp_list);
  1975. base_vha->host->irq = ha->pdev->irq;
  1976. /* Initialized the timer */
  1977. qla2x00_start_timer(base_vha, qla2x00_timer, WATCH_INTERVAL);
  1978. DEBUG2(printk("DEBUG: detect hba %ld at address = %p\n",
  1979. base_vha->host_no, ha));
  1980. if (IS_QLA25XX(ha) && ql2xenabledif) {
  1981. if (ha->fw_attributes & BIT_4) {
  1982. base_vha->flags.difdix_supported = 1;
  1983. DEBUG18(qla_printk(KERN_INFO, ha,
  1984. "Registering for DIF/DIX type 1 and 3"
  1985. " protection.\n"));
  1986. scsi_host_set_prot(host,
  1987. SHOST_DIF_TYPE1_PROTECTION
  1988. | SHOST_DIF_TYPE3_PROTECTION
  1989. | SHOST_DIX_TYPE1_PROTECTION
  1990. | SHOST_DIX_TYPE3_PROTECTION);
  1991. scsi_host_set_guard(host, SHOST_DIX_GUARD_CRC);
  1992. } else
  1993. base_vha->flags.difdix_supported = 0;
  1994. }
  1995. ha->isp_ops->enable_intrs(ha);
  1996. ret = scsi_add_host(host, &pdev->dev);
  1997. if (ret)
  1998. goto probe_failed;
  1999. base_vha->flags.init_done = 1;
  2000. base_vha->flags.online = 1;
  2001. scsi_scan_host(host);
  2002. qla2x00_alloc_sysfs_attr(base_vha);
  2003. qla2x00_init_host_attr(base_vha);
  2004. qla2x00_dfs_setup(base_vha);
  2005. qla_printk(KERN_INFO, ha, "\n"
  2006. " QLogic Fibre Channel HBA Driver: %s\n"
  2007. " QLogic %s - %s\n"
  2008. " ISP%04X: %s @ %s hdma%c, host#=%ld, fw=%s\n",
  2009. qla2x00_version_str, ha->model_number,
  2010. ha->model_desc ? ha->model_desc : "", pdev->device,
  2011. ha->isp_ops->pci_info_str(base_vha, pci_info), pci_name(pdev),
  2012. ha->flags.enable_64bit_addressing ? '+' : '-', base_vha->host_no,
  2013. ha->isp_ops->fw_version_str(base_vha, fw_str));
  2014. return 0;
  2015. probe_init_failed:
  2016. qla2x00_free_req_que(ha, req);
  2017. qla2x00_free_rsp_que(ha, rsp);
  2018. ha->max_req_queues = ha->max_rsp_queues = 0;
  2019. probe_failed:
  2020. if (base_vha->timer_active)
  2021. qla2x00_stop_timer(base_vha);
  2022. base_vha->flags.online = 0;
  2023. if (ha->dpc_thread) {
  2024. struct task_struct *t = ha->dpc_thread;
  2025. ha->dpc_thread = NULL;
  2026. kthread_stop(t);
  2027. }
  2028. qla2x00_free_device(base_vha);
  2029. scsi_host_put(base_vha->host);
  2030. probe_hw_failed:
  2031. if (IS_QLA82XX(ha)) {
  2032. qla82xx_idc_lock(ha);
  2033. qla82xx_clear_drv_active(ha);
  2034. qla82xx_idc_unlock(ha);
  2035. iounmap((device_reg_t __iomem *)ha->nx_pcibase);
  2036. if (!ql2xdbwr)
  2037. iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
  2038. } else {
  2039. if (ha->iobase)
  2040. iounmap(ha->iobase);
  2041. }
  2042. pci_release_selected_regions(ha->pdev, ha->bars);
  2043. kfree(ha);
  2044. ha = NULL;
  2045. probe_out:
  2046. pci_disable_device(pdev);
  2047. return ret;
  2048. }
  2049. static void
  2050. qla2x00_remove_one(struct pci_dev *pdev)
  2051. {
  2052. scsi_qla_host_t *base_vha, *vha, *temp;
  2053. struct qla_hw_data *ha;
  2054. base_vha = pci_get_drvdata(pdev);
  2055. ha = base_vha->hw;
  2056. list_for_each_entry_safe(vha, temp, &ha->vp_list, list) {
  2057. if (vha && vha->fc_vport)
  2058. fc_vport_terminate(vha->fc_vport);
  2059. }
  2060. set_bit(UNLOADING, &base_vha->dpc_flags);
  2061. qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
  2062. qla2x00_dfs_remove(base_vha);
  2063. qla84xx_put_chip(base_vha);
  2064. /* Disable timer */
  2065. if (base_vha->timer_active)
  2066. qla2x00_stop_timer(base_vha);
  2067. base_vha->flags.online = 0;
  2068. /* Flush the work queue and remove it */
  2069. if (ha->wq) {
  2070. flush_workqueue(ha->wq);
  2071. destroy_workqueue(ha->wq);
  2072. ha->wq = NULL;
  2073. }
  2074. /* Kill the kernel thread for this host */
  2075. if (ha->dpc_thread) {
  2076. struct task_struct *t = ha->dpc_thread;
  2077. /*
  2078. * qla2xxx_wake_dpc checks for ->dpc_thread
  2079. * so we need to zero it out.
  2080. */
  2081. ha->dpc_thread = NULL;
  2082. kthread_stop(t);
  2083. }
  2084. qla2x00_free_sysfs_attr(base_vha);
  2085. fc_remove_host(base_vha->host);
  2086. scsi_remove_host(base_vha->host);
  2087. qla2x00_free_device(base_vha);
  2088. scsi_host_put(base_vha->host);
  2089. if (IS_QLA82XX(ha)) {
  2090. iounmap((device_reg_t __iomem *)ha->nx_pcibase);
  2091. if (!ql2xdbwr)
  2092. iounmap((device_reg_t __iomem *)ha->nxdb_wr_ptr);
  2093. } else {
  2094. if (ha->iobase)
  2095. iounmap(ha->iobase);
  2096. if (ha->mqiobase)
  2097. iounmap(ha->mqiobase);
  2098. }
  2099. pci_release_selected_regions(ha->pdev, ha->bars);
  2100. kfree(ha);
  2101. ha = NULL;
  2102. pci_disable_pcie_error_reporting(pdev);
  2103. pci_disable_device(pdev);
  2104. pci_set_drvdata(pdev, NULL);
  2105. }
  2106. static void
  2107. qla2x00_free_device(scsi_qla_host_t *vha)
  2108. {
  2109. struct qla_hw_data *ha = vha->hw;
  2110. qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
  2111. /* Disable timer */
  2112. if (vha->timer_active)
  2113. qla2x00_stop_timer(vha);
  2114. /* Kill the kernel thread for this host */
  2115. if (ha->dpc_thread) {
  2116. struct task_struct *t = ha->dpc_thread;
  2117. /*
  2118. * qla2xxx_wake_dpc checks for ->dpc_thread
  2119. * so we need to zero it out.
  2120. */
  2121. ha->dpc_thread = NULL;
  2122. kthread_stop(t);
  2123. }
  2124. qla25xx_delete_queues(vha);
  2125. if (ha->flags.fce_enabled)
  2126. qla2x00_disable_fce_trace(vha, NULL, NULL);
  2127. if (ha->eft)
  2128. qla2x00_disable_eft_trace(vha);
  2129. /* Stop currently executing firmware. */
  2130. qla2x00_try_to_stop_firmware(vha);
  2131. vha->flags.online = 0;
  2132. /* turn-off interrupts on the card */
  2133. if (ha->interrupts_on) {
  2134. vha->flags.init_done = 0;
  2135. ha->isp_ops->disable_intrs(ha);
  2136. }
  2137. qla2x00_free_irqs(vha);
  2138. qla2x00_mem_free(ha);
  2139. qla2x00_free_queues(ha);
  2140. }
  2141. static inline void
  2142. qla2x00_schedule_rport_del(struct scsi_qla_host *vha, fc_port_t *fcport,
  2143. int defer)
  2144. {
  2145. struct fc_rport *rport;
  2146. scsi_qla_host_t *base_vha;
  2147. if (!fcport->rport)
  2148. return;
  2149. rport = fcport->rport;
  2150. if (defer) {
  2151. base_vha = pci_get_drvdata(vha->hw->pdev);
  2152. spin_lock_irq(vha->host->host_lock);
  2153. fcport->drport = rport;
  2154. spin_unlock_irq(vha->host->host_lock);
  2155. set_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
  2156. qla2xxx_wake_dpc(base_vha);
  2157. } else
  2158. fc_remote_port_delete(rport);
  2159. }
  2160. /*
  2161. * qla2x00_mark_device_lost Updates fcport state when device goes offline.
  2162. *
  2163. * Input: ha = adapter block pointer. fcport = port structure pointer.
  2164. *
  2165. * Return: None.
  2166. *
  2167. * Context:
  2168. */
  2169. void qla2x00_mark_device_lost(scsi_qla_host_t *vha, fc_port_t *fcport,
  2170. int do_login, int defer)
  2171. {
  2172. if (atomic_read(&fcport->state) == FCS_ONLINE &&
  2173. vha->vp_idx == fcport->vp_idx) {
  2174. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2175. qla2x00_schedule_rport_del(vha, fcport, defer);
  2176. }
  2177. /*
  2178. * We may need to retry the login, so don't change the state of the
  2179. * port but do the retries.
  2180. */
  2181. if (atomic_read(&fcport->state) != FCS_DEVICE_DEAD)
  2182. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2183. if (!do_login)
  2184. return;
  2185. if (fcport->login_retry == 0) {
  2186. fcport->login_retry = vha->hw->login_retry_count;
  2187. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  2188. DEBUG(printk("scsi(%ld): Port login retry: "
  2189. "%02x%02x%02x%02x%02x%02x%02x%02x, "
  2190. "id = 0x%04x retry cnt=%d\n",
  2191. vha->host_no,
  2192. fcport->port_name[0],
  2193. fcport->port_name[1],
  2194. fcport->port_name[2],
  2195. fcport->port_name[3],
  2196. fcport->port_name[4],
  2197. fcport->port_name[5],
  2198. fcport->port_name[6],
  2199. fcport->port_name[7],
  2200. fcport->loop_id,
  2201. fcport->login_retry));
  2202. }
  2203. }
  2204. /*
  2205. * qla2x00_mark_all_devices_lost
  2206. * Updates fcport state when device goes offline.
  2207. *
  2208. * Input:
  2209. * ha = adapter block pointer.
  2210. * fcport = port structure pointer.
  2211. *
  2212. * Return:
  2213. * None.
  2214. *
  2215. * Context:
  2216. */
  2217. void
  2218. qla2x00_mark_all_devices_lost(scsi_qla_host_t *vha, int defer)
  2219. {
  2220. fc_port_t *fcport;
  2221. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2222. if (vha->vp_idx != 0 && vha->vp_idx != fcport->vp_idx)
  2223. continue;
  2224. /*
  2225. * No point in marking the device as lost, if the device is
  2226. * already DEAD.
  2227. */
  2228. if (atomic_read(&fcport->state) == FCS_DEVICE_DEAD)
  2229. continue;
  2230. if (atomic_read(&fcport->state) == FCS_ONLINE) {
  2231. if (defer)
  2232. qla2x00_schedule_rport_del(vha, fcport, defer);
  2233. else if (vha->vp_idx == fcport->vp_idx)
  2234. qla2x00_schedule_rport_del(vha, fcport, defer);
  2235. }
  2236. atomic_set(&fcport->state, FCS_DEVICE_LOST);
  2237. }
  2238. }
  2239. /*
  2240. * qla2x00_mem_alloc
  2241. * Allocates adapter memory.
  2242. *
  2243. * Returns:
  2244. * 0 = success.
  2245. * !0 = failure.
  2246. */
  2247. static int
  2248. qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
  2249. struct req_que **req, struct rsp_que **rsp)
  2250. {
  2251. char name[16];
  2252. ha->init_cb = dma_alloc_coherent(&ha->pdev->dev, ha->init_cb_size,
  2253. &ha->init_cb_dma, GFP_KERNEL);
  2254. if (!ha->init_cb)
  2255. goto fail;
  2256. ha->gid_list = dma_alloc_coherent(&ha->pdev->dev, GID_LIST_SIZE,
  2257. &ha->gid_list_dma, GFP_KERNEL);
  2258. if (!ha->gid_list)
  2259. goto fail_free_init_cb;
  2260. ha->srb_mempool = mempool_create_slab_pool(SRB_MIN_REQ, srb_cachep);
  2261. if (!ha->srb_mempool)
  2262. goto fail_free_gid_list;
  2263. if (IS_QLA82XX(ha)) {
  2264. /* Allocate cache for CT6 Ctx. */
  2265. if (!ctx_cachep) {
  2266. ctx_cachep = kmem_cache_create("qla2xxx_ctx",
  2267. sizeof(struct ct6_dsd), 0,
  2268. SLAB_HWCACHE_ALIGN, NULL);
  2269. if (!ctx_cachep)
  2270. goto fail_free_gid_list;
  2271. }
  2272. ha->ctx_mempool = mempool_create_slab_pool(SRB_MIN_REQ,
  2273. ctx_cachep);
  2274. if (!ha->ctx_mempool)
  2275. goto fail_free_srb_mempool;
  2276. }
  2277. /* Get memory for cached NVRAM */
  2278. ha->nvram = kzalloc(MAX_NVRAM_SIZE, GFP_KERNEL);
  2279. if (!ha->nvram)
  2280. goto fail_free_ctx_mempool;
  2281. snprintf(name, sizeof(name), "%s_%d", QLA2XXX_DRIVER_NAME,
  2282. ha->pdev->device);
  2283. ha->s_dma_pool = dma_pool_create(name, &ha->pdev->dev,
  2284. DMA_POOL_SIZE, 8, 0);
  2285. if (!ha->s_dma_pool)
  2286. goto fail_free_nvram;
  2287. if (IS_QLA82XX(ha) || ql2xenabledif) {
  2288. ha->dl_dma_pool = dma_pool_create(name, &ha->pdev->dev,
  2289. DSD_LIST_DMA_POOL_SIZE, 8, 0);
  2290. if (!ha->dl_dma_pool) {
  2291. qla_printk(KERN_WARNING, ha,
  2292. "Memory Allocation failed - dl_dma_pool\n");
  2293. goto fail_s_dma_pool;
  2294. }
  2295. ha->fcp_cmnd_dma_pool = dma_pool_create(name, &ha->pdev->dev,
  2296. FCP_CMND_DMA_POOL_SIZE, 8, 0);
  2297. if (!ha->fcp_cmnd_dma_pool) {
  2298. qla_printk(KERN_WARNING, ha,
  2299. "Memory Allocation failed - fcp_cmnd_dma_pool\n");
  2300. goto fail_dl_dma_pool;
  2301. }
  2302. }
  2303. /* Allocate memory for SNS commands */
  2304. if (IS_QLA2100(ha) || IS_QLA2200(ha)) {
  2305. /* Get consistent memory allocated for SNS commands */
  2306. ha->sns_cmd = dma_alloc_coherent(&ha->pdev->dev,
  2307. sizeof(struct sns_cmd_pkt), &ha->sns_cmd_dma, GFP_KERNEL);
  2308. if (!ha->sns_cmd)
  2309. goto fail_dma_pool;
  2310. } else {
  2311. /* Get consistent memory allocated for MS IOCB */
  2312. ha->ms_iocb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
  2313. &ha->ms_iocb_dma);
  2314. if (!ha->ms_iocb)
  2315. goto fail_dma_pool;
  2316. /* Get consistent memory allocated for CT SNS commands */
  2317. ha->ct_sns = dma_alloc_coherent(&ha->pdev->dev,
  2318. sizeof(struct ct_sns_pkt), &ha->ct_sns_dma, GFP_KERNEL);
  2319. if (!ha->ct_sns)
  2320. goto fail_free_ms_iocb;
  2321. }
  2322. /* Allocate memory for request ring */
  2323. *req = kzalloc(sizeof(struct req_que), GFP_KERNEL);
  2324. if (!*req) {
  2325. DEBUG(printk("Unable to allocate memory for req\n"));
  2326. goto fail_req;
  2327. }
  2328. (*req)->length = req_len;
  2329. (*req)->ring = dma_alloc_coherent(&ha->pdev->dev,
  2330. ((*req)->length + 1) * sizeof(request_t),
  2331. &(*req)->dma, GFP_KERNEL);
  2332. if (!(*req)->ring) {
  2333. DEBUG(printk("Unable to allocate memory for req_ring\n"));
  2334. goto fail_req_ring;
  2335. }
  2336. /* Allocate memory for response ring */
  2337. *rsp = kzalloc(sizeof(struct rsp_que), GFP_KERNEL);
  2338. if (!*rsp) {
  2339. qla_printk(KERN_WARNING, ha,
  2340. "Unable to allocate memory for rsp\n");
  2341. goto fail_rsp;
  2342. }
  2343. (*rsp)->hw = ha;
  2344. (*rsp)->length = rsp_len;
  2345. (*rsp)->ring = dma_alloc_coherent(&ha->pdev->dev,
  2346. ((*rsp)->length + 1) * sizeof(response_t),
  2347. &(*rsp)->dma, GFP_KERNEL);
  2348. if (!(*rsp)->ring) {
  2349. qla_printk(KERN_WARNING, ha,
  2350. "Unable to allocate memory for rsp_ring\n");
  2351. goto fail_rsp_ring;
  2352. }
  2353. (*req)->rsp = *rsp;
  2354. (*rsp)->req = *req;
  2355. /* Allocate memory for NVRAM data for vports */
  2356. if (ha->nvram_npiv_size) {
  2357. ha->npiv_info = kzalloc(sizeof(struct qla_npiv_entry) *
  2358. ha->nvram_npiv_size, GFP_KERNEL);
  2359. if (!ha->npiv_info) {
  2360. qla_printk(KERN_WARNING, ha,
  2361. "Unable to allocate memory for npiv info\n");
  2362. goto fail_npiv_info;
  2363. }
  2364. } else
  2365. ha->npiv_info = NULL;
  2366. /* Get consistent memory allocated for EX-INIT-CB. */
  2367. if (IS_QLA8XXX_TYPE(ha)) {
  2368. ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
  2369. &ha->ex_init_cb_dma);
  2370. if (!ha->ex_init_cb)
  2371. goto fail_ex_init_cb;
  2372. }
  2373. INIT_LIST_HEAD(&ha->gbl_dsd_list);
  2374. /* Get consistent memory allocated for Async Port-Database. */
  2375. if (!IS_FWI2_CAPABLE(ha)) {
  2376. ha->async_pd = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
  2377. &ha->async_pd_dma);
  2378. if (!ha->async_pd)
  2379. goto fail_async_pd;
  2380. }
  2381. INIT_LIST_HEAD(&ha->vp_list);
  2382. return 1;
  2383. fail_async_pd:
  2384. dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
  2385. fail_ex_init_cb:
  2386. kfree(ha->npiv_info);
  2387. fail_npiv_info:
  2388. dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
  2389. sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
  2390. (*rsp)->ring = NULL;
  2391. (*rsp)->dma = 0;
  2392. fail_rsp_ring:
  2393. kfree(*rsp);
  2394. fail_rsp:
  2395. dma_free_coherent(&ha->pdev->dev, ((*req)->length + 1) *
  2396. sizeof(request_t), (*req)->ring, (*req)->dma);
  2397. (*req)->ring = NULL;
  2398. (*req)->dma = 0;
  2399. fail_req_ring:
  2400. kfree(*req);
  2401. fail_req:
  2402. dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
  2403. ha->ct_sns, ha->ct_sns_dma);
  2404. ha->ct_sns = NULL;
  2405. ha->ct_sns_dma = 0;
  2406. fail_free_ms_iocb:
  2407. dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
  2408. ha->ms_iocb = NULL;
  2409. ha->ms_iocb_dma = 0;
  2410. fail_dma_pool:
  2411. if (IS_QLA82XX(ha) || ql2xenabledif) {
  2412. dma_pool_destroy(ha->fcp_cmnd_dma_pool);
  2413. ha->fcp_cmnd_dma_pool = NULL;
  2414. }
  2415. fail_dl_dma_pool:
  2416. if (IS_QLA82XX(ha) || ql2xenabledif) {
  2417. dma_pool_destroy(ha->dl_dma_pool);
  2418. ha->dl_dma_pool = NULL;
  2419. }
  2420. fail_s_dma_pool:
  2421. dma_pool_destroy(ha->s_dma_pool);
  2422. ha->s_dma_pool = NULL;
  2423. fail_free_nvram:
  2424. kfree(ha->nvram);
  2425. ha->nvram = NULL;
  2426. fail_free_ctx_mempool:
  2427. mempool_destroy(ha->ctx_mempool);
  2428. ha->ctx_mempool = NULL;
  2429. fail_free_srb_mempool:
  2430. mempool_destroy(ha->srb_mempool);
  2431. ha->srb_mempool = NULL;
  2432. fail_free_gid_list:
  2433. dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
  2434. ha->gid_list_dma);
  2435. ha->gid_list = NULL;
  2436. ha->gid_list_dma = 0;
  2437. fail_free_init_cb:
  2438. dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, ha->init_cb,
  2439. ha->init_cb_dma);
  2440. ha->init_cb = NULL;
  2441. ha->init_cb_dma = 0;
  2442. fail:
  2443. DEBUG(printk("%s: Memory allocation failure\n", __func__));
  2444. return -ENOMEM;
  2445. }
  2446. /*
  2447. * qla2x00_mem_free
  2448. * Frees all adapter allocated memory.
  2449. *
  2450. * Input:
  2451. * ha = adapter block pointer.
  2452. */
  2453. static void
  2454. qla2x00_mem_free(struct qla_hw_data *ha)
  2455. {
  2456. if (ha->srb_mempool)
  2457. mempool_destroy(ha->srb_mempool);
  2458. if (ha->fce)
  2459. dma_free_coherent(&ha->pdev->dev, FCE_SIZE, ha->fce,
  2460. ha->fce_dma);
  2461. if (ha->fw_dump) {
  2462. if (ha->eft)
  2463. dma_free_coherent(&ha->pdev->dev,
  2464. ntohl(ha->fw_dump->eft_size), ha->eft, ha->eft_dma);
  2465. vfree(ha->fw_dump);
  2466. }
  2467. if (ha->dcbx_tlv)
  2468. dma_free_coherent(&ha->pdev->dev, DCBX_TLV_DATA_SIZE,
  2469. ha->dcbx_tlv, ha->dcbx_tlv_dma);
  2470. if (ha->xgmac_data)
  2471. dma_free_coherent(&ha->pdev->dev, XGMAC_DATA_SIZE,
  2472. ha->xgmac_data, ha->xgmac_data_dma);
  2473. if (ha->sns_cmd)
  2474. dma_free_coherent(&ha->pdev->dev, sizeof(struct sns_cmd_pkt),
  2475. ha->sns_cmd, ha->sns_cmd_dma);
  2476. if (ha->ct_sns)
  2477. dma_free_coherent(&ha->pdev->dev, sizeof(struct ct_sns_pkt),
  2478. ha->ct_sns, ha->ct_sns_dma);
  2479. if (ha->sfp_data)
  2480. dma_pool_free(ha->s_dma_pool, ha->sfp_data, ha->sfp_data_dma);
  2481. if (ha->edc_data)
  2482. dma_pool_free(ha->s_dma_pool, ha->edc_data, ha->edc_data_dma);
  2483. if (ha->ms_iocb)
  2484. dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
  2485. if (ha->ex_init_cb)
  2486. dma_pool_free(ha->s_dma_pool,
  2487. ha->ex_init_cb, ha->ex_init_cb_dma);
  2488. if (ha->async_pd)
  2489. dma_pool_free(ha->s_dma_pool, ha->async_pd, ha->async_pd_dma);
  2490. if (ha->s_dma_pool)
  2491. dma_pool_destroy(ha->s_dma_pool);
  2492. if (ha->gid_list)
  2493. dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
  2494. ha->gid_list_dma);
  2495. if (IS_QLA82XX(ha)) {
  2496. if (!list_empty(&ha->gbl_dsd_list)) {
  2497. struct dsd_dma *dsd_ptr, *tdsd_ptr;
  2498. /* clean up allocated prev pool */
  2499. list_for_each_entry_safe(dsd_ptr,
  2500. tdsd_ptr, &ha->gbl_dsd_list, list) {
  2501. dma_pool_free(ha->dl_dma_pool,
  2502. dsd_ptr->dsd_addr, dsd_ptr->dsd_list_dma);
  2503. list_del(&dsd_ptr->list);
  2504. kfree(dsd_ptr);
  2505. }
  2506. }
  2507. }
  2508. if (ha->dl_dma_pool)
  2509. dma_pool_destroy(ha->dl_dma_pool);
  2510. if (ha->fcp_cmnd_dma_pool)
  2511. dma_pool_destroy(ha->fcp_cmnd_dma_pool);
  2512. if (ha->ctx_mempool)
  2513. mempool_destroy(ha->ctx_mempool);
  2514. if (ha->init_cb)
  2515. dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
  2516. ha->init_cb, ha->init_cb_dma);
  2517. vfree(ha->optrom_buffer);
  2518. kfree(ha->nvram);
  2519. kfree(ha->npiv_info);
  2520. ha->srb_mempool = NULL;
  2521. ha->ctx_mempool = NULL;
  2522. ha->eft = NULL;
  2523. ha->eft_dma = 0;
  2524. ha->sns_cmd = NULL;
  2525. ha->sns_cmd_dma = 0;
  2526. ha->ct_sns = NULL;
  2527. ha->ct_sns_dma = 0;
  2528. ha->ms_iocb = NULL;
  2529. ha->ms_iocb_dma = 0;
  2530. ha->init_cb = NULL;
  2531. ha->init_cb_dma = 0;
  2532. ha->ex_init_cb = NULL;
  2533. ha->ex_init_cb_dma = 0;
  2534. ha->async_pd = NULL;
  2535. ha->async_pd_dma = 0;
  2536. ha->s_dma_pool = NULL;
  2537. ha->dl_dma_pool = NULL;
  2538. ha->fcp_cmnd_dma_pool = NULL;
  2539. ha->gid_list = NULL;
  2540. ha->gid_list_dma = 0;
  2541. ha->fw_dump = NULL;
  2542. ha->fw_dumped = 0;
  2543. ha->fw_dump_reading = 0;
  2544. }
  2545. struct scsi_qla_host *qla2x00_create_host(struct scsi_host_template *sht,
  2546. struct qla_hw_data *ha)
  2547. {
  2548. struct Scsi_Host *host;
  2549. struct scsi_qla_host *vha = NULL;
  2550. host = scsi_host_alloc(sht, sizeof(scsi_qla_host_t));
  2551. if (host == NULL) {
  2552. printk(KERN_WARNING
  2553. "qla2xxx: Couldn't allocate host from scsi layer!\n");
  2554. goto fail;
  2555. }
  2556. /* Clear our data area */
  2557. vha = shost_priv(host);
  2558. memset(vha, 0, sizeof(scsi_qla_host_t));
  2559. vha->host = host;
  2560. vha->host_no = host->host_no;
  2561. vha->hw = ha;
  2562. INIT_LIST_HEAD(&vha->vp_fcports);
  2563. INIT_LIST_HEAD(&vha->work_list);
  2564. INIT_LIST_HEAD(&vha->list);
  2565. spin_lock_init(&vha->work_lock);
  2566. sprintf(vha->host_str, "%s_%ld", QLA2XXX_DRIVER_NAME, vha->host_no);
  2567. return vha;
  2568. fail:
  2569. return vha;
  2570. }
  2571. static struct qla_work_evt *
  2572. qla2x00_alloc_work(struct scsi_qla_host *vha, enum qla_work_type type)
  2573. {
  2574. struct qla_work_evt *e;
  2575. e = kzalloc(sizeof(struct qla_work_evt), GFP_ATOMIC);
  2576. if (!e)
  2577. return NULL;
  2578. INIT_LIST_HEAD(&e->list);
  2579. e->type = type;
  2580. e->flags = QLA_EVT_FLAG_FREE;
  2581. return e;
  2582. }
  2583. static int
  2584. qla2x00_post_work(struct scsi_qla_host *vha, struct qla_work_evt *e)
  2585. {
  2586. unsigned long flags;
  2587. spin_lock_irqsave(&vha->work_lock, flags);
  2588. list_add_tail(&e->list, &vha->work_list);
  2589. spin_unlock_irqrestore(&vha->work_lock, flags);
  2590. qla2xxx_wake_dpc(vha);
  2591. return QLA_SUCCESS;
  2592. }
  2593. int
  2594. qla2x00_post_aen_work(struct scsi_qla_host *vha, enum fc_host_event_code code,
  2595. u32 data)
  2596. {
  2597. struct qla_work_evt *e;
  2598. e = qla2x00_alloc_work(vha, QLA_EVT_AEN);
  2599. if (!e)
  2600. return QLA_FUNCTION_FAILED;
  2601. e->u.aen.code = code;
  2602. e->u.aen.data = data;
  2603. return qla2x00_post_work(vha, e);
  2604. }
  2605. int
  2606. qla2x00_post_idc_ack_work(struct scsi_qla_host *vha, uint16_t *mb)
  2607. {
  2608. struct qla_work_evt *e;
  2609. e = qla2x00_alloc_work(vha, QLA_EVT_IDC_ACK);
  2610. if (!e)
  2611. return QLA_FUNCTION_FAILED;
  2612. memcpy(e->u.idc_ack.mb, mb, QLA_IDC_ACK_REGS * sizeof(uint16_t));
  2613. return qla2x00_post_work(vha, e);
  2614. }
  2615. #define qla2x00_post_async_work(name, type) \
  2616. int qla2x00_post_async_##name##_work( \
  2617. struct scsi_qla_host *vha, \
  2618. fc_port_t *fcport, uint16_t *data) \
  2619. { \
  2620. struct qla_work_evt *e; \
  2621. \
  2622. e = qla2x00_alloc_work(vha, type); \
  2623. if (!e) \
  2624. return QLA_FUNCTION_FAILED; \
  2625. \
  2626. e->u.logio.fcport = fcport; \
  2627. if (data) { \
  2628. e->u.logio.data[0] = data[0]; \
  2629. e->u.logio.data[1] = data[1]; \
  2630. } \
  2631. return qla2x00_post_work(vha, e); \
  2632. }
  2633. qla2x00_post_async_work(login, QLA_EVT_ASYNC_LOGIN);
  2634. qla2x00_post_async_work(login_done, QLA_EVT_ASYNC_LOGIN_DONE);
  2635. qla2x00_post_async_work(logout, QLA_EVT_ASYNC_LOGOUT);
  2636. qla2x00_post_async_work(logout_done, QLA_EVT_ASYNC_LOGOUT_DONE);
  2637. qla2x00_post_async_work(adisc, QLA_EVT_ASYNC_ADISC);
  2638. qla2x00_post_async_work(adisc_done, QLA_EVT_ASYNC_ADISC_DONE);
  2639. int
  2640. qla2x00_post_uevent_work(struct scsi_qla_host *vha, u32 code)
  2641. {
  2642. struct qla_work_evt *e;
  2643. e = qla2x00_alloc_work(vha, QLA_EVT_UEVENT);
  2644. if (!e)
  2645. return QLA_FUNCTION_FAILED;
  2646. e->u.uevent.code = code;
  2647. return qla2x00_post_work(vha, e);
  2648. }
  2649. static void
  2650. qla2x00_uevent_emit(struct scsi_qla_host *vha, u32 code)
  2651. {
  2652. char event_string[40];
  2653. char *envp[] = { event_string, NULL };
  2654. switch (code) {
  2655. case QLA_UEVENT_CODE_FW_DUMP:
  2656. snprintf(event_string, sizeof(event_string), "FW_DUMP=%ld",
  2657. vha->host_no);
  2658. break;
  2659. default:
  2660. /* do nothing */
  2661. break;
  2662. }
  2663. kobject_uevent_env(&vha->hw->pdev->dev.kobj, KOBJ_CHANGE, envp);
  2664. }
  2665. void
  2666. qla2x00_do_work(struct scsi_qla_host *vha)
  2667. {
  2668. struct qla_work_evt *e, *tmp;
  2669. unsigned long flags;
  2670. LIST_HEAD(work);
  2671. spin_lock_irqsave(&vha->work_lock, flags);
  2672. list_splice_init(&vha->work_list, &work);
  2673. spin_unlock_irqrestore(&vha->work_lock, flags);
  2674. list_for_each_entry_safe(e, tmp, &work, list) {
  2675. list_del_init(&e->list);
  2676. switch (e->type) {
  2677. case QLA_EVT_AEN:
  2678. fc_host_post_event(vha->host, fc_get_event_number(),
  2679. e->u.aen.code, e->u.aen.data);
  2680. break;
  2681. case QLA_EVT_IDC_ACK:
  2682. qla81xx_idc_ack(vha, e->u.idc_ack.mb);
  2683. break;
  2684. case QLA_EVT_ASYNC_LOGIN:
  2685. qla2x00_async_login(vha, e->u.logio.fcport,
  2686. e->u.logio.data);
  2687. break;
  2688. case QLA_EVT_ASYNC_LOGIN_DONE:
  2689. qla2x00_async_login_done(vha, e->u.logio.fcport,
  2690. e->u.logio.data);
  2691. break;
  2692. case QLA_EVT_ASYNC_LOGOUT:
  2693. qla2x00_async_logout(vha, e->u.logio.fcport);
  2694. break;
  2695. case QLA_EVT_ASYNC_LOGOUT_DONE:
  2696. qla2x00_async_logout_done(vha, e->u.logio.fcport,
  2697. e->u.logio.data);
  2698. break;
  2699. case QLA_EVT_ASYNC_ADISC:
  2700. qla2x00_async_adisc(vha, e->u.logio.fcport,
  2701. e->u.logio.data);
  2702. break;
  2703. case QLA_EVT_ASYNC_ADISC_DONE:
  2704. qla2x00_async_adisc_done(vha, e->u.logio.fcport,
  2705. e->u.logio.data);
  2706. break;
  2707. case QLA_EVT_UEVENT:
  2708. qla2x00_uevent_emit(vha, e->u.uevent.code);
  2709. break;
  2710. }
  2711. if (e->flags & QLA_EVT_FLAG_FREE)
  2712. kfree(e);
  2713. }
  2714. }
  2715. /* Relogins all the fcports of a vport
  2716. * Context: dpc thread
  2717. */
  2718. void qla2x00_relogin(struct scsi_qla_host *vha)
  2719. {
  2720. fc_port_t *fcport;
  2721. int status;
  2722. uint16_t next_loopid = 0;
  2723. struct qla_hw_data *ha = vha->hw;
  2724. uint16_t data[2];
  2725. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  2726. /*
  2727. * If the port is not ONLINE then try to login
  2728. * to it if we haven't run out of retries.
  2729. */
  2730. if (atomic_read(&fcport->state) != FCS_ONLINE &&
  2731. fcport->login_retry && !(fcport->flags & FCF_ASYNC_SENT)) {
  2732. fcport->login_retry--;
  2733. if (fcport->flags & FCF_FABRIC_DEVICE) {
  2734. if (fcport->flags & FCF_FCP2_DEVICE)
  2735. ha->isp_ops->fabric_logout(vha,
  2736. fcport->loop_id,
  2737. fcport->d_id.b.domain,
  2738. fcport->d_id.b.area,
  2739. fcport->d_id.b.al_pa);
  2740. if (IS_ALOGIO_CAPABLE(ha)) {
  2741. fcport->flags |= FCF_ASYNC_SENT;
  2742. data[0] = 0;
  2743. data[1] = QLA_LOGIO_LOGIN_RETRIED;
  2744. status = qla2x00_post_async_login_work(
  2745. vha, fcport, data);
  2746. if (status == QLA_SUCCESS)
  2747. continue;
  2748. /* Attempt a retry. */
  2749. status = 1;
  2750. } else
  2751. status = qla2x00_fabric_login(vha,
  2752. fcport, &next_loopid);
  2753. } else
  2754. status = qla2x00_local_device_login(vha,
  2755. fcport);
  2756. if (status == QLA_SUCCESS) {
  2757. fcport->old_loop_id = fcport->loop_id;
  2758. DEBUG(printk("scsi(%ld): port login OK: logged "
  2759. "in ID 0x%x\n", vha->host_no, fcport->loop_id));
  2760. qla2x00_update_fcport(vha, fcport);
  2761. } else if (status == 1) {
  2762. set_bit(RELOGIN_NEEDED, &vha->dpc_flags);
  2763. /* retry the login again */
  2764. DEBUG(printk("scsi(%ld): Retrying"
  2765. " %d login again loop_id 0x%x\n",
  2766. vha->host_no, fcport->login_retry,
  2767. fcport->loop_id));
  2768. } else {
  2769. fcport->login_retry = 0;
  2770. }
  2771. if (fcport->login_retry == 0 && status != QLA_SUCCESS)
  2772. fcport->loop_id = FC_NO_LOOP_ID;
  2773. }
  2774. if (test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags))
  2775. break;
  2776. }
  2777. }
  2778. /**************************************************************************
  2779. * qla2x00_do_dpc
  2780. * This kernel thread is a task that is schedule by the interrupt handler
  2781. * to perform the background processing for interrupts.
  2782. *
  2783. * Notes:
  2784. * This task always run in the context of a kernel thread. It
  2785. * is kick-off by the driver's detect code and starts up
  2786. * up one per adapter. It immediately goes to sleep and waits for
  2787. * some fibre event. When either the interrupt handler or
  2788. * the timer routine detects a event it will one of the task
  2789. * bits then wake us up.
  2790. **************************************************************************/
  2791. static int
  2792. qla2x00_do_dpc(void *data)
  2793. {
  2794. int rval;
  2795. scsi_qla_host_t *base_vha;
  2796. struct qla_hw_data *ha;
  2797. ha = (struct qla_hw_data *)data;
  2798. base_vha = pci_get_drvdata(ha->pdev);
  2799. set_user_nice(current, -20);
  2800. while (!kthread_should_stop()) {
  2801. DEBUG3(printk("qla2x00: DPC handler sleeping\n"));
  2802. set_current_state(TASK_INTERRUPTIBLE);
  2803. schedule();
  2804. __set_current_state(TASK_RUNNING);
  2805. DEBUG3(printk("qla2x00: DPC handler waking up\n"));
  2806. /* Initialization not yet finished. Don't do anything yet. */
  2807. if (!base_vha->flags.init_done)
  2808. continue;
  2809. if (ha->flags.eeh_busy) {
  2810. DEBUG17(qla_printk(KERN_WARNING, ha,
  2811. "qla2x00_do_dpc: dpc_flags: %lx\n",
  2812. base_vha->dpc_flags));
  2813. continue;
  2814. }
  2815. DEBUG3(printk("scsi(%ld): DPC handler\n", base_vha->host_no));
  2816. ha->dpc_active = 1;
  2817. if (ha->flags.mbox_busy) {
  2818. ha->dpc_active = 0;
  2819. continue;
  2820. }
  2821. qla2x00_do_work(base_vha);
  2822. if (IS_QLA82XX(ha)) {
  2823. if (test_and_clear_bit(ISP_UNRECOVERABLE,
  2824. &base_vha->dpc_flags)) {
  2825. qla82xx_idc_lock(ha);
  2826. qla82xx_wr_32(ha, QLA82XX_CRB_DEV_STATE,
  2827. QLA82XX_DEV_FAILED);
  2828. qla82xx_idc_unlock(ha);
  2829. qla_printk(KERN_INFO, ha,
  2830. "HW State: FAILED\n");
  2831. qla82xx_device_state_handler(base_vha);
  2832. continue;
  2833. }
  2834. if (test_and_clear_bit(FCOE_CTX_RESET_NEEDED,
  2835. &base_vha->dpc_flags)) {
  2836. DEBUG(printk(KERN_INFO
  2837. "scsi(%ld): dpc: sched "
  2838. "qla82xx_fcoe_ctx_reset ha = %p\n",
  2839. base_vha->host_no, ha));
  2840. if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
  2841. &base_vha->dpc_flags))) {
  2842. if (qla82xx_fcoe_ctx_reset(base_vha)) {
  2843. /* FCoE-ctx reset failed.
  2844. * Escalate to chip-reset
  2845. */
  2846. set_bit(ISP_ABORT_NEEDED,
  2847. &base_vha->dpc_flags);
  2848. }
  2849. clear_bit(ABORT_ISP_ACTIVE,
  2850. &base_vha->dpc_flags);
  2851. }
  2852. DEBUG(printk("scsi(%ld): dpc:"
  2853. " qla82xx_fcoe_ctx_reset end\n",
  2854. base_vha->host_no));
  2855. }
  2856. }
  2857. if (test_and_clear_bit(ISP_ABORT_NEEDED,
  2858. &base_vha->dpc_flags)) {
  2859. DEBUG(printk("scsi(%ld): dpc: sched "
  2860. "qla2x00_abort_isp ha = %p\n",
  2861. base_vha->host_no, ha));
  2862. if (!(test_and_set_bit(ABORT_ISP_ACTIVE,
  2863. &base_vha->dpc_flags))) {
  2864. if (ha->isp_ops->abort_isp(base_vha)) {
  2865. /* failed. retry later */
  2866. set_bit(ISP_ABORT_NEEDED,
  2867. &base_vha->dpc_flags);
  2868. }
  2869. clear_bit(ABORT_ISP_ACTIVE,
  2870. &base_vha->dpc_flags);
  2871. }
  2872. DEBUG(printk("scsi(%ld): dpc: qla2x00_abort_isp end\n",
  2873. base_vha->host_no));
  2874. }
  2875. if (test_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags)) {
  2876. qla2x00_update_fcports(base_vha);
  2877. clear_bit(FCPORT_UPDATE_NEEDED, &base_vha->dpc_flags);
  2878. }
  2879. if (test_and_clear_bit(RESET_MARKER_NEEDED,
  2880. &base_vha->dpc_flags) &&
  2881. (!(test_and_set_bit(RESET_ACTIVE, &base_vha->dpc_flags)))) {
  2882. DEBUG(printk("scsi(%ld): qla2x00_reset_marker()\n",
  2883. base_vha->host_no));
  2884. qla2x00_rst_aen(base_vha);
  2885. clear_bit(RESET_ACTIVE, &base_vha->dpc_flags);
  2886. }
  2887. /* Retry each device up to login retry count */
  2888. if ((test_and_clear_bit(RELOGIN_NEEDED,
  2889. &base_vha->dpc_flags)) &&
  2890. !test_bit(LOOP_RESYNC_NEEDED, &base_vha->dpc_flags) &&
  2891. atomic_read(&base_vha->loop_state) != LOOP_DOWN) {
  2892. DEBUG(printk("scsi(%ld): qla2x00_port_login()\n",
  2893. base_vha->host_no));
  2894. qla2x00_relogin(base_vha);
  2895. DEBUG(printk("scsi(%ld): qla2x00_port_login - end\n",
  2896. base_vha->host_no));
  2897. }
  2898. if (test_and_clear_bit(LOOP_RESYNC_NEEDED,
  2899. &base_vha->dpc_flags)) {
  2900. DEBUG(printk("scsi(%ld): qla2x00_loop_resync()\n",
  2901. base_vha->host_no));
  2902. if (!(test_and_set_bit(LOOP_RESYNC_ACTIVE,
  2903. &base_vha->dpc_flags))) {
  2904. rval = qla2x00_loop_resync(base_vha);
  2905. clear_bit(LOOP_RESYNC_ACTIVE,
  2906. &base_vha->dpc_flags);
  2907. }
  2908. DEBUG(printk("scsi(%ld): qla2x00_loop_resync - end\n",
  2909. base_vha->host_no));
  2910. }
  2911. if (test_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags) &&
  2912. atomic_read(&base_vha->loop_state) == LOOP_READY) {
  2913. clear_bit(NPIV_CONFIG_NEEDED, &base_vha->dpc_flags);
  2914. qla2xxx_flash_npiv_conf(base_vha);
  2915. }
  2916. if (!ha->interrupts_on)
  2917. ha->isp_ops->enable_intrs(ha);
  2918. if (test_and_clear_bit(BEACON_BLINK_NEEDED,
  2919. &base_vha->dpc_flags))
  2920. ha->isp_ops->beacon_blink(base_vha);
  2921. qla2x00_do_dpc_all_vps(base_vha);
  2922. ha->dpc_active = 0;
  2923. } /* End of while(1) */
  2924. DEBUG(printk("scsi(%ld): DPC handler exiting\n", base_vha->host_no));
  2925. /*
  2926. * Make sure that nobody tries to wake us up again.
  2927. */
  2928. ha->dpc_active = 0;
  2929. /* Cleanup any residual CTX SRBs. */
  2930. qla2x00_abort_all_cmds(base_vha, DID_NO_CONNECT << 16);
  2931. return 0;
  2932. }
  2933. void
  2934. qla2xxx_wake_dpc(struct scsi_qla_host *vha)
  2935. {
  2936. struct qla_hw_data *ha = vha->hw;
  2937. struct task_struct *t = ha->dpc_thread;
  2938. if (!test_bit(UNLOADING, &vha->dpc_flags) && t)
  2939. wake_up_process(t);
  2940. }
  2941. /*
  2942. * qla2x00_rst_aen
  2943. * Processes asynchronous reset.
  2944. *
  2945. * Input:
  2946. * ha = adapter block pointer.
  2947. */
  2948. static void
  2949. qla2x00_rst_aen(scsi_qla_host_t *vha)
  2950. {
  2951. if (vha->flags.online && !vha->flags.reset_active &&
  2952. !atomic_read(&vha->loop_down_timer) &&
  2953. !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))) {
  2954. do {
  2955. clear_bit(RESET_MARKER_NEEDED, &vha->dpc_flags);
  2956. /*
  2957. * Issue marker command only when we are going to start
  2958. * the I/O.
  2959. */
  2960. vha->marker_needed = 1;
  2961. } while (!atomic_read(&vha->loop_down_timer) &&
  2962. (test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags)));
  2963. }
  2964. }
  2965. static void
  2966. qla2x00_sp_free_dma(srb_t *sp)
  2967. {
  2968. struct scsi_cmnd *cmd = sp->cmd;
  2969. struct qla_hw_data *ha = sp->fcport->vha->hw;
  2970. if (sp->flags & SRB_DMA_VALID) {
  2971. scsi_dma_unmap(cmd);
  2972. sp->flags &= ~SRB_DMA_VALID;
  2973. }
  2974. if (sp->flags & SRB_CRC_PROT_DMA_VALID) {
  2975. dma_unmap_sg(&ha->pdev->dev, scsi_prot_sglist(cmd),
  2976. scsi_prot_sg_count(cmd), cmd->sc_data_direction);
  2977. sp->flags &= ~SRB_CRC_PROT_DMA_VALID;
  2978. }
  2979. if (sp->flags & SRB_CRC_CTX_DSD_VALID) {
  2980. /* List assured to be having elements */
  2981. qla2x00_clean_dsd_pool(ha, sp);
  2982. sp->flags &= ~SRB_CRC_CTX_DSD_VALID;
  2983. }
  2984. if (sp->flags & SRB_CRC_CTX_DMA_VALID) {
  2985. dma_pool_free(ha->dl_dma_pool, sp->ctx,
  2986. ((struct crc_context *)sp->ctx)->crc_ctx_dma);
  2987. sp->flags &= ~SRB_CRC_CTX_DMA_VALID;
  2988. }
  2989. CMD_SP(cmd) = NULL;
  2990. }
  2991. void
  2992. qla2x00_sp_compl(struct qla_hw_data *ha, srb_t *sp)
  2993. {
  2994. struct scsi_cmnd *cmd = sp->cmd;
  2995. qla2x00_sp_free_dma(sp);
  2996. if (sp->flags & SRB_FCP_CMND_DMA_VALID) {
  2997. struct ct6_dsd *ctx = sp->ctx;
  2998. dma_pool_free(ha->fcp_cmnd_dma_pool, ctx->fcp_cmnd,
  2999. ctx->fcp_cmnd_dma);
  3000. list_splice(&ctx->dsd_list, &ha->gbl_dsd_list);
  3001. ha->gbl_dsd_inuse -= ctx->dsd_use_cnt;
  3002. ha->gbl_dsd_avail += ctx->dsd_use_cnt;
  3003. mempool_free(sp->ctx, ha->ctx_mempool);
  3004. sp->ctx = NULL;
  3005. }
  3006. mempool_free(sp, ha->srb_mempool);
  3007. cmd->scsi_done(cmd);
  3008. }
  3009. /**************************************************************************
  3010. * qla2x00_timer
  3011. *
  3012. * Description:
  3013. * One second timer
  3014. *
  3015. * Context: Interrupt
  3016. ***************************************************************************/
  3017. void
  3018. qla2x00_timer(scsi_qla_host_t *vha)
  3019. {
  3020. unsigned long cpu_flags = 0;
  3021. fc_port_t *fcport;
  3022. int start_dpc = 0;
  3023. int index;
  3024. srb_t *sp;
  3025. int t;
  3026. uint16_t w;
  3027. struct qla_hw_data *ha = vha->hw;
  3028. struct req_que *req;
  3029. if (IS_QLA82XX(ha))
  3030. qla82xx_watchdog(vha);
  3031. /* Hardware read to raise pending EEH errors during mailbox waits. */
  3032. if (!pci_channel_offline(ha->pdev))
  3033. pci_read_config_word(ha->pdev, PCI_VENDOR_ID, &w);
  3034. /*
  3035. * Ports - Port down timer.
  3036. *
  3037. * Whenever, a port is in the LOST state we start decrementing its port
  3038. * down timer every second until it reaches zero. Once it reaches zero
  3039. * the port it marked DEAD.
  3040. */
  3041. t = 0;
  3042. list_for_each_entry(fcport, &vha->vp_fcports, list) {
  3043. if (fcport->port_type != FCT_TARGET)
  3044. continue;
  3045. if (atomic_read(&fcport->state) == FCS_DEVICE_LOST) {
  3046. if (atomic_read(&fcport->port_down_timer) == 0)
  3047. continue;
  3048. if (atomic_dec_and_test(&fcport->port_down_timer) != 0)
  3049. atomic_set(&fcport->state, FCS_DEVICE_DEAD);
  3050. DEBUG(printk("scsi(%ld): fcport-%d - port retry count: "
  3051. "%d remaining\n",
  3052. vha->host_no,
  3053. t, atomic_read(&fcport->port_down_timer)));
  3054. }
  3055. t++;
  3056. } /* End of for fcport */
  3057. /* Loop down handler. */
  3058. if (atomic_read(&vha->loop_down_timer) > 0 &&
  3059. !(test_bit(ABORT_ISP_ACTIVE, &vha->dpc_flags))
  3060. && vha->flags.online) {
  3061. if (atomic_read(&vha->loop_down_timer) ==
  3062. vha->loop_down_abort_time) {
  3063. DEBUG(printk("scsi(%ld): Loop Down - aborting the "
  3064. "queues before time expire\n",
  3065. vha->host_no));
  3066. if (!IS_QLA2100(ha) && vha->link_down_timeout)
  3067. atomic_set(&vha->loop_state, LOOP_DEAD);
  3068. /*
  3069. * Schedule an ISP abort to return any FCP2-device
  3070. * commands.
  3071. */
  3072. /* NPIV - scan physical port only */
  3073. if (!vha->vp_idx) {
  3074. spin_lock_irqsave(&ha->hardware_lock,
  3075. cpu_flags);
  3076. req = ha->req_q_map[0];
  3077. for (index = 1;
  3078. index < MAX_OUTSTANDING_COMMANDS;
  3079. index++) {
  3080. fc_port_t *sfcp;
  3081. sp = req->outstanding_cmds[index];
  3082. if (!sp)
  3083. continue;
  3084. if (sp->ctx && !IS_PROT_IO(sp))
  3085. continue;
  3086. sfcp = sp->fcport;
  3087. if (!(sfcp->flags & FCF_FCP2_DEVICE))
  3088. continue;
  3089. set_bit(ISP_ABORT_NEEDED,
  3090. &vha->dpc_flags);
  3091. break;
  3092. }
  3093. spin_unlock_irqrestore(&ha->hardware_lock,
  3094. cpu_flags);
  3095. }
  3096. start_dpc++;
  3097. }
  3098. /* if the loop has been down for 4 minutes, reinit adapter */
  3099. if (atomic_dec_and_test(&vha->loop_down_timer) != 0) {
  3100. if (!(vha->device_flags & DFLG_NO_CABLE)) {
  3101. DEBUG(printk("scsi(%ld): Loop down - "
  3102. "aborting ISP.\n",
  3103. vha->host_no));
  3104. qla_printk(KERN_WARNING, ha,
  3105. "Loop down - aborting ISP.\n");
  3106. set_bit(ISP_ABORT_NEEDED, &vha->dpc_flags);
  3107. }
  3108. }
  3109. DEBUG3(printk("scsi(%ld): Loop Down - seconds remaining %d\n",
  3110. vha->host_no,
  3111. atomic_read(&vha->loop_down_timer)));
  3112. }
  3113. /* Check if beacon LED needs to be blinked */
  3114. if (ha->beacon_blink_led == 1) {
  3115. set_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags);
  3116. start_dpc++;
  3117. }
  3118. /* Process any deferred work. */
  3119. if (!list_empty(&vha->work_list))
  3120. start_dpc++;
  3121. /* Schedule the DPC routine if needed */
  3122. if ((test_bit(ISP_ABORT_NEEDED, &vha->dpc_flags) ||
  3123. test_bit(LOOP_RESYNC_NEEDED, &vha->dpc_flags) ||
  3124. test_bit(FCPORT_UPDATE_NEEDED, &vha->dpc_flags) ||
  3125. start_dpc ||
  3126. test_bit(RESET_MARKER_NEEDED, &vha->dpc_flags) ||
  3127. test_bit(BEACON_BLINK_NEEDED, &vha->dpc_flags) ||
  3128. test_bit(ISP_UNRECOVERABLE, &vha->dpc_flags) ||
  3129. test_bit(FCOE_CTX_RESET_NEEDED, &vha->dpc_flags) ||
  3130. test_bit(VP_DPC_NEEDED, &vha->dpc_flags) ||
  3131. test_bit(RELOGIN_NEEDED, &vha->dpc_flags)))
  3132. qla2xxx_wake_dpc(vha);
  3133. qla2x00_restart_timer(vha, WATCH_INTERVAL);
  3134. }
  3135. /* Firmware interface routines. */
  3136. #define FW_BLOBS 8
  3137. #define FW_ISP21XX 0
  3138. #define FW_ISP22XX 1
  3139. #define FW_ISP2300 2
  3140. #define FW_ISP2322 3
  3141. #define FW_ISP24XX 4
  3142. #define FW_ISP25XX 5
  3143. #define FW_ISP81XX 6
  3144. #define FW_ISP82XX 7
  3145. #define FW_FILE_ISP21XX "ql2100_fw.bin"
  3146. #define FW_FILE_ISP22XX "ql2200_fw.bin"
  3147. #define FW_FILE_ISP2300 "ql2300_fw.bin"
  3148. #define FW_FILE_ISP2322 "ql2322_fw.bin"
  3149. #define FW_FILE_ISP24XX "ql2400_fw.bin"
  3150. #define FW_FILE_ISP25XX "ql2500_fw.bin"
  3151. #define FW_FILE_ISP81XX "ql8100_fw.bin"
  3152. #define FW_FILE_ISP82XX "ql8200_fw.bin"
  3153. static DEFINE_MUTEX(qla_fw_lock);
  3154. static struct fw_blob qla_fw_blobs[FW_BLOBS] = {
  3155. { .name = FW_FILE_ISP21XX, .segs = { 0x1000, 0 }, },
  3156. { .name = FW_FILE_ISP22XX, .segs = { 0x1000, 0 }, },
  3157. { .name = FW_FILE_ISP2300, .segs = { 0x800, 0 }, },
  3158. { .name = FW_FILE_ISP2322, .segs = { 0x800, 0x1c000, 0x1e000, 0 }, },
  3159. { .name = FW_FILE_ISP24XX, },
  3160. { .name = FW_FILE_ISP25XX, },
  3161. { .name = FW_FILE_ISP81XX, },
  3162. { .name = FW_FILE_ISP82XX, },
  3163. };
  3164. struct fw_blob *
  3165. qla2x00_request_firmware(scsi_qla_host_t *vha)
  3166. {
  3167. struct qla_hw_data *ha = vha->hw;
  3168. struct fw_blob *blob;
  3169. blob = NULL;
  3170. if (IS_QLA2100(ha)) {
  3171. blob = &qla_fw_blobs[FW_ISP21XX];
  3172. } else if (IS_QLA2200(ha)) {
  3173. blob = &qla_fw_blobs[FW_ISP22XX];
  3174. } else if (IS_QLA2300(ha) || IS_QLA2312(ha) || IS_QLA6312(ha)) {
  3175. blob = &qla_fw_blobs[FW_ISP2300];
  3176. } else if (IS_QLA2322(ha) || IS_QLA6322(ha)) {
  3177. blob = &qla_fw_blobs[FW_ISP2322];
  3178. } else if (IS_QLA24XX_TYPE(ha)) {
  3179. blob = &qla_fw_blobs[FW_ISP24XX];
  3180. } else if (IS_QLA25XX(ha)) {
  3181. blob = &qla_fw_blobs[FW_ISP25XX];
  3182. } else if (IS_QLA81XX(ha)) {
  3183. blob = &qla_fw_blobs[FW_ISP81XX];
  3184. } else if (IS_QLA82XX(ha)) {
  3185. blob = &qla_fw_blobs[FW_ISP82XX];
  3186. }
  3187. mutex_lock(&qla_fw_lock);
  3188. if (blob->fw)
  3189. goto out;
  3190. if (request_firmware(&blob->fw, blob->name, &ha->pdev->dev)) {
  3191. DEBUG2(printk("scsi(%ld): Failed to load firmware image "
  3192. "(%s).\n", vha->host_no, blob->name));
  3193. blob->fw = NULL;
  3194. blob = NULL;
  3195. goto out;
  3196. }
  3197. out:
  3198. mutex_unlock(&qla_fw_lock);
  3199. return blob;
  3200. }
  3201. static void
  3202. qla2x00_release_firmware(void)
  3203. {
  3204. int idx;
  3205. mutex_lock(&qla_fw_lock);
  3206. for (idx = 0; idx < FW_BLOBS; idx++)
  3207. if (qla_fw_blobs[idx].fw)
  3208. release_firmware(qla_fw_blobs[idx].fw);
  3209. mutex_unlock(&qla_fw_lock);
  3210. }
  3211. static pci_ers_result_t
  3212. qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
  3213. {
  3214. scsi_qla_host_t *vha = pci_get_drvdata(pdev);
  3215. struct qla_hw_data *ha = vha->hw;
  3216. DEBUG2(qla_printk(KERN_WARNING, ha, "error_detected:state %x\n",
  3217. state));
  3218. switch (state) {
  3219. case pci_channel_io_normal:
  3220. ha->flags.eeh_busy = 0;
  3221. return PCI_ERS_RESULT_CAN_RECOVER;
  3222. case pci_channel_io_frozen:
  3223. ha->flags.eeh_busy = 1;
  3224. qla2x00_free_irqs(vha);
  3225. pci_disable_device(pdev);
  3226. return PCI_ERS_RESULT_NEED_RESET;
  3227. case pci_channel_io_perm_failure:
  3228. ha->flags.pci_channel_io_perm_failure = 1;
  3229. qla2x00_abort_all_cmds(vha, DID_NO_CONNECT << 16);
  3230. return PCI_ERS_RESULT_DISCONNECT;
  3231. }
  3232. return PCI_ERS_RESULT_NEED_RESET;
  3233. }
  3234. static pci_ers_result_t
  3235. qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
  3236. {
  3237. int risc_paused = 0;
  3238. uint32_t stat;
  3239. unsigned long flags;
  3240. scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
  3241. struct qla_hw_data *ha = base_vha->hw;
  3242. struct device_reg_2xxx __iomem *reg = &ha->iobase->isp;
  3243. struct device_reg_24xx __iomem *reg24 = &ha->iobase->isp24;
  3244. spin_lock_irqsave(&ha->hardware_lock, flags);
  3245. if (IS_QLA2100(ha) || IS_QLA2200(ha)){
  3246. stat = RD_REG_DWORD(&reg->hccr);
  3247. if (stat & HCCR_RISC_PAUSE)
  3248. risc_paused = 1;
  3249. } else if (IS_QLA23XX(ha)) {
  3250. stat = RD_REG_DWORD(&reg->u.isp2300.host_status);
  3251. if (stat & HSR_RISC_PAUSED)
  3252. risc_paused = 1;
  3253. } else if (IS_FWI2_CAPABLE(ha)) {
  3254. stat = RD_REG_DWORD(&reg24->host_status);
  3255. if (stat & HSRX_RISC_PAUSED)
  3256. risc_paused = 1;
  3257. }
  3258. spin_unlock_irqrestore(&ha->hardware_lock, flags);
  3259. if (risc_paused) {
  3260. qla_printk(KERN_INFO, ha, "RISC paused -- mmio_enabled, "
  3261. "Dumping firmware!\n");
  3262. ha->isp_ops->fw_dump(base_vha, 0);
  3263. return PCI_ERS_RESULT_NEED_RESET;
  3264. } else
  3265. return PCI_ERS_RESULT_RECOVERED;
  3266. }
  3267. static pci_ers_result_t
  3268. qla2xxx_pci_slot_reset(struct pci_dev *pdev)
  3269. {
  3270. pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT;
  3271. scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
  3272. struct qla_hw_data *ha = base_vha->hw;
  3273. struct rsp_que *rsp;
  3274. int rc, retries = 10;
  3275. DEBUG17(qla_printk(KERN_WARNING, ha, "slot_reset\n"));
  3276. /* Workaround: qla2xxx driver which access hardware earlier
  3277. * needs error state to be pci_channel_io_online.
  3278. * Otherwise mailbox command timesout.
  3279. */
  3280. pdev->error_state = pci_channel_io_normal;
  3281. pci_restore_state(pdev);
  3282. /* pci_restore_state() clears the saved_state flag of the device
  3283. * save restored state which resets saved_state flag
  3284. */
  3285. pci_save_state(pdev);
  3286. if (ha->mem_only)
  3287. rc = pci_enable_device_mem(pdev);
  3288. else
  3289. rc = pci_enable_device(pdev);
  3290. if (rc) {
  3291. qla_printk(KERN_WARNING, ha,
  3292. "Can't re-enable PCI device after reset.\n");
  3293. return ret;
  3294. }
  3295. rsp = ha->rsp_q_map[0];
  3296. if (qla2x00_request_irqs(ha, rsp))
  3297. return ret;
  3298. if (ha->isp_ops->pci_config(base_vha))
  3299. return ret;
  3300. while (ha->flags.mbox_busy && retries--)
  3301. msleep(1000);
  3302. set_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  3303. if (ha->isp_ops->abort_isp(base_vha) == QLA_SUCCESS)
  3304. ret = PCI_ERS_RESULT_RECOVERED;
  3305. clear_bit(ABORT_ISP_ACTIVE, &base_vha->dpc_flags);
  3306. DEBUG17(qla_printk(KERN_WARNING, ha,
  3307. "slot_reset-return:ret=%x\n", ret));
  3308. return ret;
  3309. }
  3310. static void
  3311. qla2xxx_pci_resume(struct pci_dev *pdev)
  3312. {
  3313. scsi_qla_host_t *base_vha = pci_get_drvdata(pdev);
  3314. struct qla_hw_data *ha = base_vha->hw;
  3315. int ret;
  3316. DEBUG17(qla_printk(KERN_WARNING, ha, "pci_resume\n"));
  3317. ret = qla2x00_wait_for_hba_online(base_vha);
  3318. if (ret != QLA_SUCCESS) {
  3319. qla_printk(KERN_ERR, ha,
  3320. "the device failed to resume I/O "
  3321. "from slot/link_reset");
  3322. }
  3323. pci_cleanup_aer_uncorrect_error_status(pdev);
  3324. ha->flags.eeh_busy = 0;
  3325. }
  3326. static struct pci_error_handlers qla2xxx_err_handler = {
  3327. .error_detected = qla2xxx_pci_error_detected,
  3328. .mmio_enabled = qla2xxx_pci_mmio_enabled,
  3329. .slot_reset = qla2xxx_pci_slot_reset,
  3330. .resume = qla2xxx_pci_resume,
  3331. };
  3332. static struct pci_device_id qla2xxx_pci_tbl[] = {
  3333. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2100) },
  3334. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2200) },
  3335. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2300) },
  3336. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2312) },
  3337. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2322) },
  3338. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6312) },
  3339. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP6322) },
  3340. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2422) },
  3341. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2432) },
  3342. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8432) },
  3343. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5422) },
  3344. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP5432) },
  3345. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP2532) },
  3346. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8001) },
  3347. { PCI_DEVICE(PCI_VENDOR_ID_QLOGIC, PCI_DEVICE_ID_QLOGIC_ISP8021) },
  3348. { 0 },
  3349. };
  3350. MODULE_DEVICE_TABLE(pci, qla2xxx_pci_tbl);
  3351. static struct pci_driver qla2xxx_pci_driver = {
  3352. .name = QLA2XXX_DRIVER_NAME,
  3353. .driver = {
  3354. .owner = THIS_MODULE,
  3355. },
  3356. .id_table = qla2xxx_pci_tbl,
  3357. .probe = qla2x00_probe_one,
  3358. .remove = qla2x00_remove_one,
  3359. .err_handler = &qla2xxx_err_handler,
  3360. };
  3361. static struct file_operations apidev_fops = {
  3362. .owner = THIS_MODULE,
  3363. };
  3364. /**
  3365. * qla2x00_module_init - Module initialization.
  3366. **/
  3367. static int __init
  3368. qla2x00_module_init(void)
  3369. {
  3370. int ret = 0;
  3371. /* Allocate cache for SRBs. */
  3372. srb_cachep = kmem_cache_create("qla2xxx_srbs", sizeof(srb_t), 0,
  3373. SLAB_HWCACHE_ALIGN, NULL);
  3374. if (srb_cachep == NULL) {
  3375. printk(KERN_ERR
  3376. "qla2xxx: Unable to allocate SRB cache...Failing load!\n");
  3377. return -ENOMEM;
  3378. }
  3379. /* Derive version string. */
  3380. strcpy(qla2x00_version_str, QLA2XXX_VERSION);
  3381. if (ql2xextended_error_logging)
  3382. strcat(qla2x00_version_str, "-debug");
  3383. qla2xxx_transport_template =
  3384. fc_attach_transport(&qla2xxx_transport_functions);
  3385. if (!qla2xxx_transport_template) {
  3386. kmem_cache_destroy(srb_cachep);
  3387. return -ENODEV;
  3388. }
  3389. apidev_major = register_chrdev(0, QLA2XXX_APIDEV, &apidev_fops);
  3390. if (apidev_major < 0) {
  3391. printk(KERN_WARNING "qla2xxx: Unable to register char device "
  3392. "%s\n", QLA2XXX_APIDEV);
  3393. }
  3394. qla2xxx_transport_vport_template =
  3395. fc_attach_transport(&qla2xxx_transport_vport_functions);
  3396. if (!qla2xxx_transport_vport_template) {
  3397. kmem_cache_destroy(srb_cachep);
  3398. fc_release_transport(qla2xxx_transport_template);
  3399. return -ENODEV;
  3400. }
  3401. printk(KERN_INFO "QLogic Fibre Channel HBA Driver: %s\n",
  3402. qla2x00_version_str);
  3403. ret = pci_register_driver(&qla2xxx_pci_driver);
  3404. if (ret) {
  3405. kmem_cache_destroy(srb_cachep);
  3406. fc_release_transport(qla2xxx_transport_template);
  3407. fc_release_transport(qla2xxx_transport_vport_template);
  3408. }
  3409. return ret;
  3410. }
  3411. /**
  3412. * qla2x00_module_exit - Module cleanup.
  3413. **/
  3414. static void __exit
  3415. qla2x00_module_exit(void)
  3416. {
  3417. unregister_chrdev(apidev_major, QLA2XXX_APIDEV);
  3418. pci_unregister_driver(&qla2xxx_pci_driver);
  3419. qla2x00_release_firmware();
  3420. kmem_cache_destroy(srb_cachep);
  3421. if (ctx_cachep)
  3422. kmem_cache_destroy(ctx_cachep);
  3423. fc_release_transport(qla2xxx_transport_template);
  3424. fc_release_transport(qla2xxx_transport_vport_template);
  3425. }
  3426. module_init(qla2x00_module_init);
  3427. module_exit(qla2x00_module_exit);
  3428. MODULE_AUTHOR("QLogic Corporation");
  3429. MODULE_DESCRIPTION("QLogic Fibre Channel HBA Driver");
  3430. MODULE_LICENSE("GPL");
  3431. MODULE_VERSION(QLA2XXX_VERSION);
  3432. MODULE_FIRMWARE(FW_FILE_ISP21XX);
  3433. MODULE_FIRMWARE(FW_FILE_ISP22XX);
  3434. MODULE_FIRMWARE(FW_FILE_ISP2300);
  3435. MODULE_FIRMWARE(FW_FILE_ISP2322);
  3436. MODULE_FIRMWARE(FW_FILE_ISP24XX);
  3437. MODULE_FIRMWARE(FW_FILE_ISP25XX);