iwl3945-base.c 125 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2009 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/init.h>
  32. #include <linux/pci.h>
  33. #include <linux/dma-mapping.h>
  34. #include <linux/delay.h>
  35. #include <linux/skbuff.h>
  36. #include <linux/netdevice.h>
  37. #include <linux/wireless.h>
  38. #include <linux/firmware.h>
  39. #include <linux/etherdevice.h>
  40. #include <linux/if_arp.h>
  41. #include <net/ieee80211_radiotap.h>
  42. #include <net/lib80211.h>
  43. #include <net/mac80211.h>
  44. #include <asm/div64.h>
  45. #define DRV_NAME "iwl3945"
  46. #include "iwl-fh.h"
  47. #include "iwl-3945-fh.h"
  48. #include "iwl-commands.h"
  49. #include "iwl-sta.h"
  50. #include "iwl-3945.h"
  51. #include "iwl-helpers.h"
  52. #include "iwl-core.h"
  53. #include "iwl-dev.h"
  54. /*
  55. * module name, copyright, version, etc.
  56. */
  57. #define DRV_DESCRIPTION \
  58. "Intel(R) PRO/Wireless 3945ABG/BG Network Connection driver for Linux"
  59. #ifdef CONFIG_IWLWIFI_DEBUG
  60. #define VD "d"
  61. #else
  62. #define VD
  63. #endif
  64. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  65. #define VS "s"
  66. #else
  67. #define VS
  68. #endif
  69. #define IWL39_VERSION "1.2.26k" VD VS
  70. #define DRV_COPYRIGHT "Copyright(c) 2003-2009 Intel Corporation"
  71. #define DRV_AUTHOR "<ilw@linux.intel.com>"
  72. #define DRV_VERSION IWL39_VERSION
  73. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  74. MODULE_VERSION(DRV_VERSION);
  75. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  76. MODULE_LICENSE("GPL");
  77. /* module parameters */
  78. struct iwl_mod_params iwl3945_mod_params = {
  79. .num_of_queues = IWL39_MAX_NUM_QUEUES,
  80. .sw_crypto = 1,
  81. .restart_fw = 1,
  82. /* the rest are 0 by default */
  83. };
  84. /*************** STATION TABLE MANAGEMENT ****
  85. * mac80211 should be examined to determine if sta_info is duplicating
  86. * the functionality provided here
  87. */
  88. /**************************************************************/
  89. #if 0 /* temporary disable till we add real remove station */
  90. /**
  91. * iwl3945_remove_station - Remove driver's knowledge of station.
  92. *
  93. * NOTE: This does not remove station from device's station table.
  94. */
  95. static u8 iwl3945_remove_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  96. {
  97. int index = IWL_INVALID_STATION;
  98. int i;
  99. unsigned long flags;
  100. spin_lock_irqsave(&priv->sta_lock, flags);
  101. if (is_ap)
  102. index = IWL_AP_ID;
  103. else if (is_broadcast_ether_addr(addr))
  104. index = priv->hw_params.bcast_sta_id;
  105. else
  106. for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++)
  107. if (priv->stations_39[i].used &&
  108. !compare_ether_addr(priv->stations_39[i].sta.sta.addr,
  109. addr)) {
  110. index = i;
  111. break;
  112. }
  113. if (unlikely(index == IWL_INVALID_STATION))
  114. goto out;
  115. if (priv->stations_39[index].used) {
  116. priv->stations_39[index].used = 0;
  117. priv->num_stations--;
  118. }
  119. BUG_ON(priv->num_stations < 0);
  120. out:
  121. spin_unlock_irqrestore(&priv->sta_lock, flags);
  122. return 0;
  123. }
  124. #endif
  125. /**
  126. * iwl3945_clear_stations_table - Clear the driver's station table
  127. *
  128. * NOTE: This does not clear or otherwise alter the device's station table.
  129. */
  130. void iwl3945_clear_stations_table(struct iwl_priv *priv)
  131. {
  132. unsigned long flags;
  133. spin_lock_irqsave(&priv->sta_lock, flags);
  134. priv->num_stations = 0;
  135. memset(priv->stations_39, 0, sizeof(priv->stations_39));
  136. spin_unlock_irqrestore(&priv->sta_lock, flags);
  137. }
  138. /**
  139. * iwl3945_add_station - Add station to station tables in driver and device
  140. */
  141. u8 iwl3945_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap, u8 flags, struct ieee80211_sta_ht_cap *ht_info)
  142. {
  143. int i;
  144. int index = IWL_INVALID_STATION;
  145. struct iwl3945_station_entry *station;
  146. unsigned long flags_spin;
  147. u8 rate;
  148. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  149. if (is_ap)
  150. index = IWL_AP_ID;
  151. else if (is_broadcast_ether_addr(addr))
  152. index = priv->hw_params.bcast_sta_id;
  153. else
  154. for (i = IWL_STA_ID; i < priv->hw_params.max_stations; i++) {
  155. if (!compare_ether_addr(priv->stations_39[i].sta.sta.addr,
  156. addr)) {
  157. index = i;
  158. break;
  159. }
  160. if (!priv->stations_39[i].used &&
  161. index == IWL_INVALID_STATION)
  162. index = i;
  163. }
  164. /* These two conditions has the same outcome but keep them separate
  165. since they have different meaning */
  166. if (unlikely(index == IWL_INVALID_STATION)) {
  167. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  168. return index;
  169. }
  170. if (priv->stations_39[index].used &&
  171. !compare_ether_addr(priv->stations_39[index].sta.sta.addr, addr)) {
  172. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  173. return index;
  174. }
  175. IWL_DEBUG_ASSOC(priv, "Add STA ID %d: %pM\n", index, addr);
  176. station = &priv->stations_39[index];
  177. station->used = 1;
  178. priv->num_stations++;
  179. /* Set up the REPLY_ADD_STA command to send to device */
  180. memset(&station->sta, 0, sizeof(struct iwl3945_addsta_cmd));
  181. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  182. station->sta.mode = 0;
  183. station->sta.sta.sta_id = index;
  184. station->sta.station_flags = 0;
  185. if (priv->band == IEEE80211_BAND_5GHZ)
  186. rate = IWL_RATE_6M_PLCP;
  187. else
  188. rate = IWL_RATE_1M_PLCP;
  189. /* Turn on both antennas for the station... */
  190. station->sta.rate_n_flags =
  191. iwl3945_hw_set_rate_n_flags(rate, RATE_MCS_ANT_AB_MSK);
  192. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  193. /* Add station to device's station table */
  194. iwl_send_add_sta(priv,
  195. (struct iwl_addsta_cmd *)&station->sta, flags);
  196. return index;
  197. }
  198. /**
  199. * iwl3945_get_antenna_flags - Get antenna flags for RXON command
  200. * @priv: eeprom and antenna fields are used to determine antenna flags
  201. *
  202. * priv->eeprom39 is used to determine if antenna AUX/MAIN are reversed
  203. * iwl3945_mod_params.antenna specifies the antenna diversity mode:
  204. *
  205. * IWL_ANTENNA_DIVERSITY - NIC selects best antenna by itself
  206. * IWL_ANTENNA_MAIN - Force MAIN antenna
  207. * IWL_ANTENNA_AUX - Force AUX antenna
  208. */
  209. __le32 iwl3945_get_antenna_flags(const struct iwl_priv *priv)
  210. {
  211. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  212. switch (iwl3945_mod_params.antenna) {
  213. case IWL_ANTENNA_DIVERSITY:
  214. return 0;
  215. case IWL_ANTENNA_MAIN:
  216. if (eeprom->antenna_switch_type)
  217. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  218. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  219. case IWL_ANTENNA_AUX:
  220. if (eeprom->antenna_switch_type)
  221. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_A_MSK;
  222. return RXON_FLG_DIS_DIV_MSK | RXON_FLG_ANT_B_MSK;
  223. }
  224. /* bad antenna selector value */
  225. IWL_ERR(priv, "Bad antenna selector value (0x%x)\n",
  226. iwl3945_mod_params.antenna);
  227. return 0; /* "diversity" is default if error */
  228. }
  229. static int iwl3945_set_ccmp_dynamic_key_info(struct iwl_priv *priv,
  230. struct ieee80211_key_conf *keyconf,
  231. u8 sta_id)
  232. {
  233. unsigned long flags;
  234. __le16 key_flags = 0;
  235. int ret;
  236. key_flags |= (STA_KEY_FLG_CCMP | STA_KEY_FLG_MAP_KEY_MSK);
  237. key_flags |= cpu_to_le16(keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  238. if (sta_id == priv->hw_params.bcast_sta_id)
  239. key_flags |= STA_KEY_MULTICAST_MSK;
  240. keyconf->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  241. keyconf->hw_key_idx = keyconf->keyidx;
  242. key_flags &= ~STA_KEY_FLG_INVALID;
  243. spin_lock_irqsave(&priv->sta_lock, flags);
  244. priv->stations_39[sta_id].keyinfo.alg = keyconf->alg;
  245. priv->stations_39[sta_id].keyinfo.keylen = keyconf->keylen;
  246. memcpy(priv->stations_39[sta_id].keyinfo.key, keyconf->key,
  247. keyconf->keylen);
  248. memcpy(priv->stations_39[sta_id].sta.key.key, keyconf->key,
  249. keyconf->keylen);
  250. if ((priv->stations_39[sta_id].sta.key.key_flags & STA_KEY_FLG_ENCRYPT_MSK)
  251. == STA_KEY_FLG_NO_ENC)
  252. priv->stations_39[sta_id].sta.key.key_offset =
  253. iwl_get_free_ucode_key_index(priv);
  254. /* else, we are overriding an existing key => no need to allocated room
  255. * in uCode. */
  256. WARN(priv->stations_39[sta_id].sta.key.key_offset == WEP_INVALID_OFFSET,
  257. "no space for a new key");
  258. priv->stations_39[sta_id].sta.key.key_flags = key_flags;
  259. priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  260. priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  261. IWL_DEBUG_INFO(priv, "hwcrypto: modify ucode station key info\n");
  262. ret = iwl_send_add_sta(priv,
  263. (struct iwl_addsta_cmd *)&priv->stations_39[sta_id].sta, CMD_ASYNC);
  264. spin_unlock_irqrestore(&priv->sta_lock, flags);
  265. return ret;
  266. }
  267. static int iwl3945_set_tkip_dynamic_key_info(struct iwl_priv *priv,
  268. struct ieee80211_key_conf *keyconf,
  269. u8 sta_id)
  270. {
  271. return -EOPNOTSUPP;
  272. }
  273. static int iwl3945_set_wep_dynamic_key_info(struct iwl_priv *priv,
  274. struct ieee80211_key_conf *keyconf,
  275. u8 sta_id)
  276. {
  277. return -EOPNOTSUPP;
  278. }
  279. static int iwl3945_clear_sta_key_info(struct iwl_priv *priv, u8 sta_id)
  280. {
  281. unsigned long flags;
  282. spin_lock_irqsave(&priv->sta_lock, flags);
  283. memset(&priv->stations_39[sta_id].keyinfo, 0, sizeof(struct iwl3945_hw_key));
  284. memset(&priv->stations_39[sta_id].sta.key, 0,
  285. sizeof(struct iwl4965_keyinfo));
  286. priv->stations_39[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  287. priv->stations_39[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  288. priv->stations_39[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  289. spin_unlock_irqrestore(&priv->sta_lock, flags);
  290. IWL_DEBUG_INFO(priv, "hwcrypto: clear ucode station key info\n");
  291. iwl_send_add_sta(priv,
  292. (struct iwl_addsta_cmd *)&priv->stations_39[sta_id].sta, 0);
  293. return 0;
  294. }
  295. static int iwl3945_set_dynamic_key(struct iwl_priv *priv,
  296. struct ieee80211_key_conf *keyconf, u8 sta_id)
  297. {
  298. int ret = 0;
  299. keyconf->hw_key_idx = HW_KEY_DYNAMIC;
  300. switch (keyconf->alg) {
  301. case ALG_CCMP:
  302. ret = iwl3945_set_ccmp_dynamic_key_info(priv, keyconf, sta_id);
  303. break;
  304. case ALG_TKIP:
  305. ret = iwl3945_set_tkip_dynamic_key_info(priv, keyconf, sta_id);
  306. break;
  307. case ALG_WEP:
  308. ret = iwl3945_set_wep_dynamic_key_info(priv, keyconf, sta_id);
  309. break;
  310. default:
  311. IWL_ERR(priv, "Unknown alg: %s alg = %d\n", __func__, keyconf->alg);
  312. ret = -EINVAL;
  313. }
  314. IWL_DEBUG_WEP(priv, "Set dynamic key: alg= %d len=%d idx=%d sta=%d ret=%d\n",
  315. keyconf->alg, keyconf->keylen, keyconf->keyidx,
  316. sta_id, ret);
  317. return ret;
  318. }
  319. static int iwl3945_remove_static_key(struct iwl_priv *priv)
  320. {
  321. int ret = -EOPNOTSUPP;
  322. return ret;
  323. }
  324. static int iwl3945_set_static_key(struct iwl_priv *priv,
  325. struct ieee80211_key_conf *key)
  326. {
  327. if (key->alg == ALG_WEP)
  328. return -EOPNOTSUPP;
  329. IWL_ERR(priv, "Static key invalid: alg %d\n", key->alg);
  330. return -EINVAL;
  331. }
  332. static void iwl3945_clear_free_frames(struct iwl_priv *priv)
  333. {
  334. struct list_head *element;
  335. IWL_DEBUG_INFO(priv, "%d frames on pre-allocated heap on clear.\n",
  336. priv->frames_count);
  337. while (!list_empty(&priv->free_frames)) {
  338. element = priv->free_frames.next;
  339. list_del(element);
  340. kfree(list_entry(element, struct iwl3945_frame, list));
  341. priv->frames_count--;
  342. }
  343. if (priv->frames_count) {
  344. IWL_WARN(priv, "%d frames still in use. Did we lose one?\n",
  345. priv->frames_count);
  346. priv->frames_count = 0;
  347. }
  348. }
  349. static struct iwl3945_frame *iwl3945_get_free_frame(struct iwl_priv *priv)
  350. {
  351. struct iwl3945_frame *frame;
  352. struct list_head *element;
  353. if (list_empty(&priv->free_frames)) {
  354. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  355. if (!frame) {
  356. IWL_ERR(priv, "Could not allocate frame!\n");
  357. return NULL;
  358. }
  359. priv->frames_count++;
  360. return frame;
  361. }
  362. element = priv->free_frames.next;
  363. list_del(element);
  364. return list_entry(element, struct iwl3945_frame, list);
  365. }
  366. static void iwl3945_free_frame(struct iwl_priv *priv, struct iwl3945_frame *frame)
  367. {
  368. memset(frame, 0, sizeof(*frame));
  369. list_add(&frame->list, &priv->free_frames);
  370. }
  371. unsigned int iwl3945_fill_beacon_frame(struct iwl_priv *priv,
  372. struct ieee80211_hdr *hdr,
  373. int left)
  374. {
  375. if (!iwl_is_associated(priv) || !priv->ibss_beacon ||
  376. ((priv->iw_mode != NL80211_IFTYPE_ADHOC) &&
  377. (priv->iw_mode != NL80211_IFTYPE_AP)))
  378. return 0;
  379. if (priv->ibss_beacon->len > left)
  380. return 0;
  381. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  382. return priv->ibss_beacon->len;
  383. }
  384. static int iwl3945_send_beacon_cmd(struct iwl_priv *priv)
  385. {
  386. struct iwl3945_frame *frame;
  387. unsigned int frame_size;
  388. int rc;
  389. u8 rate;
  390. frame = iwl3945_get_free_frame(priv);
  391. if (!frame) {
  392. IWL_ERR(priv, "Could not obtain free frame buffer for beacon "
  393. "command.\n");
  394. return -ENOMEM;
  395. }
  396. rate = iwl_rate_get_lowest_plcp(priv);
  397. frame_size = iwl3945_hw_get_beacon_cmd(priv, frame, rate);
  398. rc = iwl_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  399. &frame->u.cmd[0]);
  400. iwl3945_free_frame(priv, frame);
  401. return rc;
  402. }
  403. static void iwl3945_unset_hw_params(struct iwl_priv *priv)
  404. {
  405. if (priv->shared_virt)
  406. pci_free_consistent(priv->pci_dev,
  407. sizeof(struct iwl3945_shared),
  408. priv->shared_virt,
  409. priv->shared_phys);
  410. }
  411. #define MAX_UCODE_BEACON_INTERVAL 1024
  412. #define INTEL_CONN_LISTEN_INTERVAL cpu_to_le16(0xA)
  413. static __le16 iwl3945_adjust_beacon_interval(u16 beacon_val)
  414. {
  415. u16 new_val = 0;
  416. u16 beacon_factor = 0;
  417. beacon_factor =
  418. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  419. / MAX_UCODE_BEACON_INTERVAL;
  420. new_val = beacon_val / beacon_factor;
  421. return cpu_to_le16(new_val);
  422. }
  423. static void iwl3945_setup_rxon_timing(struct iwl_priv *priv)
  424. {
  425. u64 interval_tm_unit;
  426. u64 tsf, result;
  427. unsigned long flags;
  428. struct ieee80211_conf *conf = NULL;
  429. u16 beacon_int = 0;
  430. conf = ieee80211_get_hw_conf(priv->hw);
  431. spin_lock_irqsave(&priv->lock, flags);
  432. priv->rxon_timing.timestamp = cpu_to_le64(priv->timestamp);
  433. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  434. tsf = priv->timestamp;
  435. beacon_int = priv->beacon_int;
  436. spin_unlock_irqrestore(&priv->lock, flags);
  437. if (priv->iw_mode == NL80211_IFTYPE_STATION) {
  438. if (beacon_int == 0) {
  439. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  440. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  441. } else {
  442. priv->rxon_timing.beacon_interval =
  443. cpu_to_le16(beacon_int);
  444. priv->rxon_timing.beacon_interval =
  445. iwl3945_adjust_beacon_interval(
  446. le16_to_cpu(priv->rxon_timing.beacon_interval));
  447. }
  448. priv->rxon_timing.atim_window = 0;
  449. } else {
  450. priv->rxon_timing.beacon_interval =
  451. iwl3945_adjust_beacon_interval(conf->beacon_int);
  452. /* TODO: we need to get atim_window from upper stack
  453. * for now we set to 0 */
  454. priv->rxon_timing.atim_window = 0;
  455. }
  456. interval_tm_unit =
  457. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  458. result = do_div(tsf, interval_tm_unit);
  459. priv->rxon_timing.beacon_init_val =
  460. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  461. IWL_DEBUG_ASSOC(priv,
  462. "beacon interval %d beacon timer %d beacon tim %d\n",
  463. le16_to_cpu(priv->rxon_timing.beacon_interval),
  464. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  465. le16_to_cpu(priv->rxon_timing.atim_window));
  466. }
  467. static void iwl3945_build_tx_cmd_hwcrypto(struct iwl_priv *priv,
  468. struct ieee80211_tx_info *info,
  469. struct iwl_cmd *cmd,
  470. struct sk_buff *skb_frag,
  471. int sta_id)
  472. {
  473. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  474. struct iwl3945_hw_key *keyinfo =
  475. &priv->stations_39[sta_id].keyinfo;
  476. switch (keyinfo->alg) {
  477. case ALG_CCMP:
  478. tx->sec_ctl = TX_CMD_SEC_CCM;
  479. memcpy(tx->key, keyinfo->key, keyinfo->keylen);
  480. IWL_DEBUG_TX(priv, "tx_cmd with AES hwcrypto\n");
  481. break;
  482. case ALG_TKIP:
  483. break;
  484. case ALG_WEP:
  485. tx->sec_ctl = TX_CMD_SEC_WEP |
  486. (info->control.hw_key->hw_key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  487. if (keyinfo->keylen == 13)
  488. tx->sec_ctl |= TX_CMD_SEC_KEY128;
  489. memcpy(&tx->key[3], keyinfo->key, keyinfo->keylen);
  490. IWL_DEBUG_TX(priv, "Configuring packet for WEP encryption "
  491. "with key %d\n", info->control.hw_key->hw_key_idx);
  492. break;
  493. default:
  494. IWL_ERR(priv, "Unknown encode alg %d\n", keyinfo->alg);
  495. break;
  496. }
  497. }
  498. /*
  499. * handle build REPLY_TX command notification.
  500. */
  501. static void iwl3945_build_tx_cmd_basic(struct iwl_priv *priv,
  502. struct iwl_cmd *cmd,
  503. struct ieee80211_tx_info *info,
  504. struct ieee80211_hdr *hdr, u8 std_id)
  505. {
  506. struct iwl3945_tx_cmd *tx = (struct iwl3945_tx_cmd *)cmd->cmd.payload;
  507. __le32 tx_flags = tx->tx_flags;
  508. __le16 fc = hdr->frame_control;
  509. u8 rc_flags = info->control.rates[0].flags;
  510. tx->stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  511. if (!(info->flags & IEEE80211_TX_CTL_NO_ACK)) {
  512. tx_flags |= TX_CMD_FLG_ACK_MSK;
  513. if (ieee80211_is_mgmt(fc))
  514. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  515. if (ieee80211_is_probe_resp(fc) &&
  516. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  517. tx_flags |= TX_CMD_FLG_TSF_MSK;
  518. } else {
  519. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  520. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  521. }
  522. tx->sta_id = std_id;
  523. if (ieee80211_has_morefrags(fc))
  524. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  525. if (ieee80211_is_data_qos(fc)) {
  526. u8 *qc = ieee80211_get_qos_ctl(hdr);
  527. tx->tid_tspec = qc[0] & 0xf;
  528. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  529. } else {
  530. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  531. }
  532. if (rc_flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  533. tx_flags |= TX_CMD_FLG_RTS_MSK;
  534. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  535. } else if (rc_flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  536. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  537. tx_flags |= TX_CMD_FLG_CTS_MSK;
  538. }
  539. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  540. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  541. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  542. if (ieee80211_is_mgmt(fc)) {
  543. if (ieee80211_is_assoc_req(fc) || ieee80211_is_reassoc_req(fc))
  544. tx->timeout.pm_frame_timeout = cpu_to_le16(3);
  545. else
  546. tx->timeout.pm_frame_timeout = cpu_to_le16(2);
  547. } else {
  548. tx->timeout.pm_frame_timeout = 0;
  549. #ifdef CONFIG_IWLWIFI_LEDS
  550. priv->rxtxpackets += le16_to_cpu(cmd->cmd.tx.len);
  551. #endif
  552. }
  553. tx->driver_txop = 0;
  554. tx->tx_flags = tx_flags;
  555. tx->next_frame_len = 0;
  556. }
  557. /*
  558. * start REPLY_TX command process
  559. */
  560. static int iwl3945_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
  561. {
  562. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  563. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  564. struct iwl3945_tx_cmd *tx;
  565. struct iwl_tx_queue *txq = NULL;
  566. struct iwl_queue *q = NULL;
  567. struct iwl_cmd *out_cmd = NULL;
  568. dma_addr_t phys_addr;
  569. dma_addr_t txcmd_phys;
  570. int txq_id = skb_get_queue_mapping(skb);
  571. u16 len, idx, len_org, hdr_len;
  572. u8 id;
  573. u8 unicast;
  574. u8 sta_id;
  575. u8 tid = 0;
  576. u16 seq_number = 0;
  577. __le16 fc;
  578. u8 wait_write_ptr = 0;
  579. u8 *qc = NULL;
  580. unsigned long flags;
  581. int rc;
  582. spin_lock_irqsave(&priv->lock, flags);
  583. if (iwl_is_rfkill(priv)) {
  584. IWL_DEBUG_DROP(priv, "Dropping - RF KILL\n");
  585. goto drop_unlock;
  586. }
  587. if ((ieee80211_get_tx_rate(priv->hw, info)->hw_value & 0xFF) == IWL_INVALID_RATE) {
  588. IWL_ERR(priv, "ERROR: No TX rate available.\n");
  589. goto drop_unlock;
  590. }
  591. unicast = !is_multicast_ether_addr(hdr->addr1);
  592. id = 0;
  593. fc = hdr->frame_control;
  594. #ifdef CONFIG_IWLWIFI_DEBUG
  595. if (ieee80211_is_auth(fc))
  596. IWL_DEBUG_TX(priv, "Sending AUTH frame\n");
  597. else if (ieee80211_is_assoc_req(fc))
  598. IWL_DEBUG_TX(priv, "Sending ASSOC frame\n");
  599. else if (ieee80211_is_reassoc_req(fc))
  600. IWL_DEBUG_TX(priv, "Sending REASSOC frame\n");
  601. #endif
  602. /* drop all data frame if we are not associated */
  603. if (ieee80211_is_data(fc) &&
  604. (priv->iw_mode != NL80211_IFTYPE_MONITOR) && /* packet injection */
  605. (!iwl_is_associated(priv) ||
  606. ((priv->iw_mode == NL80211_IFTYPE_STATION) && !priv->assoc_id))) {
  607. IWL_DEBUG_DROP(priv, "Dropping - !iwl_is_associated\n");
  608. goto drop_unlock;
  609. }
  610. spin_unlock_irqrestore(&priv->lock, flags);
  611. hdr_len = ieee80211_hdrlen(fc);
  612. /* Find (or create) index into station table for destination station */
  613. sta_id = iwl_get_sta_id(priv, hdr);
  614. if (sta_id == IWL_INVALID_STATION) {
  615. IWL_DEBUG_DROP(priv, "Dropping - INVALID STATION: %pM\n",
  616. hdr->addr1);
  617. goto drop;
  618. }
  619. IWL_DEBUG_RATE(priv, "station Id %d\n", sta_id);
  620. if (ieee80211_is_data_qos(fc)) {
  621. qc = ieee80211_get_qos_ctl(hdr);
  622. tid = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  623. seq_number = priv->stations_39[sta_id].tid[tid].seq_number &
  624. IEEE80211_SCTL_SEQ;
  625. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  626. (hdr->seq_ctrl &
  627. cpu_to_le16(IEEE80211_SCTL_FRAG));
  628. seq_number += 0x10;
  629. }
  630. /* Descriptor for chosen Tx queue */
  631. txq = &priv->txq[txq_id];
  632. q = &txq->q;
  633. spin_lock_irqsave(&priv->lock, flags);
  634. idx = get_cmd_index(q, q->write_ptr, 0);
  635. /* Set up driver data for this TFD */
  636. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl_tx_info));
  637. txq->txb[q->write_ptr].skb[0] = skb;
  638. /* Init first empty entry in queue's array of Tx/cmd buffers */
  639. out_cmd = txq->cmd[idx];
  640. tx = (struct iwl3945_tx_cmd *)out_cmd->cmd.payload;
  641. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  642. memset(tx, 0, sizeof(*tx));
  643. /*
  644. * Set up the Tx-command (not MAC!) header.
  645. * Store the chosen Tx queue and TFD index within the sequence field;
  646. * after Tx, uCode's Tx response will return this value so driver can
  647. * locate the frame within the tx queue and do post-tx processing.
  648. */
  649. out_cmd->hdr.cmd = REPLY_TX;
  650. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  651. INDEX_TO_SEQ(q->write_ptr)));
  652. /* Copy MAC header from skb into command buffer */
  653. memcpy(tx->hdr, hdr, hdr_len);
  654. /*
  655. * Use the first empty entry in this queue's command buffer array
  656. * to contain the Tx command and MAC header concatenated together
  657. * (payload data will be in another buffer).
  658. * Size of this varies, due to varying MAC header length.
  659. * If end is not dword aligned, we'll have 2 extra bytes at the end
  660. * of the MAC header (device reads on dword boundaries).
  661. * We'll tell device about this padding later.
  662. */
  663. len = sizeof(struct iwl3945_tx_cmd) +
  664. sizeof(struct iwl_cmd_header) + hdr_len;
  665. len_org = len;
  666. len = (len + 3) & ~3;
  667. if (len_org != len)
  668. len_org = 1;
  669. else
  670. len_org = 0;
  671. /* Physical address of this Tx command's header (not MAC header!),
  672. * within command buffer array. */
  673. txcmd_phys = pci_map_single(priv->pci_dev,
  674. out_cmd, sizeof(struct iwl_cmd),
  675. PCI_DMA_TODEVICE);
  676. pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
  677. pci_unmap_len_set(&out_cmd->meta, len, sizeof(struct iwl_cmd));
  678. /* Add buffer containing Tx command and MAC(!) header to TFD's
  679. * first entry */
  680. txcmd_phys += offsetof(struct iwl_cmd, hdr);
  681. /* Add buffer containing Tx command and MAC(!) header to TFD's
  682. * first entry */
  683. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  684. txcmd_phys, len, 1, 0);
  685. if (info->control.hw_key)
  686. iwl3945_build_tx_cmd_hwcrypto(priv, info, out_cmd, skb, sta_id);
  687. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  688. * if any (802.11 null frames have no payload). */
  689. len = skb->len - hdr_len;
  690. if (len) {
  691. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  692. len, PCI_DMA_TODEVICE);
  693. priv->cfg->ops->lib->txq_attach_buf_to_tfd(priv, txq,
  694. phys_addr, len,
  695. 0, U32_PAD(len));
  696. }
  697. /* Total # bytes to be transmitted */
  698. len = (u16)skb->len;
  699. tx->len = cpu_to_le16(len);
  700. /* TODO need this for burst mode later on */
  701. iwl3945_build_tx_cmd_basic(priv, out_cmd, info, hdr, sta_id);
  702. /* set is_hcca to 0; it probably will never be implemented */
  703. iwl3945_hw_build_tx_cmd_rate(priv, out_cmd, info, hdr, sta_id, 0);
  704. tx->tx_flags &= ~TX_CMD_FLG_ANT_A_MSK;
  705. tx->tx_flags &= ~TX_CMD_FLG_ANT_B_MSK;
  706. if (!ieee80211_has_morefrags(hdr->frame_control)) {
  707. txq->need_update = 1;
  708. if (qc)
  709. priv->stations_39[sta_id].tid[tid].seq_number = seq_number;
  710. } else {
  711. wait_write_ptr = 1;
  712. txq->need_update = 0;
  713. }
  714. iwl_print_hex_dump(priv, IWL_DL_TX, tx, sizeof(*tx));
  715. iwl_print_hex_dump(priv, IWL_DL_TX, (u8 *)tx->hdr,
  716. ieee80211_hdrlen(fc));
  717. /* Tell device the write index *just past* this latest filled TFD */
  718. q->write_ptr = iwl_queue_inc_wrap(q->write_ptr, q->n_bd);
  719. rc = iwl_txq_update_write_ptr(priv, txq);
  720. spin_unlock_irqrestore(&priv->lock, flags);
  721. if (rc)
  722. return rc;
  723. if ((iwl_queue_space(q) < q->high_mark)
  724. && priv->mac80211_registered) {
  725. if (wait_write_ptr) {
  726. spin_lock_irqsave(&priv->lock, flags);
  727. txq->need_update = 1;
  728. iwl_txq_update_write_ptr(priv, txq);
  729. spin_unlock_irqrestore(&priv->lock, flags);
  730. }
  731. iwl_stop_queue(priv, skb_get_queue_mapping(skb));
  732. }
  733. return 0;
  734. drop_unlock:
  735. spin_unlock_irqrestore(&priv->lock, flags);
  736. drop:
  737. return -1;
  738. }
  739. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  740. #include "iwl-spectrum.h"
  741. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  742. #define BEACON_TIME_MASK_HIGH 0xFF000000
  743. #define TIME_UNIT 1024
  744. /*
  745. * extended beacon time format
  746. * time in usec will be changed into a 32-bit value in 8:24 format
  747. * the high 1 byte is the beacon counts
  748. * the lower 3 bytes is the time in usec within one beacon interval
  749. */
  750. static u32 iwl3945_usecs_to_beacons(u32 usec, u32 beacon_interval)
  751. {
  752. u32 quot;
  753. u32 rem;
  754. u32 interval = beacon_interval * 1024;
  755. if (!interval || !usec)
  756. return 0;
  757. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  758. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  759. return (quot << 24) + rem;
  760. }
  761. /* base is usually what we get from ucode with each received frame,
  762. * the same as HW timer counter counting down
  763. */
  764. static __le32 iwl3945_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  765. {
  766. u32 base_low = base & BEACON_TIME_MASK_LOW;
  767. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  768. u32 interval = beacon_interval * TIME_UNIT;
  769. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  770. (addon & BEACON_TIME_MASK_HIGH);
  771. if (base_low > addon_low)
  772. res += base_low - addon_low;
  773. else if (base_low < addon_low) {
  774. res += interval + base_low - addon_low;
  775. res += (1 << 24);
  776. } else
  777. res += (1 << 24);
  778. return cpu_to_le32(res);
  779. }
  780. static int iwl3945_get_measurement(struct iwl_priv *priv,
  781. struct ieee80211_measurement_params *params,
  782. u8 type)
  783. {
  784. struct iwl_spectrum_cmd spectrum;
  785. struct iwl_rx_packet *res;
  786. struct iwl_host_cmd cmd = {
  787. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  788. .data = (void *)&spectrum,
  789. .meta.flags = CMD_WANT_SKB,
  790. };
  791. u32 add_time = le64_to_cpu(params->start_time);
  792. int rc;
  793. int spectrum_resp_status;
  794. int duration = le16_to_cpu(params->duration);
  795. if (iwl_is_associated(priv))
  796. add_time =
  797. iwl3945_usecs_to_beacons(
  798. le64_to_cpu(params->start_time) - priv->last_tsf,
  799. le16_to_cpu(priv->rxon_timing.beacon_interval));
  800. memset(&spectrum, 0, sizeof(spectrum));
  801. spectrum.channel_count = cpu_to_le16(1);
  802. spectrum.flags =
  803. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  804. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  805. cmd.len = sizeof(spectrum);
  806. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  807. if (iwl_is_associated(priv))
  808. spectrum.start_time =
  809. iwl3945_add_beacon_time(priv->last_beacon_time,
  810. add_time,
  811. le16_to_cpu(priv->rxon_timing.beacon_interval));
  812. else
  813. spectrum.start_time = 0;
  814. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  815. spectrum.channels[0].channel = params->channel;
  816. spectrum.channels[0].type = type;
  817. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  818. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  819. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  820. rc = iwl_send_cmd_sync(priv, &cmd);
  821. if (rc)
  822. return rc;
  823. res = (struct iwl_rx_packet *)cmd.meta.u.skb->data;
  824. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  825. IWL_ERR(priv, "Bad return from REPLY_RX_ON_ASSOC command\n");
  826. rc = -EIO;
  827. }
  828. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  829. switch (spectrum_resp_status) {
  830. case 0: /* Command will be handled */
  831. if (res->u.spectrum.id != 0xff) {
  832. IWL_DEBUG_INFO(priv, "Replaced existing measurement: %d\n",
  833. res->u.spectrum.id);
  834. priv->measurement_status &= ~MEASUREMENT_READY;
  835. }
  836. priv->measurement_status |= MEASUREMENT_ACTIVE;
  837. rc = 0;
  838. break;
  839. case 1: /* Command will not be handled */
  840. rc = -EAGAIN;
  841. break;
  842. }
  843. dev_kfree_skb_any(cmd.meta.u.skb);
  844. return rc;
  845. }
  846. #endif
  847. static void iwl3945_rx_reply_alive(struct iwl_priv *priv,
  848. struct iwl_rx_mem_buffer *rxb)
  849. {
  850. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  851. struct iwl_alive_resp *palive;
  852. struct delayed_work *pwork;
  853. palive = &pkt->u.alive_frame;
  854. IWL_DEBUG_INFO(priv, "Alive ucode status 0x%08X revision "
  855. "0x%01X 0x%01X\n",
  856. palive->is_valid, palive->ver_type,
  857. palive->ver_subtype);
  858. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  859. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  860. memcpy(&priv->card_alive_init, &pkt->u.alive_frame,
  861. sizeof(struct iwl_alive_resp));
  862. pwork = &priv->init_alive_start;
  863. } else {
  864. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  865. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  866. sizeof(struct iwl_alive_resp));
  867. pwork = &priv->alive_start;
  868. iwl3945_disable_events(priv);
  869. }
  870. /* We delay the ALIVE response by 5ms to
  871. * give the HW RF Kill time to activate... */
  872. if (palive->is_valid == UCODE_VALID_OK)
  873. queue_delayed_work(priv->workqueue, pwork,
  874. msecs_to_jiffies(5));
  875. else
  876. IWL_WARN(priv, "uCode did not respond OK.\n");
  877. }
  878. static void iwl3945_rx_reply_add_sta(struct iwl_priv *priv,
  879. struct iwl_rx_mem_buffer *rxb)
  880. {
  881. #ifdef CONFIG_IWLWIFI_DEBUG
  882. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  883. #endif
  884. IWL_DEBUG_RX(priv, "Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  885. return;
  886. }
  887. static void iwl3945_bg_beacon_update(struct work_struct *work)
  888. {
  889. struct iwl_priv *priv =
  890. container_of(work, struct iwl_priv, beacon_update);
  891. struct sk_buff *beacon;
  892. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  893. beacon = ieee80211_beacon_get(priv->hw, priv->vif);
  894. if (!beacon) {
  895. IWL_ERR(priv, "update beacon failed\n");
  896. return;
  897. }
  898. mutex_lock(&priv->mutex);
  899. /* new beacon skb is allocated every time; dispose previous.*/
  900. if (priv->ibss_beacon)
  901. dev_kfree_skb(priv->ibss_beacon);
  902. priv->ibss_beacon = beacon;
  903. mutex_unlock(&priv->mutex);
  904. iwl3945_send_beacon_cmd(priv);
  905. }
  906. static void iwl3945_rx_beacon_notif(struct iwl_priv *priv,
  907. struct iwl_rx_mem_buffer *rxb)
  908. {
  909. #ifdef CONFIG_IWLWIFI_DEBUG
  910. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  911. struct iwl3945_beacon_notif *beacon = &(pkt->u.beacon_status);
  912. u8 rate = beacon->beacon_notify_hdr.rate;
  913. IWL_DEBUG_RX(priv, "beacon status %x retries %d iss %d "
  914. "tsf %d %d rate %d\n",
  915. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  916. beacon->beacon_notify_hdr.failure_frame,
  917. le32_to_cpu(beacon->ibss_mgr_status),
  918. le32_to_cpu(beacon->high_tsf),
  919. le32_to_cpu(beacon->low_tsf), rate);
  920. #endif
  921. if ((priv->iw_mode == NL80211_IFTYPE_AP) &&
  922. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  923. queue_work(priv->workqueue, &priv->beacon_update);
  924. }
  925. /* Handle notification from uCode that card's power state is changing
  926. * due to software, hardware, or critical temperature RFKILL */
  927. static void iwl3945_rx_card_state_notif(struct iwl_priv *priv,
  928. struct iwl_rx_mem_buffer *rxb)
  929. {
  930. struct iwl_rx_packet *pkt = (void *)rxb->skb->data;
  931. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  932. unsigned long status = priv->status;
  933. IWL_DEBUG_RF_KILL(priv, "Card state received: HW:%s SW:%s\n",
  934. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  935. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  936. iwl_write32(priv, CSR_UCODE_DRV_GP1_SET,
  937. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  938. if (flags & HW_CARD_DISABLED)
  939. set_bit(STATUS_RF_KILL_HW, &priv->status);
  940. else
  941. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  942. if (flags & SW_CARD_DISABLED)
  943. set_bit(STATUS_RF_KILL_SW, &priv->status);
  944. else
  945. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  946. iwl_scan_cancel(priv);
  947. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  948. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  949. (test_bit(STATUS_RF_KILL_SW, &status) !=
  950. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  951. queue_work(priv->workqueue, &priv->rf_kill);
  952. else
  953. wake_up_interruptible(&priv->wait_command_queue);
  954. }
  955. /**
  956. * iwl3945_setup_rx_handlers - Initialize Rx handler callbacks
  957. *
  958. * Setup the RX handlers for each of the reply types sent from the uCode
  959. * to the host.
  960. *
  961. * This function chains into the hardware specific files for them to setup
  962. * any hardware specific handlers as well.
  963. */
  964. static void iwl3945_setup_rx_handlers(struct iwl_priv *priv)
  965. {
  966. priv->rx_handlers[REPLY_ALIVE] = iwl3945_rx_reply_alive;
  967. priv->rx_handlers[REPLY_ADD_STA] = iwl3945_rx_reply_add_sta;
  968. priv->rx_handlers[REPLY_ERROR] = iwl_rx_reply_error;
  969. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl_rx_csa;
  970. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl_rx_pm_sleep_notif;
  971. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  972. iwl_rx_pm_debug_statistics_notif;
  973. priv->rx_handlers[BEACON_NOTIFICATION] = iwl3945_rx_beacon_notif;
  974. /*
  975. * The same handler is used for both the REPLY to a discrete
  976. * statistics request from the host as well as for the periodic
  977. * statistics notifications (after received beacons) from the uCode.
  978. */
  979. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl3945_hw_rx_statistics;
  980. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl3945_hw_rx_statistics;
  981. iwl_setup_spectrum_handlers(priv);
  982. iwl_setup_rx_scan_handlers(priv);
  983. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl3945_rx_card_state_notif;
  984. /* Set up hardware specific Rx handlers */
  985. iwl3945_hw_rx_handler_setup(priv);
  986. }
  987. /************************** RX-FUNCTIONS ****************************/
  988. /*
  989. * Rx theory of operation
  990. *
  991. * The host allocates 32 DMA target addresses and passes the host address
  992. * to the firmware at register IWL_RFDS_TABLE_LOWER + N * RFD_SIZE where N is
  993. * 0 to 31
  994. *
  995. * Rx Queue Indexes
  996. * The host/firmware share two index registers for managing the Rx buffers.
  997. *
  998. * The READ index maps to the first position that the firmware may be writing
  999. * to -- the driver can read up to (but not including) this position and get
  1000. * good data.
  1001. * The READ index is managed by the firmware once the card is enabled.
  1002. *
  1003. * The WRITE index maps to the last position the driver has read from -- the
  1004. * position preceding WRITE is the last slot the firmware can place a packet.
  1005. *
  1006. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  1007. * WRITE = READ.
  1008. *
  1009. * During initialization, the host sets up the READ queue position to the first
  1010. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  1011. *
  1012. * When the firmware places a packet in a buffer, it will advance the READ index
  1013. * and fire the RX interrupt. The driver can then query the READ index and
  1014. * process as many packets as possible, moving the WRITE index forward as it
  1015. * resets the Rx queue buffers with new memory.
  1016. *
  1017. * The management in the driver is as follows:
  1018. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  1019. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  1020. * to replenish the iwl->rxq->rx_free.
  1021. * + In iwl3945_rx_replenish (scheduled) if 'processed' != 'read' then the
  1022. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  1023. * 'processed' and 'read' driver indexes as well)
  1024. * + A received packet is processed and handed to the kernel network stack,
  1025. * detached from the iwl->rxq. The driver 'processed' index is updated.
  1026. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  1027. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  1028. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  1029. * were enough free buffers and RX_STALLED is set it is cleared.
  1030. *
  1031. *
  1032. * Driver sequence:
  1033. *
  1034. * iwl3945_rx_replenish() Replenishes rx_free list from rx_used, and calls
  1035. * iwl3945_rx_queue_restock
  1036. * iwl3945_rx_queue_restock() Moves available buffers from rx_free into Rx
  1037. * queue, updates firmware pointers, and updates
  1038. * the WRITE index. If insufficient rx_free buffers
  1039. * are available, schedules iwl3945_rx_replenish
  1040. *
  1041. * -- enable interrupts --
  1042. * ISR - iwl3945_rx() Detach iwl_rx_mem_buffers from pool up to the
  1043. * READ INDEX, detaching the SKB from the pool.
  1044. * Moves the packet buffer from queue to rx_used.
  1045. * Calls iwl3945_rx_queue_restock to refill any empty
  1046. * slots.
  1047. * ...
  1048. *
  1049. */
  1050. /**
  1051. * iwl3945_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  1052. */
  1053. static inline __le32 iwl3945_dma_addr2rbd_ptr(struct iwl_priv *priv,
  1054. dma_addr_t dma_addr)
  1055. {
  1056. return cpu_to_le32((u32)dma_addr);
  1057. }
  1058. /**
  1059. * iwl3945_rx_queue_restock - refill RX queue from pre-allocated pool
  1060. *
  1061. * If there are slots in the RX queue that need to be restocked,
  1062. * and we have free pre-allocated buffers, fill the ranks as much
  1063. * as we can, pulling from rx_free.
  1064. *
  1065. * This moves the 'write' index forward to catch up with 'processed', and
  1066. * also updates the memory address in the firmware to reference the new
  1067. * target buffer.
  1068. */
  1069. static int iwl3945_rx_queue_restock(struct iwl_priv *priv)
  1070. {
  1071. struct iwl_rx_queue *rxq = &priv->rxq;
  1072. struct list_head *element;
  1073. struct iwl_rx_mem_buffer *rxb;
  1074. unsigned long flags;
  1075. int write, rc;
  1076. spin_lock_irqsave(&rxq->lock, flags);
  1077. write = rxq->write & ~0x7;
  1078. while ((iwl_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  1079. /* Get next free Rx buffer, remove from free list */
  1080. element = rxq->rx_free.next;
  1081. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  1082. list_del(element);
  1083. /* Point to Rx buffer via next RBD in circular buffer */
  1084. rxq->bd[rxq->write] = iwl3945_dma_addr2rbd_ptr(priv, rxb->real_dma_addr);
  1085. rxq->queue[rxq->write] = rxb;
  1086. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  1087. rxq->free_count--;
  1088. }
  1089. spin_unlock_irqrestore(&rxq->lock, flags);
  1090. /* If the pre-allocated buffer pool is dropping low, schedule to
  1091. * refill it */
  1092. if (rxq->free_count <= RX_LOW_WATERMARK)
  1093. queue_work(priv->workqueue, &priv->rx_replenish);
  1094. /* If we've added more space for the firmware to place data, tell it.
  1095. * Increment device's write pointer in multiples of 8. */
  1096. if ((write != (rxq->write & ~0x7))
  1097. || (abs(rxq->write - rxq->read) > 7)) {
  1098. spin_lock_irqsave(&rxq->lock, flags);
  1099. rxq->need_update = 1;
  1100. spin_unlock_irqrestore(&rxq->lock, flags);
  1101. rc = iwl_rx_queue_update_write_ptr(priv, rxq);
  1102. if (rc)
  1103. return rc;
  1104. }
  1105. return 0;
  1106. }
  1107. /**
  1108. * iwl3945_rx_replenish - Move all used packet from rx_used to rx_free
  1109. *
  1110. * When moving to rx_free an SKB is allocated for the slot.
  1111. *
  1112. * Also restock the Rx queue via iwl3945_rx_queue_restock.
  1113. * This is called as a scheduled work item (except for during initialization)
  1114. */
  1115. static void iwl3945_rx_allocate(struct iwl_priv *priv)
  1116. {
  1117. struct iwl_rx_queue *rxq = &priv->rxq;
  1118. struct list_head *element;
  1119. struct iwl_rx_mem_buffer *rxb;
  1120. unsigned long flags;
  1121. spin_lock_irqsave(&rxq->lock, flags);
  1122. while (!list_empty(&rxq->rx_used)) {
  1123. element = rxq->rx_used.next;
  1124. rxb = list_entry(element, struct iwl_rx_mem_buffer, list);
  1125. /* Alloc a new receive buffer */
  1126. rxb->skb =
  1127. alloc_skb(priv->hw_params.rx_buf_size,
  1128. __GFP_NOWARN | GFP_ATOMIC);
  1129. if (!rxb->skb) {
  1130. if (net_ratelimit())
  1131. IWL_CRIT(priv, ": Can not allocate SKB buffers\n");
  1132. /* We don't reschedule replenish work here -- we will
  1133. * call the restock method and if it still needs
  1134. * more buffers it will schedule replenish */
  1135. break;
  1136. }
  1137. /* If radiotap head is required, reserve some headroom here.
  1138. * The physical head count is a variable rx_stats->phy_count.
  1139. * We reserve 4 bytes here. Plus these extra bytes, the
  1140. * headroom of the physical head should be enough for the
  1141. * radiotap head that iwl3945 supported. See iwl3945_rt.
  1142. */
  1143. skb_reserve(rxb->skb, 4);
  1144. priv->alloc_rxb_skb++;
  1145. list_del(element);
  1146. /* Get physical address of RB/SKB */
  1147. rxb->real_dma_addr = pci_map_single(priv->pci_dev,
  1148. rxb->skb->data,
  1149. priv->hw_params.rx_buf_size,
  1150. PCI_DMA_FROMDEVICE);
  1151. list_add_tail(&rxb->list, &rxq->rx_free);
  1152. rxq->free_count++;
  1153. }
  1154. spin_unlock_irqrestore(&rxq->lock, flags);
  1155. }
  1156. /*
  1157. * this should be called while priv->lock is locked
  1158. */
  1159. static void __iwl3945_rx_replenish(void *data)
  1160. {
  1161. struct iwl_priv *priv = data;
  1162. iwl3945_rx_allocate(priv);
  1163. iwl3945_rx_queue_restock(priv);
  1164. }
  1165. void iwl3945_rx_replenish(void *data)
  1166. {
  1167. struct iwl_priv *priv = data;
  1168. unsigned long flags;
  1169. iwl3945_rx_allocate(priv);
  1170. spin_lock_irqsave(&priv->lock, flags);
  1171. iwl3945_rx_queue_restock(priv);
  1172. spin_unlock_irqrestore(&priv->lock, flags);
  1173. }
  1174. /* Convert linear signal-to-noise ratio into dB */
  1175. static u8 ratio2dB[100] = {
  1176. /* 0 1 2 3 4 5 6 7 8 9 */
  1177. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  1178. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  1179. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  1180. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  1181. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  1182. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  1183. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  1184. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  1185. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  1186. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  1187. };
  1188. /* Calculates a relative dB value from a ratio of linear
  1189. * (i.e. not dB) signal levels.
  1190. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  1191. int iwl3945_calc_db_from_ratio(int sig_ratio)
  1192. {
  1193. /* 1000:1 or higher just report as 60 dB */
  1194. if (sig_ratio >= 1000)
  1195. return 60;
  1196. /* 100:1 or higher, divide by 10 and use table,
  1197. * add 20 dB to make up for divide by 10 */
  1198. if (sig_ratio >= 100)
  1199. return 20 + (int)ratio2dB[sig_ratio/10];
  1200. /* We shouldn't see this */
  1201. if (sig_ratio < 1)
  1202. return 0;
  1203. /* Use table for ratios 1:1 - 99:1 */
  1204. return (int)ratio2dB[sig_ratio];
  1205. }
  1206. #define PERFECT_RSSI (-20) /* dBm */
  1207. #define WORST_RSSI (-95) /* dBm */
  1208. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  1209. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  1210. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  1211. * about formulas used below. */
  1212. int iwl3945_calc_sig_qual(int rssi_dbm, int noise_dbm)
  1213. {
  1214. int sig_qual;
  1215. int degradation = PERFECT_RSSI - rssi_dbm;
  1216. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  1217. * as indicator; formula is (signal dbm - noise dbm).
  1218. * SNR at or above 40 is a great signal (100%).
  1219. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  1220. * Weakest usable signal is usually 10 - 15 dB SNR. */
  1221. if (noise_dbm) {
  1222. if (rssi_dbm - noise_dbm >= 40)
  1223. return 100;
  1224. else if (rssi_dbm < noise_dbm)
  1225. return 0;
  1226. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  1227. /* Else use just the signal level.
  1228. * This formula is a least squares fit of data points collected and
  1229. * compared with a reference system that had a percentage (%) display
  1230. * for signal quality. */
  1231. } else
  1232. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  1233. (15 * RSSI_RANGE + 62 * degradation)) /
  1234. (RSSI_RANGE * RSSI_RANGE);
  1235. if (sig_qual > 100)
  1236. sig_qual = 100;
  1237. else if (sig_qual < 1)
  1238. sig_qual = 0;
  1239. return sig_qual;
  1240. }
  1241. /**
  1242. * iwl3945_rx_handle - Main entry function for receiving responses from uCode
  1243. *
  1244. * Uses the priv->rx_handlers callback function array to invoke
  1245. * the appropriate handlers, including command responses,
  1246. * frame-received notifications, and other notifications.
  1247. */
  1248. static void iwl3945_rx_handle(struct iwl_priv *priv)
  1249. {
  1250. struct iwl_rx_mem_buffer *rxb;
  1251. struct iwl_rx_packet *pkt;
  1252. struct iwl_rx_queue *rxq = &priv->rxq;
  1253. u32 r, i;
  1254. int reclaim;
  1255. unsigned long flags;
  1256. u8 fill_rx = 0;
  1257. u32 count = 8;
  1258. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  1259. * buffer that the driver may process (last buffer filled by ucode). */
  1260. r = le16_to_cpu(rxq->rb_stts->closed_rb_num) & 0x0FFF;
  1261. i = rxq->read;
  1262. if (iwl_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  1263. fill_rx = 1;
  1264. /* Rx interrupt, but nothing sent from uCode */
  1265. if (i == r)
  1266. IWL_DEBUG(priv, IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  1267. while (i != r) {
  1268. rxb = rxq->queue[i];
  1269. /* If an RXB doesn't have a Rx queue slot associated with it,
  1270. * then a bug has been introduced in the queue refilling
  1271. * routines -- catch it here */
  1272. BUG_ON(rxb == NULL);
  1273. rxq->queue[i] = NULL;
  1274. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->real_dma_addr,
  1275. priv->hw_params.rx_buf_size,
  1276. PCI_DMA_FROMDEVICE);
  1277. pkt = (struct iwl_rx_packet *)rxb->skb->data;
  1278. /* Reclaim a command buffer only if this packet is a response
  1279. * to a (driver-originated) command.
  1280. * If the packet (e.g. Rx frame) originated from uCode,
  1281. * there is no command buffer to reclaim.
  1282. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  1283. * but apparently a few don't get set; catch them here. */
  1284. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  1285. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  1286. (pkt->hdr.cmd != REPLY_TX);
  1287. /* Based on type of command response or notification,
  1288. * handle those that need handling via function in
  1289. * rx_handlers table. See iwl3945_setup_rx_handlers() */
  1290. if (priv->rx_handlers[pkt->hdr.cmd]) {
  1291. IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
  1292. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  1293. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  1294. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  1295. priv->isr_stats.rx_handlers[pkt->hdr.cmd]++;
  1296. } else {
  1297. /* No handling needed */
  1298. IWL_DEBUG(priv, IWL_DL_HCMD | IWL_DL_RX | IWL_DL_ISR,
  1299. "r %d i %d No handler needed for %s, 0x%02x\n",
  1300. r, i, get_cmd_string(pkt->hdr.cmd),
  1301. pkt->hdr.cmd);
  1302. }
  1303. if (reclaim) {
  1304. /* Invoke any callbacks, transfer the skb to caller, and
  1305. * fire off the (possibly) blocking iwl_send_cmd()
  1306. * as we reclaim the driver command queue */
  1307. if (rxb && rxb->skb)
  1308. iwl_tx_cmd_complete(priv, rxb);
  1309. else
  1310. IWL_WARN(priv, "Claim null rxb?\n");
  1311. }
  1312. /* For now we just don't re-use anything. We can tweak this
  1313. * later to try and re-use notification packets and SKBs that
  1314. * fail to Rx correctly */
  1315. if (rxb->skb != NULL) {
  1316. priv->alloc_rxb_skb--;
  1317. dev_kfree_skb_any(rxb->skb);
  1318. rxb->skb = NULL;
  1319. }
  1320. pci_unmap_single(priv->pci_dev, rxb->real_dma_addr,
  1321. priv->hw_params.rx_buf_size,
  1322. PCI_DMA_FROMDEVICE);
  1323. spin_lock_irqsave(&rxq->lock, flags);
  1324. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  1325. spin_unlock_irqrestore(&rxq->lock, flags);
  1326. i = (i + 1) & RX_QUEUE_MASK;
  1327. /* If there are a lot of unused frames,
  1328. * restock the Rx queue so ucode won't assert. */
  1329. if (fill_rx) {
  1330. count++;
  1331. if (count >= 8) {
  1332. priv->rxq.read = i;
  1333. __iwl3945_rx_replenish(priv);
  1334. count = 0;
  1335. }
  1336. }
  1337. }
  1338. /* Backtrack one entry */
  1339. priv->rxq.read = i;
  1340. iwl3945_rx_queue_restock(priv);
  1341. }
  1342. /* call this function to flush any scheduled tasklet */
  1343. static inline void iwl_synchronize_irq(struct iwl_priv *priv)
  1344. {
  1345. /* wait to make sure we flush pending tasklet*/
  1346. synchronize_irq(priv->pci_dev->irq);
  1347. tasklet_kill(&priv->irq_tasklet);
  1348. }
  1349. static const char *desc_lookup(int i)
  1350. {
  1351. switch (i) {
  1352. case 1:
  1353. return "FAIL";
  1354. case 2:
  1355. return "BAD_PARAM";
  1356. case 3:
  1357. return "BAD_CHECKSUM";
  1358. case 4:
  1359. return "NMI_INTERRUPT";
  1360. case 5:
  1361. return "SYSASSERT";
  1362. case 6:
  1363. return "FATAL_ERROR";
  1364. }
  1365. return "UNKNOWN";
  1366. }
  1367. #define ERROR_START_OFFSET (1 * sizeof(u32))
  1368. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  1369. static void iwl3945_dump_nic_error_log(struct iwl_priv *priv)
  1370. {
  1371. u32 i;
  1372. u32 desc, time, count, base, data1;
  1373. u32 blink1, blink2, ilink1, ilink2;
  1374. int rc;
  1375. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  1376. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1377. IWL_ERR(priv, "Not valid error log pointer 0x%08X\n", base);
  1378. return;
  1379. }
  1380. rc = iwl_grab_nic_access(priv);
  1381. if (rc) {
  1382. IWL_WARN(priv, "Can not read from adapter at this time.\n");
  1383. return;
  1384. }
  1385. count = iwl_read_targ_mem(priv, base);
  1386. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  1387. IWL_ERR(priv, "Start IWL Error Log Dump:\n");
  1388. IWL_ERR(priv, "Status: 0x%08lX, count: %d\n",
  1389. priv->status, count);
  1390. }
  1391. IWL_ERR(priv, "Desc Time asrtPC blink2 "
  1392. "ilink1 nmiPC Line\n");
  1393. for (i = ERROR_START_OFFSET;
  1394. i < (count * ERROR_ELEM_SIZE) + ERROR_START_OFFSET;
  1395. i += ERROR_ELEM_SIZE) {
  1396. desc = iwl_read_targ_mem(priv, base + i);
  1397. time =
  1398. iwl_read_targ_mem(priv, base + i + 1 * sizeof(u32));
  1399. blink1 =
  1400. iwl_read_targ_mem(priv, base + i + 2 * sizeof(u32));
  1401. blink2 =
  1402. iwl_read_targ_mem(priv, base + i + 3 * sizeof(u32));
  1403. ilink1 =
  1404. iwl_read_targ_mem(priv, base + i + 4 * sizeof(u32));
  1405. ilink2 =
  1406. iwl_read_targ_mem(priv, base + i + 5 * sizeof(u32));
  1407. data1 =
  1408. iwl_read_targ_mem(priv, base + i + 6 * sizeof(u32));
  1409. IWL_ERR(priv,
  1410. "%-13s (#%d) %010u 0x%05X 0x%05X 0x%05X 0x%05X %u\n\n",
  1411. desc_lookup(desc), desc, time, blink1, blink2,
  1412. ilink1, ilink2, data1);
  1413. }
  1414. iwl_release_nic_access(priv);
  1415. }
  1416. #define EVENT_START_OFFSET (6 * sizeof(u32))
  1417. /**
  1418. * iwl3945_print_event_log - Dump error event log to syslog
  1419. *
  1420. * NOTE: Must be called with iwl_grab_nic_access() already obtained!
  1421. */
  1422. static void iwl3945_print_event_log(struct iwl_priv *priv, u32 start_idx,
  1423. u32 num_events, u32 mode)
  1424. {
  1425. u32 i;
  1426. u32 base; /* SRAM byte address of event log header */
  1427. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  1428. u32 ptr; /* SRAM byte address of log data */
  1429. u32 ev, time, data; /* event log data */
  1430. if (num_events == 0)
  1431. return;
  1432. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1433. if (mode == 0)
  1434. event_size = 2 * sizeof(u32);
  1435. else
  1436. event_size = 3 * sizeof(u32);
  1437. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  1438. /* "time" is actually "data" for mode 0 (no timestamp).
  1439. * place event id # at far right for easier visual parsing. */
  1440. for (i = 0; i < num_events; i++) {
  1441. ev = iwl_read_targ_mem(priv, ptr);
  1442. ptr += sizeof(u32);
  1443. time = iwl_read_targ_mem(priv, ptr);
  1444. ptr += sizeof(u32);
  1445. if (mode == 0) {
  1446. /* data, ev */
  1447. IWL_ERR(priv, "0x%08x\t%04u\n", time, ev);
  1448. } else {
  1449. data = iwl_read_targ_mem(priv, ptr);
  1450. ptr += sizeof(u32);
  1451. IWL_ERR(priv, "%010u\t0x%08x\t%04u\n", time, data, ev);
  1452. }
  1453. }
  1454. }
  1455. static void iwl3945_dump_nic_event_log(struct iwl_priv *priv)
  1456. {
  1457. int rc;
  1458. u32 base; /* SRAM byte address of event log header */
  1459. u32 capacity; /* event log capacity in # entries */
  1460. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  1461. u32 num_wraps; /* # times uCode wrapped to top of log */
  1462. u32 next_entry; /* index of next entry to be written by uCode */
  1463. u32 size; /* # entries that we'll print */
  1464. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  1465. if (!iwl3945_hw_valid_rtc_data_addr(base)) {
  1466. IWL_ERR(priv, "Invalid event log pointer 0x%08X\n", base);
  1467. return;
  1468. }
  1469. rc = iwl_grab_nic_access(priv);
  1470. if (rc) {
  1471. IWL_WARN(priv, "Can not read from adapter at this time.\n");
  1472. return;
  1473. }
  1474. /* event log header */
  1475. capacity = iwl_read_targ_mem(priv, base);
  1476. mode = iwl_read_targ_mem(priv, base + (1 * sizeof(u32)));
  1477. num_wraps = iwl_read_targ_mem(priv, base + (2 * sizeof(u32)));
  1478. next_entry = iwl_read_targ_mem(priv, base + (3 * sizeof(u32)));
  1479. size = num_wraps ? capacity : next_entry;
  1480. /* bail out if nothing in log */
  1481. if (size == 0) {
  1482. IWL_ERR(priv, "Start IWL Event Log Dump: nothing in log\n");
  1483. iwl_release_nic_access(priv);
  1484. return;
  1485. }
  1486. IWL_ERR(priv, "Start IWL Event Log Dump: display count %d, wraps %d\n",
  1487. size, num_wraps);
  1488. /* if uCode has wrapped back to top of log, start at the oldest entry,
  1489. * i.e the next one that uCode would fill. */
  1490. if (num_wraps)
  1491. iwl3945_print_event_log(priv, next_entry,
  1492. capacity - next_entry, mode);
  1493. /* (then/else) start at top of log */
  1494. iwl3945_print_event_log(priv, 0, next_entry, mode);
  1495. iwl_release_nic_access(priv);
  1496. }
  1497. static void iwl3945_error_recovery(struct iwl_priv *priv)
  1498. {
  1499. unsigned long flags;
  1500. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  1501. sizeof(priv->staging_rxon));
  1502. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1503. iwlcore_commit_rxon(priv);
  1504. priv->cfg->ops->smgmt->add_station(priv, priv->bssid, 1, 0, NULL);
  1505. spin_lock_irqsave(&priv->lock, flags);
  1506. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  1507. priv->error_recovering = 0;
  1508. spin_unlock_irqrestore(&priv->lock, flags);
  1509. }
  1510. static void iwl3945_irq_tasklet(struct iwl_priv *priv)
  1511. {
  1512. u32 inta, handled = 0;
  1513. u32 inta_fh;
  1514. unsigned long flags;
  1515. #ifdef CONFIG_IWLWIFI_DEBUG
  1516. u32 inta_mask;
  1517. #endif
  1518. spin_lock_irqsave(&priv->lock, flags);
  1519. /* Ack/clear/reset pending uCode interrupts.
  1520. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  1521. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  1522. inta = iwl_read32(priv, CSR_INT);
  1523. iwl_write32(priv, CSR_INT, inta);
  1524. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  1525. * Any new interrupts that happen after this, either while we're
  1526. * in this tasklet, or later, will show up in next ISR/tasklet. */
  1527. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1528. iwl_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  1529. #ifdef CONFIG_IWLWIFI_DEBUG
  1530. if (priv->debug_level & IWL_DL_ISR) {
  1531. /* just for debug */
  1532. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1533. IWL_DEBUG_ISR(priv, "inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  1534. inta, inta_mask, inta_fh);
  1535. }
  1536. #endif
  1537. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  1538. * atomic, make sure that inta covers all the interrupts that
  1539. * we've discovered, even if FH interrupt came in just after
  1540. * reading CSR_INT. */
  1541. if (inta_fh & CSR39_FH_INT_RX_MASK)
  1542. inta |= CSR_INT_BIT_FH_RX;
  1543. if (inta_fh & CSR39_FH_INT_TX_MASK)
  1544. inta |= CSR_INT_BIT_FH_TX;
  1545. /* Now service all interrupt bits discovered above. */
  1546. if (inta & CSR_INT_BIT_HW_ERR) {
  1547. IWL_ERR(priv, "Microcode HW error detected. Restarting.\n");
  1548. /* Tell the device to stop sending interrupts */
  1549. iwl_disable_interrupts(priv);
  1550. priv->isr_stats.hw++;
  1551. iwl_irq_handle_error(priv);
  1552. handled |= CSR_INT_BIT_HW_ERR;
  1553. spin_unlock_irqrestore(&priv->lock, flags);
  1554. return;
  1555. }
  1556. #ifdef CONFIG_IWLWIFI_DEBUG
  1557. if (priv->debug_level & (IWL_DL_ISR)) {
  1558. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  1559. if (inta & CSR_INT_BIT_SCD) {
  1560. IWL_DEBUG_ISR(priv, "Scheduler finished to transmit "
  1561. "the frame/frames.\n");
  1562. priv->isr_stats.sch++;
  1563. }
  1564. /* Alive notification via Rx interrupt will do the real work */
  1565. if (inta & CSR_INT_BIT_ALIVE) {
  1566. IWL_DEBUG_ISR(priv, "Alive interrupt\n");
  1567. priv->isr_stats.alive++;
  1568. }
  1569. }
  1570. #endif
  1571. /* Safely ignore these bits for debug checks below */
  1572. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  1573. /* Error detected by uCode */
  1574. if (inta & CSR_INT_BIT_SW_ERR) {
  1575. IWL_ERR(priv, "Microcode SW error detected. "
  1576. "Restarting 0x%X.\n", inta);
  1577. priv->isr_stats.sw++;
  1578. priv->isr_stats.sw_err = inta;
  1579. iwl_irq_handle_error(priv);
  1580. handled |= CSR_INT_BIT_SW_ERR;
  1581. }
  1582. /* uCode wakes up after power-down sleep */
  1583. if (inta & CSR_INT_BIT_WAKEUP) {
  1584. IWL_DEBUG_ISR(priv, "Wakeup interrupt\n");
  1585. iwl_rx_queue_update_write_ptr(priv, &priv->rxq);
  1586. iwl_txq_update_write_ptr(priv, &priv->txq[0]);
  1587. iwl_txq_update_write_ptr(priv, &priv->txq[1]);
  1588. iwl_txq_update_write_ptr(priv, &priv->txq[2]);
  1589. iwl_txq_update_write_ptr(priv, &priv->txq[3]);
  1590. iwl_txq_update_write_ptr(priv, &priv->txq[4]);
  1591. iwl_txq_update_write_ptr(priv, &priv->txq[5]);
  1592. priv->isr_stats.wakeup++;
  1593. handled |= CSR_INT_BIT_WAKEUP;
  1594. }
  1595. /* All uCode command responses, including Tx command responses,
  1596. * Rx "responses" (frame-received notification), and other
  1597. * notifications from uCode come through here*/
  1598. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  1599. iwl3945_rx_handle(priv);
  1600. priv->isr_stats.rx++;
  1601. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  1602. }
  1603. if (inta & CSR_INT_BIT_FH_TX) {
  1604. IWL_DEBUG_ISR(priv, "Tx interrupt\n");
  1605. priv->isr_stats.tx++;
  1606. iwl_write32(priv, CSR_FH_INT_STATUS, (1 << 6));
  1607. if (!iwl_grab_nic_access(priv)) {
  1608. iwl_write_direct32(priv, FH39_TCSR_CREDIT
  1609. (FH39_SRVC_CHNL), 0x0);
  1610. iwl_release_nic_access(priv);
  1611. }
  1612. handled |= CSR_INT_BIT_FH_TX;
  1613. }
  1614. if (inta & ~handled) {
  1615. IWL_ERR(priv, "Unhandled INTA bits 0x%08x\n", inta & ~handled);
  1616. priv->isr_stats.unhandled++;
  1617. }
  1618. if (inta & ~CSR_INI_SET_MASK) {
  1619. IWL_WARN(priv, "Disabled INTA bits 0x%08x were pending\n",
  1620. inta & ~CSR_INI_SET_MASK);
  1621. IWL_WARN(priv, " with FH_INT = 0x%08x\n", inta_fh);
  1622. }
  1623. /* Re-enable all interrupts */
  1624. /* only Re-enable if disabled by irq */
  1625. if (test_bit(STATUS_INT_ENABLED, &priv->status))
  1626. iwl_enable_interrupts(priv);
  1627. #ifdef CONFIG_IWLWIFI_DEBUG
  1628. if (priv->debug_level & (IWL_DL_ISR)) {
  1629. inta = iwl_read32(priv, CSR_INT);
  1630. inta_mask = iwl_read32(priv, CSR_INT_MASK);
  1631. inta_fh = iwl_read32(priv, CSR_FH_INT_STATUS);
  1632. IWL_DEBUG_ISR(priv, "End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  1633. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  1634. }
  1635. #endif
  1636. spin_unlock_irqrestore(&priv->lock, flags);
  1637. }
  1638. static int iwl3945_get_channels_for_scan(struct iwl_priv *priv,
  1639. enum ieee80211_band band,
  1640. u8 is_active, u8 n_probes,
  1641. struct iwl3945_scan_channel *scan_ch)
  1642. {
  1643. const struct ieee80211_channel *channels = NULL;
  1644. const struct ieee80211_supported_band *sband;
  1645. const struct iwl_channel_info *ch_info;
  1646. u16 passive_dwell = 0;
  1647. u16 active_dwell = 0;
  1648. int added, i;
  1649. sband = iwl_get_hw_mode(priv, band);
  1650. if (!sband)
  1651. return 0;
  1652. channels = sband->channels;
  1653. active_dwell = iwl_get_active_dwell_time(priv, band, n_probes);
  1654. passive_dwell = iwl_get_passive_dwell_time(priv, band);
  1655. if (passive_dwell <= active_dwell)
  1656. passive_dwell = active_dwell + 1;
  1657. for (i = 0, added = 0; i < sband->n_channels; i++) {
  1658. if (channels[i].flags & IEEE80211_CHAN_DISABLED)
  1659. continue;
  1660. scan_ch->channel = channels[i].hw_value;
  1661. ch_info = iwl_get_channel_info(priv, band, scan_ch->channel);
  1662. if (!is_channel_valid(ch_info)) {
  1663. IWL_DEBUG_SCAN(priv, "Channel %d is INVALID for this band.\n",
  1664. scan_ch->channel);
  1665. continue;
  1666. }
  1667. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  1668. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  1669. /* If passive , set up for auto-switch
  1670. * and use long active_dwell time.
  1671. */
  1672. if (!is_active || is_channel_passive(ch_info) ||
  1673. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN)) {
  1674. scan_ch->type = 0; /* passive */
  1675. if (IWL_UCODE_API(priv->ucode_ver) == 1)
  1676. scan_ch->active_dwell = cpu_to_le16(passive_dwell - 1);
  1677. } else {
  1678. scan_ch->type = 1; /* active */
  1679. }
  1680. /* Set direct probe bits. These may be used both for active
  1681. * scan channels (probes gets sent right away),
  1682. * or for passive channels (probes get se sent only after
  1683. * hearing clear Rx packet).*/
  1684. if (IWL_UCODE_API(priv->ucode_ver) >= 2) {
  1685. if (n_probes)
  1686. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1687. } else {
  1688. /* uCode v1 does not allow setting direct probe bits on
  1689. * passive channel. */
  1690. if ((scan_ch->type & 1) && n_probes)
  1691. scan_ch->type |= IWL39_SCAN_PROBE_MASK(n_probes);
  1692. }
  1693. /* Set txpower levels to defaults */
  1694. scan_ch->tpc.dsp_atten = 110;
  1695. /* scan_pwr_info->tpc.dsp_atten; */
  1696. /*scan_pwr_info->tpc.tx_gain; */
  1697. if (band == IEEE80211_BAND_5GHZ)
  1698. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  1699. else {
  1700. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  1701. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  1702. * power level:
  1703. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  1704. */
  1705. }
  1706. IWL_DEBUG_SCAN(priv, "Scanning %d [%s %d]\n",
  1707. scan_ch->channel,
  1708. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  1709. (scan_ch->type & 1) ?
  1710. active_dwell : passive_dwell);
  1711. scan_ch++;
  1712. added++;
  1713. }
  1714. IWL_DEBUG_SCAN(priv, "total channels to scan %d \n", added);
  1715. return added;
  1716. }
  1717. static void iwl3945_init_hw_rates(struct iwl_priv *priv,
  1718. struct ieee80211_rate *rates)
  1719. {
  1720. int i;
  1721. for (i = 0; i < IWL_RATE_COUNT; i++) {
  1722. rates[i].bitrate = iwl3945_rates[i].ieee * 5;
  1723. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  1724. rates[i].hw_value_short = i;
  1725. rates[i].flags = 0;
  1726. if ((i > IWL39_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  1727. /*
  1728. * If CCK != 1M then set short preamble rate flag.
  1729. */
  1730. rates[i].flags |= (iwl3945_rates[i].plcp == 10) ?
  1731. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  1732. }
  1733. }
  1734. }
  1735. /******************************************************************************
  1736. *
  1737. * uCode download functions
  1738. *
  1739. ******************************************************************************/
  1740. static void iwl3945_dealloc_ucode_pci(struct iwl_priv *priv)
  1741. {
  1742. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  1743. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  1744. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  1745. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  1746. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  1747. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  1748. }
  1749. /**
  1750. * iwl3945_verify_inst_full - verify runtime uCode image in card vs. host,
  1751. * looking at all data.
  1752. */
  1753. static int iwl3945_verify_inst_full(struct iwl_priv *priv, __le32 *image, u32 len)
  1754. {
  1755. u32 val;
  1756. u32 save_len = len;
  1757. int rc = 0;
  1758. u32 errcnt;
  1759. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1760. rc = iwl_grab_nic_access(priv);
  1761. if (rc)
  1762. return rc;
  1763. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1764. IWL39_RTC_INST_LOWER_BOUND);
  1765. errcnt = 0;
  1766. for (; len > 0; len -= sizeof(u32), image++) {
  1767. /* read data comes through single port, auto-incr addr */
  1768. /* NOTE: Use the debugless read so we don't flood kernel log
  1769. * if IWL_DL_IO is set */
  1770. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1771. if (val != le32_to_cpu(*image)) {
  1772. IWL_ERR(priv, "uCode INST section is invalid at "
  1773. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1774. save_len - len, val, le32_to_cpu(*image));
  1775. rc = -EIO;
  1776. errcnt++;
  1777. if (errcnt >= 20)
  1778. break;
  1779. }
  1780. }
  1781. iwl_release_nic_access(priv);
  1782. if (!errcnt)
  1783. IWL_DEBUG_INFO(priv,
  1784. "ucode image in INSTRUCTION memory is good\n");
  1785. return rc;
  1786. }
  1787. /**
  1788. * iwl3945_verify_inst_sparse - verify runtime uCode image in card vs. host,
  1789. * using sample data 100 bytes apart. If these sample points are good,
  1790. * it's a pretty good bet that everything between them is good, too.
  1791. */
  1792. static int iwl3945_verify_inst_sparse(struct iwl_priv *priv, __le32 *image, u32 len)
  1793. {
  1794. u32 val;
  1795. int rc = 0;
  1796. u32 errcnt = 0;
  1797. u32 i;
  1798. IWL_DEBUG_INFO(priv, "ucode inst image size is %u\n", len);
  1799. rc = iwl_grab_nic_access(priv);
  1800. if (rc)
  1801. return rc;
  1802. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  1803. /* read data comes through single port, auto-incr addr */
  1804. /* NOTE: Use the debugless read so we don't flood kernel log
  1805. * if IWL_DL_IO is set */
  1806. iwl_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  1807. i + IWL39_RTC_INST_LOWER_BOUND);
  1808. val = _iwl_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  1809. if (val != le32_to_cpu(*image)) {
  1810. #if 0 /* Enable this if you want to see details */
  1811. IWL_ERR(priv, "uCode INST section is invalid at "
  1812. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  1813. i, val, *image);
  1814. #endif
  1815. rc = -EIO;
  1816. errcnt++;
  1817. if (errcnt >= 3)
  1818. break;
  1819. }
  1820. }
  1821. iwl_release_nic_access(priv);
  1822. return rc;
  1823. }
  1824. /**
  1825. * iwl3945_verify_ucode - determine which instruction image is in SRAM,
  1826. * and verify its contents
  1827. */
  1828. static int iwl3945_verify_ucode(struct iwl_priv *priv)
  1829. {
  1830. __le32 *image;
  1831. u32 len;
  1832. int rc = 0;
  1833. /* Try bootstrap */
  1834. image = (__le32 *)priv->ucode_boot.v_addr;
  1835. len = priv->ucode_boot.len;
  1836. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1837. if (rc == 0) {
  1838. IWL_DEBUG_INFO(priv, "Bootstrap uCode is good in inst SRAM\n");
  1839. return 0;
  1840. }
  1841. /* Try initialize */
  1842. image = (__le32 *)priv->ucode_init.v_addr;
  1843. len = priv->ucode_init.len;
  1844. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1845. if (rc == 0) {
  1846. IWL_DEBUG_INFO(priv, "Initialize uCode is good in inst SRAM\n");
  1847. return 0;
  1848. }
  1849. /* Try runtime/protocol */
  1850. image = (__le32 *)priv->ucode_code.v_addr;
  1851. len = priv->ucode_code.len;
  1852. rc = iwl3945_verify_inst_sparse(priv, image, len);
  1853. if (rc == 0) {
  1854. IWL_DEBUG_INFO(priv, "Runtime uCode is good in inst SRAM\n");
  1855. return 0;
  1856. }
  1857. IWL_ERR(priv, "NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  1858. /* Since nothing seems to match, show first several data entries in
  1859. * instruction SRAM, so maybe visual inspection will give a clue.
  1860. * Selection of bootstrap image (vs. other images) is arbitrary. */
  1861. image = (__le32 *)priv->ucode_boot.v_addr;
  1862. len = priv->ucode_boot.len;
  1863. rc = iwl3945_verify_inst_full(priv, image, len);
  1864. return rc;
  1865. }
  1866. static void iwl3945_nic_start(struct iwl_priv *priv)
  1867. {
  1868. /* Remove all resets to allow NIC to operate */
  1869. iwl_write32(priv, CSR_RESET, 0);
  1870. }
  1871. /**
  1872. * iwl3945_read_ucode - Read uCode images from disk file.
  1873. *
  1874. * Copy into buffers for card to fetch via bus-mastering
  1875. */
  1876. static int iwl3945_read_ucode(struct iwl_priv *priv)
  1877. {
  1878. struct iwl_ucode *ucode;
  1879. int ret = -EINVAL, index;
  1880. const struct firmware *ucode_raw;
  1881. /* firmware file name contains uCode/driver compatibility version */
  1882. const char *name_pre = priv->cfg->fw_name_pre;
  1883. const unsigned int api_max = priv->cfg->ucode_api_max;
  1884. const unsigned int api_min = priv->cfg->ucode_api_min;
  1885. char buf[25];
  1886. u8 *src;
  1887. size_t len;
  1888. u32 api_ver, inst_size, data_size, init_size, init_data_size, boot_size;
  1889. /* Ask kernel firmware_class module to get the boot firmware off disk.
  1890. * request_firmware() is synchronous, file is in memory on return. */
  1891. for (index = api_max; index >= api_min; index--) {
  1892. sprintf(buf, "%s%u%s", name_pre, index, ".ucode");
  1893. ret = request_firmware(&ucode_raw, buf, &priv->pci_dev->dev);
  1894. if (ret < 0) {
  1895. IWL_ERR(priv, "%s firmware file req failed: %d\n",
  1896. buf, ret);
  1897. if (ret == -ENOENT)
  1898. continue;
  1899. else
  1900. goto error;
  1901. } else {
  1902. if (index < api_max)
  1903. IWL_ERR(priv, "Loaded firmware %s, "
  1904. "which is deprecated. "
  1905. " Please use API v%u instead.\n",
  1906. buf, api_max);
  1907. IWL_DEBUG_INFO(priv, "Got firmware '%s' file "
  1908. "(%zd bytes) from disk\n",
  1909. buf, ucode_raw->size);
  1910. break;
  1911. }
  1912. }
  1913. if (ret < 0)
  1914. goto error;
  1915. /* Make sure that we got at least our header! */
  1916. if (ucode_raw->size < sizeof(*ucode)) {
  1917. IWL_ERR(priv, "File size way too small!\n");
  1918. ret = -EINVAL;
  1919. goto err_release;
  1920. }
  1921. /* Data from ucode file: header followed by uCode images */
  1922. ucode = (void *)ucode_raw->data;
  1923. priv->ucode_ver = le32_to_cpu(ucode->ver);
  1924. api_ver = IWL_UCODE_API(priv->ucode_ver);
  1925. inst_size = le32_to_cpu(ucode->inst_size);
  1926. data_size = le32_to_cpu(ucode->data_size);
  1927. init_size = le32_to_cpu(ucode->init_size);
  1928. init_data_size = le32_to_cpu(ucode->init_data_size);
  1929. boot_size = le32_to_cpu(ucode->boot_size);
  1930. /* api_ver should match the api version forming part of the
  1931. * firmware filename ... but we don't check for that and only rely
  1932. * on the API version read from firmware header from here on forward */
  1933. if (api_ver < api_min || api_ver > api_max) {
  1934. IWL_ERR(priv, "Driver unable to support your firmware API. "
  1935. "Driver supports v%u, firmware is v%u.\n",
  1936. api_max, api_ver);
  1937. priv->ucode_ver = 0;
  1938. ret = -EINVAL;
  1939. goto err_release;
  1940. }
  1941. if (api_ver != api_max)
  1942. IWL_ERR(priv, "Firmware has old API version. Expected %u, "
  1943. "got %u. New firmware can be obtained "
  1944. "from http://www.intellinuxwireless.org.\n",
  1945. api_max, api_ver);
  1946. IWL_INFO(priv, "loaded firmware version %u.%u.%u.%u\n",
  1947. IWL_UCODE_MAJOR(priv->ucode_ver),
  1948. IWL_UCODE_MINOR(priv->ucode_ver),
  1949. IWL_UCODE_API(priv->ucode_ver),
  1950. IWL_UCODE_SERIAL(priv->ucode_ver));
  1951. IWL_DEBUG_INFO(priv, "f/w package hdr ucode version raw = 0x%x\n",
  1952. priv->ucode_ver);
  1953. IWL_DEBUG_INFO(priv, "f/w package hdr runtime inst size = %u\n",
  1954. inst_size);
  1955. IWL_DEBUG_INFO(priv, "f/w package hdr runtime data size = %u\n",
  1956. data_size);
  1957. IWL_DEBUG_INFO(priv, "f/w package hdr init inst size = %u\n",
  1958. init_size);
  1959. IWL_DEBUG_INFO(priv, "f/w package hdr init data size = %u\n",
  1960. init_data_size);
  1961. IWL_DEBUG_INFO(priv, "f/w package hdr boot inst size = %u\n",
  1962. boot_size);
  1963. /* Verify size of file vs. image size info in file's header */
  1964. if (ucode_raw->size < sizeof(*ucode) +
  1965. inst_size + data_size + init_size +
  1966. init_data_size + boot_size) {
  1967. IWL_DEBUG_INFO(priv, "uCode file size %zd too small\n",
  1968. ucode_raw->size);
  1969. ret = -EINVAL;
  1970. goto err_release;
  1971. }
  1972. /* Verify that uCode images will fit in card's SRAM */
  1973. if (inst_size > IWL39_MAX_INST_SIZE) {
  1974. IWL_DEBUG_INFO(priv, "uCode instr len %d too large to fit in\n",
  1975. inst_size);
  1976. ret = -EINVAL;
  1977. goto err_release;
  1978. }
  1979. if (data_size > IWL39_MAX_DATA_SIZE) {
  1980. IWL_DEBUG_INFO(priv, "uCode data len %d too large to fit in\n",
  1981. data_size);
  1982. ret = -EINVAL;
  1983. goto err_release;
  1984. }
  1985. if (init_size > IWL39_MAX_INST_SIZE) {
  1986. IWL_DEBUG_INFO(priv,
  1987. "uCode init instr len %d too large to fit in\n",
  1988. init_size);
  1989. ret = -EINVAL;
  1990. goto err_release;
  1991. }
  1992. if (init_data_size > IWL39_MAX_DATA_SIZE) {
  1993. IWL_DEBUG_INFO(priv,
  1994. "uCode init data len %d too large to fit in\n",
  1995. init_data_size);
  1996. ret = -EINVAL;
  1997. goto err_release;
  1998. }
  1999. if (boot_size > IWL39_MAX_BSM_SIZE) {
  2000. IWL_DEBUG_INFO(priv,
  2001. "uCode boot instr len %d too large to fit in\n",
  2002. boot_size);
  2003. ret = -EINVAL;
  2004. goto err_release;
  2005. }
  2006. /* Allocate ucode buffers for card's bus-master loading ... */
  2007. /* Runtime instructions and 2 copies of data:
  2008. * 1) unmodified from disk
  2009. * 2) backup cache for save/restore during power-downs */
  2010. priv->ucode_code.len = inst_size;
  2011. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  2012. priv->ucode_data.len = data_size;
  2013. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  2014. priv->ucode_data_backup.len = data_size;
  2015. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  2016. if (!priv->ucode_code.v_addr || !priv->ucode_data.v_addr ||
  2017. !priv->ucode_data_backup.v_addr)
  2018. goto err_pci_alloc;
  2019. /* Initialization instructions and data */
  2020. if (init_size && init_data_size) {
  2021. priv->ucode_init.len = init_size;
  2022. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  2023. priv->ucode_init_data.len = init_data_size;
  2024. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  2025. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  2026. goto err_pci_alloc;
  2027. }
  2028. /* Bootstrap (instructions only, no data) */
  2029. if (boot_size) {
  2030. priv->ucode_boot.len = boot_size;
  2031. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  2032. if (!priv->ucode_boot.v_addr)
  2033. goto err_pci_alloc;
  2034. }
  2035. /* Copy images into buffers for card's bus-master reads ... */
  2036. /* Runtime instructions (first block of data in file) */
  2037. src = &ucode->data[0];
  2038. len = priv->ucode_code.len;
  2039. IWL_DEBUG_INFO(priv,
  2040. "Copying (but not loading) uCode instr len %zd\n", len);
  2041. memcpy(priv->ucode_code.v_addr, src, len);
  2042. IWL_DEBUG_INFO(priv, "uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  2043. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  2044. /* Runtime data (2nd block)
  2045. * NOTE: Copy into backup buffer will be done in iwl3945_up() */
  2046. src = &ucode->data[inst_size];
  2047. len = priv->ucode_data.len;
  2048. IWL_DEBUG_INFO(priv,
  2049. "Copying (but not loading) uCode data len %zd\n", len);
  2050. memcpy(priv->ucode_data.v_addr, src, len);
  2051. memcpy(priv->ucode_data_backup.v_addr, src, len);
  2052. /* Initialization instructions (3rd block) */
  2053. if (init_size) {
  2054. src = &ucode->data[inst_size + data_size];
  2055. len = priv->ucode_init.len;
  2056. IWL_DEBUG_INFO(priv,
  2057. "Copying (but not loading) init instr len %zd\n", len);
  2058. memcpy(priv->ucode_init.v_addr, src, len);
  2059. }
  2060. /* Initialization data (4th block) */
  2061. if (init_data_size) {
  2062. src = &ucode->data[inst_size + data_size + init_size];
  2063. len = priv->ucode_init_data.len;
  2064. IWL_DEBUG_INFO(priv,
  2065. "Copying (but not loading) init data len %zd\n", len);
  2066. memcpy(priv->ucode_init_data.v_addr, src, len);
  2067. }
  2068. /* Bootstrap instructions (5th block) */
  2069. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  2070. len = priv->ucode_boot.len;
  2071. IWL_DEBUG_INFO(priv,
  2072. "Copying (but not loading) boot instr len %zd\n", len);
  2073. memcpy(priv->ucode_boot.v_addr, src, len);
  2074. /* We have our copies now, allow OS release its copies */
  2075. release_firmware(ucode_raw);
  2076. return 0;
  2077. err_pci_alloc:
  2078. IWL_ERR(priv, "failed to allocate pci memory\n");
  2079. ret = -ENOMEM;
  2080. iwl3945_dealloc_ucode_pci(priv);
  2081. err_release:
  2082. release_firmware(ucode_raw);
  2083. error:
  2084. return ret;
  2085. }
  2086. /**
  2087. * iwl3945_set_ucode_ptrs - Set uCode address location
  2088. *
  2089. * Tell initialization uCode where to find runtime uCode.
  2090. *
  2091. * BSM registers initially contain pointers to initialization uCode.
  2092. * We need to replace them to load runtime uCode inst and data,
  2093. * and to save runtime data when powering down.
  2094. */
  2095. static int iwl3945_set_ucode_ptrs(struct iwl_priv *priv)
  2096. {
  2097. dma_addr_t pinst;
  2098. dma_addr_t pdata;
  2099. int rc = 0;
  2100. unsigned long flags;
  2101. /* bits 31:0 for 3945 */
  2102. pinst = priv->ucode_code.p_addr;
  2103. pdata = priv->ucode_data_backup.p_addr;
  2104. spin_lock_irqsave(&priv->lock, flags);
  2105. rc = iwl_grab_nic_access(priv);
  2106. if (rc) {
  2107. spin_unlock_irqrestore(&priv->lock, flags);
  2108. return rc;
  2109. }
  2110. /* Tell bootstrap uCode where to find image to load */
  2111. iwl_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  2112. iwl_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  2113. iwl_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  2114. priv->ucode_data.len);
  2115. /* Inst byte count must be last to set up, bit 31 signals uCode
  2116. * that all new ptr/size info is in place */
  2117. iwl_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  2118. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  2119. iwl_release_nic_access(priv);
  2120. spin_unlock_irqrestore(&priv->lock, flags);
  2121. IWL_DEBUG_INFO(priv, "Runtime uCode pointers are set.\n");
  2122. return rc;
  2123. }
  2124. /**
  2125. * iwl3945_init_alive_start - Called after REPLY_ALIVE notification received
  2126. *
  2127. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  2128. *
  2129. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  2130. */
  2131. static void iwl3945_init_alive_start(struct iwl_priv *priv)
  2132. {
  2133. /* Check alive response for "valid" sign from uCode */
  2134. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  2135. /* We had an error bringing up the hardware, so take it
  2136. * all the way back down so we can try again */
  2137. IWL_DEBUG_INFO(priv, "Initialize Alive failed.\n");
  2138. goto restart;
  2139. }
  2140. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  2141. * This is a paranoid check, because we would not have gotten the
  2142. * "initialize" alive if code weren't properly loaded. */
  2143. if (iwl3945_verify_ucode(priv)) {
  2144. /* Runtime instruction load was bad;
  2145. * take it all the way back down so we can try again */
  2146. IWL_DEBUG_INFO(priv, "Bad \"initialize\" uCode load.\n");
  2147. goto restart;
  2148. }
  2149. /* Send pointers to protocol/runtime uCode image ... init code will
  2150. * load and launch runtime uCode, which will send us another "Alive"
  2151. * notification. */
  2152. IWL_DEBUG_INFO(priv, "Initialization Alive received.\n");
  2153. if (iwl3945_set_ucode_ptrs(priv)) {
  2154. /* Runtime instruction load won't happen;
  2155. * take it all the way back down so we can try again */
  2156. IWL_DEBUG_INFO(priv, "Couldn't set up uCode pointers.\n");
  2157. goto restart;
  2158. }
  2159. return;
  2160. restart:
  2161. queue_work(priv->workqueue, &priv->restart);
  2162. }
  2163. /**
  2164. * iwl3945_alive_start - called after REPLY_ALIVE notification received
  2165. * from protocol/runtime uCode (initialization uCode's
  2166. * Alive gets handled by iwl3945_init_alive_start()).
  2167. */
  2168. static void iwl3945_alive_start(struct iwl_priv *priv)
  2169. {
  2170. int rc = 0;
  2171. int thermal_spin = 0;
  2172. u32 rfkill;
  2173. IWL_DEBUG_INFO(priv, "Runtime Alive received.\n");
  2174. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  2175. /* We had an error bringing up the hardware, so take it
  2176. * all the way back down so we can try again */
  2177. IWL_DEBUG_INFO(priv, "Alive failed.\n");
  2178. goto restart;
  2179. }
  2180. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  2181. * This is a paranoid check, because we would not have gotten the
  2182. * "runtime" alive if code weren't properly loaded. */
  2183. if (iwl3945_verify_ucode(priv)) {
  2184. /* Runtime instruction load was bad;
  2185. * take it all the way back down so we can try again */
  2186. IWL_DEBUG_INFO(priv, "Bad runtime uCode load.\n");
  2187. goto restart;
  2188. }
  2189. priv->cfg->ops->smgmt->clear_station_table(priv);
  2190. rc = iwl_grab_nic_access(priv);
  2191. if (rc) {
  2192. IWL_WARN(priv, "Can not read RFKILL status from adapter\n");
  2193. return;
  2194. }
  2195. rfkill = iwl_read_prph(priv, APMG_RFKILL_REG);
  2196. IWL_DEBUG_INFO(priv, "RFKILL status: 0x%x\n", rfkill);
  2197. iwl_release_nic_access(priv);
  2198. if (rfkill & 0x1) {
  2199. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2200. /* if RFKILL is not on, then wait for thermal
  2201. * sensor in adapter to kick in */
  2202. while (iwl3945_hw_get_temperature(priv) == 0) {
  2203. thermal_spin++;
  2204. udelay(10);
  2205. }
  2206. if (thermal_spin)
  2207. IWL_DEBUG_INFO(priv, "Thermal calibration took %dus\n",
  2208. thermal_spin * 10);
  2209. } else
  2210. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2211. /* After the ALIVE response, we can send commands to 3945 uCode */
  2212. set_bit(STATUS_ALIVE, &priv->status);
  2213. /* Clear out the uCode error bit if it is set */
  2214. clear_bit(STATUS_FW_ERROR, &priv->status);
  2215. if (iwl_is_rfkill(priv))
  2216. return;
  2217. ieee80211_wake_queues(priv->hw);
  2218. priv->active_rate = priv->rates_mask;
  2219. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  2220. iwl_power_update_mode(priv, false);
  2221. if (iwl_is_associated(priv)) {
  2222. struct iwl3945_rxon_cmd *active_rxon =
  2223. (struct iwl3945_rxon_cmd *)(&priv->active_rxon);
  2224. memcpy(&priv->staging_rxon, &priv->active_rxon,
  2225. sizeof(priv->staging_rxon));
  2226. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2227. } else {
  2228. /* Initialize our rx_config data */
  2229. iwl_connection_init_rx_config(priv, priv->iw_mode);
  2230. }
  2231. /* Configure Bluetooth device coexistence support */
  2232. iwl_send_bt_config(priv);
  2233. /* Configure the adapter for unassociated operation */
  2234. iwlcore_commit_rxon(priv);
  2235. iwl3945_reg_txpower_periodic(priv);
  2236. iwl3945_led_register(priv);
  2237. IWL_DEBUG_INFO(priv, "ALIVE processing complete.\n");
  2238. set_bit(STATUS_READY, &priv->status);
  2239. wake_up_interruptible(&priv->wait_command_queue);
  2240. if (priv->error_recovering)
  2241. iwl3945_error_recovery(priv);
  2242. /* reassociate for ADHOC mode */
  2243. if (priv->vif && (priv->iw_mode == NL80211_IFTYPE_ADHOC)) {
  2244. struct sk_buff *beacon = ieee80211_beacon_get(priv->hw,
  2245. priv->vif);
  2246. if (beacon)
  2247. iwl_mac_beacon_update(priv->hw, beacon);
  2248. }
  2249. if (test_and_clear_bit(STATUS_MODE_PENDING, &priv->status))
  2250. iwl_set_mode(priv, priv->iw_mode);
  2251. return;
  2252. restart:
  2253. queue_work(priv->workqueue, &priv->restart);
  2254. }
  2255. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv);
  2256. static void __iwl3945_down(struct iwl_priv *priv)
  2257. {
  2258. unsigned long flags;
  2259. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  2260. struct ieee80211_conf *conf = NULL;
  2261. IWL_DEBUG_INFO(priv, DRV_NAME " is going down\n");
  2262. conf = ieee80211_get_hw_conf(priv->hw);
  2263. if (!exit_pending)
  2264. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2265. iwl3945_led_unregister(priv);
  2266. priv->cfg->ops->smgmt->clear_station_table(priv);
  2267. /* Unblock any waiting calls */
  2268. wake_up_interruptible_all(&priv->wait_command_queue);
  2269. /* Wipe out the EXIT_PENDING status bit if we are not actually
  2270. * exiting the module */
  2271. if (!exit_pending)
  2272. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2273. /* stop and reset the on-board processor */
  2274. iwl_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  2275. /* tell the device to stop sending interrupts */
  2276. spin_lock_irqsave(&priv->lock, flags);
  2277. iwl_disable_interrupts(priv);
  2278. spin_unlock_irqrestore(&priv->lock, flags);
  2279. iwl_synchronize_irq(priv);
  2280. if (priv->mac80211_registered)
  2281. ieee80211_stop_queues(priv->hw);
  2282. /* If we have not previously called iwl3945_init() then
  2283. * clear all bits but the RF Kill bits and return */
  2284. if (!iwl_is_init(priv)) {
  2285. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2286. STATUS_RF_KILL_HW |
  2287. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  2288. STATUS_RF_KILL_SW |
  2289. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2290. STATUS_GEO_CONFIGURED |
  2291. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2292. STATUS_EXIT_PENDING;
  2293. goto exit;
  2294. }
  2295. /* ...otherwise clear out all the status bits but the RF Kill
  2296. * bits and continue taking the NIC down. */
  2297. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  2298. STATUS_RF_KILL_HW |
  2299. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  2300. STATUS_RF_KILL_SW |
  2301. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  2302. STATUS_GEO_CONFIGURED |
  2303. test_bit(STATUS_FW_ERROR, &priv->status) <<
  2304. STATUS_FW_ERROR |
  2305. test_bit(STATUS_EXIT_PENDING, &priv->status) <<
  2306. STATUS_EXIT_PENDING;
  2307. priv->cfg->ops->lib->apm_ops.reset(priv);
  2308. spin_lock_irqsave(&priv->lock, flags);
  2309. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  2310. spin_unlock_irqrestore(&priv->lock, flags);
  2311. iwl3945_hw_txq_ctx_stop(priv);
  2312. iwl3945_hw_rxq_stop(priv);
  2313. spin_lock_irqsave(&priv->lock, flags);
  2314. if (!iwl_grab_nic_access(priv)) {
  2315. iwl_write_prph(priv, APMG_CLK_DIS_REG,
  2316. APMG_CLK_VAL_DMA_CLK_RQT);
  2317. iwl_release_nic_access(priv);
  2318. }
  2319. spin_unlock_irqrestore(&priv->lock, flags);
  2320. udelay(5);
  2321. if (exit_pending)
  2322. priv->cfg->ops->lib->apm_ops.stop(priv);
  2323. else
  2324. priv->cfg->ops->lib->apm_ops.reset(priv);
  2325. exit:
  2326. memset(&priv->card_alive, 0, sizeof(struct iwl_alive_resp));
  2327. if (priv->ibss_beacon)
  2328. dev_kfree_skb(priv->ibss_beacon);
  2329. priv->ibss_beacon = NULL;
  2330. /* clear out any free frames */
  2331. iwl3945_clear_free_frames(priv);
  2332. }
  2333. static void iwl3945_down(struct iwl_priv *priv)
  2334. {
  2335. mutex_lock(&priv->mutex);
  2336. __iwl3945_down(priv);
  2337. mutex_unlock(&priv->mutex);
  2338. iwl3945_cancel_deferred_work(priv);
  2339. }
  2340. #define MAX_HW_RESTARTS 5
  2341. static int __iwl3945_up(struct iwl_priv *priv)
  2342. {
  2343. int rc, i;
  2344. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2345. IWL_WARN(priv, "Exit pending; will not bring the NIC up\n");
  2346. return -EIO;
  2347. }
  2348. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  2349. IWL_WARN(priv, "Radio disabled by SW RF kill (module "
  2350. "parameter)\n");
  2351. return -ENODEV;
  2352. }
  2353. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  2354. IWL_ERR(priv, "ucode not available for device bring up\n");
  2355. return -EIO;
  2356. }
  2357. /* If platform's RF_KILL switch is NOT set to KILL */
  2358. if (iwl_read32(priv, CSR_GP_CNTRL) &
  2359. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2360. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2361. else {
  2362. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2363. IWL_WARN(priv, "Radio disabled by HW RF Kill switch\n");
  2364. return -ENODEV;
  2365. }
  2366. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2367. rc = iwl3945_hw_nic_init(priv);
  2368. if (rc) {
  2369. IWL_ERR(priv, "Unable to int nic\n");
  2370. return rc;
  2371. }
  2372. /* make sure rfkill handshake bits are cleared */
  2373. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2374. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  2375. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  2376. /* clear (again), then enable host interrupts */
  2377. iwl_write32(priv, CSR_INT, 0xFFFFFFFF);
  2378. iwl_enable_interrupts(priv);
  2379. /* really make sure rfkill handshake bits are cleared */
  2380. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2381. iwl_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2382. /* Copy original ucode data image from disk into backup cache.
  2383. * This will be used to initialize the on-board processor's
  2384. * data SRAM for a clean start when the runtime program first loads. */
  2385. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  2386. priv->ucode_data.len);
  2387. /* We return success when we resume from suspend and rf_kill is on. */
  2388. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  2389. return 0;
  2390. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  2391. priv->cfg->ops->smgmt->clear_station_table(priv);
  2392. /* load bootstrap state machine,
  2393. * load bootstrap program into processor's memory,
  2394. * prepare to load the "initialize" uCode */
  2395. priv->cfg->ops->lib->load_ucode(priv);
  2396. if (rc) {
  2397. IWL_ERR(priv,
  2398. "Unable to set up bootstrap uCode: %d\n", rc);
  2399. continue;
  2400. }
  2401. /* start card; "initialize" will load runtime ucode */
  2402. iwl3945_nic_start(priv);
  2403. IWL_DEBUG_INFO(priv, DRV_NAME " is coming up\n");
  2404. return 0;
  2405. }
  2406. set_bit(STATUS_EXIT_PENDING, &priv->status);
  2407. __iwl3945_down(priv);
  2408. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  2409. /* tried to restart and config the device for as long as our
  2410. * patience could withstand */
  2411. IWL_ERR(priv, "Unable to initialize device after %d attempts.\n", i);
  2412. return -EIO;
  2413. }
  2414. /*****************************************************************************
  2415. *
  2416. * Workqueue callbacks
  2417. *
  2418. *****************************************************************************/
  2419. static void iwl3945_bg_init_alive_start(struct work_struct *data)
  2420. {
  2421. struct iwl_priv *priv =
  2422. container_of(data, struct iwl_priv, init_alive_start.work);
  2423. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2424. return;
  2425. mutex_lock(&priv->mutex);
  2426. iwl3945_init_alive_start(priv);
  2427. mutex_unlock(&priv->mutex);
  2428. }
  2429. static void iwl3945_bg_alive_start(struct work_struct *data)
  2430. {
  2431. struct iwl_priv *priv =
  2432. container_of(data, struct iwl_priv, alive_start.work);
  2433. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2434. return;
  2435. mutex_lock(&priv->mutex);
  2436. iwl3945_alive_start(priv);
  2437. mutex_unlock(&priv->mutex);
  2438. }
  2439. static void iwl3945_rfkill_poll(struct work_struct *data)
  2440. {
  2441. struct iwl_priv *priv =
  2442. container_of(data, struct iwl_priv, rfkill_poll.work);
  2443. unsigned long status = priv->status;
  2444. if (iwl_read32(priv, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  2445. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  2446. else
  2447. set_bit(STATUS_RF_KILL_HW, &priv->status);
  2448. if (test_bit(STATUS_RF_KILL_HW, &status) != test_bit(STATUS_RF_KILL_HW, &priv->status))
  2449. queue_work(priv->workqueue, &priv->rf_kill);
  2450. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2451. round_jiffies_relative(2 * HZ));
  2452. }
  2453. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  2454. static void iwl3945_bg_request_scan(struct work_struct *data)
  2455. {
  2456. struct iwl_priv *priv =
  2457. container_of(data, struct iwl_priv, request_scan);
  2458. struct iwl_host_cmd cmd = {
  2459. .id = REPLY_SCAN_CMD,
  2460. .len = sizeof(struct iwl3945_scan_cmd),
  2461. .meta.flags = CMD_SIZE_HUGE,
  2462. };
  2463. int rc = 0;
  2464. struct iwl3945_scan_cmd *scan;
  2465. struct ieee80211_conf *conf = NULL;
  2466. u8 n_probes = 0;
  2467. enum ieee80211_band band;
  2468. bool is_active = false;
  2469. conf = ieee80211_get_hw_conf(priv->hw);
  2470. mutex_lock(&priv->mutex);
  2471. if (!iwl_is_ready(priv)) {
  2472. IWL_WARN(priv, "request scan called when driver not ready.\n");
  2473. goto done;
  2474. }
  2475. /* Make sure the scan wasn't canceled before this queued work
  2476. * was given the chance to run... */
  2477. if (!test_bit(STATUS_SCANNING, &priv->status))
  2478. goto done;
  2479. /* This should never be called or scheduled if there is currently
  2480. * a scan active in the hardware. */
  2481. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  2482. IWL_DEBUG_INFO(priv, "Multiple concurrent scan requests "
  2483. "Ignoring second request.\n");
  2484. rc = -EIO;
  2485. goto done;
  2486. }
  2487. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  2488. IWL_DEBUG_SCAN(priv, "Aborting scan due to device shutdown\n");
  2489. goto done;
  2490. }
  2491. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2492. IWL_DEBUG_HC(priv,
  2493. "Scan request while abort pending. Queuing.\n");
  2494. goto done;
  2495. }
  2496. if (iwl_is_rfkill(priv)) {
  2497. IWL_DEBUG_HC(priv, "Aborting scan due to RF Kill activation\n");
  2498. goto done;
  2499. }
  2500. if (!test_bit(STATUS_READY, &priv->status)) {
  2501. IWL_DEBUG_HC(priv,
  2502. "Scan request while uninitialized. Queuing.\n");
  2503. goto done;
  2504. }
  2505. if (!priv->scan_bands) {
  2506. IWL_DEBUG_HC(priv, "Aborting scan due to no requested bands\n");
  2507. goto done;
  2508. }
  2509. if (!priv->scan) {
  2510. priv->scan = kmalloc(sizeof(struct iwl3945_scan_cmd) +
  2511. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  2512. if (!priv->scan) {
  2513. rc = -ENOMEM;
  2514. goto done;
  2515. }
  2516. }
  2517. scan = priv->scan;
  2518. memset(scan, 0, sizeof(struct iwl3945_scan_cmd) + IWL_MAX_SCAN_SIZE);
  2519. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  2520. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  2521. if (iwl_is_associated(priv)) {
  2522. u16 interval = 0;
  2523. u32 extra;
  2524. u32 suspend_time = 100;
  2525. u32 scan_suspend_time = 100;
  2526. unsigned long flags;
  2527. IWL_DEBUG_INFO(priv, "Scanning while associated...\n");
  2528. spin_lock_irqsave(&priv->lock, flags);
  2529. interval = priv->beacon_int;
  2530. spin_unlock_irqrestore(&priv->lock, flags);
  2531. scan->suspend_time = 0;
  2532. scan->max_out_time = cpu_to_le32(200 * 1024);
  2533. if (!interval)
  2534. interval = suspend_time;
  2535. /*
  2536. * suspend time format:
  2537. * 0-19: beacon interval in usec (time before exec.)
  2538. * 20-23: 0
  2539. * 24-31: number of beacons (suspend between channels)
  2540. */
  2541. extra = (suspend_time / interval) << 24;
  2542. scan_suspend_time = 0xFF0FFFFF &
  2543. (extra | ((suspend_time % interval) * 1024));
  2544. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  2545. IWL_DEBUG_SCAN(priv, "suspend_time 0x%X beacon interval %d\n",
  2546. scan_suspend_time, interval);
  2547. }
  2548. if (priv->scan_request->n_ssids) {
  2549. int i, p = 0;
  2550. IWL_DEBUG_SCAN(priv, "Kicking off active scan\n");
  2551. for (i = 0; i < priv->scan_request->n_ssids; i++) {
  2552. /* always does wildcard anyway */
  2553. if (!priv->scan_request->ssids[i].ssid_len)
  2554. continue;
  2555. scan->direct_scan[p].id = WLAN_EID_SSID;
  2556. scan->direct_scan[p].len =
  2557. priv->scan_request->ssids[i].ssid_len;
  2558. memcpy(scan->direct_scan[p].ssid,
  2559. priv->scan_request->ssids[i].ssid,
  2560. priv->scan_request->ssids[i].ssid_len);
  2561. n_probes++;
  2562. p++;
  2563. }
  2564. is_active = true;
  2565. } else
  2566. IWL_DEBUG_SCAN(priv, "Kicking off passive scan.\n");
  2567. /* We don't build a direct scan probe request; the uCode will do
  2568. * that based on the direct_mask added to each channel entry */
  2569. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  2570. scan->tx_cmd.sta_id = priv->hw_params.bcast_sta_id;
  2571. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2572. /* flags + rate selection */
  2573. if (priv->scan_bands & BIT(IEEE80211_BAND_2GHZ)) {
  2574. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  2575. scan->tx_cmd.rate = IWL_RATE_1M_PLCP;
  2576. scan->good_CRC_th = 0;
  2577. band = IEEE80211_BAND_2GHZ;
  2578. } else if (priv->scan_bands & BIT(IEEE80211_BAND_5GHZ)) {
  2579. scan->tx_cmd.rate = IWL_RATE_6M_PLCP;
  2580. /*
  2581. * If active scaning is requested but a certain channel
  2582. * is marked passive, we can do active scanning if we
  2583. * detect transmissions.
  2584. */
  2585. scan->good_CRC_th = is_active ? IWL_GOOD_CRC_TH : 0;
  2586. band = IEEE80211_BAND_5GHZ;
  2587. } else {
  2588. IWL_WARN(priv, "Invalid scan band count\n");
  2589. goto done;
  2590. }
  2591. scan->tx_cmd.len = cpu_to_le16(
  2592. iwl_fill_probe_req(priv,
  2593. (struct ieee80211_mgmt *)scan->data,
  2594. priv->scan_request->ie,
  2595. priv->scan_request->ie_len,
  2596. IWL_MAX_SCAN_SIZE - sizeof(*scan)));
  2597. /* select Rx antennas */
  2598. scan->flags |= iwl3945_get_antenna_flags(priv);
  2599. if (priv->iw_mode == NL80211_IFTYPE_MONITOR)
  2600. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  2601. scan->channel_count =
  2602. iwl3945_get_channels_for_scan(priv, band, is_active, n_probes,
  2603. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  2604. if (scan->channel_count == 0) {
  2605. IWL_DEBUG_SCAN(priv, "channel count %d\n", scan->channel_count);
  2606. goto done;
  2607. }
  2608. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  2609. scan->channel_count * sizeof(struct iwl3945_scan_channel);
  2610. cmd.data = scan;
  2611. scan->len = cpu_to_le16(cmd.len);
  2612. set_bit(STATUS_SCAN_HW, &priv->status);
  2613. rc = iwl_send_cmd_sync(priv, &cmd);
  2614. if (rc)
  2615. goto done;
  2616. queue_delayed_work(priv->workqueue, &priv->scan_check,
  2617. IWL_SCAN_CHECK_WATCHDOG);
  2618. mutex_unlock(&priv->mutex);
  2619. return;
  2620. done:
  2621. /* can not perform scan make sure we clear scanning
  2622. * bits from status so next scan request can be performed.
  2623. * if we dont clear scanning status bit here all next scan
  2624. * will fail
  2625. */
  2626. clear_bit(STATUS_SCAN_HW, &priv->status);
  2627. clear_bit(STATUS_SCANNING, &priv->status);
  2628. /* inform mac80211 scan aborted */
  2629. queue_work(priv->workqueue, &priv->scan_completed);
  2630. mutex_unlock(&priv->mutex);
  2631. }
  2632. static void iwl3945_bg_up(struct work_struct *data)
  2633. {
  2634. struct iwl_priv *priv = container_of(data, struct iwl_priv, up);
  2635. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2636. return;
  2637. mutex_lock(&priv->mutex);
  2638. __iwl3945_up(priv);
  2639. mutex_unlock(&priv->mutex);
  2640. iwl_rfkill_set_hw_state(priv);
  2641. }
  2642. static void iwl3945_bg_restart(struct work_struct *data)
  2643. {
  2644. struct iwl_priv *priv = container_of(data, struct iwl_priv, restart);
  2645. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2646. return;
  2647. iwl3945_down(priv);
  2648. queue_work(priv->workqueue, &priv->up);
  2649. }
  2650. static void iwl3945_bg_rx_replenish(struct work_struct *data)
  2651. {
  2652. struct iwl_priv *priv =
  2653. container_of(data, struct iwl_priv, rx_replenish);
  2654. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2655. return;
  2656. mutex_lock(&priv->mutex);
  2657. iwl3945_rx_replenish(priv);
  2658. mutex_unlock(&priv->mutex);
  2659. }
  2660. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  2661. void iwl3945_post_associate(struct iwl_priv *priv)
  2662. {
  2663. int rc = 0;
  2664. struct ieee80211_conf *conf = NULL;
  2665. if (priv->iw_mode == NL80211_IFTYPE_AP) {
  2666. IWL_ERR(priv, "%s Should not be called in AP mode\n", __func__);
  2667. return;
  2668. }
  2669. IWL_DEBUG_ASSOC(priv, "Associated as %d to: %pM\n",
  2670. priv->assoc_id, priv->active_rxon.bssid_addr);
  2671. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2672. return;
  2673. if (!priv->vif || !priv->is_open)
  2674. return;
  2675. iwl_scan_cancel_timeout(priv, 200);
  2676. conf = ieee80211_get_hw_conf(priv->hw);
  2677. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2678. iwlcore_commit_rxon(priv);
  2679. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2680. iwl3945_setup_rxon_timing(priv);
  2681. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2682. sizeof(priv->rxon_timing), &priv->rxon_timing);
  2683. if (rc)
  2684. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2685. "Attempting to continue.\n");
  2686. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2687. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2688. IWL_DEBUG_ASSOC(priv, "assoc id %d beacon interval %d\n",
  2689. priv->assoc_id, priv->beacon_int);
  2690. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2691. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2692. else
  2693. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2694. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2695. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2696. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2697. else
  2698. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2699. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2700. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2701. }
  2702. iwlcore_commit_rxon(priv);
  2703. switch (priv->iw_mode) {
  2704. case NL80211_IFTYPE_STATION:
  2705. iwl3945_rate_scale_init(priv->hw, IWL_AP_ID);
  2706. break;
  2707. case NL80211_IFTYPE_ADHOC:
  2708. priv->assoc_id = 1;
  2709. priv->cfg->ops->smgmt->add_station(priv, priv->bssid, 0, 0, NULL);
  2710. iwl3945_sync_sta(priv, IWL_STA_ID,
  2711. (priv->band == IEEE80211_BAND_5GHZ) ?
  2712. IWL_RATE_6M_PLCP : IWL_RATE_1M_PLCP,
  2713. CMD_ASYNC);
  2714. iwl3945_rate_scale_init(priv->hw, IWL_STA_ID);
  2715. iwl3945_send_beacon_cmd(priv);
  2716. break;
  2717. default:
  2718. IWL_ERR(priv, "%s Should not be called in %d mode\n",
  2719. __func__, priv->iw_mode);
  2720. break;
  2721. }
  2722. iwl_activate_qos(priv, 0);
  2723. /* we have just associated, don't start scan too early */
  2724. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  2725. }
  2726. /*****************************************************************************
  2727. *
  2728. * mac80211 entry point functions
  2729. *
  2730. *****************************************************************************/
  2731. #define UCODE_READY_TIMEOUT (2 * HZ)
  2732. static int iwl3945_mac_start(struct ieee80211_hw *hw)
  2733. {
  2734. struct iwl_priv *priv = hw->priv;
  2735. int ret;
  2736. IWL_DEBUG_MAC80211(priv, "enter\n");
  2737. /* we should be verifying the device is ready to be opened */
  2738. mutex_lock(&priv->mutex);
  2739. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  2740. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  2741. * ucode filename and max sizes are card-specific. */
  2742. if (!priv->ucode_code.len) {
  2743. ret = iwl3945_read_ucode(priv);
  2744. if (ret) {
  2745. IWL_ERR(priv, "Could not read microcode: %d\n", ret);
  2746. mutex_unlock(&priv->mutex);
  2747. goto out_release_irq;
  2748. }
  2749. }
  2750. ret = __iwl3945_up(priv);
  2751. mutex_unlock(&priv->mutex);
  2752. iwl_rfkill_set_hw_state(priv);
  2753. if (ret)
  2754. goto out_release_irq;
  2755. IWL_DEBUG_INFO(priv, "Start UP work.\n");
  2756. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  2757. * mac80211 will not be run successfully. */
  2758. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  2759. test_bit(STATUS_READY, &priv->status),
  2760. UCODE_READY_TIMEOUT);
  2761. if (!ret) {
  2762. if (!test_bit(STATUS_READY, &priv->status)) {
  2763. IWL_ERR(priv,
  2764. "Wait for START_ALIVE timeout after %dms.\n",
  2765. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  2766. ret = -ETIMEDOUT;
  2767. goto out_release_irq;
  2768. }
  2769. }
  2770. /* ucode is running and will send rfkill notifications,
  2771. * no need to poll the killswitch state anymore */
  2772. cancel_delayed_work(&priv->rfkill_poll);
  2773. priv->is_open = 1;
  2774. IWL_DEBUG_MAC80211(priv, "leave\n");
  2775. return 0;
  2776. out_release_irq:
  2777. priv->is_open = 0;
  2778. IWL_DEBUG_MAC80211(priv, "leave - failed\n");
  2779. return ret;
  2780. }
  2781. static void iwl3945_mac_stop(struct ieee80211_hw *hw)
  2782. {
  2783. struct iwl_priv *priv = hw->priv;
  2784. IWL_DEBUG_MAC80211(priv, "enter\n");
  2785. if (!priv->is_open) {
  2786. IWL_DEBUG_MAC80211(priv, "leave - skip\n");
  2787. return;
  2788. }
  2789. priv->is_open = 0;
  2790. if (iwl_is_ready_rf(priv)) {
  2791. /* stop mac, cancel any scan request and clear
  2792. * RXON_FILTER_ASSOC_MSK BIT
  2793. */
  2794. mutex_lock(&priv->mutex);
  2795. iwl_scan_cancel_timeout(priv, 100);
  2796. mutex_unlock(&priv->mutex);
  2797. }
  2798. iwl3945_down(priv);
  2799. flush_workqueue(priv->workqueue);
  2800. /* start polling the killswitch state again */
  2801. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  2802. round_jiffies_relative(2 * HZ));
  2803. IWL_DEBUG_MAC80211(priv, "leave\n");
  2804. }
  2805. static int iwl3945_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  2806. {
  2807. struct iwl_priv *priv = hw->priv;
  2808. IWL_DEBUG_MAC80211(priv, "enter\n");
  2809. IWL_DEBUG_TX(priv, "dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  2810. ieee80211_get_tx_rate(hw, IEEE80211_SKB_CB(skb))->bitrate);
  2811. if (iwl3945_tx_skb(priv, skb))
  2812. dev_kfree_skb_any(skb);
  2813. IWL_DEBUG_MAC80211(priv, "leave\n");
  2814. return NETDEV_TX_OK;
  2815. }
  2816. void iwl3945_config_ap(struct iwl_priv *priv)
  2817. {
  2818. int rc = 0;
  2819. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  2820. return;
  2821. /* The following should be done only at AP bring up */
  2822. if (!(iwl_is_associated(priv))) {
  2823. /* RXON - unassoc (to set timing command) */
  2824. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  2825. iwlcore_commit_rxon(priv);
  2826. /* RXON Timing */
  2827. memset(&priv->rxon_timing, 0, sizeof(struct iwl_rxon_time_cmd));
  2828. iwl3945_setup_rxon_timing(priv);
  2829. rc = iwl_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  2830. sizeof(priv->rxon_timing),
  2831. &priv->rxon_timing);
  2832. if (rc)
  2833. IWL_WARN(priv, "REPLY_RXON_TIMING failed - "
  2834. "Attempting to continue.\n");
  2835. /* FIXME: what should be the assoc_id for AP? */
  2836. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  2837. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  2838. priv->staging_rxon.flags |=
  2839. RXON_FLG_SHORT_PREAMBLE_MSK;
  2840. else
  2841. priv->staging_rxon.flags &=
  2842. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2843. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  2844. if (priv->assoc_capability &
  2845. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2846. priv->staging_rxon.flags |=
  2847. RXON_FLG_SHORT_SLOT_MSK;
  2848. else
  2849. priv->staging_rxon.flags &=
  2850. ~RXON_FLG_SHORT_SLOT_MSK;
  2851. if (priv->iw_mode == NL80211_IFTYPE_ADHOC)
  2852. priv->staging_rxon.flags &=
  2853. ~RXON_FLG_SHORT_SLOT_MSK;
  2854. }
  2855. /* restore RXON assoc */
  2856. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  2857. iwlcore_commit_rxon(priv);
  2858. priv->cfg->ops->smgmt->add_station(priv, iwl_bcast_addr, 0, 0, NULL);
  2859. }
  2860. iwl3945_send_beacon_cmd(priv);
  2861. /* FIXME - we need to add code here to detect a totally new
  2862. * configuration, reset the AP, unassoc, rxon timing, assoc,
  2863. * clear sta table, add BCAST sta... */
  2864. }
  2865. static int iwl3945_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  2866. struct ieee80211_vif *vif,
  2867. struct ieee80211_sta *sta,
  2868. struct ieee80211_key_conf *key)
  2869. {
  2870. struct iwl_priv *priv = hw->priv;
  2871. const u8 *addr;
  2872. int ret = 0;
  2873. u8 sta_id = IWL_INVALID_STATION;
  2874. u8 static_key;
  2875. IWL_DEBUG_MAC80211(priv, "enter\n");
  2876. if (iwl3945_mod_params.sw_crypto) {
  2877. IWL_DEBUG_MAC80211(priv, "leave - hwcrypto disabled\n");
  2878. return -EOPNOTSUPP;
  2879. }
  2880. addr = sta ? sta->addr : iwl_bcast_addr;
  2881. static_key = !iwl_is_associated(priv);
  2882. if (!static_key) {
  2883. sta_id = priv->cfg->ops->smgmt->find_station(priv, addr);
  2884. if (sta_id == IWL_INVALID_STATION) {
  2885. IWL_DEBUG_MAC80211(priv, "leave - %pM not in station map.\n",
  2886. addr);
  2887. return -EINVAL;
  2888. }
  2889. }
  2890. mutex_lock(&priv->mutex);
  2891. iwl_scan_cancel_timeout(priv, 100);
  2892. mutex_unlock(&priv->mutex);
  2893. switch (cmd) {
  2894. case SET_KEY:
  2895. if (static_key)
  2896. ret = iwl3945_set_static_key(priv, key);
  2897. else
  2898. ret = iwl3945_set_dynamic_key(priv, key, sta_id);
  2899. IWL_DEBUG_MAC80211(priv, "enable hwcrypto key\n");
  2900. break;
  2901. case DISABLE_KEY:
  2902. if (static_key)
  2903. ret = iwl3945_remove_static_key(priv);
  2904. else
  2905. ret = iwl3945_clear_sta_key_info(priv, sta_id);
  2906. IWL_DEBUG_MAC80211(priv, "disable hwcrypto key\n");
  2907. break;
  2908. default:
  2909. ret = -EINVAL;
  2910. }
  2911. IWL_DEBUG_MAC80211(priv, "leave\n");
  2912. return ret;
  2913. }
  2914. /*****************************************************************************
  2915. *
  2916. * sysfs attributes
  2917. *
  2918. *****************************************************************************/
  2919. #ifdef CONFIG_IWLWIFI_DEBUG
  2920. /*
  2921. * The following adds a new attribute to the sysfs representation
  2922. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  2923. * used for controlling the debug level.
  2924. *
  2925. * See the level definitions in iwl for details.
  2926. */
  2927. static ssize_t show_debug_level(struct device *d,
  2928. struct device_attribute *attr, char *buf)
  2929. {
  2930. struct iwl_priv *priv = d->driver_data;
  2931. return sprintf(buf, "0x%08X\n", priv->debug_level);
  2932. }
  2933. static ssize_t store_debug_level(struct device *d,
  2934. struct device_attribute *attr,
  2935. const char *buf, size_t count)
  2936. {
  2937. struct iwl_priv *priv = d->driver_data;
  2938. unsigned long val;
  2939. int ret;
  2940. ret = strict_strtoul(buf, 0, &val);
  2941. if (ret)
  2942. IWL_INFO(priv, "%s is not in hex or decimal form.\n", buf);
  2943. else
  2944. priv->debug_level = val;
  2945. return strnlen(buf, count);
  2946. }
  2947. static DEVICE_ATTR(debug_level, S_IWUSR | S_IRUGO,
  2948. show_debug_level, store_debug_level);
  2949. #endif /* CONFIG_IWLWIFI_DEBUG */
  2950. static ssize_t show_temperature(struct device *d,
  2951. struct device_attribute *attr, char *buf)
  2952. {
  2953. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  2954. if (!iwl_is_alive(priv))
  2955. return -EAGAIN;
  2956. return sprintf(buf, "%d\n", iwl3945_hw_get_temperature(priv));
  2957. }
  2958. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  2959. static ssize_t show_tx_power(struct device *d,
  2960. struct device_attribute *attr, char *buf)
  2961. {
  2962. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  2963. return sprintf(buf, "%d\n", priv->tx_power_user_lmt);
  2964. }
  2965. static ssize_t store_tx_power(struct device *d,
  2966. struct device_attribute *attr,
  2967. const char *buf, size_t count)
  2968. {
  2969. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  2970. char *p = (char *)buf;
  2971. u32 val;
  2972. val = simple_strtoul(p, &p, 10);
  2973. if (p == buf)
  2974. IWL_INFO(priv, ": %s is not in decimal form.\n", buf);
  2975. else
  2976. iwl3945_hw_reg_set_txpower(priv, val);
  2977. return count;
  2978. }
  2979. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  2980. static ssize_t show_flags(struct device *d,
  2981. struct device_attribute *attr, char *buf)
  2982. {
  2983. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  2984. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  2985. }
  2986. static ssize_t store_flags(struct device *d,
  2987. struct device_attribute *attr,
  2988. const char *buf, size_t count)
  2989. {
  2990. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  2991. u32 flags = simple_strtoul(buf, NULL, 0);
  2992. mutex_lock(&priv->mutex);
  2993. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  2994. /* Cancel any currently running scans... */
  2995. if (iwl_scan_cancel_timeout(priv, 100))
  2996. IWL_WARN(priv, "Could not cancel scan.\n");
  2997. else {
  2998. IWL_DEBUG_INFO(priv, "Committing rxon.flags = 0x%04X\n",
  2999. flags);
  3000. priv->staging_rxon.flags = cpu_to_le32(flags);
  3001. iwlcore_commit_rxon(priv);
  3002. }
  3003. }
  3004. mutex_unlock(&priv->mutex);
  3005. return count;
  3006. }
  3007. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  3008. static ssize_t show_filter_flags(struct device *d,
  3009. struct device_attribute *attr, char *buf)
  3010. {
  3011. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3012. return sprintf(buf, "0x%04X\n",
  3013. le32_to_cpu(priv->active_rxon.filter_flags));
  3014. }
  3015. static ssize_t store_filter_flags(struct device *d,
  3016. struct device_attribute *attr,
  3017. const char *buf, size_t count)
  3018. {
  3019. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3020. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  3021. mutex_lock(&priv->mutex);
  3022. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  3023. /* Cancel any currently running scans... */
  3024. if (iwl_scan_cancel_timeout(priv, 100))
  3025. IWL_WARN(priv, "Could not cancel scan.\n");
  3026. else {
  3027. IWL_DEBUG_INFO(priv, "Committing rxon.filter_flags = "
  3028. "0x%04X\n", filter_flags);
  3029. priv->staging_rxon.filter_flags =
  3030. cpu_to_le32(filter_flags);
  3031. iwlcore_commit_rxon(priv);
  3032. }
  3033. }
  3034. mutex_unlock(&priv->mutex);
  3035. return count;
  3036. }
  3037. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  3038. store_filter_flags);
  3039. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  3040. static ssize_t show_measurement(struct device *d,
  3041. struct device_attribute *attr, char *buf)
  3042. {
  3043. struct iwl_priv *priv = dev_get_drvdata(d);
  3044. struct iwl_spectrum_notification measure_report;
  3045. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  3046. u8 *data = (u8 *)&measure_report;
  3047. unsigned long flags;
  3048. spin_lock_irqsave(&priv->lock, flags);
  3049. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  3050. spin_unlock_irqrestore(&priv->lock, flags);
  3051. return 0;
  3052. }
  3053. memcpy(&measure_report, &priv->measure_report, size);
  3054. priv->measurement_status = 0;
  3055. spin_unlock_irqrestore(&priv->lock, flags);
  3056. while (size && (PAGE_SIZE - len)) {
  3057. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  3058. PAGE_SIZE - len, 1);
  3059. len = strlen(buf);
  3060. if (PAGE_SIZE - len)
  3061. buf[len++] = '\n';
  3062. ofs += 16;
  3063. size -= min(size, 16U);
  3064. }
  3065. return len;
  3066. }
  3067. static ssize_t store_measurement(struct device *d,
  3068. struct device_attribute *attr,
  3069. const char *buf, size_t count)
  3070. {
  3071. struct iwl_priv *priv = dev_get_drvdata(d);
  3072. struct ieee80211_measurement_params params = {
  3073. .channel = le16_to_cpu(priv->active_rxon.channel),
  3074. .start_time = cpu_to_le64(priv->last_tsf),
  3075. .duration = cpu_to_le16(1),
  3076. };
  3077. u8 type = IWL_MEASURE_BASIC;
  3078. u8 buffer[32];
  3079. u8 channel;
  3080. if (count) {
  3081. char *p = buffer;
  3082. strncpy(buffer, buf, min(sizeof(buffer), count));
  3083. channel = simple_strtoul(p, NULL, 0);
  3084. if (channel)
  3085. params.channel = channel;
  3086. p = buffer;
  3087. while (*p && *p != ' ')
  3088. p++;
  3089. if (*p)
  3090. type = simple_strtoul(p + 1, NULL, 0);
  3091. }
  3092. IWL_DEBUG_INFO(priv, "Invoking measurement of type %d on "
  3093. "channel %d (for '%s')\n", type, params.channel, buf);
  3094. iwl3945_get_measurement(priv, &params, type);
  3095. return count;
  3096. }
  3097. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  3098. show_measurement, store_measurement);
  3099. #endif /* CONFIG_IWL3945_SPECTRUM_MEASUREMENT */
  3100. static ssize_t store_retry_rate(struct device *d,
  3101. struct device_attribute *attr,
  3102. const char *buf, size_t count)
  3103. {
  3104. struct iwl_priv *priv = dev_get_drvdata(d);
  3105. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  3106. if (priv->retry_rate <= 0)
  3107. priv->retry_rate = 1;
  3108. return count;
  3109. }
  3110. static ssize_t show_retry_rate(struct device *d,
  3111. struct device_attribute *attr, char *buf)
  3112. {
  3113. struct iwl_priv *priv = dev_get_drvdata(d);
  3114. return sprintf(buf, "%d", priv->retry_rate);
  3115. }
  3116. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  3117. store_retry_rate);
  3118. static ssize_t store_power_level(struct device *d,
  3119. struct device_attribute *attr,
  3120. const char *buf, size_t count)
  3121. {
  3122. struct iwl_priv *priv = dev_get_drvdata(d);
  3123. int ret;
  3124. unsigned long mode;
  3125. mutex_lock(&priv->mutex);
  3126. ret = strict_strtoul(buf, 10, &mode);
  3127. if (ret)
  3128. goto out;
  3129. ret = iwl_power_set_user_mode(priv, mode);
  3130. if (ret) {
  3131. IWL_DEBUG_MAC80211(priv, "failed setting power mode.\n");
  3132. goto out;
  3133. }
  3134. ret = count;
  3135. out:
  3136. mutex_unlock(&priv->mutex);
  3137. return ret;
  3138. }
  3139. static ssize_t show_power_level(struct device *d,
  3140. struct device_attribute *attr, char *buf)
  3141. {
  3142. struct iwl_priv *priv = dev_get_drvdata(d);
  3143. int mode = priv->power_data.user_power_setting;
  3144. int system = priv->power_data.system_power_setting;
  3145. int level = priv->power_data.power_mode;
  3146. char *p = buf;
  3147. switch (system) {
  3148. case IWL_POWER_SYS_AUTO:
  3149. p += sprintf(p, "SYSTEM:auto");
  3150. break;
  3151. case IWL_POWER_SYS_AC:
  3152. p += sprintf(p, "SYSTEM:ac");
  3153. break;
  3154. case IWL_POWER_SYS_BATTERY:
  3155. p += sprintf(p, "SYSTEM:battery");
  3156. break;
  3157. }
  3158. p += sprintf(p, "\tMODE:%s", (mode < IWL_POWER_AUTO) ?
  3159. "fixed" : "auto");
  3160. p += sprintf(p, "\tINDEX:%d", level);
  3161. p += sprintf(p, "\n");
  3162. return p - buf + 1;
  3163. }
  3164. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR,
  3165. show_power_level, store_power_level);
  3166. #define MAX_WX_STRING 80
  3167. /* Values are in microsecond */
  3168. static const s32 timeout_duration[] = {
  3169. 350000,
  3170. 250000,
  3171. 75000,
  3172. 37000,
  3173. 25000,
  3174. };
  3175. static const s32 period_duration[] = {
  3176. 400000,
  3177. 700000,
  3178. 1000000,
  3179. 1000000,
  3180. 1000000
  3181. };
  3182. static ssize_t show_channels(struct device *d,
  3183. struct device_attribute *attr, char *buf)
  3184. {
  3185. /* all this shit doesn't belong into sysfs anyway */
  3186. return 0;
  3187. }
  3188. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  3189. static ssize_t show_statistics(struct device *d,
  3190. struct device_attribute *attr, char *buf)
  3191. {
  3192. struct iwl_priv *priv = dev_get_drvdata(d);
  3193. u32 size = sizeof(struct iwl3945_notif_statistics);
  3194. u32 len = 0, ofs = 0;
  3195. u8 *data = (u8 *)&priv->statistics_39;
  3196. int rc = 0;
  3197. if (!iwl_is_alive(priv))
  3198. return -EAGAIN;
  3199. mutex_lock(&priv->mutex);
  3200. rc = iwl_send_statistics_request(priv, 0);
  3201. mutex_unlock(&priv->mutex);
  3202. if (rc) {
  3203. len = sprintf(buf,
  3204. "Error sending statistics request: 0x%08X\n", rc);
  3205. return len;
  3206. }
  3207. while (size && (PAGE_SIZE - len)) {
  3208. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  3209. PAGE_SIZE - len, 1);
  3210. len = strlen(buf);
  3211. if (PAGE_SIZE - len)
  3212. buf[len++] = '\n';
  3213. ofs += 16;
  3214. size -= min(size, 16U);
  3215. }
  3216. return len;
  3217. }
  3218. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  3219. static ssize_t show_antenna(struct device *d,
  3220. struct device_attribute *attr, char *buf)
  3221. {
  3222. struct iwl_priv *priv = dev_get_drvdata(d);
  3223. if (!iwl_is_alive(priv))
  3224. return -EAGAIN;
  3225. return sprintf(buf, "%d\n", iwl3945_mod_params.antenna);
  3226. }
  3227. static ssize_t store_antenna(struct device *d,
  3228. struct device_attribute *attr,
  3229. const char *buf, size_t count)
  3230. {
  3231. struct iwl_priv *priv __maybe_unused = dev_get_drvdata(d);
  3232. int ant;
  3233. if (count == 0)
  3234. return 0;
  3235. if (sscanf(buf, "%1i", &ant) != 1) {
  3236. IWL_DEBUG_INFO(priv, "not in hex or decimal form.\n");
  3237. return count;
  3238. }
  3239. if ((ant >= 0) && (ant <= 2)) {
  3240. IWL_DEBUG_INFO(priv, "Setting antenna select to %d.\n", ant);
  3241. iwl3945_mod_params.antenna = (enum iwl3945_antenna)ant;
  3242. } else
  3243. IWL_DEBUG_INFO(priv, "Bad antenna select value %d.\n", ant);
  3244. return count;
  3245. }
  3246. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  3247. static ssize_t show_status(struct device *d,
  3248. struct device_attribute *attr, char *buf)
  3249. {
  3250. struct iwl_priv *priv = (struct iwl_priv *)d->driver_data;
  3251. if (!iwl_is_alive(priv))
  3252. return -EAGAIN;
  3253. return sprintf(buf, "0x%08x\n", (int)priv->status);
  3254. }
  3255. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  3256. static ssize_t dump_error_log(struct device *d,
  3257. struct device_attribute *attr,
  3258. const char *buf, size_t count)
  3259. {
  3260. char *p = (char *)buf;
  3261. if (p[0] == '1')
  3262. iwl3945_dump_nic_error_log((struct iwl_priv *)d->driver_data);
  3263. return strnlen(buf, count);
  3264. }
  3265. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  3266. static ssize_t dump_event_log(struct device *d,
  3267. struct device_attribute *attr,
  3268. const char *buf, size_t count)
  3269. {
  3270. char *p = (char *)buf;
  3271. if (p[0] == '1')
  3272. iwl3945_dump_nic_event_log((struct iwl_priv *)d->driver_data);
  3273. return strnlen(buf, count);
  3274. }
  3275. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  3276. /*****************************************************************************
  3277. *
  3278. * driver setup and tear down
  3279. *
  3280. *****************************************************************************/
  3281. static void iwl3945_setup_deferred_work(struct iwl_priv *priv)
  3282. {
  3283. priv->workqueue = create_singlethread_workqueue(DRV_NAME);
  3284. init_waitqueue_head(&priv->wait_command_queue);
  3285. INIT_WORK(&priv->up, iwl3945_bg_up);
  3286. INIT_WORK(&priv->restart, iwl3945_bg_restart);
  3287. INIT_WORK(&priv->rx_replenish, iwl3945_bg_rx_replenish);
  3288. INIT_WORK(&priv->rf_kill, iwl_bg_rf_kill);
  3289. INIT_WORK(&priv->beacon_update, iwl3945_bg_beacon_update);
  3290. INIT_DELAYED_WORK(&priv->init_alive_start, iwl3945_bg_init_alive_start);
  3291. INIT_DELAYED_WORK(&priv->alive_start, iwl3945_bg_alive_start);
  3292. INIT_DELAYED_WORK(&priv->rfkill_poll, iwl3945_rfkill_poll);
  3293. INIT_WORK(&priv->scan_completed, iwl_bg_scan_completed);
  3294. INIT_WORK(&priv->request_scan, iwl3945_bg_request_scan);
  3295. INIT_WORK(&priv->abort_scan, iwl_bg_abort_scan);
  3296. INIT_DELAYED_WORK(&priv->scan_check, iwl_bg_scan_check);
  3297. iwl3945_hw_setup_deferred_work(priv);
  3298. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  3299. iwl3945_irq_tasklet, (unsigned long)priv);
  3300. }
  3301. static void iwl3945_cancel_deferred_work(struct iwl_priv *priv)
  3302. {
  3303. iwl3945_hw_cancel_deferred_work(priv);
  3304. cancel_delayed_work_sync(&priv->init_alive_start);
  3305. cancel_delayed_work(&priv->scan_check);
  3306. cancel_delayed_work(&priv->alive_start);
  3307. cancel_work_sync(&priv->beacon_update);
  3308. }
  3309. static struct attribute *iwl3945_sysfs_entries[] = {
  3310. &dev_attr_antenna.attr,
  3311. &dev_attr_channels.attr,
  3312. &dev_attr_dump_errors.attr,
  3313. &dev_attr_dump_events.attr,
  3314. &dev_attr_flags.attr,
  3315. &dev_attr_filter_flags.attr,
  3316. #ifdef CONFIG_IWL3945_SPECTRUM_MEASUREMENT
  3317. &dev_attr_measurement.attr,
  3318. #endif
  3319. &dev_attr_power_level.attr,
  3320. &dev_attr_retry_rate.attr,
  3321. &dev_attr_statistics.attr,
  3322. &dev_attr_status.attr,
  3323. &dev_attr_temperature.attr,
  3324. &dev_attr_tx_power.attr,
  3325. #ifdef CONFIG_IWLWIFI_DEBUG
  3326. &dev_attr_debug_level.attr,
  3327. #endif
  3328. NULL
  3329. };
  3330. static struct attribute_group iwl3945_attribute_group = {
  3331. .name = NULL, /* put in device directory */
  3332. .attrs = iwl3945_sysfs_entries,
  3333. };
  3334. static struct ieee80211_ops iwl3945_hw_ops = {
  3335. .tx = iwl3945_mac_tx,
  3336. .start = iwl3945_mac_start,
  3337. .stop = iwl3945_mac_stop,
  3338. .add_interface = iwl_mac_add_interface,
  3339. .remove_interface = iwl_mac_remove_interface,
  3340. .config = iwl_mac_config,
  3341. .config_interface = iwl_mac_config_interface,
  3342. .configure_filter = iwl_configure_filter,
  3343. .set_key = iwl3945_mac_set_key,
  3344. .get_tx_stats = iwl_mac_get_tx_stats,
  3345. .conf_tx = iwl_mac_conf_tx,
  3346. .reset_tsf = iwl_mac_reset_tsf,
  3347. .bss_info_changed = iwl_bss_info_changed,
  3348. .hw_scan = iwl_mac_hw_scan
  3349. };
  3350. static int iwl3945_init_drv(struct iwl_priv *priv)
  3351. {
  3352. int ret;
  3353. struct iwl3945_eeprom *eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3354. priv->retry_rate = 1;
  3355. priv->ibss_beacon = NULL;
  3356. spin_lock_init(&priv->lock);
  3357. spin_lock_init(&priv->power_data.lock);
  3358. spin_lock_init(&priv->sta_lock);
  3359. spin_lock_init(&priv->hcmd_lock);
  3360. INIT_LIST_HEAD(&priv->free_frames);
  3361. mutex_init(&priv->mutex);
  3362. /* Clear the driver's (not device's) station table */
  3363. priv->cfg->ops->smgmt->clear_station_table(priv);
  3364. priv->data_retry_limit = -1;
  3365. priv->ieee_channels = NULL;
  3366. priv->ieee_rates = NULL;
  3367. priv->band = IEEE80211_BAND_2GHZ;
  3368. priv->iw_mode = NL80211_IFTYPE_STATION;
  3369. iwl_reset_qos(priv);
  3370. priv->qos_data.qos_active = 0;
  3371. priv->qos_data.qos_cap.val = 0;
  3372. priv->rates_mask = IWL_RATES_MASK;
  3373. /* If power management is turned on, default to CAM mode */
  3374. priv->power_mode = IWL_POWER_MODE_CAM;
  3375. priv->tx_power_user_lmt = IWL_DEFAULT_TX_POWER;
  3376. if (eeprom->version < EEPROM_3945_EEPROM_VERSION) {
  3377. IWL_WARN(priv, "Unsupported EEPROM version: 0x%04X\n",
  3378. eeprom->version);
  3379. ret = -EINVAL;
  3380. goto err;
  3381. }
  3382. ret = iwl_init_channel_map(priv);
  3383. if (ret) {
  3384. IWL_ERR(priv, "initializing regulatory failed: %d\n", ret);
  3385. goto err;
  3386. }
  3387. /* Set up txpower settings in driver for all channels */
  3388. if (iwl3945_txpower_set_from_eeprom(priv)) {
  3389. ret = -EIO;
  3390. goto err_free_channel_map;
  3391. }
  3392. ret = iwlcore_init_geos(priv);
  3393. if (ret) {
  3394. IWL_ERR(priv, "initializing geos failed: %d\n", ret);
  3395. goto err_free_channel_map;
  3396. }
  3397. iwl3945_init_hw_rates(priv, priv->ieee_rates);
  3398. return 0;
  3399. err_free_channel_map:
  3400. iwl_free_channel_map(priv);
  3401. err:
  3402. return ret;
  3403. }
  3404. static int iwl3945_setup_mac(struct iwl_priv *priv)
  3405. {
  3406. int ret;
  3407. struct ieee80211_hw *hw = priv->hw;
  3408. hw->rate_control_algorithm = "iwl-3945-rs";
  3409. hw->sta_data_size = sizeof(struct iwl3945_sta_priv);
  3410. /* Tell mac80211 our characteristics */
  3411. hw->flags = IEEE80211_HW_SIGNAL_DBM |
  3412. IEEE80211_HW_NOISE_DBM |
  3413. IEEE80211_HW_SPECTRUM_MGMT;
  3414. hw->wiphy->interface_modes =
  3415. BIT(NL80211_IFTYPE_STATION) |
  3416. BIT(NL80211_IFTYPE_ADHOC);
  3417. hw->wiphy->custom_regulatory = true;
  3418. hw->wiphy->max_scan_ssids = PROBE_OPTION_MAX_3945;
  3419. /* we create the 802.11 header and a zero-length SSID element */
  3420. hw->wiphy->max_scan_ie_len = IWL_MAX_PROBE_REQUEST - 24 - 2;
  3421. /* Default value; 4 EDCA QOS priorities */
  3422. hw->queues = 4;
  3423. hw->conf.beacon_int = 100;
  3424. if (priv->bands[IEEE80211_BAND_2GHZ].n_channels)
  3425. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] =
  3426. &priv->bands[IEEE80211_BAND_2GHZ];
  3427. if (priv->bands[IEEE80211_BAND_5GHZ].n_channels)
  3428. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
  3429. &priv->bands[IEEE80211_BAND_5GHZ];
  3430. ret = ieee80211_register_hw(priv->hw);
  3431. if (ret) {
  3432. IWL_ERR(priv, "Failed to register hw (error %d)\n", ret);
  3433. return ret;
  3434. }
  3435. priv->mac80211_registered = 1;
  3436. return 0;
  3437. }
  3438. static int iwl3945_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  3439. {
  3440. int err = 0;
  3441. struct iwl_priv *priv;
  3442. struct ieee80211_hw *hw;
  3443. struct iwl_cfg *cfg = (struct iwl_cfg *)(ent->driver_data);
  3444. struct iwl3945_eeprom *eeprom;
  3445. unsigned long flags;
  3446. /***********************
  3447. * 1. Allocating HW data
  3448. * ********************/
  3449. /* mac80211 allocates memory for this device instance, including
  3450. * space for this driver's private structure */
  3451. hw = iwl_alloc_all(cfg, &iwl3945_hw_ops);
  3452. if (hw == NULL) {
  3453. printk(KERN_ERR DRV_NAME "Can not allocate network device\n");
  3454. err = -ENOMEM;
  3455. goto out;
  3456. }
  3457. priv = hw->priv;
  3458. SET_IEEE80211_DEV(hw, &pdev->dev);
  3459. if ((iwl3945_mod_params.num_of_queues > IWL39_MAX_NUM_QUEUES) ||
  3460. (iwl3945_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) {
  3461. IWL_ERR(priv,
  3462. "invalid queues_num, should be between %d and %d\n",
  3463. IWL_MIN_NUM_QUEUES, IWL39_MAX_NUM_QUEUES);
  3464. err = -EINVAL;
  3465. goto out_ieee80211_free_hw;
  3466. }
  3467. /*
  3468. * Disabling hardware scan means that mac80211 will perform scans
  3469. * "the hard way", rather than using device's scan.
  3470. */
  3471. if (iwl3945_mod_params.disable_hw_scan) {
  3472. IWL_DEBUG_INFO(priv, "Disabling hw_scan\n");
  3473. iwl3945_hw_ops.hw_scan = NULL;
  3474. }
  3475. IWL_DEBUG_INFO(priv, "*** LOAD DRIVER ***\n");
  3476. priv->cfg = cfg;
  3477. priv->pci_dev = pdev;
  3478. #ifdef CONFIG_IWLWIFI_DEBUG
  3479. priv->debug_level = iwl3945_mod_params.debug;
  3480. atomic_set(&priv->restrict_refcnt, 0);
  3481. #endif
  3482. /***************************
  3483. * 2. Initializing PCI bus
  3484. * *************************/
  3485. if (pci_enable_device(pdev)) {
  3486. err = -ENODEV;
  3487. goto out_ieee80211_free_hw;
  3488. }
  3489. pci_set_master(pdev);
  3490. err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
  3491. if (!err)
  3492. err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
  3493. if (err) {
  3494. IWL_WARN(priv, "No suitable DMA available.\n");
  3495. goto out_pci_disable_device;
  3496. }
  3497. pci_set_drvdata(pdev, priv);
  3498. err = pci_request_regions(pdev, DRV_NAME);
  3499. if (err)
  3500. goto out_pci_disable_device;
  3501. /***********************
  3502. * 3. Read REV Register
  3503. * ********************/
  3504. priv->hw_base = pci_iomap(pdev, 0, 0);
  3505. if (!priv->hw_base) {
  3506. err = -ENODEV;
  3507. goto out_pci_release_regions;
  3508. }
  3509. IWL_DEBUG_INFO(priv, "pci_resource_len = 0x%08llx\n",
  3510. (unsigned long long) pci_resource_len(pdev, 0));
  3511. IWL_DEBUG_INFO(priv, "pci_resource_base = %p\n", priv->hw_base);
  3512. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  3513. * PCI Tx retries from interfering with C3 CPU state */
  3514. pci_write_config_byte(pdev, 0x41, 0x00);
  3515. /* amp init */
  3516. err = priv->cfg->ops->lib->apm_ops.init(priv);
  3517. if (err < 0) {
  3518. IWL_DEBUG_INFO(priv, "Failed to init the card\n");
  3519. goto out_iounmap;
  3520. }
  3521. /***********************
  3522. * 4. Read EEPROM
  3523. * ********************/
  3524. /* Read the EEPROM */
  3525. err = iwl_eeprom_init(priv);
  3526. if (err) {
  3527. IWL_ERR(priv, "Unable to init EEPROM\n");
  3528. goto out_iounmap;
  3529. }
  3530. /* MAC Address location in EEPROM same for 3945/4965 */
  3531. eeprom = (struct iwl3945_eeprom *)priv->eeprom;
  3532. memcpy(priv->mac_addr, eeprom->mac_address, ETH_ALEN);
  3533. IWL_DEBUG_INFO(priv, "MAC address: %pM\n", priv->mac_addr);
  3534. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  3535. /***********************
  3536. * 5. Setup HW Constants
  3537. * ********************/
  3538. /* Device-specific setup */
  3539. if (iwl3945_hw_set_hw_params(priv)) {
  3540. IWL_ERR(priv, "failed to set hw settings\n");
  3541. goto out_eeprom_free;
  3542. }
  3543. /***********************
  3544. * 6. Setup priv
  3545. * ********************/
  3546. err = iwl3945_init_drv(priv);
  3547. if (err) {
  3548. IWL_ERR(priv, "initializing driver failed\n");
  3549. goto out_unset_hw_params;
  3550. }
  3551. IWL_INFO(priv, "Detected Intel Wireless WiFi Link %s\n",
  3552. priv->cfg->name);
  3553. /***********************************
  3554. * 7. Initialize Module Parameters
  3555. * **********************************/
  3556. /* Initialize module parameter values here */
  3557. /* Disable radio (SW RF KILL) via parameter when loading driver */
  3558. if (iwl3945_mod_params.disable) {
  3559. set_bit(STATUS_RF_KILL_SW, &priv->status);
  3560. IWL_DEBUG_INFO(priv, "Radio disabled.\n");
  3561. }
  3562. /***********************
  3563. * 8. Setup Services
  3564. * ********************/
  3565. spin_lock_irqsave(&priv->lock, flags);
  3566. iwl_disable_interrupts(priv);
  3567. spin_unlock_irqrestore(&priv->lock, flags);
  3568. pci_enable_msi(priv->pci_dev);
  3569. err = request_irq(priv->pci_dev->irq, iwl_isr, IRQF_SHARED,
  3570. DRV_NAME, priv);
  3571. if (err) {
  3572. IWL_ERR(priv, "Error allocating IRQ %d\n", priv->pci_dev->irq);
  3573. goto out_disable_msi;
  3574. }
  3575. err = sysfs_create_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3576. if (err) {
  3577. IWL_ERR(priv, "failed to create sysfs device attributes\n");
  3578. goto out_release_irq;
  3579. }
  3580. iwl_set_rxon_channel(priv,
  3581. &priv->bands[IEEE80211_BAND_2GHZ].channels[5]);
  3582. iwl3945_setup_deferred_work(priv);
  3583. iwl3945_setup_rx_handlers(priv);
  3584. /*********************************
  3585. * 9. Setup and Register mac80211
  3586. * *******************************/
  3587. iwl_enable_interrupts(priv);
  3588. err = iwl3945_setup_mac(priv);
  3589. if (err)
  3590. goto out_remove_sysfs;
  3591. err = iwl_dbgfs_register(priv, DRV_NAME);
  3592. if (err)
  3593. IWL_ERR(priv, "failed to create debugfs files. Ignoring error: %d\n", err);
  3594. err = iwl_rfkill_init(priv);
  3595. if (err)
  3596. IWL_ERR(priv, "Unable to initialize RFKILL system. "
  3597. "Ignoring error: %d\n", err);
  3598. else
  3599. iwl_rfkill_set_hw_state(priv);
  3600. /* Start monitoring the killswitch */
  3601. queue_delayed_work(priv->workqueue, &priv->rfkill_poll,
  3602. 2 * HZ);
  3603. return 0;
  3604. out_remove_sysfs:
  3605. destroy_workqueue(priv->workqueue);
  3606. priv->workqueue = NULL;
  3607. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3608. out_release_irq:
  3609. free_irq(priv->pci_dev->irq, priv);
  3610. out_disable_msi:
  3611. pci_disable_msi(priv->pci_dev);
  3612. iwlcore_free_geos(priv);
  3613. iwl_free_channel_map(priv);
  3614. out_unset_hw_params:
  3615. iwl3945_unset_hw_params(priv);
  3616. out_eeprom_free:
  3617. iwl_eeprom_free(priv);
  3618. out_iounmap:
  3619. pci_iounmap(pdev, priv->hw_base);
  3620. out_pci_release_regions:
  3621. pci_release_regions(pdev);
  3622. out_pci_disable_device:
  3623. pci_set_drvdata(pdev, NULL);
  3624. pci_disable_device(pdev);
  3625. out_ieee80211_free_hw:
  3626. ieee80211_free_hw(priv->hw);
  3627. out:
  3628. return err;
  3629. }
  3630. static void __devexit iwl3945_pci_remove(struct pci_dev *pdev)
  3631. {
  3632. struct iwl_priv *priv = pci_get_drvdata(pdev);
  3633. unsigned long flags;
  3634. if (!priv)
  3635. return;
  3636. IWL_DEBUG_INFO(priv, "*** UNLOAD DRIVER ***\n");
  3637. iwl_dbgfs_unregister(priv);
  3638. set_bit(STATUS_EXIT_PENDING, &priv->status);
  3639. if (priv->mac80211_registered) {
  3640. ieee80211_unregister_hw(priv->hw);
  3641. priv->mac80211_registered = 0;
  3642. } else {
  3643. iwl3945_down(priv);
  3644. }
  3645. /* make sure we flush any pending irq or
  3646. * tasklet for the driver
  3647. */
  3648. spin_lock_irqsave(&priv->lock, flags);
  3649. iwl_disable_interrupts(priv);
  3650. spin_unlock_irqrestore(&priv->lock, flags);
  3651. iwl_synchronize_irq(priv);
  3652. sysfs_remove_group(&pdev->dev.kobj, &iwl3945_attribute_group);
  3653. iwl_rfkill_unregister(priv);
  3654. cancel_delayed_work(&priv->rfkill_poll);
  3655. iwl3945_dealloc_ucode_pci(priv);
  3656. if (priv->rxq.bd)
  3657. iwl_rx_queue_free(priv, &priv->rxq);
  3658. iwl3945_hw_txq_ctx_free(priv);
  3659. iwl3945_unset_hw_params(priv);
  3660. priv->cfg->ops->smgmt->clear_station_table(priv);
  3661. /*netif_stop_queue(dev); */
  3662. flush_workqueue(priv->workqueue);
  3663. /* ieee80211_unregister_hw calls iwl3945_mac_stop, which flushes
  3664. * priv->workqueue... so we can't take down the workqueue
  3665. * until now... */
  3666. destroy_workqueue(priv->workqueue);
  3667. priv->workqueue = NULL;
  3668. free_irq(pdev->irq, priv);
  3669. pci_disable_msi(pdev);
  3670. pci_iounmap(pdev, priv->hw_base);
  3671. pci_release_regions(pdev);
  3672. pci_disable_device(pdev);
  3673. pci_set_drvdata(pdev, NULL);
  3674. iwl_free_channel_map(priv);
  3675. iwlcore_free_geos(priv);
  3676. kfree(priv->scan);
  3677. if (priv->ibss_beacon)
  3678. dev_kfree_skb(priv->ibss_beacon);
  3679. ieee80211_free_hw(priv->hw);
  3680. }
  3681. /*****************************************************************************
  3682. *
  3683. * driver and module entry point
  3684. *
  3685. *****************************************************************************/
  3686. static struct pci_driver iwl3945_driver = {
  3687. .name = DRV_NAME,
  3688. .id_table = iwl3945_hw_card_ids,
  3689. .probe = iwl3945_pci_probe,
  3690. .remove = __devexit_p(iwl3945_pci_remove),
  3691. #ifdef CONFIG_PM
  3692. .suspend = iwl_pci_suspend,
  3693. .resume = iwl_pci_resume,
  3694. #endif
  3695. };
  3696. static int __init iwl3945_init(void)
  3697. {
  3698. int ret;
  3699. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  3700. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  3701. ret = iwl3945_rate_control_register();
  3702. if (ret) {
  3703. printk(KERN_ERR DRV_NAME
  3704. "Unable to register rate control algorithm: %d\n", ret);
  3705. return ret;
  3706. }
  3707. ret = pci_register_driver(&iwl3945_driver);
  3708. if (ret) {
  3709. printk(KERN_ERR DRV_NAME "Unable to initialize PCI module\n");
  3710. goto error_register;
  3711. }
  3712. return ret;
  3713. error_register:
  3714. iwl3945_rate_control_unregister();
  3715. return ret;
  3716. }
  3717. static void __exit iwl3945_exit(void)
  3718. {
  3719. pci_unregister_driver(&iwl3945_driver);
  3720. iwl3945_rate_control_unregister();
  3721. }
  3722. MODULE_FIRMWARE(IWL3945_MODULE_FIRMWARE(IWL3945_UCODE_API_MAX));
  3723. module_param_named(antenna, iwl3945_mod_params.antenna, int, 0444);
  3724. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  3725. module_param_named(disable, iwl3945_mod_params.disable, int, 0444);
  3726. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  3727. module_param_named(swcrypto, iwl3945_mod_params.sw_crypto, int, 0444);
  3728. MODULE_PARM_DESC(swcrypto,
  3729. "using software crypto (default 1 [software])\n");
  3730. module_param_named(debug, iwl3945_mod_params.debug, uint, 0444);
  3731. MODULE_PARM_DESC(debug, "debug output mask");
  3732. module_param_named(disable_hw_scan, iwl3945_mod_params.disable_hw_scan, int, 0444);
  3733. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  3734. module_param_named(queues_num, iwl3945_mod_params.num_of_queues, int, 0444);
  3735. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  3736. module_param_named(fw_restart3945, iwl3945_mod_params.restart_fw, int, 0444);
  3737. MODULE_PARM_DESC(fw_restart3945, "restart firmware in case of error");
  3738. module_exit(iwl3945_exit);
  3739. module_init(iwl3945_init);