mt9t001.c 23 KB

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  1. /*
  2. * Driver for MT9T001 CMOS Image Sensor from Aptina (Micron)
  3. *
  4. * Copyright (C) 2010-2011, Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  5. *
  6. * Based on the MT9M001 driver,
  7. *
  8. * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License version 2 as
  12. * published by the Free Software Foundation.
  13. */
  14. #include <linux/i2c.h>
  15. #include <linux/module.h>
  16. #include <linux/log2.h>
  17. #include <linux/slab.h>
  18. #include <linux/videodev2.h>
  19. #include <linux/v4l2-mediabus.h>
  20. #include <media/mt9t001.h>
  21. #include <media/v4l2-ctrls.h>
  22. #include <media/v4l2-device.h>
  23. #include <media/v4l2-subdev.h>
  24. #define MT9T001_PIXEL_ARRAY_HEIGHT 1568
  25. #define MT9T001_PIXEL_ARRAY_WIDTH 2112
  26. #define MT9T001_CHIP_VERSION 0x00
  27. #define MT9T001_CHIP_ID 0x1621
  28. #define MT9T001_ROW_START 0x01
  29. #define MT9T001_ROW_START_MIN 0
  30. #define MT9T001_ROW_START_DEF 20
  31. #define MT9T001_ROW_START_MAX 1534
  32. #define MT9T001_COLUMN_START 0x02
  33. #define MT9T001_COLUMN_START_MIN 0
  34. #define MT9T001_COLUMN_START_DEF 32
  35. #define MT9T001_COLUMN_START_MAX 2046
  36. #define MT9T001_WINDOW_HEIGHT 0x03
  37. #define MT9T001_WINDOW_HEIGHT_MIN 1
  38. #define MT9T001_WINDOW_HEIGHT_DEF 1535
  39. #define MT9T001_WINDOW_HEIGHT_MAX 1567
  40. #define MT9T001_WINDOW_WIDTH 0x04
  41. #define MT9T001_WINDOW_WIDTH_MIN 1
  42. #define MT9T001_WINDOW_WIDTH_DEF 2047
  43. #define MT9T001_WINDOW_WIDTH_MAX 2111
  44. #define MT9T001_HORIZONTAL_BLANKING 0x05
  45. #define MT9T001_HORIZONTAL_BLANKING_MIN 21
  46. #define MT9T001_HORIZONTAL_BLANKING_MAX 1023
  47. #define MT9T001_VERTICAL_BLANKING 0x06
  48. #define MT9T001_VERTICAL_BLANKING_MIN 3
  49. #define MT9T001_VERTICAL_BLANKING_MAX 1023
  50. #define MT9T001_OUTPUT_CONTROL 0x07
  51. #define MT9T001_OUTPUT_CONTROL_SYNC (1 << 0)
  52. #define MT9T001_OUTPUT_CONTROL_CHIP_ENABLE (1 << 1)
  53. #define MT9T001_OUTPUT_CONTROL_TEST_DATA (1 << 6)
  54. #define MT9T001_SHUTTER_WIDTH_HIGH 0x08
  55. #define MT9T001_SHUTTER_WIDTH_LOW 0x09
  56. #define MT9T001_SHUTTER_WIDTH_MIN 1
  57. #define MT9T001_SHUTTER_WIDTH_DEF 1561
  58. #define MT9T001_SHUTTER_WIDTH_MAX (1024 * 1024)
  59. #define MT9T001_PIXEL_CLOCK 0x0a
  60. #define MT9T001_PIXEL_CLOCK_INVERT (1 << 15)
  61. #define MT9T001_PIXEL_CLOCK_SHIFT_MASK (7 << 8)
  62. #define MT9T001_PIXEL_CLOCK_SHIFT_SHIFT 8
  63. #define MT9T001_PIXEL_CLOCK_DIVIDE_MASK (0x7f << 0)
  64. #define MT9T001_FRAME_RESTART 0x0b
  65. #define MT9T001_SHUTTER_DELAY 0x0c
  66. #define MT9T001_SHUTTER_DELAY_MAX 2047
  67. #define MT9T001_RESET 0x0d
  68. #define MT9T001_READ_MODE1 0x1e
  69. #define MT9T001_READ_MODE_SNAPSHOT (1 << 8)
  70. #define MT9T001_READ_MODE_STROBE_ENABLE (1 << 9)
  71. #define MT9T001_READ_MODE_STROBE_WIDTH (1 << 10)
  72. #define MT9T001_READ_MODE_STROBE_OVERRIDE (1 << 11)
  73. #define MT9T001_READ_MODE2 0x20
  74. #define MT9T001_READ_MODE_BAD_FRAMES (1 << 0)
  75. #define MT9T001_READ_MODE_LINE_VALID_CONTINUOUS (1 << 9)
  76. #define MT9T001_READ_MODE_LINE_VALID_FRAME (1 << 10)
  77. #define MT9T001_READ_MODE3 0x21
  78. #define MT9T001_READ_MODE_GLOBAL_RESET (1 << 0)
  79. #define MT9T001_READ_MODE_GHST_CTL (1 << 1)
  80. #define MT9T001_ROW_ADDRESS_MODE 0x22
  81. #define MT9T001_ROW_SKIP_MASK (7 << 0)
  82. #define MT9T001_ROW_BIN_MASK (3 << 3)
  83. #define MT9T001_ROW_BIN_SHIFT 3
  84. #define MT9T001_COLUMN_ADDRESS_MODE 0x23
  85. #define MT9T001_COLUMN_SKIP_MASK (7 << 0)
  86. #define MT9T001_COLUMN_BIN_MASK (3 << 3)
  87. #define MT9T001_COLUMN_BIN_SHIFT 3
  88. #define MT9T001_GREEN1_GAIN 0x2b
  89. #define MT9T001_BLUE_GAIN 0x2c
  90. #define MT9T001_RED_GAIN 0x2d
  91. #define MT9T001_GREEN2_GAIN 0x2e
  92. #define MT9T001_TEST_DATA 0x32
  93. #define MT9T001_GLOBAL_GAIN 0x35
  94. #define MT9T001_GLOBAL_GAIN_MIN 8
  95. #define MT9T001_GLOBAL_GAIN_MAX 1024
  96. #define MT9T001_BLACK_LEVEL 0x49
  97. #define MT9T001_ROW_BLACK_DEFAULT_OFFSET 0x4b
  98. #define MT9T001_BLC_DELTA_THRESHOLDS 0x5d
  99. #define MT9T001_CAL_THRESHOLDS 0x5f
  100. #define MT9T001_GREEN1_OFFSET 0x60
  101. #define MT9T001_GREEN2_OFFSET 0x61
  102. #define MT9T001_BLACK_LEVEL_CALIBRATION 0x62
  103. #define MT9T001_BLACK_LEVEL_OVERRIDE (1 << 0)
  104. #define MT9T001_BLACK_LEVEL_DISABLE_OFFSET (1 << 1)
  105. #define MT9T001_BLACK_LEVEL_RECALCULATE (1 << 12)
  106. #define MT9T001_BLACK_LEVEL_LOCK_RED_BLUE (1 << 13)
  107. #define MT9T001_BLACK_LEVEL_LOCK_GREEN (1 << 14)
  108. #define MT9T001_RED_OFFSET 0x63
  109. #define MT9T001_BLUE_OFFSET 0x64
  110. struct mt9t001 {
  111. struct v4l2_subdev subdev;
  112. struct media_pad pad;
  113. struct v4l2_mbus_framefmt format;
  114. struct v4l2_rect crop;
  115. struct v4l2_ctrl_handler ctrls;
  116. struct v4l2_ctrl *gains[4];
  117. u16 output_control;
  118. u16 black_level;
  119. };
  120. static inline struct mt9t001 *to_mt9t001(struct v4l2_subdev *sd)
  121. {
  122. return container_of(sd, struct mt9t001, subdev);
  123. }
  124. static int mt9t001_read(struct i2c_client *client, u8 reg)
  125. {
  126. s32 data = i2c_smbus_read_word_data(client, reg);
  127. return data < 0 ? data : be16_to_cpu(data);
  128. }
  129. static int mt9t001_write(struct i2c_client *client, u8 reg, u16 data)
  130. {
  131. return i2c_smbus_write_word_data(client, reg, cpu_to_be16(data));
  132. }
  133. static int mt9t001_set_output_control(struct mt9t001 *mt9t001, u16 clear,
  134. u16 set)
  135. {
  136. struct i2c_client *client = v4l2_get_subdevdata(&mt9t001->subdev);
  137. u16 value = (mt9t001->output_control & ~clear) | set;
  138. int ret;
  139. if (value == mt9t001->output_control)
  140. return 0;
  141. ret = mt9t001_write(client, MT9T001_OUTPUT_CONTROL, value);
  142. if (ret < 0)
  143. return ret;
  144. mt9t001->output_control = value;
  145. return 0;
  146. }
  147. /* -----------------------------------------------------------------------------
  148. * V4L2 subdev video operations
  149. */
  150. static struct v4l2_mbus_framefmt *
  151. __mt9t001_get_pad_format(struct mt9t001 *mt9t001, struct v4l2_subdev_fh *fh,
  152. unsigned int pad, enum v4l2_subdev_format_whence which)
  153. {
  154. switch (which) {
  155. case V4L2_SUBDEV_FORMAT_TRY:
  156. return v4l2_subdev_get_try_format(fh, pad);
  157. case V4L2_SUBDEV_FORMAT_ACTIVE:
  158. return &mt9t001->format;
  159. default:
  160. return NULL;
  161. }
  162. }
  163. static struct v4l2_rect *
  164. __mt9t001_get_pad_crop(struct mt9t001 *mt9t001, struct v4l2_subdev_fh *fh,
  165. unsigned int pad, enum v4l2_subdev_format_whence which)
  166. {
  167. switch (which) {
  168. case V4L2_SUBDEV_FORMAT_TRY:
  169. return v4l2_subdev_get_try_crop(fh, pad);
  170. case V4L2_SUBDEV_FORMAT_ACTIVE:
  171. return &mt9t001->crop;
  172. default:
  173. return NULL;
  174. }
  175. }
  176. static int mt9t001_s_stream(struct v4l2_subdev *subdev, int enable)
  177. {
  178. const u16 mode = MT9T001_OUTPUT_CONTROL_CHIP_ENABLE;
  179. struct i2c_client *client = v4l2_get_subdevdata(subdev);
  180. struct mt9t001 *mt9t001 = to_mt9t001(subdev);
  181. struct v4l2_mbus_framefmt *format = &mt9t001->format;
  182. struct v4l2_rect *crop = &mt9t001->crop;
  183. unsigned int hratio;
  184. unsigned int vratio;
  185. int ret;
  186. if (!enable)
  187. return mt9t001_set_output_control(mt9t001, mode, 0);
  188. /* Configure the window size and row/column bin */
  189. hratio = DIV_ROUND_CLOSEST(crop->width, format->width);
  190. vratio = DIV_ROUND_CLOSEST(crop->height, format->height);
  191. ret = mt9t001_write(client, MT9T001_ROW_ADDRESS_MODE, hratio - 1);
  192. if (ret < 0)
  193. return ret;
  194. ret = mt9t001_write(client, MT9T001_COLUMN_ADDRESS_MODE, vratio - 1);
  195. if (ret < 0)
  196. return ret;
  197. ret = mt9t001_write(client, MT9T001_COLUMN_START, crop->left);
  198. if (ret < 0)
  199. return ret;
  200. ret = mt9t001_write(client, MT9T001_ROW_START, crop->top);
  201. if (ret < 0)
  202. return ret;
  203. ret = mt9t001_write(client, MT9T001_WINDOW_WIDTH, crop->width - 1);
  204. if (ret < 0)
  205. return ret;
  206. ret = mt9t001_write(client, MT9T001_WINDOW_HEIGHT, crop->height - 1);
  207. if (ret < 0)
  208. return ret;
  209. /* Switch to master "normal" mode */
  210. return mt9t001_set_output_control(mt9t001, 0, mode);
  211. }
  212. static int mt9t001_enum_mbus_code(struct v4l2_subdev *subdev,
  213. struct v4l2_subdev_fh *fh,
  214. struct v4l2_subdev_mbus_code_enum *code)
  215. {
  216. if (code->index > 0)
  217. return -EINVAL;
  218. code->code = V4L2_MBUS_FMT_SGRBG10_1X10;
  219. return 0;
  220. }
  221. static int mt9t001_enum_frame_size(struct v4l2_subdev *subdev,
  222. struct v4l2_subdev_fh *fh,
  223. struct v4l2_subdev_frame_size_enum *fse)
  224. {
  225. if (fse->index >= 8 || fse->code != V4L2_MBUS_FMT_SGRBG10_1X10)
  226. return -EINVAL;
  227. fse->min_width = (MT9T001_WINDOW_WIDTH_DEF + 1) / fse->index;
  228. fse->max_width = fse->min_width;
  229. fse->min_height = (MT9T001_WINDOW_HEIGHT_DEF + 1) / fse->index;
  230. fse->max_height = fse->min_height;
  231. return 0;
  232. }
  233. static int mt9t001_get_format(struct v4l2_subdev *subdev,
  234. struct v4l2_subdev_fh *fh,
  235. struct v4l2_subdev_format *format)
  236. {
  237. struct mt9t001 *mt9t001 = to_mt9t001(subdev);
  238. format->format = *__mt9t001_get_pad_format(mt9t001, fh, format->pad,
  239. format->which);
  240. return 0;
  241. }
  242. static int mt9t001_set_format(struct v4l2_subdev *subdev,
  243. struct v4l2_subdev_fh *fh,
  244. struct v4l2_subdev_format *format)
  245. {
  246. struct mt9t001 *mt9t001 = to_mt9t001(subdev);
  247. struct v4l2_mbus_framefmt *__format;
  248. struct v4l2_rect *__crop;
  249. unsigned int width;
  250. unsigned int height;
  251. unsigned int hratio;
  252. unsigned int vratio;
  253. __crop = __mt9t001_get_pad_crop(mt9t001, fh, format->pad,
  254. format->which);
  255. /* Clamp the width and height to avoid dividing by zero. */
  256. width = clamp_t(unsigned int, ALIGN(format->format.width, 2),
  257. max(__crop->width / 8, MT9T001_WINDOW_HEIGHT_MIN + 1),
  258. __crop->width);
  259. height = clamp_t(unsigned int, ALIGN(format->format.height, 2),
  260. max(__crop->height / 8, MT9T001_WINDOW_HEIGHT_MIN + 1),
  261. __crop->height);
  262. hratio = DIV_ROUND_CLOSEST(__crop->width, width);
  263. vratio = DIV_ROUND_CLOSEST(__crop->height, height);
  264. __format = __mt9t001_get_pad_format(mt9t001, fh, format->pad,
  265. format->which);
  266. __format->width = __crop->width / hratio;
  267. __format->height = __crop->height / vratio;
  268. format->format = *__format;
  269. return 0;
  270. }
  271. static int mt9t001_get_crop(struct v4l2_subdev *subdev,
  272. struct v4l2_subdev_fh *fh,
  273. struct v4l2_subdev_crop *crop)
  274. {
  275. struct mt9t001 *mt9t001 = to_mt9t001(subdev);
  276. crop->rect = *__mt9t001_get_pad_crop(mt9t001, fh, crop->pad,
  277. crop->which);
  278. return 0;
  279. }
  280. static int mt9t001_set_crop(struct v4l2_subdev *subdev,
  281. struct v4l2_subdev_fh *fh,
  282. struct v4l2_subdev_crop *crop)
  283. {
  284. struct mt9t001 *mt9t001 = to_mt9t001(subdev);
  285. struct v4l2_mbus_framefmt *__format;
  286. struct v4l2_rect *__crop;
  287. struct v4l2_rect rect;
  288. /* Clamp the crop rectangle boundaries and align them to a multiple of 2
  289. * pixels.
  290. */
  291. rect.left = clamp(ALIGN(crop->rect.left, 2),
  292. MT9T001_COLUMN_START_MIN,
  293. MT9T001_COLUMN_START_MAX);
  294. rect.top = clamp(ALIGN(crop->rect.top, 2),
  295. MT9T001_ROW_START_MIN,
  296. MT9T001_ROW_START_MAX);
  297. rect.width = clamp(ALIGN(crop->rect.width, 2),
  298. MT9T001_WINDOW_WIDTH_MIN + 1,
  299. MT9T001_WINDOW_WIDTH_MAX + 1);
  300. rect.height = clamp(ALIGN(crop->rect.height, 2),
  301. MT9T001_WINDOW_HEIGHT_MIN + 1,
  302. MT9T001_WINDOW_HEIGHT_MAX + 1);
  303. rect.width = min(rect.width, MT9T001_PIXEL_ARRAY_WIDTH - rect.left);
  304. rect.height = min(rect.height, MT9T001_PIXEL_ARRAY_HEIGHT - rect.top);
  305. __crop = __mt9t001_get_pad_crop(mt9t001, fh, crop->pad, crop->which);
  306. if (rect.width != __crop->width || rect.height != __crop->height) {
  307. /* Reset the output image size if the crop rectangle size has
  308. * been modified.
  309. */
  310. __format = __mt9t001_get_pad_format(mt9t001, fh, crop->pad,
  311. crop->which);
  312. __format->width = rect.width;
  313. __format->height = rect.height;
  314. }
  315. *__crop = rect;
  316. crop->rect = rect;
  317. return 0;
  318. }
  319. /* -----------------------------------------------------------------------------
  320. * V4L2 subdev control operations
  321. */
  322. #define V4L2_CID_TEST_PATTERN (V4L2_CID_USER_BASE | 0x1001)
  323. #define V4L2_CID_BLACK_LEVEL_AUTO (V4L2_CID_USER_BASE | 0x1002)
  324. #define V4L2_CID_BLACK_LEVEL_OFFSET (V4L2_CID_USER_BASE | 0x1003)
  325. #define V4L2_CID_BLACK_LEVEL_CALIBRATE (V4L2_CID_USER_BASE | 0x1004)
  326. #define V4L2_CID_GAIN_RED (V4L2_CTRL_CLASS_CAMERA | 0x1001)
  327. #define V4L2_CID_GAIN_GREEN_RED (V4L2_CTRL_CLASS_CAMERA | 0x1002)
  328. #define V4L2_CID_GAIN_GREEN_BLUE (V4L2_CTRL_CLASS_CAMERA | 0x1003)
  329. #define V4L2_CID_GAIN_BLUE (V4L2_CTRL_CLASS_CAMERA | 0x1004)
  330. static u16 mt9t001_gain_value(s32 *gain)
  331. {
  332. /* Gain is controlled by 2 analog stages and a digital stage. Valid
  333. * values for the 3 stages are
  334. *
  335. * Stage Min Max Step
  336. * ------------------------------------------
  337. * First analog stage x1 x2 1
  338. * Second analog stage x1 x4 0.125
  339. * Digital stage x1 x16 0.125
  340. *
  341. * To minimize noise, the gain stages should be used in the second
  342. * analog stage, first analog stage, digital stage order. Gain from a
  343. * previous stage should be pushed to its maximum value before the next
  344. * stage is used.
  345. */
  346. if (*gain <= 32)
  347. return *gain;
  348. if (*gain <= 64) {
  349. *gain &= ~1;
  350. return (1 << 6) | (*gain >> 1);
  351. }
  352. *gain &= ~7;
  353. return ((*gain - 64) << 5) | (1 << 6) | 32;
  354. }
  355. static int mt9t001_ctrl_freeze(struct mt9t001 *mt9t001, bool freeze)
  356. {
  357. return mt9t001_set_output_control(mt9t001,
  358. freeze ? 0 : MT9T001_OUTPUT_CONTROL_SYNC,
  359. freeze ? MT9T001_OUTPUT_CONTROL_SYNC : 0);
  360. }
  361. static int mt9t001_s_ctrl(struct v4l2_ctrl *ctrl)
  362. {
  363. static const u8 gains[4] = {
  364. MT9T001_RED_GAIN, MT9T001_GREEN1_GAIN,
  365. MT9T001_GREEN2_GAIN, MT9T001_BLUE_GAIN
  366. };
  367. struct mt9t001 *mt9t001 =
  368. container_of(ctrl->handler, struct mt9t001, ctrls);
  369. struct i2c_client *client = v4l2_get_subdevdata(&mt9t001->subdev);
  370. unsigned int count;
  371. unsigned int i;
  372. u16 value;
  373. int ret;
  374. switch (ctrl->id) {
  375. case V4L2_CID_GAIN_RED:
  376. case V4L2_CID_GAIN_GREEN_RED:
  377. case V4L2_CID_GAIN_GREEN_BLUE:
  378. case V4L2_CID_GAIN_BLUE:
  379. /* Disable control updates if more than one control has changed
  380. * in the cluster.
  381. */
  382. for (i = 0, count = 0; i < 4; ++i) {
  383. struct v4l2_ctrl *gain = mt9t001->gains[i];
  384. if (gain->val != gain->cur.val)
  385. count++;
  386. }
  387. if (count > 1) {
  388. ret = mt9t001_ctrl_freeze(mt9t001, true);
  389. if (ret < 0)
  390. return ret;
  391. }
  392. /* Update the gain controls. */
  393. for (i = 0; i < 4; ++i) {
  394. struct v4l2_ctrl *gain = mt9t001->gains[i];
  395. if (gain->val == gain->cur.val)
  396. continue;
  397. value = mt9t001_gain_value(&gain->val);
  398. ret = mt9t001_write(client, gains[i], value);
  399. if (ret < 0) {
  400. mt9t001_ctrl_freeze(mt9t001, false);
  401. return ret;
  402. }
  403. }
  404. /* Enable control updates. */
  405. if (count > 1) {
  406. ret = mt9t001_ctrl_freeze(mt9t001, false);
  407. if (ret < 0)
  408. return ret;
  409. }
  410. break;
  411. case V4L2_CID_EXPOSURE:
  412. ret = mt9t001_write(client, MT9T001_SHUTTER_WIDTH_LOW,
  413. ctrl->val & 0xffff);
  414. if (ret < 0)
  415. return ret;
  416. return mt9t001_write(client, MT9T001_SHUTTER_WIDTH_HIGH,
  417. ctrl->val >> 16);
  418. case V4L2_CID_TEST_PATTERN:
  419. ret = mt9t001_set_output_control(mt9t001,
  420. ctrl->val ? 0 : MT9T001_OUTPUT_CONTROL_TEST_DATA,
  421. ctrl->val ? MT9T001_OUTPUT_CONTROL_TEST_DATA : 0);
  422. if (ret < 0)
  423. return ret;
  424. return mt9t001_write(client, MT9T001_TEST_DATA, ctrl->val << 2);
  425. case V4L2_CID_BLACK_LEVEL_AUTO:
  426. value = ctrl->val ? 0 : MT9T001_BLACK_LEVEL_OVERRIDE;
  427. ret = mt9t001_write(client, MT9T001_BLACK_LEVEL_CALIBRATION,
  428. value);
  429. if (ret < 0)
  430. return ret;
  431. mt9t001->black_level = value;
  432. break;
  433. case V4L2_CID_BLACK_LEVEL_OFFSET:
  434. ret = mt9t001_write(client, MT9T001_GREEN1_OFFSET, ctrl->val);
  435. if (ret < 0)
  436. return ret;
  437. ret = mt9t001_write(client, MT9T001_GREEN2_OFFSET, ctrl->val);
  438. if (ret < 0)
  439. return ret;
  440. ret = mt9t001_write(client, MT9T001_RED_OFFSET, ctrl->val);
  441. if (ret < 0)
  442. return ret;
  443. return mt9t001_write(client, MT9T001_BLUE_OFFSET, ctrl->val);
  444. case V4L2_CID_BLACK_LEVEL_CALIBRATE:
  445. return mt9t001_write(client, MT9T001_BLACK_LEVEL_CALIBRATION,
  446. MT9T001_BLACK_LEVEL_RECALCULATE |
  447. mt9t001->black_level);
  448. }
  449. return 0;
  450. }
  451. static struct v4l2_ctrl_ops mt9t001_ctrl_ops = {
  452. .s_ctrl = mt9t001_s_ctrl,
  453. };
  454. static const struct v4l2_ctrl_config mt9t001_ctrls[] = {
  455. {
  456. .ops = &mt9t001_ctrl_ops,
  457. .id = V4L2_CID_TEST_PATTERN,
  458. .type = V4L2_CTRL_TYPE_INTEGER,
  459. .name = "Test pattern",
  460. .min = 0,
  461. .max = 1023,
  462. .step = 1,
  463. .def = 0,
  464. .flags = 0,
  465. }, {
  466. .ops = &mt9t001_ctrl_ops,
  467. .id = V4L2_CID_BLACK_LEVEL_AUTO,
  468. .type = V4L2_CTRL_TYPE_BOOLEAN,
  469. .name = "Black Level, Auto",
  470. .min = 0,
  471. .max = 1,
  472. .step = 1,
  473. .def = 1,
  474. .flags = 0,
  475. }, {
  476. .ops = &mt9t001_ctrl_ops,
  477. .id = V4L2_CID_BLACK_LEVEL_OFFSET,
  478. .type = V4L2_CTRL_TYPE_INTEGER,
  479. .name = "Black Level, Offset",
  480. .min = -256,
  481. .max = 255,
  482. .step = 1,
  483. .def = 32,
  484. .flags = 0,
  485. }, {
  486. .ops = &mt9t001_ctrl_ops,
  487. .id = V4L2_CID_BLACK_LEVEL_CALIBRATE,
  488. .type = V4L2_CTRL_TYPE_BUTTON,
  489. .name = "Black Level, Calibrate",
  490. .min = 0,
  491. .max = 0,
  492. .step = 0,
  493. .def = 0,
  494. .flags = V4L2_CTRL_FLAG_WRITE_ONLY,
  495. },
  496. };
  497. static const struct v4l2_ctrl_config mt9t001_gains[] = {
  498. {
  499. .ops = &mt9t001_ctrl_ops,
  500. .id = V4L2_CID_GAIN_RED,
  501. .type = V4L2_CTRL_TYPE_INTEGER,
  502. .name = "Gain, Red",
  503. .min = MT9T001_GLOBAL_GAIN_MIN,
  504. .max = MT9T001_GLOBAL_GAIN_MAX,
  505. .step = 1,
  506. .def = MT9T001_GLOBAL_GAIN_MIN,
  507. .flags = 0,
  508. }, {
  509. .ops = &mt9t001_ctrl_ops,
  510. .id = V4L2_CID_GAIN_GREEN_RED,
  511. .type = V4L2_CTRL_TYPE_INTEGER,
  512. .name = "Gain, Green (R)",
  513. .min = MT9T001_GLOBAL_GAIN_MIN,
  514. .max = MT9T001_GLOBAL_GAIN_MAX,
  515. .step = 1,
  516. .def = MT9T001_GLOBAL_GAIN_MIN,
  517. .flags = 0,
  518. }, {
  519. .ops = &mt9t001_ctrl_ops,
  520. .id = V4L2_CID_GAIN_GREEN_BLUE,
  521. .type = V4L2_CTRL_TYPE_INTEGER,
  522. .name = "Gain, Green (B)",
  523. .min = MT9T001_GLOBAL_GAIN_MIN,
  524. .max = MT9T001_GLOBAL_GAIN_MAX,
  525. .step = 1,
  526. .def = MT9T001_GLOBAL_GAIN_MIN,
  527. .flags = 0,
  528. }, {
  529. .ops = &mt9t001_ctrl_ops,
  530. .id = V4L2_CID_GAIN_BLUE,
  531. .type = V4L2_CTRL_TYPE_INTEGER,
  532. .name = "Gain, Blue",
  533. .min = MT9T001_GLOBAL_GAIN_MIN,
  534. .max = MT9T001_GLOBAL_GAIN_MAX,
  535. .step = 1,
  536. .def = MT9T001_GLOBAL_GAIN_MIN,
  537. .flags = 0,
  538. },
  539. };
  540. /* -----------------------------------------------------------------------------
  541. * V4L2 subdev internal operations
  542. */
  543. static int mt9t001_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh)
  544. {
  545. struct v4l2_mbus_framefmt *format;
  546. struct v4l2_rect *crop;
  547. crop = v4l2_subdev_get_try_crop(fh, 0);
  548. crop->left = MT9T001_COLUMN_START_DEF;
  549. crop->top = MT9T001_ROW_START_DEF;
  550. crop->width = MT9T001_WINDOW_WIDTH_DEF + 1;
  551. crop->height = MT9T001_WINDOW_HEIGHT_DEF + 1;
  552. format = v4l2_subdev_get_try_format(fh, 0);
  553. format->code = V4L2_MBUS_FMT_SGRBG10_1X10;
  554. format->width = MT9T001_WINDOW_WIDTH_DEF + 1;
  555. format->height = MT9T001_WINDOW_HEIGHT_DEF + 1;
  556. format->field = V4L2_FIELD_NONE;
  557. format->colorspace = V4L2_COLORSPACE_SRGB;
  558. return 0;
  559. }
  560. static struct v4l2_subdev_video_ops mt9t001_subdev_video_ops = {
  561. .s_stream = mt9t001_s_stream,
  562. };
  563. static struct v4l2_subdev_pad_ops mt9t001_subdev_pad_ops = {
  564. .enum_mbus_code = mt9t001_enum_mbus_code,
  565. .enum_frame_size = mt9t001_enum_frame_size,
  566. .get_fmt = mt9t001_get_format,
  567. .set_fmt = mt9t001_set_format,
  568. .get_crop = mt9t001_get_crop,
  569. .set_crop = mt9t001_set_crop,
  570. };
  571. static struct v4l2_subdev_ops mt9t001_subdev_ops = {
  572. .video = &mt9t001_subdev_video_ops,
  573. .pad = &mt9t001_subdev_pad_ops,
  574. };
  575. static struct v4l2_subdev_internal_ops mt9t001_subdev_internal_ops = {
  576. .open = mt9t001_open,
  577. };
  578. static int mt9t001_video_probe(struct i2c_client *client)
  579. {
  580. struct mt9t001_platform_data *pdata = client->dev.platform_data;
  581. s32 data;
  582. int ret;
  583. dev_info(&client->dev, "Probing MT9T001 at address 0x%02x\n",
  584. client->addr);
  585. /* Reset the chip and stop data read out */
  586. ret = mt9t001_write(client, MT9T001_RESET, 1);
  587. if (ret < 0)
  588. return ret;
  589. ret = mt9t001_write(client, MT9T001_RESET, 0);
  590. if (ret < 0)
  591. return ret;
  592. ret = mt9t001_write(client, MT9T001_OUTPUT_CONTROL, 0);
  593. if (ret < 0)
  594. return ret;
  595. /* Configure the pixel clock polarity */
  596. if (pdata && pdata->clk_pol) {
  597. ret = mt9t001_write(client, MT9T001_PIXEL_CLOCK,
  598. MT9T001_PIXEL_CLOCK_INVERT);
  599. if (ret < 0)
  600. return ret;
  601. }
  602. /* Read and check the sensor version */
  603. data = mt9t001_read(client, MT9T001_CHIP_VERSION);
  604. if (data != MT9T001_CHIP_ID) {
  605. dev_err(&client->dev, "MT9T001 not detected, wrong version "
  606. "0x%04x\n", data);
  607. return -ENODEV;
  608. }
  609. dev_info(&client->dev, "MT9T001 detected at address 0x%02x\n",
  610. client->addr);
  611. return ret;
  612. }
  613. static int mt9t001_probe(struct i2c_client *client,
  614. const struct i2c_device_id *did)
  615. {
  616. struct mt9t001 *mt9t001;
  617. unsigned int i;
  618. int ret;
  619. if (!i2c_check_functionality(client->adapter,
  620. I2C_FUNC_SMBUS_WORD_DATA)) {
  621. dev_warn(&client->adapter->dev,
  622. "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
  623. return -EIO;
  624. }
  625. ret = mt9t001_video_probe(client);
  626. if (ret < 0)
  627. return ret;
  628. mt9t001 = kzalloc(sizeof(*mt9t001), GFP_KERNEL);
  629. if (!mt9t001)
  630. return -ENOMEM;
  631. v4l2_ctrl_handler_init(&mt9t001->ctrls, ARRAY_SIZE(mt9t001_ctrls) +
  632. ARRAY_SIZE(mt9t001_gains) + 2);
  633. v4l2_ctrl_new_std(&mt9t001->ctrls, &mt9t001_ctrl_ops,
  634. V4L2_CID_EXPOSURE, MT9T001_SHUTTER_WIDTH_MIN,
  635. MT9T001_SHUTTER_WIDTH_MAX, 1,
  636. MT9T001_SHUTTER_WIDTH_DEF);
  637. v4l2_ctrl_new_std(&mt9t001->ctrls, &mt9t001_ctrl_ops,
  638. V4L2_CID_BLACK_LEVEL, 1, 1, 1, 1);
  639. for (i = 0; i < ARRAY_SIZE(mt9t001_ctrls); ++i)
  640. v4l2_ctrl_new_custom(&mt9t001->ctrls, &mt9t001_ctrls[i], NULL);
  641. for (i = 0; i < ARRAY_SIZE(mt9t001_gains); ++i)
  642. mt9t001->gains[i] = v4l2_ctrl_new_custom(&mt9t001->ctrls,
  643. &mt9t001_gains[i], NULL);
  644. v4l2_ctrl_cluster(ARRAY_SIZE(mt9t001_gains), mt9t001->gains);
  645. mt9t001->subdev.ctrl_handler = &mt9t001->ctrls;
  646. if (mt9t001->ctrls.error) {
  647. printk(KERN_INFO "%s: control initialization error %d\n",
  648. __func__, mt9t001->ctrls.error);
  649. ret = -EINVAL;
  650. goto done;
  651. }
  652. mt9t001->crop.left = MT9T001_COLUMN_START_DEF;
  653. mt9t001->crop.top = MT9T001_ROW_START_DEF;
  654. mt9t001->crop.width = MT9T001_WINDOW_WIDTH_DEF + 1;
  655. mt9t001->crop.height = MT9T001_WINDOW_HEIGHT_DEF + 1;
  656. mt9t001->format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
  657. mt9t001->format.width = MT9T001_WINDOW_WIDTH_DEF + 1;
  658. mt9t001->format.height = MT9T001_WINDOW_HEIGHT_DEF + 1;
  659. mt9t001->format.field = V4L2_FIELD_NONE;
  660. mt9t001->format.colorspace = V4L2_COLORSPACE_SRGB;
  661. v4l2_i2c_subdev_init(&mt9t001->subdev, client, &mt9t001_subdev_ops);
  662. mt9t001->subdev.internal_ops = &mt9t001_subdev_internal_ops;
  663. mt9t001->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
  664. mt9t001->pad.flags = MEDIA_PAD_FL_SOURCE;
  665. ret = media_entity_init(&mt9t001->subdev.entity, 1, &mt9t001->pad, 0);
  666. done:
  667. if (ret < 0) {
  668. v4l2_ctrl_handler_free(&mt9t001->ctrls);
  669. media_entity_cleanup(&mt9t001->subdev.entity);
  670. kfree(mt9t001);
  671. }
  672. return ret;
  673. }
  674. static int mt9t001_remove(struct i2c_client *client)
  675. {
  676. struct v4l2_subdev *subdev = i2c_get_clientdata(client);
  677. struct mt9t001 *mt9t001 = to_mt9t001(subdev);
  678. v4l2_ctrl_handler_free(&mt9t001->ctrls);
  679. v4l2_device_unregister_subdev(subdev);
  680. media_entity_cleanup(&subdev->entity);
  681. kfree(mt9t001);
  682. return 0;
  683. }
  684. static const struct i2c_device_id mt9t001_id[] = {
  685. { "mt9t001", 0 },
  686. { }
  687. };
  688. MODULE_DEVICE_TABLE(i2c, mt9t001_id);
  689. static struct i2c_driver mt9t001_driver = {
  690. .driver = {
  691. .name = "mt9t001",
  692. },
  693. .probe = mt9t001_probe,
  694. .remove = mt9t001_remove,
  695. .id_table = mt9t001_id,
  696. };
  697. static int __init mt9t001_init(void)
  698. {
  699. return i2c_add_driver(&mt9t001_driver);
  700. }
  701. static void __exit mt9t001_exit(void)
  702. {
  703. i2c_del_driver(&mt9t001_driver);
  704. }
  705. module_init(mt9t001_init);
  706. module_exit(mt9t001_exit);
  707. MODULE_DESCRIPTION("Aptina (Micron) MT9T001 Camera driver");
  708. MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
  709. MODULE_LICENSE("GPL");