kvm.h 16 KB

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  1. #ifndef __KVM_H
  2. #define __KVM_H
  3. /*
  4. * This work is licensed under the terms of the GNU GPL, version 2. See
  5. * the COPYING file in the top-level directory.
  6. */
  7. #include <linux/types.h>
  8. #include <linux/list.h>
  9. #include <linux/mutex.h>
  10. #include <linux/spinlock.h>
  11. #include <linux/mm.h>
  12. #include "vmx.h"
  13. #include <linux/kvm.h>
  14. #define CR0_PE_MASK (1ULL << 0)
  15. #define CR0_TS_MASK (1ULL << 3)
  16. #define CR0_NE_MASK (1ULL << 5)
  17. #define CR0_WP_MASK (1ULL << 16)
  18. #define CR0_NW_MASK (1ULL << 29)
  19. #define CR0_CD_MASK (1ULL << 30)
  20. #define CR0_PG_MASK (1ULL << 31)
  21. #define CR3_WPT_MASK (1ULL << 3)
  22. #define CR3_PCD_MASK (1ULL << 4)
  23. #define CR3_RESEVED_BITS 0x07ULL
  24. #define CR3_L_MODE_RESEVED_BITS (~((1ULL << 40) - 1) | 0x0fe7ULL)
  25. #define CR3_FLAGS_MASK ((1ULL << 5) - 1)
  26. #define CR4_VME_MASK (1ULL << 0)
  27. #define CR4_PSE_MASK (1ULL << 4)
  28. #define CR4_PAE_MASK (1ULL << 5)
  29. #define CR4_PGE_MASK (1ULL << 7)
  30. #define CR4_VMXE_MASK (1ULL << 13)
  31. #define KVM_GUEST_CR0_MASK \
  32. (CR0_PG_MASK | CR0_PE_MASK | CR0_WP_MASK | CR0_NE_MASK \
  33. | CR0_NW_MASK | CR0_CD_MASK)
  34. #define KVM_VM_CR0_ALWAYS_ON \
  35. (CR0_PG_MASK | CR0_PE_MASK | CR0_WP_MASK | CR0_NE_MASK)
  36. #define KVM_GUEST_CR4_MASK \
  37. (CR4_PSE_MASK | CR4_PAE_MASK | CR4_PGE_MASK | CR4_VMXE_MASK | CR4_VME_MASK)
  38. #define KVM_PMODE_VM_CR4_ALWAYS_ON (CR4_VMXE_MASK | CR4_PAE_MASK)
  39. #define KVM_RMODE_VM_CR4_ALWAYS_ON (CR4_VMXE_MASK | CR4_PAE_MASK | CR4_VME_MASK)
  40. #define INVALID_PAGE (~(hpa_t)0)
  41. #define UNMAPPED_GVA (~(gpa_t)0)
  42. #define KVM_MAX_VCPUS 1
  43. #define KVM_MEMORY_SLOTS 4
  44. #define KVM_NUM_MMU_PAGES 256
  45. #define KVM_MIN_FREE_MMU_PAGES 5
  46. #define KVM_REFILL_PAGES 25
  47. #define FX_IMAGE_SIZE 512
  48. #define FX_IMAGE_ALIGN 16
  49. #define FX_BUF_SIZE (2 * FX_IMAGE_SIZE + FX_IMAGE_ALIGN)
  50. #define DE_VECTOR 0
  51. #define DF_VECTOR 8
  52. #define TS_VECTOR 10
  53. #define NP_VECTOR 11
  54. #define SS_VECTOR 12
  55. #define GP_VECTOR 13
  56. #define PF_VECTOR 14
  57. #define SELECTOR_TI_MASK (1 << 2)
  58. #define SELECTOR_RPL_MASK 0x03
  59. #define IOPL_SHIFT 12
  60. /*
  61. * Address types:
  62. *
  63. * gva - guest virtual address
  64. * gpa - guest physical address
  65. * gfn - guest frame number
  66. * hva - host virtual address
  67. * hpa - host physical address
  68. * hfn - host frame number
  69. */
  70. typedef unsigned long gva_t;
  71. typedef u64 gpa_t;
  72. typedef unsigned long gfn_t;
  73. typedef unsigned long hva_t;
  74. typedef u64 hpa_t;
  75. typedef unsigned long hfn_t;
  76. #define NR_PTE_CHAIN_ENTRIES 5
  77. struct kvm_pte_chain {
  78. u64 *parent_ptes[NR_PTE_CHAIN_ENTRIES];
  79. struct hlist_node link;
  80. };
  81. /*
  82. * kvm_mmu_page_role, below, is defined as:
  83. *
  84. * bits 0:3 - total guest paging levels (2-4, or zero for real mode)
  85. * bits 4:7 - page table level for this shadow (1-4)
  86. * bits 8:9 - page table quadrant for 2-level guests
  87. * bit 16 - "metaphysical" - gfn is not a real page (huge page/real mode)
  88. */
  89. union kvm_mmu_page_role {
  90. unsigned word;
  91. struct {
  92. unsigned glevels : 4;
  93. unsigned level : 4;
  94. unsigned quadrant : 2;
  95. unsigned pad_for_nice_hex_output : 6;
  96. unsigned metaphysical : 1;
  97. };
  98. };
  99. struct kvm_mmu_page {
  100. struct list_head link;
  101. struct hlist_node hash_link;
  102. /*
  103. * The following two entries are used to key the shadow page in the
  104. * hash table.
  105. */
  106. gfn_t gfn;
  107. union kvm_mmu_page_role role;
  108. hpa_t page_hpa;
  109. unsigned long slot_bitmap; /* One bit set per slot which has memory
  110. * in this shadow page.
  111. */
  112. int global; /* Set if all ptes in this page are global */
  113. int multimapped; /* More than one parent_pte? */
  114. union {
  115. u64 *parent_pte; /* !multimapped */
  116. struct hlist_head parent_ptes; /* multimapped, kvm_pte_chain */
  117. };
  118. };
  119. struct vmcs {
  120. u32 revision_id;
  121. u32 abort;
  122. char data[0];
  123. };
  124. #define vmx_msr_entry kvm_msr_entry
  125. struct kvm_vcpu;
  126. /*
  127. * x86 supports 3 paging modes (4-level 64-bit, 3-level 64-bit, and 2-level
  128. * 32-bit). The kvm_mmu structure abstracts the details of the current mmu
  129. * mode.
  130. */
  131. struct kvm_mmu {
  132. void (*new_cr3)(struct kvm_vcpu *vcpu);
  133. int (*page_fault)(struct kvm_vcpu *vcpu, gva_t gva, u32 err);
  134. void (*free)(struct kvm_vcpu *vcpu);
  135. gpa_t (*gva_to_gpa)(struct kvm_vcpu *vcpu, gva_t gva);
  136. hpa_t root_hpa;
  137. int root_level;
  138. int shadow_root_level;
  139. u64 *pae_root;
  140. };
  141. struct kvm_guest_debug {
  142. int enabled;
  143. unsigned long bp[4];
  144. int singlestep;
  145. };
  146. enum {
  147. VCPU_REGS_RAX = 0,
  148. VCPU_REGS_RCX = 1,
  149. VCPU_REGS_RDX = 2,
  150. VCPU_REGS_RBX = 3,
  151. VCPU_REGS_RSP = 4,
  152. VCPU_REGS_RBP = 5,
  153. VCPU_REGS_RSI = 6,
  154. VCPU_REGS_RDI = 7,
  155. #ifdef CONFIG_X86_64
  156. VCPU_REGS_R8 = 8,
  157. VCPU_REGS_R9 = 9,
  158. VCPU_REGS_R10 = 10,
  159. VCPU_REGS_R11 = 11,
  160. VCPU_REGS_R12 = 12,
  161. VCPU_REGS_R13 = 13,
  162. VCPU_REGS_R14 = 14,
  163. VCPU_REGS_R15 = 15,
  164. #endif
  165. NR_VCPU_REGS
  166. };
  167. enum {
  168. VCPU_SREG_CS,
  169. VCPU_SREG_DS,
  170. VCPU_SREG_ES,
  171. VCPU_SREG_FS,
  172. VCPU_SREG_GS,
  173. VCPU_SREG_SS,
  174. VCPU_SREG_TR,
  175. VCPU_SREG_LDTR,
  176. };
  177. struct kvm_vcpu {
  178. struct kvm *kvm;
  179. union {
  180. struct vmcs *vmcs;
  181. struct vcpu_svm *svm;
  182. };
  183. struct mutex mutex;
  184. int cpu;
  185. int launched;
  186. int interrupt_window_open;
  187. unsigned long irq_summary; /* bit vector: 1 per word in irq_pending */
  188. #define NR_IRQ_WORDS KVM_IRQ_BITMAP_SIZE(unsigned long)
  189. unsigned long irq_pending[NR_IRQ_WORDS];
  190. unsigned long regs[NR_VCPU_REGS]; /* for rsp: vcpu_load_rsp_rip() */
  191. unsigned long rip; /* needs vcpu_load_rsp_rip() */
  192. unsigned long cr0;
  193. unsigned long cr2;
  194. unsigned long cr3;
  195. unsigned long cr4;
  196. unsigned long cr8;
  197. u64 pdptrs[4]; /* pae */
  198. u64 shadow_efer;
  199. u64 apic_base;
  200. int nmsrs;
  201. struct vmx_msr_entry *guest_msrs;
  202. struct vmx_msr_entry *host_msrs;
  203. struct list_head free_pages;
  204. struct kvm_mmu_page page_header_buf[KVM_NUM_MMU_PAGES];
  205. struct kvm_mmu mmu;
  206. gfn_t last_pt_write_gfn;
  207. int last_pt_write_count;
  208. struct kvm_guest_debug guest_debug;
  209. char fx_buf[FX_BUF_SIZE];
  210. char *host_fx_image;
  211. char *guest_fx_image;
  212. int mmio_needed;
  213. int mmio_read_completed;
  214. int mmio_is_write;
  215. int mmio_size;
  216. unsigned char mmio_data[8];
  217. gpa_t mmio_phys_addr;
  218. struct {
  219. int active;
  220. u8 save_iopl;
  221. struct kvm_save_segment {
  222. u16 selector;
  223. unsigned long base;
  224. u32 limit;
  225. u32 ar;
  226. } tr, es, ds, fs, gs;
  227. } rmode;
  228. };
  229. struct kvm_memory_slot {
  230. gfn_t base_gfn;
  231. unsigned long npages;
  232. unsigned long flags;
  233. struct page **phys_mem;
  234. unsigned long *dirty_bitmap;
  235. };
  236. struct kvm {
  237. spinlock_t lock; /* protects everything except vcpus */
  238. int nmemslots;
  239. struct kvm_memory_slot memslots[KVM_MEMORY_SLOTS];
  240. /*
  241. * Hash table of struct kvm_mmu_page.
  242. */
  243. struct list_head active_mmu_pages;
  244. int n_free_mmu_pages;
  245. struct hlist_head mmu_page_hash[KVM_NUM_MMU_PAGES];
  246. struct kvm_vcpu vcpus[KVM_MAX_VCPUS];
  247. int memory_config_version;
  248. int busy;
  249. unsigned long rmap_overflow;
  250. };
  251. struct kvm_stat {
  252. u32 pf_fixed;
  253. u32 pf_guest;
  254. u32 tlb_flush;
  255. u32 invlpg;
  256. u32 exits;
  257. u32 io_exits;
  258. u32 mmio_exits;
  259. u32 signal_exits;
  260. u32 irq_window_exits;
  261. u32 halt_exits;
  262. u32 request_irq_exits;
  263. u32 irq_exits;
  264. };
  265. struct descriptor_table {
  266. u16 limit;
  267. unsigned long base;
  268. } __attribute__((packed));
  269. struct kvm_arch_ops {
  270. int (*cpu_has_kvm_support)(void); /* __init */
  271. int (*disabled_by_bios)(void); /* __init */
  272. void (*hardware_enable)(void *dummy); /* __init */
  273. void (*hardware_disable)(void *dummy);
  274. int (*hardware_setup)(void); /* __init */
  275. void (*hardware_unsetup)(void); /* __exit */
  276. int (*vcpu_create)(struct kvm_vcpu *vcpu);
  277. void (*vcpu_free)(struct kvm_vcpu *vcpu);
  278. struct kvm_vcpu *(*vcpu_load)(struct kvm_vcpu *vcpu);
  279. void (*vcpu_put)(struct kvm_vcpu *vcpu);
  280. int (*set_guest_debug)(struct kvm_vcpu *vcpu,
  281. struct kvm_debug_guest *dbg);
  282. int (*get_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 *pdata);
  283. int (*set_msr)(struct kvm_vcpu *vcpu, u32 msr_index, u64 data);
  284. u64 (*get_segment_base)(struct kvm_vcpu *vcpu, int seg);
  285. void (*get_segment)(struct kvm_vcpu *vcpu,
  286. struct kvm_segment *var, int seg);
  287. void (*set_segment)(struct kvm_vcpu *vcpu,
  288. struct kvm_segment *var, int seg);
  289. void (*get_cs_db_l_bits)(struct kvm_vcpu *vcpu, int *db, int *l);
  290. void (*decache_cr0_cr4_guest_bits)(struct kvm_vcpu *vcpu);
  291. void (*set_cr0)(struct kvm_vcpu *vcpu, unsigned long cr0);
  292. void (*set_cr0_no_modeswitch)(struct kvm_vcpu *vcpu,
  293. unsigned long cr0);
  294. void (*set_cr3)(struct kvm_vcpu *vcpu, unsigned long cr3);
  295. void (*set_cr4)(struct kvm_vcpu *vcpu, unsigned long cr4);
  296. void (*set_efer)(struct kvm_vcpu *vcpu, u64 efer);
  297. void (*get_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
  298. void (*set_idt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
  299. void (*get_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
  300. void (*set_gdt)(struct kvm_vcpu *vcpu, struct descriptor_table *dt);
  301. unsigned long (*get_dr)(struct kvm_vcpu *vcpu, int dr);
  302. void (*set_dr)(struct kvm_vcpu *vcpu, int dr, unsigned long value,
  303. int *exception);
  304. void (*cache_regs)(struct kvm_vcpu *vcpu);
  305. void (*decache_regs)(struct kvm_vcpu *vcpu);
  306. unsigned long (*get_rflags)(struct kvm_vcpu *vcpu);
  307. void (*set_rflags)(struct kvm_vcpu *vcpu, unsigned long rflags);
  308. void (*invlpg)(struct kvm_vcpu *vcpu, gva_t addr);
  309. void (*tlb_flush)(struct kvm_vcpu *vcpu);
  310. void (*inject_page_fault)(struct kvm_vcpu *vcpu,
  311. unsigned long addr, u32 err_code);
  312. void (*inject_gp)(struct kvm_vcpu *vcpu, unsigned err_code);
  313. int (*run)(struct kvm_vcpu *vcpu, struct kvm_run *run);
  314. int (*vcpu_setup)(struct kvm_vcpu *vcpu);
  315. void (*skip_emulated_instruction)(struct kvm_vcpu *vcpu);
  316. };
  317. extern struct kvm_stat kvm_stat;
  318. extern struct kvm_arch_ops *kvm_arch_ops;
  319. #define kvm_printf(kvm, fmt ...) printk(KERN_DEBUG fmt)
  320. #define vcpu_printf(vcpu, fmt...) kvm_printf(vcpu->kvm, fmt)
  321. int kvm_init_arch(struct kvm_arch_ops *ops, struct module *module);
  322. void kvm_exit_arch(void);
  323. void kvm_mmu_destroy(struct kvm_vcpu *vcpu);
  324. int kvm_mmu_create(struct kvm_vcpu *vcpu);
  325. int kvm_mmu_setup(struct kvm_vcpu *vcpu);
  326. int kvm_mmu_reset_context(struct kvm_vcpu *vcpu);
  327. void kvm_mmu_slot_remove_write_access(struct kvm *kvm, int slot);
  328. hpa_t gpa_to_hpa(struct kvm_vcpu *vcpu, gpa_t gpa);
  329. #define HPA_MSB ((sizeof(hpa_t) * 8) - 1)
  330. #define HPA_ERR_MASK ((hpa_t)1 << HPA_MSB)
  331. static inline int is_error_hpa(hpa_t hpa) { return hpa >> HPA_MSB; }
  332. hpa_t gva_to_hpa(struct kvm_vcpu *vcpu, gva_t gva);
  333. void kvm_emulator_want_group7_invlpg(void);
  334. extern hpa_t bad_page_address;
  335. static inline struct page *gfn_to_page(struct kvm_memory_slot *slot, gfn_t gfn)
  336. {
  337. return slot->phys_mem[gfn - slot->base_gfn];
  338. }
  339. struct kvm_memory_slot *gfn_to_memslot(struct kvm *kvm, gfn_t gfn);
  340. void mark_page_dirty(struct kvm *kvm, gfn_t gfn);
  341. enum emulation_result {
  342. EMULATE_DONE, /* no further processing */
  343. EMULATE_DO_MMIO, /* kvm_run filled with mmio request */
  344. EMULATE_FAIL, /* can't emulate this instruction */
  345. };
  346. int emulate_instruction(struct kvm_vcpu *vcpu, struct kvm_run *run,
  347. unsigned long cr2, u16 error_code);
  348. void realmode_lgdt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
  349. void realmode_lidt(struct kvm_vcpu *vcpu, u16 size, unsigned long address);
  350. void realmode_lmsw(struct kvm_vcpu *vcpu, unsigned long msw,
  351. unsigned long *rflags);
  352. unsigned long realmode_get_cr(struct kvm_vcpu *vcpu, int cr);
  353. void realmode_set_cr(struct kvm_vcpu *vcpu, int cr, unsigned long value,
  354. unsigned long *rflags);
  355. struct x86_emulate_ctxt;
  356. int emulate_invlpg(struct kvm_vcpu *vcpu, gva_t address);
  357. int emulate_clts(struct kvm_vcpu *vcpu);
  358. int emulator_get_dr(struct x86_emulate_ctxt* ctxt, int dr,
  359. unsigned long *dest);
  360. int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
  361. unsigned long value);
  362. void set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0);
  363. void set_cr3(struct kvm_vcpu *vcpu, unsigned long cr0);
  364. void set_cr4(struct kvm_vcpu *vcpu, unsigned long cr0);
  365. void set_cr8(struct kvm_vcpu *vcpu, unsigned long cr0);
  366. void lmsw(struct kvm_vcpu *vcpu, unsigned long msw);
  367. int kvm_get_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata);
  368. int kvm_set_msr_common(struct kvm_vcpu *vcpu, u32 msr, u64 data);
  369. void fx_init(struct kvm_vcpu *vcpu);
  370. void load_msrs(struct vmx_msr_entry *e, int n);
  371. void save_msrs(struct vmx_msr_entry *e, int n);
  372. void kvm_resched(struct kvm_vcpu *vcpu);
  373. int kvm_read_guest(struct kvm_vcpu *vcpu,
  374. gva_t addr,
  375. unsigned long size,
  376. void *dest);
  377. int kvm_write_guest(struct kvm_vcpu *vcpu,
  378. gva_t addr,
  379. unsigned long size,
  380. void *data);
  381. unsigned long segment_base(u16 selector);
  382. void kvm_mmu_pre_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes);
  383. void kvm_mmu_post_write(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes);
  384. int kvm_mmu_unprotect_page_virt(struct kvm_vcpu *vcpu, gva_t gva);
  385. void kvm_mmu_free_some_pages(struct kvm_vcpu *vcpu);
  386. static inline int kvm_mmu_page_fault(struct kvm_vcpu *vcpu, gva_t gva,
  387. u32 error_code)
  388. {
  389. if (unlikely(vcpu->kvm->n_free_mmu_pages < KVM_MIN_FREE_MMU_PAGES))
  390. kvm_mmu_free_some_pages(vcpu);
  391. return vcpu->mmu.page_fault(vcpu, gva, error_code);
  392. }
  393. static inline struct page *_gfn_to_page(struct kvm *kvm, gfn_t gfn)
  394. {
  395. struct kvm_memory_slot *slot = gfn_to_memslot(kvm, gfn);
  396. return (slot) ? slot->phys_mem[gfn - slot->base_gfn] : NULL;
  397. }
  398. static inline int is_long_mode(struct kvm_vcpu *vcpu)
  399. {
  400. #ifdef CONFIG_X86_64
  401. return vcpu->shadow_efer & EFER_LME;
  402. #else
  403. return 0;
  404. #endif
  405. }
  406. static inline int is_pae(struct kvm_vcpu *vcpu)
  407. {
  408. return vcpu->cr4 & CR4_PAE_MASK;
  409. }
  410. static inline int is_pse(struct kvm_vcpu *vcpu)
  411. {
  412. return vcpu->cr4 & CR4_PSE_MASK;
  413. }
  414. static inline int is_paging(struct kvm_vcpu *vcpu)
  415. {
  416. return vcpu->cr0 & CR0_PG_MASK;
  417. }
  418. static inline int memslot_id(struct kvm *kvm, struct kvm_memory_slot *slot)
  419. {
  420. return slot - kvm->memslots;
  421. }
  422. static inline struct kvm_mmu_page *page_header(hpa_t shadow_page)
  423. {
  424. struct page *page = pfn_to_page(shadow_page >> PAGE_SHIFT);
  425. return (struct kvm_mmu_page *)page->private;
  426. }
  427. static inline u16 read_fs(void)
  428. {
  429. u16 seg;
  430. asm ("mov %%fs, %0" : "=g"(seg));
  431. return seg;
  432. }
  433. static inline u16 read_gs(void)
  434. {
  435. u16 seg;
  436. asm ("mov %%gs, %0" : "=g"(seg));
  437. return seg;
  438. }
  439. static inline u16 read_ldt(void)
  440. {
  441. u16 ldt;
  442. asm ("sldt %0" : "=g"(ldt));
  443. return ldt;
  444. }
  445. static inline void load_fs(u16 sel)
  446. {
  447. asm ("mov %0, %%fs" : : "rm"(sel));
  448. }
  449. static inline void load_gs(u16 sel)
  450. {
  451. asm ("mov %0, %%gs" : : "rm"(sel));
  452. }
  453. #ifndef load_ldt
  454. static inline void load_ldt(u16 sel)
  455. {
  456. asm ("lldt %0" : : "g"(sel));
  457. }
  458. #endif
  459. static inline void get_idt(struct descriptor_table *table)
  460. {
  461. asm ("sidt %0" : "=m"(*table));
  462. }
  463. static inline void get_gdt(struct descriptor_table *table)
  464. {
  465. asm ("sgdt %0" : "=m"(*table));
  466. }
  467. static inline unsigned long read_tr_base(void)
  468. {
  469. u16 tr;
  470. asm ("str %0" : "=g"(tr));
  471. return segment_base(tr);
  472. }
  473. #ifdef CONFIG_X86_64
  474. static inline unsigned long read_msr(unsigned long msr)
  475. {
  476. u64 value;
  477. rdmsrl(msr, value);
  478. return value;
  479. }
  480. #endif
  481. static inline void fx_save(void *image)
  482. {
  483. asm ("fxsave (%0)":: "r" (image));
  484. }
  485. static inline void fx_restore(void *image)
  486. {
  487. asm ("fxrstor (%0)":: "r" (image));
  488. }
  489. static inline void fpu_init(void)
  490. {
  491. asm ("finit");
  492. }
  493. static inline u32 get_rdx_init_val(void)
  494. {
  495. return 0x600; /* P6 family */
  496. }
  497. #define ASM_VMX_VMCLEAR_RAX ".byte 0x66, 0x0f, 0xc7, 0x30"
  498. #define ASM_VMX_VMLAUNCH ".byte 0x0f, 0x01, 0xc2"
  499. #define ASM_VMX_VMRESUME ".byte 0x0f, 0x01, 0xc3"
  500. #define ASM_VMX_VMPTRLD_RAX ".byte 0x0f, 0xc7, 0x30"
  501. #define ASM_VMX_VMREAD_RDX_RAX ".byte 0x0f, 0x78, 0xd0"
  502. #define ASM_VMX_VMWRITE_RAX_RDX ".byte 0x0f, 0x79, 0xd0"
  503. #define ASM_VMX_VMWRITE_RSP_RDX ".byte 0x0f, 0x79, 0xd4"
  504. #define ASM_VMX_VMXOFF ".byte 0x0f, 0x01, 0xc4"
  505. #define ASM_VMX_VMXON_RAX ".byte 0xf3, 0x0f, 0xc7, 0x30"
  506. #define MSR_IA32_TIME_STAMP_COUNTER 0x010
  507. #define TSS_IOPB_BASE_OFFSET 0x66
  508. #define TSS_BASE_SIZE 0x68
  509. #define TSS_IOPB_SIZE (65536 / 8)
  510. #define TSS_REDIRECTION_SIZE (256 / 8)
  511. #define RMODE_TSS_SIZE (TSS_BASE_SIZE + TSS_REDIRECTION_SIZE + TSS_IOPB_SIZE + 1)
  512. #endif