cpqphp_core.c 38 KB

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  1. /*
  2. * Compaq Hot Plug Controller Driver
  3. *
  4. * Copyright (C) 1995,2001 Compaq Computer Corporation
  5. * Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com>
  6. * Copyright (C) 2001 IBM Corp.
  7. *
  8. * All rights reserved.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or (at
  13. * your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful, but
  16. * WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  18. * NON INFRINGEMENT. See the GNU General Public License for more
  19. * details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24. *
  25. * Send feedback to <greg@kroah.com>
  26. *
  27. * Jan 12, 2003 - Added 66/100/133MHz PCI-X support,
  28. * Torben Mathiasen <torben.mathiasen@hp.com>
  29. */
  30. #include <linux/module.h>
  31. #include <linux/moduleparam.h>
  32. #include <linux/kernel.h>
  33. #include <linux/types.h>
  34. #include <linux/proc_fs.h>
  35. #include <linux/slab.h>
  36. #include <linux/workqueue.h>
  37. #include <linux/pci.h>
  38. #include <linux/pci_hotplug.h>
  39. #include <linux/init.h>
  40. #include <linux/interrupt.h>
  41. #include <asm/uaccess.h>
  42. #include "cpqphp.h"
  43. #include "cpqphp_nvram.h"
  44. #include <asm/pci_x86.h>
  45. /* Global variables */
  46. int cpqhp_debug;
  47. int cpqhp_legacy_mode;
  48. struct controller *cpqhp_ctrl_list; /* = NULL */
  49. struct pci_func *cpqhp_slot_list[256];
  50. /* local variables */
  51. static void __iomem *smbios_table;
  52. static void __iomem *smbios_start;
  53. static void __iomem *cpqhp_rom_start;
  54. static int power_mode;
  55. static int debug;
  56. static int initialized;
  57. #define DRIVER_VERSION "0.9.8"
  58. #define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>"
  59. #define DRIVER_DESC "Compaq Hot Plug PCI Controller Driver"
  60. MODULE_AUTHOR(DRIVER_AUTHOR);
  61. MODULE_DESCRIPTION(DRIVER_DESC);
  62. MODULE_LICENSE("GPL");
  63. module_param(power_mode, bool, 0644);
  64. MODULE_PARM_DESC(power_mode, "Power mode enabled or not");
  65. module_param(debug, bool, 0644);
  66. MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
  67. #define CPQHPC_MODULE_MINOR 208
  68. static int one_time_init (void);
  69. static int set_attention_status (struct hotplug_slot *slot, u8 value);
  70. static int process_SI (struct hotplug_slot *slot);
  71. static int process_SS (struct hotplug_slot *slot);
  72. static int hardware_test (struct hotplug_slot *slot, u32 value);
  73. static int get_power_status (struct hotplug_slot *slot, u8 *value);
  74. static int get_attention_status (struct hotplug_slot *slot, u8 *value);
  75. static int get_latch_status (struct hotplug_slot *slot, u8 *value);
  76. static int get_adapter_status (struct hotplug_slot *slot, u8 *value);
  77. static int get_max_bus_speed (struct hotplug_slot *slot, enum pci_bus_speed *value);
  78. static int get_cur_bus_speed (struct hotplug_slot *slot, enum pci_bus_speed *value);
  79. static struct hotplug_slot_ops cpqphp_hotplug_slot_ops = {
  80. .owner = THIS_MODULE,
  81. .set_attention_status = set_attention_status,
  82. .enable_slot = process_SI,
  83. .disable_slot = process_SS,
  84. .hardware_test = hardware_test,
  85. .get_power_status = get_power_status,
  86. .get_attention_status = get_attention_status,
  87. .get_latch_status = get_latch_status,
  88. .get_adapter_status = get_adapter_status,
  89. .get_max_bus_speed = get_max_bus_speed,
  90. .get_cur_bus_speed = get_cur_bus_speed,
  91. };
  92. static inline int is_slot64bit(struct slot *slot)
  93. {
  94. return (readb(slot->p_sm_slot + SMBIOS_SLOT_WIDTH) == 0x06) ? 1 : 0;
  95. }
  96. static inline int is_slot66mhz(struct slot *slot)
  97. {
  98. return (readb(slot->p_sm_slot + SMBIOS_SLOT_TYPE) == 0x0E) ? 1 : 0;
  99. }
  100. /**
  101. * detect_SMBIOS_pointer - find the System Management BIOS Table in mem region.
  102. * @begin: begin pointer for region to be scanned.
  103. * @end: end pointer for region to be scanned.
  104. *
  105. * Returns pointer to the head of the SMBIOS tables (or %NULL).
  106. */
  107. static void __iomem * detect_SMBIOS_pointer(void __iomem *begin, void __iomem *end)
  108. {
  109. void __iomem *fp;
  110. void __iomem *endp;
  111. u8 temp1, temp2, temp3, temp4;
  112. int status = 0;
  113. endp = (end - sizeof(u32) + 1);
  114. for (fp = begin; fp <= endp; fp += 16) {
  115. temp1 = readb(fp);
  116. temp2 = readb(fp+1);
  117. temp3 = readb(fp+2);
  118. temp4 = readb(fp+3);
  119. if (temp1 == '_' &&
  120. temp2 == 'S' &&
  121. temp3 == 'M' &&
  122. temp4 == '_') {
  123. status = 1;
  124. break;
  125. }
  126. }
  127. if (!status)
  128. fp = NULL;
  129. dbg("Discovered SMBIOS Entry point at %p\n", fp);
  130. return fp;
  131. }
  132. /**
  133. * init_SERR - Initializes the per slot SERR generation.
  134. * @ctrl: controller to use
  135. *
  136. * For unexpected switch opens
  137. */
  138. static int init_SERR(struct controller * ctrl)
  139. {
  140. u32 tempdword;
  141. u32 number_of_slots;
  142. u8 physical_slot;
  143. if (!ctrl)
  144. return 1;
  145. tempdword = ctrl->first_slot;
  146. number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
  147. /* Loop through slots */
  148. while (number_of_slots) {
  149. physical_slot = tempdword;
  150. writeb(0, ctrl->hpc_reg + SLOT_SERR);
  151. tempdword++;
  152. number_of_slots--;
  153. }
  154. return 0;
  155. }
  156. /* nice debugging output */
  157. static int pci_print_IRQ_route (void)
  158. {
  159. struct irq_routing_table *routing_table;
  160. int len;
  161. int loop;
  162. u8 tbus, tdevice, tslot;
  163. routing_table = pcibios_get_irq_routing_table();
  164. if (routing_table == NULL) {
  165. err("No BIOS Routing Table??? Not good\n");
  166. return -ENOMEM;
  167. }
  168. len = (routing_table->size - sizeof(struct irq_routing_table)) /
  169. sizeof(struct irq_info);
  170. /* Make sure I got at least one entry */
  171. if (len == 0) {
  172. kfree(routing_table);
  173. return -1;
  174. }
  175. dbg("bus dev func slot\n");
  176. for (loop = 0; loop < len; ++loop) {
  177. tbus = routing_table->slots[loop].bus;
  178. tdevice = routing_table->slots[loop].devfn;
  179. tslot = routing_table->slots[loop].slot;
  180. dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot);
  181. }
  182. kfree(routing_table);
  183. return 0;
  184. }
  185. /**
  186. * get_subsequent_smbios_entry: get the next entry from bios table.
  187. * @smbios_start: where to start in the SMBIOS table
  188. * @smbios_table: location of the SMBIOS table
  189. * @curr: %NULL or pointer to previously returned structure
  190. *
  191. * Gets the first entry if previous == NULL;
  192. * otherwise, returns the next entry.
  193. * Uses global SMBIOS Table pointer.
  194. *
  195. * Returns a pointer to an SMBIOS structure or NULL if none found.
  196. */
  197. static void __iomem *get_subsequent_smbios_entry(void __iomem *smbios_start,
  198. void __iomem *smbios_table,
  199. void __iomem *curr)
  200. {
  201. u8 bail = 0;
  202. u8 previous_byte = 1;
  203. void __iomem *p_temp;
  204. void __iomem *p_max;
  205. if (!smbios_table || !curr)
  206. return(NULL);
  207. /* set p_max to the end of the table */
  208. p_max = smbios_start + readw(smbios_table + ST_LENGTH);
  209. p_temp = curr;
  210. p_temp += readb(curr + SMBIOS_GENERIC_LENGTH);
  211. while ((p_temp < p_max) && !bail) {
  212. /* Look for the double NULL terminator
  213. * The first condition is the previous byte
  214. * and the second is the curr
  215. */
  216. if (!previous_byte && !(readb(p_temp))) {
  217. bail = 1;
  218. }
  219. previous_byte = readb(p_temp);
  220. p_temp++;
  221. }
  222. if (p_temp < p_max) {
  223. return p_temp;
  224. } else {
  225. return NULL;
  226. }
  227. }
  228. /**
  229. * get_SMBIOS_entry - return the requested SMBIOS entry or %NULL
  230. * @smbios_start: where to start in the SMBIOS table
  231. * @smbios_table: location of the SMBIOS table
  232. * @type: SMBIOS structure type to be returned
  233. * @previous: %NULL or pointer to previously returned structure
  234. *
  235. * Gets the first entry of the specified type if previous == %NULL;
  236. * Otherwise, returns the next entry of the given type.
  237. * Uses global SMBIOS Table pointer.
  238. * Uses get_subsequent_smbios_entry.
  239. *
  240. * Returns a pointer to an SMBIOS structure or %NULL if none found.
  241. */
  242. static void __iomem *get_SMBIOS_entry(void __iomem *smbios_start,
  243. void __iomem *smbios_table,
  244. u8 type,
  245. void __iomem *previous)
  246. {
  247. if (!smbios_table)
  248. return NULL;
  249. if (!previous) {
  250. previous = smbios_start;
  251. } else {
  252. previous = get_subsequent_smbios_entry(smbios_start,
  253. smbios_table, previous);
  254. }
  255. while (previous) {
  256. if (readb(previous + SMBIOS_GENERIC_TYPE) != type) {
  257. previous = get_subsequent_smbios_entry(smbios_start,
  258. smbios_table, previous);
  259. } else {
  260. break;
  261. }
  262. }
  263. return previous;
  264. }
  265. static void release_slot(struct hotplug_slot *hotplug_slot)
  266. {
  267. struct slot *slot = hotplug_slot->private;
  268. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  269. kfree(slot->hotplug_slot->info);
  270. kfree(slot->hotplug_slot);
  271. kfree(slot);
  272. }
  273. #define SLOT_NAME_SIZE 10
  274. static int ctrl_slot_setup(struct controller *ctrl,
  275. void __iomem *smbios_start,
  276. void __iomem *smbios_table)
  277. {
  278. struct slot *slot;
  279. struct hotplug_slot *hotplug_slot;
  280. struct hotplug_slot_info *hotplug_slot_info;
  281. u8 number_of_slots;
  282. u8 slot_device;
  283. u8 slot_number;
  284. u8 ctrl_slot;
  285. u32 tempdword;
  286. char name[SLOT_NAME_SIZE];
  287. void __iomem *slot_entry= NULL;
  288. int result = -ENOMEM;
  289. dbg("%s\n", __func__);
  290. tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
  291. number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
  292. slot_device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
  293. slot_number = ctrl->first_slot;
  294. while (number_of_slots) {
  295. slot = kzalloc(sizeof(*slot), GFP_KERNEL);
  296. if (!slot)
  297. goto error;
  298. slot->hotplug_slot = kzalloc(sizeof(*(slot->hotplug_slot)),
  299. GFP_KERNEL);
  300. if (!slot->hotplug_slot)
  301. goto error_slot;
  302. hotplug_slot = slot->hotplug_slot;
  303. hotplug_slot->info =
  304. kzalloc(sizeof(*(hotplug_slot->info)),
  305. GFP_KERNEL);
  306. if (!hotplug_slot->info)
  307. goto error_hpslot;
  308. hotplug_slot_info = hotplug_slot->info;
  309. slot->ctrl = ctrl;
  310. slot->bus = ctrl->bus;
  311. slot->device = slot_device;
  312. slot->number = slot_number;
  313. dbg("slot->number = %u\n", slot->number);
  314. slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9,
  315. slot_entry);
  316. while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) !=
  317. slot->number)) {
  318. slot_entry = get_SMBIOS_entry(smbios_start,
  319. smbios_table, 9, slot_entry);
  320. }
  321. slot->p_sm_slot = slot_entry;
  322. init_timer(&slot->task_event);
  323. slot->task_event.expires = jiffies + 5 * HZ;
  324. slot->task_event.function = cpqhp_pushbutton_thread;
  325. /*FIXME: these capabilities aren't used but if they are
  326. * they need to be correctly implemented
  327. */
  328. slot->capabilities |= PCISLOT_REPLACE_SUPPORTED;
  329. slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED;
  330. if (is_slot64bit(slot))
  331. slot->capabilities |= PCISLOT_64_BIT_SUPPORTED;
  332. if (is_slot66mhz(slot))
  333. slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED;
  334. if (ctrl->speed == PCI_SPEED_66MHz)
  335. slot->capabilities |= PCISLOT_66_MHZ_OPERATION;
  336. ctrl_slot =
  337. slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4);
  338. /* Check presence */
  339. slot->capabilities |=
  340. ((((~tempdword) >> 23) |
  341. ((~tempdword) >> 15)) >> ctrl_slot) & 0x02;
  342. /* Check the switch state */
  343. slot->capabilities |=
  344. ((~tempdword & 0xFF) >> ctrl_slot) & 0x01;
  345. /* Check the slot enable */
  346. slot->capabilities |=
  347. ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04;
  348. /* register this slot with the hotplug pci core */
  349. hotplug_slot->release = &release_slot;
  350. hotplug_slot->private = slot;
  351. snprintf(name, SLOT_NAME_SIZE, "%u", slot->number);
  352. hotplug_slot->ops = &cpqphp_hotplug_slot_ops;
  353. hotplug_slot_info->power_status = get_slot_enabled(ctrl, slot);
  354. hotplug_slot_info->attention_status =
  355. cpq_get_attention_status(ctrl, slot);
  356. hotplug_slot_info->latch_status =
  357. cpq_get_latch_status(ctrl, slot);
  358. hotplug_slot_info->adapter_status =
  359. get_presence_status(ctrl, slot);
  360. dbg("registering bus %d, dev %d, number %d, "
  361. "ctrl->slot_device_offset %d, slot %d\n",
  362. slot->bus, slot->device,
  363. slot->number, ctrl->slot_device_offset,
  364. slot_number);
  365. result = pci_hp_register(hotplug_slot,
  366. ctrl->pci_dev->bus,
  367. slot->device,
  368. name);
  369. if (result) {
  370. err("pci_hp_register failed with error %d\n", result);
  371. goto error_info;
  372. }
  373. slot->next = ctrl->slot;
  374. ctrl->slot = slot;
  375. number_of_slots--;
  376. slot_device++;
  377. slot_number++;
  378. }
  379. return 0;
  380. error_info:
  381. kfree(hotplug_slot_info);
  382. error_hpslot:
  383. kfree(hotplug_slot);
  384. error_slot:
  385. kfree(slot);
  386. error:
  387. return result;
  388. }
  389. static int ctrl_slot_cleanup (struct controller * ctrl)
  390. {
  391. struct slot *old_slot, *next_slot;
  392. old_slot = ctrl->slot;
  393. ctrl->slot = NULL;
  394. while (old_slot) {
  395. /* memory will be freed by the release_slot callback */
  396. next_slot = old_slot->next;
  397. pci_hp_deregister (old_slot->hotplug_slot);
  398. old_slot = next_slot;
  399. }
  400. cpqhp_remove_debugfs_files(ctrl);
  401. /* Free IRQ associated with hot plug device */
  402. free_irq(ctrl->interrupt, ctrl);
  403. /* Unmap the memory */
  404. iounmap(ctrl->hpc_reg);
  405. /* Finally reclaim PCI mem */
  406. release_mem_region(pci_resource_start(ctrl->pci_dev, 0),
  407. pci_resource_len(ctrl->pci_dev, 0));
  408. return(0);
  409. }
  410. /**
  411. * get_slot_mapping - determine logical slot mapping for PCI device
  412. *
  413. * Won't work for more than one PCI-PCI bridge in a slot.
  414. *
  415. * @bus_num - bus number of PCI device
  416. * @dev_num - device number of PCI device
  417. * @slot - Pointer to u8 where slot number will be returned
  418. *
  419. * Output: SUCCESS or FAILURE
  420. */
  421. static int
  422. get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
  423. {
  424. struct irq_routing_table *PCIIRQRoutingInfoLength;
  425. u32 work;
  426. long len;
  427. long loop;
  428. u8 tbus, tdevice, tslot, bridgeSlot;
  429. dbg("%s: %p, %d, %d, %p\n", __func__, bus, bus_num, dev_num, slot);
  430. bridgeSlot = 0xFF;
  431. PCIIRQRoutingInfoLength = pcibios_get_irq_routing_table();
  432. if (!PCIIRQRoutingInfoLength)
  433. return -1;
  434. len = (PCIIRQRoutingInfoLength->size -
  435. sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
  436. /* Make sure I got at least one entry */
  437. if (len == 0) {
  438. kfree(PCIIRQRoutingInfoLength);
  439. return -1;
  440. }
  441. for (loop = 0; loop < len; ++loop) {
  442. tbus = PCIIRQRoutingInfoLength->slots[loop].bus;
  443. tdevice = PCIIRQRoutingInfoLength->slots[loop].devfn >> 3;
  444. tslot = PCIIRQRoutingInfoLength->slots[loop].slot;
  445. if ((tbus == bus_num) && (tdevice == dev_num)) {
  446. *slot = tslot;
  447. kfree(PCIIRQRoutingInfoLength);
  448. return 0;
  449. } else {
  450. /* Did not get a match on the target PCI device. Check
  451. * if the current IRQ table entry is a PCI-to-PCI
  452. * bridge device. If so, and it's secondary bus
  453. * matches the bus number for the target device, I need
  454. * to save the bridge's slot number. If I can not find
  455. * an entry for the target device, I will have to
  456. * assume it's on the other side of the bridge, and
  457. * assign it the bridge's slot.
  458. */
  459. bus->number = tbus;
  460. pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0),
  461. PCI_CLASS_REVISION, &work);
  462. if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
  463. pci_bus_read_config_dword(bus,
  464. PCI_DEVFN(tdevice, 0),
  465. PCI_PRIMARY_BUS, &work);
  466. // See if bridge's secondary bus matches target bus.
  467. if (((work >> 8) & 0x000000FF) == (long) bus_num) {
  468. bridgeSlot = tslot;
  469. }
  470. }
  471. }
  472. }
  473. /* If we got here, we didn't find an entry in the IRQ mapping table for
  474. * the target PCI device. If we did determine that the target device
  475. * is on the other side of a PCI-to-PCI bridge, return the slot number
  476. * for the bridge.
  477. */
  478. if (bridgeSlot != 0xFF) {
  479. *slot = bridgeSlot;
  480. kfree(PCIIRQRoutingInfoLength);
  481. return 0;
  482. }
  483. kfree(PCIIRQRoutingInfoLength);
  484. /* Couldn't find an entry in the routing table for this PCI device */
  485. return -1;
  486. }
  487. /**
  488. * cpqhp_set_attention_status - Turns the Amber LED for a slot on or off
  489. * @ctrl: struct controller to use
  490. * @func: PCI device/function info
  491. * @status: LED control flag: 1 = LED on, 0 = LED off
  492. */
  493. static int
  494. cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func,
  495. u32 status)
  496. {
  497. u8 hp_slot;
  498. if (func == NULL)
  499. return(1);
  500. hp_slot = func->device - ctrl->slot_device_offset;
  501. /* Wait for exclusive access to hardware */
  502. mutex_lock(&ctrl->crit_sect);
  503. if (status == 1) {
  504. amber_LED_on (ctrl, hp_slot);
  505. } else if (status == 0) {
  506. amber_LED_off (ctrl, hp_slot);
  507. } else {
  508. /* Done with exclusive hardware access */
  509. mutex_unlock(&ctrl->crit_sect);
  510. return(1);
  511. }
  512. set_SOGO(ctrl);
  513. /* Wait for SOBS to be unset */
  514. wait_for_ctrl_irq (ctrl);
  515. /* Done with exclusive hardware access */
  516. mutex_unlock(&ctrl->crit_sect);
  517. return(0);
  518. }
  519. /**
  520. * set_attention_status - Turns the Amber LED for a slot on or off
  521. * @hotplug_slot: slot to change LED on
  522. * @status: LED control flag
  523. */
  524. static int set_attention_status (struct hotplug_slot *hotplug_slot, u8 status)
  525. {
  526. struct pci_func *slot_func;
  527. struct slot *slot = hotplug_slot->private;
  528. struct controller *ctrl = slot->ctrl;
  529. u8 bus;
  530. u8 devfn;
  531. u8 device;
  532. u8 function;
  533. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  534. if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
  535. return -ENODEV;
  536. device = devfn >> 3;
  537. function = devfn & 0x7;
  538. dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
  539. slot_func = cpqhp_slot_find(bus, device, function);
  540. if (!slot_func)
  541. return -ENODEV;
  542. return cpqhp_set_attention_status(ctrl, slot_func, status);
  543. }
  544. static int process_SI(struct hotplug_slot *hotplug_slot)
  545. {
  546. struct pci_func *slot_func;
  547. struct slot *slot = hotplug_slot->private;
  548. struct controller *ctrl = slot->ctrl;
  549. u8 bus;
  550. u8 devfn;
  551. u8 device;
  552. u8 function;
  553. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  554. if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
  555. return -ENODEV;
  556. device = devfn >> 3;
  557. function = devfn & 0x7;
  558. dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
  559. slot_func = cpqhp_slot_find(bus, device, function);
  560. if (!slot_func)
  561. return -ENODEV;
  562. slot_func->bus = bus;
  563. slot_func->device = device;
  564. slot_func->function = function;
  565. slot_func->configured = 0;
  566. dbg("board_added(%p, %p)\n", slot_func, ctrl);
  567. return cpqhp_process_SI(ctrl, slot_func);
  568. }
  569. static int process_SS(struct hotplug_slot *hotplug_slot)
  570. {
  571. struct pci_func *slot_func;
  572. struct slot *slot = hotplug_slot->private;
  573. struct controller *ctrl = slot->ctrl;
  574. u8 bus;
  575. u8 devfn;
  576. u8 device;
  577. u8 function;
  578. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  579. if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
  580. return -ENODEV;
  581. device = devfn >> 3;
  582. function = devfn & 0x7;
  583. dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
  584. slot_func = cpqhp_slot_find(bus, device, function);
  585. if (!slot_func)
  586. return -ENODEV;
  587. dbg("In %s, slot_func = %p, ctrl = %p\n", __func__, slot_func, ctrl);
  588. return cpqhp_process_SS(ctrl, slot_func);
  589. }
  590. static int hardware_test(struct hotplug_slot *hotplug_slot, u32 value)
  591. {
  592. struct slot *slot = hotplug_slot->private;
  593. struct controller *ctrl = slot->ctrl;
  594. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  595. return cpqhp_hardware_test(ctrl, value);
  596. }
  597. static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value)
  598. {
  599. struct slot *slot = hotplug_slot->private;
  600. struct controller *ctrl = slot->ctrl;
  601. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  602. *value = get_slot_enabled(ctrl, slot);
  603. return 0;
  604. }
  605. static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value)
  606. {
  607. struct slot *slot = hotplug_slot->private;
  608. struct controller *ctrl = slot->ctrl;
  609. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  610. *value = cpq_get_attention_status(ctrl, slot);
  611. return 0;
  612. }
  613. static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value)
  614. {
  615. struct slot *slot = hotplug_slot->private;
  616. struct controller *ctrl = slot->ctrl;
  617. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  618. *value = cpq_get_latch_status(ctrl, slot);
  619. return 0;
  620. }
  621. static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value)
  622. {
  623. struct slot *slot = hotplug_slot->private;
  624. struct controller *ctrl = slot->ctrl;
  625. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  626. *value = get_presence_status(ctrl, slot);
  627. return 0;
  628. }
  629. static int get_max_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
  630. {
  631. struct slot *slot = hotplug_slot->private;
  632. struct controller *ctrl = slot->ctrl;
  633. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  634. *value = ctrl->speed_capability;
  635. return 0;
  636. }
  637. static int get_cur_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
  638. {
  639. struct slot *slot = hotplug_slot->private;
  640. struct controller *ctrl = slot->ctrl;
  641. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  642. *value = ctrl->speed;
  643. return 0;
  644. }
  645. static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  646. {
  647. u8 num_of_slots = 0;
  648. u8 hp_slot = 0;
  649. u8 device;
  650. u8 bus_cap;
  651. u16 temp_word;
  652. u16 vendor_id;
  653. u16 subsystem_vid;
  654. u16 subsystem_deviceid;
  655. u32 rc;
  656. struct controller *ctrl;
  657. struct pci_func *func;
  658. int err;
  659. err = pci_enable_device(pdev);
  660. if (err) {
  661. printk(KERN_ERR MY_NAME ": cannot enable PCI device %s (%d)\n",
  662. pci_name(pdev), err);
  663. return err;
  664. }
  665. /* Need to read VID early b/c it's used to differentiate CPQ and INTC
  666. * discovery
  667. */
  668. rc = pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor_id);
  669. if (rc || ((vendor_id != PCI_VENDOR_ID_COMPAQ) && (vendor_id != PCI_VENDOR_ID_INTEL))) {
  670. err(msg_HPC_non_compaq_or_intel);
  671. rc = -ENODEV;
  672. goto err_disable_device;
  673. }
  674. dbg("Vendor ID: %x\n", vendor_id);
  675. dbg("revision: %d\n", pdev->revision);
  676. if ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!pdev->revision)) {
  677. err(msg_HPC_rev_error);
  678. rc = -ENODEV;
  679. goto err_disable_device;
  680. }
  681. /* Check for the proper subsytem ID's
  682. * Intel uses a different SSID programming model than Compaq.
  683. * For Intel, each SSID bit identifies a PHP capability.
  684. * Also Intel HPC's may have RID=0.
  685. */
  686. if ((pdev->revision > 2) || (vendor_id == PCI_VENDOR_ID_INTEL)) {
  687. /* TODO: This code can be made to support non-Compaq or Intel
  688. * subsystem IDs
  689. */
  690. rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vid);
  691. if (rc) {
  692. err("%s : pci_read_config_word failed\n", __func__);
  693. goto err_disable_device;
  694. }
  695. dbg("Subsystem Vendor ID: %x\n", subsystem_vid);
  696. if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) {
  697. err(msg_HPC_non_compaq_or_intel);
  698. rc = -ENODEV;
  699. goto err_disable_device;
  700. }
  701. ctrl = kzalloc(sizeof(struct controller), GFP_KERNEL);
  702. if (!ctrl) {
  703. err("%s : out of memory\n", __func__);
  704. rc = -ENOMEM;
  705. goto err_disable_device;
  706. }
  707. rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &subsystem_deviceid);
  708. if (rc) {
  709. err("%s : pci_read_config_word failed\n", __func__);
  710. goto err_free_ctrl;
  711. }
  712. info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid);
  713. /* Set Vendor ID, so it can be accessed later from other
  714. * functions
  715. */
  716. ctrl->vendor_id = vendor_id;
  717. switch (subsystem_vid) {
  718. case PCI_VENDOR_ID_COMPAQ:
  719. if (pdev->revision >= 0x13) { /* CIOBX */
  720. ctrl->push_flag = 1;
  721. ctrl->slot_switch_type = 1;
  722. ctrl->push_button = 1;
  723. ctrl->pci_config_space = 1;
  724. ctrl->defeature_PHP = 1;
  725. ctrl->pcix_support = 1;
  726. ctrl->pcix_speed_capability = 1;
  727. pci_read_config_byte(pdev, 0x41, &bus_cap);
  728. if (bus_cap & 0x80) {
  729. dbg("bus max supports 133MHz PCI-X\n");
  730. ctrl->speed_capability = PCI_SPEED_133MHz_PCIX;
  731. break;
  732. }
  733. if (bus_cap & 0x40) {
  734. dbg("bus max supports 100MHz PCI-X\n");
  735. ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
  736. break;
  737. }
  738. if (bus_cap & 20) {
  739. dbg("bus max supports 66MHz PCI-X\n");
  740. ctrl->speed_capability = PCI_SPEED_66MHz_PCIX;
  741. break;
  742. }
  743. if (bus_cap & 10) {
  744. dbg("bus max supports 66MHz PCI\n");
  745. ctrl->speed_capability = PCI_SPEED_66MHz;
  746. break;
  747. }
  748. break;
  749. }
  750. switch (subsystem_deviceid) {
  751. case PCI_SUB_HPC_ID:
  752. /* Original 6500/7000 implementation */
  753. ctrl->slot_switch_type = 1;
  754. ctrl->speed_capability = PCI_SPEED_33MHz;
  755. ctrl->push_button = 0;
  756. ctrl->pci_config_space = 1;
  757. ctrl->defeature_PHP = 1;
  758. ctrl->pcix_support = 0;
  759. ctrl->pcix_speed_capability = 0;
  760. break;
  761. case PCI_SUB_HPC_ID2:
  762. /* First Pushbutton implementation */
  763. ctrl->push_flag = 1;
  764. ctrl->slot_switch_type = 1;
  765. ctrl->speed_capability = PCI_SPEED_33MHz;
  766. ctrl->push_button = 1;
  767. ctrl->pci_config_space = 1;
  768. ctrl->defeature_PHP = 1;
  769. ctrl->pcix_support = 0;
  770. ctrl->pcix_speed_capability = 0;
  771. break;
  772. case PCI_SUB_HPC_ID_INTC:
  773. /* Third party (6500/7000) */
  774. ctrl->slot_switch_type = 1;
  775. ctrl->speed_capability = PCI_SPEED_33MHz;
  776. ctrl->push_button = 0;
  777. ctrl->pci_config_space = 1;
  778. ctrl->defeature_PHP = 1;
  779. ctrl->pcix_support = 0;
  780. ctrl->pcix_speed_capability = 0;
  781. break;
  782. case PCI_SUB_HPC_ID3:
  783. /* First 66 Mhz implementation */
  784. ctrl->push_flag = 1;
  785. ctrl->slot_switch_type = 1;
  786. ctrl->speed_capability = PCI_SPEED_66MHz;
  787. ctrl->push_button = 1;
  788. ctrl->pci_config_space = 1;
  789. ctrl->defeature_PHP = 1;
  790. ctrl->pcix_support = 0;
  791. ctrl->pcix_speed_capability = 0;
  792. break;
  793. case PCI_SUB_HPC_ID4:
  794. /* First PCI-X implementation, 100MHz */
  795. ctrl->push_flag = 1;
  796. ctrl->slot_switch_type = 1;
  797. ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
  798. ctrl->push_button = 1;
  799. ctrl->pci_config_space = 1;
  800. ctrl->defeature_PHP = 1;
  801. ctrl->pcix_support = 1;
  802. ctrl->pcix_speed_capability = 0;
  803. break;
  804. default:
  805. err(msg_HPC_not_supported);
  806. rc = -ENODEV;
  807. goto err_free_ctrl;
  808. }
  809. break;
  810. case PCI_VENDOR_ID_INTEL:
  811. /* Check for speed capability (0=33, 1=66) */
  812. if (subsystem_deviceid & 0x0001) {
  813. ctrl->speed_capability = PCI_SPEED_66MHz;
  814. } else {
  815. ctrl->speed_capability = PCI_SPEED_33MHz;
  816. }
  817. /* Check for push button */
  818. if (subsystem_deviceid & 0x0002) {
  819. /* no push button */
  820. ctrl->push_button = 0;
  821. } else {
  822. /* push button supported */
  823. ctrl->push_button = 1;
  824. }
  825. /* Check for slot switch type (0=mechanical, 1=not mechanical) */
  826. if (subsystem_deviceid & 0x0004) {
  827. /* no switch */
  828. ctrl->slot_switch_type = 0;
  829. } else {
  830. /* switch */
  831. ctrl->slot_switch_type = 1;
  832. }
  833. /* PHP Status (0=De-feature PHP, 1=Normal operation) */
  834. if (subsystem_deviceid & 0x0008) {
  835. ctrl->defeature_PHP = 1; /* PHP supported */
  836. } else {
  837. ctrl->defeature_PHP = 0; /* PHP not supported */
  838. }
  839. /* Alternate Base Address Register Interface (0=not supported, 1=supported) */
  840. if (subsystem_deviceid & 0x0010) {
  841. ctrl->alternate_base_address = 1; /* supported */
  842. } else {
  843. ctrl->alternate_base_address = 0; /* not supported */
  844. }
  845. /* PCI Config Space Index (0=not supported, 1=supported) */
  846. if (subsystem_deviceid & 0x0020) {
  847. ctrl->pci_config_space = 1; /* supported */
  848. } else {
  849. ctrl->pci_config_space = 0; /* not supported */
  850. }
  851. /* PCI-X support */
  852. if (subsystem_deviceid & 0x0080) {
  853. /* PCI-X capable */
  854. ctrl->pcix_support = 1;
  855. /* Frequency of operation in PCI-X mode */
  856. if (subsystem_deviceid & 0x0040) {
  857. /* 133MHz PCI-X if bit 7 is 1 */
  858. ctrl->pcix_speed_capability = 1;
  859. } else {
  860. /* 100MHz PCI-X if bit 7 is 1 and bit 0 is 0, */
  861. /* 66MHz PCI-X if bit 7 is 1 and bit 0 is 1 */
  862. ctrl->pcix_speed_capability = 0;
  863. }
  864. } else {
  865. /* Conventional PCI */
  866. ctrl->pcix_support = 0;
  867. ctrl->pcix_speed_capability = 0;
  868. }
  869. break;
  870. default:
  871. err(msg_HPC_not_supported);
  872. rc = -ENODEV;
  873. goto err_free_ctrl;
  874. }
  875. } else {
  876. err(msg_HPC_not_supported);
  877. return -ENODEV;
  878. }
  879. /* Tell the user that we found one. */
  880. info("Initializing the PCI hot plug controller residing on PCI bus %d\n",
  881. pdev->bus->number);
  882. dbg("Hotplug controller capabilities:\n");
  883. dbg(" speed_capability %d\n", ctrl->speed_capability);
  884. dbg(" slot_switch_type %s\n", ctrl->slot_switch_type ?
  885. "switch present" : "no switch");
  886. dbg(" defeature_PHP %s\n", ctrl->defeature_PHP ?
  887. "PHP supported" : "PHP not supported");
  888. dbg(" alternate_base_address %s\n", ctrl->alternate_base_address ?
  889. "supported" : "not supported");
  890. dbg(" pci_config_space %s\n", ctrl->pci_config_space ?
  891. "supported" : "not supported");
  892. dbg(" pcix_speed_capability %s\n", ctrl->pcix_speed_capability ?
  893. "supported" : "not supported");
  894. dbg(" pcix_support %s\n", ctrl->pcix_support ?
  895. "supported" : "not supported");
  896. ctrl->pci_dev = pdev;
  897. pci_set_drvdata(pdev, ctrl);
  898. /* make our own copy of the pci bus structure,
  899. * as we like tweaking it a lot */
  900. ctrl->pci_bus = kmalloc(sizeof(*ctrl->pci_bus), GFP_KERNEL);
  901. if (!ctrl->pci_bus) {
  902. err("out of memory\n");
  903. rc = -ENOMEM;
  904. goto err_free_ctrl;
  905. }
  906. memcpy(ctrl->pci_bus, pdev->bus, sizeof(*ctrl->pci_bus));
  907. ctrl->bus = pdev->bus->number;
  908. ctrl->rev = pdev->revision;
  909. dbg("bus device function rev: %d %d %d %d\n", ctrl->bus,
  910. PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev);
  911. mutex_init(&ctrl->crit_sect);
  912. init_waitqueue_head(&ctrl->queue);
  913. /* initialize our threads if they haven't already been started up */
  914. rc = one_time_init();
  915. if (rc) {
  916. goto err_free_bus;
  917. }
  918. dbg("pdev = %p\n", pdev);
  919. dbg("pci resource start %llx\n", (unsigned long long)pci_resource_start(pdev, 0));
  920. dbg("pci resource len %llx\n", (unsigned long long)pci_resource_len(pdev, 0));
  921. if (!request_mem_region(pci_resource_start(pdev, 0),
  922. pci_resource_len(pdev, 0), MY_NAME)) {
  923. err("cannot reserve MMIO region\n");
  924. rc = -ENOMEM;
  925. goto err_free_bus;
  926. }
  927. ctrl->hpc_reg = ioremap(pci_resource_start(pdev, 0),
  928. pci_resource_len(pdev, 0));
  929. if (!ctrl->hpc_reg) {
  930. err("cannot remap MMIO region %llx @ %llx\n",
  931. (unsigned long long)pci_resource_len(pdev, 0),
  932. (unsigned long long)pci_resource_start(pdev, 0));
  933. rc = -ENODEV;
  934. goto err_free_mem_region;
  935. }
  936. // Check for 66Mhz operation
  937. ctrl->speed = get_controller_speed(ctrl);
  938. /********************************************************
  939. *
  940. * Save configuration headers for this and
  941. * subordinate PCI buses
  942. *
  943. ********************************************************/
  944. /* find the physical slot number of the first hot plug slot */
  945. /* Get slot won't work for devices behind bridges, but
  946. * in this case it will always be called for the "base"
  947. * bus/dev/func of a slot.
  948. * CS: this is leveraging the PCIIRQ routing code from the kernel
  949. * (pci-pc.c: get_irq_routing_table) */
  950. rc = get_slot_mapping(ctrl->pci_bus, pdev->bus->number,
  951. (readb(ctrl->hpc_reg + SLOT_MASK) >> 4),
  952. &(ctrl->first_slot));
  953. dbg("get_slot_mapping: first_slot = %d, returned = %d\n",
  954. ctrl->first_slot, rc);
  955. if (rc) {
  956. err(msg_initialization_err, rc);
  957. goto err_iounmap;
  958. }
  959. /* Store PCI Config Space for all devices on this bus */
  960. rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK));
  961. if (rc) {
  962. err("%s: unable to save PCI configuration data, error %d\n",
  963. __func__, rc);
  964. goto err_iounmap;
  965. }
  966. /*
  967. * Get IO, memory, and IRQ resources for new devices
  968. */
  969. /* The next line is required for cpqhp_find_available_resources */
  970. ctrl->interrupt = pdev->irq;
  971. if (ctrl->interrupt < 0x10) {
  972. cpqhp_legacy_mode = 1;
  973. dbg("System seems to be configured for Full Table Mapped MPS mode\n");
  974. }
  975. ctrl->cfgspc_irq = 0;
  976. pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ctrl->cfgspc_irq);
  977. rc = cpqhp_find_available_resources(ctrl, cpqhp_rom_start);
  978. ctrl->add_support = !rc;
  979. if (rc) {
  980. dbg("cpqhp_find_available_resources = 0x%x\n", rc);
  981. err("unable to locate PCI configuration resources for hot plug add.\n");
  982. goto err_iounmap;
  983. }
  984. /*
  985. * Finish setting up the hot plug ctrl device
  986. */
  987. ctrl->slot_device_offset = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
  988. dbg("NumSlots %d \n", ctrl->slot_device_offset);
  989. ctrl->next_event = 0;
  990. /* Setup the slot information structures */
  991. rc = ctrl_slot_setup(ctrl, smbios_start, smbios_table);
  992. if (rc) {
  993. err(msg_initialization_err, 6);
  994. err("%s: unable to save PCI configuration data, error %d\n",
  995. __func__, rc);
  996. goto err_iounmap;
  997. }
  998. /* Mask all general input interrupts */
  999. writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK);
  1000. /* set up the interrupt */
  1001. dbg("HPC interrupt = %d \n", ctrl->interrupt);
  1002. if (request_irq(ctrl->interrupt, cpqhp_ctrl_intr,
  1003. IRQF_SHARED, MY_NAME, ctrl)) {
  1004. err("Can't get irq %d for the hotplug pci controller\n",
  1005. ctrl->interrupt);
  1006. rc = -ENODEV;
  1007. goto err_iounmap;
  1008. }
  1009. /* Enable Shift Out interrupt and clear it, also enable SERR on power
  1010. * fault
  1011. */
  1012. temp_word = readw(ctrl->hpc_reg + MISC);
  1013. temp_word |= 0x4006;
  1014. writew(temp_word, ctrl->hpc_reg + MISC);
  1015. /* Changed 05/05/97 to clear all interrupts at start */
  1016. writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR);
  1017. ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
  1018. writel(0x0L, ctrl->hpc_reg + INT_MASK);
  1019. if (!cpqhp_ctrl_list) {
  1020. cpqhp_ctrl_list = ctrl;
  1021. ctrl->next = NULL;
  1022. } else {
  1023. ctrl->next = cpqhp_ctrl_list;
  1024. cpqhp_ctrl_list = ctrl;
  1025. }
  1026. /* turn off empty slots here unless command line option "ON" set
  1027. * Wait for exclusive access to hardware
  1028. */
  1029. mutex_lock(&ctrl->crit_sect);
  1030. num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
  1031. /* find first device number for the ctrl */
  1032. device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
  1033. while (num_of_slots) {
  1034. dbg("num_of_slots: %d\n", num_of_slots);
  1035. func = cpqhp_slot_find(ctrl->bus, device, 0);
  1036. if (!func)
  1037. break;
  1038. hp_slot = func->device - ctrl->slot_device_offset;
  1039. dbg("hp_slot: %d\n", hp_slot);
  1040. /* We have to save the presence info for these slots */
  1041. temp_word = ctrl->ctrl_int_comp >> 16;
  1042. func->presence_save = (temp_word >> hp_slot) & 0x01;
  1043. func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
  1044. if (ctrl->ctrl_int_comp & (0x1L << hp_slot)) {
  1045. func->switch_save = 0;
  1046. } else {
  1047. func->switch_save = 0x10;
  1048. }
  1049. if (!power_mode) {
  1050. if (!func->is_a_board) {
  1051. green_LED_off(ctrl, hp_slot);
  1052. slot_disable(ctrl, hp_slot);
  1053. }
  1054. }
  1055. device++;
  1056. num_of_slots--;
  1057. }
  1058. if (!power_mode) {
  1059. set_SOGO(ctrl);
  1060. /* Wait for SOBS to be unset */
  1061. wait_for_ctrl_irq(ctrl);
  1062. }
  1063. rc = init_SERR(ctrl);
  1064. if (rc) {
  1065. err("init_SERR failed\n");
  1066. mutex_unlock(&ctrl->crit_sect);
  1067. goto err_free_irq;
  1068. }
  1069. /* Done with exclusive hardware access */
  1070. mutex_unlock(&ctrl->crit_sect);
  1071. cpqhp_create_debugfs_files(ctrl);
  1072. return 0;
  1073. err_free_irq:
  1074. free_irq(ctrl->interrupt, ctrl);
  1075. err_iounmap:
  1076. iounmap(ctrl->hpc_reg);
  1077. err_free_mem_region:
  1078. release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
  1079. err_free_bus:
  1080. kfree(ctrl->pci_bus);
  1081. err_free_ctrl:
  1082. kfree(ctrl);
  1083. err_disable_device:
  1084. pci_disable_device(pdev);
  1085. return rc;
  1086. }
  1087. static int one_time_init(void)
  1088. {
  1089. int loop;
  1090. int retval = 0;
  1091. if (initialized)
  1092. return 0;
  1093. power_mode = 0;
  1094. retval = pci_print_IRQ_route();
  1095. if (retval)
  1096. goto error;
  1097. dbg("Initialize + Start the notification mechanism \n");
  1098. retval = cpqhp_event_start_thread();
  1099. if (retval)
  1100. goto error;
  1101. dbg("Initialize slot lists\n");
  1102. for (loop = 0; loop < 256; loop++) {
  1103. cpqhp_slot_list[loop] = NULL;
  1104. }
  1105. /* FIXME: We also need to hook the NMI handler eventually.
  1106. * this also needs to be worked with Christoph
  1107. * register_NMI_handler();
  1108. */
  1109. /* Map rom address */
  1110. cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
  1111. if (!cpqhp_rom_start) {
  1112. err ("Could not ioremap memory region for ROM\n");
  1113. retval = -EIO;
  1114. goto error;
  1115. }
  1116. /* Now, map the int15 entry point if we are on compaq specific
  1117. * hardware
  1118. */
  1119. compaq_nvram_init(cpqhp_rom_start);
  1120. /* Map smbios table entry point structure */
  1121. smbios_table = detect_SMBIOS_pointer(cpqhp_rom_start,
  1122. cpqhp_rom_start + ROM_PHY_LEN);
  1123. if (!smbios_table) {
  1124. err ("Could not find the SMBIOS pointer in memory\n");
  1125. retval = -EIO;
  1126. goto error_rom_start;
  1127. }
  1128. smbios_start = ioremap(readl(smbios_table + ST_ADDRESS),
  1129. readw(smbios_table + ST_LENGTH));
  1130. if (!smbios_start) {
  1131. err ("Could not ioremap memory region taken from SMBIOS values\n");
  1132. retval = -EIO;
  1133. goto error_smbios_start;
  1134. }
  1135. initialized = 1;
  1136. return retval;
  1137. error_smbios_start:
  1138. iounmap(smbios_start);
  1139. error_rom_start:
  1140. iounmap(cpqhp_rom_start);
  1141. error:
  1142. return retval;
  1143. }
  1144. static void __exit unload_cpqphpd(void)
  1145. {
  1146. struct pci_func *next;
  1147. struct pci_func *TempSlot;
  1148. int loop;
  1149. u32 rc;
  1150. struct controller *ctrl;
  1151. struct controller *tctrl;
  1152. struct pci_resource *res;
  1153. struct pci_resource *tres;
  1154. rc = compaq_nvram_store(cpqhp_rom_start);
  1155. ctrl = cpqhp_ctrl_list;
  1156. while (ctrl) {
  1157. if (ctrl->hpc_reg) {
  1158. u16 misc;
  1159. rc = read_slot_enable (ctrl);
  1160. writeb(0, ctrl->hpc_reg + SLOT_SERR);
  1161. writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK);
  1162. misc = readw(ctrl->hpc_reg + MISC);
  1163. misc &= 0xFFFD;
  1164. writew(misc, ctrl->hpc_reg + MISC);
  1165. }
  1166. ctrl_slot_cleanup(ctrl);
  1167. res = ctrl->io_head;
  1168. while (res) {
  1169. tres = res;
  1170. res = res->next;
  1171. kfree(tres);
  1172. }
  1173. res = ctrl->mem_head;
  1174. while (res) {
  1175. tres = res;
  1176. res = res->next;
  1177. kfree(tres);
  1178. }
  1179. res = ctrl->p_mem_head;
  1180. while (res) {
  1181. tres = res;
  1182. res = res->next;
  1183. kfree(tres);
  1184. }
  1185. res = ctrl->bus_head;
  1186. while (res) {
  1187. tres = res;
  1188. res = res->next;
  1189. kfree(tres);
  1190. }
  1191. kfree (ctrl->pci_bus);
  1192. tctrl = ctrl;
  1193. ctrl = ctrl->next;
  1194. kfree(tctrl);
  1195. }
  1196. for (loop = 0; loop < 256; loop++) {
  1197. next = cpqhp_slot_list[loop];
  1198. while (next != NULL) {
  1199. res = next->io_head;
  1200. while (res) {
  1201. tres = res;
  1202. res = res->next;
  1203. kfree(tres);
  1204. }
  1205. res = next->mem_head;
  1206. while (res) {
  1207. tres = res;
  1208. res = res->next;
  1209. kfree(tres);
  1210. }
  1211. res = next->p_mem_head;
  1212. while (res) {
  1213. tres = res;
  1214. res = res->next;
  1215. kfree(tres);
  1216. }
  1217. res = next->bus_head;
  1218. while (res) {
  1219. tres = res;
  1220. res = res->next;
  1221. kfree(tres);
  1222. }
  1223. TempSlot = next;
  1224. next = next->next;
  1225. kfree(TempSlot);
  1226. }
  1227. }
  1228. /* Stop the notification mechanism */
  1229. if (initialized)
  1230. cpqhp_event_stop_thread();
  1231. /* unmap the rom address */
  1232. if (cpqhp_rom_start)
  1233. iounmap(cpqhp_rom_start);
  1234. if (smbios_start)
  1235. iounmap(smbios_start);
  1236. }
  1237. static struct pci_device_id hpcd_pci_tbl[] = {
  1238. {
  1239. /* handle any PCI Hotplug controller */
  1240. .class = ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00),
  1241. .class_mask = ~0,
  1242. /* no matter who makes it */
  1243. .vendor = PCI_ANY_ID,
  1244. .device = PCI_ANY_ID,
  1245. .subvendor = PCI_ANY_ID,
  1246. .subdevice = PCI_ANY_ID,
  1247. }, { /* end: all zeroes */ }
  1248. };
  1249. MODULE_DEVICE_TABLE(pci, hpcd_pci_tbl);
  1250. static struct pci_driver cpqhpc_driver = {
  1251. .name = "compaq_pci_hotplug",
  1252. .id_table = hpcd_pci_tbl,
  1253. .probe = cpqhpc_probe,
  1254. /* remove: cpqhpc_remove_one, */
  1255. };
  1256. static int __init cpqhpc_init(void)
  1257. {
  1258. int result;
  1259. cpqhp_debug = debug;
  1260. info (DRIVER_DESC " version: " DRIVER_VERSION "\n");
  1261. cpqhp_initialize_debugfs();
  1262. result = pci_register_driver(&cpqhpc_driver);
  1263. dbg("pci_register_driver = %d\n", result);
  1264. return result;
  1265. }
  1266. static void __exit cpqhpc_cleanup(void)
  1267. {
  1268. dbg("unload_cpqphpd()\n");
  1269. unload_cpqphpd();
  1270. dbg("pci_unregister_driver\n");
  1271. pci_unregister_driver(&cpqhpc_driver);
  1272. cpqhp_shutdown_debugfs();
  1273. }
  1274. module_init(cpqhpc_init);
  1275. module_exit(cpqhpc_cleanup);