omap_hwmod.c 94 KB

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  1. /*
  2. * omap_hwmod implementation for OMAP2/3/4
  3. *
  4. * Copyright (C) 2009-2011 Nokia Corporation
  5. * Copyright (C) 2011-2012 Texas Instruments, Inc.
  6. *
  7. * Paul Walmsley, Benoît Cousson, Kevin Hilman
  8. *
  9. * Created in collaboration with (alphabetical order): Thara Gopinath,
  10. * Tony Lindgren, Rajendra Nayak, Vikram Pandita, Sakari Poussa, Anand
  11. * Sawant, Santosh Shilimkar, Richard Woodruff
  12. *
  13. * This program is free software; you can redistribute it and/or modify
  14. * it under the terms of the GNU General Public License version 2 as
  15. * published by the Free Software Foundation.
  16. *
  17. * Introduction
  18. * ------------
  19. * One way to view an OMAP SoC is as a collection of largely unrelated
  20. * IP blocks connected by interconnects. The IP blocks include
  21. * devices such as ARM processors, audio serial interfaces, UARTs,
  22. * etc. Some of these devices, like the DSP, are created by TI;
  23. * others, like the SGX, largely originate from external vendors. In
  24. * TI's documentation, on-chip devices are referred to as "OMAP
  25. * modules." Some of these IP blocks are identical across several
  26. * OMAP versions. Others are revised frequently.
  27. *
  28. * These OMAP modules are tied together by various interconnects.
  29. * Most of the address and data flow between modules is via OCP-based
  30. * interconnects such as the L3 and L4 buses; but there are other
  31. * interconnects that distribute the hardware clock tree, handle idle
  32. * and reset signaling, supply power, and connect the modules to
  33. * various pads or balls on the OMAP package.
  34. *
  35. * OMAP hwmod provides a consistent way to describe the on-chip
  36. * hardware blocks and their integration into the rest of the chip.
  37. * This description can be automatically generated from the TI
  38. * hardware database. OMAP hwmod provides a standard, consistent API
  39. * to reset, enable, idle, and disable these hardware blocks. And
  40. * hwmod provides a way for other core code, such as the Linux device
  41. * code or the OMAP power management and address space mapping code,
  42. * to query the hardware database.
  43. *
  44. * Using hwmod
  45. * -----------
  46. * Drivers won't call hwmod functions directly. That is done by the
  47. * omap_device code, and in rare occasions, by custom integration code
  48. * in arch/arm/ *omap*. The omap_device code includes functions to
  49. * build a struct platform_device using omap_hwmod data, and that is
  50. * currently how hwmod data is communicated to drivers and to the
  51. * Linux driver model. Most drivers will call omap_hwmod functions only
  52. * indirectly, via pm_runtime*() functions.
  53. *
  54. * From a layering perspective, here is where the OMAP hwmod code
  55. * fits into the kernel software stack:
  56. *
  57. * +-------------------------------+
  58. * | Device driver code |
  59. * | (e.g., drivers/) |
  60. * +-------------------------------+
  61. * | Linux driver model |
  62. * | (platform_device / |
  63. * | platform_driver data/code) |
  64. * +-------------------------------+
  65. * | OMAP core-driver integration |
  66. * |(arch/arm/mach-omap2/devices.c)|
  67. * +-------------------------------+
  68. * | omap_device code |
  69. * | (../plat-omap/omap_device.c) |
  70. * +-------------------------------+
  71. * ----> | omap_hwmod code/data | <-----
  72. * | (../mach-omap2/omap_hwmod*) |
  73. * +-------------------------------+
  74. * | OMAP clock/PRCM/register fns |
  75. * | (__raw_{read,write}l, clk*) |
  76. * +-------------------------------+
  77. *
  78. * Device drivers should not contain any OMAP-specific code or data in
  79. * them. They should only contain code to operate the IP block that
  80. * the driver is responsible for. This is because these IP blocks can
  81. * also appear in other SoCs, either from TI (such as DaVinci) or from
  82. * other manufacturers; and drivers should be reusable across other
  83. * platforms.
  84. *
  85. * The OMAP hwmod code also will attempt to reset and idle all on-chip
  86. * devices upon boot. The goal here is for the kernel to be
  87. * completely self-reliant and independent from bootloaders. This is
  88. * to ensure a repeatable configuration, both to ensure consistent
  89. * runtime behavior, and to make it easier for others to reproduce
  90. * bugs.
  91. *
  92. * OMAP module activity states
  93. * ---------------------------
  94. * The hwmod code considers modules to be in one of several activity
  95. * states. IP blocks start out in an UNKNOWN state, then once they
  96. * are registered via the hwmod code, proceed to the REGISTERED state.
  97. * Once their clock names are resolved to clock pointers, the module
  98. * enters the CLKS_INITED state; and finally, once the module has been
  99. * reset and the integration registers programmed, the INITIALIZED state
  100. * is entered. The hwmod code will then place the module into either
  101. * the IDLE state to save power, or in the case of a critical system
  102. * module, the ENABLED state.
  103. *
  104. * OMAP core integration code can then call omap_hwmod*() functions
  105. * directly to move the module between the IDLE, ENABLED, and DISABLED
  106. * states, as needed. This is done during both the PM idle loop, and
  107. * in the OMAP core integration code's implementation of the PM runtime
  108. * functions.
  109. *
  110. * References
  111. * ----------
  112. * This is a partial list.
  113. * - OMAP2420 Multimedia Processor Silicon Revision 2.1.1, 2.2 (SWPU064)
  114. * - OMAP2430 Multimedia Device POP Silicon Revision 2.1 (SWPU090)
  115. * - OMAP34xx Multimedia Device Silicon Revision 3.1 (SWPU108)
  116. * - OMAP4430 Multimedia Device Silicon Revision 1.0 (SWPU140)
  117. * - Open Core Protocol Specification 2.2
  118. *
  119. * To do:
  120. * - handle IO mapping
  121. * - bus throughput & module latency measurement code
  122. *
  123. * XXX add tests at the beginning of each function to ensure the hwmod is
  124. * in the appropriate state
  125. * XXX error return values should be checked to ensure that they are
  126. * appropriate
  127. */
  128. #undef DEBUG
  129. #include <linux/kernel.h>
  130. #include <linux/errno.h>
  131. #include <linux/io.h>
  132. #include <linux/clk.h>
  133. #include <linux/delay.h>
  134. #include <linux/err.h>
  135. #include <linux/list.h>
  136. #include <linux/mutex.h>
  137. #include <linux/spinlock.h>
  138. #include <linux/slab.h>
  139. #include <linux/bootmem.h>
  140. #include "common.h"
  141. #include <plat/cpu.h>
  142. #include "clockdomain.h"
  143. #include "powerdomain.h"
  144. #include <plat/clock.h>
  145. #include <plat/omap_hwmod.h>
  146. #include <plat/prcm.h>
  147. #include "cm2xxx_3xxx.h"
  148. #include "cminst44xx.h"
  149. #include "prm2xxx_3xxx.h"
  150. #include "prm44xx.h"
  151. #include "prminst44xx.h"
  152. #include "mux.h"
  153. /* Maximum microseconds to wait for OMAP module to softreset */
  154. #define MAX_MODULE_SOFTRESET_WAIT 10000
  155. /* Name of the OMAP hwmod for the MPU */
  156. #define MPU_INITIATOR_NAME "mpu"
  157. /*
  158. * Number of struct omap_hwmod_link records per struct
  159. * omap_hwmod_ocp_if record (master->slave and slave->master)
  160. */
  161. #define LINKS_PER_OCP_IF 2
  162. /* omap_hwmod_list contains all registered struct omap_hwmods */
  163. static LIST_HEAD(omap_hwmod_list);
  164. /* mpu_oh: used to add/remove MPU initiator from sleepdep list */
  165. static struct omap_hwmod *mpu_oh;
  166. /*
  167. * linkspace: ptr to a buffer that struct omap_hwmod_link records are
  168. * allocated from - used to reduce the number of small memory
  169. * allocations, which has a significant impact on performance
  170. */
  171. static struct omap_hwmod_link *linkspace;
  172. /*
  173. * free_ls, max_ls: array indexes into linkspace; representing the
  174. * next free struct omap_hwmod_link index, and the maximum number of
  175. * struct omap_hwmod_link records allocated (respectively)
  176. */
  177. static unsigned short free_ls, max_ls, ls_supp;
  178. /* Private functions */
  179. /**
  180. * _fetch_next_ocp_if - return the next OCP interface in a list
  181. * @p: ptr to a ptr to the list_head inside the ocp_if to return
  182. * @i: pointer to the index of the element pointed to by @p in the list
  183. *
  184. * Return a pointer to the struct omap_hwmod_ocp_if record
  185. * containing the struct list_head pointed to by @p, and increment
  186. * @p such that a future call to this routine will return the next
  187. * record.
  188. */
  189. static struct omap_hwmod_ocp_if *_fetch_next_ocp_if(struct list_head **p,
  190. int *i)
  191. {
  192. struct omap_hwmod_ocp_if *oi;
  193. oi = list_entry(*p, struct omap_hwmod_link, node)->ocp_if;
  194. *p = (*p)->next;
  195. *i = *i + 1;
  196. return oi;
  197. }
  198. /**
  199. * _update_sysc_cache - return the module OCP_SYSCONFIG register, keep copy
  200. * @oh: struct omap_hwmod *
  201. *
  202. * Load the current value of the hwmod OCP_SYSCONFIG register into the
  203. * struct omap_hwmod for later use. Returns -EINVAL if the hwmod has no
  204. * OCP_SYSCONFIG register or 0 upon success.
  205. */
  206. static int _update_sysc_cache(struct omap_hwmod *oh)
  207. {
  208. if (!oh->class->sysc) {
  209. WARN(1, "omap_hwmod: %s: cannot read OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  210. return -EINVAL;
  211. }
  212. /* XXX ensure module interface clock is up */
  213. oh->_sysc_cache = omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  214. if (!(oh->class->sysc->sysc_flags & SYSC_NO_CACHE))
  215. oh->_int_flags |= _HWMOD_SYSCONFIG_LOADED;
  216. return 0;
  217. }
  218. /**
  219. * _write_sysconfig - write a value to the module's OCP_SYSCONFIG register
  220. * @v: OCP_SYSCONFIG value to write
  221. * @oh: struct omap_hwmod *
  222. *
  223. * Write @v into the module class' OCP_SYSCONFIG register, if it has
  224. * one. No return value.
  225. */
  226. static void _write_sysconfig(u32 v, struct omap_hwmod *oh)
  227. {
  228. if (!oh->class->sysc) {
  229. WARN(1, "omap_hwmod: %s: cannot write OCP_SYSCONFIG: not defined on hwmod's class\n", oh->name);
  230. return;
  231. }
  232. /* XXX ensure module interface clock is up */
  233. /* Module might have lost context, always update cache and register */
  234. oh->_sysc_cache = v;
  235. omap_hwmod_write(v, oh, oh->class->sysc->sysc_offs);
  236. }
  237. /**
  238. * _set_master_standbymode: set the OCP_SYSCONFIG MIDLEMODE field in @v
  239. * @oh: struct omap_hwmod *
  240. * @standbymode: MIDLEMODE field bits
  241. * @v: pointer to register contents to modify
  242. *
  243. * Update the master standby mode bits in @v to be @standbymode for
  244. * the @oh hwmod. Does not write to the hardware. Returns -EINVAL
  245. * upon error or 0 upon success.
  246. */
  247. static int _set_master_standbymode(struct omap_hwmod *oh, u8 standbymode,
  248. u32 *v)
  249. {
  250. u32 mstandby_mask;
  251. u8 mstandby_shift;
  252. if (!oh->class->sysc ||
  253. !(oh->class->sysc->sysc_flags & SYSC_HAS_MIDLEMODE))
  254. return -EINVAL;
  255. if (!oh->class->sysc->sysc_fields) {
  256. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  257. return -EINVAL;
  258. }
  259. mstandby_shift = oh->class->sysc->sysc_fields->midle_shift;
  260. mstandby_mask = (0x3 << mstandby_shift);
  261. *v &= ~mstandby_mask;
  262. *v |= __ffs(standbymode) << mstandby_shift;
  263. return 0;
  264. }
  265. /**
  266. * _set_slave_idlemode: set the OCP_SYSCONFIG SIDLEMODE field in @v
  267. * @oh: struct omap_hwmod *
  268. * @idlemode: SIDLEMODE field bits
  269. * @v: pointer to register contents to modify
  270. *
  271. * Update the slave idle mode bits in @v to be @idlemode for the @oh
  272. * hwmod. Does not write to the hardware. Returns -EINVAL upon error
  273. * or 0 upon success.
  274. */
  275. static int _set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode, u32 *v)
  276. {
  277. u32 sidle_mask;
  278. u8 sidle_shift;
  279. if (!oh->class->sysc ||
  280. !(oh->class->sysc->sysc_flags & SYSC_HAS_SIDLEMODE))
  281. return -EINVAL;
  282. if (!oh->class->sysc->sysc_fields) {
  283. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  284. return -EINVAL;
  285. }
  286. sidle_shift = oh->class->sysc->sysc_fields->sidle_shift;
  287. sidle_mask = (0x3 << sidle_shift);
  288. *v &= ~sidle_mask;
  289. *v |= __ffs(idlemode) << sidle_shift;
  290. return 0;
  291. }
  292. /**
  293. * _set_clockactivity: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  294. * @oh: struct omap_hwmod *
  295. * @clockact: CLOCKACTIVITY field bits
  296. * @v: pointer to register contents to modify
  297. *
  298. * Update the clockactivity mode bits in @v to be @clockact for the
  299. * @oh hwmod. Used for additional powersaving on some modules. Does
  300. * not write to the hardware. Returns -EINVAL upon error or 0 upon
  301. * success.
  302. */
  303. static int _set_clockactivity(struct omap_hwmod *oh, u8 clockact, u32 *v)
  304. {
  305. u32 clkact_mask;
  306. u8 clkact_shift;
  307. if (!oh->class->sysc ||
  308. !(oh->class->sysc->sysc_flags & SYSC_HAS_CLOCKACTIVITY))
  309. return -EINVAL;
  310. if (!oh->class->sysc->sysc_fields) {
  311. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  312. return -EINVAL;
  313. }
  314. clkact_shift = oh->class->sysc->sysc_fields->clkact_shift;
  315. clkact_mask = (0x3 << clkact_shift);
  316. *v &= ~clkact_mask;
  317. *v |= clockact << clkact_shift;
  318. return 0;
  319. }
  320. /**
  321. * _set_softreset: set OCP_SYSCONFIG.CLOCKACTIVITY bits in @v
  322. * @oh: struct omap_hwmod *
  323. * @v: pointer to register contents to modify
  324. *
  325. * Set the SOFTRESET bit in @v for hwmod @oh. Returns -EINVAL upon
  326. * error or 0 upon success.
  327. */
  328. static int _set_softreset(struct omap_hwmod *oh, u32 *v)
  329. {
  330. u32 softrst_mask;
  331. if (!oh->class->sysc ||
  332. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  333. return -EINVAL;
  334. if (!oh->class->sysc->sysc_fields) {
  335. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  336. return -EINVAL;
  337. }
  338. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  339. *v |= softrst_mask;
  340. return 0;
  341. }
  342. /**
  343. * _set_module_autoidle: set the OCP_SYSCONFIG AUTOIDLE field in @v
  344. * @oh: struct omap_hwmod *
  345. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  346. * @v: pointer to register contents to modify
  347. *
  348. * Update the module autoidle bit in @v to be @autoidle for the @oh
  349. * hwmod. The autoidle bit controls whether the module can gate
  350. * internal clocks automatically when it isn't doing anything; the
  351. * exact function of this bit varies on a per-module basis. This
  352. * function does not write to the hardware. Returns -EINVAL upon
  353. * error or 0 upon success.
  354. */
  355. static int _set_module_autoidle(struct omap_hwmod *oh, u8 autoidle,
  356. u32 *v)
  357. {
  358. u32 autoidle_mask;
  359. u8 autoidle_shift;
  360. if (!oh->class->sysc ||
  361. !(oh->class->sysc->sysc_flags & SYSC_HAS_AUTOIDLE))
  362. return -EINVAL;
  363. if (!oh->class->sysc->sysc_fields) {
  364. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  365. return -EINVAL;
  366. }
  367. autoidle_shift = oh->class->sysc->sysc_fields->autoidle_shift;
  368. autoidle_mask = (0x1 << autoidle_shift);
  369. *v &= ~autoidle_mask;
  370. *v |= autoidle << autoidle_shift;
  371. return 0;
  372. }
  373. /**
  374. * _set_idle_ioring_wakeup - enable/disable IO pad wakeup on hwmod idle for mux
  375. * @oh: struct omap_hwmod *
  376. * @set_wake: bool value indicating to set (true) or clear (false) wakeup enable
  377. *
  378. * Set or clear the I/O pad wakeup flag in the mux entries for the
  379. * hwmod @oh. This function changes the @oh->mux->pads_dynamic array
  380. * in memory. If the hwmod is currently idled, and the new idle
  381. * values don't match the previous ones, this function will also
  382. * update the SCM PADCTRL registers. Otherwise, if the hwmod is not
  383. * currently idled, this function won't touch the hardware: the new
  384. * mux settings are written to the SCM PADCTRL registers when the
  385. * hwmod is idled. No return value.
  386. */
  387. static void _set_idle_ioring_wakeup(struct omap_hwmod *oh, bool set_wake)
  388. {
  389. struct omap_device_pad *pad;
  390. bool change = false;
  391. u16 prev_idle;
  392. int j;
  393. if (!oh->mux || !oh->mux->enabled)
  394. return;
  395. for (j = 0; j < oh->mux->nr_pads_dynamic; j++) {
  396. pad = oh->mux->pads_dynamic[j];
  397. if (!(pad->flags & OMAP_DEVICE_PAD_WAKEUP))
  398. continue;
  399. prev_idle = pad->idle;
  400. if (set_wake)
  401. pad->idle |= OMAP_WAKEUP_EN;
  402. else
  403. pad->idle &= ~OMAP_WAKEUP_EN;
  404. if (prev_idle != pad->idle)
  405. change = true;
  406. }
  407. if (change && oh->_state == _HWMOD_STATE_IDLE)
  408. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  409. }
  410. /**
  411. * _enable_wakeup: set OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  412. * @oh: struct omap_hwmod *
  413. *
  414. * Allow the hardware module @oh to send wakeups. Returns -EINVAL
  415. * upon error or 0 upon success.
  416. */
  417. static int _enable_wakeup(struct omap_hwmod *oh, u32 *v)
  418. {
  419. if (!oh->class->sysc ||
  420. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  421. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  422. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  423. return -EINVAL;
  424. if (!oh->class->sysc->sysc_fields) {
  425. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  426. return -EINVAL;
  427. }
  428. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  429. *v |= 0x1 << oh->class->sysc->sysc_fields->enwkup_shift;
  430. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  431. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  432. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  433. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  434. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  435. oh->_int_flags |= _HWMOD_WAKEUP_ENABLED;
  436. return 0;
  437. }
  438. /**
  439. * _disable_wakeup: clear OCP_SYSCONFIG.ENAWAKEUP bit in the hardware
  440. * @oh: struct omap_hwmod *
  441. *
  442. * Prevent the hardware module @oh to send wakeups. Returns -EINVAL
  443. * upon error or 0 upon success.
  444. */
  445. static int _disable_wakeup(struct omap_hwmod *oh, u32 *v)
  446. {
  447. if (!oh->class->sysc ||
  448. !((oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP) ||
  449. (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP) ||
  450. (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)))
  451. return -EINVAL;
  452. if (!oh->class->sysc->sysc_fields) {
  453. WARN(1, "omap_hwmod: %s: offset struct for sysconfig not provided in class\n", oh->name);
  454. return -EINVAL;
  455. }
  456. if (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)
  457. *v &= ~(0x1 << oh->class->sysc->sysc_fields->enwkup_shift);
  458. if (oh->class->sysc->idlemodes & SIDLE_SMART_WKUP)
  459. _set_slave_idlemode(oh, HWMOD_IDLEMODE_SMART, v);
  460. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  461. _set_master_standbymode(oh, HWMOD_IDLEMODE_SMART_WKUP, v);
  462. /* XXX test pwrdm_get_wken for this hwmod's subsystem */
  463. oh->_int_flags &= ~_HWMOD_WAKEUP_ENABLED;
  464. return 0;
  465. }
  466. /**
  467. * _add_initiator_dep: prevent @oh from smart-idling while @init_oh is active
  468. * @oh: struct omap_hwmod *
  469. *
  470. * Prevent the hardware module @oh from entering idle while the
  471. * hardare module initiator @init_oh is active. Useful when a module
  472. * will be accessed by a particular initiator (e.g., if a module will
  473. * be accessed by the IVA, there should be a sleepdep between the IVA
  474. * initiator and the module). Only applies to modules in smart-idle
  475. * mode. If the clockdomain is marked as not needing autodeps, return
  476. * 0 without doing anything. Otherwise, returns -EINVAL upon error or
  477. * passes along clkdm_add_sleepdep() value upon success.
  478. */
  479. static int _add_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  480. {
  481. if (!oh->_clk)
  482. return -EINVAL;
  483. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  484. return 0;
  485. return clkdm_add_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  486. }
  487. /**
  488. * _del_initiator_dep: allow @oh to smart-idle even if @init_oh is active
  489. * @oh: struct omap_hwmod *
  490. *
  491. * Allow the hardware module @oh to enter idle while the hardare
  492. * module initiator @init_oh is active. Useful when a module will not
  493. * be accessed by a particular initiator (e.g., if a module will not
  494. * be accessed by the IVA, there should be no sleepdep between the IVA
  495. * initiator and the module). Only applies to modules in smart-idle
  496. * mode. If the clockdomain is marked as not needing autodeps, return
  497. * 0 without doing anything. Returns -EINVAL upon error or passes
  498. * along clkdm_del_sleepdep() value upon success.
  499. */
  500. static int _del_initiator_dep(struct omap_hwmod *oh, struct omap_hwmod *init_oh)
  501. {
  502. if (!oh->_clk)
  503. return -EINVAL;
  504. if (oh->_clk->clkdm && oh->_clk->clkdm->flags & CLKDM_NO_AUTODEPS)
  505. return 0;
  506. return clkdm_del_sleepdep(oh->_clk->clkdm, init_oh->_clk->clkdm);
  507. }
  508. /**
  509. * _init_main_clk - get a struct clk * for the the hwmod's main functional clk
  510. * @oh: struct omap_hwmod *
  511. *
  512. * Called from _init_clocks(). Populates the @oh _clk (main
  513. * functional clock pointer) if a main_clk is present. Returns 0 on
  514. * success or -EINVAL on error.
  515. */
  516. static int _init_main_clk(struct omap_hwmod *oh)
  517. {
  518. int ret = 0;
  519. if (!oh->main_clk)
  520. return 0;
  521. oh->_clk = omap_clk_get_by_name(oh->main_clk);
  522. if (!oh->_clk) {
  523. pr_warning("omap_hwmod: %s: cannot clk_get main_clk %s\n",
  524. oh->name, oh->main_clk);
  525. return -EINVAL;
  526. }
  527. if (!oh->_clk->clkdm)
  528. pr_warning("omap_hwmod: %s: missing clockdomain for %s.\n",
  529. oh->main_clk, oh->_clk->name);
  530. return ret;
  531. }
  532. /**
  533. * _init_interface_clks - get a struct clk * for the the hwmod's interface clks
  534. * @oh: struct omap_hwmod *
  535. *
  536. * Called from _init_clocks(). Populates the @oh OCP slave interface
  537. * clock pointers. Returns 0 on success or -EINVAL on error.
  538. */
  539. static int _init_interface_clks(struct omap_hwmod *oh)
  540. {
  541. struct omap_hwmod_ocp_if *os;
  542. struct list_head *p;
  543. struct clk *c;
  544. int i = 0;
  545. int ret = 0;
  546. p = oh->slave_ports.next;
  547. while (i < oh->slaves_cnt) {
  548. os = _fetch_next_ocp_if(&p, &i);
  549. if (!os->clk)
  550. continue;
  551. c = omap_clk_get_by_name(os->clk);
  552. if (!c) {
  553. pr_warning("omap_hwmod: %s: cannot clk_get interface_clk %s\n",
  554. oh->name, os->clk);
  555. ret = -EINVAL;
  556. }
  557. os->_clk = c;
  558. }
  559. return ret;
  560. }
  561. /**
  562. * _init_opt_clk - get a struct clk * for the the hwmod's optional clocks
  563. * @oh: struct omap_hwmod *
  564. *
  565. * Called from _init_clocks(). Populates the @oh omap_hwmod_opt_clk
  566. * clock pointers. Returns 0 on success or -EINVAL on error.
  567. */
  568. static int _init_opt_clks(struct omap_hwmod *oh)
  569. {
  570. struct omap_hwmod_opt_clk *oc;
  571. struct clk *c;
  572. int i;
  573. int ret = 0;
  574. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++) {
  575. c = omap_clk_get_by_name(oc->clk);
  576. if (!c) {
  577. pr_warning("omap_hwmod: %s: cannot clk_get opt_clk %s\n",
  578. oh->name, oc->clk);
  579. ret = -EINVAL;
  580. }
  581. oc->_clk = c;
  582. }
  583. return ret;
  584. }
  585. /**
  586. * _enable_clocks - enable hwmod main clock and interface clocks
  587. * @oh: struct omap_hwmod *
  588. *
  589. * Enables all clocks necessary for register reads and writes to succeed
  590. * on the hwmod @oh. Returns 0.
  591. */
  592. static int _enable_clocks(struct omap_hwmod *oh)
  593. {
  594. struct omap_hwmod_ocp_if *os;
  595. struct list_head *p;
  596. int i = 0;
  597. pr_debug("omap_hwmod: %s: enabling clocks\n", oh->name);
  598. if (oh->_clk)
  599. clk_enable(oh->_clk);
  600. p = oh->slave_ports.next;
  601. while (i < oh->slaves_cnt) {
  602. os = _fetch_next_ocp_if(&p, &i);
  603. if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
  604. clk_enable(os->_clk);
  605. }
  606. /* The opt clocks are controlled by the device driver. */
  607. return 0;
  608. }
  609. /**
  610. * _disable_clocks - disable hwmod main clock and interface clocks
  611. * @oh: struct omap_hwmod *
  612. *
  613. * Disables the hwmod @oh main functional and interface clocks. Returns 0.
  614. */
  615. static int _disable_clocks(struct omap_hwmod *oh)
  616. {
  617. struct omap_hwmod_ocp_if *os;
  618. struct list_head *p;
  619. int i = 0;
  620. pr_debug("omap_hwmod: %s: disabling clocks\n", oh->name);
  621. if (oh->_clk)
  622. clk_disable(oh->_clk);
  623. p = oh->slave_ports.next;
  624. while (i < oh->slaves_cnt) {
  625. os = _fetch_next_ocp_if(&p, &i);
  626. if (os->_clk && (os->flags & OCPIF_SWSUP_IDLE))
  627. clk_disable(os->_clk);
  628. }
  629. /* The opt clocks are controlled by the device driver. */
  630. return 0;
  631. }
  632. static void _enable_optional_clocks(struct omap_hwmod *oh)
  633. {
  634. struct omap_hwmod_opt_clk *oc;
  635. int i;
  636. pr_debug("omap_hwmod: %s: enabling optional clocks\n", oh->name);
  637. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  638. if (oc->_clk) {
  639. pr_debug("omap_hwmod: enable %s:%s\n", oc->role,
  640. oc->_clk->name);
  641. clk_enable(oc->_clk);
  642. }
  643. }
  644. static void _disable_optional_clocks(struct omap_hwmod *oh)
  645. {
  646. struct omap_hwmod_opt_clk *oc;
  647. int i;
  648. pr_debug("omap_hwmod: %s: disabling optional clocks\n", oh->name);
  649. for (i = oh->opt_clks_cnt, oc = oh->opt_clks; i > 0; i--, oc++)
  650. if (oc->_clk) {
  651. pr_debug("omap_hwmod: disable %s:%s\n", oc->role,
  652. oc->_clk->name);
  653. clk_disable(oc->_clk);
  654. }
  655. }
  656. /**
  657. * _enable_module - enable CLKCTRL modulemode on OMAP4
  658. * @oh: struct omap_hwmod *
  659. *
  660. * Enables the PRCM module mode related to the hwmod @oh.
  661. * No return value.
  662. */
  663. static void _enable_module(struct omap_hwmod *oh)
  664. {
  665. /* The module mode does not exist prior OMAP4 */
  666. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  667. return;
  668. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  669. return;
  670. pr_debug("omap_hwmod: %s: _enable_module: %d\n",
  671. oh->name, oh->prcm.omap4.modulemode);
  672. omap4_cminst_module_enable(oh->prcm.omap4.modulemode,
  673. oh->clkdm->prcm_partition,
  674. oh->clkdm->cm_inst,
  675. oh->clkdm->clkdm_offs,
  676. oh->prcm.omap4.clkctrl_offs);
  677. }
  678. /**
  679. * _omap4_wait_target_disable - wait for a module to be disabled on OMAP4
  680. * @oh: struct omap_hwmod *
  681. *
  682. * Wait for a module @oh to enter slave idle. Returns 0 if the module
  683. * does not have an IDLEST bit or if the module successfully enters
  684. * slave idle; otherwise, pass along the return value of the
  685. * appropriate *_cm*_wait_module_idle() function.
  686. */
  687. static int _omap4_wait_target_disable(struct omap_hwmod *oh)
  688. {
  689. if (!cpu_is_omap44xx())
  690. return 0;
  691. if (!oh || !oh->clkdm)
  692. return -EINVAL;
  693. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  694. return 0;
  695. if (oh->flags & HWMOD_NO_IDLEST)
  696. return 0;
  697. return omap4_cminst_wait_module_idle(oh->clkdm->prcm_partition,
  698. oh->clkdm->cm_inst,
  699. oh->clkdm->clkdm_offs,
  700. oh->prcm.omap4.clkctrl_offs);
  701. }
  702. /**
  703. * _count_mpu_irqs - count the number of MPU IRQ lines associated with @oh
  704. * @oh: struct omap_hwmod *oh
  705. *
  706. * Count and return the number of MPU IRQs associated with the hwmod
  707. * @oh. Used to allocate struct resource data. Returns 0 if @oh is
  708. * NULL.
  709. */
  710. static int _count_mpu_irqs(struct omap_hwmod *oh)
  711. {
  712. struct omap_hwmod_irq_info *ohii;
  713. int i = 0;
  714. if (!oh || !oh->mpu_irqs)
  715. return 0;
  716. do {
  717. ohii = &oh->mpu_irqs[i++];
  718. } while (ohii->irq != -1);
  719. return i-1;
  720. }
  721. /**
  722. * _count_sdma_reqs - count the number of SDMA request lines associated with @oh
  723. * @oh: struct omap_hwmod *oh
  724. *
  725. * Count and return the number of SDMA request lines associated with
  726. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  727. * if @oh is NULL.
  728. */
  729. static int _count_sdma_reqs(struct omap_hwmod *oh)
  730. {
  731. struct omap_hwmod_dma_info *ohdi;
  732. int i = 0;
  733. if (!oh || !oh->sdma_reqs)
  734. return 0;
  735. do {
  736. ohdi = &oh->sdma_reqs[i++];
  737. } while (ohdi->dma_req != -1);
  738. return i-1;
  739. }
  740. /**
  741. * _count_ocp_if_addr_spaces - count the number of address space entries for @oh
  742. * @oh: struct omap_hwmod *oh
  743. *
  744. * Count and return the number of address space ranges associated with
  745. * the hwmod @oh. Used to allocate struct resource data. Returns 0
  746. * if @oh is NULL.
  747. */
  748. static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
  749. {
  750. struct omap_hwmod_addr_space *mem;
  751. int i = 0;
  752. if (!os || !os->addr)
  753. return 0;
  754. do {
  755. mem = &os->addr[i++];
  756. } while (mem->pa_start != mem->pa_end);
  757. return i-1;
  758. }
  759. /**
  760. * _get_mpu_irq_by_name - fetch MPU interrupt line number by name
  761. * @oh: struct omap_hwmod * to operate on
  762. * @name: pointer to the name of the MPU interrupt number to fetch (optional)
  763. * @irq: pointer to an unsigned int to store the MPU IRQ number to
  764. *
  765. * Retrieve a MPU hardware IRQ line number named by @name associated
  766. * with the IP block pointed to by @oh. The IRQ number will be filled
  767. * into the address pointed to by @dma. When @name is non-null, the
  768. * IRQ line number associated with the named entry will be returned.
  769. * If @name is null, the first matching entry will be returned. Data
  770. * order is not meaningful in hwmod data, so callers are strongly
  771. * encouraged to use a non-null @name whenever possible to avoid
  772. * unpredictable effects if hwmod data is later added that causes data
  773. * ordering to change. Returns 0 upon success or a negative error
  774. * code upon error.
  775. */
  776. static int _get_mpu_irq_by_name(struct omap_hwmod *oh, const char *name,
  777. unsigned int *irq)
  778. {
  779. int i;
  780. bool found = false;
  781. if (!oh->mpu_irqs)
  782. return -ENOENT;
  783. i = 0;
  784. while (oh->mpu_irqs[i].irq != -1) {
  785. if (name == oh->mpu_irqs[i].name ||
  786. !strcmp(name, oh->mpu_irqs[i].name)) {
  787. found = true;
  788. break;
  789. }
  790. i++;
  791. }
  792. if (!found)
  793. return -ENOENT;
  794. *irq = oh->mpu_irqs[i].irq;
  795. return 0;
  796. }
  797. /**
  798. * _get_sdma_req_by_name - fetch SDMA request line ID by name
  799. * @oh: struct omap_hwmod * to operate on
  800. * @name: pointer to the name of the SDMA request line to fetch (optional)
  801. * @dma: pointer to an unsigned int to store the request line ID to
  802. *
  803. * Retrieve an SDMA request line ID named by @name on the IP block
  804. * pointed to by @oh. The ID will be filled into the address pointed
  805. * to by @dma. When @name is non-null, the request line ID associated
  806. * with the named entry will be returned. If @name is null, the first
  807. * matching entry will be returned. Data order is not meaningful in
  808. * hwmod data, so callers are strongly encouraged to use a non-null
  809. * @name whenever possible to avoid unpredictable effects if hwmod
  810. * data is later added that causes data ordering to change. Returns 0
  811. * upon success or a negative error code upon error.
  812. */
  813. static int _get_sdma_req_by_name(struct omap_hwmod *oh, const char *name,
  814. unsigned int *dma)
  815. {
  816. int i;
  817. bool found = false;
  818. if (!oh->sdma_reqs)
  819. return -ENOENT;
  820. i = 0;
  821. while (oh->sdma_reqs[i].dma_req != -1) {
  822. if (name == oh->sdma_reqs[i].name ||
  823. !strcmp(name, oh->sdma_reqs[i].name)) {
  824. found = true;
  825. break;
  826. }
  827. i++;
  828. }
  829. if (!found)
  830. return -ENOENT;
  831. *dma = oh->sdma_reqs[i].dma_req;
  832. return 0;
  833. }
  834. /**
  835. * _get_addr_space_by_name - fetch address space start & end by name
  836. * @oh: struct omap_hwmod * to operate on
  837. * @name: pointer to the name of the address space to fetch (optional)
  838. * @pa_start: pointer to a u32 to store the starting address to
  839. * @pa_end: pointer to a u32 to store the ending address to
  840. *
  841. * Retrieve address space start and end addresses for the IP block
  842. * pointed to by @oh. The data will be filled into the addresses
  843. * pointed to by @pa_start and @pa_end. When @name is non-null, the
  844. * address space data associated with the named entry will be
  845. * returned. If @name is null, the first matching entry will be
  846. * returned. Data order is not meaningful in hwmod data, so callers
  847. * are strongly encouraged to use a non-null @name whenever possible
  848. * to avoid unpredictable effects if hwmod data is later added that
  849. * causes data ordering to change. Returns 0 upon success or a
  850. * negative error code upon error.
  851. */
  852. static int _get_addr_space_by_name(struct omap_hwmod *oh, const char *name,
  853. u32 *pa_start, u32 *pa_end)
  854. {
  855. int i, j;
  856. struct omap_hwmod_ocp_if *os;
  857. struct list_head *p = NULL;
  858. bool found = false;
  859. p = oh->slave_ports.next;
  860. i = 0;
  861. while (i < oh->slaves_cnt) {
  862. os = _fetch_next_ocp_if(&p, &i);
  863. if (!os->addr)
  864. return -ENOENT;
  865. j = 0;
  866. while (os->addr[j].pa_start != os->addr[j].pa_end) {
  867. if (name == os->addr[j].name ||
  868. !strcmp(name, os->addr[j].name)) {
  869. found = true;
  870. break;
  871. }
  872. j++;
  873. }
  874. if (found)
  875. break;
  876. }
  877. if (!found)
  878. return -ENOENT;
  879. *pa_start = os->addr[j].pa_start;
  880. *pa_end = os->addr[j].pa_end;
  881. return 0;
  882. }
  883. /**
  884. * _save_mpu_port_index - find and save the index to @oh's MPU port
  885. * @oh: struct omap_hwmod *
  886. *
  887. * Determines the array index of the OCP slave port that the MPU uses
  888. * to address the device, and saves it into the struct omap_hwmod.
  889. * Intended to be called during hwmod registration only. No return
  890. * value.
  891. */
  892. static void __init _save_mpu_port_index(struct omap_hwmod *oh)
  893. {
  894. struct omap_hwmod_ocp_if *os = NULL;
  895. struct list_head *p;
  896. int i = 0;
  897. if (!oh)
  898. return;
  899. oh->_int_flags |= _HWMOD_NO_MPU_PORT;
  900. p = oh->slave_ports.next;
  901. while (i < oh->slaves_cnt) {
  902. os = _fetch_next_ocp_if(&p, &i);
  903. if (os->user & OCP_USER_MPU) {
  904. oh->_mpu_port = os;
  905. oh->_int_flags &= ~_HWMOD_NO_MPU_PORT;
  906. break;
  907. }
  908. }
  909. return;
  910. }
  911. /**
  912. * _find_mpu_rt_port - return omap_hwmod_ocp_if accessible by the MPU
  913. * @oh: struct omap_hwmod *
  914. *
  915. * Given a pointer to a struct omap_hwmod record @oh, return a pointer
  916. * to the struct omap_hwmod_ocp_if record that is used by the MPU to
  917. * communicate with the IP block. This interface need not be directly
  918. * connected to the MPU (and almost certainly is not), but is directly
  919. * connected to the IP block represented by @oh. Returns a pointer
  920. * to the struct omap_hwmod_ocp_if * upon success, or returns NULL upon
  921. * error or if there does not appear to be a path from the MPU to this
  922. * IP block.
  923. */
  924. static struct omap_hwmod_ocp_if *_find_mpu_rt_port(struct omap_hwmod *oh)
  925. {
  926. if (!oh || oh->_int_flags & _HWMOD_NO_MPU_PORT || oh->slaves_cnt == 0)
  927. return NULL;
  928. return oh->_mpu_port;
  929. };
  930. /**
  931. * _find_mpu_rt_addr_space - return MPU register target address space for @oh
  932. * @oh: struct omap_hwmod *
  933. *
  934. * Returns a pointer to the struct omap_hwmod_addr_space record representing
  935. * the register target MPU address space; or returns NULL upon error.
  936. */
  937. static struct omap_hwmod_addr_space * __init _find_mpu_rt_addr_space(struct omap_hwmod *oh)
  938. {
  939. struct omap_hwmod_ocp_if *os;
  940. struct omap_hwmod_addr_space *mem;
  941. int found = 0, i = 0;
  942. os = _find_mpu_rt_port(oh);
  943. if (!os || !os->addr)
  944. return NULL;
  945. do {
  946. mem = &os->addr[i++];
  947. if (mem->flags & ADDR_TYPE_RT)
  948. found = 1;
  949. } while (!found && mem->pa_start != mem->pa_end);
  950. return (found) ? mem : NULL;
  951. }
  952. /**
  953. * _enable_sysc - try to bring a module out of idle via OCP_SYSCONFIG
  954. * @oh: struct omap_hwmod *
  955. *
  956. * If module is marked as SWSUP_SIDLE, force the module out of slave
  957. * idle; otherwise, configure it for smart-idle. If module is marked
  958. * as SWSUP_MSUSPEND, force the module out of master standby;
  959. * otherwise, configure it for smart-standby. No return value.
  960. */
  961. static void _enable_sysc(struct omap_hwmod *oh)
  962. {
  963. u8 idlemode, sf;
  964. u32 v;
  965. if (!oh->class->sysc)
  966. return;
  967. v = oh->_sysc_cache;
  968. sf = oh->class->sysc->sysc_flags;
  969. if (sf & SYSC_HAS_SIDLEMODE) {
  970. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  971. HWMOD_IDLEMODE_NO : HWMOD_IDLEMODE_SMART;
  972. _set_slave_idlemode(oh, idlemode, &v);
  973. }
  974. if (sf & SYSC_HAS_MIDLEMODE) {
  975. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  976. idlemode = HWMOD_IDLEMODE_NO;
  977. } else {
  978. if (sf & SYSC_HAS_ENAWAKEUP)
  979. _enable_wakeup(oh, &v);
  980. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  981. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  982. else
  983. idlemode = HWMOD_IDLEMODE_SMART;
  984. }
  985. _set_master_standbymode(oh, idlemode, &v);
  986. }
  987. /*
  988. * XXX The clock framework should handle this, by
  989. * calling into this code. But this must wait until the
  990. * clock structures are tagged with omap_hwmod entries
  991. */
  992. if ((oh->flags & HWMOD_SET_DEFAULT_CLOCKACT) &&
  993. (sf & SYSC_HAS_CLOCKACTIVITY))
  994. _set_clockactivity(oh, oh->class->sysc->clockact, &v);
  995. /* If slave is in SMARTIDLE, also enable wakeup */
  996. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  997. _enable_wakeup(oh, &v);
  998. _write_sysconfig(v, oh);
  999. /*
  1000. * Set the autoidle bit only after setting the smartidle bit
  1001. * Setting this will not have any impact on the other modules.
  1002. */
  1003. if (sf & SYSC_HAS_AUTOIDLE) {
  1004. idlemode = (oh->flags & HWMOD_NO_OCP_AUTOIDLE) ?
  1005. 0 : 1;
  1006. _set_module_autoidle(oh, idlemode, &v);
  1007. _write_sysconfig(v, oh);
  1008. }
  1009. }
  1010. /**
  1011. * _idle_sysc - try to put a module into idle via OCP_SYSCONFIG
  1012. * @oh: struct omap_hwmod *
  1013. *
  1014. * If module is marked as SWSUP_SIDLE, force the module into slave
  1015. * idle; otherwise, configure it for smart-idle. If module is marked
  1016. * as SWSUP_MSUSPEND, force the module into master standby; otherwise,
  1017. * configure it for smart-standby. No return value.
  1018. */
  1019. static void _idle_sysc(struct omap_hwmod *oh)
  1020. {
  1021. u8 idlemode, sf;
  1022. u32 v;
  1023. if (!oh->class->sysc)
  1024. return;
  1025. v = oh->_sysc_cache;
  1026. sf = oh->class->sysc->sysc_flags;
  1027. if (sf & SYSC_HAS_SIDLEMODE) {
  1028. idlemode = (oh->flags & HWMOD_SWSUP_SIDLE) ?
  1029. HWMOD_IDLEMODE_FORCE : HWMOD_IDLEMODE_SMART;
  1030. _set_slave_idlemode(oh, idlemode, &v);
  1031. }
  1032. if (sf & SYSC_HAS_MIDLEMODE) {
  1033. if (oh->flags & HWMOD_SWSUP_MSTANDBY) {
  1034. idlemode = HWMOD_IDLEMODE_FORCE;
  1035. } else {
  1036. if (sf & SYSC_HAS_ENAWAKEUP)
  1037. _enable_wakeup(oh, &v);
  1038. if (oh->class->sysc->idlemodes & MSTANDBY_SMART_WKUP)
  1039. idlemode = HWMOD_IDLEMODE_SMART_WKUP;
  1040. else
  1041. idlemode = HWMOD_IDLEMODE_SMART;
  1042. }
  1043. _set_master_standbymode(oh, idlemode, &v);
  1044. }
  1045. /* If slave is in SMARTIDLE, also enable wakeup */
  1046. if ((sf & SYSC_HAS_SIDLEMODE) && !(oh->flags & HWMOD_SWSUP_SIDLE))
  1047. _enable_wakeup(oh, &v);
  1048. _write_sysconfig(v, oh);
  1049. }
  1050. /**
  1051. * _shutdown_sysc - force a module into idle via OCP_SYSCONFIG
  1052. * @oh: struct omap_hwmod *
  1053. *
  1054. * Force the module into slave idle and master suspend. No return
  1055. * value.
  1056. */
  1057. static void _shutdown_sysc(struct omap_hwmod *oh)
  1058. {
  1059. u32 v;
  1060. u8 sf;
  1061. if (!oh->class->sysc)
  1062. return;
  1063. v = oh->_sysc_cache;
  1064. sf = oh->class->sysc->sysc_flags;
  1065. if (sf & SYSC_HAS_SIDLEMODE)
  1066. _set_slave_idlemode(oh, HWMOD_IDLEMODE_FORCE, &v);
  1067. if (sf & SYSC_HAS_MIDLEMODE)
  1068. _set_master_standbymode(oh, HWMOD_IDLEMODE_FORCE, &v);
  1069. if (sf & SYSC_HAS_AUTOIDLE)
  1070. _set_module_autoidle(oh, 1, &v);
  1071. _write_sysconfig(v, oh);
  1072. }
  1073. /**
  1074. * _lookup - find an omap_hwmod by name
  1075. * @name: find an omap_hwmod by name
  1076. *
  1077. * Return a pointer to an omap_hwmod by name, or NULL if not found.
  1078. */
  1079. static struct omap_hwmod *_lookup(const char *name)
  1080. {
  1081. struct omap_hwmod *oh, *temp_oh;
  1082. oh = NULL;
  1083. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  1084. if (!strcmp(name, temp_oh->name)) {
  1085. oh = temp_oh;
  1086. break;
  1087. }
  1088. }
  1089. return oh;
  1090. }
  1091. /**
  1092. * _init_clkdm - look up a clockdomain name, store pointer in omap_hwmod
  1093. * @oh: struct omap_hwmod *
  1094. *
  1095. * Convert a clockdomain name stored in a struct omap_hwmod into a
  1096. * clockdomain pointer, and save it into the struct omap_hwmod.
  1097. * Return -EINVAL if the clkdm_name lookup failed.
  1098. */
  1099. static int _init_clkdm(struct omap_hwmod *oh)
  1100. {
  1101. if (cpu_is_omap24xx() || cpu_is_omap34xx())
  1102. return 0;
  1103. if (!oh->clkdm_name)
  1104. return 0;
  1105. oh->clkdm = clkdm_lookup(oh->clkdm_name);
  1106. if (!oh->clkdm) {
  1107. pr_warning("omap_hwmod: %s: could not associate to clkdm %s\n",
  1108. oh->name, oh->clkdm_name);
  1109. return -EINVAL;
  1110. }
  1111. pr_debug("omap_hwmod: %s: associated to clkdm %s\n",
  1112. oh->name, oh->clkdm_name);
  1113. return 0;
  1114. }
  1115. /**
  1116. * _init_clocks - clk_get() all clocks associated with this hwmod. Retrieve as
  1117. * well the clockdomain.
  1118. * @oh: struct omap_hwmod *
  1119. * @data: not used; pass NULL
  1120. *
  1121. * Called by omap_hwmod_setup_*() (after omap2_clk_init()).
  1122. * Resolves all clock names embedded in the hwmod. Returns 0 on
  1123. * success, or a negative error code on failure.
  1124. */
  1125. static int _init_clocks(struct omap_hwmod *oh, void *data)
  1126. {
  1127. int ret = 0;
  1128. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1129. return 0;
  1130. pr_debug("omap_hwmod: %s: looking up clocks\n", oh->name);
  1131. ret |= _init_main_clk(oh);
  1132. ret |= _init_interface_clks(oh);
  1133. ret |= _init_opt_clks(oh);
  1134. ret |= _init_clkdm(oh);
  1135. if (!ret)
  1136. oh->_state = _HWMOD_STATE_CLKS_INITED;
  1137. else
  1138. pr_warning("omap_hwmod: %s: cannot _init_clocks\n", oh->name);
  1139. return ret;
  1140. }
  1141. /**
  1142. * _wait_target_ready - wait for a module to leave slave idle
  1143. * @oh: struct omap_hwmod *
  1144. *
  1145. * Wait for a module @oh to leave slave idle. Returns 0 if the module
  1146. * does not have an IDLEST bit or if the module successfully leaves
  1147. * slave idle; otherwise, pass along the return value of the
  1148. * appropriate *_cm*_wait_module_ready() function.
  1149. */
  1150. static int _wait_target_ready(struct omap_hwmod *oh)
  1151. {
  1152. struct omap_hwmod_ocp_if *os;
  1153. int ret;
  1154. if (!oh)
  1155. return -EINVAL;
  1156. if (oh->flags & HWMOD_NO_IDLEST)
  1157. return 0;
  1158. os = _find_mpu_rt_port(oh);
  1159. if (!os)
  1160. return 0;
  1161. /* XXX check module SIDLEMODE */
  1162. /* XXX check clock enable states */
  1163. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  1164. ret = omap2_cm_wait_module_ready(oh->prcm.omap2.module_offs,
  1165. oh->prcm.omap2.idlest_reg_id,
  1166. oh->prcm.omap2.idlest_idle_bit);
  1167. } else if (cpu_is_omap44xx()) {
  1168. if (!oh->clkdm)
  1169. return -EINVAL;
  1170. ret = omap4_cminst_wait_module_ready(oh->clkdm->prcm_partition,
  1171. oh->clkdm->cm_inst,
  1172. oh->clkdm->clkdm_offs,
  1173. oh->prcm.omap4.clkctrl_offs);
  1174. } else {
  1175. BUG();
  1176. };
  1177. return ret;
  1178. }
  1179. /**
  1180. * _lookup_hardreset - fill register bit info for this hwmod/reset line
  1181. * @oh: struct omap_hwmod *
  1182. * @name: name of the reset line in the context of this hwmod
  1183. * @ohri: struct omap_hwmod_rst_info * that this function will fill in
  1184. *
  1185. * Return the bit position of the reset line that match the
  1186. * input name. Return -ENOENT if not found.
  1187. */
  1188. static u8 _lookup_hardreset(struct omap_hwmod *oh, const char *name,
  1189. struct omap_hwmod_rst_info *ohri)
  1190. {
  1191. int i;
  1192. for (i = 0; i < oh->rst_lines_cnt; i++) {
  1193. const char *rst_line = oh->rst_lines[i].name;
  1194. if (!strcmp(rst_line, name)) {
  1195. ohri->rst_shift = oh->rst_lines[i].rst_shift;
  1196. ohri->st_shift = oh->rst_lines[i].st_shift;
  1197. pr_debug("omap_hwmod: %s: %s: %s: rst %d st %d\n",
  1198. oh->name, __func__, rst_line, ohri->rst_shift,
  1199. ohri->st_shift);
  1200. return 0;
  1201. }
  1202. }
  1203. return -ENOENT;
  1204. }
  1205. /**
  1206. * _assert_hardreset - assert the HW reset line of submodules
  1207. * contained in the hwmod module.
  1208. * @oh: struct omap_hwmod *
  1209. * @name: name of the reset line to lookup and assert
  1210. *
  1211. * Some IP like dsp, ipu or iva contain processor that require
  1212. * an HW reset line to be assert / deassert in order to enable fully
  1213. * the IP.
  1214. */
  1215. static int _assert_hardreset(struct omap_hwmod *oh, const char *name)
  1216. {
  1217. struct omap_hwmod_rst_info ohri;
  1218. u8 ret;
  1219. if (!oh)
  1220. return -EINVAL;
  1221. ret = _lookup_hardreset(oh, name, &ohri);
  1222. if (IS_ERR_VALUE(ret))
  1223. return ret;
  1224. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  1225. return omap2_prm_assert_hardreset(oh->prcm.omap2.module_offs,
  1226. ohri.rst_shift);
  1227. } else if (cpu_is_omap44xx()) {
  1228. if (!oh->clkdm)
  1229. return -EINVAL;
  1230. return omap4_prminst_assert_hardreset(ohri.rst_shift,
  1231. oh->clkdm->pwrdm.ptr->prcm_partition,
  1232. oh->clkdm->pwrdm.ptr->prcm_offs,
  1233. oh->prcm.omap4.rstctrl_offs);
  1234. } else {
  1235. return -EINVAL;
  1236. }
  1237. }
  1238. /**
  1239. * _deassert_hardreset - deassert the HW reset line of submodules contained
  1240. * in the hwmod module.
  1241. * @oh: struct omap_hwmod *
  1242. * @name: name of the reset line to look up and deassert
  1243. *
  1244. * Some IP like dsp, ipu or iva contain processor that require
  1245. * an HW reset line to be assert / deassert in order to enable fully
  1246. * the IP.
  1247. */
  1248. static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
  1249. {
  1250. struct omap_hwmod_rst_info ohri;
  1251. int ret;
  1252. if (!oh)
  1253. return -EINVAL;
  1254. ret = _lookup_hardreset(oh, name, &ohri);
  1255. if (IS_ERR_VALUE(ret))
  1256. return ret;
  1257. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  1258. ret = omap2_prm_deassert_hardreset(oh->prcm.omap2.module_offs,
  1259. ohri.rst_shift,
  1260. ohri.st_shift);
  1261. } else if (cpu_is_omap44xx()) {
  1262. if (ohri.st_shift)
  1263. pr_err("omap_hwmod: %s: %s: hwmod data error: OMAP4 does not support st_shift\n",
  1264. oh->name, name);
  1265. if (!oh->clkdm)
  1266. return -EINVAL;
  1267. ret = omap4_prminst_deassert_hardreset(ohri.rst_shift,
  1268. oh->clkdm->pwrdm.ptr->prcm_partition,
  1269. oh->clkdm->pwrdm.ptr->prcm_offs,
  1270. oh->prcm.omap4.rstctrl_offs);
  1271. } else {
  1272. return -EINVAL;
  1273. }
  1274. if (ret == -EBUSY)
  1275. pr_warning("omap_hwmod: %s: failed to hardreset\n", oh->name);
  1276. return ret;
  1277. }
  1278. /**
  1279. * _read_hardreset - read the HW reset line state of submodules
  1280. * contained in the hwmod module
  1281. * @oh: struct omap_hwmod *
  1282. * @name: name of the reset line to look up and read
  1283. *
  1284. * Return the state of the reset line.
  1285. */
  1286. static int _read_hardreset(struct omap_hwmod *oh, const char *name)
  1287. {
  1288. struct omap_hwmod_rst_info ohri;
  1289. u8 ret;
  1290. if (!oh)
  1291. return -EINVAL;
  1292. ret = _lookup_hardreset(oh, name, &ohri);
  1293. if (IS_ERR_VALUE(ret))
  1294. return ret;
  1295. if (cpu_is_omap24xx() || cpu_is_omap34xx()) {
  1296. return omap2_prm_is_hardreset_asserted(oh->prcm.omap2.module_offs,
  1297. ohri.st_shift);
  1298. } else if (cpu_is_omap44xx()) {
  1299. if (!oh->clkdm)
  1300. return -EINVAL;
  1301. return omap4_prminst_is_hardreset_asserted(ohri.rst_shift,
  1302. oh->clkdm->pwrdm.ptr->prcm_partition,
  1303. oh->clkdm->pwrdm.ptr->prcm_offs,
  1304. oh->prcm.omap4.rstctrl_offs);
  1305. } else {
  1306. return -EINVAL;
  1307. }
  1308. }
  1309. /**
  1310. * _are_any_hardreset_lines_asserted - return true if part of @oh is hard-reset
  1311. * @oh: struct omap_hwmod *
  1312. *
  1313. * If any hardreset line associated with @oh is asserted, then return true.
  1314. * Otherwise, if @oh has no hardreset lines associated with it, or if
  1315. * no hardreset lines associated with @oh are asserted, then return false.
  1316. * This function is used to avoid executing some parts of the IP block
  1317. * enable/disable sequence if a hardreset line is set.
  1318. */
  1319. static bool _are_any_hardreset_lines_asserted(struct omap_hwmod *oh)
  1320. {
  1321. int i;
  1322. if (oh->rst_lines_cnt == 0)
  1323. return false;
  1324. for (i = 0; i < oh->rst_lines_cnt; i++)
  1325. if (_read_hardreset(oh, oh->rst_lines[i].name) > 0)
  1326. return true;
  1327. return false;
  1328. }
  1329. /**
  1330. * _omap4_disable_module - enable CLKCTRL modulemode on OMAP4
  1331. * @oh: struct omap_hwmod *
  1332. *
  1333. * Disable the PRCM module mode related to the hwmod @oh.
  1334. * Return EINVAL if the modulemode is not supported and 0 in case of success.
  1335. */
  1336. static int _omap4_disable_module(struct omap_hwmod *oh)
  1337. {
  1338. int v;
  1339. /* The module mode does not exist prior OMAP4 */
  1340. if (!cpu_is_omap44xx())
  1341. return -EINVAL;
  1342. if (!oh->clkdm || !oh->prcm.omap4.modulemode)
  1343. return -EINVAL;
  1344. pr_debug("omap_hwmod: %s: %s\n", oh->name, __func__);
  1345. omap4_cminst_module_disable(oh->clkdm->prcm_partition,
  1346. oh->clkdm->cm_inst,
  1347. oh->clkdm->clkdm_offs,
  1348. oh->prcm.omap4.clkctrl_offs);
  1349. if (_are_any_hardreset_lines_asserted(oh))
  1350. return 0;
  1351. v = _omap4_wait_target_disable(oh);
  1352. if (v)
  1353. pr_warn("omap_hwmod: %s: _wait_target_disable failed\n",
  1354. oh->name);
  1355. return 0;
  1356. }
  1357. /**
  1358. * _ocp_softreset - reset an omap_hwmod via the OCP_SYSCONFIG bit
  1359. * @oh: struct omap_hwmod *
  1360. *
  1361. * Resets an omap_hwmod @oh via the OCP_SYSCONFIG bit. hwmod must be
  1362. * enabled for this to work. Returns -ENOENT if the hwmod cannot be
  1363. * reset this way, -EINVAL if the hwmod is in the wrong state,
  1364. * -ETIMEDOUT if the module did not reset in time, or 0 upon success.
  1365. *
  1366. * In OMAP3 a specific SYSSTATUS register is used to get the reset status.
  1367. * Starting in OMAP4, some IPs do not have SYSSTATUS registers and instead
  1368. * use the SYSCONFIG softreset bit to provide the status.
  1369. *
  1370. * Note that some IP like McBSP do have reset control but don't have
  1371. * reset status.
  1372. */
  1373. static int _ocp_softreset(struct omap_hwmod *oh)
  1374. {
  1375. u32 v, softrst_mask;
  1376. int c = 0;
  1377. int ret = 0;
  1378. if (!oh->class->sysc ||
  1379. !(oh->class->sysc->sysc_flags & SYSC_HAS_SOFTRESET))
  1380. return -ENOENT;
  1381. /* clocks must be on for this operation */
  1382. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1383. pr_warning("omap_hwmod: %s: reset can only be entered from "
  1384. "enabled state\n", oh->name);
  1385. return -EINVAL;
  1386. }
  1387. /* For some modules, all optionnal clocks need to be enabled as well */
  1388. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1389. _enable_optional_clocks(oh);
  1390. pr_debug("omap_hwmod: %s: resetting via OCP SOFTRESET\n", oh->name);
  1391. v = oh->_sysc_cache;
  1392. ret = _set_softreset(oh, &v);
  1393. if (ret)
  1394. goto dis_opt_clks;
  1395. _write_sysconfig(v, oh);
  1396. if (oh->class->sysc->srst_udelay)
  1397. udelay(oh->class->sysc->srst_udelay);
  1398. if (oh->class->sysc->sysc_flags & SYSS_HAS_RESET_STATUS)
  1399. omap_test_timeout((omap_hwmod_read(oh,
  1400. oh->class->sysc->syss_offs)
  1401. & SYSS_RESETDONE_MASK),
  1402. MAX_MODULE_SOFTRESET_WAIT, c);
  1403. else if (oh->class->sysc->sysc_flags & SYSC_HAS_RESET_STATUS) {
  1404. softrst_mask = (0x1 << oh->class->sysc->sysc_fields->srst_shift);
  1405. omap_test_timeout(!(omap_hwmod_read(oh,
  1406. oh->class->sysc->sysc_offs)
  1407. & softrst_mask),
  1408. MAX_MODULE_SOFTRESET_WAIT, c);
  1409. }
  1410. if (c == MAX_MODULE_SOFTRESET_WAIT)
  1411. pr_warning("omap_hwmod: %s: softreset failed (waited %d usec)\n",
  1412. oh->name, MAX_MODULE_SOFTRESET_WAIT);
  1413. else
  1414. pr_debug("omap_hwmod: %s: softreset in %d usec\n", oh->name, c);
  1415. /*
  1416. * XXX add _HWMOD_STATE_WEDGED for modules that don't come back from
  1417. * _wait_target_ready() or _reset()
  1418. */
  1419. ret = (c == MAX_MODULE_SOFTRESET_WAIT) ? -ETIMEDOUT : 0;
  1420. dis_opt_clks:
  1421. if (oh->flags & HWMOD_CONTROL_OPT_CLKS_IN_RESET)
  1422. _disable_optional_clocks(oh);
  1423. return ret;
  1424. }
  1425. /**
  1426. * _reset - reset an omap_hwmod
  1427. * @oh: struct omap_hwmod *
  1428. *
  1429. * Resets an omap_hwmod @oh. If the module has a custom reset
  1430. * function pointer defined, then call it to reset the IP block, and
  1431. * pass along its return value to the caller. Otherwise, if the IP
  1432. * block has an OCP_SYSCONFIG register with a SOFTRESET bitfield
  1433. * associated with it, call a function to reset the IP block via that
  1434. * method, and pass along the return value to the caller. Finally, if
  1435. * the IP block has some hardreset lines associated with it, assert
  1436. * all of those, but do _not_ deassert them. (This is because driver
  1437. * authors have expressed an apparent requirement to control the
  1438. * deassertion of the hardreset lines themselves.)
  1439. *
  1440. * The default software reset mechanism for most OMAP IP blocks is
  1441. * triggered via the OCP_SYSCONFIG.SOFTRESET bit. However, some
  1442. * hwmods cannot be reset via this method. Some are not targets and
  1443. * therefore have no OCP header registers to access. Others (like the
  1444. * IVA) have idiosyncratic reset sequences. So for these relatively
  1445. * rare cases, custom reset code can be supplied in the struct
  1446. * omap_hwmod_class .reset function pointer. Passes along the return
  1447. * value from either _ocp_softreset() or the custom reset function -
  1448. * these must return -EINVAL if the hwmod cannot be reset this way or
  1449. * if the hwmod is in the wrong state, -ETIMEDOUT if the module did
  1450. * not reset in time, or 0 upon success.
  1451. */
  1452. static int _reset(struct omap_hwmod *oh)
  1453. {
  1454. int i, r;
  1455. pr_debug("omap_hwmod: %s: resetting\n", oh->name);
  1456. if (oh->class->reset) {
  1457. r = oh->class->reset(oh);
  1458. } else {
  1459. if (oh->rst_lines_cnt > 0) {
  1460. for (i = 0; i < oh->rst_lines_cnt; i++)
  1461. _assert_hardreset(oh, oh->rst_lines[i].name);
  1462. return 0;
  1463. } else {
  1464. r = _ocp_softreset(oh);
  1465. if (r == -ENOENT)
  1466. r = 0;
  1467. }
  1468. }
  1469. /*
  1470. * OCP_SYSCONFIG bits need to be reprogrammed after a
  1471. * softreset. The _enable() function should be split to avoid
  1472. * the rewrite of the OCP_SYSCONFIG register.
  1473. */
  1474. if (oh->class->sysc) {
  1475. _update_sysc_cache(oh);
  1476. _enable_sysc(oh);
  1477. }
  1478. return r;
  1479. }
  1480. /**
  1481. * _enable - enable an omap_hwmod
  1482. * @oh: struct omap_hwmod *
  1483. *
  1484. * Enables an omap_hwmod @oh such that the MPU can access the hwmod's
  1485. * register target. Returns -EINVAL if the hwmod is in the wrong
  1486. * state or passes along the return value of _wait_target_ready().
  1487. */
  1488. static int _enable(struct omap_hwmod *oh)
  1489. {
  1490. int r;
  1491. int hwsup = 0;
  1492. pr_debug("omap_hwmod: %s: enabling\n", oh->name);
  1493. /*
  1494. * hwmods with HWMOD_INIT_NO_IDLE flag set are left in enabled
  1495. * state at init. Now that someone is really trying to enable
  1496. * them, just ensure that the hwmod mux is set.
  1497. */
  1498. if (oh->_int_flags & _HWMOD_SKIP_ENABLE) {
  1499. /*
  1500. * If the caller has mux data populated, do the mux'ing
  1501. * which wouldn't have been done as part of the _enable()
  1502. * done during setup.
  1503. */
  1504. if (oh->mux)
  1505. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1506. oh->_int_flags &= ~_HWMOD_SKIP_ENABLE;
  1507. return 0;
  1508. }
  1509. if (oh->_state != _HWMOD_STATE_INITIALIZED &&
  1510. oh->_state != _HWMOD_STATE_IDLE &&
  1511. oh->_state != _HWMOD_STATE_DISABLED) {
  1512. WARN(1, "omap_hwmod: %s: enabled state can only be entered from initialized, idle, or disabled state\n",
  1513. oh->name);
  1514. return -EINVAL;
  1515. }
  1516. /*
  1517. * If an IP block contains HW reset lines and any of them are
  1518. * asserted, we let integration code associated with that
  1519. * block handle the enable. We've received very little
  1520. * information on what those driver authors need, and until
  1521. * detailed information is provided and the driver code is
  1522. * posted to the public lists, this is probably the best we
  1523. * can do.
  1524. */
  1525. if (_are_any_hardreset_lines_asserted(oh))
  1526. return 0;
  1527. /* Mux pins for device runtime if populated */
  1528. if (oh->mux && (!oh->mux->enabled ||
  1529. ((oh->_state == _HWMOD_STATE_IDLE) &&
  1530. oh->mux->pads_dynamic)))
  1531. omap_hwmod_mux(oh->mux, _HWMOD_STATE_ENABLED);
  1532. _add_initiator_dep(oh, mpu_oh);
  1533. if (oh->clkdm) {
  1534. /*
  1535. * A clockdomain must be in SW_SUP before enabling
  1536. * completely the module. The clockdomain can be set
  1537. * in HW_AUTO only when the module become ready.
  1538. */
  1539. hwsup = clkdm_in_hwsup(oh->clkdm);
  1540. r = clkdm_hwmod_enable(oh->clkdm, oh);
  1541. if (r) {
  1542. WARN(1, "omap_hwmod: %s: could not enable clockdomain %s: %d\n",
  1543. oh->name, oh->clkdm->name, r);
  1544. return r;
  1545. }
  1546. }
  1547. _enable_clocks(oh);
  1548. _enable_module(oh);
  1549. r = _wait_target_ready(oh);
  1550. if (!r) {
  1551. /*
  1552. * Set the clockdomain to HW_AUTO only if the target is ready,
  1553. * assuming that the previous state was HW_AUTO
  1554. */
  1555. if (oh->clkdm && hwsup)
  1556. clkdm_allow_idle(oh->clkdm);
  1557. oh->_state = _HWMOD_STATE_ENABLED;
  1558. /* Access the sysconfig only if the target is ready */
  1559. if (oh->class->sysc) {
  1560. if (!(oh->_int_flags & _HWMOD_SYSCONFIG_LOADED))
  1561. _update_sysc_cache(oh);
  1562. _enable_sysc(oh);
  1563. }
  1564. } else {
  1565. _disable_clocks(oh);
  1566. pr_debug("omap_hwmod: %s: _wait_target_ready: %d\n",
  1567. oh->name, r);
  1568. if (oh->clkdm)
  1569. clkdm_hwmod_disable(oh->clkdm, oh);
  1570. }
  1571. return r;
  1572. }
  1573. /**
  1574. * _idle - idle an omap_hwmod
  1575. * @oh: struct omap_hwmod *
  1576. *
  1577. * Idles an omap_hwmod @oh. This should be called once the hwmod has
  1578. * no further work. Returns -EINVAL if the hwmod is in the wrong
  1579. * state or returns 0.
  1580. */
  1581. static int _idle(struct omap_hwmod *oh)
  1582. {
  1583. pr_debug("omap_hwmod: %s: idling\n", oh->name);
  1584. if (oh->_state != _HWMOD_STATE_ENABLED) {
  1585. WARN(1, "omap_hwmod: %s: idle state can only be entered from enabled state\n",
  1586. oh->name);
  1587. return -EINVAL;
  1588. }
  1589. if (_are_any_hardreset_lines_asserted(oh))
  1590. return 0;
  1591. if (oh->class->sysc)
  1592. _idle_sysc(oh);
  1593. _del_initiator_dep(oh, mpu_oh);
  1594. _omap4_disable_module(oh);
  1595. /*
  1596. * The module must be in idle mode before disabling any parents
  1597. * clocks. Otherwise, the parent clock might be disabled before
  1598. * the module transition is done, and thus will prevent the
  1599. * transition to complete properly.
  1600. */
  1601. _disable_clocks(oh);
  1602. if (oh->clkdm)
  1603. clkdm_hwmod_disable(oh->clkdm, oh);
  1604. /* Mux pins for device idle if populated */
  1605. if (oh->mux && oh->mux->pads_dynamic)
  1606. omap_hwmod_mux(oh->mux, _HWMOD_STATE_IDLE);
  1607. oh->_state = _HWMOD_STATE_IDLE;
  1608. return 0;
  1609. }
  1610. /**
  1611. * omap_hwmod_set_ocp_autoidle - set the hwmod's OCP autoidle bit
  1612. * @oh: struct omap_hwmod *
  1613. * @autoidle: desired AUTOIDLE bitfield value (0 or 1)
  1614. *
  1615. * Sets the IP block's OCP autoidle bit in hardware, and updates our
  1616. * local copy. Intended to be used by drivers that require
  1617. * direct manipulation of the AUTOIDLE bits.
  1618. * Returns -EINVAL if @oh is null or is not in the ENABLED state, or passes
  1619. * along the return value from _set_module_autoidle().
  1620. *
  1621. * Any users of this function should be scrutinized carefully.
  1622. */
  1623. int omap_hwmod_set_ocp_autoidle(struct omap_hwmod *oh, u8 autoidle)
  1624. {
  1625. u32 v;
  1626. int retval = 0;
  1627. unsigned long flags;
  1628. if (!oh || oh->_state != _HWMOD_STATE_ENABLED)
  1629. return -EINVAL;
  1630. spin_lock_irqsave(&oh->_lock, flags);
  1631. v = oh->_sysc_cache;
  1632. retval = _set_module_autoidle(oh, autoidle, &v);
  1633. if (!retval)
  1634. _write_sysconfig(v, oh);
  1635. spin_unlock_irqrestore(&oh->_lock, flags);
  1636. return retval;
  1637. }
  1638. /**
  1639. * _shutdown - shutdown an omap_hwmod
  1640. * @oh: struct omap_hwmod *
  1641. *
  1642. * Shut down an omap_hwmod @oh. This should be called when the driver
  1643. * used for the hwmod is removed or unloaded or if the driver is not
  1644. * used by the system. Returns -EINVAL if the hwmod is in the wrong
  1645. * state or returns 0.
  1646. */
  1647. static int _shutdown(struct omap_hwmod *oh)
  1648. {
  1649. int ret, i;
  1650. u8 prev_state;
  1651. if (oh->_state != _HWMOD_STATE_IDLE &&
  1652. oh->_state != _HWMOD_STATE_ENABLED) {
  1653. WARN(1, "omap_hwmod: %s: disabled state can only be entered from idle, or enabled state\n",
  1654. oh->name);
  1655. return -EINVAL;
  1656. }
  1657. if (_are_any_hardreset_lines_asserted(oh))
  1658. return 0;
  1659. pr_debug("omap_hwmod: %s: disabling\n", oh->name);
  1660. if (oh->class->pre_shutdown) {
  1661. prev_state = oh->_state;
  1662. if (oh->_state == _HWMOD_STATE_IDLE)
  1663. _enable(oh);
  1664. ret = oh->class->pre_shutdown(oh);
  1665. if (ret) {
  1666. if (prev_state == _HWMOD_STATE_IDLE)
  1667. _idle(oh);
  1668. return ret;
  1669. }
  1670. }
  1671. if (oh->class->sysc) {
  1672. if (oh->_state == _HWMOD_STATE_IDLE)
  1673. _enable(oh);
  1674. _shutdown_sysc(oh);
  1675. }
  1676. /* clocks and deps are already disabled in idle */
  1677. if (oh->_state == _HWMOD_STATE_ENABLED) {
  1678. _del_initiator_dep(oh, mpu_oh);
  1679. /* XXX what about the other system initiators here? dma, dsp */
  1680. _omap4_disable_module(oh);
  1681. _disable_clocks(oh);
  1682. if (oh->clkdm)
  1683. clkdm_hwmod_disable(oh->clkdm, oh);
  1684. }
  1685. /* XXX Should this code also force-disable the optional clocks? */
  1686. for (i = 0; i < oh->rst_lines_cnt; i++)
  1687. _assert_hardreset(oh, oh->rst_lines[i].name);
  1688. /* Mux pins to safe mode or use populated off mode values */
  1689. if (oh->mux)
  1690. omap_hwmod_mux(oh->mux, _HWMOD_STATE_DISABLED);
  1691. oh->_state = _HWMOD_STATE_DISABLED;
  1692. return 0;
  1693. }
  1694. /**
  1695. * _init_mpu_rt_base - populate the virtual address for a hwmod
  1696. * @oh: struct omap_hwmod * to locate the virtual address
  1697. *
  1698. * Cache the virtual address used by the MPU to access this IP block's
  1699. * registers. This address is needed early so the OCP registers that
  1700. * are part of the device's address space can be ioremapped properly.
  1701. * No return value.
  1702. */
  1703. static void __init _init_mpu_rt_base(struct omap_hwmod *oh, void *data)
  1704. {
  1705. struct omap_hwmod_addr_space *mem;
  1706. void __iomem *va_start;
  1707. if (!oh)
  1708. return;
  1709. _save_mpu_port_index(oh);
  1710. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  1711. return;
  1712. mem = _find_mpu_rt_addr_space(oh);
  1713. if (!mem) {
  1714. pr_debug("omap_hwmod: %s: no MPU register target found\n",
  1715. oh->name);
  1716. return;
  1717. }
  1718. va_start = ioremap(mem->pa_start, mem->pa_end - mem->pa_start);
  1719. if (!va_start) {
  1720. pr_err("omap_hwmod: %s: Could not ioremap\n", oh->name);
  1721. return;
  1722. }
  1723. pr_debug("omap_hwmod: %s: MPU register target at va %p\n",
  1724. oh->name, va_start);
  1725. oh->_mpu_rt_va = va_start;
  1726. }
  1727. /**
  1728. * _init - initialize internal data for the hwmod @oh
  1729. * @oh: struct omap_hwmod *
  1730. * @n: (unused)
  1731. *
  1732. * Look up the clocks and the address space used by the MPU to access
  1733. * registers belonging to the hwmod @oh. @oh must already be
  1734. * registered at this point. This is the first of two phases for
  1735. * hwmod initialization. Code called here does not touch any hardware
  1736. * registers, it simply prepares internal data structures. Returns 0
  1737. * upon success or if the hwmod isn't registered, or -EINVAL upon
  1738. * failure.
  1739. */
  1740. static int __init _init(struct omap_hwmod *oh, void *data)
  1741. {
  1742. int r;
  1743. if (oh->_state != _HWMOD_STATE_REGISTERED)
  1744. return 0;
  1745. _init_mpu_rt_base(oh, NULL);
  1746. r = _init_clocks(oh, NULL);
  1747. if (IS_ERR_VALUE(r)) {
  1748. WARN(1, "omap_hwmod: %s: couldn't init clocks\n", oh->name);
  1749. return -EINVAL;
  1750. }
  1751. oh->_state = _HWMOD_STATE_INITIALIZED;
  1752. return 0;
  1753. }
  1754. /**
  1755. * _setup_iclk_autoidle - configure an IP block's interface clocks
  1756. * @oh: struct omap_hwmod *
  1757. *
  1758. * Set up the module's interface clocks. XXX This function is still mostly
  1759. * a stub; implementing this properly requires iclk autoidle usecounting in
  1760. * the clock code. No return value.
  1761. */
  1762. static void __init _setup_iclk_autoidle(struct omap_hwmod *oh)
  1763. {
  1764. struct omap_hwmod_ocp_if *os;
  1765. struct list_head *p;
  1766. int i = 0;
  1767. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  1768. return;
  1769. p = oh->slave_ports.next;
  1770. while (i < oh->slaves_cnt) {
  1771. os = _fetch_next_ocp_if(&p, &i);
  1772. if (!os->_clk)
  1773. continue;
  1774. if (os->flags & OCPIF_SWSUP_IDLE) {
  1775. /* XXX omap_iclk_deny_idle(c); */
  1776. } else {
  1777. /* XXX omap_iclk_allow_idle(c); */
  1778. clk_enable(os->_clk);
  1779. }
  1780. }
  1781. return;
  1782. }
  1783. /**
  1784. * _setup_reset - reset an IP block during the setup process
  1785. * @oh: struct omap_hwmod *
  1786. *
  1787. * Reset the IP block corresponding to the hwmod @oh during the setup
  1788. * process. The IP block is first enabled so it can be successfully
  1789. * reset. Returns 0 upon success or a negative error code upon
  1790. * failure.
  1791. */
  1792. static int __init _setup_reset(struct omap_hwmod *oh)
  1793. {
  1794. int r;
  1795. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  1796. return -EINVAL;
  1797. if (oh->rst_lines_cnt == 0) {
  1798. r = _enable(oh);
  1799. if (r) {
  1800. pr_warning("omap_hwmod: %s: cannot be enabled for reset (%d)\n",
  1801. oh->name, oh->_state);
  1802. return -EINVAL;
  1803. }
  1804. }
  1805. if (!(oh->flags & HWMOD_INIT_NO_RESET))
  1806. r = _reset(oh);
  1807. return r;
  1808. }
  1809. /**
  1810. * _setup_postsetup - transition to the appropriate state after _setup
  1811. * @oh: struct omap_hwmod *
  1812. *
  1813. * Place an IP block represented by @oh into a "post-setup" state --
  1814. * either IDLE, ENABLED, or DISABLED. ("post-setup" simply means that
  1815. * this function is called at the end of _setup().) The postsetup
  1816. * state for an IP block can be changed by calling
  1817. * omap_hwmod_enter_postsetup_state() early in the boot process,
  1818. * before one of the omap_hwmod_setup*() functions are called for the
  1819. * IP block.
  1820. *
  1821. * The IP block stays in this state until a PM runtime-based driver is
  1822. * loaded for that IP block. A post-setup state of IDLE is
  1823. * appropriate for almost all IP blocks with runtime PM-enabled
  1824. * drivers, since those drivers are able to enable the IP block. A
  1825. * post-setup state of ENABLED is appropriate for kernels with PM
  1826. * runtime disabled. The DISABLED state is appropriate for unusual IP
  1827. * blocks such as the MPU WDTIMER on kernels without WDTIMER drivers
  1828. * included, since the WDTIMER starts running on reset and will reset
  1829. * the MPU if left active.
  1830. *
  1831. * This post-setup mechanism is deprecated. Once all of the OMAP
  1832. * drivers have been converted to use PM runtime, and all of the IP
  1833. * block data and interconnect data is available to the hwmod code, it
  1834. * should be possible to replace this mechanism with a "lazy reset"
  1835. * arrangement. In a "lazy reset" setup, each IP block is enabled
  1836. * when the driver first probes, then all remaining IP blocks without
  1837. * drivers are either shut down or enabled after the drivers have
  1838. * loaded. However, this cannot take place until the above
  1839. * preconditions have been met, since otherwise the late reset code
  1840. * has no way of knowing which IP blocks are in use by drivers, and
  1841. * which ones are unused.
  1842. *
  1843. * No return value.
  1844. */
  1845. static void __init _setup_postsetup(struct omap_hwmod *oh)
  1846. {
  1847. u8 postsetup_state;
  1848. if (oh->rst_lines_cnt > 0)
  1849. return;
  1850. postsetup_state = oh->_postsetup_state;
  1851. if (postsetup_state == _HWMOD_STATE_UNKNOWN)
  1852. postsetup_state = _HWMOD_STATE_ENABLED;
  1853. /*
  1854. * XXX HWMOD_INIT_NO_IDLE does not belong in hwmod data -
  1855. * it should be set by the core code as a runtime flag during startup
  1856. */
  1857. if ((oh->flags & HWMOD_INIT_NO_IDLE) &&
  1858. (postsetup_state == _HWMOD_STATE_IDLE)) {
  1859. oh->_int_flags |= _HWMOD_SKIP_ENABLE;
  1860. postsetup_state = _HWMOD_STATE_ENABLED;
  1861. }
  1862. if (postsetup_state == _HWMOD_STATE_IDLE)
  1863. _idle(oh);
  1864. else if (postsetup_state == _HWMOD_STATE_DISABLED)
  1865. _shutdown(oh);
  1866. else if (postsetup_state != _HWMOD_STATE_ENABLED)
  1867. WARN(1, "hwmod: %s: unknown postsetup state %d! defaulting to enabled\n",
  1868. oh->name, postsetup_state);
  1869. return;
  1870. }
  1871. /**
  1872. * _setup - prepare IP block hardware for use
  1873. * @oh: struct omap_hwmod *
  1874. * @n: (unused, pass NULL)
  1875. *
  1876. * Configure the IP block represented by @oh. This may include
  1877. * enabling the IP block, resetting it, and placing it into a
  1878. * post-setup state, depending on the type of IP block and applicable
  1879. * flags. IP blocks are reset to prevent any previous configuration
  1880. * by the bootloader or previous operating system from interfering
  1881. * with power management or other parts of the system. The reset can
  1882. * be avoided; see omap_hwmod_no_setup_reset(). This is the second of
  1883. * two phases for hwmod initialization. Code called here generally
  1884. * affects the IP block hardware, or system integration hardware
  1885. * associated with the IP block. Returns 0.
  1886. */
  1887. static int __init _setup(struct omap_hwmod *oh, void *data)
  1888. {
  1889. if (oh->_state != _HWMOD_STATE_INITIALIZED)
  1890. return 0;
  1891. _setup_iclk_autoidle(oh);
  1892. if (!_setup_reset(oh))
  1893. _setup_postsetup(oh);
  1894. return 0;
  1895. }
  1896. /**
  1897. * _register - register a struct omap_hwmod
  1898. * @oh: struct omap_hwmod *
  1899. *
  1900. * Registers the omap_hwmod @oh. Returns -EEXIST if an omap_hwmod
  1901. * already has been registered by the same name; -EINVAL if the
  1902. * omap_hwmod is in the wrong state, if @oh is NULL, if the
  1903. * omap_hwmod's class field is NULL; if the omap_hwmod is missing a
  1904. * name, or if the omap_hwmod's class is missing a name; or 0 upon
  1905. * success.
  1906. *
  1907. * XXX The data should be copied into bootmem, so the original data
  1908. * should be marked __initdata and freed after init. This would allow
  1909. * unneeded omap_hwmods to be freed on multi-OMAP configurations. Note
  1910. * that the copy process would be relatively complex due to the large number
  1911. * of substructures.
  1912. */
  1913. static int __init _register(struct omap_hwmod *oh)
  1914. {
  1915. if (!oh || !oh->name || !oh->class || !oh->class->name ||
  1916. (oh->_state != _HWMOD_STATE_UNKNOWN))
  1917. return -EINVAL;
  1918. pr_debug("omap_hwmod: %s: registering\n", oh->name);
  1919. if (_lookup(oh->name))
  1920. return -EEXIST;
  1921. list_add_tail(&oh->node, &omap_hwmod_list);
  1922. INIT_LIST_HEAD(&oh->master_ports);
  1923. INIT_LIST_HEAD(&oh->slave_ports);
  1924. spin_lock_init(&oh->_lock);
  1925. oh->_state = _HWMOD_STATE_REGISTERED;
  1926. /*
  1927. * XXX Rather than doing a strcmp(), this should test a flag
  1928. * set in the hwmod data, inserted by the autogenerator code.
  1929. */
  1930. if (!strcmp(oh->name, MPU_INITIATOR_NAME))
  1931. mpu_oh = oh;
  1932. return 0;
  1933. }
  1934. /**
  1935. * _alloc_links - return allocated memory for hwmod links
  1936. * @ml: pointer to a struct omap_hwmod_link * for the master link
  1937. * @sl: pointer to a struct omap_hwmod_link * for the slave link
  1938. *
  1939. * Return pointers to two struct omap_hwmod_link records, via the
  1940. * addresses pointed to by @ml and @sl. Will first attempt to return
  1941. * memory allocated as part of a large initial block, but if that has
  1942. * been exhausted, will allocate memory itself. Since ideally this
  1943. * second allocation path will never occur, the number of these
  1944. * 'supplemental' allocations will be logged when debugging is
  1945. * enabled. Returns 0.
  1946. */
  1947. static int __init _alloc_links(struct omap_hwmod_link **ml,
  1948. struct omap_hwmod_link **sl)
  1949. {
  1950. unsigned int sz;
  1951. if ((free_ls + LINKS_PER_OCP_IF) <= max_ls) {
  1952. *ml = &linkspace[free_ls++];
  1953. *sl = &linkspace[free_ls++];
  1954. return 0;
  1955. }
  1956. sz = sizeof(struct omap_hwmod_link) * LINKS_PER_OCP_IF;
  1957. *sl = NULL;
  1958. *ml = alloc_bootmem(sz);
  1959. memset(*ml, 0, sz);
  1960. *sl = (void *)(*ml) + sizeof(struct omap_hwmod_link);
  1961. ls_supp++;
  1962. pr_debug("omap_hwmod: supplemental link allocations needed: %d\n",
  1963. ls_supp * LINKS_PER_OCP_IF);
  1964. return 0;
  1965. };
  1966. /**
  1967. * _add_link - add an interconnect between two IP blocks
  1968. * @oi: pointer to a struct omap_hwmod_ocp_if record
  1969. *
  1970. * Add struct omap_hwmod_link records connecting the master IP block
  1971. * specified in @oi->master to @oi, and connecting the slave IP block
  1972. * specified in @oi->slave to @oi. This code is assumed to run before
  1973. * preemption or SMP has been enabled, thus avoiding the need for
  1974. * locking in this code. Changes to this assumption will require
  1975. * additional locking. Returns 0.
  1976. */
  1977. static int __init _add_link(struct omap_hwmod_ocp_if *oi)
  1978. {
  1979. struct omap_hwmod_link *ml, *sl;
  1980. pr_debug("omap_hwmod: %s -> %s: adding link\n", oi->master->name,
  1981. oi->slave->name);
  1982. _alloc_links(&ml, &sl);
  1983. ml->ocp_if = oi;
  1984. INIT_LIST_HEAD(&ml->node);
  1985. list_add(&ml->node, &oi->master->master_ports);
  1986. oi->master->masters_cnt++;
  1987. sl->ocp_if = oi;
  1988. INIT_LIST_HEAD(&sl->node);
  1989. list_add(&sl->node, &oi->slave->slave_ports);
  1990. oi->slave->slaves_cnt++;
  1991. return 0;
  1992. }
  1993. /**
  1994. * _register_link - register a struct omap_hwmod_ocp_if
  1995. * @oi: struct omap_hwmod_ocp_if *
  1996. *
  1997. * Registers the omap_hwmod_ocp_if record @oi. Returns -EEXIST if it
  1998. * has already been registered; -EINVAL if @oi is NULL or if the
  1999. * record pointed to by @oi is missing required fields; or 0 upon
  2000. * success.
  2001. *
  2002. * XXX The data should be copied into bootmem, so the original data
  2003. * should be marked __initdata and freed after init. This would allow
  2004. * unneeded omap_hwmods to be freed on multi-OMAP configurations.
  2005. */
  2006. static int __init _register_link(struct omap_hwmod_ocp_if *oi)
  2007. {
  2008. if (!oi || !oi->master || !oi->slave || !oi->user)
  2009. return -EINVAL;
  2010. if (oi->_int_flags & _OCPIF_INT_FLAGS_REGISTERED)
  2011. return -EEXIST;
  2012. pr_debug("omap_hwmod: registering link from %s to %s\n",
  2013. oi->master->name, oi->slave->name);
  2014. /*
  2015. * Register the connected hwmods, if they haven't been
  2016. * registered already
  2017. */
  2018. if (oi->master->_state != _HWMOD_STATE_REGISTERED)
  2019. _register(oi->master);
  2020. if (oi->slave->_state != _HWMOD_STATE_REGISTERED)
  2021. _register(oi->slave);
  2022. _add_link(oi);
  2023. oi->_int_flags |= _OCPIF_INT_FLAGS_REGISTERED;
  2024. return 0;
  2025. }
  2026. /**
  2027. * _alloc_linkspace - allocate large block of hwmod links
  2028. * @ois: pointer to an array of struct omap_hwmod_ocp_if records to count
  2029. *
  2030. * Allocate a large block of struct omap_hwmod_link records. This
  2031. * improves boot time significantly by avoiding the need to allocate
  2032. * individual records one by one. If the number of records to
  2033. * allocate in the block hasn't been manually specified, this function
  2034. * will count the number of struct omap_hwmod_ocp_if records in @ois
  2035. * and use that to determine the allocation size. For SoC families
  2036. * that require multiple list registrations, such as OMAP3xxx, this
  2037. * estimation process isn't optimal, so manual estimation is advised
  2038. * in those cases. Returns -EEXIST if the allocation has already occurred
  2039. * or 0 upon success.
  2040. */
  2041. static int __init _alloc_linkspace(struct omap_hwmod_ocp_if **ois)
  2042. {
  2043. unsigned int i = 0;
  2044. unsigned int sz;
  2045. if (linkspace) {
  2046. WARN(1, "linkspace already allocated\n");
  2047. return -EEXIST;
  2048. }
  2049. if (max_ls == 0)
  2050. while (ois[i++])
  2051. max_ls += LINKS_PER_OCP_IF;
  2052. sz = sizeof(struct omap_hwmod_link) * max_ls;
  2053. pr_debug("omap_hwmod: %s: allocating %d byte linkspace (%d links)\n",
  2054. __func__, sz, max_ls);
  2055. linkspace = alloc_bootmem(sz);
  2056. memset(linkspace, 0, sz);
  2057. return 0;
  2058. }
  2059. /* Public functions */
  2060. u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs)
  2061. {
  2062. if (oh->flags & HWMOD_16BIT_REG)
  2063. return __raw_readw(oh->_mpu_rt_va + reg_offs);
  2064. else
  2065. return __raw_readl(oh->_mpu_rt_va + reg_offs);
  2066. }
  2067. void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs)
  2068. {
  2069. if (oh->flags & HWMOD_16BIT_REG)
  2070. __raw_writew(v, oh->_mpu_rt_va + reg_offs);
  2071. else
  2072. __raw_writel(v, oh->_mpu_rt_va + reg_offs);
  2073. }
  2074. /**
  2075. * omap_hwmod_softreset - reset a module via SYSCONFIG.SOFTRESET bit
  2076. * @oh: struct omap_hwmod *
  2077. *
  2078. * This is a public function exposed to drivers. Some drivers may need to do
  2079. * some settings before and after resetting the device. Those drivers after
  2080. * doing the necessary settings could use this function to start a reset by
  2081. * setting the SYSCONFIG.SOFTRESET bit.
  2082. */
  2083. int omap_hwmod_softreset(struct omap_hwmod *oh)
  2084. {
  2085. u32 v;
  2086. int ret;
  2087. if (!oh || !(oh->_sysc_cache))
  2088. return -EINVAL;
  2089. v = oh->_sysc_cache;
  2090. ret = _set_softreset(oh, &v);
  2091. if (ret)
  2092. goto error;
  2093. _write_sysconfig(v, oh);
  2094. error:
  2095. return ret;
  2096. }
  2097. /**
  2098. * omap_hwmod_set_slave_idlemode - set the hwmod's OCP slave idlemode
  2099. * @oh: struct omap_hwmod *
  2100. * @idlemode: SIDLEMODE field bits (shifted to bit 0)
  2101. *
  2102. * Sets the IP block's OCP slave idlemode in hardware, and updates our
  2103. * local copy. Intended to be used by drivers that have some erratum
  2104. * that requires direct manipulation of the SIDLEMODE bits. Returns
  2105. * -EINVAL if @oh is null, or passes along the return value from
  2106. * _set_slave_idlemode().
  2107. *
  2108. * XXX Does this function have any current users? If not, we should
  2109. * remove it; it is better to let the rest of the hwmod code handle this.
  2110. * Any users of this function should be scrutinized carefully.
  2111. */
  2112. int omap_hwmod_set_slave_idlemode(struct omap_hwmod *oh, u8 idlemode)
  2113. {
  2114. u32 v;
  2115. int retval = 0;
  2116. if (!oh)
  2117. return -EINVAL;
  2118. v = oh->_sysc_cache;
  2119. retval = _set_slave_idlemode(oh, idlemode, &v);
  2120. if (!retval)
  2121. _write_sysconfig(v, oh);
  2122. return retval;
  2123. }
  2124. /**
  2125. * omap_hwmod_lookup - look up a registered omap_hwmod by name
  2126. * @name: name of the omap_hwmod to look up
  2127. *
  2128. * Given a @name of an omap_hwmod, return a pointer to the registered
  2129. * struct omap_hwmod *, or NULL upon error.
  2130. */
  2131. struct omap_hwmod *omap_hwmod_lookup(const char *name)
  2132. {
  2133. struct omap_hwmod *oh;
  2134. if (!name)
  2135. return NULL;
  2136. oh = _lookup(name);
  2137. return oh;
  2138. }
  2139. /**
  2140. * omap_hwmod_for_each - call function for each registered omap_hwmod
  2141. * @fn: pointer to a callback function
  2142. * @data: void * data to pass to callback function
  2143. *
  2144. * Call @fn for each registered omap_hwmod, passing @data to each
  2145. * function. @fn must return 0 for success or any other value for
  2146. * failure. If @fn returns non-zero, the iteration across omap_hwmods
  2147. * will stop and the non-zero return value will be passed to the
  2148. * caller of omap_hwmod_for_each(). @fn is called with
  2149. * omap_hwmod_for_each() held.
  2150. */
  2151. int omap_hwmod_for_each(int (*fn)(struct omap_hwmod *oh, void *data),
  2152. void *data)
  2153. {
  2154. struct omap_hwmod *temp_oh;
  2155. int ret = 0;
  2156. if (!fn)
  2157. return -EINVAL;
  2158. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  2159. ret = (*fn)(temp_oh, data);
  2160. if (ret)
  2161. break;
  2162. }
  2163. return ret;
  2164. }
  2165. /**
  2166. * omap_hwmod_register_links - register an array of hwmod links
  2167. * @ois: pointer to an array of omap_hwmod_ocp_if to register
  2168. *
  2169. * Intended to be called early in boot before the clock framework is
  2170. * initialized. If @ois is not null, will register all omap_hwmods
  2171. * listed in @ois that are valid for this chip. Returns 0.
  2172. */
  2173. int __init omap_hwmod_register_links(struct omap_hwmod_ocp_if **ois)
  2174. {
  2175. int r, i;
  2176. if (!ois)
  2177. return 0;
  2178. if (!linkspace) {
  2179. if (_alloc_linkspace(ois)) {
  2180. pr_err("omap_hwmod: could not allocate link space\n");
  2181. return -ENOMEM;
  2182. }
  2183. }
  2184. i = 0;
  2185. do {
  2186. r = _register_link(ois[i]);
  2187. WARN(r && r != -EEXIST,
  2188. "omap_hwmod: _register_link(%s -> %s) returned %d\n",
  2189. ois[i]->master->name, ois[i]->slave->name, r);
  2190. } while (ois[++i]);
  2191. return 0;
  2192. }
  2193. /**
  2194. * _ensure_mpu_hwmod_is_setup - ensure the MPU SS hwmod is init'ed and set up
  2195. * @oh: pointer to the hwmod currently being set up (usually not the MPU)
  2196. *
  2197. * If the hwmod data corresponding to the MPU subsystem IP block
  2198. * hasn't been initialized and set up yet, do so now. This must be
  2199. * done first since sleep dependencies may be added from other hwmods
  2200. * to the MPU. Intended to be called only by omap_hwmod_setup*(). No
  2201. * return value.
  2202. */
  2203. static void __init _ensure_mpu_hwmod_is_setup(struct omap_hwmod *oh)
  2204. {
  2205. if (!mpu_oh || mpu_oh->_state == _HWMOD_STATE_UNKNOWN)
  2206. pr_err("omap_hwmod: %s: MPU initiator hwmod %s not yet registered\n",
  2207. __func__, MPU_INITIATOR_NAME);
  2208. else if (mpu_oh->_state == _HWMOD_STATE_REGISTERED && oh != mpu_oh)
  2209. omap_hwmod_setup_one(MPU_INITIATOR_NAME);
  2210. }
  2211. /**
  2212. * omap_hwmod_setup_one - set up a single hwmod
  2213. * @oh_name: const char * name of the already-registered hwmod to set up
  2214. *
  2215. * Initialize and set up a single hwmod. Intended to be used for a
  2216. * small number of early devices, such as the timer IP blocks used for
  2217. * the scheduler clock. Must be called after omap2_clk_init().
  2218. * Resolves the struct clk names to struct clk pointers for each
  2219. * registered omap_hwmod. Also calls _setup() on each hwmod. Returns
  2220. * -EINVAL upon error or 0 upon success.
  2221. */
  2222. int __init omap_hwmod_setup_one(const char *oh_name)
  2223. {
  2224. struct omap_hwmod *oh;
  2225. pr_debug("omap_hwmod: %s: %s\n", oh_name, __func__);
  2226. oh = _lookup(oh_name);
  2227. if (!oh) {
  2228. WARN(1, "omap_hwmod: %s: hwmod not yet registered\n", oh_name);
  2229. return -EINVAL;
  2230. }
  2231. _ensure_mpu_hwmod_is_setup(oh);
  2232. _init(oh, NULL);
  2233. _setup(oh, NULL);
  2234. return 0;
  2235. }
  2236. /**
  2237. * omap_hwmod_setup_all - set up all registered IP blocks
  2238. *
  2239. * Initialize and set up all IP blocks registered with the hwmod code.
  2240. * Must be called after omap2_clk_init(). Resolves the struct clk
  2241. * names to struct clk pointers for each registered omap_hwmod. Also
  2242. * calls _setup() on each hwmod. Returns 0 upon success.
  2243. */
  2244. static int __init omap_hwmod_setup_all(void)
  2245. {
  2246. _ensure_mpu_hwmod_is_setup(NULL);
  2247. omap_hwmod_for_each(_init, NULL);
  2248. omap_hwmod_for_each(_setup, NULL);
  2249. return 0;
  2250. }
  2251. core_initcall(omap_hwmod_setup_all);
  2252. /**
  2253. * omap_hwmod_enable - enable an omap_hwmod
  2254. * @oh: struct omap_hwmod *
  2255. *
  2256. * Enable an omap_hwmod @oh. Intended to be called by omap_device_enable().
  2257. * Returns -EINVAL on error or passes along the return value from _enable().
  2258. */
  2259. int omap_hwmod_enable(struct omap_hwmod *oh)
  2260. {
  2261. int r;
  2262. unsigned long flags;
  2263. if (!oh)
  2264. return -EINVAL;
  2265. spin_lock_irqsave(&oh->_lock, flags);
  2266. r = _enable(oh);
  2267. spin_unlock_irqrestore(&oh->_lock, flags);
  2268. return r;
  2269. }
  2270. /**
  2271. * omap_hwmod_idle - idle an omap_hwmod
  2272. * @oh: struct omap_hwmod *
  2273. *
  2274. * Idle an omap_hwmod @oh. Intended to be called by omap_device_idle().
  2275. * Returns -EINVAL on error or passes along the return value from _idle().
  2276. */
  2277. int omap_hwmod_idle(struct omap_hwmod *oh)
  2278. {
  2279. unsigned long flags;
  2280. if (!oh)
  2281. return -EINVAL;
  2282. spin_lock_irqsave(&oh->_lock, flags);
  2283. _idle(oh);
  2284. spin_unlock_irqrestore(&oh->_lock, flags);
  2285. return 0;
  2286. }
  2287. /**
  2288. * omap_hwmod_shutdown - shutdown an omap_hwmod
  2289. * @oh: struct omap_hwmod *
  2290. *
  2291. * Shutdown an omap_hwmod @oh. Intended to be called by
  2292. * omap_device_shutdown(). Returns -EINVAL on error or passes along
  2293. * the return value from _shutdown().
  2294. */
  2295. int omap_hwmod_shutdown(struct omap_hwmod *oh)
  2296. {
  2297. unsigned long flags;
  2298. if (!oh)
  2299. return -EINVAL;
  2300. spin_lock_irqsave(&oh->_lock, flags);
  2301. _shutdown(oh);
  2302. spin_unlock_irqrestore(&oh->_lock, flags);
  2303. return 0;
  2304. }
  2305. /**
  2306. * omap_hwmod_enable_clocks - enable main_clk, all interface clocks
  2307. * @oh: struct omap_hwmod *oh
  2308. *
  2309. * Intended to be called by the omap_device code.
  2310. */
  2311. int omap_hwmod_enable_clocks(struct omap_hwmod *oh)
  2312. {
  2313. unsigned long flags;
  2314. spin_lock_irqsave(&oh->_lock, flags);
  2315. _enable_clocks(oh);
  2316. spin_unlock_irqrestore(&oh->_lock, flags);
  2317. return 0;
  2318. }
  2319. /**
  2320. * omap_hwmod_disable_clocks - disable main_clk, all interface clocks
  2321. * @oh: struct omap_hwmod *oh
  2322. *
  2323. * Intended to be called by the omap_device code.
  2324. */
  2325. int omap_hwmod_disable_clocks(struct omap_hwmod *oh)
  2326. {
  2327. unsigned long flags;
  2328. spin_lock_irqsave(&oh->_lock, flags);
  2329. _disable_clocks(oh);
  2330. spin_unlock_irqrestore(&oh->_lock, flags);
  2331. return 0;
  2332. }
  2333. /**
  2334. * omap_hwmod_ocp_barrier - wait for posted writes against the hwmod to complete
  2335. * @oh: struct omap_hwmod *oh
  2336. *
  2337. * Intended to be called by drivers and core code when all posted
  2338. * writes to a device must complete before continuing further
  2339. * execution (for example, after clearing some device IRQSTATUS
  2340. * register bits)
  2341. *
  2342. * XXX what about targets with multiple OCP threads?
  2343. */
  2344. void omap_hwmod_ocp_barrier(struct omap_hwmod *oh)
  2345. {
  2346. BUG_ON(!oh);
  2347. if (!oh->class->sysc || !oh->class->sysc->sysc_flags) {
  2348. WARN(1, "omap_device: %s: OCP barrier impossible due to device configuration\n",
  2349. oh->name);
  2350. return;
  2351. }
  2352. /*
  2353. * Forces posted writes to complete on the OCP thread handling
  2354. * register writes
  2355. */
  2356. omap_hwmod_read(oh, oh->class->sysc->sysc_offs);
  2357. }
  2358. /**
  2359. * omap_hwmod_reset - reset the hwmod
  2360. * @oh: struct omap_hwmod *
  2361. *
  2362. * Under some conditions, a driver may wish to reset the entire device.
  2363. * Called from omap_device code. Returns -EINVAL on error or passes along
  2364. * the return value from _reset().
  2365. */
  2366. int omap_hwmod_reset(struct omap_hwmod *oh)
  2367. {
  2368. int r;
  2369. unsigned long flags;
  2370. if (!oh)
  2371. return -EINVAL;
  2372. spin_lock_irqsave(&oh->_lock, flags);
  2373. r = _reset(oh);
  2374. spin_unlock_irqrestore(&oh->_lock, flags);
  2375. return r;
  2376. }
  2377. /*
  2378. * IP block data retrieval functions
  2379. */
  2380. /**
  2381. * omap_hwmod_count_resources - count number of struct resources needed by hwmod
  2382. * @oh: struct omap_hwmod *
  2383. * @res: pointer to the first element of an array of struct resource to fill
  2384. *
  2385. * Count the number of struct resource array elements necessary to
  2386. * contain omap_hwmod @oh resources. Intended to be called by code
  2387. * that registers omap_devices. Intended to be used to determine the
  2388. * size of a dynamically-allocated struct resource array, before
  2389. * calling omap_hwmod_fill_resources(). Returns the number of struct
  2390. * resource array elements needed.
  2391. *
  2392. * XXX This code is not optimized. It could attempt to merge adjacent
  2393. * resource IDs.
  2394. *
  2395. */
  2396. int omap_hwmod_count_resources(struct omap_hwmod *oh)
  2397. {
  2398. struct omap_hwmod_ocp_if *os;
  2399. struct list_head *p;
  2400. int ret;
  2401. int i = 0;
  2402. ret = _count_mpu_irqs(oh) + _count_sdma_reqs(oh);
  2403. p = oh->slave_ports.next;
  2404. while (i < oh->slaves_cnt) {
  2405. os = _fetch_next_ocp_if(&p, &i);
  2406. ret += _count_ocp_if_addr_spaces(os);
  2407. }
  2408. return ret;
  2409. }
  2410. /**
  2411. * omap_hwmod_fill_resources - fill struct resource array with hwmod data
  2412. * @oh: struct omap_hwmod *
  2413. * @res: pointer to the first element of an array of struct resource to fill
  2414. *
  2415. * Fill the struct resource array @res with resource data from the
  2416. * omap_hwmod @oh. Intended to be called by code that registers
  2417. * omap_devices. See also omap_hwmod_count_resources(). Returns the
  2418. * number of array elements filled.
  2419. */
  2420. int omap_hwmod_fill_resources(struct omap_hwmod *oh, struct resource *res)
  2421. {
  2422. struct omap_hwmod_ocp_if *os;
  2423. struct list_head *p;
  2424. int i, j, mpu_irqs_cnt, sdma_reqs_cnt, addr_cnt;
  2425. int r = 0;
  2426. /* For each IRQ, DMA, memory area, fill in array.*/
  2427. mpu_irqs_cnt = _count_mpu_irqs(oh);
  2428. for (i = 0; i < mpu_irqs_cnt; i++) {
  2429. (res + r)->name = (oh->mpu_irqs + i)->name;
  2430. (res + r)->start = (oh->mpu_irqs + i)->irq;
  2431. (res + r)->end = (oh->mpu_irqs + i)->irq;
  2432. (res + r)->flags = IORESOURCE_IRQ;
  2433. r++;
  2434. }
  2435. sdma_reqs_cnt = _count_sdma_reqs(oh);
  2436. for (i = 0; i < sdma_reqs_cnt; i++) {
  2437. (res + r)->name = (oh->sdma_reqs + i)->name;
  2438. (res + r)->start = (oh->sdma_reqs + i)->dma_req;
  2439. (res + r)->end = (oh->sdma_reqs + i)->dma_req;
  2440. (res + r)->flags = IORESOURCE_DMA;
  2441. r++;
  2442. }
  2443. p = oh->slave_ports.next;
  2444. i = 0;
  2445. while (i < oh->slaves_cnt) {
  2446. os = _fetch_next_ocp_if(&p, &i);
  2447. addr_cnt = _count_ocp_if_addr_spaces(os);
  2448. for (j = 0; j < addr_cnt; j++) {
  2449. (res + r)->name = (os->addr + j)->name;
  2450. (res + r)->start = (os->addr + j)->pa_start;
  2451. (res + r)->end = (os->addr + j)->pa_end;
  2452. (res + r)->flags = IORESOURCE_MEM;
  2453. r++;
  2454. }
  2455. }
  2456. return r;
  2457. }
  2458. /**
  2459. * omap_hwmod_get_resource_byname - fetch IP block integration data by name
  2460. * @oh: struct omap_hwmod * to operate on
  2461. * @type: one of the IORESOURCE_* constants from include/linux/ioport.h
  2462. * @name: pointer to the name of the data to fetch (optional)
  2463. * @rsrc: pointer to a struct resource, allocated by the caller
  2464. *
  2465. * Retrieve MPU IRQ, SDMA request line, or address space start/end
  2466. * data for the IP block pointed to by @oh. The data will be filled
  2467. * into a struct resource record pointed to by @rsrc. The struct
  2468. * resource must be allocated by the caller. When @name is non-null,
  2469. * the data associated with the matching entry in the IRQ/SDMA/address
  2470. * space hwmod data arrays will be returned. If @name is null, the
  2471. * first array entry will be returned. Data order is not meaningful
  2472. * in hwmod data, so callers are strongly encouraged to use a non-null
  2473. * @name whenever possible to avoid unpredictable effects if hwmod
  2474. * data is later added that causes data ordering to change. This
  2475. * function is only intended for use by OMAP core code. Device
  2476. * drivers should not call this function - the appropriate bus-related
  2477. * data accessor functions should be used instead. Returns 0 upon
  2478. * success or a negative error code upon error.
  2479. */
  2480. int omap_hwmod_get_resource_byname(struct omap_hwmod *oh, unsigned int type,
  2481. const char *name, struct resource *rsrc)
  2482. {
  2483. int r;
  2484. unsigned int irq, dma;
  2485. u32 pa_start, pa_end;
  2486. if (!oh || !rsrc)
  2487. return -EINVAL;
  2488. if (type == IORESOURCE_IRQ) {
  2489. r = _get_mpu_irq_by_name(oh, name, &irq);
  2490. if (r)
  2491. return r;
  2492. rsrc->start = irq;
  2493. rsrc->end = irq;
  2494. } else if (type == IORESOURCE_DMA) {
  2495. r = _get_sdma_req_by_name(oh, name, &dma);
  2496. if (r)
  2497. return r;
  2498. rsrc->start = dma;
  2499. rsrc->end = dma;
  2500. } else if (type == IORESOURCE_MEM) {
  2501. r = _get_addr_space_by_name(oh, name, &pa_start, &pa_end);
  2502. if (r)
  2503. return r;
  2504. rsrc->start = pa_start;
  2505. rsrc->end = pa_end;
  2506. } else {
  2507. return -EINVAL;
  2508. }
  2509. rsrc->flags = type;
  2510. rsrc->name = name;
  2511. return 0;
  2512. }
  2513. /**
  2514. * omap_hwmod_get_pwrdm - return pointer to this module's main powerdomain
  2515. * @oh: struct omap_hwmod *
  2516. *
  2517. * Return the powerdomain pointer associated with the OMAP module
  2518. * @oh's main clock. If @oh does not have a main clk, return the
  2519. * powerdomain associated with the interface clock associated with the
  2520. * module's MPU port. (XXX Perhaps this should use the SDMA port
  2521. * instead?) Returns NULL on error, or a struct powerdomain * on
  2522. * success.
  2523. */
  2524. struct powerdomain *omap_hwmod_get_pwrdm(struct omap_hwmod *oh)
  2525. {
  2526. struct clk *c;
  2527. struct omap_hwmod_ocp_if *oi;
  2528. if (!oh)
  2529. return NULL;
  2530. if (oh->_clk) {
  2531. c = oh->_clk;
  2532. } else {
  2533. oi = _find_mpu_rt_port(oh);
  2534. if (!oi)
  2535. return NULL;
  2536. c = oi->_clk;
  2537. }
  2538. if (!c->clkdm)
  2539. return NULL;
  2540. return c->clkdm->pwrdm.ptr;
  2541. }
  2542. /**
  2543. * omap_hwmod_get_mpu_rt_va - return the module's base address (for the MPU)
  2544. * @oh: struct omap_hwmod *
  2545. *
  2546. * Returns the virtual address corresponding to the beginning of the
  2547. * module's register target, in the address range that is intended to
  2548. * be used by the MPU. Returns the virtual address upon success or NULL
  2549. * upon error.
  2550. */
  2551. void __iomem *omap_hwmod_get_mpu_rt_va(struct omap_hwmod *oh)
  2552. {
  2553. if (!oh)
  2554. return NULL;
  2555. if (oh->_int_flags & _HWMOD_NO_MPU_PORT)
  2556. return NULL;
  2557. if (oh->_state == _HWMOD_STATE_UNKNOWN)
  2558. return NULL;
  2559. return oh->_mpu_rt_va;
  2560. }
  2561. /**
  2562. * omap_hwmod_add_initiator_dep - add sleepdep from @init_oh to @oh
  2563. * @oh: struct omap_hwmod *
  2564. * @init_oh: struct omap_hwmod * (initiator)
  2565. *
  2566. * Add a sleep dependency between the initiator @init_oh and @oh.
  2567. * Intended to be called by DSP/Bridge code via platform_data for the
  2568. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  2569. * code needs to add/del initiator dependencies dynamically
  2570. * before/after accessing a device. Returns the return value from
  2571. * _add_initiator_dep().
  2572. *
  2573. * XXX Keep a usecount in the clockdomain code
  2574. */
  2575. int omap_hwmod_add_initiator_dep(struct omap_hwmod *oh,
  2576. struct omap_hwmod *init_oh)
  2577. {
  2578. return _add_initiator_dep(oh, init_oh);
  2579. }
  2580. /*
  2581. * XXX what about functions for drivers to save/restore ocp_sysconfig
  2582. * for context save/restore operations?
  2583. */
  2584. /**
  2585. * omap_hwmod_del_initiator_dep - remove sleepdep from @init_oh to @oh
  2586. * @oh: struct omap_hwmod *
  2587. * @init_oh: struct omap_hwmod * (initiator)
  2588. *
  2589. * Remove a sleep dependency between the initiator @init_oh and @oh.
  2590. * Intended to be called by DSP/Bridge code via platform_data for the
  2591. * DSP case; and by the DMA code in the sDMA case. DMA code, *Bridge
  2592. * code needs to add/del initiator dependencies dynamically
  2593. * before/after accessing a device. Returns the return value from
  2594. * _del_initiator_dep().
  2595. *
  2596. * XXX Keep a usecount in the clockdomain code
  2597. */
  2598. int omap_hwmod_del_initiator_dep(struct omap_hwmod *oh,
  2599. struct omap_hwmod *init_oh)
  2600. {
  2601. return _del_initiator_dep(oh, init_oh);
  2602. }
  2603. /**
  2604. * omap_hwmod_enable_wakeup - allow device to wake up the system
  2605. * @oh: struct omap_hwmod *
  2606. *
  2607. * Sets the module OCP socket ENAWAKEUP bit to allow the module to
  2608. * send wakeups to the PRCM, and enable I/O ring wakeup events for
  2609. * this IP block if it has dynamic mux entries. Eventually this
  2610. * should set PRCM wakeup registers to cause the PRCM to receive
  2611. * wakeup events from the module. Does not set any wakeup routing
  2612. * registers beyond this point - if the module is to wake up any other
  2613. * module or subsystem, that must be set separately. Called by
  2614. * omap_device code. Returns -EINVAL on error or 0 upon success.
  2615. */
  2616. int omap_hwmod_enable_wakeup(struct omap_hwmod *oh)
  2617. {
  2618. unsigned long flags;
  2619. u32 v;
  2620. spin_lock_irqsave(&oh->_lock, flags);
  2621. if (oh->class->sysc &&
  2622. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  2623. v = oh->_sysc_cache;
  2624. _enable_wakeup(oh, &v);
  2625. _write_sysconfig(v, oh);
  2626. }
  2627. _set_idle_ioring_wakeup(oh, true);
  2628. spin_unlock_irqrestore(&oh->_lock, flags);
  2629. return 0;
  2630. }
  2631. /**
  2632. * omap_hwmod_disable_wakeup - prevent device from waking the system
  2633. * @oh: struct omap_hwmod *
  2634. *
  2635. * Clears the module OCP socket ENAWAKEUP bit to prevent the module
  2636. * from sending wakeups to the PRCM, and disable I/O ring wakeup
  2637. * events for this IP block if it has dynamic mux entries. Eventually
  2638. * this should clear PRCM wakeup registers to cause the PRCM to ignore
  2639. * wakeup events from the module. Does not set any wakeup routing
  2640. * registers beyond this point - if the module is to wake up any other
  2641. * module or subsystem, that must be set separately. Called by
  2642. * omap_device code. Returns -EINVAL on error or 0 upon success.
  2643. */
  2644. int omap_hwmod_disable_wakeup(struct omap_hwmod *oh)
  2645. {
  2646. unsigned long flags;
  2647. u32 v;
  2648. spin_lock_irqsave(&oh->_lock, flags);
  2649. if (oh->class->sysc &&
  2650. (oh->class->sysc->sysc_flags & SYSC_HAS_ENAWAKEUP)) {
  2651. v = oh->_sysc_cache;
  2652. _disable_wakeup(oh, &v);
  2653. _write_sysconfig(v, oh);
  2654. }
  2655. _set_idle_ioring_wakeup(oh, false);
  2656. spin_unlock_irqrestore(&oh->_lock, flags);
  2657. return 0;
  2658. }
  2659. /**
  2660. * omap_hwmod_assert_hardreset - assert the HW reset line of submodules
  2661. * contained in the hwmod module.
  2662. * @oh: struct omap_hwmod *
  2663. * @name: name of the reset line to lookup and assert
  2664. *
  2665. * Some IP like dsp, ipu or iva contain processor that require
  2666. * an HW reset line to be assert / deassert in order to enable fully
  2667. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  2668. * yet supported on this OMAP; otherwise, passes along the return value
  2669. * from _assert_hardreset().
  2670. */
  2671. int omap_hwmod_assert_hardreset(struct omap_hwmod *oh, const char *name)
  2672. {
  2673. int ret;
  2674. unsigned long flags;
  2675. if (!oh)
  2676. return -EINVAL;
  2677. spin_lock_irqsave(&oh->_lock, flags);
  2678. ret = _assert_hardreset(oh, name);
  2679. spin_unlock_irqrestore(&oh->_lock, flags);
  2680. return ret;
  2681. }
  2682. /**
  2683. * omap_hwmod_deassert_hardreset - deassert the HW reset line of submodules
  2684. * contained in the hwmod module.
  2685. * @oh: struct omap_hwmod *
  2686. * @name: name of the reset line to look up and deassert
  2687. *
  2688. * Some IP like dsp, ipu or iva contain processor that require
  2689. * an HW reset line to be assert / deassert in order to enable fully
  2690. * the IP. Returns -EINVAL if @oh is null or if the operation is not
  2691. * yet supported on this OMAP; otherwise, passes along the return value
  2692. * from _deassert_hardreset().
  2693. */
  2694. int omap_hwmod_deassert_hardreset(struct omap_hwmod *oh, const char *name)
  2695. {
  2696. int ret;
  2697. unsigned long flags;
  2698. if (!oh)
  2699. return -EINVAL;
  2700. spin_lock_irqsave(&oh->_lock, flags);
  2701. ret = _deassert_hardreset(oh, name);
  2702. spin_unlock_irqrestore(&oh->_lock, flags);
  2703. return ret;
  2704. }
  2705. /**
  2706. * omap_hwmod_read_hardreset - read the HW reset line state of submodules
  2707. * contained in the hwmod module
  2708. * @oh: struct omap_hwmod *
  2709. * @name: name of the reset line to look up and read
  2710. *
  2711. * Return the current state of the hwmod @oh's reset line named @name:
  2712. * returns -EINVAL upon parameter error or if this operation
  2713. * is unsupported on the current OMAP; otherwise, passes along the return
  2714. * value from _read_hardreset().
  2715. */
  2716. int omap_hwmod_read_hardreset(struct omap_hwmod *oh, const char *name)
  2717. {
  2718. int ret;
  2719. unsigned long flags;
  2720. if (!oh)
  2721. return -EINVAL;
  2722. spin_lock_irqsave(&oh->_lock, flags);
  2723. ret = _read_hardreset(oh, name);
  2724. spin_unlock_irqrestore(&oh->_lock, flags);
  2725. return ret;
  2726. }
  2727. /**
  2728. * omap_hwmod_for_each_by_class - call @fn for each hwmod of class @classname
  2729. * @classname: struct omap_hwmod_class name to search for
  2730. * @fn: callback function pointer to call for each hwmod in class @classname
  2731. * @user: arbitrary context data to pass to the callback function
  2732. *
  2733. * For each omap_hwmod of class @classname, call @fn.
  2734. * If the callback function returns something other than
  2735. * zero, the iterator is terminated, and the callback function's return
  2736. * value is passed back to the caller. Returns 0 upon success, -EINVAL
  2737. * if @classname or @fn are NULL, or passes back the error code from @fn.
  2738. */
  2739. int omap_hwmod_for_each_by_class(const char *classname,
  2740. int (*fn)(struct omap_hwmod *oh,
  2741. void *user),
  2742. void *user)
  2743. {
  2744. struct omap_hwmod *temp_oh;
  2745. int ret = 0;
  2746. if (!classname || !fn)
  2747. return -EINVAL;
  2748. pr_debug("omap_hwmod: %s: looking for modules of class %s\n",
  2749. __func__, classname);
  2750. list_for_each_entry(temp_oh, &omap_hwmod_list, node) {
  2751. if (!strcmp(temp_oh->class->name, classname)) {
  2752. pr_debug("omap_hwmod: %s: %s: calling callback fn\n",
  2753. __func__, temp_oh->name);
  2754. ret = (*fn)(temp_oh, user);
  2755. if (ret)
  2756. break;
  2757. }
  2758. }
  2759. if (ret)
  2760. pr_debug("omap_hwmod: %s: iterator terminated early: %d\n",
  2761. __func__, ret);
  2762. return ret;
  2763. }
  2764. /**
  2765. * omap_hwmod_set_postsetup_state - set the post-_setup() state for this hwmod
  2766. * @oh: struct omap_hwmod *
  2767. * @state: state that _setup() should leave the hwmod in
  2768. *
  2769. * Sets the hwmod state that @oh will enter at the end of _setup()
  2770. * (called by omap_hwmod_setup_*()). See also the documentation
  2771. * for _setup_postsetup(), above. Returns 0 upon success or
  2772. * -EINVAL if there is a problem with the arguments or if the hwmod is
  2773. * in the wrong state.
  2774. */
  2775. int omap_hwmod_set_postsetup_state(struct omap_hwmod *oh, u8 state)
  2776. {
  2777. int ret;
  2778. unsigned long flags;
  2779. if (!oh)
  2780. return -EINVAL;
  2781. if (state != _HWMOD_STATE_DISABLED &&
  2782. state != _HWMOD_STATE_ENABLED &&
  2783. state != _HWMOD_STATE_IDLE)
  2784. return -EINVAL;
  2785. spin_lock_irqsave(&oh->_lock, flags);
  2786. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  2787. ret = -EINVAL;
  2788. goto ohsps_unlock;
  2789. }
  2790. oh->_postsetup_state = state;
  2791. ret = 0;
  2792. ohsps_unlock:
  2793. spin_unlock_irqrestore(&oh->_lock, flags);
  2794. return ret;
  2795. }
  2796. /**
  2797. * omap_hwmod_get_context_loss_count - get lost context count
  2798. * @oh: struct omap_hwmod *
  2799. *
  2800. * Query the powerdomain of of @oh to get the context loss
  2801. * count for this device.
  2802. *
  2803. * Returns the context loss count of the powerdomain assocated with @oh
  2804. * upon success, or zero if no powerdomain exists for @oh.
  2805. */
  2806. int omap_hwmod_get_context_loss_count(struct omap_hwmod *oh)
  2807. {
  2808. struct powerdomain *pwrdm;
  2809. int ret = 0;
  2810. pwrdm = omap_hwmod_get_pwrdm(oh);
  2811. if (pwrdm)
  2812. ret = pwrdm_get_context_loss_count(pwrdm);
  2813. return ret;
  2814. }
  2815. /**
  2816. * omap_hwmod_no_setup_reset - prevent a hwmod from being reset upon setup
  2817. * @oh: struct omap_hwmod *
  2818. *
  2819. * Prevent the hwmod @oh from being reset during the setup process.
  2820. * Intended for use by board-*.c files on boards with devices that
  2821. * cannot tolerate being reset. Must be called before the hwmod has
  2822. * been set up. Returns 0 upon success or negative error code upon
  2823. * failure.
  2824. */
  2825. int omap_hwmod_no_setup_reset(struct omap_hwmod *oh)
  2826. {
  2827. if (!oh)
  2828. return -EINVAL;
  2829. if (oh->_state != _HWMOD_STATE_REGISTERED) {
  2830. pr_err("omap_hwmod: %s: cannot prevent setup reset; in wrong state\n",
  2831. oh->name);
  2832. return -EINVAL;
  2833. }
  2834. oh->flags |= HWMOD_INIT_NO_RESET;
  2835. return 0;
  2836. }
  2837. /**
  2838. * omap_hwmod_pad_route_irq - route an I/O pad wakeup to a particular MPU IRQ
  2839. * @oh: struct omap_hwmod * containing hwmod mux entries
  2840. * @pad_idx: array index in oh->mux of the hwmod mux entry to route wakeup
  2841. * @irq_idx: the hwmod mpu_irqs array index of the IRQ to trigger on wakeup
  2842. *
  2843. * When an I/O pad wakeup arrives for the dynamic or wakeup hwmod mux
  2844. * entry number @pad_idx for the hwmod @oh, trigger the interrupt
  2845. * service routine for the hwmod's mpu_irqs array index @irq_idx. If
  2846. * this function is not called for a given pad_idx, then the ISR
  2847. * associated with @oh's first MPU IRQ will be triggered when an I/O
  2848. * pad wakeup occurs on that pad. Note that @pad_idx is the index of
  2849. * the _dynamic or wakeup_ entry: if there are other entries not
  2850. * marked with OMAP_DEVICE_PAD_WAKEUP or OMAP_DEVICE_PAD_REMUX, these
  2851. * entries are NOT COUNTED in the dynamic pad index. This function
  2852. * must be called separately for each pad that requires its interrupt
  2853. * to be re-routed this way. Returns -EINVAL if there is an argument
  2854. * problem or if @oh does not have hwmod mux entries or MPU IRQs;
  2855. * returns -ENOMEM if memory cannot be allocated; or 0 upon success.
  2856. *
  2857. * XXX This function interface is fragile. Rather than using array
  2858. * indexes, which are subject to unpredictable change, it should be
  2859. * using hwmod IRQ names, and some other stable key for the hwmod mux
  2860. * pad records.
  2861. */
  2862. int omap_hwmod_pad_route_irq(struct omap_hwmod *oh, int pad_idx, int irq_idx)
  2863. {
  2864. int nr_irqs;
  2865. might_sleep();
  2866. if (!oh || !oh->mux || !oh->mpu_irqs || pad_idx < 0 ||
  2867. pad_idx >= oh->mux->nr_pads_dynamic)
  2868. return -EINVAL;
  2869. /* Check the number of available mpu_irqs */
  2870. for (nr_irqs = 0; oh->mpu_irqs[nr_irqs].irq >= 0; nr_irqs++)
  2871. ;
  2872. if (irq_idx >= nr_irqs)
  2873. return -EINVAL;
  2874. if (!oh->mux->irqs) {
  2875. /* XXX What frees this? */
  2876. oh->mux->irqs = kzalloc(sizeof(int) * oh->mux->nr_pads_dynamic,
  2877. GFP_KERNEL);
  2878. if (!oh->mux->irqs)
  2879. return -ENOMEM;
  2880. }
  2881. oh->mux->irqs[pad_idx] = irq_idx;
  2882. return 0;
  2883. }