cpqphp_core.c 37 KB

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  1. /*
  2. * Compaq Hot Plug Controller Driver
  3. *
  4. * Copyright (C) 1995,2001 Compaq Computer Corporation
  5. * Copyright (C) 2001 Greg Kroah-Hartman <greg@kroah.com>
  6. * Copyright (C) 2001 IBM Corp.
  7. *
  8. * All rights reserved.
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or (at
  13. * your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful, but
  16. * WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
  18. * NON INFRINGEMENT. See the GNU General Public License for more
  19. * details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24. *
  25. * Send feedback to <greg@kroah.com>
  26. *
  27. * Jan 12, 2003 - Added 66/100/133MHz PCI-X support,
  28. * Torben Mathiasen <torben.mathiasen@hp.com>
  29. */
  30. #include <linux/module.h>
  31. #include <linux/moduleparam.h>
  32. #include <linux/kernel.h>
  33. #include <linux/types.h>
  34. #include <linux/proc_fs.h>
  35. #include <linux/slab.h>
  36. #include <linux/workqueue.h>
  37. #include <linux/pci.h>
  38. #include <linux/pci_hotplug.h>
  39. #include <linux/init.h>
  40. #include <linux/interrupt.h>
  41. #include <asm/uaccess.h>
  42. #include "cpqphp.h"
  43. #include "cpqphp_nvram.h"
  44. #include <asm/pci_x86.h>
  45. /* Global variables */
  46. int cpqhp_debug;
  47. int cpqhp_legacy_mode;
  48. struct controller *cpqhp_ctrl_list; /* = NULL */
  49. struct pci_func *cpqhp_slot_list[256];
  50. /* local variables */
  51. static void __iomem *smbios_table;
  52. static void __iomem *smbios_start;
  53. static void __iomem *cpqhp_rom_start;
  54. static int power_mode;
  55. static int debug;
  56. static int initialized;
  57. #define DRIVER_VERSION "0.9.8"
  58. #define DRIVER_AUTHOR "Dan Zink <dan.zink@compaq.com>, Greg Kroah-Hartman <greg@kroah.com>"
  59. #define DRIVER_DESC "Compaq Hot Plug PCI Controller Driver"
  60. MODULE_AUTHOR(DRIVER_AUTHOR);
  61. MODULE_DESCRIPTION(DRIVER_DESC);
  62. MODULE_LICENSE("GPL");
  63. module_param(power_mode, bool, 0644);
  64. MODULE_PARM_DESC(power_mode, "Power mode enabled or not");
  65. module_param(debug, bool, 0644);
  66. MODULE_PARM_DESC(debug, "Debugging mode enabled or not");
  67. #define CPQHPC_MODULE_MINOR 208
  68. static inline int is_slot64bit(struct slot *slot)
  69. {
  70. return (readb(slot->p_sm_slot + SMBIOS_SLOT_WIDTH) == 0x06) ? 1 : 0;
  71. }
  72. static inline int is_slot66mhz(struct slot *slot)
  73. {
  74. return (readb(slot->p_sm_slot + SMBIOS_SLOT_TYPE) == 0x0E) ? 1 : 0;
  75. }
  76. /**
  77. * detect_SMBIOS_pointer - find the System Management BIOS Table in mem region.
  78. * @begin: begin pointer for region to be scanned.
  79. * @end: end pointer for region to be scanned.
  80. *
  81. * Returns pointer to the head of the SMBIOS tables (or %NULL).
  82. */
  83. static void __iomem * detect_SMBIOS_pointer(void __iomem *begin, void __iomem *end)
  84. {
  85. void __iomem *fp;
  86. void __iomem *endp;
  87. u8 temp1, temp2, temp3, temp4;
  88. int status = 0;
  89. endp = (end - sizeof(u32) + 1);
  90. for (fp = begin; fp <= endp; fp += 16) {
  91. temp1 = readb(fp);
  92. temp2 = readb(fp+1);
  93. temp3 = readb(fp+2);
  94. temp4 = readb(fp+3);
  95. if (temp1 == '_' &&
  96. temp2 == 'S' &&
  97. temp3 == 'M' &&
  98. temp4 == '_') {
  99. status = 1;
  100. break;
  101. }
  102. }
  103. if (!status)
  104. fp = NULL;
  105. dbg("Discovered SMBIOS Entry point at %p\n", fp);
  106. return fp;
  107. }
  108. /**
  109. * init_SERR - Initializes the per slot SERR generation.
  110. * @ctrl: controller to use
  111. *
  112. * For unexpected switch opens
  113. */
  114. static int init_SERR(struct controller * ctrl)
  115. {
  116. u32 tempdword;
  117. u32 number_of_slots;
  118. u8 physical_slot;
  119. if (!ctrl)
  120. return 1;
  121. tempdword = ctrl->first_slot;
  122. number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
  123. /* Loop through slots */
  124. while (number_of_slots) {
  125. physical_slot = tempdword;
  126. writeb(0, ctrl->hpc_reg + SLOT_SERR);
  127. tempdword++;
  128. number_of_slots--;
  129. }
  130. return 0;
  131. }
  132. /* nice debugging output */
  133. static int pci_print_IRQ_route (void)
  134. {
  135. struct irq_routing_table *routing_table;
  136. int len;
  137. int loop;
  138. u8 tbus, tdevice, tslot;
  139. routing_table = pcibios_get_irq_routing_table();
  140. if (routing_table == NULL) {
  141. err("No BIOS Routing Table??? Not good\n");
  142. return -ENOMEM;
  143. }
  144. len = (routing_table->size - sizeof(struct irq_routing_table)) /
  145. sizeof(struct irq_info);
  146. /* Make sure I got at least one entry */
  147. if (len == 0) {
  148. kfree(routing_table);
  149. return -1;
  150. }
  151. dbg("bus dev func slot\n");
  152. for (loop = 0; loop < len; ++loop) {
  153. tbus = routing_table->slots[loop].bus;
  154. tdevice = routing_table->slots[loop].devfn;
  155. tslot = routing_table->slots[loop].slot;
  156. dbg("%d %d %d %d\n", tbus, tdevice >> 3, tdevice & 0x7, tslot);
  157. }
  158. kfree(routing_table);
  159. return 0;
  160. }
  161. /**
  162. * get_subsequent_smbios_entry: get the next entry from bios table.
  163. * @smbios_start: where to start in the SMBIOS table
  164. * @smbios_table: location of the SMBIOS table
  165. * @curr: %NULL or pointer to previously returned structure
  166. *
  167. * Gets the first entry if previous == NULL;
  168. * otherwise, returns the next entry.
  169. * Uses global SMBIOS Table pointer.
  170. *
  171. * Returns a pointer to an SMBIOS structure or NULL if none found.
  172. */
  173. static void __iomem *get_subsequent_smbios_entry(void __iomem *smbios_start,
  174. void __iomem *smbios_table,
  175. void __iomem *curr)
  176. {
  177. u8 bail = 0;
  178. u8 previous_byte = 1;
  179. void __iomem *p_temp;
  180. void __iomem *p_max;
  181. if (!smbios_table || !curr)
  182. return NULL;
  183. /* set p_max to the end of the table */
  184. p_max = smbios_start + readw(smbios_table + ST_LENGTH);
  185. p_temp = curr;
  186. p_temp += readb(curr + SMBIOS_GENERIC_LENGTH);
  187. while ((p_temp < p_max) && !bail) {
  188. /* Look for the double NULL terminator
  189. * The first condition is the previous byte
  190. * and the second is the curr
  191. */
  192. if (!previous_byte && !(readb(p_temp)))
  193. bail = 1;
  194. previous_byte = readb(p_temp);
  195. p_temp++;
  196. }
  197. if (p_temp < p_max)
  198. return p_temp;
  199. else
  200. return NULL;
  201. }
  202. /**
  203. * get_SMBIOS_entry - return the requested SMBIOS entry or %NULL
  204. * @smbios_start: where to start in the SMBIOS table
  205. * @smbios_table: location of the SMBIOS table
  206. * @type: SMBIOS structure type to be returned
  207. * @previous: %NULL or pointer to previously returned structure
  208. *
  209. * Gets the first entry of the specified type if previous == %NULL;
  210. * Otherwise, returns the next entry of the given type.
  211. * Uses global SMBIOS Table pointer.
  212. * Uses get_subsequent_smbios_entry.
  213. *
  214. * Returns a pointer to an SMBIOS structure or %NULL if none found.
  215. */
  216. static void __iomem *get_SMBIOS_entry(void __iomem *smbios_start,
  217. void __iomem *smbios_table,
  218. u8 type,
  219. void __iomem *previous)
  220. {
  221. if (!smbios_table)
  222. return NULL;
  223. if (!previous)
  224. previous = smbios_start;
  225. else
  226. previous = get_subsequent_smbios_entry(smbios_start,
  227. smbios_table, previous);
  228. while (previous)
  229. if (readb(previous + SMBIOS_GENERIC_TYPE) != type)
  230. previous = get_subsequent_smbios_entry(smbios_start,
  231. smbios_table, previous);
  232. else
  233. break;
  234. return previous;
  235. }
  236. static void release_slot(struct hotplug_slot *hotplug_slot)
  237. {
  238. struct slot *slot = hotplug_slot->private;
  239. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  240. kfree(slot->hotplug_slot->info);
  241. kfree(slot->hotplug_slot);
  242. kfree(slot);
  243. }
  244. static int ctrl_slot_cleanup (struct controller * ctrl)
  245. {
  246. struct slot *old_slot, *next_slot;
  247. old_slot = ctrl->slot;
  248. ctrl->slot = NULL;
  249. while (old_slot) {
  250. /* memory will be freed by the release_slot callback */
  251. next_slot = old_slot->next;
  252. pci_hp_deregister (old_slot->hotplug_slot);
  253. old_slot = next_slot;
  254. }
  255. cpqhp_remove_debugfs_files(ctrl);
  256. /* Free IRQ associated with hot plug device */
  257. free_irq(ctrl->interrupt, ctrl);
  258. /* Unmap the memory */
  259. iounmap(ctrl->hpc_reg);
  260. /* Finally reclaim PCI mem */
  261. release_mem_region(pci_resource_start(ctrl->pci_dev, 0),
  262. pci_resource_len(ctrl->pci_dev, 0));
  263. return 0;
  264. }
  265. /**
  266. * get_slot_mapping - determine logical slot mapping for PCI device
  267. *
  268. * Won't work for more than one PCI-PCI bridge in a slot.
  269. *
  270. * @bus_num - bus number of PCI device
  271. * @dev_num - device number of PCI device
  272. * @slot - Pointer to u8 where slot number will be returned
  273. *
  274. * Output: SUCCESS or FAILURE
  275. */
  276. static int
  277. get_slot_mapping(struct pci_bus *bus, u8 bus_num, u8 dev_num, u8 *slot)
  278. {
  279. struct irq_routing_table *PCIIRQRoutingInfoLength;
  280. u32 work;
  281. long len;
  282. long loop;
  283. u8 tbus, tdevice, tslot, bridgeSlot;
  284. dbg("%s: %p, %d, %d, %p\n", __func__, bus, bus_num, dev_num, slot);
  285. bridgeSlot = 0xFF;
  286. PCIIRQRoutingInfoLength = pcibios_get_irq_routing_table();
  287. if (!PCIIRQRoutingInfoLength)
  288. return -1;
  289. len = (PCIIRQRoutingInfoLength->size -
  290. sizeof(struct irq_routing_table)) / sizeof(struct irq_info);
  291. /* Make sure I got at least one entry */
  292. if (len == 0) {
  293. kfree(PCIIRQRoutingInfoLength);
  294. return -1;
  295. }
  296. for (loop = 0; loop < len; ++loop) {
  297. tbus = PCIIRQRoutingInfoLength->slots[loop].bus;
  298. tdevice = PCIIRQRoutingInfoLength->slots[loop].devfn >> 3;
  299. tslot = PCIIRQRoutingInfoLength->slots[loop].slot;
  300. if ((tbus == bus_num) && (tdevice == dev_num)) {
  301. *slot = tslot;
  302. kfree(PCIIRQRoutingInfoLength);
  303. return 0;
  304. } else {
  305. /* Did not get a match on the target PCI device. Check
  306. * if the current IRQ table entry is a PCI-to-PCI
  307. * bridge device. If so, and it's secondary bus
  308. * matches the bus number for the target device, I need
  309. * to save the bridge's slot number. If I can not find
  310. * an entry for the target device, I will have to
  311. * assume it's on the other side of the bridge, and
  312. * assign it the bridge's slot.
  313. */
  314. bus->number = tbus;
  315. pci_bus_read_config_dword(bus, PCI_DEVFN(tdevice, 0),
  316. PCI_CLASS_REVISION, &work);
  317. if ((work >> 8) == PCI_TO_PCI_BRIDGE_CLASS) {
  318. pci_bus_read_config_dword(bus,
  319. PCI_DEVFN(tdevice, 0),
  320. PCI_PRIMARY_BUS, &work);
  321. // See if bridge's secondary bus matches target bus.
  322. if (((work >> 8) & 0x000000FF) == (long) bus_num)
  323. bridgeSlot = tslot;
  324. }
  325. }
  326. }
  327. /* If we got here, we didn't find an entry in the IRQ mapping table for
  328. * the target PCI device. If we did determine that the target device
  329. * is on the other side of a PCI-to-PCI bridge, return the slot number
  330. * for the bridge.
  331. */
  332. if (bridgeSlot != 0xFF) {
  333. *slot = bridgeSlot;
  334. kfree(PCIIRQRoutingInfoLength);
  335. return 0;
  336. }
  337. kfree(PCIIRQRoutingInfoLength);
  338. /* Couldn't find an entry in the routing table for this PCI device */
  339. return -1;
  340. }
  341. /**
  342. * cpqhp_set_attention_status - Turns the Amber LED for a slot on or off
  343. * @ctrl: struct controller to use
  344. * @func: PCI device/function info
  345. * @status: LED control flag: 1 = LED on, 0 = LED off
  346. */
  347. static int
  348. cpqhp_set_attention_status(struct controller *ctrl, struct pci_func *func,
  349. u32 status)
  350. {
  351. u8 hp_slot;
  352. if (func == NULL)
  353. return 1;
  354. hp_slot = func->device - ctrl->slot_device_offset;
  355. /* Wait for exclusive access to hardware */
  356. mutex_lock(&ctrl->crit_sect);
  357. if (status == 1)
  358. amber_LED_on (ctrl, hp_slot);
  359. else if (status == 0)
  360. amber_LED_off (ctrl, hp_slot);
  361. else {
  362. /* Done with exclusive hardware access */
  363. mutex_unlock(&ctrl->crit_sect);
  364. return 1;
  365. }
  366. set_SOGO(ctrl);
  367. /* Wait for SOBS to be unset */
  368. wait_for_ctrl_irq (ctrl);
  369. /* Done with exclusive hardware access */
  370. mutex_unlock(&ctrl->crit_sect);
  371. return 0;
  372. }
  373. /**
  374. * set_attention_status - Turns the Amber LED for a slot on or off
  375. * @hotplug_slot: slot to change LED on
  376. * @status: LED control flag
  377. */
  378. static int set_attention_status (struct hotplug_slot *hotplug_slot, u8 status)
  379. {
  380. struct pci_func *slot_func;
  381. struct slot *slot = hotplug_slot->private;
  382. struct controller *ctrl = slot->ctrl;
  383. u8 bus;
  384. u8 devfn;
  385. u8 device;
  386. u8 function;
  387. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  388. if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
  389. return -ENODEV;
  390. device = devfn >> 3;
  391. function = devfn & 0x7;
  392. dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
  393. slot_func = cpqhp_slot_find(bus, device, function);
  394. if (!slot_func)
  395. return -ENODEV;
  396. return cpqhp_set_attention_status(ctrl, slot_func, status);
  397. }
  398. static int process_SI(struct hotplug_slot *hotplug_slot)
  399. {
  400. struct pci_func *slot_func;
  401. struct slot *slot = hotplug_slot->private;
  402. struct controller *ctrl = slot->ctrl;
  403. u8 bus;
  404. u8 devfn;
  405. u8 device;
  406. u8 function;
  407. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  408. if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
  409. return -ENODEV;
  410. device = devfn >> 3;
  411. function = devfn & 0x7;
  412. dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
  413. slot_func = cpqhp_slot_find(bus, device, function);
  414. if (!slot_func)
  415. return -ENODEV;
  416. slot_func->bus = bus;
  417. slot_func->device = device;
  418. slot_func->function = function;
  419. slot_func->configured = 0;
  420. dbg("board_added(%p, %p)\n", slot_func, ctrl);
  421. return cpqhp_process_SI(ctrl, slot_func);
  422. }
  423. static int process_SS(struct hotplug_slot *hotplug_slot)
  424. {
  425. struct pci_func *slot_func;
  426. struct slot *slot = hotplug_slot->private;
  427. struct controller *ctrl = slot->ctrl;
  428. u8 bus;
  429. u8 devfn;
  430. u8 device;
  431. u8 function;
  432. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  433. if (cpqhp_get_bus_dev(ctrl, &bus, &devfn, slot->number) == -1)
  434. return -ENODEV;
  435. device = devfn >> 3;
  436. function = devfn & 0x7;
  437. dbg("bus, dev, fn = %d, %d, %d\n", bus, device, function);
  438. slot_func = cpqhp_slot_find(bus, device, function);
  439. if (!slot_func)
  440. return -ENODEV;
  441. dbg("In %s, slot_func = %p, ctrl = %p\n", __func__, slot_func, ctrl);
  442. return cpqhp_process_SS(ctrl, slot_func);
  443. }
  444. static int hardware_test(struct hotplug_slot *hotplug_slot, u32 value)
  445. {
  446. struct slot *slot = hotplug_slot->private;
  447. struct controller *ctrl = slot->ctrl;
  448. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  449. return cpqhp_hardware_test(ctrl, value);
  450. }
  451. static int get_power_status(struct hotplug_slot *hotplug_slot, u8 *value)
  452. {
  453. struct slot *slot = hotplug_slot->private;
  454. struct controller *ctrl = slot->ctrl;
  455. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  456. *value = get_slot_enabled(ctrl, slot);
  457. return 0;
  458. }
  459. static int get_attention_status(struct hotplug_slot *hotplug_slot, u8 *value)
  460. {
  461. struct slot *slot = hotplug_slot->private;
  462. struct controller *ctrl = slot->ctrl;
  463. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  464. *value = cpq_get_attention_status(ctrl, slot);
  465. return 0;
  466. }
  467. static int get_latch_status(struct hotplug_slot *hotplug_slot, u8 *value)
  468. {
  469. struct slot *slot = hotplug_slot->private;
  470. struct controller *ctrl = slot->ctrl;
  471. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  472. *value = cpq_get_latch_status(ctrl, slot);
  473. return 0;
  474. }
  475. static int get_adapter_status(struct hotplug_slot *hotplug_slot, u8 *value)
  476. {
  477. struct slot *slot = hotplug_slot->private;
  478. struct controller *ctrl = slot->ctrl;
  479. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  480. *value = get_presence_status(ctrl, slot);
  481. return 0;
  482. }
  483. static int get_max_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
  484. {
  485. struct slot *slot = hotplug_slot->private;
  486. struct controller *ctrl = slot->ctrl;
  487. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  488. *value = ctrl->speed_capability;
  489. return 0;
  490. }
  491. static int get_cur_bus_speed (struct hotplug_slot *hotplug_slot, enum pci_bus_speed *value)
  492. {
  493. struct slot *slot = hotplug_slot->private;
  494. struct controller *ctrl = slot->ctrl;
  495. dbg("%s - physical_slot = %s\n", __func__, slot_name(slot));
  496. *value = ctrl->speed;
  497. return 0;
  498. }
  499. static struct hotplug_slot_ops cpqphp_hotplug_slot_ops = {
  500. .owner = THIS_MODULE,
  501. .set_attention_status = set_attention_status,
  502. .enable_slot = process_SI,
  503. .disable_slot = process_SS,
  504. .hardware_test = hardware_test,
  505. .get_power_status = get_power_status,
  506. .get_attention_status = get_attention_status,
  507. .get_latch_status = get_latch_status,
  508. .get_adapter_status = get_adapter_status,
  509. .get_max_bus_speed = get_max_bus_speed,
  510. .get_cur_bus_speed = get_cur_bus_speed,
  511. };
  512. #define SLOT_NAME_SIZE 10
  513. static int ctrl_slot_setup(struct controller *ctrl,
  514. void __iomem *smbios_start,
  515. void __iomem *smbios_table)
  516. {
  517. struct slot *slot;
  518. struct hotplug_slot *hotplug_slot;
  519. struct hotplug_slot_info *hotplug_slot_info;
  520. u8 number_of_slots;
  521. u8 slot_device;
  522. u8 slot_number;
  523. u8 ctrl_slot;
  524. u32 tempdword;
  525. char name[SLOT_NAME_SIZE];
  526. void __iomem *slot_entry= NULL;
  527. int result = -ENOMEM;
  528. dbg("%s\n", __func__);
  529. tempdword = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
  530. number_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
  531. slot_device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
  532. slot_number = ctrl->first_slot;
  533. while (number_of_slots) {
  534. slot = kzalloc(sizeof(*slot), GFP_KERNEL);
  535. if (!slot)
  536. goto error;
  537. slot->hotplug_slot = kzalloc(sizeof(*(slot->hotplug_slot)),
  538. GFP_KERNEL);
  539. if (!slot->hotplug_slot)
  540. goto error_slot;
  541. hotplug_slot = slot->hotplug_slot;
  542. hotplug_slot->info = kzalloc(sizeof(*(hotplug_slot->info)),
  543. GFP_KERNEL);
  544. if (!hotplug_slot->info)
  545. goto error_hpslot;
  546. hotplug_slot_info = hotplug_slot->info;
  547. slot->ctrl = ctrl;
  548. slot->bus = ctrl->bus;
  549. slot->device = slot_device;
  550. slot->number = slot_number;
  551. dbg("slot->number = %u\n", slot->number);
  552. slot_entry = get_SMBIOS_entry(smbios_start, smbios_table, 9,
  553. slot_entry);
  554. while (slot_entry && (readw(slot_entry + SMBIOS_SLOT_NUMBER) !=
  555. slot->number)) {
  556. slot_entry = get_SMBIOS_entry(smbios_start,
  557. smbios_table, 9, slot_entry);
  558. }
  559. slot->p_sm_slot = slot_entry;
  560. init_timer(&slot->task_event);
  561. slot->task_event.expires = jiffies + 5 * HZ;
  562. slot->task_event.function = cpqhp_pushbutton_thread;
  563. /*FIXME: these capabilities aren't used but if they are
  564. * they need to be correctly implemented
  565. */
  566. slot->capabilities |= PCISLOT_REPLACE_SUPPORTED;
  567. slot->capabilities |= PCISLOT_INTERLOCK_SUPPORTED;
  568. if (is_slot64bit(slot))
  569. slot->capabilities |= PCISLOT_64_BIT_SUPPORTED;
  570. if (is_slot66mhz(slot))
  571. slot->capabilities |= PCISLOT_66_MHZ_SUPPORTED;
  572. if (ctrl->speed == PCI_SPEED_66MHz)
  573. slot->capabilities |= PCISLOT_66_MHZ_OPERATION;
  574. ctrl_slot =
  575. slot_device - (readb(ctrl->hpc_reg + SLOT_MASK) >> 4);
  576. /* Check presence */
  577. slot->capabilities |=
  578. ((((~tempdword) >> 23) |
  579. ((~tempdword) >> 15)) >> ctrl_slot) & 0x02;
  580. /* Check the switch state */
  581. slot->capabilities |=
  582. ((~tempdword & 0xFF) >> ctrl_slot) & 0x01;
  583. /* Check the slot enable */
  584. slot->capabilities |=
  585. ((read_slot_enable(ctrl) << 2) >> ctrl_slot) & 0x04;
  586. /* register this slot with the hotplug pci core */
  587. hotplug_slot->release = &release_slot;
  588. hotplug_slot->private = slot;
  589. snprintf(name, SLOT_NAME_SIZE, "%u", slot->number);
  590. hotplug_slot->ops = &cpqphp_hotplug_slot_ops;
  591. hotplug_slot_info->power_status = get_slot_enabled(ctrl, slot);
  592. hotplug_slot_info->attention_status =
  593. cpq_get_attention_status(ctrl, slot);
  594. hotplug_slot_info->latch_status =
  595. cpq_get_latch_status(ctrl, slot);
  596. hotplug_slot_info->adapter_status =
  597. get_presence_status(ctrl, slot);
  598. dbg("registering bus %d, dev %d, number %d, "
  599. "ctrl->slot_device_offset %d, slot %d\n",
  600. slot->bus, slot->device,
  601. slot->number, ctrl->slot_device_offset,
  602. slot_number);
  603. result = pci_hp_register(hotplug_slot,
  604. ctrl->pci_dev->bus,
  605. slot->device,
  606. name);
  607. if (result) {
  608. err("pci_hp_register failed with error %d\n", result);
  609. goto error_info;
  610. }
  611. slot->next = ctrl->slot;
  612. ctrl->slot = slot;
  613. number_of_slots--;
  614. slot_device++;
  615. slot_number++;
  616. }
  617. return 0;
  618. error_info:
  619. kfree(hotplug_slot_info);
  620. error_hpslot:
  621. kfree(hotplug_slot);
  622. error_slot:
  623. kfree(slot);
  624. error:
  625. return result;
  626. }
  627. static int one_time_init(void)
  628. {
  629. int loop;
  630. int retval = 0;
  631. if (initialized)
  632. return 0;
  633. power_mode = 0;
  634. retval = pci_print_IRQ_route();
  635. if (retval)
  636. goto error;
  637. dbg("Initialize + Start the notification mechanism \n");
  638. retval = cpqhp_event_start_thread();
  639. if (retval)
  640. goto error;
  641. dbg("Initialize slot lists\n");
  642. for (loop = 0; loop < 256; loop++)
  643. cpqhp_slot_list[loop] = NULL;
  644. /* FIXME: We also need to hook the NMI handler eventually.
  645. * this also needs to be worked with Christoph
  646. * register_NMI_handler();
  647. */
  648. /* Map rom address */
  649. cpqhp_rom_start = ioremap(ROM_PHY_ADDR, ROM_PHY_LEN);
  650. if (!cpqhp_rom_start) {
  651. err ("Could not ioremap memory region for ROM\n");
  652. retval = -EIO;
  653. goto error;
  654. }
  655. /* Now, map the int15 entry point if we are on compaq specific
  656. * hardware
  657. */
  658. compaq_nvram_init(cpqhp_rom_start);
  659. /* Map smbios table entry point structure */
  660. smbios_table = detect_SMBIOS_pointer(cpqhp_rom_start,
  661. cpqhp_rom_start + ROM_PHY_LEN);
  662. if (!smbios_table) {
  663. err ("Could not find the SMBIOS pointer in memory\n");
  664. retval = -EIO;
  665. goto error_rom_start;
  666. }
  667. smbios_start = ioremap(readl(smbios_table + ST_ADDRESS),
  668. readw(smbios_table + ST_LENGTH));
  669. if (!smbios_start) {
  670. err ("Could not ioremap memory region taken from SMBIOS values\n");
  671. retval = -EIO;
  672. goto error_smbios_start;
  673. }
  674. initialized = 1;
  675. return retval;
  676. error_smbios_start:
  677. iounmap(smbios_start);
  678. error_rom_start:
  679. iounmap(cpqhp_rom_start);
  680. error:
  681. return retval;
  682. }
  683. static int cpqhpc_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  684. {
  685. u8 num_of_slots = 0;
  686. u8 hp_slot = 0;
  687. u8 device;
  688. u8 bus_cap;
  689. u16 temp_word;
  690. u16 vendor_id;
  691. u16 subsystem_vid;
  692. u16 subsystem_deviceid;
  693. u32 rc;
  694. struct controller *ctrl;
  695. struct pci_func *func;
  696. int err;
  697. err = pci_enable_device(pdev);
  698. if (err) {
  699. printk(KERN_ERR MY_NAME ": cannot enable PCI device %s (%d)\n",
  700. pci_name(pdev), err);
  701. return err;
  702. }
  703. /* Need to read VID early b/c it's used to differentiate CPQ and INTC
  704. * discovery
  705. */
  706. rc = pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor_id);
  707. if (rc || ((vendor_id != PCI_VENDOR_ID_COMPAQ) && (vendor_id != PCI_VENDOR_ID_INTEL))) {
  708. err(msg_HPC_non_compaq_or_intel);
  709. rc = -ENODEV;
  710. goto err_disable_device;
  711. }
  712. dbg("Vendor ID: %x\n", vendor_id);
  713. dbg("revision: %d\n", pdev->revision);
  714. if ((vendor_id == PCI_VENDOR_ID_COMPAQ) && (!pdev->revision)) {
  715. err(msg_HPC_rev_error);
  716. rc = -ENODEV;
  717. goto err_disable_device;
  718. }
  719. /* Check for the proper subsytem ID's
  720. * Intel uses a different SSID programming model than Compaq.
  721. * For Intel, each SSID bit identifies a PHP capability.
  722. * Also Intel HPC's may have RID=0.
  723. */
  724. if ((pdev->revision <= 2) && (vendor_id != PCI_VENDOR_ID_INTEL)) {
  725. err(msg_HPC_not_supported);
  726. return -ENODEV;
  727. }
  728. /* TODO: This code can be made to support non-Compaq or Intel
  729. * subsystem IDs
  730. */
  731. rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_VENDOR_ID, &subsystem_vid);
  732. if (rc) {
  733. err("%s : pci_read_config_word failed\n", __func__);
  734. goto err_disable_device;
  735. }
  736. dbg("Subsystem Vendor ID: %x\n", subsystem_vid);
  737. if ((subsystem_vid != PCI_VENDOR_ID_COMPAQ) && (subsystem_vid != PCI_VENDOR_ID_INTEL)) {
  738. err(msg_HPC_non_compaq_or_intel);
  739. rc = -ENODEV;
  740. goto err_disable_device;
  741. }
  742. ctrl = kzalloc(sizeof(struct controller), GFP_KERNEL);
  743. if (!ctrl) {
  744. err("%s : out of memory\n", __func__);
  745. rc = -ENOMEM;
  746. goto err_disable_device;
  747. }
  748. rc = pci_read_config_word(pdev, PCI_SUBSYSTEM_ID, &subsystem_deviceid);
  749. if (rc) {
  750. err("%s : pci_read_config_word failed\n", __func__);
  751. goto err_free_ctrl;
  752. }
  753. info("Hot Plug Subsystem Device ID: %x\n", subsystem_deviceid);
  754. /* Set Vendor ID, so it can be accessed later from other
  755. * functions
  756. */
  757. ctrl->vendor_id = vendor_id;
  758. switch (subsystem_vid) {
  759. case PCI_VENDOR_ID_COMPAQ:
  760. if (pdev->revision >= 0x13) { /* CIOBX */
  761. ctrl->push_flag = 1;
  762. ctrl->slot_switch_type = 1;
  763. ctrl->push_button = 1;
  764. ctrl->pci_config_space = 1;
  765. ctrl->defeature_PHP = 1;
  766. ctrl->pcix_support = 1;
  767. ctrl->pcix_speed_capability = 1;
  768. pci_read_config_byte(pdev, 0x41, &bus_cap);
  769. if (bus_cap & 0x80) {
  770. dbg("bus max supports 133MHz PCI-X\n");
  771. ctrl->speed_capability = PCI_SPEED_133MHz_PCIX;
  772. break;
  773. }
  774. if (bus_cap & 0x40) {
  775. dbg("bus max supports 100MHz PCI-X\n");
  776. ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
  777. break;
  778. }
  779. if (bus_cap & 20) {
  780. dbg("bus max supports 66MHz PCI-X\n");
  781. ctrl->speed_capability = PCI_SPEED_66MHz_PCIX;
  782. break;
  783. }
  784. if (bus_cap & 10) {
  785. dbg("bus max supports 66MHz PCI\n");
  786. ctrl->speed_capability = PCI_SPEED_66MHz;
  787. break;
  788. }
  789. break;
  790. }
  791. switch (subsystem_deviceid) {
  792. case PCI_SUB_HPC_ID:
  793. /* Original 6500/7000 implementation */
  794. ctrl->slot_switch_type = 1;
  795. ctrl->speed_capability = PCI_SPEED_33MHz;
  796. ctrl->push_button = 0;
  797. ctrl->pci_config_space = 1;
  798. ctrl->defeature_PHP = 1;
  799. ctrl->pcix_support = 0;
  800. ctrl->pcix_speed_capability = 0;
  801. break;
  802. case PCI_SUB_HPC_ID2:
  803. /* First Pushbutton implementation */
  804. ctrl->push_flag = 1;
  805. ctrl->slot_switch_type = 1;
  806. ctrl->speed_capability = PCI_SPEED_33MHz;
  807. ctrl->push_button = 1;
  808. ctrl->pci_config_space = 1;
  809. ctrl->defeature_PHP = 1;
  810. ctrl->pcix_support = 0;
  811. ctrl->pcix_speed_capability = 0;
  812. break;
  813. case PCI_SUB_HPC_ID_INTC:
  814. /* Third party (6500/7000) */
  815. ctrl->slot_switch_type = 1;
  816. ctrl->speed_capability = PCI_SPEED_33MHz;
  817. ctrl->push_button = 0;
  818. ctrl->pci_config_space = 1;
  819. ctrl->defeature_PHP = 1;
  820. ctrl->pcix_support = 0;
  821. ctrl->pcix_speed_capability = 0;
  822. break;
  823. case PCI_SUB_HPC_ID3:
  824. /* First 66 Mhz implementation */
  825. ctrl->push_flag = 1;
  826. ctrl->slot_switch_type = 1;
  827. ctrl->speed_capability = PCI_SPEED_66MHz;
  828. ctrl->push_button = 1;
  829. ctrl->pci_config_space = 1;
  830. ctrl->defeature_PHP = 1;
  831. ctrl->pcix_support = 0;
  832. ctrl->pcix_speed_capability = 0;
  833. break;
  834. case PCI_SUB_HPC_ID4:
  835. /* First PCI-X implementation, 100MHz */
  836. ctrl->push_flag = 1;
  837. ctrl->slot_switch_type = 1;
  838. ctrl->speed_capability = PCI_SPEED_100MHz_PCIX;
  839. ctrl->push_button = 1;
  840. ctrl->pci_config_space = 1;
  841. ctrl->defeature_PHP = 1;
  842. ctrl->pcix_support = 1;
  843. ctrl->pcix_speed_capability = 0;
  844. break;
  845. default:
  846. err(msg_HPC_not_supported);
  847. rc = -ENODEV;
  848. goto err_free_ctrl;
  849. }
  850. break;
  851. case PCI_VENDOR_ID_INTEL:
  852. /* Check for speed capability (0=33, 1=66) */
  853. if (subsystem_deviceid & 0x0001)
  854. ctrl->speed_capability = PCI_SPEED_66MHz;
  855. else
  856. ctrl->speed_capability = PCI_SPEED_33MHz;
  857. /* Check for push button */
  858. if (subsystem_deviceid & 0x0002)
  859. ctrl->push_button = 0;
  860. else
  861. ctrl->push_button = 1;
  862. /* Check for slot switch type (0=mechanical, 1=not mechanical) */
  863. if (subsystem_deviceid & 0x0004)
  864. ctrl->slot_switch_type = 0;
  865. else
  866. ctrl->slot_switch_type = 1;
  867. /* PHP Status (0=De-feature PHP, 1=Normal operation) */
  868. if (subsystem_deviceid & 0x0008)
  869. ctrl->defeature_PHP = 1; /* PHP supported */
  870. else
  871. ctrl->defeature_PHP = 0; /* PHP not supported */
  872. /* Alternate Base Address Register Interface
  873. * (0=not supported, 1=supported)
  874. */
  875. if (subsystem_deviceid & 0x0010)
  876. ctrl->alternate_base_address = 1;
  877. else
  878. ctrl->alternate_base_address = 0;
  879. /* PCI Config Space Index (0=not supported, 1=supported) */
  880. if (subsystem_deviceid & 0x0020)
  881. ctrl->pci_config_space = 1;
  882. else
  883. ctrl->pci_config_space = 0;
  884. /* PCI-X support */
  885. if (subsystem_deviceid & 0x0080) {
  886. ctrl->pcix_support = 1;
  887. if (subsystem_deviceid & 0x0040)
  888. /* 133MHz PCI-X if bit 7 is 1 */
  889. ctrl->pcix_speed_capability = 1;
  890. else
  891. /* 100MHz PCI-X if bit 7 is 1 and bit 0 is 0, */
  892. /* 66MHz PCI-X if bit 7 is 1 and bit 0 is 1 */
  893. ctrl->pcix_speed_capability = 0;
  894. } else {
  895. /* Conventional PCI */
  896. ctrl->pcix_support = 0;
  897. ctrl->pcix_speed_capability = 0;
  898. }
  899. break;
  900. default:
  901. err(msg_HPC_not_supported);
  902. rc = -ENODEV;
  903. goto err_free_ctrl;
  904. }
  905. /* Tell the user that we found one. */
  906. info("Initializing the PCI hot plug controller residing on PCI bus %d\n",
  907. pdev->bus->number);
  908. dbg("Hotplug controller capabilities:\n");
  909. dbg(" speed_capability %d\n", ctrl->speed_capability);
  910. dbg(" slot_switch_type %s\n", ctrl->slot_switch_type ?
  911. "switch present" : "no switch");
  912. dbg(" defeature_PHP %s\n", ctrl->defeature_PHP ?
  913. "PHP supported" : "PHP not supported");
  914. dbg(" alternate_base_address %s\n", ctrl->alternate_base_address ?
  915. "supported" : "not supported");
  916. dbg(" pci_config_space %s\n", ctrl->pci_config_space ?
  917. "supported" : "not supported");
  918. dbg(" pcix_speed_capability %s\n", ctrl->pcix_speed_capability ?
  919. "supported" : "not supported");
  920. dbg(" pcix_support %s\n", ctrl->pcix_support ?
  921. "supported" : "not supported");
  922. ctrl->pci_dev = pdev;
  923. pci_set_drvdata(pdev, ctrl);
  924. /* make our own copy of the pci bus structure,
  925. * as we like tweaking it a lot */
  926. ctrl->pci_bus = kmalloc(sizeof(*ctrl->pci_bus), GFP_KERNEL);
  927. if (!ctrl->pci_bus) {
  928. err("out of memory\n");
  929. rc = -ENOMEM;
  930. goto err_free_ctrl;
  931. }
  932. memcpy(ctrl->pci_bus, pdev->bus, sizeof(*ctrl->pci_bus));
  933. ctrl->bus = pdev->bus->number;
  934. ctrl->rev = pdev->revision;
  935. dbg("bus device function rev: %d %d %d %d\n", ctrl->bus,
  936. PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), ctrl->rev);
  937. mutex_init(&ctrl->crit_sect);
  938. init_waitqueue_head(&ctrl->queue);
  939. /* initialize our threads if they haven't already been started up */
  940. rc = one_time_init();
  941. if (rc) {
  942. goto err_free_bus;
  943. }
  944. dbg("pdev = %p\n", pdev);
  945. dbg("pci resource start %llx\n", (unsigned long long)pci_resource_start(pdev, 0));
  946. dbg("pci resource len %llx\n", (unsigned long long)pci_resource_len(pdev, 0));
  947. if (!request_mem_region(pci_resource_start(pdev, 0),
  948. pci_resource_len(pdev, 0), MY_NAME)) {
  949. err("cannot reserve MMIO region\n");
  950. rc = -ENOMEM;
  951. goto err_free_bus;
  952. }
  953. ctrl->hpc_reg = ioremap(pci_resource_start(pdev, 0),
  954. pci_resource_len(pdev, 0));
  955. if (!ctrl->hpc_reg) {
  956. err("cannot remap MMIO region %llx @ %llx\n",
  957. (unsigned long long)pci_resource_len(pdev, 0),
  958. (unsigned long long)pci_resource_start(pdev, 0));
  959. rc = -ENODEV;
  960. goto err_free_mem_region;
  961. }
  962. /* Check for 66Mhz operation */
  963. ctrl->speed = get_controller_speed(ctrl);
  964. /********************************************************
  965. *
  966. * Save configuration headers for this and
  967. * subordinate PCI buses
  968. *
  969. ********************************************************/
  970. /* find the physical slot number of the first hot plug slot */
  971. /* Get slot won't work for devices behind bridges, but
  972. * in this case it will always be called for the "base"
  973. * bus/dev/func of a slot.
  974. * CS: this is leveraging the PCIIRQ routing code from the kernel
  975. * (pci-pc.c: get_irq_routing_table) */
  976. rc = get_slot_mapping(ctrl->pci_bus, pdev->bus->number,
  977. (readb(ctrl->hpc_reg + SLOT_MASK) >> 4),
  978. &(ctrl->first_slot));
  979. dbg("get_slot_mapping: first_slot = %d, returned = %d\n",
  980. ctrl->first_slot, rc);
  981. if (rc) {
  982. err(msg_initialization_err, rc);
  983. goto err_iounmap;
  984. }
  985. /* Store PCI Config Space for all devices on this bus */
  986. rc = cpqhp_save_config(ctrl, ctrl->bus, readb(ctrl->hpc_reg + SLOT_MASK));
  987. if (rc) {
  988. err("%s: unable to save PCI configuration data, error %d\n",
  989. __func__, rc);
  990. goto err_iounmap;
  991. }
  992. /*
  993. * Get IO, memory, and IRQ resources for new devices
  994. */
  995. /* The next line is required for cpqhp_find_available_resources */
  996. ctrl->interrupt = pdev->irq;
  997. if (ctrl->interrupt < 0x10) {
  998. cpqhp_legacy_mode = 1;
  999. dbg("System seems to be configured for Full Table Mapped MPS mode\n");
  1000. }
  1001. ctrl->cfgspc_irq = 0;
  1002. pci_read_config_byte(pdev, PCI_INTERRUPT_LINE, &ctrl->cfgspc_irq);
  1003. rc = cpqhp_find_available_resources(ctrl, cpqhp_rom_start);
  1004. ctrl->add_support = !rc;
  1005. if (rc) {
  1006. dbg("cpqhp_find_available_resources = 0x%x\n", rc);
  1007. err("unable to locate PCI configuration resources for hot plug add.\n");
  1008. goto err_iounmap;
  1009. }
  1010. /*
  1011. * Finish setting up the hot plug ctrl device
  1012. */
  1013. ctrl->slot_device_offset = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
  1014. dbg("NumSlots %d \n", ctrl->slot_device_offset);
  1015. ctrl->next_event = 0;
  1016. /* Setup the slot information structures */
  1017. rc = ctrl_slot_setup(ctrl, smbios_start, smbios_table);
  1018. if (rc) {
  1019. err(msg_initialization_err, 6);
  1020. err("%s: unable to save PCI configuration data, error %d\n",
  1021. __func__, rc);
  1022. goto err_iounmap;
  1023. }
  1024. /* Mask all general input interrupts */
  1025. writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_MASK);
  1026. /* set up the interrupt */
  1027. dbg("HPC interrupt = %d \n", ctrl->interrupt);
  1028. if (request_irq(ctrl->interrupt, cpqhp_ctrl_intr,
  1029. IRQF_SHARED, MY_NAME, ctrl)) {
  1030. err("Can't get irq %d for the hotplug pci controller\n",
  1031. ctrl->interrupt);
  1032. rc = -ENODEV;
  1033. goto err_iounmap;
  1034. }
  1035. /* Enable Shift Out interrupt and clear it, also enable SERR on power
  1036. * fault
  1037. */
  1038. temp_word = readw(ctrl->hpc_reg + MISC);
  1039. temp_word |= 0x4006;
  1040. writew(temp_word, ctrl->hpc_reg + MISC);
  1041. /* Changed 05/05/97 to clear all interrupts at start */
  1042. writel(0xFFFFFFFFL, ctrl->hpc_reg + INT_INPUT_CLEAR);
  1043. ctrl->ctrl_int_comp = readl(ctrl->hpc_reg + INT_INPUT_CLEAR);
  1044. writel(0x0L, ctrl->hpc_reg + INT_MASK);
  1045. if (!cpqhp_ctrl_list) {
  1046. cpqhp_ctrl_list = ctrl;
  1047. ctrl->next = NULL;
  1048. } else {
  1049. ctrl->next = cpqhp_ctrl_list;
  1050. cpqhp_ctrl_list = ctrl;
  1051. }
  1052. /* turn off empty slots here unless command line option "ON" set
  1053. * Wait for exclusive access to hardware
  1054. */
  1055. mutex_lock(&ctrl->crit_sect);
  1056. num_of_slots = readb(ctrl->hpc_reg + SLOT_MASK) & 0x0F;
  1057. /* find first device number for the ctrl */
  1058. device = readb(ctrl->hpc_reg + SLOT_MASK) >> 4;
  1059. while (num_of_slots) {
  1060. dbg("num_of_slots: %d\n", num_of_slots);
  1061. func = cpqhp_slot_find(ctrl->bus, device, 0);
  1062. if (!func)
  1063. break;
  1064. hp_slot = func->device - ctrl->slot_device_offset;
  1065. dbg("hp_slot: %d\n", hp_slot);
  1066. /* We have to save the presence info for these slots */
  1067. temp_word = ctrl->ctrl_int_comp >> 16;
  1068. func->presence_save = (temp_word >> hp_slot) & 0x01;
  1069. func->presence_save |= (temp_word >> (hp_slot + 7)) & 0x02;
  1070. if (ctrl->ctrl_int_comp & (0x1L << hp_slot))
  1071. func->switch_save = 0;
  1072. else
  1073. func->switch_save = 0x10;
  1074. if (!power_mode)
  1075. if (!func->is_a_board) {
  1076. green_LED_off(ctrl, hp_slot);
  1077. slot_disable(ctrl, hp_slot);
  1078. }
  1079. device++;
  1080. num_of_slots--;
  1081. }
  1082. if (!power_mode) {
  1083. set_SOGO(ctrl);
  1084. /* Wait for SOBS to be unset */
  1085. wait_for_ctrl_irq(ctrl);
  1086. }
  1087. rc = init_SERR(ctrl);
  1088. if (rc) {
  1089. err("init_SERR failed\n");
  1090. mutex_unlock(&ctrl->crit_sect);
  1091. goto err_free_irq;
  1092. }
  1093. /* Done with exclusive hardware access */
  1094. mutex_unlock(&ctrl->crit_sect);
  1095. cpqhp_create_debugfs_files(ctrl);
  1096. return 0;
  1097. err_free_irq:
  1098. free_irq(ctrl->interrupt, ctrl);
  1099. err_iounmap:
  1100. iounmap(ctrl->hpc_reg);
  1101. err_free_mem_region:
  1102. release_mem_region(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
  1103. err_free_bus:
  1104. kfree(ctrl->pci_bus);
  1105. err_free_ctrl:
  1106. kfree(ctrl);
  1107. err_disable_device:
  1108. pci_disable_device(pdev);
  1109. return rc;
  1110. }
  1111. static void __exit unload_cpqphpd(void)
  1112. {
  1113. struct pci_func *next;
  1114. struct pci_func *TempSlot;
  1115. int loop;
  1116. u32 rc;
  1117. struct controller *ctrl;
  1118. struct controller *tctrl;
  1119. struct pci_resource *res;
  1120. struct pci_resource *tres;
  1121. rc = compaq_nvram_store(cpqhp_rom_start);
  1122. ctrl = cpqhp_ctrl_list;
  1123. while (ctrl) {
  1124. if (ctrl->hpc_reg) {
  1125. u16 misc;
  1126. rc = read_slot_enable (ctrl);
  1127. writeb(0, ctrl->hpc_reg + SLOT_SERR);
  1128. writel(0xFFFFFFC0L | ~rc, ctrl->hpc_reg + INT_MASK);
  1129. misc = readw(ctrl->hpc_reg + MISC);
  1130. misc &= 0xFFFD;
  1131. writew(misc, ctrl->hpc_reg + MISC);
  1132. }
  1133. ctrl_slot_cleanup(ctrl);
  1134. res = ctrl->io_head;
  1135. while (res) {
  1136. tres = res;
  1137. res = res->next;
  1138. kfree(tres);
  1139. }
  1140. res = ctrl->mem_head;
  1141. while (res) {
  1142. tres = res;
  1143. res = res->next;
  1144. kfree(tres);
  1145. }
  1146. res = ctrl->p_mem_head;
  1147. while (res) {
  1148. tres = res;
  1149. res = res->next;
  1150. kfree(tres);
  1151. }
  1152. res = ctrl->bus_head;
  1153. while (res) {
  1154. tres = res;
  1155. res = res->next;
  1156. kfree(tres);
  1157. }
  1158. kfree (ctrl->pci_bus);
  1159. tctrl = ctrl;
  1160. ctrl = ctrl->next;
  1161. kfree(tctrl);
  1162. }
  1163. for (loop = 0; loop < 256; loop++) {
  1164. next = cpqhp_slot_list[loop];
  1165. while (next != NULL) {
  1166. res = next->io_head;
  1167. while (res) {
  1168. tres = res;
  1169. res = res->next;
  1170. kfree(tres);
  1171. }
  1172. res = next->mem_head;
  1173. while (res) {
  1174. tres = res;
  1175. res = res->next;
  1176. kfree(tres);
  1177. }
  1178. res = next->p_mem_head;
  1179. while (res) {
  1180. tres = res;
  1181. res = res->next;
  1182. kfree(tres);
  1183. }
  1184. res = next->bus_head;
  1185. while (res) {
  1186. tres = res;
  1187. res = res->next;
  1188. kfree(tres);
  1189. }
  1190. TempSlot = next;
  1191. next = next->next;
  1192. kfree(TempSlot);
  1193. }
  1194. }
  1195. /* Stop the notification mechanism */
  1196. if (initialized)
  1197. cpqhp_event_stop_thread();
  1198. /* unmap the rom address */
  1199. if (cpqhp_rom_start)
  1200. iounmap(cpqhp_rom_start);
  1201. if (smbios_start)
  1202. iounmap(smbios_start);
  1203. }
  1204. static struct pci_device_id hpcd_pci_tbl[] = {
  1205. {
  1206. /* handle any PCI Hotplug controller */
  1207. .class = ((PCI_CLASS_SYSTEM_PCI_HOTPLUG << 8) | 0x00),
  1208. .class_mask = ~0,
  1209. /* no matter who makes it */
  1210. .vendor = PCI_ANY_ID,
  1211. .device = PCI_ANY_ID,
  1212. .subvendor = PCI_ANY_ID,
  1213. .subdevice = PCI_ANY_ID,
  1214. }, { /* end: all zeroes */ }
  1215. };
  1216. MODULE_DEVICE_TABLE(pci, hpcd_pci_tbl);
  1217. static struct pci_driver cpqhpc_driver = {
  1218. .name = "compaq_pci_hotplug",
  1219. .id_table = hpcd_pci_tbl,
  1220. .probe = cpqhpc_probe,
  1221. /* remove: cpqhpc_remove_one, */
  1222. };
  1223. static int __init cpqhpc_init(void)
  1224. {
  1225. int result;
  1226. cpqhp_debug = debug;
  1227. info (DRIVER_DESC " version: " DRIVER_VERSION "\n");
  1228. cpqhp_initialize_debugfs();
  1229. result = pci_register_driver(&cpqhpc_driver);
  1230. dbg("pci_register_driver = %d\n", result);
  1231. return result;
  1232. }
  1233. static void __exit cpqhpc_cleanup(void)
  1234. {
  1235. dbg("unload_cpqphpd()\n");
  1236. unload_cpqphpd();
  1237. dbg("pci_unregister_driver\n");
  1238. pci_unregister_driver(&cpqhpc_driver);
  1239. cpqhp_shutdown_debugfs();
  1240. }
  1241. module_init(cpqhpc_init);
  1242. module_exit(cpqhpc_cleanup);