exynos_drm_crtc.c 12 KB

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  1. /* exynos_drm_crtc.c
  2. *
  3. * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  4. * Authors:
  5. * Inki Dae <inki.dae@samsung.com>
  6. * Joonyoung Shim <jy0922.shim@samsung.com>
  7. * Seung-Woo Kim <sw0312.kim@samsung.com>
  8. *
  9. * Permission is hereby granted, free of charge, to any person obtaining a
  10. * copy of this software and associated documentation files (the "Software"),
  11. * to deal in the Software without restriction, including without limitation
  12. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  13. * and/or sell copies of the Software, and to permit persons to whom the
  14. * Software is furnished to do so, subject to the following conditions:
  15. *
  16. * The above copyright notice and this permission notice (including the next
  17. * paragraph) shall be included in all copies or substantial portions of the
  18. * Software.
  19. *
  20. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  21. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  22. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  23. * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
  24. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  25. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  26. * OTHER DEALINGS IN THE SOFTWARE.
  27. */
  28. #include "drmP.h"
  29. #include "drm_crtc_helper.h"
  30. #include "exynos_drm_crtc.h"
  31. #include "exynos_drm_drv.h"
  32. #include "exynos_drm_fb.h"
  33. #include "exynos_drm_encoder.h"
  34. #include "exynos_drm_gem.h"
  35. #include "exynos_drm_buf.h"
  36. #define to_exynos_crtc(x) container_of(x, struct exynos_drm_crtc,\
  37. drm_crtc)
  38. /*
  39. * Exynos specific crtc structure.
  40. *
  41. * @drm_crtc: crtc object.
  42. * @overlay: contain information common to display controller and hdmi and
  43. * contents of this overlay object would be copied to sub driver size.
  44. * @pipe: a crtc index created at load() with a new crtc object creation
  45. * and the crtc object would be set to private->crtc array
  46. * to get a crtc object corresponding to this pipe from private->crtc
  47. * array when irq interrupt occured. the reason of using this pipe is that
  48. * drm framework doesn't support multiple irq yet.
  49. * we can refer to the crtc to current hardware interrupt occured through
  50. * this pipe value.
  51. * @dpms: store the crtc dpms value
  52. */
  53. struct exynos_drm_crtc {
  54. struct drm_crtc drm_crtc;
  55. struct exynos_drm_overlay overlay;
  56. unsigned int pipe;
  57. unsigned int dpms;
  58. };
  59. static void exynos_drm_crtc_apply(struct drm_crtc *crtc)
  60. {
  61. struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
  62. struct exynos_drm_overlay *overlay = &exynos_crtc->overlay;
  63. exynos_drm_fn_encoder(crtc, overlay,
  64. exynos_drm_encoder_crtc_mode_set);
  65. exynos_drm_fn_encoder(crtc, &exynos_crtc->pipe,
  66. exynos_drm_encoder_crtc_commit);
  67. }
  68. int exynos_drm_overlay_update(struct exynos_drm_overlay *overlay,
  69. struct drm_framebuffer *fb,
  70. struct drm_display_mode *mode,
  71. struct exynos_drm_crtc_pos *pos)
  72. {
  73. struct exynos_drm_gem_buf *buffer;
  74. unsigned int actual_w;
  75. unsigned int actual_h;
  76. buffer = exynos_drm_fb_get_buf(fb);
  77. if (!buffer) {
  78. DRM_LOG_KMS("buffer is null.\n");
  79. return -EFAULT;
  80. }
  81. overlay->dma_addr = buffer->dma_addr;
  82. overlay->vaddr = buffer->kvaddr;
  83. DRM_DEBUG_KMS("vaddr = 0x%lx, dma_addr = 0x%lx\n",
  84. (unsigned long)overlay->vaddr,
  85. (unsigned long)overlay->dma_addr);
  86. actual_w = min((mode->hdisplay - pos->crtc_x), pos->crtc_w);
  87. actual_h = min((mode->vdisplay - pos->crtc_y), pos->crtc_h);
  88. /* set drm framebuffer data. */
  89. overlay->fb_x = pos->fb_x;
  90. overlay->fb_y = pos->fb_y;
  91. overlay->fb_width = fb->width;
  92. overlay->fb_height = fb->height;
  93. overlay->bpp = fb->bits_per_pixel;
  94. overlay->pitch = fb->pitches[0];
  95. /* set overlay range to be displayed. */
  96. overlay->crtc_x = pos->crtc_x;
  97. overlay->crtc_y = pos->crtc_y;
  98. overlay->crtc_width = actual_w;
  99. overlay->crtc_height = actual_h;
  100. /* set drm mode data. */
  101. overlay->mode_width = mode->hdisplay;
  102. overlay->mode_height = mode->vdisplay;
  103. overlay->refresh = mode->vrefresh;
  104. overlay->scan_flag = mode->flags;
  105. DRM_DEBUG_KMS("overlay : offset_x/y(%d,%d), width/height(%d,%d)",
  106. overlay->crtc_x, overlay->crtc_y,
  107. overlay->crtc_width, overlay->crtc_height);
  108. return 0;
  109. }
  110. static int exynos_drm_crtc_update(struct drm_crtc *crtc)
  111. {
  112. struct exynos_drm_crtc *exynos_crtc;
  113. struct exynos_drm_overlay *overlay;
  114. struct exynos_drm_crtc_pos pos;
  115. struct drm_display_mode *mode = &crtc->mode;
  116. struct drm_framebuffer *fb = crtc->fb;
  117. if (!mode || !fb)
  118. return -EINVAL;
  119. exynos_crtc = to_exynos_crtc(crtc);
  120. overlay = &exynos_crtc->overlay;
  121. memset(&pos, 0, sizeof(struct exynos_drm_crtc_pos));
  122. /* it means the offset of framebuffer to be displayed. */
  123. pos.fb_x = crtc->x;
  124. pos.fb_y = crtc->y;
  125. /* OSD position to be displayed. */
  126. pos.crtc_x = 0;
  127. pos.crtc_y = 0;
  128. pos.crtc_w = fb->width - crtc->x;
  129. pos.crtc_h = fb->height - crtc->y;
  130. return exynos_drm_overlay_update(overlay, crtc->fb, mode, &pos);
  131. }
  132. static void exynos_drm_crtc_dpms(struct drm_crtc *crtc, int mode)
  133. {
  134. struct drm_device *dev = crtc->dev;
  135. struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
  136. DRM_DEBUG_KMS("crtc[%d] mode[%d]\n", crtc->base.id, mode);
  137. if (exynos_crtc->dpms == mode) {
  138. DRM_DEBUG_KMS("desired dpms mode is same as previous one.\n");
  139. return;
  140. }
  141. mutex_lock(&dev->struct_mutex);
  142. switch (mode) {
  143. case DRM_MODE_DPMS_ON:
  144. exynos_drm_fn_encoder(crtc, &mode,
  145. exynos_drm_encoder_crtc_dpms);
  146. exynos_crtc->dpms = mode;
  147. break;
  148. case DRM_MODE_DPMS_STANDBY:
  149. case DRM_MODE_DPMS_SUSPEND:
  150. case DRM_MODE_DPMS_OFF:
  151. exynos_drm_fn_encoder(crtc, &mode,
  152. exynos_drm_encoder_crtc_dpms);
  153. exynos_crtc->dpms = mode;
  154. break;
  155. default:
  156. DRM_ERROR("unspecified mode %d\n", mode);
  157. break;
  158. }
  159. mutex_unlock(&dev->struct_mutex);
  160. }
  161. static void exynos_drm_crtc_prepare(struct drm_crtc *crtc)
  162. {
  163. DRM_DEBUG_KMS("%s\n", __FILE__);
  164. /* drm framework doesn't check NULL. */
  165. }
  166. static void exynos_drm_crtc_commit(struct drm_crtc *crtc)
  167. {
  168. struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
  169. DRM_DEBUG_KMS("%s\n", __FILE__);
  170. /*
  171. * when set_crtc is requested from user or at booting time,
  172. * crtc->commit would be called without dpms call so if dpms is
  173. * no power on then crtc->dpms should be called
  174. * with DRM_MODE_DPMS_ON for the hardware power to be on.
  175. */
  176. if (exynos_crtc->dpms != DRM_MODE_DPMS_ON) {
  177. int mode = DRM_MODE_DPMS_ON;
  178. /*
  179. * enable hardware(power on) to all encoders hdmi connected
  180. * to current crtc.
  181. */
  182. exynos_drm_crtc_dpms(crtc, mode);
  183. /*
  184. * enable dma to all encoders connected to current crtc and
  185. * lcd panel.
  186. */
  187. exynos_drm_fn_encoder(crtc, &mode,
  188. exynos_drm_encoder_dpms_from_crtc);
  189. }
  190. exynos_drm_fn_encoder(crtc, &exynos_crtc->pipe,
  191. exynos_drm_encoder_crtc_commit);
  192. }
  193. static bool
  194. exynos_drm_crtc_mode_fixup(struct drm_crtc *crtc,
  195. struct drm_display_mode *mode,
  196. struct drm_display_mode *adjusted_mode)
  197. {
  198. DRM_DEBUG_KMS("%s\n", __FILE__);
  199. /* drm framework doesn't check NULL */
  200. return true;
  201. }
  202. static int
  203. exynos_drm_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode,
  204. struct drm_display_mode *adjusted_mode, int x, int y,
  205. struct drm_framebuffer *old_fb)
  206. {
  207. DRM_DEBUG_KMS("%s\n", __FILE__);
  208. mode = adjusted_mode;
  209. return exynos_drm_crtc_update(crtc);
  210. }
  211. static int exynos_drm_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
  212. struct drm_framebuffer *old_fb)
  213. {
  214. int ret;
  215. DRM_DEBUG_KMS("%s\n", __FILE__);
  216. ret = exynos_drm_crtc_update(crtc);
  217. if (ret)
  218. return ret;
  219. exynos_drm_crtc_apply(crtc);
  220. return ret;
  221. }
  222. static void exynos_drm_crtc_load_lut(struct drm_crtc *crtc)
  223. {
  224. DRM_DEBUG_KMS("%s\n", __FILE__);
  225. /* drm framework doesn't check NULL */
  226. }
  227. static struct drm_crtc_helper_funcs exynos_crtc_helper_funcs = {
  228. .dpms = exynos_drm_crtc_dpms,
  229. .prepare = exynos_drm_crtc_prepare,
  230. .commit = exynos_drm_crtc_commit,
  231. .mode_fixup = exynos_drm_crtc_mode_fixup,
  232. .mode_set = exynos_drm_crtc_mode_set,
  233. .mode_set_base = exynos_drm_crtc_mode_set_base,
  234. .load_lut = exynos_drm_crtc_load_lut,
  235. };
  236. static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc,
  237. struct drm_framebuffer *fb,
  238. struct drm_pending_vblank_event *event)
  239. {
  240. struct drm_device *dev = crtc->dev;
  241. struct exynos_drm_private *dev_priv = dev->dev_private;
  242. struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
  243. struct drm_framebuffer *old_fb = crtc->fb;
  244. int ret = -EINVAL;
  245. DRM_DEBUG_KMS("%s\n", __FILE__);
  246. mutex_lock(&dev->struct_mutex);
  247. if (event) {
  248. /*
  249. * the pipe from user always is 0 so we can set pipe number
  250. * of current owner to event.
  251. */
  252. event->pipe = exynos_crtc->pipe;
  253. list_add_tail(&event->base.link,
  254. &dev_priv->pageflip_event_list);
  255. ret = drm_vblank_get(dev, exynos_crtc->pipe);
  256. if (ret) {
  257. DRM_DEBUG("failed to acquire vblank counter\n");
  258. list_del(&event->base.link);
  259. goto out;
  260. }
  261. crtc->fb = fb;
  262. ret = exynos_drm_crtc_update(crtc);
  263. if (ret) {
  264. crtc->fb = old_fb;
  265. drm_vblank_put(dev, exynos_crtc->pipe);
  266. list_del(&event->base.link);
  267. goto out;
  268. }
  269. /*
  270. * the values related to a buffer of the drm framebuffer
  271. * to be applied should be set at here. because these values
  272. * first, are set to shadow registers and then to
  273. * real registers at vsync front porch period.
  274. */
  275. exynos_drm_crtc_apply(crtc);
  276. }
  277. out:
  278. mutex_unlock(&dev->struct_mutex);
  279. return ret;
  280. }
  281. static void exynos_drm_crtc_destroy(struct drm_crtc *crtc)
  282. {
  283. struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
  284. struct exynos_drm_private *private = crtc->dev->dev_private;
  285. DRM_DEBUG_KMS("%s\n", __FILE__);
  286. private->crtc[exynos_crtc->pipe] = NULL;
  287. drm_crtc_cleanup(crtc);
  288. kfree(exynos_crtc);
  289. }
  290. static struct drm_crtc_funcs exynos_crtc_funcs = {
  291. .set_config = drm_crtc_helper_set_config,
  292. .page_flip = exynos_drm_crtc_page_flip,
  293. .destroy = exynos_drm_crtc_destroy,
  294. };
  295. struct exynos_drm_overlay *get_exynos_drm_overlay(struct drm_device *dev,
  296. struct drm_crtc *crtc)
  297. {
  298. struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
  299. return &exynos_crtc->overlay;
  300. }
  301. int exynos_drm_crtc_create(struct drm_device *dev, unsigned int nr)
  302. {
  303. struct exynos_drm_crtc *exynos_crtc;
  304. struct exynos_drm_private *private = dev->dev_private;
  305. struct drm_crtc *crtc;
  306. DRM_DEBUG_KMS("%s\n", __FILE__);
  307. exynos_crtc = kzalloc(sizeof(*exynos_crtc), GFP_KERNEL);
  308. if (!exynos_crtc) {
  309. DRM_ERROR("failed to allocate exynos crtc\n");
  310. return -ENOMEM;
  311. }
  312. exynos_crtc->pipe = nr;
  313. exynos_crtc->dpms = DRM_MODE_DPMS_OFF;
  314. exynos_crtc->overlay.zpos = DEFAULT_ZPOS;
  315. crtc = &exynos_crtc->drm_crtc;
  316. private->crtc[nr] = crtc;
  317. drm_crtc_init(dev, crtc, &exynos_crtc_funcs);
  318. drm_crtc_helper_add(crtc, &exynos_crtc_helper_funcs);
  319. return 0;
  320. }
  321. int exynos_drm_crtc_enable_vblank(struct drm_device *dev, int crtc)
  322. {
  323. struct exynos_drm_private *private = dev->dev_private;
  324. struct exynos_drm_crtc *exynos_crtc =
  325. to_exynos_crtc(private->crtc[crtc]);
  326. DRM_DEBUG_KMS("%s\n", __FILE__);
  327. if (exynos_crtc->dpms != DRM_MODE_DPMS_ON)
  328. return -EPERM;
  329. exynos_drm_fn_encoder(private->crtc[crtc], &crtc,
  330. exynos_drm_enable_vblank);
  331. return 0;
  332. }
  333. void exynos_drm_crtc_disable_vblank(struct drm_device *dev, int crtc)
  334. {
  335. struct exynos_drm_private *private = dev->dev_private;
  336. struct exynos_drm_crtc *exynos_crtc =
  337. to_exynos_crtc(private->crtc[crtc]);
  338. DRM_DEBUG_KMS("%s\n", __FILE__);
  339. if (exynos_crtc->dpms != DRM_MODE_DPMS_ON)
  340. return;
  341. exynos_drm_fn_encoder(private->crtc[crtc], &crtc,
  342. exynos_drm_disable_vblank);
  343. }
  344. MODULE_AUTHOR("Inki Dae <inki.dae@samsung.com>");
  345. MODULE_AUTHOR("Joonyoung Shim <jy0922.shim@samsung.com>");
  346. MODULE_AUTHOR("Seung-Woo Kim <sw0312.kim@samsung.com>");
  347. MODULE_DESCRIPTION("Samsung SoC DRM CRTC Driver");
  348. MODULE_LICENSE("GPL");