e1000_main.c 133 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2006 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  19. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  20. *******************************************************************************/
  21. #include "e1000.h"
  22. char e1000_driver_name[] = "e1000";
  23. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  24. #ifndef CONFIG_E1000_NAPI
  25. #define DRIVERNAPI
  26. #else
  27. #define DRIVERNAPI "-NAPI"
  28. #endif
  29. #define DRV_VERSION "7.0.38-k4"DRIVERNAPI
  30. char e1000_driver_version[] = DRV_VERSION;
  31. static char e1000_copyright[] = "Copyright (c) 1999-2006 Intel Corporation.";
  32. /* e1000_pci_tbl - PCI Device ID Table
  33. *
  34. * Last entry must be all 0s
  35. *
  36. * Macro expands to...
  37. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  38. */
  39. static struct pci_device_id e1000_pci_tbl[] = {
  40. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  41. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  42. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  43. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  44. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  45. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  46. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  47. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  48. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  49. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  50. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  51. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  52. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  53. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  54. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  55. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  56. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  57. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  58. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  59. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  60. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  61. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  62. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  63. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  64. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  65. INTEL_E1000_ETHERNET_DEVICE(0x105E),
  66. INTEL_E1000_ETHERNET_DEVICE(0x105F),
  67. INTEL_E1000_ETHERNET_DEVICE(0x1060),
  68. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  69. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  70. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  71. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  72. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  73. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  74. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  75. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  76. INTEL_E1000_ETHERNET_DEVICE(0x107D),
  77. INTEL_E1000_ETHERNET_DEVICE(0x107E),
  78. INTEL_E1000_ETHERNET_DEVICE(0x107F),
  79. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  80. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  81. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  82. INTEL_E1000_ETHERNET_DEVICE(0x1096),
  83. INTEL_E1000_ETHERNET_DEVICE(0x1098),
  84. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  85. INTEL_E1000_ETHERNET_DEVICE(0x109A),
  86. INTEL_E1000_ETHERNET_DEVICE(0x10B5),
  87. INTEL_E1000_ETHERNET_DEVICE(0x10B9),
  88. /* required last entry */
  89. {0,}
  90. };
  91. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  92. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  93. struct e1000_tx_ring *txdr);
  94. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  95. struct e1000_rx_ring *rxdr);
  96. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  97. struct e1000_tx_ring *tx_ring);
  98. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  99. struct e1000_rx_ring *rx_ring);
  100. /* Local Function Prototypes */
  101. static int e1000_init_module(void);
  102. static void e1000_exit_module(void);
  103. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  104. static void __devexit e1000_remove(struct pci_dev *pdev);
  105. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  106. static int e1000_sw_init(struct e1000_adapter *adapter);
  107. static int e1000_open(struct net_device *netdev);
  108. static int e1000_close(struct net_device *netdev);
  109. static void e1000_configure_tx(struct e1000_adapter *adapter);
  110. static void e1000_configure_rx(struct e1000_adapter *adapter);
  111. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  112. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  113. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  114. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  115. struct e1000_tx_ring *tx_ring);
  116. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  117. struct e1000_rx_ring *rx_ring);
  118. static void e1000_set_multi(struct net_device *netdev);
  119. static void e1000_update_phy_info(unsigned long data);
  120. static void e1000_watchdog(unsigned long data);
  121. static void e1000_82547_tx_fifo_stall(unsigned long data);
  122. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  123. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  124. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  125. static int e1000_set_mac(struct net_device *netdev, void *p);
  126. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  127. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
  128. struct e1000_tx_ring *tx_ring);
  129. #ifdef CONFIG_E1000_NAPI
  130. static int e1000_clean(struct net_device *poll_dev, int *budget);
  131. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  132. struct e1000_rx_ring *rx_ring,
  133. int *work_done, int work_to_do);
  134. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  135. struct e1000_rx_ring *rx_ring,
  136. int *work_done, int work_to_do);
  137. #else
  138. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  139. struct e1000_rx_ring *rx_ring);
  140. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  141. struct e1000_rx_ring *rx_ring);
  142. #endif
  143. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  144. struct e1000_rx_ring *rx_ring,
  145. int cleaned_count);
  146. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  147. struct e1000_rx_ring *rx_ring,
  148. int cleaned_count);
  149. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  150. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  151. int cmd);
  152. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  153. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  154. static void e1000_tx_timeout(struct net_device *dev);
  155. static void e1000_reset_task(struct net_device *dev);
  156. static void e1000_smartspeed(struct e1000_adapter *adapter);
  157. static int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  158. struct sk_buff *skb);
  159. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  160. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  161. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  162. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  163. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  164. #ifdef CONFIG_PM
  165. static int e1000_resume(struct pci_dev *pdev);
  166. #endif
  167. static void e1000_shutdown(struct pci_dev *pdev);
  168. #ifdef CONFIG_NET_POLL_CONTROLLER
  169. /* for netdump / net console */
  170. static void e1000_netpoll (struct net_device *netdev);
  171. #endif
  172. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev,
  173. pci_channel_state_t state);
  174. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev);
  175. static void e1000_io_resume(struct pci_dev *pdev);
  176. static struct pci_error_handlers e1000_err_handler = {
  177. .error_detected = e1000_io_error_detected,
  178. .slot_reset = e1000_io_slot_reset,
  179. .resume = e1000_io_resume,
  180. };
  181. static struct pci_driver e1000_driver = {
  182. .name = e1000_driver_name,
  183. .id_table = e1000_pci_tbl,
  184. .probe = e1000_probe,
  185. .remove = __devexit_p(e1000_remove),
  186. /* Power Managment Hooks */
  187. .suspend = e1000_suspend,
  188. #ifdef CONFIG_PM
  189. .resume = e1000_resume,
  190. #endif
  191. .shutdown = e1000_shutdown,
  192. .err_handler = &e1000_err_handler
  193. };
  194. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  195. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  196. MODULE_LICENSE("GPL");
  197. MODULE_VERSION(DRV_VERSION);
  198. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  199. module_param(debug, int, 0);
  200. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  201. /**
  202. * e1000_init_module - Driver Registration Routine
  203. *
  204. * e1000_init_module is the first routine called when the driver is
  205. * loaded. All it does is register with the PCI subsystem.
  206. **/
  207. static int __init
  208. e1000_init_module(void)
  209. {
  210. int ret;
  211. printk(KERN_INFO "%s - version %s\n",
  212. e1000_driver_string, e1000_driver_version);
  213. printk(KERN_INFO "%s\n", e1000_copyright);
  214. ret = pci_module_init(&e1000_driver);
  215. return ret;
  216. }
  217. module_init(e1000_init_module);
  218. /**
  219. * e1000_exit_module - Driver Exit Cleanup Routine
  220. *
  221. * e1000_exit_module is called just before the driver is removed
  222. * from memory.
  223. **/
  224. static void __exit
  225. e1000_exit_module(void)
  226. {
  227. pci_unregister_driver(&e1000_driver);
  228. }
  229. module_exit(e1000_exit_module);
  230. static int e1000_request_irq(struct e1000_adapter *adapter)
  231. {
  232. struct net_device *netdev = adapter->netdev;
  233. int flags, err = 0;
  234. flags = SA_SHIRQ | SA_SAMPLE_RANDOM;
  235. #ifdef CONFIG_PCI_MSI
  236. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  237. adapter->have_msi = TRUE;
  238. if ((err = pci_enable_msi(adapter->pdev))) {
  239. DPRINTK(PROBE, ERR,
  240. "Unable to allocate MSI interrupt Error: %d\n", err);
  241. adapter->have_msi = FALSE;
  242. }
  243. }
  244. if (adapter->have_msi)
  245. flags &= ~SA_SHIRQ;
  246. #endif
  247. if ((err = request_irq(adapter->pdev->irq, &e1000_intr, flags,
  248. netdev->name, netdev)))
  249. DPRINTK(PROBE, ERR,
  250. "Unable to allocate interrupt Error: %d\n", err);
  251. return err;
  252. }
  253. static void e1000_free_irq(struct e1000_adapter *adapter)
  254. {
  255. struct net_device *netdev = adapter->netdev;
  256. free_irq(adapter->pdev->irq, netdev);
  257. #ifdef CONFIG_PCI_MSI
  258. if (adapter->have_msi)
  259. pci_disable_msi(adapter->pdev);
  260. #endif
  261. }
  262. /**
  263. * e1000_irq_disable - Mask off interrupt generation on the NIC
  264. * @adapter: board private structure
  265. **/
  266. static void
  267. e1000_irq_disable(struct e1000_adapter *adapter)
  268. {
  269. atomic_inc(&adapter->irq_sem);
  270. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  271. E1000_WRITE_FLUSH(&adapter->hw);
  272. synchronize_irq(adapter->pdev->irq);
  273. }
  274. /**
  275. * e1000_irq_enable - Enable default interrupt generation settings
  276. * @adapter: board private structure
  277. **/
  278. static void
  279. e1000_irq_enable(struct e1000_adapter *adapter)
  280. {
  281. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  282. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  283. E1000_WRITE_FLUSH(&adapter->hw);
  284. }
  285. }
  286. static void
  287. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  288. {
  289. struct net_device *netdev = adapter->netdev;
  290. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  291. uint16_t old_vid = adapter->mng_vlan_id;
  292. if (adapter->vlgrp) {
  293. if (!adapter->vlgrp->vlan_devices[vid]) {
  294. if (adapter->hw.mng_cookie.status &
  295. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  296. e1000_vlan_rx_add_vid(netdev, vid);
  297. adapter->mng_vlan_id = vid;
  298. } else
  299. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  300. if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  301. (vid != old_vid) &&
  302. !adapter->vlgrp->vlan_devices[old_vid])
  303. e1000_vlan_rx_kill_vid(netdev, old_vid);
  304. } else
  305. adapter->mng_vlan_id = vid;
  306. }
  307. }
  308. /**
  309. * e1000_release_hw_control - release control of the h/w to f/w
  310. * @adapter: address of board private structure
  311. *
  312. * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  313. * For ASF and Pass Through versions of f/w this means that the
  314. * driver is no longer loaded. For AMT version (only with 82573) i
  315. * of the f/w this means that the netowrk i/f is closed.
  316. *
  317. **/
  318. static void
  319. e1000_release_hw_control(struct e1000_adapter *adapter)
  320. {
  321. uint32_t ctrl_ext;
  322. uint32_t swsm;
  323. /* Let firmware taken over control of h/w */
  324. switch (adapter->hw.mac_type) {
  325. case e1000_82571:
  326. case e1000_82572:
  327. case e1000_80003es2lan:
  328. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  329. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  330. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  331. break;
  332. case e1000_82573:
  333. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  334. E1000_WRITE_REG(&adapter->hw, SWSM,
  335. swsm & ~E1000_SWSM_DRV_LOAD);
  336. default:
  337. break;
  338. }
  339. }
  340. /**
  341. * e1000_get_hw_control - get control of the h/w from f/w
  342. * @adapter: address of board private structure
  343. *
  344. * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  345. * For ASF and Pass Through versions of f/w this means that
  346. * the driver is loaded. For AMT version (only with 82573)
  347. * of the f/w this means that the netowrk i/f is open.
  348. *
  349. **/
  350. static void
  351. e1000_get_hw_control(struct e1000_adapter *adapter)
  352. {
  353. uint32_t ctrl_ext;
  354. uint32_t swsm;
  355. /* Let firmware know the driver has taken over */
  356. switch (adapter->hw.mac_type) {
  357. case e1000_82571:
  358. case e1000_82572:
  359. case e1000_80003es2lan:
  360. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  361. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  362. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  363. break;
  364. case e1000_82573:
  365. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  366. E1000_WRITE_REG(&adapter->hw, SWSM,
  367. swsm | E1000_SWSM_DRV_LOAD);
  368. break;
  369. default:
  370. break;
  371. }
  372. }
  373. int
  374. e1000_up(struct e1000_adapter *adapter)
  375. {
  376. struct net_device *netdev = adapter->netdev;
  377. int i;
  378. /* hardware has been reset, we need to reload some things */
  379. e1000_set_multi(netdev);
  380. e1000_restore_vlan(adapter);
  381. e1000_configure_tx(adapter);
  382. e1000_setup_rctl(adapter);
  383. e1000_configure_rx(adapter);
  384. /* call E1000_DESC_UNUSED which always leaves
  385. * at least 1 descriptor unused to make sure
  386. * next_to_use != next_to_clean */
  387. for (i = 0; i < adapter->num_rx_queues; i++) {
  388. struct e1000_rx_ring *ring = &adapter->rx_ring[i];
  389. adapter->alloc_rx_buf(adapter, ring,
  390. E1000_DESC_UNUSED(ring));
  391. }
  392. adapter->tx_queue_len = netdev->tx_queue_len;
  393. mod_timer(&adapter->watchdog_timer, jiffies);
  394. #ifdef CONFIG_E1000_NAPI
  395. netif_poll_enable(netdev);
  396. #endif
  397. e1000_irq_enable(adapter);
  398. return 0;
  399. }
  400. /**
  401. * e1000_power_up_phy - restore link in case the phy was powered down
  402. * @adapter: address of board private structure
  403. *
  404. * The phy may be powered down to save power and turn off link when the
  405. * driver is unloaded and wake on lan is not enabled (among others)
  406. * *** this routine MUST be followed by a call to e1000_reset ***
  407. *
  408. **/
  409. static void e1000_power_up_phy(struct e1000_adapter *adapter)
  410. {
  411. uint16_t mii_reg = 0;
  412. /* Just clear the power down bit to wake the phy back up */
  413. if (adapter->hw.media_type == e1000_media_type_copper) {
  414. /* according to the manual, the phy will retain its
  415. * settings across a power-down/up cycle */
  416. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  417. mii_reg &= ~MII_CR_POWER_DOWN;
  418. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  419. }
  420. }
  421. static void e1000_power_down_phy(struct e1000_adapter *adapter)
  422. {
  423. boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
  424. e1000_check_mng_mode(&adapter->hw);
  425. /* Power down the PHY so no link is implied when interface is down
  426. * The PHY cannot be powered down if any of the following is TRUE
  427. * (a) WoL is enabled
  428. * (b) AMT is active
  429. * (c) SoL/IDER session is active */
  430. if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  431. adapter->hw.media_type == e1000_media_type_copper &&
  432. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
  433. !mng_mode_enabled &&
  434. !e1000_check_phy_reset_block(&adapter->hw)) {
  435. uint16_t mii_reg = 0;
  436. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  437. mii_reg |= MII_CR_POWER_DOWN;
  438. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  439. mdelay(1);
  440. }
  441. }
  442. void
  443. e1000_down(struct e1000_adapter *adapter)
  444. {
  445. struct net_device *netdev = adapter->netdev;
  446. e1000_irq_disable(adapter);
  447. del_timer_sync(&adapter->tx_fifo_stall_timer);
  448. del_timer_sync(&adapter->watchdog_timer);
  449. del_timer_sync(&adapter->phy_info_timer);
  450. #ifdef CONFIG_E1000_NAPI
  451. netif_poll_disable(netdev);
  452. #endif
  453. netdev->tx_queue_len = adapter->tx_queue_len;
  454. adapter->link_speed = 0;
  455. adapter->link_duplex = 0;
  456. netif_carrier_off(netdev);
  457. netif_stop_queue(netdev);
  458. e1000_reset(adapter);
  459. e1000_clean_all_tx_rings(adapter);
  460. e1000_clean_all_rx_rings(adapter);
  461. }
  462. void
  463. e1000_reinit_locked(struct e1000_adapter *adapter)
  464. {
  465. WARN_ON(in_interrupt());
  466. while (test_and_set_bit(__E1000_RESETTING, &adapter->flags))
  467. msleep(1);
  468. e1000_down(adapter);
  469. e1000_up(adapter);
  470. clear_bit(__E1000_RESETTING, &adapter->flags);
  471. }
  472. void
  473. e1000_reset(struct e1000_adapter *adapter)
  474. {
  475. uint32_t pba, manc;
  476. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  477. /* Repartition Pba for greater than 9k mtu
  478. * To take effect CTRL.RST is required.
  479. */
  480. switch (adapter->hw.mac_type) {
  481. case e1000_82547:
  482. case e1000_82547_rev_2:
  483. pba = E1000_PBA_30K;
  484. break;
  485. case e1000_82571:
  486. case e1000_82572:
  487. case e1000_80003es2lan:
  488. pba = E1000_PBA_38K;
  489. break;
  490. case e1000_82573:
  491. pba = E1000_PBA_12K;
  492. break;
  493. default:
  494. pba = E1000_PBA_48K;
  495. break;
  496. }
  497. if ((adapter->hw.mac_type != e1000_82573) &&
  498. (adapter->netdev->mtu > E1000_RXBUFFER_8192))
  499. pba -= 8; /* allocate more FIFO for Tx */
  500. if (adapter->hw.mac_type == e1000_82547) {
  501. adapter->tx_fifo_head = 0;
  502. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  503. adapter->tx_fifo_size =
  504. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  505. atomic_set(&adapter->tx_fifo_stall, 0);
  506. }
  507. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  508. /* flow control settings */
  509. /* Set the FC high water mark to 90% of the FIFO size.
  510. * Required to clear last 3 LSB */
  511. fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
  512. adapter->hw.fc_high_water = fc_high_water_mark;
  513. adapter->hw.fc_low_water = fc_high_water_mark - 8;
  514. if (adapter->hw.mac_type == e1000_80003es2lan)
  515. adapter->hw.fc_pause_time = 0xFFFF;
  516. else
  517. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  518. adapter->hw.fc_send_xon = 1;
  519. adapter->hw.fc = adapter->hw.original_fc;
  520. /* Allow time for pending master requests to run */
  521. e1000_reset_hw(&adapter->hw);
  522. if (adapter->hw.mac_type >= e1000_82544)
  523. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  524. if (e1000_init_hw(&adapter->hw))
  525. DPRINTK(PROBE, ERR, "Hardware Error\n");
  526. e1000_update_mng_vlan(adapter);
  527. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  528. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  529. e1000_reset_adaptive(&adapter->hw);
  530. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  531. if (!adapter->smart_power_down &&
  532. (adapter->hw.mac_type == e1000_82571 ||
  533. adapter->hw.mac_type == e1000_82572)) {
  534. uint16_t phy_data = 0;
  535. /* speed up time to link by disabling smart power down, ignore
  536. * the return value of this function because there is nothing
  537. * different we would do if it failed */
  538. e1000_read_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
  539. &phy_data);
  540. phy_data &= ~IGP02E1000_PM_SPD;
  541. e1000_write_phy_reg(&adapter->hw, IGP02E1000_PHY_POWER_MGMT,
  542. phy_data);
  543. }
  544. if (adapter->en_mng_pt) {
  545. manc = E1000_READ_REG(&adapter->hw, MANC);
  546. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  547. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  548. }
  549. }
  550. /**
  551. * e1000_probe - Device Initialization Routine
  552. * @pdev: PCI device information struct
  553. * @ent: entry in e1000_pci_tbl
  554. *
  555. * Returns 0 on success, negative on failure
  556. *
  557. * e1000_probe initializes an adapter identified by a pci_dev structure.
  558. * The OS initialization, configuring of the adapter private structure,
  559. * and a hardware reset occur.
  560. **/
  561. static int __devinit
  562. e1000_probe(struct pci_dev *pdev,
  563. const struct pci_device_id *ent)
  564. {
  565. struct net_device *netdev;
  566. struct e1000_adapter *adapter;
  567. unsigned long mmio_start, mmio_len;
  568. static int cards_found = 0;
  569. static int e1000_ksp3_port_a = 0; /* global ksp3 port a indication */
  570. int i, err, pci_using_dac;
  571. uint16_t eeprom_data;
  572. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  573. if ((err = pci_enable_device(pdev)))
  574. return err;
  575. if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
  576. pci_using_dac = 1;
  577. } else {
  578. if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
  579. E1000_ERR("No usable DMA configuration, aborting\n");
  580. return err;
  581. }
  582. pci_using_dac = 0;
  583. }
  584. if ((err = pci_request_regions(pdev, e1000_driver_name)))
  585. return err;
  586. pci_set_master(pdev);
  587. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  588. if (!netdev) {
  589. err = -ENOMEM;
  590. goto err_alloc_etherdev;
  591. }
  592. SET_MODULE_OWNER(netdev);
  593. SET_NETDEV_DEV(netdev, &pdev->dev);
  594. pci_set_drvdata(pdev, netdev);
  595. adapter = netdev_priv(netdev);
  596. adapter->netdev = netdev;
  597. adapter->pdev = pdev;
  598. adapter->hw.back = adapter;
  599. adapter->msg_enable = (1 << debug) - 1;
  600. mmio_start = pci_resource_start(pdev, BAR_0);
  601. mmio_len = pci_resource_len(pdev, BAR_0);
  602. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  603. if (!adapter->hw.hw_addr) {
  604. err = -EIO;
  605. goto err_ioremap;
  606. }
  607. for (i = BAR_1; i <= BAR_5; i++) {
  608. if (pci_resource_len(pdev, i) == 0)
  609. continue;
  610. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  611. adapter->hw.io_base = pci_resource_start(pdev, i);
  612. break;
  613. }
  614. }
  615. netdev->open = &e1000_open;
  616. netdev->stop = &e1000_close;
  617. netdev->hard_start_xmit = &e1000_xmit_frame;
  618. netdev->get_stats = &e1000_get_stats;
  619. netdev->set_multicast_list = &e1000_set_multi;
  620. netdev->set_mac_address = &e1000_set_mac;
  621. netdev->change_mtu = &e1000_change_mtu;
  622. netdev->do_ioctl = &e1000_ioctl;
  623. e1000_set_ethtool_ops(netdev);
  624. netdev->tx_timeout = &e1000_tx_timeout;
  625. netdev->watchdog_timeo = 5 * HZ;
  626. #ifdef CONFIG_E1000_NAPI
  627. netdev->poll = &e1000_clean;
  628. netdev->weight = 64;
  629. #endif
  630. netdev->vlan_rx_register = e1000_vlan_rx_register;
  631. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  632. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  633. #ifdef CONFIG_NET_POLL_CONTROLLER
  634. netdev->poll_controller = e1000_netpoll;
  635. #endif
  636. strcpy(netdev->name, pci_name(pdev));
  637. netdev->mem_start = mmio_start;
  638. netdev->mem_end = mmio_start + mmio_len;
  639. netdev->base_addr = adapter->hw.io_base;
  640. adapter->bd_number = cards_found;
  641. /* setup the private structure */
  642. if ((err = e1000_sw_init(adapter)))
  643. goto err_sw_init;
  644. if ((err = e1000_check_phy_reset_block(&adapter->hw)))
  645. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  646. /* if ksp3, indicate if it's port a being setup */
  647. if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 &&
  648. e1000_ksp3_port_a == 0)
  649. adapter->ksp3_port_a = 1;
  650. e1000_ksp3_port_a++;
  651. /* Reset for multiple KP3 adapters */
  652. if (e1000_ksp3_port_a == 4)
  653. e1000_ksp3_port_a = 0;
  654. if (adapter->hw.mac_type >= e1000_82543) {
  655. netdev->features = NETIF_F_SG |
  656. NETIF_F_HW_CSUM |
  657. NETIF_F_HW_VLAN_TX |
  658. NETIF_F_HW_VLAN_RX |
  659. NETIF_F_HW_VLAN_FILTER;
  660. }
  661. #ifdef NETIF_F_TSO
  662. if ((adapter->hw.mac_type >= e1000_82544) &&
  663. (adapter->hw.mac_type != e1000_82547))
  664. netdev->features |= NETIF_F_TSO;
  665. #ifdef NETIF_F_TSO_IPV6
  666. if (adapter->hw.mac_type > e1000_82547_rev_2)
  667. netdev->features |= NETIF_F_TSO_IPV6;
  668. #endif
  669. #endif
  670. if (pci_using_dac)
  671. netdev->features |= NETIF_F_HIGHDMA;
  672. /* hard_start_xmit is safe against parallel locking */
  673. netdev->features |= NETIF_F_LLTX;
  674. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  675. /* before reading the EEPROM, reset the controller to
  676. * put the device in a known good starting state */
  677. e1000_reset_hw(&adapter->hw);
  678. /* make sure the EEPROM is good */
  679. if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  680. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  681. err = -EIO;
  682. goto err_eeprom;
  683. }
  684. /* copy the MAC address out of the EEPROM */
  685. if (e1000_read_mac_addr(&adapter->hw))
  686. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  687. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  688. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  689. if (!is_valid_ether_addr(netdev->perm_addr)) {
  690. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  691. err = -EIO;
  692. goto err_eeprom;
  693. }
  694. e1000_read_part_num(&adapter->hw, &(adapter->part_num));
  695. e1000_get_bus_info(&adapter->hw);
  696. init_timer(&adapter->tx_fifo_stall_timer);
  697. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  698. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  699. init_timer(&adapter->watchdog_timer);
  700. adapter->watchdog_timer.function = &e1000_watchdog;
  701. adapter->watchdog_timer.data = (unsigned long) adapter;
  702. init_timer(&adapter->phy_info_timer);
  703. adapter->phy_info_timer.function = &e1000_update_phy_info;
  704. adapter->phy_info_timer.data = (unsigned long) adapter;
  705. INIT_WORK(&adapter->reset_task,
  706. (void (*)(void *))e1000_reset_task, netdev);
  707. /* we're going to reset, so assume we have no link for now */
  708. netif_carrier_off(netdev);
  709. netif_stop_queue(netdev);
  710. e1000_check_options(adapter);
  711. /* Initial Wake on LAN setting
  712. * If APM wake is enabled in the EEPROM,
  713. * enable the ACPI Magic Packet filter
  714. */
  715. switch (adapter->hw.mac_type) {
  716. case e1000_82542_rev2_0:
  717. case e1000_82542_rev2_1:
  718. case e1000_82543:
  719. break;
  720. case e1000_82544:
  721. e1000_read_eeprom(&adapter->hw,
  722. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  723. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  724. break;
  725. case e1000_82546:
  726. case e1000_82546_rev_3:
  727. case e1000_82571:
  728. case e1000_80003es2lan:
  729. if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
  730. e1000_read_eeprom(&adapter->hw,
  731. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  732. break;
  733. }
  734. /* Fall Through */
  735. default:
  736. e1000_read_eeprom(&adapter->hw,
  737. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  738. break;
  739. }
  740. if (eeprom_data & eeprom_apme_mask)
  741. adapter->wol |= E1000_WUFC_MAG;
  742. /* print bus type/speed/width info */
  743. {
  744. struct e1000_hw *hw = &adapter->hw;
  745. DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
  746. ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
  747. (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
  748. ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
  749. (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
  750. (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
  751. (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
  752. (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
  753. ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
  754. (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
  755. (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
  756. "32-bit"));
  757. }
  758. for (i = 0; i < 6; i++)
  759. printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
  760. /* reset the hardware with the new settings */
  761. e1000_reset(adapter);
  762. /* If the controller is 82573 and f/w is AMT, do not set
  763. * DRV_LOAD until the interface is up. For all other cases,
  764. * let the f/w know that the h/w is now under the control
  765. * of the driver. */
  766. if (adapter->hw.mac_type != e1000_82573 ||
  767. !e1000_check_mng_mode(&adapter->hw))
  768. e1000_get_hw_control(adapter);
  769. strcpy(netdev->name, "eth%d");
  770. if ((err = register_netdev(netdev)))
  771. goto err_register;
  772. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  773. cards_found++;
  774. return 0;
  775. err_register:
  776. err_sw_init:
  777. err_eeprom:
  778. iounmap(adapter->hw.hw_addr);
  779. err_ioremap:
  780. free_netdev(netdev);
  781. err_alloc_etherdev:
  782. pci_release_regions(pdev);
  783. return err;
  784. }
  785. /**
  786. * e1000_remove - Device Removal Routine
  787. * @pdev: PCI device information struct
  788. *
  789. * e1000_remove is called by the PCI subsystem to alert the driver
  790. * that it should release a PCI device. The could be caused by a
  791. * Hot-Plug event, or because the driver is going to be removed from
  792. * memory.
  793. **/
  794. static void __devexit
  795. e1000_remove(struct pci_dev *pdev)
  796. {
  797. struct net_device *netdev = pci_get_drvdata(pdev);
  798. struct e1000_adapter *adapter = netdev_priv(netdev);
  799. uint32_t manc;
  800. #ifdef CONFIG_E1000_NAPI
  801. int i;
  802. #endif
  803. flush_scheduled_work();
  804. if (adapter->hw.mac_type >= e1000_82540 &&
  805. adapter->hw.media_type == e1000_media_type_copper) {
  806. manc = E1000_READ_REG(&adapter->hw, MANC);
  807. if (manc & E1000_MANC_SMBUS_EN) {
  808. manc |= E1000_MANC_ARP_EN;
  809. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  810. }
  811. }
  812. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  813. * would have already happened in close and is redundant. */
  814. e1000_release_hw_control(adapter);
  815. unregister_netdev(netdev);
  816. #ifdef CONFIG_E1000_NAPI
  817. for (i = 0; i < adapter->num_rx_queues; i++)
  818. dev_put(&adapter->polling_netdev[i]);
  819. #endif
  820. if (!e1000_check_phy_reset_block(&adapter->hw))
  821. e1000_phy_hw_reset(&adapter->hw);
  822. kfree(adapter->tx_ring);
  823. kfree(adapter->rx_ring);
  824. #ifdef CONFIG_E1000_NAPI
  825. kfree(adapter->polling_netdev);
  826. #endif
  827. iounmap(adapter->hw.hw_addr);
  828. pci_release_regions(pdev);
  829. free_netdev(netdev);
  830. pci_disable_device(pdev);
  831. }
  832. /**
  833. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  834. * @adapter: board private structure to initialize
  835. *
  836. * e1000_sw_init initializes the Adapter private data structure.
  837. * Fields are initialized based on PCI device information and
  838. * OS network device settings (MTU size).
  839. **/
  840. static int __devinit
  841. e1000_sw_init(struct e1000_adapter *adapter)
  842. {
  843. struct e1000_hw *hw = &adapter->hw;
  844. struct net_device *netdev = adapter->netdev;
  845. struct pci_dev *pdev = adapter->pdev;
  846. #ifdef CONFIG_E1000_NAPI
  847. int i;
  848. #endif
  849. /* PCI config space info */
  850. hw->vendor_id = pdev->vendor;
  851. hw->device_id = pdev->device;
  852. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  853. hw->subsystem_id = pdev->subsystem_device;
  854. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  855. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  856. adapter->rx_buffer_len = MAXIMUM_ETHERNET_FRAME_SIZE;
  857. adapter->rx_ps_bsize0 = E1000_RXBUFFER_128;
  858. hw->max_frame_size = netdev->mtu +
  859. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  860. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  861. /* identify the MAC */
  862. if (e1000_set_mac_type(hw)) {
  863. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  864. return -EIO;
  865. }
  866. /* initialize eeprom parameters */
  867. if (e1000_init_eeprom_params(hw)) {
  868. E1000_ERR("EEPROM initialization failed\n");
  869. return -EIO;
  870. }
  871. switch (hw->mac_type) {
  872. default:
  873. break;
  874. case e1000_82541:
  875. case e1000_82547:
  876. case e1000_82541_rev_2:
  877. case e1000_82547_rev_2:
  878. hw->phy_init_script = 1;
  879. break;
  880. }
  881. e1000_set_media_type(hw);
  882. hw->wait_autoneg_complete = FALSE;
  883. hw->tbi_compatibility_en = TRUE;
  884. hw->adaptive_ifs = TRUE;
  885. /* Copper options */
  886. if (hw->media_type == e1000_media_type_copper) {
  887. hw->mdix = AUTO_ALL_MODES;
  888. hw->disable_polarity_correction = FALSE;
  889. hw->master_slave = E1000_MASTER_SLAVE;
  890. }
  891. adapter->num_tx_queues = 1;
  892. adapter->num_rx_queues = 1;
  893. if (e1000_alloc_queues(adapter)) {
  894. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  895. return -ENOMEM;
  896. }
  897. #ifdef CONFIG_E1000_NAPI
  898. for (i = 0; i < adapter->num_rx_queues; i++) {
  899. adapter->polling_netdev[i].priv = adapter;
  900. adapter->polling_netdev[i].poll = &e1000_clean;
  901. adapter->polling_netdev[i].weight = 64;
  902. dev_hold(&adapter->polling_netdev[i]);
  903. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  904. }
  905. spin_lock_init(&adapter->tx_queue_lock);
  906. #endif
  907. atomic_set(&adapter->irq_sem, 1);
  908. spin_lock_init(&adapter->stats_lock);
  909. return 0;
  910. }
  911. /**
  912. * e1000_alloc_queues - Allocate memory for all rings
  913. * @adapter: board private structure to initialize
  914. *
  915. * We allocate one ring per queue at run-time since we don't know the
  916. * number of queues at compile-time. The polling_netdev array is
  917. * intended for Multiqueue, but should work fine with a single queue.
  918. **/
  919. static int __devinit
  920. e1000_alloc_queues(struct e1000_adapter *adapter)
  921. {
  922. int size;
  923. size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  924. adapter->tx_ring = kmalloc(size, GFP_KERNEL);
  925. if (!adapter->tx_ring)
  926. return -ENOMEM;
  927. memset(adapter->tx_ring, 0, size);
  928. size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  929. adapter->rx_ring = kmalloc(size, GFP_KERNEL);
  930. if (!adapter->rx_ring) {
  931. kfree(adapter->tx_ring);
  932. return -ENOMEM;
  933. }
  934. memset(adapter->rx_ring, 0, size);
  935. #ifdef CONFIG_E1000_NAPI
  936. size = sizeof(struct net_device) * adapter->num_rx_queues;
  937. adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
  938. if (!adapter->polling_netdev) {
  939. kfree(adapter->tx_ring);
  940. kfree(adapter->rx_ring);
  941. return -ENOMEM;
  942. }
  943. memset(adapter->polling_netdev, 0, size);
  944. #endif
  945. return E1000_SUCCESS;
  946. }
  947. /**
  948. * e1000_open - Called when a network interface is made active
  949. * @netdev: network interface device structure
  950. *
  951. * Returns 0 on success, negative value on failure
  952. *
  953. * The open entry point is called when a network interface is made
  954. * active by the system (IFF_UP). At this point all resources needed
  955. * for transmit and receive operations are allocated, the interrupt
  956. * handler is registered with the OS, the watchdog timer is started,
  957. * and the stack is notified that the interface is ready.
  958. **/
  959. static int
  960. e1000_open(struct net_device *netdev)
  961. {
  962. struct e1000_adapter *adapter = netdev_priv(netdev);
  963. int err;
  964. /* disallow open during test */
  965. if (test_bit(__E1000_DRIVER_TESTING, &adapter->flags))
  966. return -EBUSY;
  967. /* allocate transmit descriptors */
  968. if ((err = e1000_setup_all_tx_resources(adapter)))
  969. goto err_setup_tx;
  970. /* allocate receive descriptors */
  971. if ((err = e1000_setup_all_rx_resources(adapter)))
  972. goto err_setup_rx;
  973. err = e1000_request_irq(adapter);
  974. if (err)
  975. goto err_up;
  976. e1000_power_up_phy(adapter);
  977. if ((err = e1000_up(adapter)))
  978. goto err_up;
  979. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  980. if ((adapter->hw.mng_cookie.status &
  981. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  982. e1000_update_mng_vlan(adapter);
  983. }
  984. /* If AMT is enabled, let the firmware know that the network
  985. * interface is now open */
  986. if (adapter->hw.mac_type == e1000_82573 &&
  987. e1000_check_mng_mode(&adapter->hw))
  988. e1000_get_hw_control(adapter);
  989. return E1000_SUCCESS;
  990. err_up:
  991. e1000_free_all_rx_resources(adapter);
  992. err_setup_rx:
  993. e1000_free_all_tx_resources(adapter);
  994. err_setup_tx:
  995. e1000_reset(adapter);
  996. return err;
  997. }
  998. /**
  999. * e1000_close - Disables a network interface
  1000. * @netdev: network interface device structure
  1001. *
  1002. * Returns 0, this is not allowed to fail
  1003. *
  1004. * The close entry point is called when an interface is de-activated
  1005. * by the OS. The hardware is still under the drivers control, but
  1006. * needs to be disabled. A global MAC reset is issued to stop the
  1007. * hardware, and all transmit and receive resources are freed.
  1008. **/
  1009. static int
  1010. e1000_close(struct net_device *netdev)
  1011. {
  1012. struct e1000_adapter *adapter = netdev_priv(netdev);
  1013. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  1014. e1000_down(adapter);
  1015. e1000_power_down_phy(adapter);
  1016. e1000_free_irq(adapter);
  1017. e1000_free_all_tx_resources(adapter);
  1018. e1000_free_all_rx_resources(adapter);
  1019. if ((adapter->hw.mng_cookie.status &
  1020. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1021. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  1022. }
  1023. /* If AMT is enabled, let the firmware know that the network
  1024. * interface is now closed */
  1025. if (adapter->hw.mac_type == e1000_82573 &&
  1026. e1000_check_mng_mode(&adapter->hw))
  1027. e1000_release_hw_control(adapter);
  1028. return 0;
  1029. }
  1030. /**
  1031. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  1032. * @adapter: address of board private structure
  1033. * @start: address of beginning of memory
  1034. * @len: length of memory
  1035. **/
  1036. static boolean_t
  1037. e1000_check_64k_bound(struct e1000_adapter *adapter,
  1038. void *start, unsigned long len)
  1039. {
  1040. unsigned long begin = (unsigned long) start;
  1041. unsigned long end = begin + len;
  1042. /* First rev 82545 and 82546 need to not allow any memory
  1043. * write location to cross 64k boundary due to errata 23 */
  1044. if (adapter->hw.mac_type == e1000_82545 ||
  1045. adapter->hw.mac_type == e1000_82546) {
  1046. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  1047. }
  1048. return TRUE;
  1049. }
  1050. /**
  1051. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1052. * @adapter: board private structure
  1053. * @txdr: tx descriptor ring (for a specific queue) to setup
  1054. *
  1055. * Return 0 on success, negative on failure
  1056. **/
  1057. static int
  1058. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1059. struct e1000_tx_ring *txdr)
  1060. {
  1061. struct pci_dev *pdev = adapter->pdev;
  1062. int size;
  1063. size = sizeof(struct e1000_buffer) * txdr->count;
  1064. txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1065. if (!txdr->buffer_info) {
  1066. DPRINTK(PROBE, ERR,
  1067. "Unable to allocate memory for the transmit descriptor ring\n");
  1068. return -ENOMEM;
  1069. }
  1070. memset(txdr->buffer_info, 0, size);
  1071. /* round up to nearest 4K */
  1072. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1073. E1000_ROUNDUP(txdr->size, 4096);
  1074. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1075. if (!txdr->desc) {
  1076. setup_tx_desc_die:
  1077. vfree(txdr->buffer_info);
  1078. DPRINTK(PROBE, ERR,
  1079. "Unable to allocate memory for the transmit descriptor ring\n");
  1080. return -ENOMEM;
  1081. }
  1082. /* Fix for errata 23, can't cross 64kB boundary */
  1083. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1084. void *olddesc = txdr->desc;
  1085. dma_addr_t olddma = txdr->dma;
  1086. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  1087. "at %p\n", txdr->size, txdr->desc);
  1088. /* Try again, without freeing the previous */
  1089. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1090. /* Failed allocation, critical failure */
  1091. if (!txdr->desc) {
  1092. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1093. goto setup_tx_desc_die;
  1094. }
  1095. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1096. /* give up */
  1097. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1098. txdr->dma);
  1099. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1100. DPRINTK(PROBE, ERR,
  1101. "Unable to allocate aligned memory "
  1102. "for the transmit descriptor ring\n");
  1103. vfree(txdr->buffer_info);
  1104. return -ENOMEM;
  1105. } else {
  1106. /* Free old allocation, new allocation was successful */
  1107. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1108. }
  1109. }
  1110. memset(txdr->desc, 0, txdr->size);
  1111. txdr->next_to_use = 0;
  1112. txdr->next_to_clean = 0;
  1113. spin_lock_init(&txdr->tx_lock);
  1114. return 0;
  1115. }
  1116. /**
  1117. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1118. * (Descriptors) for all queues
  1119. * @adapter: board private structure
  1120. *
  1121. * If this function returns with an error, then it's possible one or
  1122. * more of the rings is populated (while the rest are not). It is the
  1123. * callers duty to clean those orphaned rings.
  1124. *
  1125. * Return 0 on success, negative on failure
  1126. **/
  1127. int
  1128. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1129. {
  1130. int i, err = 0;
  1131. for (i = 0; i < adapter->num_tx_queues; i++) {
  1132. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1133. if (err) {
  1134. DPRINTK(PROBE, ERR,
  1135. "Allocation for Tx Queue %u failed\n", i);
  1136. break;
  1137. }
  1138. }
  1139. return err;
  1140. }
  1141. /**
  1142. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1143. * @adapter: board private structure
  1144. *
  1145. * Configure the Tx unit of the MAC after a reset.
  1146. **/
  1147. static void
  1148. e1000_configure_tx(struct e1000_adapter *adapter)
  1149. {
  1150. uint64_t tdba;
  1151. struct e1000_hw *hw = &adapter->hw;
  1152. uint32_t tdlen, tctl, tipg, tarc;
  1153. uint32_t ipgr1, ipgr2;
  1154. /* Setup the HW Tx Head and Tail descriptor pointers */
  1155. switch (adapter->num_tx_queues) {
  1156. case 1:
  1157. default:
  1158. tdba = adapter->tx_ring[0].dma;
  1159. tdlen = adapter->tx_ring[0].count *
  1160. sizeof(struct e1000_tx_desc);
  1161. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1162. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1163. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1164. E1000_WRITE_REG(hw, TDH, 0);
  1165. E1000_WRITE_REG(hw, TDT, 0);
  1166. adapter->tx_ring[0].tdh = E1000_TDH;
  1167. adapter->tx_ring[0].tdt = E1000_TDT;
  1168. break;
  1169. }
  1170. /* Set the default values for the Tx Inter Packet Gap timer */
  1171. if (hw->media_type == e1000_media_type_fiber ||
  1172. hw->media_type == e1000_media_type_internal_serdes)
  1173. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1174. else
  1175. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1176. switch (hw->mac_type) {
  1177. case e1000_82542_rev2_0:
  1178. case e1000_82542_rev2_1:
  1179. tipg = DEFAULT_82542_TIPG_IPGT;
  1180. ipgr1 = DEFAULT_82542_TIPG_IPGR1;
  1181. ipgr2 = DEFAULT_82542_TIPG_IPGR2;
  1182. break;
  1183. case e1000_80003es2lan:
  1184. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1185. ipgr2 = DEFAULT_80003ES2LAN_TIPG_IPGR2;
  1186. break;
  1187. default:
  1188. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1189. ipgr2 = DEFAULT_82543_TIPG_IPGR2;
  1190. break;
  1191. }
  1192. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  1193. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  1194. E1000_WRITE_REG(hw, TIPG, tipg);
  1195. /* Set the Tx Interrupt Delay register */
  1196. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1197. if (hw->mac_type >= e1000_82540)
  1198. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1199. /* Program the Transmit Control Register */
  1200. tctl = E1000_READ_REG(hw, TCTL);
  1201. tctl &= ~E1000_TCTL_CT;
  1202. tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1203. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1204. #ifdef DISABLE_MULR
  1205. /* disable Multiple Reads for debugging */
  1206. tctl &= ~E1000_TCTL_MULR;
  1207. #endif
  1208. if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
  1209. tarc = E1000_READ_REG(hw, TARC0);
  1210. tarc |= ((1 << 25) | (1 << 21));
  1211. E1000_WRITE_REG(hw, TARC0, tarc);
  1212. tarc = E1000_READ_REG(hw, TARC1);
  1213. tarc |= (1 << 25);
  1214. if (tctl & E1000_TCTL_MULR)
  1215. tarc &= ~(1 << 28);
  1216. else
  1217. tarc |= (1 << 28);
  1218. E1000_WRITE_REG(hw, TARC1, tarc);
  1219. } else if (hw->mac_type == e1000_80003es2lan) {
  1220. tarc = E1000_READ_REG(hw, TARC0);
  1221. tarc |= 1;
  1222. if (hw->media_type == e1000_media_type_internal_serdes)
  1223. tarc |= (1 << 20);
  1224. E1000_WRITE_REG(hw, TARC0, tarc);
  1225. tarc = E1000_READ_REG(hw, TARC1);
  1226. tarc |= 1;
  1227. E1000_WRITE_REG(hw, TARC1, tarc);
  1228. }
  1229. e1000_config_collision_dist(hw);
  1230. /* Setup Transmit Descriptor Settings for eop descriptor */
  1231. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  1232. E1000_TXD_CMD_IFCS;
  1233. if (hw->mac_type < e1000_82543)
  1234. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1235. else
  1236. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1237. /* Cache if we're 82544 running in PCI-X because we'll
  1238. * need this to apply a workaround later in the send path. */
  1239. if (hw->mac_type == e1000_82544 &&
  1240. hw->bus_type == e1000_bus_type_pcix)
  1241. adapter->pcix_82544 = 1;
  1242. E1000_WRITE_REG(hw, TCTL, tctl);
  1243. }
  1244. /**
  1245. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1246. * @adapter: board private structure
  1247. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1248. *
  1249. * Returns 0 on success, negative on failure
  1250. **/
  1251. static int
  1252. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1253. struct e1000_rx_ring *rxdr)
  1254. {
  1255. struct pci_dev *pdev = adapter->pdev;
  1256. int size, desc_len;
  1257. size = sizeof(struct e1000_buffer) * rxdr->count;
  1258. rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1259. if (!rxdr->buffer_info) {
  1260. DPRINTK(PROBE, ERR,
  1261. "Unable to allocate memory for the receive descriptor ring\n");
  1262. return -ENOMEM;
  1263. }
  1264. memset(rxdr->buffer_info, 0, size);
  1265. size = sizeof(struct e1000_ps_page) * rxdr->count;
  1266. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  1267. if (!rxdr->ps_page) {
  1268. vfree(rxdr->buffer_info);
  1269. DPRINTK(PROBE, ERR,
  1270. "Unable to allocate memory for the receive descriptor ring\n");
  1271. return -ENOMEM;
  1272. }
  1273. memset(rxdr->ps_page, 0, size);
  1274. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  1275. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  1276. if (!rxdr->ps_page_dma) {
  1277. vfree(rxdr->buffer_info);
  1278. kfree(rxdr->ps_page);
  1279. DPRINTK(PROBE, ERR,
  1280. "Unable to allocate memory for the receive descriptor ring\n");
  1281. return -ENOMEM;
  1282. }
  1283. memset(rxdr->ps_page_dma, 0, size);
  1284. if (adapter->hw.mac_type <= e1000_82547_rev_2)
  1285. desc_len = sizeof(struct e1000_rx_desc);
  1286. else
  1287. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1288. /* Round up to nearest 4K */
  1289. rxdr->size = rxdr->count * desc_len;
  1290. E1000_ROUNDUP(rxdr->size, 4096);
  1291. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1292. if (!rxdr->desc) {
  1293. DPRINTK(PROBE, ERR,
  1294. "Unable to allocate memory for the receive descriptor ring\n");
  1295. setup_rx_desc_die:
  1296. vfree(rxdr->buffer_info);
  1297. kfree(rxdr->ps_page);
  1298. kfree(rxdr->ps_page_dma);
  1299. return -ENOMEM;
  1300. }
  1301. /* Fix for errata 23, can't cross 64kB boundary */
  1302. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1303. void *olddesc = rxdr->desc;
  1304. dma_addr_t olddma = rxdr->dma;
  1305. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1306. "at %p\n", rxdr->size, rxdr->desc);
  1307. /* Try again, without freeing the previous */
  1308. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1309. /* Failed allocation, critical failure */
  1310. if (!rxdr->desc) {
  1311. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1312. DPRINTK(PROBE, ERR,
  1313. "Unable to allocate memory "
  1314. "for the receive descriptor ring\n");
  1315. goto setup_rx_desc_die;
  1316. }
  1317. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1318. /* give up */
  1319. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1320. rxdr->dma);
  1321. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1322. DPRINTK(PROBE, ERR,
  1323. "Unable to allocate aligned memory "
  1324. "for the receive descriptor ring\n");
  1325. goto setup_rx_desc_die;
  1326. } else {
  1327. /* Free old allocation, new allocation was successful */
  1328. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1329. }
  1330. }
  1331. memset(rxdr->desc, 0, rxdr->size);
  1332. rxdr->next_to_clean = 0;
  1333. rxdr->next_to_use = 0;
  1334. return 0;
  1335. }
  1336. /**
  1337. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1338. * (Descriptors) for all queues
  1339. * @adapter: board private structure
  1340. *
  1341. * If this function returns with an error, then it's possible one or
  1342. * more of the rings is populated (while the rest are not). It is the
  1343. * callers duty to clean those orphaned rings.
  1344. *
  1345. * Return 0 on success, negative on failure
  1346. **/
  1347. int
  1348. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1349. {
  1350. int i, err = 0;
  1351. for (i = 0; i < adapter->num_rx_queues; i++) {
  1352. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1353. if (err) {
  1354. DPRINTK(PROBE, ERR,
  1355. "Allocation for Rx Queue %u failed\n", i);
  1356. break;
  1357. }
  1358. }
  1359. return err;
  1360. }
  1361. /**
  1362. * e1000_setup_rctl - configure the receive control registers
  1363. * @adapter: Board private structure
  1364. **/
  1365. #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
  1366. (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
  1367. static void
  1368. e1000_setup_rctl(struct e1000_adapter *adapter)
  1369. {
  1370. uint32_t rctl, rfctl;
  1371. uint32_t psrctl = 0;
  1372. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1373. uint32_t pages = 0;
  1374. #endif
  1375. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1376. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1377. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1378. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1379. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1380. if (adapter->hw.mac_type > e1000_82543)
  1381. rctl |= E1000_RCTL_SECRC;
  1382. if (adapter->hw.tbi_compatibility_on == 1)
  1383. rctl |= E1000_RCTL_SBP;
  1384. else
  1385. rctl &= ~E1000_RCTL_SBP;
  1386. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1387. rctl &= ~E1000_RCTL_LPE;
  1388. else
  1389. rctl |= E1000_RCTL_LPE;
  1390. /* Setup buffer sizes */
  1391. rctl &= ~E1000_RCTL_SZ_4096;
  1392. rctl |= E1000_RCTL_BSEX;
  1393. switch (adapter->rx_buffer_len) {
  1394. case E1000_RXBUFFER_256:
  1395. rctl |= E1000_RCTL_SZ_256;
  1396. rctl &= ~E1000_RCTL_BSEX;
  1397. break;
  1398. case E1000_RXBUFFER_512:
  1399. rctl |= E1000_RCTL_SZ_512;
  1400. rctl &= ~E1000_RCTL_BSEX;
  1401. break;
  1402. case E1000_RXBUFFER_1024:
  1403. rctl |= E1000_RCTL_SZ_1024;
  1404. rctl &= ~E1000_RCTL_BSEX;
  1405. break;
  1406. case E1000_RXBUFFER_2048:
  1407. default:
  1408. rctl |= E1000_RCTL_SZ_2048;
  1409. rctl &= ~E1000_RCTL_BSEX;
  1410. break;
  1411. case E1000_RXBUFFER_4096:
  1412. rctl |= E1000_RCTL_SZ_4096;
  1413. break;
  1414. case E1000_RXBUFFER_8192:
  1415. rctl |= E1000_RCTL_SZ_8192;
  1416. break;
  1417. case E1000_RXBUFFER_16384:
  1418. rctl |= E1000_RCTL_SZ_16384;
  1419. break;
  1420. }
  1421. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1422. /* 82571 and greater support packet-split where the protocol
  1423. * header is placed in skb->data and the packet data is
  1424. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1425. * In the case of a non-split, skb->data is linearly filled,
  1426. * followed by the page buffers. Therefore, skb->data is
  1427. * sized to hold the largest protocol header.
  1428. */
  1429. pages = PAGE_USE_COUNT(adapter->netdev->mtu);
  1430. if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
  1431. PAGE_SIZE <= 16384)
  1432. adapter->rx_ps_pages = pages;
  1433. else
  1434. adapter->rx_ps_pages = 0;
  1435. #endif
  1436. if (adapter->rx_ps_pages) {
  1437. /* Configure extra packet-split registers */
  1438. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1439. rfctl |= E1000_RFCTL_EXTEN;
  1440. /* disable IPv6 packet split support */
  1441. rfctl |= E1000_RFCTL_IPV6_DIS;
  1442. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1443. rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
  1444. psrctl |= adapter->rx_ps_bsize0 >>
  1445. E1000_PSRCTL_BSIZE0_SHIFT;
  1446. switch (adapter->rx_ps_pages) {
  1447. case 3:
  1448. psrctl |= PAGE_SIZE <<
  1449. E1000_PSRCTL_BSIZE3_SHIFT;
  1450. case 2:
  1451. psrctl |= PAGE_SIZE <<
  1452. E1000_PSRCTL_BSIZE2_SHIFT;
  1453. case 1:
  1454. psrctl |= PAGE_SIZE >>
  1455. E1000_PSRCTL_BSIZE1_SHIFT;
  1456. break;
  1457. }
  1458. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1459. }
  1460. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1461. }
  1462. /**
  1463. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1464. * @adapter: board private structure
  1465. *
  1466. * Configure the Rx unit of the MAC after a reset.
  1467. **/
  1468. static void
  1469. e1000_configure_rx(struct e1000_adapter *adapter)
  1470. {
  1471. uint64_t rdba;
  1472. struct e1000_hw *hw = &adapter->hw;
  1473. uint32_t rdlen, rctl, rxcsum, ctrl_ext;
  1474. if (adapter->rx_ps_pages) {
  1475. /* this is a 32 byte descriptor */
  1476. rdlen = adapter->rx_ring[0].count *
  1477. sizeof(union e1000_rx_desc_packet_split);
  1478. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1479. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1480. } else {
  1481. rdlen = adapter->rx_ring[0].count *
  1482. sizeof(struct e1000_rx_desc);
  1483. adapter->clean_rx = e1000_clean_rx_irq;
  1484. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1485. }
  1486. /* disable receives while setting up the descriptors */
  1487. rctl = E1000_READ_REG(hw, RCTL);
  1488. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1489. /* set the Receive Delay Timer Register */
  1490. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1491. if (hw->mac_type >= e1000_82540) {
  1492. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1493. if (adapter->itr > 1)
  1494. E1000_WRITE_REG(hw, ITR,
  1495. 1000000000 / (adapter->itr * 256));
  1496. }
  1497. if (hw->mac_type >= e1000_82571) {
  1498. ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
  1499. /* Reset delay timers after every interrupt */
  1500. ctrl_ext |= E1000_CTRL_EXT_INT_TIMER_CLR;
  1501. #ifdef CONFIG_E1000_NAPI
  1502. /* Auto-Mask interrupts upon ICR read. */
  1503. ctrl_ext |= E1000_CTRL_EXT_IAME;
  1504. #endif
  1505. E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
  1506. E1000_WRITE_REG(hw, IAM, ~0);
  1507. E1000_WRITE_FLUSH(hw);
  1508. }
  1509. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1510. * the Base and Length of the Rx Descriptor Ring */
  1511. switch (adapter->num_rx_queues) {
  1512. case 1:
  1513. default:
  1514. rdba = adapter->rx_ring[0].dma;
  1515. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1516. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1517. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1518. E1000_WRITE_REG(hw, RDH, 0);
  1519. E1000_WRITE_REG(hw, RDT, 0);
  1520. adapter->rx_ring[0].rdh = E1000_RDH;
  1521. adapter->rx_ring[0].rdt = E1000_RDT;
  1522. break;
  1523. }
  1524. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1525. if (hw->mac_type >= e1000_82543) {
  1526. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1527. if (adapter->rx_csum == TRUE) {
  1528. rxcsum |= E1000_RXCSUM_TUOFL;
  1529. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1530. * Must be used in conjunction with packet-split. */
  1531. if ((hw->mac_type >= e1000_82571) &&
  1532. (adapter->rx_ps_pages)) {
  1533. rxcsum |= E1000_RXCSUM_IPPCSE;
  1534. }
  1535. } else {
  1536. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1537. /* don't need to clear IPPCSE as it defaults to 0 */
  1538. }
  1539. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1540. }
  1541. if (hw->mac_type == e1000_82573)
  1542. E1000_WRITE_REG(hw, ERT, 0x0100);
  1543. /* Enable Receives */
  1544. E1000_WRITE_REG(hw, RCTL, rctl);
  1545. }
  1546. /**
  1547. * e1000_free_tx_resources - Free Tx Resources per Queue
  1548. * @adapter: board private structure
  1549. * @tx_ring: Tx descriptor ring for a specific queue
  1550. *
  1551. * Free all transmit software resources
  1552. **/
  1553. static void
  1554. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1555. struct e1000_tx_ring *tx_ring)
  1556. {
  1557. struct pci_dev *pdev = adapter->pdev;
  1558. e1000_clean_tx_ring(adapter, tx_ring);
  1559. vfree(tx_ring->buffer_info);
  1560. tx_ring->buffer_info = NULL;
  1561. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1562. tx_ring->desc = NULL;
  1563. }
  1564. /**
  1565. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1566. * @adapter: board private structure
  1567. *
  1568. * Free all transmit software resources
  1569. **/
  1570. void
  1571. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1572. {
  1573. int i;
  1574. for (i = 0; i < adapter->num_tx_queues; i++)
  1575. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1576. }
  1577. static void
  1578. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1579. struct e1000_buffer *buffer_info)
  1580. {
  1581. if (buffer_info->dma) {
  1582. pci_unmap_page(adapter->pdev,
  1583. buffer_info->dma,
  1584. buffer_info->length,
  1585. PCI_DMA_TODEVICE);
  1586. }
  1587. if (buffer_info->skb)
  1588. dev_kfree_skb_any(buffer_info->skb);
  1589. memset(buffer_info, 0, sizeof(struct e1000_buffer));
  1590. }
  1591. /**
  1592. * e1000_clean_tx_ring - Free Tx Buffers
  1593. * @adapter: board private structure
  1594. * @tx_ring: ring to be cleaned
  1595. **/
  1596. static void
  1597. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1598. struct e1000_tx_ring *tx_ring)
  1599. {
  1600. struct e1000_buffer *buffer_info;
  1601. unsigned long size;
  1602. unsigned int i;
  1603. /* Free all the Tx ring sk_buffs */
  1604. for (i = 0; i < tx_ring->count; i++) {
  1605. buffer_info = &tx_ring->buffer_info[i];
  1606. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1607. }
  1608. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1609. memset(tx_ring->buffer_info, 0, size);
  1610. /* Zero out the descriptor ring */
  1611. memset(tx_ring->desc, 0, tx_ring->size);
  1612. tx_ring->next_to_use = 0;
  1613. tx_ring->next_to_clean = 0;
  1614. tx_ring->last_tx_tso = 0;
  1615. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1616. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1617. }
  1618. /**
  1619. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1620. * @adapter: board private structure
  1621. **/
  1622. static void
  1623. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1624. {
  1625. int i;
  1626. for (i = 0; i < adapter->num_tx_queues; i++)
  1627. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1628. }
  1629. /**
  1630. * e1000_free_rx_resources - Free Rx Resources
  1631. * @adapter: board private structure
  1632. * @rx_ring: ring to clean the resources from
  1633. *
  1634. * Free all receive software resources
  1635. **/
  1636. static void
  1637. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1638. struct e1000_rx_ring *rx_ring)
  1639. {
  1640. struct pci_dev *pdev = adapter->pdev;
  1641. e1000_clean_rx_ring(adapter, rx_ring);
  1642. vfree(rx_ring->buffer_info);
  1643. rx_ring->buffer_info = NULL;
  1644. kfree(rx_ring->ps_page);
  1645. rx_ring->ps_page = NULL;
  1646. kfree(rx_ring->ps_page_dma);
  1647. rx_ring->ps_page_dma = NULL;
  1648. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1649. rx_ring->desc = NULL;
  1650. }
  1651. /**
  1652. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1653. * @adapter: board private structure
  1654. *
  1655. * Free all receive software resources
  1656. **/
  1657. void
  1658. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1659. {
  1660. int i;
  1661. for (i = 0; i < adapter->num_rx_queues; i++)
  1662. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1663. }
  1664. /**
  1665. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1666. * @adapter: board private structure
  1667. * @rx_ring: ring to free buffers from
  1668. **/
  1669. static void
  1670. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1671. struct e1000_rx_ring *rx_ring)
  1672. {
  1673. struct e1000_buffer *buffer_info;
  1674. struct e1000_ps_page *ps_page;
  1675. struct e1000_ps_page_dma *ps_page_dma;
  1676. struct pci_dev *pdev = adapter->pdev;
  1677. unsigned long size;
  1678. unsigned int i, j;
  1679. /* Free all the Rx ring sk_buffs */
  1680. for (i = 0; i < rx_ring->count; i++) {
  1681. buffer_info = &rx_ring->buffer_info[i];
  1682. if (buffer_info->skb) {
  1683. pci_unmap_single(pdev,
  1684. buffer_info->dma,
  1685. buffer_info->length,
  1686. PCI_DMA_FROMDEVICE);
  1687. dev_kfree_skb(buffer_info->skb);
  1688. buffer_info->skb = NULL;
  1689. }
  1690. ps_page = &rx_ring->ps_page[i];
  1691. ps_page_dma = &rx_ring->ps_page_dma[i];
  1692. for (j = 0; j < adapter->rx_ps_pages; j++) {
  1693. if (!ps_page->ps_page[j]) break;
  1694. pci_unmap_page(pdev,
  1695. ps_page_dma->ps_page_dma[j],
  1696. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1697. ps_page_dma->ps_page_dma[j] = 0;
  1698. put_page(ps_page->ps_page[j]);
  1699. ps_page->ps_page[j] = NULL;
  1700. }
  1701. }
  1702. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1703. memset(rx_ring->buffer_info, 0, size);
  1704. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1705. memset(rx_ring->ps_page, 0, size);
  1706. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1707. memset(rx_ring->ps_page_dma, 0, size);
  1708. /* Zero out the descriptor ring */
  1709. memset(rx_ring->desc, 0, rx_ring->size);
  1710. rx_ring->next_to_clean = 0;
  1711. rx_ring->next_to_use = 0;
  1712. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  1713. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  1714. }
  1715. /**
  1716. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1717. * @adapter: board private structure
  1718. **/
  1719. static void
  1720. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1721. {
  1722. int i;
  1723. for (i = 0; i < adapter->num_rx_queues; i++)
  1724. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1725. }
  1726. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1727. * and memory write and invalidate disabled for certain operations
  1728. */
  1729. static void
  1730. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1731. {
  1732. struct net_device *netdev = adapter->netdev;
  1733. uint32_t rctl;
  1734. e1000_pci_clear_mwi(&adapter->hw);
  1735. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1736. rctl |= E1000_RCTL_RST;
  1737. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1738. E1000_WRITE_FLUSH(&adapter->hw);
  1739. mdelay(5);
  1740. if (netif_running(netdev))
  1741. e1000_clean_all_rx_rings(adapter);
  1742. }
  1743. static void
  1744. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1745. {
  1746. struct net_device *netdev = adapter->netdev;
  1747. uint32_t rctl;
  1748. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1749. rctl &= ~E1000_RCTL_RST;
  1750. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1751. E1000_WRITE_FLUSH(&adapter->hw);
  1752. mdelay(5);
  1753. if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1754. e1000_pci_set_mwi(&adapter->hw);
  1755. if (netif_running(netdev)) {
  1756. /* No need to loop, because 82542 supports only 1 queue */
  1757. struct e1000_rx_ring *ring = &adapter->rx_ring[0];
  1758. e1000_configure_rx(adapter);
  1759. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  1760. }
  1761. }
  1762. /**
  1763. * e1000_set_mac - Change the Ethernet Address of the NIC
  1764. * @netdev: network interface device structure
  1765. * @p: pointer to an address structure
  1766. *
  1767. * Returns 0 on success, negative on failure
  1768. **/
  1769. static int
  1770. e1000_set_mac(struct net_device *netdev, void *p)
  1771. {
  1772. struct e1000_adapter *adapter = netdev_priv(netdev);
  1773. struct sockaddr *addr = p;
  1774. if (!is_valid_ether_addr(addr->sa_data))
  1775. return -EADDRNOTAVAIL;
  1776. /* 82542 2.0 needs to be in reset to write receive address registers */
  1777. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1778. e1000_enter_82542_rst(adapter);
  1779. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1780. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1781. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1782. /* With 82571 controllers, LAA may be overwritten (with the default)
  1783. * due to controller reset from the other port. */
  1784. if (adapter->hw.mac_type == e1000_82571) {
  1785. /* activate the work around */
  1786. adapter->hw.laa_is_present = 1;
  1787. /* Hold a copy of the LAA in RAR[14] This is done so that
  1788. * between the time RAR[0] gets clobbered and the time it
  1789. * gets fixed (in e1000_watchdog), the actual LAA is in one
  1790. * of the RARs and no incoming packets directed to this port
  1791. * are dropped. Eventaully the LAA will be in RAR[0] and
  1792. * RAR[14] */
  1793. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  1794. E1000_RAR_ENTRIES - 1);
  1795. }
  1796. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1797. e1000_leave_82542_rst(adapter);
  1798. return 0;
  1799. }
  1800. /**
  1801. * e1000_set_multi - Multicast and Promiscuous mode set
  1802. * @netdev: network interface device structure
  1803. *
  1804. * The set_multi entry point is called whenever the multicast address
  1805. * list or the network interface flags are updated. This routine is
  1806. * responsible for configuring the hardware for proper multicast,
  1807. * promiscuous mode, and all-multi behavior.
  1808. **/
  1809. static void
  1810. e1000_set_multi(struct net_device *netdev)
  1811. {
  1812. struct e1000_adapter *adapter = netdev_priv(netdev);
  1813. struct e1000_hw *hw = &adapter->hw;
  1814. struct dev_mc_list *mc_ptr;
  1815. uint32_t rctl;
  1816. uint32_t hash_value;
  1817. int i, rar_entries = E1000_RAR_ENTRIES;
  1818. /* reserve RAR[14] for LAA over-write work-around */
  1819. if (adapter->hw.mac_type == e1000_82571)
  1820. rar_entries--;
  1821. /* Check for Promiscuous and All Multicast modes */
  1822. rctl = E1000_READ_REG(hw, RCTL);
  1823. if (netdev->flags & IFF_PROMISC) {
  1824. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1825. } else if (netdev->flags & IFF_ALLMULTI) {
  1826. rctl |= E1000_RCTL_MPE;
  1827. rctl &= ~E1000_RCTL_UPE;
  1828. } else {
  1829. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1830. }
  1831. E1000_WRITE_REG(hw, RCTL, rctl);
  1832. /* 82542 2.0 needs to be in reset to write receive address registers */
  1833. if (hw->mac_type == e1000_82542_rev2_0)
  1834. e1000_enter_82542_rst(adapter);
  1835. /* load the first 14 multicast address into the exact filters 1-14
  1836. * RAR 0 is used for the station MAC adddress
  1837. * if there are not 14 addresses, go ahead and clear the filters
  1838. * -- with 82571 controllers only 0-13 entries are filled here
  1839. */
  1840. mc_ptr = netdev->mc_list;
  1841. for (i = 1; i < rar_entries; i++) {
  1842. if (mc_ptr) {
  1843. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1844. mc_ptr = mc_ptr->next;
  1845. } else {
  1846. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1847. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1848. }
  1849. }
  1850. /* clear the old settings from the multicast hash table */
  1851. for (i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
  1852. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1853. /* load any remaining addresses into the hash table */
  1854. for (; mc_ptr; mc_ptr = mc_ptr->next) {
  1855. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1856. e1000_mta_set(hw, hash_value);
  1857. }
  1858. if (hw->mac_type == e1000_82542_rev2_0)
  1859. e1000_leave_82542_rst(adapter);
  1860. }
  1861. /* Need to wait a few seconds after link up to get diagnostic information from
  1862. * the phy */
  1863. static void
  1864. e1000_update_phy_info(unsigned long data)
  1865. {
  1866. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1867. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1868. }
  1869. /**
  1870. * e1000_82547_tx_fifo_stall - Timer Call-back
  1871. * @data: pointer to adapter cast into an unsigned long
  1872. **/
  1873. static void
  1874. e1000_82547_tx_fifo_stall(unsigned long data)
  1875. {
  1876. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1877. struct net_device *netdev = adapter->netdev;
  1878. uint32_t tctl;
  1879. if (atomic_read(&adapter->tx_fifo_stall)) {
  1880. if ((E1000_READ_REG(&adapter->hw, TDT) ==
  1881. E1000_READ_REG(&adapter->hw, TDH)) &&
  1882. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1883. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1884. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1885. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1886. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1887. E1000_WRITE_REG(&adapter->hw, TCTL,
  1888. tctl & ~E1000_TCTL_EN);
  1889. E1000_WRITE_REG(&adapter->hw, TDFT,
  1890. adapter->tx_head_addr);
  1891. E1000_WRITE_REG(&adapter->hw, TDFH,
  1892. adapter->tx_head_addr);
  1893. E1000_WRITE_REG(&adapter->hw, TDFTS,
  1894. adapter->tx_head_addr);
  1895. E1000_WRITE_REG(&adapter->hw, TDFHS,
  1896. adapter->tx_head_addr);
  1897. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1898. E1000_WRITE_FLUSH(&adapter->hw);
  1899. adapter->tx_fifo_head = 0;
  1900. atomic_set(&adapter->tx_fifo_stall, 0);
  1901. netif_wake_queue(netdev);
  1902. } else {
  1903. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  1904. }
  1905. }
  1906. }
  1907. /**
  1908. * e1000_watchdog - Timer Call-back
  1909. * @data: pointer to adapter cast into an unsigned long
  1910. **/
  1911. static void
  1912. e1000_watchdog(unsigned long data)
  1913. {
  1914. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1915. struct net_device *netdev = adapter->netdev;
  1916. struct e1000_tx_ring *txdr = adapter->tx_ring;
  1917. uint32_t link, tctl;
  1918. e1000_check_for_link(&adapter->hw);
  1919. if (adapter->hw.mac_type == e1000_82573) {
  1920. e1000_enable_tx_pkt_filtering(&adapter->hw);
  1921. if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  1922. e1000_update_mng_vlan(adapter);
  1923. }
  1924. if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  1925. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  1926. link = !adapter->hw.serdes_link_down;
  1927. else
  1928. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  1929. if (link) {
  1930. if (!netif_carrier_ok(netdev)) {
  1931. boolean_t txb2b = 1;
  1932. e1000_get_speed_and_duplex(&adapter->hw,
  1933. &adapter->link_speed,
  1934. &adapter->link_duplex);
  1935. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  1936. adapter->link_speed,
  1937. adapter->link_duplex == FULL_DUPLEX ?
  1938. "Full Duplex" : "Half Duplex");
  1939. /* tweak tx_queue_len according to speed/duplex
  1940. * and adjust the timeout factor */
  1941. netdev->tx_queue_len = adapter->tx_queue_len;
  1942. adapter->tx_timeout_factor = 1;
  1943. switch (adapter->link_speed) {
  1944. case SPEED_10:
  1945. txb2b = 0;
  1946. netdev->tx_queue_len = 10;
  1947. adapter->tx_timeout_factor = 8;
  1948. break;
  1949. case SPEED_100:
  1950. txb2b = 0;
  1951. netdev->tx_queue_len = 100;
  1952. /* maybe add some timeout factor ? */
  1953. break;
  1954. }
  1955. if ((adapter->hw.mac_type == e1000_82571 ||
  1956. adapter->hw.mac_type == e1000_82572) &&
  1957. txb2b == 0) {
  1958. #define SPEED_MODE_BIT (1 << 21)
  1959. uint32_t tarc0;
  1960. tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
  1961. tarc0 &= ~SPEED_MODE_BIT;
  1962. E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
  1963. }
  1964. #ifdef NETIF_F_TSO
  1965. /* disable TSO for pcie and 10/100 speeds, to avoid
  1966. * some hardware issues */
  1967. if (!adapter->tso_force &&
  1968. adapter->hw.bus_type == e1000_bus_type_pci_express){
  1969. switch (adapter->link_speed) {
  1970. case SPEED_10:
  1971. case SPEED_100:
  1972. DPRINTK(PROBE,INFO,
  1973. "10/100 speed: disabling TSO\n");
  1974. netdev->features &= ~NETIF_F_TSO;
  1975. break;
  1976. case SPEED_1000:
  1977. netdev->features |= NETIF_F_TSO;
  1978. break;
  1979. default:
  1980. /* oops */
  1981. break;
  1982. }
  1983. }
  1984. #endif
  1985. /* enable transmits in the hardware, need to do this
  1986. * after setting TARC0 */
  1987. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1988. tctl |= E1000_TCTL_EN;
  1989. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1990. netif_carrier_on(netdev);
  1991. netif_wake_queue(netdev);
  1992. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1993. adapter->smartspeed = 0;
  1994. }
  1995. } else {
  1996. if (netif_carrier_ok(netdev)) {
  1997. adapter->link_speed = 0;
  1998. adapter->link_duplex = 0;
  1999. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  2000. netif_carrier_off(netdev);
  2001. netif_stop_queue(netdev);
  2002. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  2003. /* 80003ES2LAN workaround--
  2004. * For packet buffer work-around on link down event;
  2005. * disable receives in the ISR and
  2006. * reset device here in the watchdog
  2007. */
  2008. if (adapter->hw.mac_type == e1000_80003es2lan) {
  2009. /* reset device */
  2010. schedule_work(&adapter->reset_task);
  2011. }
  2012. }
  2013. e1000_smartspeed(adapter);
  2014. }
  2015. e1000_update_stats(adapter);
  2016. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  2017. adapter->tpt_old = adapter->stats.tpt;
  2018. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  2019. adapter->colc_old = adapter->stats.colc;
  2020. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  2021. adapter->gorcl_old = adapter->stats.gorcl;
  2022. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  2023. adapter->gotcl_old = adapter->stats.gotcl;
  2024. e1000_update_adaptive(&adapter->hw);
  2025. if (!netif_carrier_ok(netdev)) {
  2026. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  2027. /* We've lost link, so the controller stops DMA,
  2028. * but we've got queued Tx work that's never going
  2029. * to get done, so reset controller to flush Tx.
  2030. * (Do the reset outside of interrupt context). */
  2031. adapter->tx_timeout_count++;
  2032. schedule_work(&adapter->reset_task);
  2033. }
  2034. }
  2035. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  2036. if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  2037. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  2038. * asymmetrical Tx or Rx gets ITR=8000; everyone
  2039. * else is between 2000-8000. */
  2040. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  2041. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  2042. adapter->gotcl - adapter->gorcl :
  2043. adapter->gorcl - adapter->gotcl) / 10000;
  2044. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  2045. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  2046. }
  2047. /* Cause software interrupt to ensure rx ring is cleaned */
  2048. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  2049. /* Force detection of hung controller every watchdog period */
  2050. adapter->detect_tx_hung = TRUE;
  2051. /* With 82571 controllers, LAA may be overwritten due to controller
  2052. * reset from the other port. Set the appropriate LAA in RAR[0] */
  2053. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  2054. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  2055. /* Reset the timer */
  2056. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  2057. }
  2058. #define E1000_TX_FLAGS_CSUM 0x00000001
  2059. #define E1000_TX_FLAGS_VLAN 0x00000002
  2060. #define E1000_TX_FLAGS_TSO 0x00000004
  2061. #define E1000_TX_FLAGS_IPV4 0x00000008
  2062. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  2063. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  2064. static int
  2065. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2066. struct sk_buff *skb)
  2067. {
  2068. #ifdef NETIF_F_TSO
  2069. struct e1000_context_desc *context_desc;
  2070. struct e1000_buffer *buffer_info;
  2071. unsigned int i;
  2072. uint32_t cmd_length = 0;
  2073. uint16_t ipcse = 0, tucse, mss;
  2074. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  2075. int err;
  2076. if (skb_shinfo(skb)->tso_size) {
  2077. if (skb_header_cloned(skb)) {
  2078. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2079. if (err)
  2080. return err;
  2081. }
  2082. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2083. mss = skb_shinfo(skb)->tso_size;
  2084. if (skb->protocol == htons(ETH_P_IP)) {
  2085. skb->nh.iph->tot_len = 0;
  2086. skb->nh.iph->check = 0;
  2087. skb->h.th->check =
  2088. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  2089. skb->nh.iph->daddr,
  2090. 0,
  2091. IPPROTO_TCP,
  2092. 0);
  2093. cmd_length = E1000_TXD_CMD_IP;
  2094. ipcse = skb->h.raw - skb->data - 1;
  2095. #ifdef NETIF_F_TSO_IPV6
  2096. } else if (skb->protocol == ntohs(ETH_P_IPV6)) {
  2097. skb->nh.ipv6h->payload_len = 0;
  2098. skb->h.th->check =
  2099. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  2100. &skb->nh.ipv6h->daddr,
  2101. 0,
  2102. IPPROTO_TCP,
  2103. 0);
  2104. ipcse = 0;
  2105. #endif
  2106. }
  2107. ipcss = skb->nh.raw - skb->data;
  2108. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  2109. tucss = skb->h.raw - skb->data;
  2110. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  2111. tucse = 0;
  2112. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2113. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2114. i = tx_ring->next_to_use;
  2115. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2116. buffer_info = &tx_ring->buffer_info[i];
  2117. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2118. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2119. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2120. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2121. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2122. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2123. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2124. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2125. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2126. buffer_info->time_stamp = jiffies;
  2127. if (++i == tx_ring->count) i = 0;
  2128. tx_ring->next_to_use = i;
  2129. return TRUE;
  2130. }
  2131. #endif
  2132. return FALSE;
  2133. }
  2134. static boolean_t
  2135. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2136. struct sk_buff *skb)
  2137. {
  2138. struct e1000_context_desc *context_desc;
  2139. struct e1000_buffer *buffer_info;
  2140. unsigned int i;
  2141. uint8_t css;
  2142. if (likely(skb->ip_summed == CHECKSUM_HW)) {
  2143. css = skb->h.raw - skb->data;
  2144. i = tx_ring->next_to_use;
  2145. buffer_info = &tx_ring->buffer_info[i];
  2146. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2147. context_desc->upper_setup.tcp_fields.tucss = css;
  2148. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  2149. context_desc->upper_setup.tcp_fields.tucse = 0;
  2150. context_desc->tcp_seg_setup.data = 0;
  2151. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  2152. buffer_info->time_stamp = jiffies;
  2153. if (unlikely(++i == tx_ring->count)) i = 0;
  2154. tx_ring->next_to_use = i;
  2155. return TRUE;
  2156. }
  2157. return FALSE;
  2158. }
  2159. #define E1000_MAX_TXD_PWR 12
  2160. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2161. static int
  2162. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2163. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2164. unsigned int nr_frags, unsigned int mss)
  2165. {
  2166. struct e1000_buffer *buffer_info;
  2167. unsigned int len = skb->len;
  2168. unsigned int offset = 0, size, count = 0, i;
  2169. unsigned int f;
  2170. len -= skb->data_len;
  2171. i = tx_ring->next_to_use;
  2172. while (len) {
  2173. buffer_info = &tx_ring->buffer_info[i];
  2174. size = min(len, max_per_txd);
  2175. #ifdef NETIF_F_TSO
  2176. /* Workaround for Controller erratum --
  2177. * descriptor for non-tso packet in a linear SKB that follows a
  2178. * tso gets written back prematurely before the data is fully
  2179. * DMA'd to the controller */
  2180. if (!skb->data_len && tx_ring->last_tx_tso &&
  2181. !skb_shinfo(skb)->tso_size) {
  2182. tx_ring->last_tx_tso = 0;
  2183. size -= 4;
  2184. }
  2185. /* Workaround for premature desc write-backs
  2186. * in TSO mode. Append 4-byte sentinel desc */
  2187. if (unlikely(mss && !nr_frags && size == len && size > 8))
  2188. size -= 4;
  2189. #endif
  2190. /* work-around for errata 10 and it applies
  2191. * to all controllers in PCI-X mode
  2192. * The fix is to make sure that the first descriptor of a
  2193. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2194. */
  2195. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2196. (size > 2015) && count == 0))
  2197. size = 2015;
  2198. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2199. * terminating buffers within evenly-aligned dwords. */
  2200. if (unlikely(adapter->pcix_82544 &&
  2201. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2202. size > 4))
  2203. size -= 4;
  2204. buffer_info->length = size;
  2205. buffer_info->dma =
  2206. pci_map_single(adapter->pdev,
  2207. skb->data + offset,
  2208. size,
  2209. PCI_DMA_TODEVICE);
  2210. buffer_info->time_stamp = jiffies;
  2211. len -= size;
  2212. offset += size;
  2213. count++;
  2214. if (unlikely(++i == tx_ring->count)) i = 0;
  2215. }
  2216. for (f = 0; f < nr_frags; f++) {
  2217. struct skb_frag_struct *frag;
  2218. frag = &skb_shinfo(skb)->frags[f];
  2219. len = frag->size;
  2220. offset = frag->page_offset;
  2221. while (len) {
  2222. buffer_info = &tx_ring->buffer_info[i];
  2223. size = min(len, max_per_txd);
  2224. #ifdef NETIF_F_TSO
  2225. /* Workaround for premature desc write-backs
  2226. * in TSO mode. Append 4-byte sentinel desc */
  2227. if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2228. size -= 4;
  2229. #endif
  2230. /* Workaround for potential 82544 hang in PCI-X.
  2231. * Avoid terminating buffers within evenly-aligned
  2232. * dwords. */
  2233. if (unlikely(adapter->pcix_82544 &&
  2234. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2235. size > 4))
  2236. size -= 4;
  2237. buffer_info->length = size;
  2238. buffer_info->dma =
  2239. pci_map_page(adapter->pdev,
  2240. frag->page,
  2241. offset,
  2242. size,
  2243. PCI_DMA_TODEVICE);
  2244. buffer_info->time_stamp = jiffies;
  2245. len -= size;
  2246. offset += size;
  2247. count++;
  2248. if (unlikely(++i == tx_ring->count)) i = 0;
  2249. }
  2250. }
  2251. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2252. tx_ring->buffer_info[i].skb = skb;
  2253. tx_ring->buffer_info[first].next_to_watch = i;
  2254. return count;
  2255. }
  2256. static void
  2257. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2258. int tx_flags, int count)
  2259. {
  2260. struct e1000_tx_desc *tx_desc = NULL;
  2261. struct e1000_buffer *buffer_info;
  2262. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2263. unsigned int i;
  2264. if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2265. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2266. E1000_TXD_CMD_TSE;
  2267. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2268. if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2269. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2270. }
  2271. if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2272. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2273. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2274. }
  2275. if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2276. txd_lower |= E1000_TXD_CMD_VLE;
  2277. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2278. }
  2279. i = tx_ring->next_to_use;
  2280. while (count--) {
  2281. buffer_info = &tx_ring->buffer_info[i];
  2282. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2283. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2284. tx_desc->lower.data =
  2285. cpu_to_le32(txd_lower | buffer_info->length);
  2286. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2287. if (unlikely(++i == tx_ring->count)) i = 0;
  2288. }
  2289. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2290. /* Force memory writes to complete before letting h/w
  2291. * know there are new descriptors to fetch. (Only
  2292. * applicable for weak-ordered memory model archs,
  2293. * such as IA-64). */
  2294. wmb();
  2295. tx_ring->next_to_use = i;
  2296. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2297. }
  2298. /**
  2299. * 82547 workaround to avoid controller hang in half-duplex environment.
  2300. * The workaround is to avoid queuing a large packet that would span
  2301. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2302. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2303. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2304. * to the beginning of the Tx FIFO.
  2305. **/
  2306. #define E1000_FIFO_HDR 0x10
  2307. #define E1000_82547_PAD_LEN 0x3E0
  2308. static int
  2309. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2310. {
  2311. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2312. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2313. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  2314. if (adapter->link_duplex != HALF_DUPLEX)
  2315. goto no_fifo_stall_required;
  2316. if (atomic_read(&adapter->tx_fifo_stall))
  2317. return 1;
  2318. if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2319. atomic_set(&adapter->tx_fifo_stall, 1);
  2320. return 1;
  2321. }
  2322. no_fifo_stall_required:
  2323. adapter->tx_fifo_head += skb_fifo_len;
  2324. if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2325. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2326. return 0;
  2327. }
  2328. #define MINIMUM_DHCP_PACKET_SIZE 282
  2329. static int
  2330. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2331. {
  2332. struct e1000_hw *hw = &adapter->hw;
  2333. uint16_t length, offset;
  2334. if (vlan_tx_tag_present(skb)) {
  2335. if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2336. ( adapter->hw.mng_cookie.status &
  2337. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2338. return 0;
  2339. }
  2340. if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
  2341. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2342. if ((htons(ETH_P_IP) == eth->h_proto)) {
  2343. const struct iphdr *ip =
  2344. (struct iphdr *)((uint8_t *)skb->data+14);
  2345. if (IPPROTO_UDP == ip->protocol) {
  2346. struct udphdr *udp =
  2347. (struct udphdr *)((uint8_t *)ip +
  2348. (ip->ihl << 2));
  2349. if (ntohs(udp->dest) == 67) {
  2350. offset = (uint8_t *)udp + 8 - skb->data;
  2351. length = skb->len - offset;
  2352. return e1000_mng_write_dhcp_info(hw,
  2353. (uint8_t *)udp + 8,
  2354. length);
  2355. }
  2356. }
  2357. }
  2358. }
  2359. return 0;
  2360. }
  2361. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2362. static int
  2363. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2364. {
  2365. struct e1000_adapter *adapter = netdev_priv(netdev);
  2366. struct e1000_tx_ring *tx_ring;
  2367. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2368. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2369. unsigned int tx_flags = 0;
  2370. unsigned int len = skb->len;
  2371. unsigned long flags;
  2372. unsigned int nr_frags = 0;
  2373. unsigned int mss = 0;
  2374. int count = 0;
  2375. int tso;
  2376. unsigned int f;
  2377. len -= skb->data_len;
  2378. tx_ring = adapter->tx_ring;
  2379. if (unlikely(skb->len <= 0)) {
  2380. dev_kfree_skb_any(skb);
  2381. return NETDEV_TX_OK;
  2382. }
  2383. #ifdef NETIF_F_TSO
  2384. mss = skb_shinfo(skb)->tso_size;
  2385. /* The controller does a simple calculation to
  2386. * make sure there is enough room in the FIFO before
  2387. * initiating the DMA for each buffer. The calc is:
  2388. * 4 = ceil(buffer len/mss). To make sure we don't
  2389. * overrun the FIFO, adjust the max buffer len if mss
  2390. * drops. */
  2391. if (mss) {
  2392. uint8_t hdr_len;
  2393. max_per_txd = min(mss << 2, max_per_txd);
  2394. max_txd_pwr = fls(max_per_txd) - 1;
  2395. /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
  2396. * points to just header, pull a few bytes of payload from
  2397. * frags into skb->data */
  2398. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2399. if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
  2400. switch (adapter->hw.mac_type) {
  2401. unsigned int pull_size;
  2402. case e1000_82571:
  2403. case e1000_82572:
  2404. case e1000_82573:
  2405. pull_size = min((unsigned int)4, skb->data_len);
  2406. if (!__pskb_pull_tail(skb, pull_size)) {
  2407. DPRINTK(DRV, ERR,
  2408. "__pskb_pull_tail failed.\n");
  2409. dev_kfree_skb_any(skb);
  2410. return NETDEV_TX_OK;
  2411. }
  2412. len = skb->len - skb->data_len;
  2413. break;
  2414. default:
  2415. /* do nothing */
  2416. break;
  2417. }
  2418. }
  2419. }
  2420. /* reserve a descriptor for the offload context */
  2421. if ((mss) || (skb->ip_summed == CHECKSUM_HW))
  2422. count++;
  2423. count++;
  2424. #else
  2425. if (skb->ip_summed == CHECKSUM_HW)
  2426. count++;
  2427. #endif
  2428. #ifdef NETIF_F_TSO
  2429. /* Controller Erratum workaround */
  2430. if (!skb->data_len && tx_ring->last_tx_tso &&
  2431. !skb_shinfo(skb)->tso_size)
  2432. count++;
  2433. #endif
  2434. count += TXD_USE_COUNT(len, max_txd_pwr);
  2435. if (adapter->pcix_82544)
  2436. count++;
  2437. /* work-around for errata 10 and it applies to all controllers
  2438. * in PCI-X mode, so add one more descriptor to the count
  2439. */
  2440. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2441. (len > 2015)))
  2442. count++;
  2443. nr_frags = skb_shinfo(skb)->nr_frags;
  2444. for (f = 0; f < nr_frags; f++)
  2445. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2446. max_txd_pwr);
  2447. if (adapter->pcix_82544)
  2448. count += nr_frags;
  2449. if (adapter->hw.tx_pkt_filtering &&
  2450. (adapter->hw.mac_type == e1000_82573))
  2451. e1000_transfer_dhcp_info(adapter, skb);
  2452. local_irq_save(flags);
  2453. if (!spin_trylock(&tx_ring->tx_lock)) {
  2454. /* Collision - tell upper layer to requeue */
  2455. local_irq_restore(flags);
  2456. return NETDEV_TX_LOCKED;
  2457. }
  2458. /* need: count + 2 desc gap to keep tail from touching
  2459. * head, otherwise try next time */
  2460. if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
  2461. netif_stop_queue(netdev);
  2462. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2463. return NETDEV_TX_BUSY;
  2464. }
  2465. if (unlikely(adapter->hw.mac_type == e1000_82547)) {
  2466. if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2467. netif_stop_queue(netdev);
  2468. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  2469. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2470. return NETDEV_TX_BUSY;
  2471. }
  2472. }
  2473. if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2474. tx_flags |= E1000_TX_FLAGS_VLAN;
  2475. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2476. }
  2477. first = tx_ring->next_to_use;
  2478. tso = e1000_tso(adapter, tx_ring, skb);
  2479. if (tso < 0) {
  2480. dev_kfree_skb_any(skb);
  2481. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2482. return NETDEV_TX_OK;
  2483. }
  2484. if (likely(tso)) {
  2485. tx_ring->last_tx_tso = 1;
  2486. tx_flags |= E1000_TX_FLAGS_TSO;
  2487. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2488. tx_flags |= E1000_TX_FLAGS_CSUM;
  2489. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2490. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2491. * no longer assume, we must. */
  2492. if (likely(skb->protocol == htons(ETH_P_IP)))
  2493. tx_flags |= E1000_TX_FLAGS_IPV4;
  2494. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2495. e1000_tx_map(adapter, tx_ring, skb, first,
  2496. max_per_txd, nr_frags, mss));
  2497. netdev->trans_start = jiffies;
  2498. /* Make sure there is space in the ring for the next send. */
  2499. if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
  2500. netif_stop_queue(netdev);
  2501. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2502. return NETDEV_TX_OK;
  2503. }
  2504. /**
  2505. * e1000_tx_timeout - Respond to a Tx Hang
  2506. * @netdev: network interface device structure
  2507. **/
  2508. static void
  2509. e1000_tx_timeout(struct net_device *netdev)
  2510. {
  2511. struct e1000_adapter *adapter = netdev_priv(netdev);
  2512. /* Do the reset outside of interrupt context */
  2513. adapter->tx_timeout_count++;
  2514. schedule_work(&adapter->reset_task);
  2515. }
  2516. static void
  2517. e1000_reset_task(struct net_device *netdev)
  2518. {
  2519. struct e1000_adapter *adapter = netdev_priv(netdev);
  2520. e1000_reinit_locked(adapter);
  2521. }
  2522. /**
  2523. * e1000_get_stats - Get System Network Statistics
  2524. * @netdev: network interface device structure
  2525. *
  2526. * Returns the address of the device statistics structure.
  2527. * The statistics are actually updated from the timer callback.
  2528. **/
  2529. static struct net_device_stats *
  2530. e1000_get_stats(struct net_device *netdev)
  2531. {
  2532. struct e1000_adapter *adapter = netdev_priv(netdev);
  2533. /* only return the current stats */
  2534. return &adapter->net_stats;
  2535. }
  2536. /**
  2537. * e1000_change_mtu - Change the Maximum Transfer Unit
  2538. * @netdev: network interface device structure
  2539. * @new_mtu: new value for maximum frame size
  2540. *
  2541. * Returns 0 on success, negative on failure
  2542. **/
  2543. static int
  2544. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  2545. {
  2546. struct e1000_adapter *adapter = netdev_priv(netdev);
  2547. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  2548. uint16_t eeprom_data = 0;
  2549. if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  2550. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2551. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2552. return -EINVAL;
  2553. }
  2554. /* Adapter-specific max frame size limits. */
  2555. switch (adapter->hw.mac_type) {
  2556. case e1000_undefined ... e1000_82542_rev2_1:
  2557. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2558. DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
  2559. return -EINVAL;
  2560. }
  2561. break;
  2562. case e1000_82573:
  2563. /* only enable jumbo frames if ASPM is disabled completely
  2564. * this means both bits must be zero in 0x1A bits 3:2 */
  2565. e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
  2566. &eeprom_data);
  2567. if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
  2568. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2569. DPRINTK(PROBE, ERR,
  2570. "Jumbo Frames not supported.\n");
  2571. return -EINVAL;
  2572. }
  2573. break;
  2574. }
  2575. /* fall through to get support */
  2576. case e1000_82571:
  2577. case e1000_82572:
  2578. case e1000_80003es2lan:
  2579. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  2580. if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  2581. DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
  2582. return -EINVAL;
  2583. }
  2584. break;
  2585. default:
  2586. /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
  2587. break;
  2588. }
  2589. /* NOTE: dev_alloc_skb reserves 16 bytes, and typically NET_IP_ALIGN
  2590. * means we reserve 2 more, this pushes us to allocate from the next
  2591. * larger slab size
  2592. * i.e. RXBUFFER_2048 --> size-4096 slab */
  2593. if (max_frame <= E1000_RXBUFFER_256)
  2594. adapter->rx_buffer_len = E1000_RXBUFFER_256;
  2595. else if (max_frame <= E1000_RXBUFFER_512)
  2596. adapter->rx_buffer_len = E1000_RXBUFFER_512;
  2597. else if (max_frame <= E1000_RXBUFFER_1024)
  2598. adapter->rx_buffer_len = E1000_RXBUFFER_1024;
  2599. else if (max_frame <= E1000_RXBUFFER_2048)
  2600. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2601. else if (max_frame <= E1000_RXBUFFER_4096)
  2602. adapter->rx_buffer_len = E1000_RXBUFFER_4096;
  2603. else if (max_frame <= E1000_RXBUFFER_8192)
  2604. adapter->rx_buffer_len = E1000_RXBUFFER_8192;
  2605. else if (max_frame <= E1000_RXBUFFER_16384)
  2606. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  2607. /* adjust allocation if LPE protects us, and we aren't using SBP */
  2608. #define MAXIMUM_ETHERNET_VLAN_SIZE 1522
  2609. if (!adapter->hw.tbi_compatibility_on &&
  2610. ((max_frame == MAXIMUM_ETHERNET_FRAME_SIZE) ||
  2611. (max_frame == MAXIMUM_ETHERNET_VLAN_SIZE)))
  2612. adapter->rx_buffer_len = MAXIMUM_ETHERNET_VLAN_SIZE;
  2613. netdev->mtu = new_mtu;
  2614. if (netif_running(netdev))
  2615. e1000_reinit_locked(adapter);
  2616. adapter->hw.max_frame_size = max_frame;
  2617. return 0;
  2618. }
  2619. /**
  2620. * e1000_update_stats - Update the board statistics counters
  2621. * @adapter: board private structure
  2622. **/
  2623. void
  2624. e1000_update_stats(struct e1000_adapter *adapter)
  2625. {
  2626. struct e1000_hw *hw = &adapter->hw;
  2627. struct pci_dev *pdev = adapter->pdev;
  2628. unsigned long flags;
  2629. uint16_t phy_tmp;
  2630. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2631. /*
  2632. * Prevent stats update while adapter is being reset, or if the pci
  2633. * connection is down.
  2634. */
  2635. if (adapter->link_speed == 0)
  2636. return;
  2637. if (pdev->error_state && pdev->error_state != pci_channel_io_normal)
  2638. return;
  2639. spin_lock_irqsave(&adapter->stats_lock, flags);
  2640. /* these counters are modified from e1000_adjust_tbi_stats,
  2641. * called from the interrupt context, so they must only
  2642. * be written while holding adapter->stats_lock
  2643. */
  2644. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2645. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2646. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2647. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2648. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2649. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2650. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2651. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2652. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2653. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2654. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2655. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2656. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2657. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2658. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2659. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2660. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2661. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2662. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2663. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2664. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2665. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2666. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2667. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2668. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2669. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2670. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2671. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2672. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2673. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2674. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2675. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2676. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2677. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2678. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2679. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2680. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2681. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2682. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2683. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2684. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2685. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2686. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2687. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2688. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2689. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2690. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2691. /* used for adaptive IFS */
  2692. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2693. adapter->stats.tpt += hw->tx_packet_delta;
  2694. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2695. adapter->stats.colc += hw->collision_delta;
  2696. if (hw->mac_type >= e1000_82543) {
  2697. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2698. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2699. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2700. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2701. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2702. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2703. }
  2704. if (hw->mac_type > e1000_82547_rev_2) {
  2705. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2706. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2707. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2708. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2709. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2710. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2711. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2712. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2713. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2714. }
  2715. /* Fill out the OS statistics structure */
  2716. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2717. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2718. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2719. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2720. adapter->net_stats.multicast = adapter->stats.mprc;
  2721. adapter->net_stats.collisions = adapter->stats.colc;
  2722. /* Rx Errors */
  2723. /* RLEC on some newer hardware can be incorrect so build
  2724. * our own version based on RUC and ROC */
  2725. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2726. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2727. adapter->stats.ruc + adapter->stats.roc +
  2728. adapter->stats.cexterr;
  2729. adapter->net_stats.rx_length_errors = adapter->stats.ruc +
  2730. adapter->stats.roc;
  2731. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2732. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2733. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2734. /* Tx Errors */
  2735. adapter->net_stats.tx_errors = adapter->stats.ecol +
  2736. adapter->stats.latecol;
  2737. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2738. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2739. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2740. /* Tx Dropped needs to be maintained elsewhere */
  2741. /* Phy Stats */
  2742. if (hw->media_type == e1000_media_type_copper) {
  2743. if ((adapter->link_speed == SPEED_1000) &&
  2744. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2745. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2746. adapter->phy_stats.idle_errors += phy_tmp;
  2747. }
  2748. if ((hw->mac_type <= e1000_82546) &&
  2749. (hw->phy_type == e1000_phy_m88) &&
  2750. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2751. adapter->phy_stats.receive_errors += phy_tmp;
  2752. }
  2753. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2754. }
  2755. /**
  2756. * e1000_intr - Interrupt Handler
  2757. * @irq: interrupt number
  2758. * @data: pointer to a network interface device structure
  2759. * @pt_regs: CPU registers structure
  2760. **/
  2761. static irqreturn_t
  2762. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2763. {
  2764. struct net_device *netdev = data;
  2765. struct e1000_adapter *adapter = netdev_priv(netdev);
  2766. struct e1000_hw *hw = &adapter->hw;
  2767. uint32_t rctl, icr = E1000_READ_REG(hw, ICR);
  2768. #ifndef CONFIG_E1000_NAPI
  2769. int i;
  2770. #else
  2771. /* Interrupt Auto-Mask...upon reading ICR,
  2772. * interrupts are masked. No need for the
  2773. * IMC write, but it does mean we should
  2774. * account for it ASAP. */
  2775. if (likely(hw->mac_type >= e1000_82571))
  2776. atomic_inc(&adapter->irq_sem);
  2777. #endif
  2778. if (unlikely(!icr)) {
  2779. #ifdef CONFIG_E1000_NAPI
  2780. if (hw->mac_type >= e1000_82571)
  2781. e1000_irq_enable(adapter);
  2782. #endif
  2783. return IRQ_NONE; /* Not our interrupt */
  2784. }
  2785. if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2786. hw->get_link_status = 1;
  2787. /* 80003ES2LAN workaround--
  2788. * For packet buffer work-around on link down event;
  2789. * disable receives here in the ISR and
  2790. * reset adapter in watchdog
  2791. */
  2792. if (netif_carrier_ok(netdev) &&
  2793. (adapter->hw.mac_type == e1000_80003es2lan)) {
  2794. /* disable receives */
  2795. rctl = E1000_READ_REG(hw, RCTL);
  2796. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  2797. }
  2798. mod_timer(&adapter->watchdog_timer, jiffies);
  2799. }
  2800. #ifdef CONFIG_E1000_NAPI
  2801. if (unlikely(hw->mac_type < e1000_82571)) {
  2802. atomic_inc(&adapter->irq_sem);
  2803. E1000_WRITE_REG(hw, IMC, ~0);
  2804. E1000_WRITE_FLUSH(hw);
  2805. }
  2806. if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
  2807. __netif_rx_schedule(&adapter->polling_netdev[0]);
  2808. else
  2809. e1000_irq_enable(adapter);
  2810. #else
  2811. /* Writing IMC and IMS is needed for 82547.
  2812. * Due to Hub Link bus being occupied, an interrupt
  2813. * de-assertion message is not able to be sent.
  2814. * When an interrupt assertion message is generated later,
  2815. * two messages are re-ordered and sent out.
  2816. * That causes APIC to think 82547 is in de-assertion
  2817. * state, while 82547 is in assertion state, resulting
  2818. * in dead lock. Writing IMC forces 82547 into
  2819. * de-assertion state.
  2820. */
  2821. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
  2822. atomic_inc(&adapter->irq_sem);
  2823. E1000_WRITE_REG(hw, IMC, ~0);
  2824. }
  2825. for (i = 0; i < E1000_MAX_INTR; i++)
  2826. if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  2827. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  2828. break;
  2829. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2830. e1000_irq_enable(adapter);
  2831. #endif
  2832. return IRQ_HANDLED;
  2833. }
  2834. #ifdef CONFIG_E1000_NAPI
  2835. /**
  2836. * e1000_clean - NAPI Rx polling callback
  2837. * @adapter: board private structure
  2838. **/
  2839. static int
  2840. e1000_clean(struct net_device *poll_dev, int *budget)
  2841. {
  2842. struct e1000_adapter *adapter;
  2843. int work_to_do = min(*budget, poll_dev->quota);
  2844. int tx_cleaned = 0, i = 0, work_done = 0;
  2845. /* Must NOT use netdev_priv macro here. */
  2846. adapter = poll_dev->priv;
  2847. /* Keep link state information with original netdev */
  2848. if (!netif_carrier_ok(adapter->netdev))
  2849. goto quit_polling;
  2850. while (poll_dev != &adapter->polling_netdev[i]) {
  2851. i++;
  2852. BUG_ON(i == adapter->num_rx_queues);
  2853. }
  2854. if (likely(adapter->num_tx_queues == 1)) {
  2855. /* e1000_clean is called per-cpu. This lock protects
  2856. * tx_ring[0] from being cleaned by multiple cpus
  2857. * simultaneously. A failure obtaining the lock means
  2858. * tx_ring[0] is currently being cleaned anyway. */
  2859. if (spin_trylock(&adapter->tx_queue_lock)) {
  2860. tx_cleaned = e1000_clean_tx_irq(adapter,
  2861. &adapter->tx_ring[0]);
  2862. spin_unlock(&adapter->tx_queue_lock);
  2863. }
  2864. } else
  2865. tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
  2866. adapter->clean_rx(adapter, &adapter->rx_ring[i],
  2867. &work_done, work_to_do);
  2868. *budget -= work_done;
  2869. poll_dev->quota -= work_done;
  2870. /* If no Tx and not enough Rx work done, exit the polling mode */
  2871. if ((!tx_cleaned && (work_done == 0)) ||
  2872. !netif_running(adapter->netdev)) {
  2873. quit_polling:
  2874. netif_rx_complete(poll_dev);
  2875. e1000_irq_enable(adapter);
  2876. return 0;
  2877. }
  2878. return 1;
  2879. }
  2880. #endif
  2881. /**
  2882. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  2883. * @adapter: board private structure
  2884. **/
  2885. static boolean_t
  2886. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  2887. struct e1000_tx_ring *tx_ring)
  2888. {
  2889. struct net_device *netdev = adapter->netdev;
  2890. struct e1000_tx_desc *tx_desc, *eop_desc;
  2891. struct e1000_buffer *buffer_info;
  2892. unsigned int i, eop;
  2893. #ifdef CONFIG_E1000_NAPI
  2894. unsigned int count = 0;
  2895. #endif
  2896. boolean_t cleaned = FALSE;
  2897. i = tx_ring->next_to_clean;
  2898. eop = tx_ring->buffer_info[i].next_to_watch;
  2899. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2900. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  2901. for (cleaned = FALSE; !cleaned; ) {
  2902. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2903. buffer_info = &tx_ring->buffer_info[i];
  2904. cleaned = (i == eop);
  2905. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  2906. memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
  2907. if (unlikely(++i == tx_ring->count)) i = 0;
  2908. }
  2909. eop = tx_ring->buffer_info[i].next_to_watch;
  2910. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2911. #ifdef CONFIG_E1000_NAPI
  2912. #define E1000_TX_WEIGHT 64
  2913. /* weight of a sort for tx, to avoid endless transmit cleanup */
  2914. if (count++ == E1000_TX_WEIGHT) break;
  2915. #endif
  2916. }
  2917. tx_ring->next_to_clean = i;
  2918. #define TX_WAKE_THRESHOLD 32
  2919. if (unlikely(cleaned && netif_queue_stopped(netdev) &&
  2920. netif_carrier_ok(netdev))) {
  2921. spin_lock(&tx_ring->tx_lock);
  2922. if (netif_queue_stopped(netdev) &&
  2923. (E1000_DESC_UNUSED(tx_ring) >= TX_WAKE_THRESHOLD))
  2924. netif_wake_queue(netdev);
  2925. spin_unlock(&tx_ring->tx_lock);
  2926. }
  2927. if (adapter->detect_tx_hung) {
  2928. /* Detect a transmit hang in hardware, this serializes the
  2929. * check with the clearing of time_stamp and movement of i */
  2930. adapter->detect_tx_hung = FALSE;
  2931. if (tx_ring->buffer_info[eop].dma &&
  2932. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
  2933. (adapter->tx_timeout_factor * HZ))
  2934. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  2935. E1000_STATUS_TXOFF)) {
  2936. /* detected Tx unit hang */
  2937. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  2938. " Tx Queue <%lu>\n"
  2939. " TDH <%x>\n"
  2940. " TDT <%x>\n"
  2941. " next_to_use <%x>\n"
  2942. " next_to_clean <%x>\n"
  2943. "buffer_info[next_to_clean]\n"
  2944. " time_stamp <%lx>\n"
  2945. " next_to_watch <%x>\n"
  2946. " jiffies <%lx>\n"
  2947. " next_to_watch.status <%x>\n",
  2948. (unsigned long)((tx_ring - adapter->tx_ring) /
  2949. sizeof(struct e1000_tx_ring)),
  2950. readl(adapter->hw.hw_addr + tx_ring->tdh),
  2951. readl(adapter->hw.hw_addr + tx_ring->tdt),
  2952. tx_ring->next_to_use,
  2953. tx_ring->next_to_clean,
  2954. tx_ring->buffer_info[eop].time_stamp,
  2955. eop,
  2956. jiffies,
  2957. eop_desc->upper.fields.status);
  2958. netif_stop_queue(netdev);
  2959. }
  2960. }
  2961. return cleaned;
  2962. }
  2963. /**
  2964. * e1000_rx_checksum - Receive Checksum Offload for 82543
  2965. * @adapter: board private structure
  2966. * @status_err: receive descriptor status and error fields
  2967. * @csum: receive descriptor csum field
  2968. * @sk_buff: socket buffer with received data
  2969. **/
  2970. static void
  2971. e1000_rx_checksum(struct e1000_adapter *adapter,
  2972. uint32_t status_err, uint32_t csum,
  2973. struct sk_buff *skb)
  2974. {
  2975. uint16_t status = (uint16_t)status_err;
  2976. uint8_t errors = (uint8_t)(status_err >> 24);
  2977. skb->ip_summed = CHECKSUM_NONE;
  2978. /* 82543 or newer only */
  2979. if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
  2980. /* Ignore Checksum bit is set */
  2981. if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
  2982. /* TCP/UDP checksum error bit is set */
  2983. if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
  2984. /* let the stack verify checksum errors */
  2985. adapter->hw_csum_err++;
  2986. return;
  2987. }
  2988. /* TCP/UDP Checksum has not been calculated */
  2989. if (adapter->hw.mac_type <= e1000_82547_rev_2) {
  2990. if (!(status & E1000_RXD_STAT_TCPCS))
  2991. return;
  2992. } else {
  2993. if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  2994. return;
  2995. }
  2996. /* It must be a TCP or UDP packet with a valid checksum */
  2997. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  2998. /* TCP checksum is good */
  2999. skb->ip_summed = CHECKSUM_UNNECESSARY;
  3000. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  3001. /* IP fragment with UDP payload */
  3002. /* Hardware complements the payload checksum, so we undo it
  3003. * and then put the value in host order for further stack use.
  3004. */
  3005. csum = ntohl(csum ^ 0xFFFF);
  3006. skb->csum = csum;
  3007. skb->ip_summed = CHECKSUM_HW;
  3008. }
  3009. adapter->hw_csum_good++;
  3010. }
  3011. /**
  3012. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  3013. * @adapter: board private structure
  3014. **/
  3015. static boolean_t
  3016. #ifdef CONFIG_E1000_NAPI
  3017. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3018. struct e1000_rx_ring *rx_ring,
  3019. int *work_done, int work_to_do)
  3020. #else
  3021. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  3022. struct e1000_rx_ring *rx_ring)
  3023. #endif
  3024. {
  3025. struct net_device *netdev = adapter->netdev;
  3026. struct pci_dev *pdev = adapter->pdev;
  3027. struct e1000_rx_desc *rx_desc, *next_rxd;
  3028. struct e1000_buffer *buffer_info, *next_buffer;
  3029. unsigned long flags;
  3030. uint32_t length;
  3031. uint8_t last_byte;
  3032. unsigned int i;
  3033. int cleaned_count = 0;
  3034. boolean_t cleaned = FALSE;
  3035. i = rx_ring->next_to_clean;
  3036. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3037. buffer_info = &rx_ring->buffer_info[i];
  3038. while (rx_desc->status & E1000_RXD_STAT_DD) {
  3039. struct sk_buff *skb;
  3040. u8 status;
  3041. #ifdef CONFIG_E1000_NAPI
  3042. if (*work_done >= work_to_do)
  3043. break;
  3044. (*work_done)++;
  3045. #endif
  3046. status = rx_desc->status;
  3047. skb = buffer_info->skb;
  3048. buffer_info->skb = NULL;
  3049. prefetch(skb->data - NET_IP_ALIGN);
  3050. if (++i == rx_ring->count) i = 0;
  3051. next_rxd = E1000_RX_DESC(*rx_ring, i);
  3052. prefetch(next_rxd);
  3053. next_buffer = &rx_ring->buffer_info[i];
  3054. cleaned = TRUE;
  3055. cleaned_count++;
  3056. pci_unmap_single(pdev,
  3057. buffer_info->dma,
  3058. buffer_info->length,
  3059. PCI_DMA_FROMDEVICE);
  3060. length = le16_to_cpu(rx_desc->length);
  3061. if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
  3062. /* All receives must fit into a single buffer */
  3063. E1000_DBG("%s: Receive packet consumed multiple"
  3064. " buffers\n", netdev->name);
  3065. /* recycle */
  3066. buffer_info-> skb = skb;
  3067. goto next_desc;
  3068. }
  3069. if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  3070. last_byte = *(skb->data + length - 1);
  3071. if (TBI_ACCEPT(&adapter->hw, status,
  3072. rx_desc->errors, length, last_byte)) {
  3073. spin_lock_irqsave(&adapter->stats_lock, flags);
  3074. e1000_tbi_adjust_stats(&adapter->hw,
  3075. &adapter->stats,
  3076. length, skb->data);
  3077. spin_unlock_irqrestore(&adapter->stats_lock,
  3078. flags);
  3079. length--;
  3080. } else {
  3081. /* recycle */
  3082. buffer_info->skb = skb;
  3083. goto next_desc;
  3084. }
  3085. }
  3086. /* code added for copybreak, this should improve
  3087. * performance for small packets with large amounts
  3088. * of reassembly being done in the stack */
  3089. #define E1000_CB_LENGTH 256
  3090. if (length < E1000_CB_LENGTH) {
  3091. struct sk_buff *new_skb =
  3092. dev_alloc_skb(length + NET_IP_ALIGN);
  3093. if (new_skb) {
  3094. skb_reserve(new_skb, NET_IP_ALIGN);
  3095. new_skb->dev = netdev;
  3096. memcpy(new_skb->data - NET_IP_ALIGN,
  3097. skb->data - NET_IP_ALIGN,
  3098. length + NET_IP_ALIGN);
  3099. /* save the skb in buffer_info as good */
  3100. buffer_info->skb = skb;
  3101. skb = new_skb;
  3102. skb_put(skb, length);
  3103. }
  3104. } else
  3105. skb_put(skb, length);
  3106. /* end copybreak code */
  3107. /* Receive Checksum Offload */
  3108. e1000_rx_checksum(adapter,
  3109. (uint32_t)(status) |
  3110. ((uint32_t)(rx_desc->errors) << 24),
  3111. le16_to_cpu(rx_desc->csum), skb);
  3112. skb->protocol = eth_type_trans(skb, netdev);
  3113. #ifdef CONFIG_E1000_NAPI
  3114. if (unlikely(adapter->vlgrp &&
  3115. (status & E1000_RXD_STAT_VP))) {
  3116. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3117. le16_to_cpu(rx_desc->special) &
  3118. E1000_RXD_SPC_VLAN_MASK);
  3119. } else {
  3120. netif_receive_skb(skb);
  3121. }
  3122. #else /* CONFIG_E1000_NAPI */
  3123. if (unlikely(adapter->vlgrp &&
  3124. (status & E1000_RXD_STAT_VP))) {
  3125. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3126. le16_to_cpu(rx_desc->special) &
  3127. E1000_RXD_SPC_VLAN_MASK);
  3128. } else {
  3129. netif_rx(skb);
  3130. }
  3131. #endif /* CONFIG_E1000_NAPI */
  3132. netdev->last_rx = jiffies;
  3133. next_desc:
  3134. rx_desc->status = 0;
  3135. /* return some buffers to hardware, one at a time is too slow */
  3136. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3137. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3138. cleaned_count = 0;
  3139. }
  3140. /* use prefetched values */
  3141. rx_desc = next_rxd;
  3142. buffer_info = next_buffer;
  3143. }
  3144. rx_ring->next_to_clean = i;
  3145. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3146. if (cleaned_count)
  3147. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3148. return cleaned;
  3149. }
  3150. /**
  3151. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  3152. * @adapter: board private structure
  3153. **/
  3154. static boolean_t
  3155. #ifdef CONFIG_E1000_NAPI
  3156. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3157. struct e1000_rx_ring *rx_ring,
  3158. int *work_done, int work_to_do)
  3159. #else
  3160. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3161. struct e1000_rx_ring *rx_ring)
  3162. #endif
  3163. {
  3164. union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
  3165. struct net_device *netdev = adapter->netdev;
  3166. struct pci_dev *pdev = adapter->pdev;
  3167. struct e1000_buffer *buffer_info, *next_buffer;
  3168. struct e1000_ps_page *ps_page;
  3169. struct e1000_ps_page_dma *ps_page_dma;
  3170. struct sk_buff *skb;
  3171. unsigned int i, j;
  3172. uint32_t length, staterr;
  3173. int cleaned_count = 0;
  3174. boolean_t cleaned = FALSE;
  3175. i = rx_ring->next_to_clean;
  3176. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3177. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3178. buffer_info = &rx_ring->buffer_info[i];
  3179. while (staterr & E1000_RXD_STAT_DD) {
  3180. ps_page = &rx_ring->ps_page[i];
  3181. ps_page_dma = &rx_ring->ps_page_dma[i];
  3182. #ifdef CONFIG_E1000_NAPI
  3183. if (unlikely(*work_done >= work_to_do))
  3184. break;
  3185. (*work_done)++;
  3186. #endif
  3187. skb = buffer_info->skb;
  3188. /* in the packet split case this is header only */
  3189. prefetch(skb->data - NET_IP_ALIGN);
  3190. if (++i == rx_ring->count) i = 0;
  3191. next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
  3192. prefetch(next_rxd);
  3193. next_buffer = &rx_ring->buffer_info[i];
  3194. cleaned = TRUE;
  3195. cleaned_count++;
  3196. pci_unmap_single(pdev, buffer_info->dma,
  3197. buffer_info->length,
  3198. PCI_DMA_FROMDEVICE);
  3199. if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  3200. E1000_DBG("%s: Packet Split buffers didn't pick up"
  3201. " the full packet\n", netdev->name);
  3202. dev_kfree_skb_irq(skb);
  3203. goto next_desc;
  3204. }
  3205. if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  3206. dev_kfree_skb_irq(skb);
  3207. goto next_desc;
  3208. }
  3209. length = le16_to_cpu(rx_desc->wb.middle.length0);
  3210. if (unlikely(!length)) {
  3211. E1000_DBG("%s: Last part of the packet spanning"
  3212. " multiple descriptors\n", netdev->name);
  3213. dev_kfree_skb_irq(skb);
  3214. goto next_desc;
  3215. }
  3216. /* Good Receive */
  3217. skb_put(skb, length);
  3218. {
  3219. /* this looks ugly, but it seems compiler issues make it
  3220. more efficient than reusing j */
  3221. int l1 = le16_to_cpu(rx_desc->wb.upper.length[0]);
  3222. /* page alloc/put takes too long and effects small packet
  3223. * throughput, so unsplit small packets and save the alloc/put*/
  3224. if (l1 && ((length + l1) <= adapter->rx_ps_bsize0)) {
  3225. u8 *vaddr;
  3226. /* there is no documentation about how to call
  3227. * kmap_atomic, so we can't hold the mapping
  3228. * very long */
  3229. pci_dma_sync_single_for_cpu(pdev,
  3230. ps_page_dma->ps_page_dma[0],
  3231. PAGE_SIZE,
  3232. PCI_DMA_FROMDEVICE);
  3233. vaddr = kmap_atomic(ps_page->ps_page[0],
  3234. KM_SKB_DATA_SOFTIRQ);
  3235. memcpy(skb->tail, vaddr, l1);
  3236. kunmap_atomic(vaddr, KM_SKB_DATA_SOFTIRQ);
  3237. pci_dma_sync_single_for_device(pdev,
  3238. ps_page_dma->ps_page_dma[0],
  3239. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3240. skb_put(skb, l1);
  3241. length += l1;
  3242. goto copydone;
  3243. } /* if */
  3244. }
  3245. for (j = 0; j < adapter->rx_ps_pages; j++) {
  3246. if (!(length= le16_to_cpu(rx_desc->wb.upper.length[j])))
  3247. break;
  3248. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  3249. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3250. ps_page_dma->ps_page_dma[j] = 0;
  3251. skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
  3252. length);
  3253. ps_page->ps_page[j] = NULL;
  3254. skb->len += length;
  3255. skb->data_len += length;
  3256. skb->truesize += length;
  3257. }
  3258. copydone:
  3259. e1000_rx_checksum(adapter, staterr,
  3260. le16_to_cpu(rx_desc->wb.lower.hi_dword.csum_ip.csum), skb);
  3261. skb->protocol = eth_type_trans(skb, netdev);
  3262. if (likely(rx_desc->wb.upper.header_status &
  3263. cpu_to_le16(E1000_RXDPS_HDRSTAT_HDRSP)))
  3264. adapter->rx_hdr_split++;
  3265. #ifdef CONFIG_E1000_NAPI
  3266. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3267. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3268. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3269. E1000_RXD_SPC_VLAN_MASK);
  3270. } else {
  3271. netif_receive_skb(skb);
  3272. }
  3273. #else /* CONFIG_E1000_NAPI */
  3274. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3275. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3276. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3277. E1000_RXD_SPC_VLAN_MASK);
  3278. } else {
  3279. netif_rx(skb);
  3280. }
  3281. #endif /* CONFIG_E1000_NAPI */
  3282. netdev->last_rx = jiffies;
  3283. next_desc:
  3284. rx_desc->wb.middle.status_error &= cpu_to_le32(~0xFF);
  3285. buffer_info->skb = NULL;
  3286. /* return some buffers to hardware, one at a time is too slow */
  3287. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3288. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3289. cleaned_count = 0;
  3290. }
  3291. /* use prefetched values */
  3292. rx_desc = next_rxd;
  3293. buffer_info = next_buffer;
  3294. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3295. }
  3296. rx_ring->next_to_clean = i;
  3297. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3298. if (cleaned_count)
  3299. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3300. return cleaned;
  3301. }
  3302. /**
  3303. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3304. * @adapter: address of board private structure
  3305. **/
  3306. static void
  3307. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3308. struct e1000_rx_ring *rx_ring,
  3309. int cleaned_count)
  3310. {
  3311. struct net_device *netdev = adapter->netdev;
  3312. struct pci_dev *pdev = adapter->pdev;
  3313. struct e1000_rx_desc *rx_desc;
  3314. struct e1000_buffer *buffer_info;
  3315. struct sk_buff *skb;
  3316. unsigned int i;
  3317. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3318. i = rx_ring->next_to_use;
  3319. buffer_info = &rx_ring->buffer_info[i];
  3320. while (cleaned_count--) {
  3321. if (!(skb = buffer_info->skb))
  3322. skb = dev_alloc_skb(bufsz);
  3323. else {
  3324. skb_trim(skb, 0);
  3325. goto map_skb;
  3326. }
  3327. if (unlikely(!skb)) {
  3328. /* Better luck next round */
  3329. adapter->alloc_rx_buff_failed++;
  3330. break;
  3331. }
  3332. /* Fix for errata 23, can't cross 64kB boundary */
  3333. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3334. struct sk_buff *oldskb = skb;
  3335. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3336. "at %p\n", bufsz, skb->data);
  3337. /* Try again, without freeing the previous */
  3338. skb = dev_alloc_skb(bufsz);
  3339. /* Failed allocation, critical failure */
  3340. if (!skb) {
  3341. dev_kfree_skb(oldskb);
  3342. break;
  3343. }
  3344. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3345. /* give up */
  3346. dev_kfree_skb(skb);
  3347. dev_kfree_skb(oldskb);
  3348. break; /* while !buffer_info->skb */
  3349. } else {
  3350. /* Use new allocation */
  3351. dev_kfree_skb(oldskb);
  3352. }
  3353. }
  3354. /* Make buffer alignment 2 beyond a 16 byte boundary
  3355. * this will result in a 16 byte aligned IP header after
  3356. * the 14 byte MAC header is removed
  3357. */
  3358. skb_reserve(skb, NET_IP_ALIGN);
  3359. skb->dev = netdev;
  3360. buffer_info->skb = skb;
  3361. buffer_info->length = adapter->rx_buffer_len;
  3362. map_skb:
  3363. buffer_info->dma = pci_map_single(pdev,
  3364. skb->data,
  3365. adapter->rx_buffer_len,
  3366. PCI_DMA_FROMDEVICE);
  3367. /* Fix for errata 23, can't cross 64kB boundary */
  3368. if (!e1000_check_64k_bound(adapter,
  3369. (void *)(unsigned long)buffer_info->dma,
  3370. adapter->rx_buffer_len)) {
  3371. DPRINTK(RX_ERR, ERR,
  3372. "dma align check failed: %u bytes at %p\n",
  3373. adapter->rx_buffer_len,
  3374. (void *)(unsigned long)buffer_info->dma);
  3375. dev_kfree_skb(skb);
  3376. buffer_info->skb = NULL;
  3377. pci_unmap_single(pdev, buffer_info->dma,
  3378. adapter->rx_buffer_len,
  3379. PCI_DMA_FROMDEVICE);
  3380. break; /* while !buffer_info->skb */
  3381. }
  3382. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3383. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3384. if (unlikely(++i == rx_ring->count))
  3385. i = 0;
  3386. buffer_info = &rx_ring->buffer_info[i];
  3387. }
  3388. if (likely(rx_ring->next_to_use != i)) {
  3389. rx_ring->next_to_use = i;
  3390. if (unlikely(i-- == 0))
  3391. i = (rx_ring->count - 1);
  3392. /* Force memory writes to complete before letting h/w
  3393. * know there are new descriptors to fetch. (Only
  3394. * applicable for weak-ordered memory model archs,
  3395. * such as IA-64). */
  3396. wmb();
  3397. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3398. }
  3399. }
  3400. /**
  3401. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  3402. * @adapter: address of board private structure
  3403. **/
  3404. static void
  3405. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  3406. struct e1000_rx_ring *rx_ring,
  3407. int cleaned_count)
  3408. {
  3409. struct net_device *netdev = adapter->netdev;
  3410. struct pci_dev *pdev = adapter->pdev;
  3411. union e1000_rx_desc_packet_split *rx_desc;
  3412. struct e1000_buffer *buffer_info;
  3413. struct e1000_ps_page *ps_page;
  3414. struct e1000_ps_page_dma *ps_page_dma;
  3415. struct sk_buff *skb;
  3416. unsigned int i, j;
  3417. i = rx_ring->next_to_use;
  3418. buffer_info = &rx_ring->buffer_info[i];
  3419. ps_page = &rx_ring->ps_page[i];
  3420. ps_page_dma = &rx_ring->ps_page_dma[i];
  3421. while (cleaned_count--) {
  3422. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3423. for (j = 0; j < PS_PAGE_BUFFERS; j++) {
  3424. if (j < adapter->rx_ps_pages) {
  3425. if (likely(!ps_page->ps_page[j])) {
  3426. ps_page->ps_page[j] =
  3427. alloc_page(GFP_ATOMIC);
  3428. if (unlikely(!ps_page->ps_page[j])) {
  3429. adapter->alloc_rx_buff_failed++;
  3430. goto no_buffers;
  3431. }
  3432. ps_page_dma->ps_page_dma[j] =
  3433. pci_map_page(pdev,
  3434. ps_page->ps_page[j],
  3435. 0, PAGE_SIZE,
  3436. PCI_DMA_FROMDEVICE);
  3437. }
  3438. /* Refresh the desc even if buffer_addrs didn't
  3439. * change because each write-back erases
  3440. * this info.
  3441. */
  3442. rx_desc->read.buffer_addr[j+1] =
  3443. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  3444. } else
  3445. rx_desc->read.buffer_addr[j+1] = ~0;
  3446. }
  3447. skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  3448. if (unlikely(!skb)) {
  3449. adapter->alloc_rx_buff_failed++;
  3450. break;
  3451. }
  3452. /* Make buffer alignment 2 beyond a 16 byte boundary
  3453. * this will result in a 16 byte aligned IP header after
  3454. * the 14 byte MAC header is removed
  3455. */
  3456. skb_reserve(skb, NET_IP_ALIGN);
  3457. skb->dev = netdev;
  3458. buffer_info->skb = skb;
  3459. buffer_info->length = adapter->rx_ps_bsize0;
  3460. buffer_info->dma = pci_map_single(pdev, skb->data,
  3461. adapter->rx_ps_bsize0,
  3462. PCI_DMA_FROMDEVICE);
  3463. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  3464. if (unlikely(++i == rx_ring->count)) i = 0;
  3465. buffer_info = &rx_ring->buffer_info[i];
  3466. ps_page = &rx_ring->ps_page[i];
  3467. ps_page_dma = &rx_ring->ps_page_dma[i];
  3468. }
  3469. no_buffers:
  3470. if (likely(rx_ring->next_to_use != i)) {
  3471. rx_ring->next_to_use = i;
  3472. if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
  3473. /* Force memory writes to complete before letting h/w
  3474. * know there are new descriptors to fetch. (Only
  3475. * applicable for weak-ordered memory model archs,
  3476. * such as IA-64). */
  3477. wmb();
  3478. /* Hardware increments by 16 bytes, but packet split
  3479. * descriptors are 32 bytes...so we increment tail
  3480. * twice as much.
  3481. */
  3482. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  3483. }
  3484. }
  3485. /**
  3486. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  3487. * @adapter:
  3488. **/
  3489. static void
  3490. e1000_smartspeed(struct e1000_adapter *adapter)
  3491. {
  3492. uint16_t phy_status;
  3493. uint16_t phy_ctrl;
  3494. if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  3495. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  3496. return;
  3497. if (adapter->smartspeed == 0) {
  3498. /* If Master/Slave config fault is asserted twice,
  3499. * we assume back-to-back */
  3500. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3501. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3502. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3503. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3504. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3505. if (phy_ctrl & CR_1000T_MS_ENABLE) {
  3506. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  3507. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  3508. phy_ctrl);
  3509. adapter->smartspeed++;
  3510. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3511. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  3512. &phy_ctrl)) {
  3513. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3514. MII_CR_RESTART_AUTO_NEG);
  3515. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  3516. phy_ctrl);
  3517. }
  3518. }
  3519. return;
  3520. } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  3521. /* If still no link, perhaps using 2/3 pair cable */
  3522. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3523. phy_ctrl |= CR_1000T_MS_ENABLE;
  3524. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  3525. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3526. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  3527. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3528. MII_CR_RESTART_AUTO_NEG);
  3529. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  3530. }
  3531. }
  3532. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  3533. if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  3534. adapter->smartspeed = 0;
  3535. }
  3536. /**
  3537. * e1000_ioctl -
  3538. * @netdev:
  3539. * @ifreq:
  3540. * @cmd:
  3541. **/
  3542. static int
  3543. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3544. {
  3545. switch (cmd) {
  3546. case SIOCGMIIPHY:
  3547. case SIOCGMIIREG:
  3548. case SIOCSMIIREG:
  3549. return e1000_mii_ioctl(netdev, ifr, cmd);
  3550. default:
  3551. return -EOPNOTSUPP;
  3552. }
  3553. }
  3554. /**
  3555. * e1000_mii_ioctl -
  3556. * @netdev:
  3557. * @ifreq:
  3558. * @cmd:
  3559. **/
  3560. static int
  3561. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3562. {
  3563. struct e1000_adapter *adapter = netdev_priv(netdev);
  3564. struct mii_ioctl_data *data = if_mii(ifr);
  3565. int retval;
  3566. uint16_t mii_reg;
  3567. uint16_t spddplx;
  3568. unsigned long flags;
  3569. if (adapter->hw.media_type != e1000_media_type_copper)
  3570. return -EOPNOTSUPP;
  3571. switch (cmd) {
  3572. case SIOCGMIIPHY:
  3573. data->phy_id = adapter->hw.phy_addr;
  3574. break;
  3575. case SIOCGMIIREG:
  3576. if (!capable(CAP_NET_ADMIN))
  3577. return -EPERM;
  3578. spin_lock_irqsave(&adapter->stats_lock, flags);
  3579. if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  3580. &data->val_out)) {
  3581. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3582. return -EIO;
  3583. }
  3584. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3585. break;
  3586. case SIOCSMIIREG:
  3587. if (!capable(CAP_NET_ADMIN))
  3588. return -EPERM;
  3589. if (data->reg_num & ~(0x1F))
  3590. return -EFAULT;
  3591. mii_reg = data->val_in;
  3592. spin_lock_irqsave(&adapter->stats_lock, flags);
  3593. if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
  3594. mii_reg)) {
  3595. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3596. return -EIO;
  3597. }
  3598. if (adapter->hw.media_type == e1000_media_type_copper) {
  3599. switch (data->reg_num) {
  3600. case PHY_CTRL:
  3601. if (mii_reg & MII_CR_POWER_DOWN)
  3602. break;
  3603. if (mii_reg & MII_CR_AUTO_NEG_EN) {
  3604. adapter->hw.autoneg = 1;
  3605. adapter->hw.autoneg_advertised = 0x2F;
  3606. } else {
  3607. if (mii_reg & 0x40)
  3608. spddplx = SPEED_1000;
  3609. else if (mii_reg & 0x2000)
  3610. spddplx = SPEED_100;
  3611. else
  3612. spddplx = SPEED_10;
  3613. spddplx += (mii_reg & 0x100)
  3614. ? DUPLEX_FULL :
  3615. DUPLEX_HALF;
  3616. retval = e1000_set_spd_dplx(adapter,
  3617. spddplx);
  3618. if (retval) {
  3619. spin_unlock_irqrestore(
  3620. &adapter->stats_lock,
  3621. flags);
  3622. return retval;
  3623. }
  3624. }
  3625. if (netif_running(adapter->netdev))
  3626. e1000_reinit_locked(adapter);
  3627. else
  3628. e1000_reset(adapter);
  3629. break;
  3630. case M88E1000_PHY_SPEC_CTRL:
  3631. case M88E1000_EXT_PHY_SPEC_CTRL:
  3632. if (e1000_phy_reset(&adapter->hw)) {
  3633. spin_unlock_irqrestore(
  3634. &adapter->stats_lock, flags);
  3635. return -EIO;
  3636. }
  3637. break;
  3638. }
  3639. } else {
  3640. switch (data->reg_num) {
  3641. case PHY_CTRL:
  3642. if (mii_reg & MII_CR_POWER_DOWN)
  3643. break;
  3644. if (netif_running(adapter->netdev))
  3645. e1000_reinit_locked(adapter);
  3646. else
  3647. e1000_reset(adapter);
  3648. break;
  3649. }
  3650. }
  3651. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3652. break;
  3653. default:
  3654. return -EOPNOTSUPP;
  3655. }
  3656. return E1000_SUCCESS;
  3657. }
  3658. void
  3659. e1000_pci_set_mwi(struct e1000_hw *hw)
  3660. {
  3661. struct e1000_adapter *adapter = hw->back;
  3662. int ret_val = pci_set_mwi(adapter->pdev);
  3663. if (ret_val)
  3664. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  3665. }
  3666. void
  3667. e1000_pci_clear_mwi(struct e1000_hw *hw)
  3668. {
  3669. struct e1000_adapter *adapter = hw->back;
  3670. pci_clear_mwi(adapter->pdev);
  3671. }
  3672. void
  3673. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3674. {
  3675. struct e1000_adapter *adapter = hw->back;
  3676. pci_read_config_word(adapter->pdev, reg, value);
  3677. }
  3678. void
  3679. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3680. {
  3681. struct e1000_adapter *adapter = hw->back;
  3682. pci_write_config_word(adapter->pdev, reg, *value);
  3683. }
  3684. uint32_t
  3685. e1000_io_read(struct e1000_hw *hw, unsigned long port)
  3686. {
  3687. return inl(port);
  3688. }
  3689. void
  3690. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  3691. {
  3692. outl(value, port);
  3693. }
  3694. static void
  3695. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  3696. {
  3697. struct e1000_adapter *adapter = netdev_priv(netdev);
  3698. uint32_t ctrl, rctl;
  3699. e1000_irq_disable(adapter);
  3700. adapter->vlgrp = grp;
  3701. if (grp) {
  3702. /* enable VLAN tag insert/strip */
  3703. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3704. ctrl |= E1000_CTRL_VME;
  3705. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3706. /* enable VLAN receive filtering */
  3707. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3708. rctl |= E1000_RCTL_VFE;
  3709. rctl &= ~E1000_RCTL_CFIEN;
  3710. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3711. e1000_update_mng_vlan(adapter);
  3712. } else {
  3713. /* disable VLAN tag insert/strip */
  3714. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3715. ctrl &= ~E1000_CTRL_VME;
  3716. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3717. /* disable VLAN filtering */
  3718. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3719. rctl &= ~E1000_RCTL_VFE;
  3720. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3721. if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  3722. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  3723. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  3724. }
  3725. }
  3726. e1000_irq_enable(adapter);
  3727. }
  3728. static void
  3729. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3730. {
  3731. struct e1000_adapter *adapter = netdev_priv(netdev);
  3732. uint32_t vfta, index;
  3733. if ((adapter->hw.mng_cookie.status &
  3734. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3735. (vid == adapter->mng_vlan_id))
  3736. return;
  3737. /* add VID to filter table */
  3738. index = (vid >> 5) & 0x7F;
  3739. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3740. vfta |= (1 << (vid & 0x1F));
  3741. e1000_write_vfta(&adapter->hw, index, vfta);
  3742. }
  3743. static void
  3744. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3745. {
  3746. struct e1000_adapter *adapter = netdev_priv(netdev);
  3747. uint32_t vfta, index;
  3748. e1000_irq_disable(adapter);
  3749. if (adapter->vlgrp)
  3750. adapter->vlgrp->vlan_devices[vid] = NULL;
  3751. e1000_irq_enable(adapter);
  3752. if ((adapter->hw.mng_cookie.status &
  3753. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3754. (vid == adapter->mng_vlan_id)) {
  3755. /* release control to f/w */
  3756. e1000_release_hw_control(adapter);
  3757. return;
  3758. }
  3759. /* remove VID from filter table */
  3760. index = (vid >> 5) & 0x7F;
  3761. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3762. vfta &= ~(1 << (vid & 0x1F));
  3763. e1000_write_vfta(&adapter->hw, index, vfta);
  3764. }
  3765. static void
  3766. e1000_restore_vlan(struct e1000_adapter *adapter)
  3767. {
  3768. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3769. if (adapter->vlgrp) {
  3770. uint16_t vid;
  3771. for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3772. if (!adapter->vlgrp->vlan_devices[vid])
  3773. continue;
  3774. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3775. }
  3776. }
  3777. }
  3778. int
  3779. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3780. {
  3781. adapter->hw.autoneg = 0;
  3782. /* Fiber NICs only allow 1000 gbps Full duplex */
  3783. if ((adapter->hw.media_type == e1000_media_type_fiber) &&
  3784. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  3785. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3786. return -EINVAL;
  3787. }
  3788. switch (spddplx) {
  3789. case SPEED_10 + DUPLEX_HALF:
  3790. adapter->hw.forced_speed_duplex = e1000_10_half;
  3791. break;
  3792. case SPEED_10 + DUPLEX_FULL:
  3793. adapter->hw.forced_speed_duplex = e1000_10_full;
  3794. break;
  3795. case SPEED_100 + DUPLEX_HALF:
  3796. adapter->hw.forced_speed_duplex = e1000_100_half;
  3797. break;
  3798. case SPEED_100 + DUPLEX_FULL:
  3799. adapter->hw.forced_speed_duplex = e1000_100_full;
  3800. break;
  3801. case SPEED_1000 + DUPLEX_FULL:
  3802. adapter->hw.autoneg = 1;
  3803. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3804. break;
  3805. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3806. default:
  3807. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3808. return -EINVAL;
  3809. }
  3810. return 0;
  3811. }
  3812. #ifdef CONFIG_PM
  3813. /* Save/restore 16 or 64 dwords of PCI config space depending on which
  3814. * bus we're on (PCI(X) vs. PCI-E)
  3815. */
  3816. #define PCIE_CONFIG_SPACE_LEN 256
  3817. #define PCI_CONFIG_SPACE_LEN 64
  3818. static int
  3819. e1000_pci_save_state(struct e1000_adapter *adapter)
  3820. {
  3821. struct pci_dev *dev = adapter->pdev;
  3822. int size;
  3823. int i;
  3824. if (adapter->hw.mac_type >= e1000_82571)
  3825. size = PCIE_CONFIG_SPACE_LEN;
  3826. else
  3827. size = PCI_CONFIG_SPACE_LEN;
  3828. WARN_ON(adapter->config_space != NULL);
  3829. adapter->config_space = kmalloc(size, GFP_KERNEL);
  3830. if (!adapter->config_space) {
  3831. DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
  3832. return -ENOMEM;
  3833. }
  3834. for (i = 0; i < (size / 4); i++)
  3835. pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
  3836. return 0;
  3837. }
  3838. static void
  3839. e1000_pci_restore_state(struct e1000_adapter *adapter)
  3840. {
  3841. struct pci_dev *dev = adapter->pdev;
  3842. int size;
  3843. int i;
  3844. if (adapter->config_space == NULL)
  3845. return;
  3846. if (adapter->hw.mac_type >= e1000_82571)
  3847. size = PCIE_CONFIG_SPACE_LEN;
  3848. else
  3849. size = PCI_CONFIG_SPACE_LEN;
  3850. for (i = 0; i < (size / 4); i++)
  3851. pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
  3852. kfree(adapter->config_space);
  3853. adapter->config_space = NULL;
  3854. return;
  3855. }
  3856. #endif /* CONFIG_PM */
  3857. static int
  3858. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  3859. {
  3860. struct net_device *netdev = pci_get_drvdata(pdev);
  3861. struct e1000_adapter *adapter = netdev_priv(netdev);
  3862. uint32_t ctrl, ctrl_ext, rctl, manc, status;
  3863. uint32_t wufc = adapter->wol;
  3864. #ifdef CONFIG_PM
  3865. int retval = 0;
  3866. #endif
  3867. netif_device_detach(netdev);
  3868. if (netif_running(netdev)) {
  3869. WARN_ON(test_bit(__E1000_RESETTING, &adapter->flags));
  3870. e1000_down(adapter);
  3871. }
  3872. #ifdef CONFIG_PM
  3873. /* Implement our own version of pci_save_state(pdev) because pci-
  3874. * express adapters have 256-byte config spaces. */
  3875. retval = e1000_pci_save_state(adapter);
  3876. if (retval)
  3877. return retval;
  3878. #endif
  3879. status = E1000_READ_REG(&adapter->hw, STATUS);
  3880. if (status & E1000_STATUS_LU)
  3881. wufc &= ~E1000_WUFC_LNKC;
  3882. if (wufc) {
  3883. e1000_setup_rctl(adapter);
  3884. e1000_set_multi(netdev);
  3885. /* turn on all-multi mode if wake on multicast is enabled */
  3886. if (adapter->wol & E1000_WUFC_MC) {
  3887. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3888. rctl |= E1000_RCTL_MPE;
  3889. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3890. }
  3891. if (adapter->hw.mac_type >= e1000_82540) {
  3892. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3893. /* advertise wake from D3Cold */
  3894. #define E1000_CTRL_ADVD3WUC 0x00100000
  3895. /* phy power management enable */
  3896. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  3897. ctrl |= E1000_CTRL_ADVD3WUC |
  3898. E1000_CTRL_EN_PHY_PWR_MGMT;
  3899. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3900. }
  3901. if (adapter->hw.media_type == e1000_media_type_fiber ||
  3902. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  3903. /* keep the laser running in D3 */
  3904. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3905. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  3906. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  3907. }
  3908. /* Allow time for pending master requests to run */
  3909. e1000_disable_pciex_master(&adapter->hw);
  3910. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  3911. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  3912. pci_enable_wake(pdev, PCI_D3hot, 1);
  3913. pci_enable_wake(pdev, PCI_D3cold, 1);
  3914. } else {
  3915. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  3916. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  3917. pci_enable_wake(pdev, PCI_D3hot, 0);
  3918. pci_enable_wake(pdev, PCI_D3cold, 0);
  3919. }
  3920. if (adapter->hw.mac_type >= e1000_82540 &&
  3921. adapter->hw.media_type == e1000_media_type_copper) {
  3922. manc = E1000_READ_REG(&adapter->hw, MANC);
  3923. if (manc & E1000_MANC_SMBUS_EN) {
  3924. manc |= E1000_MANC_ARP_EN;
  3925. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3926. pci_enable_wake(pdev, PCI_D3hot, 1);
  3927. pci_enable_wake(pdev, PCI_D3cold, 1);
  3928. }
  3929. }
  3930. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  3931. * would have already happened in close and is redundant. */
  3932. e1000_release_hw_control(adapter);
  3933. pci_disable_device(pdev);
  3934. pci_set_power_state(pdev, pci_choose_state(pdev, state));
  3935. return 0;
  3936. }
  3937. #ifdef CONFIG_PM
  3938. static int
  3939. e1000_resume(struct pci_dev *pdev)
  3940. {
  3941. struct net_device *netdev = pci_get_drvdata(pdev);
  3942. struct e1000_adapter *adapter = netdev_priv(netdev);
  3943. uint32_t manc, ret_val;
  3944. pci_set_power_state(pdev, PCI_D0);
  3945. e1000_pci_restore_state(adapter);
  3946. ret_val = pci_enable_device(pdev);
  3947. pci_set_master(pdev);
  3948. pci_enable_wake(pdev, PCI_D3hot, 0);
  3949. pci_enable_wake(pdev, PCI_D3cold, 0);
  3950. e1000_reset(adapter);
  3951. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  3952. if (netif_running(netdev))
  3953. e1000_up(adapter);
  3954. netif_device_attach(netdev);
  3955. if (adapter->hw.mac_type >= e1000_82540 &&
  3956. adapter->hw.media_type == e1000_media_type_copper) {
  3957. manc = E1000_READ_REG(&adapter->hw, MANC);
  3958. manc &= ~(E1000_MANC_ARP_EN);
  3959. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3960. }
  3961. /* If the controller is 82573 and f/w is AMT, do not set
  3962. * DRV_LOAD until the interface is up. For all other cases,
  3963. * let the f/w know that the h/w is now under the control
  3964. * of the driver. */
  3965. if (adapter->hw.mac_type != e1000_82573 ||
  3966. !e1000_check_mng_mode(&adapter->hw))
  3967. e1000_get_hw_control(adapter);
  3968. return 0;
  3969. }
  3970. #endif
  3971. static void e1000_shutdown(struct pci_dev *pdev)
  3972. {
  3973. e1000_suspend(pdev, PMSG_SUSPEND);
  3974. }
  3975. #ifdef CONFIG_NET_POLL_CONTROLLER
  3976. /*
  3977. * Polling 'interrupt' - used by things like netconsole to send skbs
  3978. * without having to re-enable interrupts. It's not called while
  3979. * the interrupt routine is executing.
  3980. */
  3981. static void
  3982. e1000_netpoll(struct net_device *netdev)
  3983. {
  3984. struct e1000_adapter *adapter = netdev_priv(netdev);
  3985. disable_irq(adapter->pdev->irq);
  3986. e1000_intr(adapter->pdev->irq, netdev, NULL);
  3987. e1000_clean_tx_irq(adapter, adapter->tx_ring);
  3988. #ifndef CONFIG_E1000_NAPI
  3989. adapter->clean_rx(adapter, adapter->rx_ring);
  3990. #endif
  3991. enable_irq(adapter->pdev->irq);
  3992. }
  3993. #endif
  3994. /**
  3995. * e1000_io_error_detected - called when PCI error is detected
  3996. * @pdev: Pointer to PCI device
  3997. * @state: The current pci conneection state
  3998. *
  3999. * This function is called after a PCI bus error affecting
  4000. * this device has been detected.
  4001. */
  4002. static pci_ers_result_t e1000_io_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
  4003. {
  4004. struct net_device *netdev = pci_get_drvdata(pdev);
  4005. struct e1000_adapter *adapter = netdev->priv;
  4006. netif_device_detach(netdev);
  4007. if (netif_running(netdev))
  4008. e1000_down(adapter);
  4009. /* Request a slot slot reset. */
  4010. return PCI_ERS_RESULT_NEED_RESET;
  4011. }
  4012. /**
  4013. * e1000_io_slot_reset - called after the pci bus has been reset.
  4014. * @pdev: Pointer to PCI device
  4015. *
  4016. * Restart the card from scratch, as if from a cold-boot. Implementation
  4017. * resembles the first-half of the e1000_resume routine.
  4018. */
  4019. static pci_ers_result_t e1000_io_slot_reset(struct pci_dev *pdev)
  4020. {
  4021. struct net_device *netdev = pci_get_drvdata(pdev);
  4022. struct e1000_adapter *adapter = netdev->priv;
  4023. if (pci_enable_device(pdev)) {
  4024. printk(KERN_ERR "e1000: Cannot re-enable PCI device after reset.\n");
  4025. return PCI_ERS_RESULT_DISCONNECT;
  4026. }
  4027. pci_set_master(pdev);
  4028. pci_enable_wake(pdev, 3, 0);
  4029. pci_enable_wake(pdev, 4, 0); /* 4 == D3 cold */
  4030. /* Perform card reset only on one instance of the card */
  4031. if (PCI_FUNC (pdev->devfn) != 0)
  4032. return PCI_ERS_RESULT_RECOVERED;
  4033. e1000_reset(adapter);
  4034. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  4035. return PCI_ERS_RESULT_RECOVERED;
  4036. }
  4037. /**
  4038. * e1000_io_resume - called when traffic can start flowing again.
  4039. * @pdev: Pointer to PCI device
  4040. *
  4041. * This callback is called when the error recovery driver tells us that
  4042. * its OK to resume normal operation. Implementation resembles the
  4043. * second-half of the e1000_resume routine.
  4044. */
  4045. static void e1000_io_resume(struct pci_dev *pdev)
  4046. {
  4047. struct net_device *netdev = pci_get_drvdata(pdev);
  4048. struct e1000_adapter *adapter = netdev->priv;
  4049. uint32_t manc, swsm;
  4050. if (netif_running(netdev)) {
  4051. if (e1000_up(adapter)) {
  4052. printk("e1000: can't bring device back up after reset\n");
  4053. return;
  4054. }
  4055. }
  4056. netif_device_attach(netdev);
  4057. if (adapter->hw.mac_type >= e1000_82540 &&
  4058. adapter->hw.media_type == e1000_media_type_copper) {
  4059. manc = E1000_READ_REG(&adapter->hw, MANC);
  4060. manc &= ~(E1000_MANC_ARP_EN);
  4061. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  4062. }
  4063. switch (adapter->hw.mac_type) {
  4064. case e1000_82573:
  4065. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  4066. E1000_WRITE_REG(&adapter->hw, SWSM,
  4067. swsm | E1000_SWSM_DRV_LOAD);
  4068. break;
  4069. default:
  4070. break;
  4071. }
  4072. if (netif_running(netdev))
  4073. mod_timer(&adapter->watchdog_timer, jiffies);
  4074. }
  4075. /* e1000_main.c */