time.c 46 KB

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  1. /*
  2. * arch/s390/kernel/time.c
  3. * Time of day based timer functions.
  4. *
  5. * S390 version
  6. * Copyright IBM Corp. 1999, 2008
  7. * Author(s): Hartmut Penner (hp@de.ibm.com),
  8. * Martin Schwidefsky (schwidefsky@de.ibm.com),
  9. * Denis Joseph Barrow (djbarrow@de.ibm.com,barrow_dj@yahoo.com)
  10. *
  11. * Derived from "arch/i386/kernel/time.c"
  12. * Copyright (C) 1991, 1992, 1995 Linus Torvalds
  13. */
  14. #define KMSG_COMPONENT "time"
  15. #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
  16. #include <linux/errno.h>
  17. #include <linux/module.h>
  18. #include <linux/sched.h>
  19. #include <linux/kernel.h>
  20. #include <linux/param.h>
  21. #include <linux/string.h>
  22. #include <linux/mm.h>
  23. #include <linux/interrupt.h>
  24. #include <linux/cpu.h>
  25. #include <linux/stop_machine.h>
  26. #include <linux/time.h>
  27. #include <linux/sysdev.h>
  28. #include <linux/delay.h>
  29. #include <linux/init.h>
  30. #include <linux/smp.h>
  31. #include <linux/types.h>
  32. #include <linux/profile.h>
  33. #include <linux/timex.h>
  34. #include <linux/notifier.h>
  35. #include <linux/clocksource.h>
  36. #include <linux/clockchips.h>
  37. #include <linux/gfp.h>
  38. #include <linux/kprobes.h>
  39. #include <asm/uaccess.h>
  40. #include <asm/delay.h>
  41. #include <asm/s390_ext.h>
  42. #include <asm/div64.h>
  43. #include <asm/vdso.h>
  44. #include <asm/irq.h>
  45. #include <asm/irq_regs.h>
  46. #include <asm/timer.h>
  47. #include <asm/etr.h>
  48. #include <asm/cio.h>
  49. /* change this if you have some constant time drift */
  50. #define USECS_PER_JIFFY ((unsigned long) 1000000/HZ)
  51. #define CLK_TICKS_PER_JIFFY ((unsigned long) USECS_PER_JIFFY << 12)
  52. u64 sched_clock_base_cc = -1; /* Force to data section. */
  53. EXPORT_SYMBOL_GPL(sched_clock_base_cc);
  54. static DEFINE_PER_CPU(struct clock_event_device, comparators);
  55. /*
  56. * Scheduler clock - returns current time in nanosec units.
  57. */
  58. unsigned long long notrace __kprobes sched_clock(void)
  59. {
  60. return (get_clock_monotonic() * 125) >> 9;
  61. }
  62. /*
  63. * Monotonic_clock - returns # of nanoseconds passed since time_init()
  64. */
  65. unsigned long long monotonic_clock(void)
  66. {
  67. return sched_clock();
  68. }
  69. EXPORT_SYMBOL(monotonic_clock);
  70. void tod_to_timeval(__u64 todval, struct timespec *xt)
  71. {
  72. unsigned long long sec;
  73. sec = todval >> 12;
  74. do_div(sec, 1000000);
  75. xt->tv_sec = sec;
  76. todval -= (sec * 1000000) << 12;
  77. xt->tv_nsec = ((todval * 1000) >> 12);
  78. }
  79. EXPORT_SYMBOL(tod_to_timeval);
  80. void clock_comparator_work(void)
  81. {
  82. struct clock_event_device *cd;
  83. S390_lowcore.clock_comparator = -1ULL;
  84. set_clock_comparator(S390_lowcore.clock_comparator);
  85. cd = &__get_cpu_var(comparators);
  86. cd->event_handler(cd);
  87. }
  88. /*
  89. * Fixup the clock comparator.
  90. */
  91. static void fixup_clock_comparator(unsigned long long delta)
  92. {
  93. /* If nobody is waiting there's nothing to fix. */
  94. if (S390_lowcore.clock_comparator == -1ULL)
  95. return;
  96. S390_lowcore.clock_comparator += delta;
  97. set_clock_comparator(S390_lowcore.clock_comparator);
  98. }
  99. static int s390_next_event(unsigned long delta,
  100. struct clock_event_device *evt)
  101. {
  102. S390_lowcore.clock_comparator = get_clock() + delta;
  103. set_clock_comparator(S390_lowcore.clock_comparator);
  104. return 0;
  105. }
  106. static void s390_set_mode(enum clock_event_mode mode,
  107. struct clock_event_device *evt)
  108. {
  109. }
  110. /*
  111. * Set up lowcore and control register of the current cpu to
  112. * enable TOD clock and clock comparator interrupts.
  113. */
  114. void init_cpu_timer(void)
  115. {
  116. struct clock_event_device *cd;
  117. int cpu;
  118. S390_lowcore.clock_comparator = -1ULL;
  119. set_clock_comparator(S390_lowcore.clock_comparator);
  120. cpu = smp_processor_id();
  121. cd = &per_cpu(comparators, cpu);
  122. cd->name = "comparator";
  123. cd->features = CLOCK_EVT_FEAT_ONESHOT;
  124. cd->mult = 16777;
  125. cd->shift = 12;
  126. cd->min_delta_ns = 1;
  127. cd->max_delta_ns = LONG_MAX;
  128. cd->rating = 400;
  129. cd->cpumask = cpumask_of(cpu);
  130. cd->set_next_event = s390_next_event;
  131. cd->set_mode = s390_set_mode;
  132. clockevents_register_device(cd);
  133. /* Enable clock comparator timer interrupt. */
  134. __ctl_set_bit(0,11);
  135. /* Always allow the timing alert external interrupt. */
  136. __ctl_set_bit(0, 4);
  137. }
  138. static void clock_comparator_interrupt(unsigned int ext_int_code,
  139. unsigned int param32,
  140. unsigned long param64)
  141. {
  142. if (S390_lowcore.clock_comparator == -1ULL)
  143. set_clock_comparator(S390_lowcore.clock_comparator);
  144. }
  145. static void etr_timing_alert(struct etr_irq_parm *);
  146. static void stp_timing_alert(struct stp_irq_parm *);
  147. static void timing_alert_interrupt(unsigned int ext_int_code,
  148. unsigned int param32, unsigned long param64)
  149. {
  150. if (param32 & 0x00c40000)
  151. etr_timing_alert((struct etr_irq_parm *) &param32);
  152. if (param32 & 0x00038000)
  153. stp_timing_alert((struct stp_irq_parm *) &param32);
  154. }
  155. static void etr_reset(void);
  156. static void stp_reset(void);
  157. void read_persistent_clock(struct timespec *ts)
  158. {
  159. tod_to_timeval(get_clock() - TOD_UNIX_EPOCH, ts);
  160. }
  161. void read_boot_clock(struct timespec *ts)
  162. {
  163. tod_to_timeval(sched_clock_base_cc - TOD_UNIX_EPOCH, ts);
  164. }
  165. static cycle_t read_tod_clock(struct clocksource *cs)
  166. {
  167. return get_clock();
  168. }
  169. static struct clocksource clocksource_tod = {
  170. .name = "tod",
  171. .rating = 400,
  172. .read = read_tod_clock,
  173. .mask = -1ULL,
  174. .mult = 1000,
  175. .shift = 12,
  176. .flags = CLOCK_SOURCE_IS_CONTINUOUS,
  177. };
  178. struct clocksource * __init clocksource_default_clock(void)
  179. {
  180. return &clocksource_tod;
  181. }
  182. void update_vsyscall(struct timespec *wall_time, struct timespec *wtm,
  183. struct clocksource *clock, u32 mult)
  184. {
  185. if (clock != &clocksource_tod)
  186. return;
  187. /* Make userspace gettimeofday spin until we're done. */
  188. ++vdso_data->tb_update_count;
  189. smp_wmb();
  190. vdso_data->xtime_tod_stamp = clock->cycle_last;
  191. vdso_data->xtime_clock_sec = wall_time->tv_sec;
  192. vdso_data->xtime_clock_nsec = wall_time->tv_nsec;
  193. vdso_data->wtom_clock_sec = wtm->tv_sec;
  194. vdso_data->wtom_clock_nsec = wtm->tv_nsec;
  195. vdso_data->ntp_mult = mult;
  196. smp_wmb();
  197. ++vdso_data->tb_update_count;
  198. }
  199. extern struct timezone sys_tz;
  200. void update_vsyscall_tz(void)
  201. {
  202. /* Make userspace gettimeofday spin until we're done. */
  203. ++vdso_data->tb_update_count;
  204. smp_wmb();
  205. vdso_data->tz_minuteswest = sys_tz.tz_minuteswest;
  206. vdso_data->tz_dsttime = sys_tz.tz_dsttime;
  207. smp_wmb();
  208. ++vdso_data->tb_update_count;
  209. }
  210. /*
  211. * Initialize the TOD clock and the CPU timer of
  212. * the boot cpu.
  213. */
  214. void __init time_init(void)
  215. {
  216. /* Reset time synchronization interfaces. */
  217. etr_reset();
  218. stp_reset();
  219. /* request the clock comparator external interrupt */
  220. if (register_external_interrupt(0x1004, clock_comparator_interrupt))
  221. panic("Couldn't request external interrupt 0x1004");
  222. /* request the timing alert external interrupt */
  223. if (register_external_interrupt(0x1406, timing_alert_interrupt))
  224. panic("Couldn't request external interrupt 0x1406");
  225. if (clocksource_register(&clocksource_tod) != 0)
  226. panic("Could not register TOD clock source");
  227. /* Enable TOD clock interrupts on the boot cpu. */
  228. init_cpu_timer();
  229. /* Enable cpu timer interrupts on the boot cpu. */
  230. vtime_init();
  231. }
  232. /*
  233. * The time is "clock". old is what we think the time is.
  234. * Adjust the value by a multiple of jiffies and add the delta to ntp.
  235. * "delay" is an approximation how long the synchronization took. If
  236. * the time correction is positive, then "delay" is subtracted from
  237. * the time difference and only the remaining part is passed to ntp.
  238. */
  239. static unsigned long long adjust_time(unsigned long long old,
  240. unsigned long long clock,
  241. unsigned long long delay)
  242. {
  243. unsigned long long delta, ticks;
  244. struct timex adjust;
  245. if (clock > old) {
  246. /* It is later than we thought. */
  247. delta = ticks = clock - old;
  248. delta = ticks = (delta < delay) ? 0 : delta - delay;
  249. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  250. adjust.offset = ticks * (1000000 / HZ);
  251. } else {
  252. /* It is earlier than we thought. */
  253. delta = ticks = old - clock;
  254. delta -= do_div(ticks, CLK_TICKS_PER_JIFFY);
  255. delta = -delta;
  256. adjust.offset = -ticks * (1000000 / HZ);
  257. }
  258. sched_clock_base_cc += delta;
  259. if (adjust.offset != 0) {
  260. pr_notice("The ETR interface has adjusted the clock "
  261. "by %li microseconds\n", adjust.offset);
  262. adjust.modes = ADJ_OFFSET_SINGLESHOT;
  263. do_adjtimex(&adjust);
  264. }
  265. return delta;
  266. }
  267. static DEFINE_PER_CPU(atomic_t, clock_sync_word);
  268. static DEFINE_MUTEX(clock_sync_mutex);
  269. static unsigned long clock_sync_flags;
  270. #define CLOCK_SYNC_HAS_ETR 0
  271. #define CLOCK_SYNC_HAS_STP 1
  272. #define CLOCK_SYNC_ETR 2
  273. #define CLOCK_SYNC_STP 3
  274. /*
  275. * The synchronous get_clock function. It will write the current clock
  276. * value to the clock pointer and return 0 if the clock is in sync with
  277. * the external time source. If the clock mode is local it will return
  278. * -ENOSYS and -EAGAIN if the clock is not in sync with the external
  279. * reference.
  280. */
  281. int get_sync_clock(unsigned long long *clock)
  282. {
  283. atomic_t *sw_ptr;
  284. unsigned int sw0, sw1;
  285. sw_ptr = &get_cpu_var(clock_sync_word);
  286. sw0 = atomic_read(sw_ptr);
  287. *clock = get_clock();
  288. sw1 = atomic_read(sw_ptr);
  289. put_cpu_var(clock_sync_word);
  290. if (sw0 == sw1 && (sw0 & 0x80000000U))
  291. /* Success: time is in sync. */
  292. return 0;
  293. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags) &&
  294. !test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  295. return -ENOSYS;
  296. if (!test_bit(CLOCK_SYNC_ETR, &clock_sync_flags) &&
  297. !test_bit(CLOCK_SYNC_STP, &clock_sync_flags))
  298. return -EACCES;
  299. return -EAGAIN;
  300. }
  301. EXPORT_SYMBOL(get_sync_clock);
  302. /*
  303. * Make get_sync_clock return -EAGAIN.
  304. */
  305. static void disable_sync_clock(void *dummy)
  306. {
  307. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  308. /*
  309. * Clear the in-sync bit 2^31. All get_sync_clock calls will
  310. * fail until the sync bit is turned back on. In addition
  311. * increase the "sequence" counter to avoid the race of an
  312. * etr event and the complete recovery against get_sync_clock.
  313. */
  314. atomic_clear_mask(0x80000000, sw_ptr);
  315. atomic_inc(sw_ptr);
  316. }
  317. /*
  318. * Make get_sync_clock return 0 again.
  319. * Needs to be called from a context disabled for preemption.
  320. */
  321. static void enable_sync_clock(void)
  322. {
  323. atomic_t *sw_ptr = &__get_cpu_var(clock_sync_word);
  324. atomic_set_mask(0x80000000, sw_ptr);
  325. }
  326. /*
  327. * Function to check if the clock is in sync.
  328. */
  329. static inline int check_sync_clock(void)
  330. {
  331. atomic_t *sw_ptr;
  332. int rc;
  333. sw_ptr = &get_cpu_var(clock_sync_word);
  334. rc = (atomic_read(sw_ptr) & 0x80000000U) != 0;
  335. put_cpu_var(clock_sync_word);
  336. return rc;
  337. }
  338. /* Single threaded workqueue used for etr and stp sync events */
  339. static struct workqueue_struct *time_sync_wq;
  340. static void __init time_init_wq(void)
  341. {
  342. if (time_sync_wq)
  343. return;
  344. time_sync_wq = create_singlethread_workqueue("timesync");
  345. }
  346. /*
  347. * External Time Reference (ETR) code.
  348. */
  349. static int etr_port0_online;
  350. static int etr_port1_online;
  351. static int etr_steai_available;
  352. static int __init early_parse_etr(char *p)
  353. {
  354. if (strncmp(p, "off", 3) == 0)
  355. etr_port0_online = etr_port1_online = 0;
  356. else if (strncmp(p, "port0", 5) == 0)
  357. etr_port0_online = 1;
  358. else if (strncmp(p, "port1", 5) == 0)
  359. etr_port1_online = 1;
  360. else if (strncmp(p, "on", 2) == 0)
  361. etr_port0_online = etr_port1_online = 1;
  362. return 0;
  363. }
  364. early_param("etr", early_parse_etr);
  365. enum etr_event {
  366. ETR_EVENT_PORT0_CHANGE,
  367. ETR_EVENT_PORT1_CHANGE,
  368. ETR_EVENT_PORT_ALERT,
  369. ETR_EVENT_SYNC_CHECK,
  370. ETR_EVENT_SWITCH_LOCAL,
  371. ETR_EVENT_UPDATE,
  372. };
  373. /*
  374. * Valid bit combinations of the eacr register are (x = don't care):
  375. * e0 e1 dp p0 p1 ea es sl
  376. * 0 0 x 0 0 0 0 0 initial, disabled state
  377. * 0 0 x 0 1 1 0 0 port 1 online
  378. * 0 0 x 1 0 1 0 0 port 0 online
  379. * 0 0 x 1 1 1 0 0 both ports online
  380. * 0 1 x 0 1 1 0 0 port 1 online and usable, ETR or PPS mode
  381. * 0 1 x 0 1 1 0 1 port 1 online, usable and ETR mode
  382. * 0 1 x 0 1 1 1 0 port 1 online, usable, PPS mode, in-sync
  383. * 0 1 x 0 1 1 1 1 port 1 online, usable, ETR mode, in-sync
  384. * 0 1 x 1 1 1 0 0 both ports online, port 1 usable
  385. * 0 1 x 1 1 1 1 0 both ports online, port 1 usable, PPS mode, in-sync
  386. * 0 1 x 1 1 1 1 1 both ports online, port 1 usable, ETR mode, in-sync
  387. * 1 0 x 1 0 1 0 0 port 0 online and usable, ETR or PPS mode
  388. * 1 0 x 1 0 1 0 1 port 0 online, usable and ETR mode
  389. * 1 0 x 1 0 1 1 0 port 0 online, usable, PPS mode, in-sync
  390. * 1 0 x 1 0 1 1 1 port 0 online, usable, ETR mode, in-sync
  391. * 1 0 x 1 1 1 0 0 both ports online, port 0 usable
  392. * 1 0 x 1 1 1 1 0 both ports online, port 0 usable, PPS mode, in-sync
  393. * 1 0 x 1 1 1 1 1 both ports online, port 0 usable, ETR mode, in-sync
  394. * 1 1 x 1 1 1 1 0 both ports online & usable, ETR, in-sync
  395. * 1 1 x 1 1 1 1 1 both ports online & usable, ETR, in-sync
  396. */
  397. static struct etr_eacr etr_eacr;
  398. static u64 etr_tolec; /* time of last eacr update */
  399. static struct etr_aib etr_port0;
  400. static int etr_port0_uptodate;
  401. static struct etr_aib etr_port1;
  402. static int etr_port1_uptodate;
  403. static unsigned long etr_events;
  404. static struct timer_list etr_timer;
  405. static void etr_timeout(unsigned long dummy);
  406. static void etr_work_fn(struct work_struct *work);
  407. static DEFINE_MUTEX(etr_work_mutex);
  408. static DECLARE_WORK(etr_work, etr_work_fn);
  409. /*
  410. * Reset ETR attachment.
  411. */
  412. static void etr_reset(void)
  413. {
  414. etr_eacr = (struct etr_eacr) {
  415. .e0 = 0, .e1 = 0, ._pad0 = 4, .dp = 0,
  416. .p0 = 0, .p1 = 0, ._pad1 = 0, .ea = 0,
  417. .es = 0, .sl = 0 };
  418. if (etr_setr(&etr_eacr) == 0) {
  419. etr_tolec = get_clock();
  420. set_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags);
  421. if (etr_port0_online && etr_port1_online)
  422. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  423. } else if (etr_port0_online || etr_port1_online) {
  424. pr_warning("The real or virtual hardware system does "
  425. "not provide an ETR interface\n");
  426. etr_port0_online = etr_port1_online = 0;
  427. }
  428. }
  429. static int __init etr_init(void)
  430. {
  431. struct etr_aib aib;
  432. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  433. return 0;
  434. time_init_wq();
  435. /* Check if this machine has the steai instruction. */
  436. if (etr_steai(&aib, ETR_STEAI_STEPPING_PORT) == 0)
  437. etr_steai_available = 1;
  438. setup_timer(&etr_timer, etr_timeout, 0UL);
  439. if (etr_port0_online) {
  440. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  441. queue_work(time_sync_wq, &etr_work);
  442. }
  443. if (etr_port1_online) {
  444. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  445. queue_work(time_sync_wq, &etr_work);
  446. }
  447. return 0;
  448. }
  449. arch_initcall(etr_init);
  450. /*
  451. * Two sorts of ETR machine checks. The architecture reads:
  452. * "When a machine-check niterruption occurs and if a switch-to-local or
  453. * ETR-sync-check interrupt request is pending but disabled, this pending
  454. * disabled interruption request is indicated and is cleared".
  455. * Which means that we can get etr_switch_to_local events from the machine
  456. * check handler although the interruption condition is disabled. Lovely..
  457. */
  458. /*
  459. * Switch to local machine check. This is called when the last usable
  460. * ETR port goes inactive. After switch to local the clock is not in sync.
  461. */
  462. void etr_switch_to_local(void)
  463. {
  464. if (!etr_eacr.sl)
  465. return;
  466. disable_sync_clock(NULL);
  467. if (!test_and_set_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events)) {
  468. etr_eacr.es = etr_eacr.sl = 0;
  469. etr_setr(&etr_eacr);
  470. queue_work(time_sync_wq, &etr_work);
  471. }
  472. }
  473. /*
  474. * ETR sync check machine check. This is called when the ETR OTE and the
  475. * local clock OTE are farther apart than the ETR sync check tolerance.
  476. * After a ETR sync check the clock is not in sync. The machine check
  477. * is broadcasted to all cpus at the same time.
  478. */
  479. void etr_sync_check(void)
  480. {
  481. if (!etr_eacr.es)
  482. return;
  483. disable_sync_clock(NULL);
  484. if (!test_and_set_bit(ETR_EVENT_SYNC_CHECK, &etr_events)) {
  485. etr_eacr.es = 0;
  486. etr_setr(&etr_eacr);
  487. queue_work(time_sync_wq, &etr_work);
  488. }
  489. }
  490. /*
  491. * ETR timing alert. There are two causes:
  492. * 1) port state change, check the usability of the port
  493. * 2) port alert, one of the ETR-data-validity bits (v1-v2 bits of the
  494. * sldr-status word) or ETR-data word 1 (edf1) or ETR-data word 3 (edf3)
  495. * or ETR-data word 4 (edf4) has changed.
  496. */
  497. static void etr_timing_alert(struct etr_irq_parm *intparm)
  498. {
  499. if (intparm->pc0)
  500. /* ETR port 0 state change. */
  501. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  502. if (intparm->pc1)
  503. /* ETR port 1 state change. */
  504. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  505. if (intparm->eai)
  506. /*
  507. * ETR port alert on either port 0, 1 or both.
  508. * Both ports are not up-to-date now.
  509. */
  510. set_bit(ETR_EVENT_PORT_ALERT, &etr_events);
  511. queue_work(time_sync_wq, &etr_work);
  512. }
  513. static void etr_timeout(unsigned long dummy)
  514. {
  515. set_bit(ETR_EVENT_UPDATE, &etr_events);
  516. queue_work(time_sync_wq, &etr_work);
  517. }
  518. /*
  519. * Check if the etr mode is pss.
  520. */
  521. static inline int etr_mode_is_pps(struct etr_eacr eacr)
  522. {
  523. return eacr.es && !eacr.sl;
  524. }
  525. /*
  526. * Check if the etr mode is etr.
  527. */
  528. static inline int etr_mode_is_etr(struct etr_eacr eacr)
  529. {
  530. return eacr.es && eacr.sl;
  531. }
  532. /*
  533. * Check if the port can be used for TOD synchronization.
  534. * For PPS mode the port has to receive OTEs. For ETR mode
  535. * the port has to receive OTEs, the ETR stepping bit has to
  536. * be zero and the validity bits for data frame 1, 2, and 3
  537. * have to be 1.
  538. */
  539. static int etr_port_valid(struct etr_aib *aib, int port)
  540. {
  541. unsigned int psc;
  542. /* Check that this port is receiving OTEs. */
  543. if (aib->tsp == 0)
  544. return 0;
  545. psc = port ? aib->esw.psc1 : aib->esw.psc0;
  546. if (psc == etr_lpsc_pps_mode)
  547. return 1;
  548. if (psc == etr_lpsc_operational_step)
  549. return !aib->esw.y && aib->slsw.v1 &&
  550. aib->slsw.v2 && aib->slsw.v3;
  551. return 0;
  552. }
  553. /*
  554. * Check if two ports are on the same network.
  555. */
  556. static int etr_compare_network(struct etr_aib *aib1, struct etr_aib *aib2)
  557. {
  558. // FIXME: any other fields we have to compare?
  559. return aib1->edf1.net_id == aib2->edf1.net_id;
  560. }
  561. /*
  562. * Wrapper for etr_stei that converts physical port states
  563. * to logical port states to be consistent with the output
  564. * of stetr (see etr_psc vs. etr_lpsc).
  565. */
  566. static void etr_steai_cv(struct etr_aib *aib, unsigned int func)
  567. {
  568. BUG_ON(etr_steai(aib, func) != 0);
  569. /* Convert port state to logical port state. */
  570. if (aib->esw.psc0 == 1)
  571. aib->esw.psc0 = 2;
  572. else if (aib->esw.psc0 == 0 && aib->esw.p == 0)
  573. aib->esw.psc0 = 1;
  574. if (aib->esw.psc1 == 1)
  575. aib->esw.psc1 = 2;
  576. else if (aib->esw.psc1 == 0 && aib->esw.p == 1)
  577. aib->esw.psc1 = 1;
  578. }
  579. /*
  580. * Check if the aib a2 is still connected to the same attachment as
  581. * aib a1, the etv values differ by one and a2 is valid.
  582. */
  583. static int etr_aib_follows(struct etr_aib *a1, struct etr_aib *a2, int p)
  584. {
  585. int state_a1, state_a2;
  586. /* Paranoia check: e0/e1 should better be the same. */
  587. if (a1->esw.eacr.e0 != a2->esw.eacr.e0 ||
  588. a1->esw.eacr.e1 != a2->esw.eacr.e1)
  589. return 0;
  590. /* Still connected to the same etr ? */
  591. state_a1 = p ? a1->esw.psc1 : a1->esw.psc0;
  592. state_a2 = p ? a2->esw.psc1 : a2->esw.psc0;
  593. if (state_a1 == etr_lpsc_operational_step) {
  594. if (state_a2 != etr_lpsc_operational_step ||
  595. a1->edf1.net_id != a2->edf1.net_id ||
  596. a1->edf1.etr_id != a2->edf1.etr_id ||
  597. a1->edf1.etr_pn != a2->edf1.etr_pn)
  598. return 0;
  599. } else if (state_a2 != etr_lpsc_pps_mode)
  600. return 0;
  601. /* The ETV value of a2 needs to be ETV of a1 + 1. */
  602. if (a1->edf2.etv + 1 != a2->edf2.etv)
  603. return 0;
  604. if (!etr_port_valid(a2, p))
  605. return 0;
  606. return 1;
  607. }
  608. struct clock_sync_data {
  609. atomic_t cpus;
  610. int in_sync;
  611. unsigned long long fixup_cc;
  612. int etr_port;
  613. struct etr_aib *etr_aib;
  614. };
  615. static void clock_sync_cpu(struct clock_sync_data *sync)
  616. {
  617. atomic_dec(&sync->cpus);
  618. enable_sync_clock();
  619. /*
  620. * This looks like a busy wait loop but it isn't. etr_sync_cpus
  621. * is called on all other cpus while the TOD clocks is stopped.
  622. * __udelay will stop the cpu on an enabled wait psw until the
  623. * TOD is running again.
  624. */
  625. while (sync->in_sync == 0) {
  626. __udelay(1);
  627. /*
  628. * A different cpu changes *in_sync. Therefore use
  629. * barrier() to force memory access.
  630. */
  631. barrier();
  632. }
  633. if (sync->in_sync != 1)
  634. /* Didn't work. Clear per-cpu in sync bit again. */
  635. disable_sync_clock(NULL);
  636. /*
  637. * This round of TOD syncing is done. Set the clock comparator
  638. * to the next tick and let the processor continue.
  639. */
  640. fixup_clock_comparator(sync->fixup_cc);
  641. }
  642. /*
  643. * Sync the TOD clock using the port refered to by aibp. This port
  644. * has to be enabled and the other port has to be disabled. The
  645. * last eacr update has to be more than 1.6 seconds in the past.
  646. */
  647. static int etr_sync_clock(void *data)
  648. {
  649. static int first;
  650. unsigned long long clock, old_clock, delay, delta;
  651. struct clock_sync_data *etr_sync;
  652. struct etr_aib *sync_port, *aib;
  653. int port;
  654. int rc;
  655. etr_sync = data;
  656. if (xchg(&first, 1) == 1) {
  657. /* Slave */
  658. clock_sync_cpu(etr_sync);
  659. return 0;
  660. }
  661. /* Wait until all other cpus entered the sync function. */
  662. while (atomic_read(&etr_sync->cpus) != 0)
  663. cpu_relax();
  664. port = etr_sync->etr_port;
  665. aib = etr_sync->etr_aib;
  666. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  667. enable_sync_clock();
  668. /* Set clock to next OTE. */
  669. __ctl_set_bit(14, 21);
  670. __ctl_set_bit(0, 29);
  671. clock = ((unsigned long long) (aib->edf2.etv + 1)) << 32;
  672. old_clock = get_clock();
  673. if (set_clock(clock) == 0) {
  674. __udelay(1); /* Wait for the clock to start. */
  675. __ctl_clear_bit(0, 29);
  676. __ctl_clear_bit(14, 21);
  677. etr_stetr(aib);
  678. /* Adjust Linux timing variables. */
  679. delay = (unsigned long long)
  680. (aib->edf2.etv - sync_port->edf2.etv) << 32;
  681. delta = adjust_time(old_clock, clock, delay);
  682. etr_sync->fixup_cc = delta;
  683. fixup_clock_comparator(delta);
  684. /* Verify that the clock is properly set. */
  685. if (!etr_aib_follows(sync_port, aib, port)) {
  686. /* Didn't work. */
  687. disable_sync_clock(NULL);
  688. etr_sync->in_sync = -EAGAIN;
  689. rc = -EAGAIN;
  690. } else {
  691. etr_sync->in_sync = 1;
  692. rc = 0;
  693. }
  694. } else {
  695. /* Could not set the clock ?!? */
  696. __ctl_clear_bit(0, 29);
  697. __ctl_clear_bit(14, 21);
  698. disable_sync_clock(NULL);
  699. etr_sync->in_sync = -EAGAIN;
  700. rc = -EAGAIN;
  701. }
  702. xchg(&first, 0);
  703. return rc;
  704. }
  705. static int etr_sync_clock_stop(struct etr_aib *aib, int port)
  706. {
  707. struct clock_sync_data etr_sync;
  708. struct etr_aib *sync_port;
  709. int follows;
  710. int rc;
  711. /* Check if the current aib is adjacent to the sync port aib. */
  712. sync_port = (port == 0) ? &etr_port0 : &etr_port1;
  713. follows = etr_aib_follows(sync_port, aib, port);
  714. memcpy(sync_port, aib, sizeof(*aib));
  715. if (!follows)
  716. return -EAGAIN;
  717. memset(&etr_sync, 0, sizeof(etr_sync));
  718. etr_sync.etr_aib = aib;
  719. etr_sync.etr_port = port;
  720. get_online_cpus();
  721. atomic_set(&etr_sync.cpus, num_online_cpus() - 1);
  722. rc = stop_machine(etr_sync_clock, &etr_sync, &cpu_online_map);
  723. put_online_cpus();
  724. return rc;
  725. }
  726. /*
  727. * Handle the immediate effects of the different events.
  728. * The port change event is used for online/offline changes.
  729. */
  730. static struct etr_eacr etr_handle_events(struct etr_eacr eacr)
  731. {
  732. if (test_and_clear_bit(ETR_EVENT_SYNC_CHECK, &etr_events))
  733. eacr.es = 0;
  734. if (test_and_clear_bit(ETR_EVENT_SWITCH_LOCAL, &etr_events))
  735. eacr.es = eacr.sl = 0;
  736. if (test_and_clear_bit(ETR_EVENT_PORT_ALERT, &etr_events))
  737. etr_port0_uptodate = etr_port1_uptodate = 0;
  738. if (test_and_clear_bit(ETR_EVENT_PORT0_CHANGE, &etr_events)) {
  739. if (eacr.e0)
  740. /*
  741. * Port change of an enabled port. We have to
  742. * assume that this can have caused an stepping
  743. * port switch.
  744. */
  745. etr_tolec = get_clock();
  746. eacr.p0 = etr_port0_online;
  747. if (!eacr.p0)
  748. eacr.e0 = 0;
  749. etr_port0_uptodate = 0;
  750. }
  751. if (test_and_clear_bit(ETR_EVENT_PORT1_CHANGE, &etr_events)) {
  752. if (eacr.e1)
  753. /*
  754. * Port change of an enabled port. We have to
  755. * assume that this can have caused an stepping
  756. * port switch.
  757. */
  758. etr_tolec = get_clock();
  759. eacr.p1 = etr_port1_online;
  760. if (!eacr.p1)
  761. eacr.e1 = 0;
  762. etr_port1_uptodate = 0;
  763. }
  764. clear_bit(ETR_EVENT_UPDATE, &etr_events);
  765. return eacr;
  766. }
  767. /*
  768. * Set up a timer that expires after the etr_tolec + 1.6 seconds if
  769. * one of the ports needs an update.
  770. */
  771. static void etr_set_tolec_timeout(unsigned long long now)
  772. {
  773. unsigned long micros;
  774. if ((!etr_eacr.p0 || etr_port0_uptodate) &&
  775. (!etr_eacr.p1 || etr_port1_uptodate))
  776. return;
  777. micros = (now > etr_tolec) ? ((now - etr_tolec) >> 12) : 0;
  778. micros = (micros > 1600000) ? 0 : 1600000 - micros;
  779. mod_timer(&etr_timer, jiffies + (micros * HZ) / 1000000 + 1);
  780. }
  781. /*
  782. * Set up a time that expires after 1/2 second.
  783. */
  784. static void etr_set_sync_timeout(void)
  785. {
  786. mod_timer(&etr_timer, jiffies + HZ/2);
  787. }
  788. /*
  789. * Update the aib information for one or both ports.
  790. */
  791. static struct etr_eacr etr_handle_update(struct etr_aib *aib,
  792. struct etr_eacr eacr)
  793. {
  794. /* With both ports disabled the aib information is useless. */
  795. if (!eacr.e0 && !eacr.e1)
  796. return eacr;
  797. /* Update port0 or port1 with aib stored in etr_work_fn. */
  798. if (aib->esw.q == 0) {
  799. /* Information for port 0 stored. */
  800. if (eacr.p0 && !etr_port0_uptodate) {
  801. etr_port0 = *aib;
  802. if (etr_port0_online)
  803. etr_port0_uptodate = 1;
  804. }
  805. } else {
  806. /* Information for port 1 stored. */
  807. if (eacr.p1 && !etr_port1_uptodate) {
  808. etr_port1 = *aib;
  809. if (etr_port0_online)
  810. etr_port1_uptodate = 1;
  811. }
  812. }
  813. /*
  814. * Do not try to get the alternate port aib if the clock
  815. * is not in sync yet.
  816. */
  817. if (!eacr.es || !check_sync_clock())
  818. return eacr;
  819. /*
  820. * If steai is available we can get the information about
  821. * the other port immediately. If only stetr is available the
  822. * data-port bit toggle has to be used.
  823. */
  824. if (etr_steai_available) {
  825. if (eacr.p0 && !etr_port0_uptodate) {
  826. etr_steai_cv(&etr_port0, ETR_STEAI_PORT_0);
  827. etr_port0_uptodate = 1;
  828. }
  829. if (eacr.p1 && !etr_port1_uptodate) {
  830. etr_steai_cv(&etr_port1, ETR_STEAI_PORT_1);
  831. etr_port1_uptodate = 1;
  832. }
  833. } else {
  834. /*
  835. * One port was updated above, if the other
  836. * port is not uptodate toggle dp bit.
  837. */
  838. if ((eacr.p0 && !etr_port0_uptodate) ||
  839. (eacr.p1 && !etr_port1_uptodate))
  840. eacr.dp ^= 1;
  841. else
  842. eacr.dp = 0;
  843. }
  844. return eacr;
  845. }
  846. /*
  847. * Write new etr control register if it differs from the current one.
  848. * Return 1 if etr_tolec has been updated as well.
  849. */
  850. static void etr_update_eacr(struct etr_eacr eacr)
  851. {
  852. int dp_changed;
  853. if (memcmp(&etr_eacr, &eacr, sizeof(eacr)) == 0)
  854. /* No change, return. */
  855. return;
  856. /*
  857. * The disable of an active port of the change of the data port
  858. * bit can/will cause a change in the data port.
  859. */
  860. dp_changed = etr_eacr.e0 > eacr.e0 || etr_eacr.e1 > eacr.e1 ||
  861. (etr_eacr.dp ^ eacr.dp) != 0;
  862. etr_eacr = eacr;
  863. etr_setr(&etr_eacr);
  864. if (dp_changed)
  865. etr_tolec = get_clock();
  866. }
  867. /*
  868. * ETR work. In this function you'll find the main logic. In
  869. * particular this is the only function that calls etr_update_eacr(),
  870. * it "controls" the etr control register.
  871. */
  872. static void etr_work_fn(struct work_struct *work)
  873. {
  874. unsigned long long now;
  875. struct etr_eacr eacr;
  876. struct etr_aib aib;
  877. int sync_port;
  878. /* prevent multiple execution. */
  879. mutex_lock(&etr_work_mutex);
  880. /* Create working copy of etr_eacr. */
  881. eacr = etr_eacr;
  882. /* Check for the different events and their immediate effects. */
  883. eacr = etr_handle_events(eacr);
  884. /* Check if ETR is supposed to be active. */
  885. eacr.ea = eacr.p0 || eacr.p1;
  886. if (!eacr.ea) {
  887. /* Both ports offline. Reset everything. */
  888. eacr.dp = eacr.es = eacr.sl = 0;
  889. on_each_cpu(disable_sync_clock, NULL, 1);
  890. del_timer_sync(&etr_timer);
  891. etr_update_eacr(eacr);
  892. goto out_unlock;
  893. }
  894. /* Store aib to get the current ETR status word. */
  895. BUG_ON(etr_stetr(&aib) != 0);
  896. etr_port0.esw = etr_port1.esw = aib.esw; /* Copy status word. */
  897. now = get_clock();
  898. /*
  899. * Update the port information if the last stepping port change
  900. * or data port change is older than 1.6 seconds.
  901. */
  902. if (now >= etr_tolec + (1600000 << 12))
  903. eacr = etr_handle_update(&aib, eacr);
  904. /*
  905. * Select ports to enable. The prefered synchronization mode is PPS.
  906. * If a port can be enabled depends on a number of things:
  907. * 1) The port needs to be online and uptodate. A port is not
  908. * disabled just because it is not uptodate, but it is only
  909. * enabled if it is uptodate.
  910. * 2) The port needs to have the same mode (pps / etr).
  911. * 3) The port needs to be usable -> etr_port_valid() == 1
  912. * 4) To enable the second port the clock needs to be in sync.
  913. * 5) If both ports are useable and are ETR ports, the network id
  914. * has to be the same.
  915. * The eacr.sl bit is used to indicate etr mode vs. pps mode.
  916. */
  917. if (eacr.p0 && aib.esw.psc0 == etr_lpsc_pps_mode) {
  918. eacr.sl = 0;
  919. eacr.e0 = 1;
  920. if (!etr_mode_is_pps(etr_eacr))
  921. eacr.es = 0;
  922. if (!eacr.es || !eacr.p1 || aib.esw.psc1 != etr_lpsc_pps_mode)
  923. eacr.e1 = 0;
  924. // FIXME: uptodate checks ?
  925. else if (etr_port0_uptodate && etr_port1_uptodate)
  926. eacr.e1 = 1;
  927. sync_port = (etr_port0_uptodate &&
  928. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  929. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_pps_mode) {
  930. eacr.sl = 0;
  931. eacr.e0 = 0;
  932. eacr.e1 = 1;
  933. if (!etr_mode_is_pps(etr_eacr))
  934. eacr.es = 0;
  935. sync_port = (etr_port1_uptodate &&
  936. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  937. } else if (eacr.p0 && aib.esw.psc0 == etr_lpsc_operational_step) {
  938. eacr.sl = 1;
  939. eacr.e0 = 1;
  940. if (!etr_mode_is_etr(etr_eacr))
  941. eacr.es = 0;
  942. if (!eacr.es || !eacr.p1 ||
  943. aib.esw.psc1 != etr_lpsc_operational_alt)
  944. eacr.e1 = 0;
  945. else if (etr_port0_uptodate && etr_port1_uptodate &&
  946. etr_compare_network(&etr_port0, &etr_port1))
  947. eacr.e1 = 1;
  948. sync_port = (etr_port0_uptodate &&
  949. etr_port_valid(&etr_port0, 0)) ? 0 : -1;
  950. } else if (eacr.p1 && aib.esw.psc1 == etr_lpsc_operational_step) {
  951. eacr.sl = 1;
  952. eacr.e0 = 0;
  953. eacr.e1 = 1;
  954. if (!etr_mode_is_etr(etr_eacr))
  955. eacr.es = 0;
  956. sync_port = (etr_port1_uptodate &&
  957. etr_port_valid(&etr_port1, 1)) ? 1 : -1;
  958. } else {
  959. /* Both ports not usable. */
  960. eacr.es = eacr.sl = 0;
  961. sync_port = -1;
  962. }
  963. /*
  964. * If the clock is in sync just update the eacr and return.
  965. * If there is no valid sync port wait for a port update.
  966. */
  967. if ((eacr.es && check_sync_clock()) || sync_port < 0) {
  968. etr_update_eacr(eacr);
  969. etr_set_tolec_timeout(now);
  970. goto out_unlock;
  971. }
  972. /*
  973. * Prepare control register for clock syncing
  974. * (reset data port bit, set sync check control.
  975. */
  976. eacr.dp = 0;
  977. eacr.es = 1;
  978. /*
  979. * Update eacr and try to synchronize the clock. If the update
  980. * of eacr caused a stepping port switch (or if we have to
  981. * assume that a stepping port switch has occured) or the
  982. * clock syncing failed, reset the sync check control bit
  983. * and set up a timer to try again after 0.5 seconds
  984. */
  985. etr_update_eacr(eacr);
  986. if (now < etr_tolec + (1600000 << 12) ||
  987. etr_sync_clock_stop(&aib, sync_port) != 0) {
  988. /* Sync failed. Try again in 1/2 second. */
  989. eacr.es = 0;
  990. etr_update_eacr(eacr);
  991. etr_set_sync_timeout();
  992. } else
  993. etr_set_tolec_timeout(now);
  994. out_unlock:
  995. mutex_unlock(&etr_work_mutex);
  996. }
  997. /*
  998. * Sysfs interface functions
  999. */
  1000. static struct sysdev_class etr_sysclass = {
  1001. .name = "etr",
  1002. };
  1003. static struct sys_device etr_port0_dev = {
  1004. .id = 0,
  1005. .cls = &etr_sysclass,
  1006. };
  1007. static struct sys_device etr_port1_dev = {
  1008. .id = 1,
  1009. .cls = &etr_sysclass,
  1010. };
  1011. /*
  1012. * ETR class attributes
  1013. */
  1014. static ssize_t etr_stepping_port_show(struct sysdev_class *class,
  1015. struct sysdev_class_attribute *attr,
  1016. char *buf)
  1017. {
  1018. return sprintf(buf, "%i\n", etr_port0.esw.p);
  1019. }
  1020. static SYSDEV_CLASS_ATTR(stepping_port, 0400, etr_stepping_port_show, NULL);
  1021. static ssize_t etr_stepping_mode_show(struct sysdev_class *class,
  1022. struct sysdev_class_attribute *attr,
  1023. char *buf)
  1024. {
  1025. char *mode_str;
  1026. if (etr_mode_is_pps(etr_eacr))
  1027. mode_str = "pps";
  1028. else if (etr_mode_is_etr(etr_eacr))
  1029. mode_str = "etr";
  1030. else
  1031. mode_str = "local";
  1032. return sprintf(buf, "%s\n", mode_str);
  1033. }
  1034. static SYSDEV_CLASS_ATTR(stepping_mode, 0400, etr_stepping_mode_show, NULL);
  1035. /*
  1036. * ETR port attributes
  1037. */
  1038. static inline struct etr_aib *etr_aib_from_dev(struct sys_device *dev)
  1039. {
  1040. if (dev == &etr_port0_dev)
  1041. return etr_port0_online ? &etr_port0 : NULL;
  1042. else
  1043. return etr_port1_online ? &etr_port1 : NULL;
  1044. }
  1045. static ssize_t etr_online_show(struct sys_device *dev,
  1046. struct sysdev_attribute *attr,
  1047. char *buf)
  1048. {
  1049. unsigned int online;
  1050. online = (dev == &etr_port0_dev) ? etr_port0_online : etr_port1_online;
  1051. return sprintf(buf, "%i\n", online);
  1052. }
  1053. static ssize_t etr_online_store(struct sys_device *dev,
  1054. struct sysdev_attribute *attr,
  1055. const char *buf, size_t count)
  1056. {
  1057. unsigned int value;
  1058. value = simple_strtoul(buf, NULL, 0);
  1059. if (value != 0 && value != 1)
  1060. return -EINVAL;
  1061. if (!test_bit(CLOCK_SYNC_HAS_ETR, &clock_sync_flags))
  1062. return -EOPNOTSUPP;
  1063. mutex_lock(&clock_sync_mutex);
  1064. if (dev == &etr_port0_dev) {
  1065. if (etr_port0_online == value)
  1066. goto out; /* Nothing to do. */
  1067. etr_port0_online = value;
  1068. if (etr_port0_online && etr_port1_online)
  1069. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1070. else
  1071. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1072. set_bit(ETR_EVENT_PORT0_CHANGE, &etr_events);
  1073. queue_work(time_sync_wq, &etr_work);
  1074. } else {
  1075. if (etr_port1_online == value)
  1076. goto out; /* Nothing to do. */
  1077. etr_port1_online = value;
  1078. if (etr_port0_online && etr_port1_online)
  1079. set_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1080. else
  1081. clear_bit(CLOCK_SYNC_ETR, &clock_sync_flags);
  1082. set_bit(ETR_EVENT_PORT1_CHANGE, &etr_events);
  1083. queue_work(time_sync_wq, &etr_work);
  1084. }
  1085. out:
  1086. mutex_unlock(&clock_sync_mutex);
  1087. return count;
  1088. }
  1089. static SYSDEV_ATTR(online, 0600, etr_online_show, etr_online_store);
  1090. static ssize_t etr_stepping_control_show(struct sys_device *dev,
  1091. struct sysdev_attribute *attr,
  1092. char *buf)
  1093. {
  1094. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1095. etr_eacr.e0 : etr_eacr.e1);
  1096. }
  1097. static SYSDEV_ATTR(stepping_control, 0400, etr_stepping_control_show, NULL);
  1098. static ssize_t etr_mode_code_show(struct sys_device *dev,
  1099. struct sysdev_attribute *attr, char *buf)
  1100. {
  1101. if (!etr_port0_online && !etr_port1_online)
  1102. /* Status word is not uptodate if both ports are offline. */
  1103. return -ENODATA;
  1104. return sprintf(buf, "%i\n", (dev == &etr_port0_dev) ?
  1105. etr_port0.esw.psc0 : etr_port0.esw.psc1);
  1106. }
  1107. static SYSDEV_ATTR(state_code, 0400, etr_mode_code_show, NULL);
  1108. static ssize_t etr_untuned_show(struct sys_device *dev,
  1109. struct sysdev_attribute *attr, char *buf)
  1110. {
  1111. struct etr_aib *aib = etr_aib_from_dev(dev);
  1112. if (!aib || !aib->slsw.v1)
  1113. return -ENODATA;
  1114. return sprintf(buf, "%i\n", aib->edf1.u);
  1115. }
  1116. static SYSDEV_ATTR(untuned, 0400, etr_untuned_show, NULL);
  1117. static ssize_t etr_network_id_show(struct sys_device *dev,
  1118. struct sysdev_attribute *attr, char *buf)
  1119. {
  1120. struct etr_aib *aib = etr_aib_from_dev(dev);
  1121. if (!aib || !aib->slsw.v1)
  1122. return -ENODATA;
  1123. return sprintf(buf, "%i\n", aib->edf1.net_id);
  1124. }
  1125. static SYSDEV_ATTR(network, 0400, etr_network_id_show, NULL);
  1126. static ssize_t etr_id_show(struct sys_device *dev,
  1127. struct sysdev_attribute *attr, char *buf)
  1128. {
  1129. struct etr_aib *aib = etr_aib_from_dev(dev);
  1130. if (!aib || !aib->slsw.v1)
  1131. return -ENODATA;
  1132. return sprintf(buf, "%i\n", aib->edf1.etr_id);
  1133. }
  1134. static SYSDEV_ATTR(id, 0400, etr_id_show, NULL);
  1135. static ssize_t etr_port_number_show(struct sys_device *dev,
  1136. struct sysdev_attribute *attr, char *buf)
  1137. {
  1138. struct etr_aib *aib = etr_aib_from_dev(dev);
  1139. if (!aib || !aib->slsw.v1)
  1140. return -ENODATA;
  1141. return sprintf(buf, "%i\n", aib->edf1.etr_pn);
  1142. }
  1143. static SYSDEV_ATTR(port, 0400, etr_port_number_show, NULL);
  1144. static ssize_t etr_coupled_show(struct sys_device *dev,
  1145. struct sysdev_attribute *attr, char *buf)
  1146. {
  1147. struct etr_aib *aib = etr_aib_from_dev(dev);
  1148. if (!aib || !aib->slsw.v3)
  1149. return -ENODATA;
  1150. return sprintf(buf, "%i\n", aib->edf3.c);
  1151. }
  1152. static SYSDEV_ATTR(coupled, 0400, etr_coupled_show, NULL);
  1153. static ssize_t etr_local_time_show(struct sys_device *dev,
  1154. struct sysdev_attribute *attr, char *buf)
  1155. {
  1156. struct etr_aib *aib = etr_aib_from_dev(dev);
  1157. if (!aib || !aib->slsw.v3)
  1158. return -ENODATA;
  1159. return sprintf(buf, "%i\n", aib->edf3.blto);
  1160. }
  1161. static SYSDEV_ATTR(local_time, 0400, etr_local_time_show, NULL);
  1162. static ssize_t etr_utc_offset_show(struct sys_device *dev,
  1163. struct sysdev_attribute *attr, char *buf)
  1164. {
  1165. struct etr_aib *aib = etr_aib_from_dev(dev);
  1166. if (!aib || !aib->slsw.v3)
  1167. return -ENODATA;
  1168. return sprintf(buf, "%i\n", aib->edf3.buo);
  1169. }
  1170. static SYSDEV_ATTR(utc_offset, 0400, etr_utc_offset_show, NULL);
  1171. static struct sysdev_attribute *etr_port_attributes[] = {
  1172. &attr_online,
  1173. &attr_stepping_control,
  1174. &attr_state_code,
  1175. &attr_untuned,
  1176. &attr_network,
  1177. &attr_id,
  1178. &attr_port,
  1179. &attr_coupled,
  1180. &attr_local_time,
  1181. &attr_utc_offset,
  1182. NULL
  1183. };
  1184. static int __init etr_register_port(struct sys_device *dev)
  1185. {
  1186. struct sysdev_attribute **attr;
  1187. int rc;
  1188. rc = sysdev_register(dev);
  1189. if (rc)
  1190. goto out;
  1191. for (attr = etr_port_attributes; *attr; attr++) {
  1192. rc = sysdev_create_file(dev, *attr);
  1193. if (rc)
  1194. goto out_unreg;
  1195. }
  1196. return 0;
  1197. out_unreg:
  1198. for (; attr >= etr_port_attributes; attr--)
  1199. sysdev_remove_file(dev, *attr);
  1200. sysdev_unregister(dev);
  1201. out:
  1202. return rc;
  1203. }
  1204. static void __init etr_unregister_port(struct sys_device *dev)
  1205. {
  1206. struct sysdev_attribute **attr;
  1207. for (attr = etr_port_attributes; *attr; attr++)
  1208. sysdev_remove_file(dev, *attr);
  1209. sysdev_unregister(dev);
  1210. }
  1211. static int __init etr_init_sysfs(void)
  1212. {
  1213. int rc;
  1214. rc = sysdev_class_register(&etr_sysclass);
  1215. if (rc)
  1216. goto out;
  1217. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_port);
  1218. if (rc)
  1219. goto out_unreg_class;
  1220. rc = sysdev_class_create_file(&etr_sysclass, &attr_stepping_mode);
  1221. if (rc)
  1222. goto out_remove_stepping_port;
  1223. rc = etr_register_port(&etr_port0_dev);
  1224. if (rc)
  1225. goto out_remove_stepping_mode;
  1226. rc = etr_register_port(&etr_port1_dev);
  1227. if (rc)
  1228. goto out_remove_port0;
  1229. return 0;
  1230. out_remove_port0:
  1231. etr_unregister_port(&etr_port0_dev);
  1232. out_remove_stepping_mode:
  1233. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_mode);
  1234. out_remove_stepping_port:
  1235. sysdev_class_remove_file(&etr_sysclass, &attr_stepping_port);
  1236. out_unreg_class:
  1237. sysdev_class_unregister(&etr_sysclass);
  1238. out:
  1239. return rc;
  1240. }
  1241. device_initcall(etr_init_sysfs);
  1242. /*
  1243. * Server Time Protocol (STP) code.
  1244. */
  1245. static int stp_online;
  1246. static struct stp_sstpi stp_info;
  1247. static void *stp_page;
  1248. static void stp_work_fn(struct work_struct *work);
  1249. static DEFINE_MUTEX(stp_work_mutex);
  1250. static DECLARE_WORK(stp_work, stp_work_fn);
  1251. static struct timer_list stp_timer;
  1252. static int __init early_parse_stp(char *p)
  1253. {
  1254. if (strncmp(p, "off", 3) == 0)
  1255. stp_online = 0;
  1256. else if (strncmp(p, "on", 2) == 0)
  1257. stp_online = 1;
  1258. return 0;
  1259. }
  1260. early_param("stp", early_parse_stp);
  1261. /*
  1262. * Reset STP attachment.
  1263. */
  1264. static void __init stp_reset(void)
  1265. {
  1266. int rc;
  1267. stp_page = (void *) get_zeroed_page(GFP_ATOMIC);
  1268. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1269. if (rc == 0)
  1270. set_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags);
  1271. else if (stp_online) {
  1272. pr_warning("The real or virtual hardware system does "
  1273. "not provide an STP interface\n");
  1274. free_page((unsigned long) stp_page);
  1275. stp_page = NULL;
  1276. stp_online = 0;
  1277. }
  1278. }
  1279. static void stp_timeout(unsigned long dummy)
  1280. {
  1281. queue_work(time_sync_wq, &stp_work);
  1282. }
  1283. static int __init stp_init(void)
  1284. {
  1285. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1286. return 0;
  1287. setup_timer(&stp_timer, stp_timeout, 0UL);
  1288. time_init_wq();
  1289. if (!stp_online)
  1290. return 0;
  1291. queue_work(time_sync_wq, &stp_work);
  1292. return 0;
  1293. }
  1294. arch_initcall(stp_init);
  1295. /*
  1296. * STP timing alert. There are three causes:
  1297. * 1) timing status change
  1298. * 2) link availability change
  1299. * 3) time control parameter change
  1300. * In all three cases we are only interested in the clock source state.
  1301. * If a STP clock source is now available use it.
  1302. */
  1303. static void stp_timing_alert(struct stp_irq_parm *intparm)
  1304. {
  1305. if (intparm->tsc || intparm->lac || intparm->tcpc)
  1306. queue_work(time_sync_wq, &stp_work);
  1307. }
  1308. /*
  1309. * STP sync check machine check. This is called when the timing state
  1310. * changes from the synchronized state to the unsynchronized state.
  1311. * After a STP sync check the clock is not in sync. The machine check
  1312. * is broadcasted to all cpus at the same time.
  1313. */
  1314. void stp_sync_check(void)
  1315. {
  1316. disable_sync_clock(NULL);
  1317. queue_work(time_sync_wq, &stp_work);
  1318. }
  1319. /*
  1320. * STP island condition machine check. This is called when an attached
  1321. * server attempts to communicate over an STP link and the servers
  1322. * have matching CTN ids and have a valid stratum-1 configuration
  1323. * but the configurations do not match.
  1324. */
  1325. void stp_island_check(void)
  1326. {
  1327. disable_sync_clock(NULL);
  1328. queue_work(time_sync_wq, &stp_work);
  1329. }
  1330. static int stp_sync_clock(void *data)
  1331. {
  1332. static int first;
  1333. unsigned long long old_clock, delta;
  1334. struct clock_sync_data *stp_sync;
  1335. int rc;
  1336. stp_sync = data;
  1337. if (xchg(&first, 1) == 1) {
  1338. /* Slave */
  1339. clock_sync_cpu(stp_sync);
  1340. return 0;
  1341. }
  1342. /* Wait until all other cpus entered the sync function. */
  1343. while (atomic_read(&stp_sync->cpus) != 0)
  1344. cpu_relax();
  1345. enable_sync_clock();
  1346. rc = 0;
  1347. if (stp_info.todoff[0] || stp_info.todoff[1] ||
  1348. stp_info.todoff[2] || stp_info.todoff[3] ||
  1349. stp_info.tmd != 2) {
  1350. old_clock = get_clock();
  1351. rc = chsc_sstpc(stp_page, STP_OP_SYNC, 0);
  1352. if (rc == 0) {
  1353. delta = adjust_time(old_clock, get_clock(), 0);
  1354. fixup_clock_comparator(delta);
  1355. rc = chsc_sstpi(stp_page, &stp_info,
  1356. sizeof(struct stp_sstpi));
  1357. if (rc == 0 && stp_info.tmd != 2)
  1358. rc = -EAGAIN;
  1359. }
  1360. }
  1361. if (rc) {
  1362. disable_sync_clock(NULL);
  1363. stp_sync->in_sync = -EAGAIN;
  1364. } else
  1365. stp_sync->in_sync = 1;
  1366. xchg(&first, 0);
  1367. return 0;
  1368. }
  1369. /*
  1370. * STP work. Check for the STP state and take over the clock
  1371. * synchronization if the STP clock source is usable.
  1372. */
  1373. static void stp_work_fn(struct work_struct *work)
  1374. {
  1375. struct clock_sync_data stp_sync;
  1376. int rc;
  1377. /* prevent multiple execution. */
  1378. mutex_lock(&stp_work_mutex);
  1379. if (!stp_online) {
  1380. chsc_sstpc(stp_page, STP_OP_CTRL, 0x0000);
  1381. del_timer_sync(&stp_timer);
  1382. goto out_unlock;
  1383. }
  1384. rc = chsc_sstpc(stp_page, STP_OP_CTRL, 0xb0e0);
  1385. if (rc)
  1386. goto out_unlock;
  1387. rc = chsc_sstpi(stp_page, &stp_info, sizeof(struct stp_sstpi));
  1388. if (rc || stp_info.c == 0)
  1389. goto out_unlock;
  1390. /* Skip synchronization if the clock is already in sync. */
  1391. if (check_sync_clock())
  1392. goto out_unlock;
  1393. memset(&stp_sync, 0, sizeof(stp_sync));
  1394. get_online_cpus();
  1395. atomic_set(&stp_sync.cpus, num_online_cpus() - 1);
  1396. stop_machine(stp_sync_clock, &stp_sync, &cpu_online_map);
  1397. put_online_cpus();
  1398. if (!check_sync_clock())
  1399. /*
  1400. * There is a usable clock but the synchonization failed.
  1401. * Retry after a second.
  1402. */
  1403. mod_timer(&stp_timer, jiffies + HZ);
  1404. out_unlock:
  1405. mutex_unlock(&stp_work_mutex);
  1406. }
  1407. /*
  1408. * STP class sysfs interface functions
  1409. */
  1410. static struct sysdev_class stp_sysclass = {
  1411. .name = "stp",
  1412. };
  1413. static ssize_t stp_ctn_id_show(struct sysdev_class *class,
  1414. struct sysdev_class_attribute *attr,
  1415. char *buf)
  1416. {
  1417. if (!stp_online)
  1418. return -ENODATA;
  1419. return sprintf(buf, "%016llx\n",
  1420. *(unsigned long long *) stp_info.ctnid);
  1421. }
  1422. static SYSDEV_CLASS_ATTR(ctn_id, 0400, stp_ctn_id_show, NULL);
  1423. static ssize_t stp_ctn_type_show(struct sysdev_class *class,
  1424. struct sysdev_class_attribute *attr,
  1425. char *buf)
  1426. {
  1427. if (!stp_online)
  1428. return -ENODATA;
  1429. return sprintf(buf, "%i\n", stp_info.ctn);
  1430. }
  1431. static SYSDEV_CLASS_ATTR(ctn_type, 0400, stp_ctn_type_show, NULL);
  1432. static ssize_t stp_dst_offset_show(struct sysdev_class *class,
  1433. struct sysdev_class_attribute *attr,
  1434. char *buf)
  1435. {
  1436. if (!stp_online || !(stp_info.vbits & 0x2000))
  1437. return -ENODATA;
  1438. return sprintf(buf, "%i\n", (int)(s16) stp_info.dsto);
  1439. }
  1440. static SYSDEV_CLASS_ATTR(dst_offset, 0400, stp_dst_offset_show, NULL);
  1441. static ssize_t stp_leap_seconds_show(struct sysdev_class *class,
  1442. struct sysdev_class_attribute *attr,
  1443. char *buf)
  1444. {
  1445. if (!stp_online || !(stp_info.vbits & 0x8000))
  1446. return -ENODATA;
  1447. return sprintf(buf, "%i\n", (int)(s16) stp_info.leaps);
  1448. }
  1449. static SYSDEV_CLASS_ATTR(leap_seconds, 0400, stp_leap_seconds_show, NULL);
  1450. static ssize_t stp_stratum_show(struct sysdev_class *class,
  1451. struct sysdev_class_attribute *attr,
  1452. char *buf)
  1453. {
  1454. if (!stp_online)
  1455. return -ENODATA;
  1456. return sprintf(buf, "%i\n", (int)(s16) stp_info.stratum);
  1457. }
  1458. static SYSDEV_CLASS_ATTR(stratum, 0400, stp_stratum_show, NULL);
  1459. static ssize_t stp_time_offset_show(struct sysdev_class *class,
  1460. struct sysdev_class_attribute *attr,
  1461. char *buf)
  1462. {
  1463. if (!stp_online || !(stp_info.vbits & 0x0800))
  1464. return -ENODATA;
  1465. return sprintf(buf, "%i\n", (int) stp_info.tto);
  1466. }
  1467. static SYSDEV_CLASS_ATTR(time_offset, 0400, stp_time_offset_show, NULL);
  1468. static ssize_t stp_time_zone_offset_show(struct sysdev_class *class,
  1469. struct sysdev_class_attribute *attr,
  1470. char *buf)
  1471. {
  1472. if (!stp_online || !(stp_info.vbits & 0x4000))
  1473. return -ENODATA;
  1474. return sprintf(buf, "%i\n", (int)(s16) stp_info.tzo);
  1475. }
  1476. static SYSDEV_CLASS_ATTR(time_zone_offset, 0400,
  1477. stp_time_zone_offset_show, NULL);
  1478. static ssize_t stp_timing_mode_show(struct sysdev_class *class,
  1479. struct sysdev_class_attribute *attr,
  1480. char *buf)
  1481. {
  1482. if (!stp_online)
  1483. return -ENODATA;
  1484. return sprintf(buf, "%i\n", stp_info.tmd);
  1485. }
  1486. static SYSDEV_CLASS_ATTR(timing_mode, 0400, stp_timing_mode_show, NULL);
  1487. static ssize_t stp_timing_state_show(struct sysdev_class *class,
  1488. struct sysdev_class_attribute *attr,
  1489. char *buf)
  1490. {
  1491. if (!stp_online)
  1492. return -ENODATA;
  1493. return sprintf(buf, "%i\n", stp_info.tst);
  1494. }
  1495. static SYSDEV_CLASS_ATTR(timing_state, 0400, stp_timing_state_show, NULL);
  1496. static ssize_t stp_online_show(struct sysdev_class *class,
  1497. struct sysdev_class_attribute *attr,
  1498. char *buf)
  1499. {
  1500. return sprintf(buf, "%i\n", stp_online);
  1501. }
  1502. static ssize_t stp_online_store(struct sysdev_class *class,
  1503. struct sysdev_class_attribute *attr,
  1504. const char *buf, size_t count)
  1505. {
  1506. unsigned int value;
  1507. value = simple_strtoul(buf, NULL, 0);
  1508. if (value != 0 && value != 1)
  1509. return -EINVAL;
  1510. if (!test_bit(CLOCK_SYNC_HAS_STP, &clock_sync_flags))
  1511. return -EOPNOTSUPP;
  1512. mutex_lock(&clock_sync_mutex);
  1513. stp_online = value;
  1514. if (stp_online)
  1515. set_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1516. else
  1517. clear_bit(CLOCK_SYNC_STP, &clock_sync_flags);
  1518. queue_work(time_sync_wq, &stp_work);
  1519. mutex_unlock(&clock_sync_mutex);
  1520. return count;
  1521. }
  1522. /*
  1523. * Can't use SYSDEV_CLASS_ATTR because the attribute should be named
  1524. * stp/online but attr_online already exists in this file ..
  1525. */
  1526. static struct sysdev_class_attribute attr_stp_online = {
  1527. .attr = { .name = "online", .mode = 0600 },
  1528. .show = stp_online_show,
  1529. .store = stp_online_store,
  1530. };
  1531. static struct sysdev_class_attribute *stp_attributes[] = {
  1532. &attr_ctn_id,
  1533. &attr_ctn_type,
  1534. &attr_dst_offset,
  1535. &attr_leap_seconds,
  1536. &attr_stp_online,
  1537. &attr_stratum,
  1538. &attr_time_offset,
  1539. &attr_time_zone_offset,
  1540. &attr_timing_mode,
  1541. &attr_timing_state,
  1542. NULL
  1543. };
  1544. static int __init stp_init_sysfs(void)
  1545. {
  1546. struct sysdev_class_attribute **attr;
  1547. int rc;
  1548. rc = sysdev_class_register(&stp_sysclass);
  1549. if (rc)
  1550. goto out;
  1551. for (attr = stp_attributes; *attr; attr++) {
  1552. rc = sysdev_class_create_file(&stp_sysclass, *attr);
  1553. if (rc)
  1554. goto out_unreg;
  1555. }
  1556. return 0;
  1557. out_unreg:
  1558. for (; attr >= stp_attributes; attr--)
  1559. sysdev_class_remove_file(&stp_sysclass, *attr);
  1560. sysdev_class_unregister(&stp_sysclass);
  1561. out:
  1562. return rc;
  1563. }
  1564. device_initcall(stp_init_sysfs);