core.c 10 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428
  1. /*
  2. * linux/arch/arm/mach-realview/core.c
  3. *
  4. * Copyright (C) 1999 - 2003 ARM Limited
  5. * Copyright (C) 2000 Deep Blue Solutions Ltd
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License as published by
  9. * the Free Software Foundation; either version 2 of the License, or
  10. * (at your option) any later version.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  20. */
  21. #include <linux/init.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/dma-mapping.h>
  24. #include <linux/device.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/amba/bus.h>
  27. #include <linux/amba/clcd.h>
  28. #include <linux/io.h>
  29. #include <linux/smsc911x.h>
  30. #include <linux/ata_platform.h>
  31. #include <linux/amba/mmci.h>
  32. #include <linux/gfp.h>
  33. #include <linux/mtd/physmap.h>
  34. #include <mach/hardware.h>
  35. #include <asm/irq.h>
  36. #include <asm/leds.h>
  37. #include <asm/mach-types.h>
  38. #include <asm/hardware/arm_timer.h>
  39. #include <asm/hardware/icst.h>
  40. #include <asm/mach/arch.h>
  41. #include <asm/mach/irq.h>
  42. #include <asm/mach/map.h>
  43. #include <asm/hardware/gic.h>
  44. #include <mach/platform.h>
  45. #include <mach/irqs.h>
  46. #include <asm/hardware/timer-sp.h>
  47. #include <plat/clcd.h>
  48. #include <plat/sched_clock.h>
  49. #include "core.h"
  50. #define REALVIEW_FLASHCTRL (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_FLASH_OFFSET)
  51. static void realview_flash_set_vpp(struct platform_device *pdev, int on)
  52. {
  53. u32 val;
  54. val = __raw_readl(REALVIEW_FLASHCTRL);
  55. if (on)
  56. val |= REALVIEW_FLASHPROG_FLVPPEN;
  57. else
  58. val &= ~REALVIEW_FLASHPROG_FLVPPEN;
  59. __raw_writel(val, REALVIEW_FLASHCTRL);
  60. }
  61. static struct physmap_flash_data realview_flash_data = {
  62. .width = 4,
  63. .set_vpp = realview_flash_set_vpp,
  64. };
  65. struct platform_device realview_flash_device = {
  66. .name = "physmap-flash",
  67. .id = 0,
  68. .dev = {
  69. .platform_data = &realview_flash_data,
  70. },
  71. };
  72. int realview_flash_register(struct resource *res, u32 num)
  73. {
  74. realview_flash_device.resource = res;
  75. realview_flash_device.num_resources = num;
  76. return platform_device_register(&realview_flash_device);
  77. }
  78. static struct smsc911x_platform_config smsc911x_config = {
  79. .flags = SMSC911X_USE_32BIT,
  80. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_HIGH,
  81. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  82. .phy_interface = PHY_INTERFACE_MODE_MII,
  83. };
  84. static struct platform_device realview_eth_device = {
  85. .name = "smsc911x",
  86. .id = 0,
  87. .num_resources = 2,
  88. };
  89. int realview_eth_register(const char *name, struct resource *res)
  90. {
  91. if (name)
  92. realview_eth_device.name = name;
  93. realview_eth_device.resource = res;
  94. if (strcmp(realview_eth_device.name, "smsc911x") == 0)
  95. realview_eth_device.dev.platform_data = &smsc911x_config;
  96. return platform_device_register(&realview_eth_device);
  97. }
  98. struct platform_device realview_usb_device = {
  99. .name = "isp1760",
  100. .num_resources = 2,
  101. };
  102. int realview_usb_register(struct resource *res)
  103. {
  104. realview_usb_device.resource = res;
  105. return platform_device_register(&realview_usb_device);
  106. }
  107. static struct pata_platform_info pata_platform_data = {
  108. .ioport_shift = 1,
  109. };
  110. static struct resource pata_resources[] = {
  111. [0] = {
  112. .start = REALVIEW_CF_BASE,
  113. .end = REALVIEW_CF_BASE + 0xff,
  114. .flags = IORESOURCE_MEM,
  115. },
  116. [1] = {
  117. .start = REALVIEW_CF_BASE + 0x100,
  118. .end = REALVIEW_CF_BASE + SZ_4K - 1,
  119. .flags = IORESOURCE_MEM,
  120. },
  121. };
  122. struct platform_device realview_cf_device = {
  123. .name = "pata_platform",
  124. .id = -1,
  125. .num_resources = ARRAY_SIZE(pata_resources),
  126. .resource = pata_resources,
  127. .dev = {
  128. .platform_data = &pata_platform_data,
  129. },
  130. };
  131. static struct resource realview_i2c_resource = {
  132. .start = REALVIEW_I2C_BASE,
  133. .end = REALVIEW_I2C_BASE + SZ_4K - 1,
  134. .flags = IORESOURCE_MEM,
  135. };
  136. struct platform_device realview_i2c_device = {
  137. .name = "versatile-i2c",
  138. .id = 0,
  139. .num_resources = 1,
  140. .resource = &realview_i2c_resource,
  141. };
  142. static struct i2c_board_info realview_i2c_board_info[] = {
  143. {
  144. I2C_BOARD_INFO("ds1338", 0xd0 >> 1),
  145. },
  146. };
  147. static int __init realview_i2c_init(void)
  148. {
  149. return i2c_register_board_info(0, realview_i2c_board_info,
  150. ARRAY_SIZE(realview_i2c_board_info));
  151. }
  152. arch_initcall(realview_i2c_init);
  153. #define REALVIEW_SYSMCI (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_MCI_OFFSET)
  154. /*
  155. * This is only used if GPIOLIB support is disabled
  156. */
  157. static unsigned int realview_mmc_status(struct device *dev)
  158. {
  159. struct amba_device *adev = container_of(dev, struct amba_device, dev);
  160. u32 mask;
  161. if (machine_is_realview_pb1176()) {
  162. static bool inserted = false;
  163. /*
  164. * The PB1176 does not have the status register,
  165. * assume it is inserted at startup, then invert
  166. * for each call so card insertion/removal will
  167. * be detected anyway. This will not be called if
  168. * GPIO on PL061 is active, which is the proper
  169. * way to do this on the PB1176.
  170. */
  171. inserted = !inserted;
  172. return inserted ? 0 : 1;
  173. }
  174. if (adev->res.start == REALVIEW_MMCI0_BASE)
  175. mask = 1;
  176. else
  177. mask = 2;
  178. return readl(REALVIEW_SYSMCI) & mask;
  179. }
  180. struct mmci_platform_data realview_mmc0_plat_data = {
  181. .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
  182. .status = realview_mmc_status,
  183. .gpio_wp = 17,
  184. .gpio_cd = 16,
  185. .cd_invert = true,
  186. };
  187. struct mmci_platform_data realview_mmc1_plat_data = {
  188. .ocr_mask = MMC_VDD_32_33|MMC_VDD_33_34,
  189. .status = realview_mmc_status,
  190. .gpio_wp = 19,
  191. .gpio_cd = 18,
  192. .cd_invert = true,
  193. };
  194. void __init realview_init_early(void)
  195. {
  196. void __iomem *sys = __io_address(REALVIEW_SYS_BASE);
  197. versatile_sched_clock_init(sys + REALVIEW_SYS_24MHz_OFFSET, 24000000);
  198. }
  199. /*
  200. * CLCD support.
  201. */
  202. #define SYS_CLCD_NLCDIOON (1 << 2)
  203. #define SYS_CLCD_VDDPOSSWITCH (1 << 3)
  204. #define SYS_CLCD_PWR3V5SWITCH (1 << 4)
  205. #define SYS_CLCD_ID_MASK (0x1f << 8)
  206. #define SYS_CLCD_ID_SANYO_3_8 (0x00 << 8)
  207. #define SYS_CLCD_ID_UNKNOWN_8_4 (0x01 << 8)
  208. #define SYS_CLCD_ID_EPSON_2_2 (0x02 << 8)
  209. #define SYS_CLCD_ID_SANYO_2_5 (0x07 << 8)
  210. #define SYS_CLCD_ID_VGA (0x1f << 8)
  211. /*
  212. * Disable all display connectors on the interface module.
  213. */
  214. static void realview_clcd_disable(struct clcd_fb *fb)
  215. {
  216. void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
  217. u32 val;
  218. val = readl(sys_clcd);
  219. val &= ~SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
  220. writel(val, sys_clcd);
  221. }
  222. /*
  223. * Enable the relevant connector on the interface module.
  224. */
  225. static void realview_clcd_enable(struct clcd_fb *fb)
  226. {
  227. void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
  228. u32 val;
  229. /*
  230. * Enable the PSUs
  231. */
  232. val = readl(sys_clcd);
  233. val |= SYS_CLCD_NLCDIOON | SYS_CLCD_PWR3V5SWITCH;
  234. writel(val, sys_clcd);
  235. }
  236. /*
  237. * Detect which LCD panel is connected, and return the appropriate
  238. * clcd_panel structure. Note: we do not have any information on
  239. * the required timings for the 8.4in panel, so we presently assume
  240. * VGA timings.
  241. */
  242. static int realview_clcd_setup(struct clcd_fb *fb)
  243. {
  244. void __iomem *sys_clcd = __io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_CLCD_OFFSET;
  245. const char *panel_name, *vga_panel_name;
  246. unsigned long framesize;
  247. u32 val;
  248. if (machine_is_realview_eb()) {
  249. /* VGA, 16bpp */
  250. framesize = 640 * 480 * 2;
  251. vga_panel_name = "VGA";
  252. } else {
  253. /* XVGA, 16bpp */
  254. framesize = 1024 * 768 * 2;
  255. vga_panel_name = "XVGA";
  256. }
  257. val = readl(sys_clcd) & SYS_CLCD_ID_MASK;
  258. if (val == SYS_CLCD_ID_SANYO_3_8)
  259. panel_name = "Sanyo TM38QV67A02A";
  260. else if (val == SYS_CLCD_ID_SANYO_2_5)
  261. panel_name = "Sanyo QVGA Portrait";
  262. else if (val == SYS_CLCD_ID_EPSON_2_2)
  263. panel_name = "Epson L2F50113T00";
  264. else if (val == SYS_CLCD_ID_VGA)
  265. panel_name = vga_panel_name;
  266. else {
  267. pr_err("CLCD: unknown LCD panel ID 0x%08x, using VGA\n", val);
  268. panel_name = vga_panel_name;
  269. }
  270. fb->panel = versatile_clcd_get_panel(panel_name);
  271. if (!fb->panel)
  272. return -EINVAL;
  273. return versatile_clcd_setup_dma(fb, framesize);
  274. }
  275. struct clcd_board clcd_plat_data = {
  276. .name = "RealView",
  277. .caps = CLCD_CAP_ALL,
  278. .check = clcdfb_check,
  279. .decode = clcdfb_decode,
  280. .disable = realview_clcd_disable,
  281. .enable = realview_clcd_enable,
  282. .setup = realview_clcd_setup,
  283. .mmap = versatile_clcd_mmap_dma,
  284. .remove = versatile_clcd_remove_dma,
  285. };
  286. #ifdef CONFIG_LEDS
  287. #define VA_LEDS_BASE (__io_address(REALVIEW_SYS_BASE) + REALVIEW_SYS_LED_OFFSET)
  288. void realview_leds_event(led_event_t ledevt)
  289. {
  290. unsigned long flags;
  291. u32 val;
  292. u32 led = 1 << smp_processor_id();
  293. local_irq_save(flags);
  294. val = readl(VA_LEDS_BASE);
  295. switch (ledevt) {
  296. case led_idle_start:
  297. val = val & ~led;
  298. break;
  299. case led_idle_end:
  300. val = val | led;
  301. break;
  302. case led_timer:
  303. val = val ^ REALVIEW_SYS_LED7;
  304. break;
  305. case led_halted:
  306. val = 0;
  307. break;
  308. default:
  309. break;
  310. }
  311. writel(val, VA_LEDS_BASE);
  312. local_irq_restore(flags);
  313. }
  314. #endif /* CONFIG_LEDS */
  315. /*
  316. * Where is the timer (VA)?
  317. */
  318. void __iomem *timer0_va_base;
  319. void __iomem *timer1_va_base;
  320. void __iomem *timer2_va_base;
  321. void __iomem *timer3_va_base;
  322. /*
  323. * Set up the clock source and clock events devices
  324. */
  325. void __init realview_timer_init(unsigned int timer_irq)
  326. {
  327. u32 val;
  328. /*
  329. * set clock frequency:
  330. * REALVIEW_REFCLK is 32KHz
  331. * REALVIEW_TIMCLK is 1MHz
  332. */
  333. val = readl(__io_address(REALVIEW_SCTL_BASE));
  334. writel((REALVIEW_TIMCLK << REALVIEW_TIMER1_EnSel) |
  335. (REALVIEW_TIMCLK << REALVIEW_TIMER2_EnSel) |
  336. (REALVIEW_TIMCLK << REALVIEW_TIMER3_EnSel) |
  337. (REALVIEW_TIMCLK << REALVIEW_TIMER4_EnSel) | val,
  338. __io_address(REALVIEW_SCTL_BASE));
  339. /*
  340. * Initialise to a known state (all timers off)
  341. */
  342. writel(0, timer0_va_base + TIMER_CTRL);
  343. writel(0, timer1_va_base + TIMER_CTRL);
  344. writel(0, timer2_va_base + TIMER_CTRL);
  345. writel(0, timer3_va_base + TIMER_CTRL);
  346. sp804_clocksource_init(timer3_va_base, "timer3");
  347. sp804_clockevents_init(timer0_va_base, timer_irq, "timer0");
  348. }
  349. /*
  350. * Setup the memory banks.
  351. */
  352. void realview_fixup(struct tag *tags, char **from, struct meminfo *meminfo)
  353. {
  354. /*
  355. * Most RealView platforms have 512MB contiguous RAM at 0x70000000.
  356. * Half of this is mirrored at 0.
  357. */
  358. #ifdef CONFIG_REALVIEW_HIGH_PHYS_OFFSET
  359. meminfo->bank[0].start = 0x70000000;
  360. meminfo->bank[0].size = SZ_512M;
  361. meminfo->nr_banks = 1;
  362. #else
  363. meminfo->bank[0].start = 0;
  364. meminfo->bank[0].size = SZ_256M;
  365. meminfo->nr_banks = 1;
  366. #endif
  367. }