ispccdc.c 71 KB

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  1. /*
  2. * ispccdc.c
  3. *
  4. * TI OMAP3 ISP - CCDC module
  5. *
  6. * Copyright (C) 2009-2010 Nokia Corporation
  7. * Copyright (C) 2009 Texas Instruments, Inc.
  8. *
  9. * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
  10. * Sakari Ailus <sakari.ailus@iki.fi>
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of the GNU General Public License version 2 as
  14. * published by the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  24. * 02110-1301 USA
  25. */
  26. #include <linux/module.h>
  27. #include <linux/uaccess.h>
  28. #include <linux/delay.h>
  29. #include <linux/device.h>
  30. #include <linux/dma-mapping.h>
  31. #include <linux/mm.h>
  32. #include <linux/sched.h>
  33. #include <linux/slab.h>
  34. #include <media/v4l2-event.h>
  35. #include "isp.h"
  36. #include "ispreg.h"
  37. #include "ispccdc.h"
  38. #define CCDC_MIN_WIDTH 32
  39. #define CCDC_MIN_HEIGHT 32
  40. static struct v4l2_mbus_framefmt *
  41. __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
  42. unsigned int pad, enum v4l2_subdev_format_whence which);
  43. static const unsigned int ccdc_fmts[] = {
  44. V4L2_MBUS_FMT_Y8_1X8,
  45. V4L2_MBUS_FMT_Y10_1X10,
  46. V4L2_MBUS_FMT_Y12_1X12,
  47. V4L2_MBUS_FMT_SGRBG8_1X8,
  48. V4L2_MBUS_FMT_SRGGB8_1X8,
  49. V4L2_MBUS_FMT_SBGGR8_1X8,
  50. V4L2_MBUS_FMT_SGBRG8_1X8,
  51. V4L2_MBUS_FMT_SGRBG10_1X10,
  52. V4L2_MBUS_FMT_SRGGB10_1X10,
  53. V4L2_MBUS_FMT_SBGGR10_1X10,
  54. V4L2_MBUS_FMT_SGBRG10_1X10,
  55. V4L2_MBUS_FMT_SGRBG12_1X12,
  56. V4L2_MBUS_FMT_SRGGB12_1X12,
  57. V4L2_MBUS_FMT_SBGGR12_1X12,
  58. V4L2_MBUS_FMT_SGBRG12_1X12,
  59. V4L2_MBUS_FMT_YUYV8_2X8,
  60. V4L2_MBUS_FMT_UYVY8_2X8,
  61. };
  62. /*
  63. * ccdc_print_status - Print current CCDC Module register values.
  64. * @ccdc: Pointer to ISP CCDC device.
  65. *
  66. * Also prints other debug information stored in the CCDC module.
  67. */
  68. #define CCDC_PRINT_REGISTER(isp, name)\
  69. dev_dbg(isp->dev, "###CCDC " #name "=0x%08x\n", \
  70. isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_##name))
  71. static void ccdc_print_status(struct isp_ccdc_device *ccdc)
  72. {
  73. struct isp_device *isp = to_isp_device(ccdc);
  74. dev_dbg(isp->dev, "-------------CCDC Register dump-------------\n");
  75. CCDC_PRINT_REGISTER(isp, PCR);
  76. CCDC_PRINT_REGISTER(isp, SYN_MODE);
  77. CCDC_PRINT_REGISTER(isp, HD_VD_WID);
  78. CCDC_PRINT_REGISTER(isp, PIX_LINES);
  79. CCDC_PRINT_REGISTER(isp, HORZ_INFO);
  80. CCDC_PRINT_REGISTER(isp, VERT_START);
  81. CCDC_PRINT_REGISTER(isp, VERT_LINES);
  82. CCDC_PRINT_REGISTER(isp, CULLING);
  83. CCDC_PRINT_REGISTER(isp, HSIZE_OFF);
  84. CCDC_PRINT_REGISTER(isp, SDOFST);
  85. CCDC_PRINT_REGISTER(isp, SDR_ADDR);
  86. CCDC_PRINT_REGISTER(isp, CLAMP);
  87. CCDC_PRINT_REGISTER(isp, DCSUB);
  88. CCDC_PRINT_REGISTER(isp, COLPTN);
  89. CCDC_PRINT_REGISTER(isp, BLKCMP);
  90. CCDC_PRINT_REGISTER(isp, FPC);
  91. CCDC_PRINT_REGISTER(isp, FPC_ADDR);
  92. CCDC_PRINT_REGISTER(isp, VDINT);
  93. CCDC_PRINT_REGISTER(isp, ALAW);
  94. CCDC_PRINT_REGISTER(isp, REC656IF);
  95. CCDC_PRINT_REGISTER(isp, CFG);
  96. CCDC_PRINT_REGISTER(isp, FMTCFG);
  97. CCDC_PRINT_REGISTER(isp, FMT_HORZ);
  98. CCDC_PRINT_REGISTER(isp, FMT_VERT);
  99. CCDC_PRINT_REGISTER(isp, PRGEVEN0);
  100. CCDC_PRINT_REGISTER(isp, PRGEVEN1);
  101. CCDC_PRINT_REGISTER(isp, PRGODD0);
  102. CCDC_PRINT_REGISTER(isp, PRGODD1);
  103. CCDC_PRINT_REGISTER(isp, VP_OUT);
  104. CCDC_PRINT_REGISTER(isp, LSC_CONFIG);
  105. CCDC_PRINT_REGISTER(isp, LSC_INITIAL);
  106. CCDC_PRINT_REGISTER(isp, LSC_TABLE_BASE);
  107. CCDC_PRINT_REGISTER(isp, LSC_TABLE_OFFSET);
  108. dev_dbg(isp->dev, "--------------------------------------------\n");
  109. }
  110. /*
  111. * omap3isp_ccdc_busy - Get busy state of the CCDC.
  112. * @ccdc: Pointer to ISP CCDC device.
  113. */
  114. int omap3isp_ccdc_busy(struct isp_ccdc_device *ccdc)
  115. {
  116. struct isp_device *isp = to_isp_device(ccdc);
  117. return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR) &
  118. ISPCCDC_PCR_BUSY;
  119. }
  120. /* -----------------------------------------------------------------------------
  121. * Lens Shading Compensation
  122. */
  123. /*
  124. * ccdc_lsc_validate_config - Check that LSC configuration is valid.
  125. * @ccdc: Pointer to ISP CCDC device.
  126. * @lsc_cfg: the LSC configuration to check.
  127. *
  128. * Returns 0 if the LSC configuration is valid, or -EINVAL if invalid.
  129. */
  130. static int ccdc_lsc_validate_config(struct isp_ccdc_device *ccdc,
  131. struct omap3isp_ccdc_lsc_config *lsc_cfg)
  132. {
  133. struct isp_device *isp = to_isp_device(ccdc);
  134. struct v4l2_mbus_framefmt *format;
  135. unsigned int paxel_width, paxel_height;
  136. unsigned int paxel_shift_x, paxel_shift_y;
  137. unsigned int min_width, min_height, min_size;
  138. unsigned int input_width, input_height;
  139. paxel_shift_x = lsc_cfg->gain_mode_m;
  140. paxel_shift_y = lsc_cfg->gain_mode_n;
  141. if ((paxel_shift_x < 2) || (paxel_shift_x > 6) ||
  142. (paxel_shift_y < 2) || (paxel_shift_y > 6)) {
  143. dev_dbg(isp->dev, "CCDC: LSC: Invalid paxel size\n");
  144. return -EINVAL;
  145. }
  146. if (lsc_cfg->offset & 3) {
  147. dev_dbg(isp->dev, "CCDC: LSC: Offset must be a multiple of "
  148. "4\n");
  149. return -EINVAL;
  150. }
  151. if ((lsc_cfg->initial_x & 1) || (lsc_cfg->initial_y & 1)) {
  152. dev_dbg(isp->dev, "CCDC: LSC: initial_x and y must be even\n");
  153. return -EINVAL;
  154. }
  155. format = __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
  156. V4L2_SUBDEV_FORMAT_ACTIVE);
  157. input_width = format->width;
  158. input_height = format->height;
  159. /* Calculate minimum bytesize for validation */
  160. paxel_width = 1 << paxel_shift_x;
  161. min_width = ((input_width + lsc_cfg->initial_x + paxel_width - 1)
  162. >> paxel_shift_x) + 1;
  163. paxel_height = 1 << paxel_shift_y;
  164. min_height = ((input_height + lsc_cfg->initial_y + paxel_height - 1)
  165. >> paxel_shift_y) + 1;
  166. min_size = 4 * min_width * min_height;
  167. if (min_size > lsc_cfg->size) {
  168. dev_dbg(isp->dev, "CCDC: LSC: too small table\n");
  169. return -EINVAL;
  170. }
  171. if (lsc_cfg->offset < (min_width * 4)) {
  172. dev_dbg(isp->dev, "CCDC: LSC: Offset is too small\n");
  173. return -EINVAL;
  174. }
  175. if ((lsc_cfg->size / lsc_cfg->offset) < min_height) {
  176. dev_dbg(isp->dev, "CCDC: LSC: Wrong size/offset combination\n");
  177. return -EINVAL;
  178. }
  179. return 0;
  180. }
  181. /*
  182. * ccdc_lsc_program_table - Program Lens Shading Compensation table address.
  183. * @ccdc: Pointer to ISP CCDC device.
  184. */
  185. static void ccdc_lsc_program_table(struct isp_ccdc_device *ccdc, u32 addr)
  186. {
  187. isp_reg_writel(to_isp_device(ccdc), addr,
  188. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_TABLE_BASE);
  189. }
  190. /*
  191. * ccdc_lsc_setup_regs - Configures the lens shading compensation module
  192. * @ccdc: Pointer to ISP CCDC device.
  193. */
  194. static void ccdc_lsc_setup_regs(struct isp_ccdc_device *ccdc,
  195. struct omap3isp_ccdc_lsc_config *cfg)
  196. {
  197. struct isp_device *isp = to_isp_device(ccdc);
  198. int reg;
  199. isp_reg_writel(isp, cfg->offset, OMAP3_ISP_IOMEM_CCDC,
  200. ISPCCDC_LSC_TABLE_OFFSET);
  201. reg = 0;
  202. reg |= cfg->gain_mode_n << ISPCCDC_LSC_GAIN_MODE_N_SHIFT;
  203. reg |= cfg->gain_mode_m << ISPCCDC_LSC_GAIN_MODE_M_SHIFT;
  204. reg |= cfg->gain_format << ISPCCDC_LSC_GAIN_FORMAT_SHIFT;
  205. isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG);
  206. reg = 0;
  207. reg &= ~ISPCCDC_LSC_INITIAL_X_MASK;
  208. reg |= cfg->initial_x << ISPCCDC_LSC_INITIAL_X_SHIFT;
  209. reg &= ~ISPCCDC_LSC_INITIAL_Y_MASK;
  210. reg |= cfg->initial_y << ISPCCDC_LSC_INITIAL_Y_SHIFT;
  211. isp_reg_writel(isp, reg, OMAP3_ISP_IOMEM_CCDC,
  212. ISPCCDC_LSC_INITIAL);
  213. }
  214. static int ccdc_lsc_wait_prefetch(struct isp_ccdc_device *ccdc)
  215. {
  216. struct isp_device *isp = to_isp_device(ccdc);
  217. unsigned int wait;
  218. isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
  219. OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  220. /* timeout 1 ms */
  221. for (wait = 0; wait < 1000; wait++) {
  222. if (isp_reg_readl(isp, OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS) &
  223. IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ) {
  224. isp_reg_writel(isp, IRQ0STATUS_CCDC_LSC_PREF_COMP_IRQ,
  225. OMAP3_ISP_IOMEM_MAIN, ISP_IRQ0STATUS);
  226. return 0;
  227. }
  228. rmb();
  229. udelay(1);
  230. }
  231. return -ETIMEDOUT;
  232. }
  233. /*
  234. * __ccdc_lsc_enable - Enables/Disables the Lens Shading Compensation module.
  235. * @ccdc: Pointer to ISP CCDC device.
  236. * @enable: 0 Disables LSC, 1 Enables LSC.
  237. */
  238. static int __ccdc_lsc_enable(struct isp_ccdc_device *ccdc, int enable)
  239. {
  240. struct isp_device *isp = to_isp_device(ccdc);
  241. const struct v4l2_mbus_framefmt *format =
  242. __ccdc_get_format(ccdc, NULL, CCDC_PAD_SINK,
  243. V4L2_SUBDEV_FORMAT_ACTIVE);
  244. if ((format->code != V4L2_MBUS_FMT_SGRBG10_1X10) &&
  245. (format->code != V4L2_MBUS_FMT_SRGGB10_1X10) &&
  246. (format->code != V4L2_MBUS_FMT_SBGGR10_1X10) &&
  247. (format->code != V4L2_MBUS_FMT_SGBRG10_1X10))
  248. return -EINVAL;
  249. if (enable)
  250. omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_LSC_READ);
  251. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
  252. ISPCCDC_LSC_ENABLE, enable ? ISPCCDC_LSC_ENABLE : 0);
  253. if (enable) {
  254. if (ccdc_lsc_wait_prefetch(ccdc) < 0) {
  255. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC,
  256. ISPCCDC_LSC_CONFIG, ISPCCDC_LSC_ENABLE);
  257. ccdc->lsc.state = LSC_STATE_STOPPED;
  258. dev_warn(to_device(ccdc), "LSC prefecth timeout\n");
  259. return -ETIMEDOUT;
  260. }
  261. ccdc->lsc.state = LSC_STATE_RUNNING;
  262. } else {
  263. ccdc->lsc.state = LSC_STATE_STOPPING;
  264. }
  265. return 0;
  266. }
  267. static int ccdc_lsc_busy(struct isp_ccdc_device *ccdc)
  268. {
  269. struct isp_device *isp = to_isp_device(ccdc);
  270. return isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG) &
  271. ISPCCDC_LSC_BUSY;
  272. }
  273. /* __ccdc_lsc_configure - Apply a new configuration to the LSC engine
  274. * @ccdc: Pointer to ISP CCDC device
  275. * @req: New configuration request
  276. *
  277. * context: in_interrupt()
  278. */
  279. static int __ccdc_lsc_configure(struct isp_ccdc_device *ccdc,
  280. struct ispccdc_lsc_config_req *req)
  281. {
  282. if (!req->enable)
  283. return -EINVAL;
  284. if (ccdc_lsc_validate_config(ccdc, &req->config) < 0) {
  285. dev_dbg(to_device(ccdc), "Discard LSC configuration\n");
  286. return -EINVAL;
  287. }
  288. if (ccdc_lsc_busy(ccdc))
  289. return -EBUSY;
  290. ccdc_lsc_setup_regs(ccdc, &req->config);
  291. ccdc_lsc_program_table(ccdc, req->table);
  292. return 0;
  293. }
  294. /*
  295. * ccdc_lsc_error_handler - Handle LSC prefetch error scenario.
  296. * @ccdc: Pointer to ISP CCDC device.
  297. *
  298. * Disables LSC, and defers enablement to shadow registers update time.
  299. */
  300. static void ccdc_lsc_error_handler(struct isp_ccdc_device *ccdc)
  301. {
  302. struct isp_device *isp = to_isp_device(ccdc);
  303. /*
  304. * From OMAP3 TRM: When this event is pending, the module
  305. * goes into transparent mode (output =input). Normal
  306. * operation can be resumed at the start of the next frame
  307. * after:
  308. * 1) Clearing this event
  309. * 2) Disabling the LSC module
  310. * 3) Enabling it
  311. */
  312. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_LSC_CONFIG,
  313. ISPCCDC_LSC_ENABLE);
  314. ccdc->lsc.state = LSC_STATE_STOPPED;
  315. }
  316. static void ccdc_lsc_free_request(struct isp_ccdc_device *ccdc,
  317. struct ispccdc_lsc_config_req *req)
  318. {
  319. struct isp_device *isp = to_isp_device(ccdc);
  320. if (req == NULL)
  321. return;
  322. if (req->iovm)
  323. dma_unmap_sg(isp->dev, req->iovm->sgt->sgl,
  324. req->iovm->sgt->nents, DMA_TO_DEVICE);
  325. if (req->table)
  326. omap_iommu_vfree(isp->domain, isp->dev, req->table);
  327. kfree(req);
  328. }
  329. static void ccdc_lsc_free_queue(struct isp_ccdc_device *ccdc,
  330. struct list_head *queue)
  331. {
  332. struct ispccdc_lsc_config_req *req, *n;
  333. unsigned long flags;
  334. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  335. list_for_each_entry_safe(req, n, queue, list) {
  336. list_del(&req->list);
  337. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  338. ccdc_lsc_free_request(ccdc, req);
  339. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  340. }
  341. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  342. }
  343. static void ccdc_lsc_free_table_work(struct work_struct *work)
  344. {
  345. struct isp_ccdc_device *ccdc;
  346. struct ispccdc_lsc *lsc;
  347. lsc = container_of(work, struct ispccdc_lsc, table_work);
  348. ccdc = container_of(lsc, struct isp_ccdc_device, lsc);
  349. ccdc_lsc_free_queue(ccdc, &lsc->free_queue);
  350. }
  351. /*
  352. * ccdc_lsc_config - Configure the LSC module from a userspace request
  353. *
  354. * Store the request LSC configuration in the LSC engine request pointer. The
  355. * configuration will be applied to the hardware when the CCDC will be enabled,
  356. * or at the next LSC interrupt if the CCDC is already running.
  357. */
  358. static int ccdc_lsc_config(struct isp_ccdc_device *ccdc,
  359. struct omap3isp_ccdc_update_config *config)
  360. {
  361. struct isp_device *isp = to_isp_device(ccdc);
  362. struct ispccdc_lsc_config_req *req;
  363. unsigned long flags;
  364. void *table;
  365. u16 update;
  366. int ret;
  367. update = config->update &
  368. (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC);
  369. if (!update)
  370. return 0;
  371. if (update != (OMAP3ISP_CCDC_CONFIG_LSC | OMAP3ISP_CCDC_TBL_LSC)) {
  372. dev_dbg(to_device(ccdc), "%s: Both LSC configuration and table "
  373. "need to be supplied\n", __func__);
  374. return -EINVAL;
  375. }
  376. req = kzalloc(sizeof(*req), GFP_KERNEL);
  377. if (req == NULL)
  378. return -ENOMEM;
  379. if (config->flag & OMAP3ISP_CCDC_CONFIG_LSC) {
  380. if (copy_from_user(&req->config, config->lsc_cfg,
  381. sizeof(req->config))) {
  382. ret = -EFAULT;
  383. goto done;
  384. }
  385. req->enable = 1;
  386. req->table = omap_iommu_vmalloc(isp->domain, isp->dev, 0,
  387. req->config.size, IOMMU_FLAG);
  388. if (IS_ERR_VALUE(req->table)) {
  389. req->table = 0;
  390. ret = -ENOMEM;
  391. goto done;
  392. }
  393. req->iovm = omap_find_iovm_area(isp->dev, req->table);
  394. if (req->iovm == NULL) {
  395. ret = -ENOMEM;
  396. goto done;
  397. }
  398. if (!dma_map_sg(isp->dev, req->iovm->sgt->sgl,
  399. req->iovm->sgt->nents, DMA_TO_DEVICE)) {
  400. ret = -ENOMEM;
  401. req->iovm = NULL;
  402. goto done;
  403. }
  404. dma_sync_sg_for_cpu(isp->dev, req->iovm->sgt->sgl,
  405. req->iovm->sgt->nents, DMA_TO_DEVICE);
  406. table = omap_da_to_va(isp->dev, req->table);
  407. if (copy_from_user(table, config->lsc, req->config.size)) {
  408. ret = -EFAULT;
  409. goto done;
  410. }
  411. dma_sync_sg_for_device(isp->dev, req->iovm->sgt->sgl,
  412. req->iovm->sgt->nents, DMA_TO_DEVICE);
  413. }
  414. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  415. if (ccdc->lsc.request) {
  416. list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
  417. schedule_work(&ccdc->lsc.table_work);
  418. }
  419. ccdc->lsc.request = req;
  420. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  421. ret = 0;
  422. done:
  423. if (ret < 0)
  424. ccdc_lsc_free_request(ccdc, req);
  425. return ret;
  426. }
  427. static inline int ccdc_lsc_is_configured(struct isp_ccdc_device *ccdc)
  428. {
  429. unsigned long flags;
  430. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  431. if (ccdc->lsc.active) {
  432. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  433. return 1;
  434. }
  435. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  436. return 0;
  437. }
  438. static int ccdc_lsc_enable(struct isp_ccdc_device *ccdc)
  439. {
  440. struct ispccdc_lsc *lsc = &ccdc->lsc;
  441. if (lsc->state != LSC_STATE_STOPPED)
  442. return -EINVAL;
  443. if (lsc->active) {
  444. list_add_tail(&lsc->active->list, &lsc->free_queue);
  445. lsc->active = NULL;
  446. }
  447. if (__ccdc_lsc_configure(ccdc, lsc->request) < 0) {
  448. omap3isp_sbl_disable(to_isp_device(ccdc),
  449. OMAP3_ISP_SBL_CCDC_LSC_READ);
  450. list_add_tail(&lsc->request->list, &lsc->free_queue);
  451. lsc->request = NULL;
  452. goto done;
  453. }
  454. lsc->active = lsc->request;
  455. lsc->request = NULL;
  456. __ccdc_lsc_enable(ccdc, 1);
  457. done:
  458. if (!list_empty(&lsc->free_queue))
  459. schedule_work(&lsc->table_work);
  460. return 0;
  461. }
  462. /* -----------------------------------------------------------------------------
  463. * Parameters configuration
  464. */
  465. /*
  466. * ccdc_configure_clamp - Configure optical-black or digital clamping
  467. * @ccdc: Pointer to ISP CCDC device.
  468. *
  469. * The CCDC performs either optical-black or digital clamp. Configure and enable
  470. * the selected clamp method.
  471. */
  472. static void ccdc_configure_clamp(struct isp_ccdc_device *ccdc)
  473. {
  474. struct isp_device *isp = to_isp_device(ccdc);
  475. u32 clamp;
  476. if (ccdc->obclamp) {
  477. clamp = ccdc->clamp.obgain << ISPCCDC_CLAMP_OBGAIN_SHIFT;
  478. clamp |= ccdc->clamp.oblen << ISPCCDC_CLAMP_OBSLEN_SHIFT;
  479. clamp |= ccdc->clamp.oblines << ISPCCDC_CLAMP_OBSLN_SHIFT;
  480. clamp |= ccdc->clamp.obstpixel << ISPCCDC_CLAMP_OBST_SHIFT;
  481. isp_reg_writel(isp, clamp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP);
  482. } else {
  483. isp_reg_writel(isp, ccdc->clamp.dcsubval,
  484. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_DCSUB);
  485. }
  486. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CLAMP,
  487. ISPCCDC_CLAMP_CLAMPEN,
  488. ccdc->obclamp ? ISPCCDC_CLAMP_CLAMPEN : 0);
  489. }
  490. /*
  491. * ccdc_configure_fpc - Configure Faulty Pixel Correction
  492. * @ccdc: Pointer to ISP CCDC device.
  493. */
  494. static void ccdc_configure_fpc(struct isp_ccdc_device *ccdc)
  495. {
  496. struct isp_device *isp = to_isp_device(ccdc);
  497. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC, ISPCCDC_FPC_FPCEN);
  498. if (!ccdc->fpc_en)
  499. return;
  500. isp_reg_writel(isp, ccdc->fpc.fpcaddr, OMAP3_ISP_IOMEM_CCDC,
  501. ISPCCDC_FPC_ADDR);
  502. /* The FPNUM field must be set before enabling FPC. */
  503. isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT),
  504. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
  505. isp_reg_writel(isp, (ccdc->fpc.fpnum << ISPCCDC_FPC_FPNUM_SHIFT) |
  506. ISPCCDC_FPC_FPCEN, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FPC);
  507. }
  508. /*
  509. * ccdc_configure_black_comp - Configure Black Level Compensation.
  510. * @ccdc: Pointer to ISP CCDC device.
  511. */
  512. static void ccdc_configure_black_comp(struct isp_ccdc_device *ccdc)
  513. {
  514. struct isp_device *isp = to_isp_device(ccdc);
  515. u32 blcomp;
  516. blcomp = ccdc->blcomp.b_mg << ISPCCDC_BLKCMP_B_MG_SHIFT;
  517. blcomp |= ccdc->blcomp.gb_g << ISPCCDC_BLKCMP_GB_G_SHIFT;
  518. blcomp |= ccdc->blcomp.gr_cy << ISPCCDC_BLKCMP_GR_CY_SHIFT;
  519. blcomp |= ccdc->blcomp.r_ye << ISPCCDC_BLKCMP_R_YE_SHIFT;
  520. isp_reg_writel(isp, blcomp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_BLKCMP);
  521. }
  522. /*
  523. * ccdc_configure_lpf - Configure Low-Pass Filter (LPF).
  524. * @ccdc: Pointer to ISP CCDC device.
  525. */
  526. static void ccdc_configure_lpf(struct isp_ccdc_device *ccdc)
  527. {
  528. struct isp_device *isp = to_isp_device(ccdc);
  529. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE,
  530. ISPCCDC_SYN_MODE_LPF,
  531. ccdc->lpf ? ISPCCDC_SYN_MODE_LPF : 0);
  532. }
  533. /*
  534. * ccdc_configure_alaw - Configure A-law compression.
  535. * @ccdc: Pointer to ISP CCDC device.
  536. */
  537. static void ccdc_configure_alaw(struct isp_ccdc_device *ccdc)
  538. {
  539. struct isp_device *isp = to_isp_device(ccdc);
  540. const struct isp_format_info *info;
  541. u32 alaw = 0;
  542. info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
  543. switch (info->width) {
  544. case 8:
  545. return;
  546. case 10:
  547. alaw = ISPCCDC_ALAW_GWDI_9_0;
  548. break;
  549. case 11:
  550. alaw = ISPCCDC_ALAW_GWDI_10_1;
  551. break;
  552. case 12:
  553. alaw = ISPCCDC_ALAW_GWDI_11_2;
  554. break;
  555. case 13:
  556. alaw = ISPCCDC_ALAW_GWDI_12_3;
  557. break;
  558. }
  559. if (ccdc->alaw)
  560. alaw |= ISPCCDC_ALAW_CCDTBL;
  561. isp_reg_writel(isp, alaw, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_ALAW);
  562. }
  563. /*
  564. * ccdc_config_imgattr - Configure sensor image specific attributes.
  565. * @ccdc: Pointer to ISP CCDC device.
  566. * @colptn: Color pattern of the sensor.
  567. */
  568. static void ccdc_config_imgattr(struct isp_ccdc_device *ccdc, u32 colptn)
  569. {
  570. struct isp_device *isp = to_isp_device(ccdc);
  571. isp_reg_writel(isp, colptn, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_COLPTN);
  572. }
  573. /*
  574. * ccdc_config - Set CCDC configuration from userspace
  575. * @ccdc: Pointer to ISP CCDC device.
  576. * @userspace_add: Structure containing CCDC configuration sent from userspace.
  577. *
  578. * Returns 0 if successful, -EINVAL if the pointer to the configuration
  579. * structure is null, or the copy_from_user function fails to copy user space
  580. * memory to kernel space memory.
  581. */
  582. static int ccdc_config(struct isp_ccdc_device *ccdc,
  583. struct omap3isp_ccdc_update_config *ccdc_struct)
  584. {
  585. struct isp_device *isp = to_isp_device(ccdc);
  586. unsigned long flags;
  587. spin_lock_irqsave(&ccdc->lock, flags);
  588. ccdc->shadow_update = 1;
  589. spin_unlock_irqrestore(&ccdc->lock, flags);
  590. if (OMAP3ISP_CCDC_ALAW & ccdc_struct->update) {
  591. ccdc->alaw = !!(OMAP3ISP_CCDC_ALAW & ccdc_struct->flag);
  592. ccdc->update |= OMAP3ISP_CCDC_ALAW;
  593. }
  594. if (OMAP3ISP_CCDC_LPF & ccdc_struct->update) {
  595. ccdc->lpf = !!(OMAP3ISP_CCDC_LPF & ccdc_struct->flag);
  596. ccdc->update |= OMAP3ISP_CCDC_LPF;
  597. }
  598. if (OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->update) {
  599. if (copy_from_user(&ccdc->clamp, ccdc_struct->bclamp,
  600. sizeof(ccdc->clamp))) {
  601. ccdc->shadow_update = 0;
  602. return -EFAULT;
  603. }
  604. ccdc->obclamp = !!(OMAP3ISP_CCDC_BLCLAMP & ccdc_struct->flag);
  605. ccdc->update |= OMAP3ISP_CCDC_BLCLAMP;
  606. }
  607. if (OMAP3ISP_CCDC_BCOMP & ccdc_struct->update) {
  608. if (copy_from_user(&ccdc->blcomp, ccdc_struct->blcomp,
  609. sizeof(ccdc->blcomp))) {
  610. ccdc->shadow_update = 0;
  611. return -EFAULT;
  612. }
  613. ccdc->update |= OMAP3ISP_CCDC_BCOMP;
  614. }
  615. ccdc->shadow_update = 0;
  616. if (OMAP3ISP_CCDC_FPC & ccdc_struct->update) {
  617. u32 table_old = 0;
  618. u32 table_new;
  619. u32 size;
  620. if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
  621. return -EBUSY;
  622. ccdc->fpc_en = !!(OMAP3ISP_CCDC_FPC & ccdc_struct->flag);
  623. if (ccdc->fpc_en) {
  624. if (copy_from_user(&ccdc->fpc, ccdc_struct->fpc,
  625. sizeof(ccdc->fpc)))
  626. return -EFAULT;
  627. /*
  628. * table_new must be 64-bytes aligned, but it's
  629. * already done by omap_iommu_vmalloc().
  630. */
  631. size = ccdc->fpc.fpnum * 4;
  632. table_new = omap_iommu_vmalloc(isp->domain, isp->dev,
  633. 0, size, IOMMU_FLAG);
  634. if (IS_ERR_VALUE(table_new))
  635. return -ENOMEM;
  636. if (copy_from_user(omap_da_to_va(isp->dev, table_new),
  637. (__force void __user *)
  638. ccdc->fpc.fpcaddr, size)) {
  639. omap_iommu_vfree(isp->domain, isp->dev,
  640. table_new);
  641. return -EFAULT;
  642. }
  643. table_old = ccdc->fpc.fpcaddr;
  644. ccdc->fpc.fpcaddr = table_new;
  645. }
  646. ccdc_configure_fpc(ccdc);
  647. if (table_old != 0)
  648. omap_iommu_vfree(isp->domain, isp->dev, table_old);
  649. }
  650. return ccdc_lsc_config(ccdc, ccdc_struct);
  651. }
  652. static void ccdc_apply_controls(struct isp_ccdc_device *ccdc)
  653. {
  654. if (ccdc->update & OMAP3ISP_CCDC_ALAW) {
  655. ccdc_configure_alaw(ccdc);
  656. ccdc->update &= ~OMAP3ISP_CCDC_ALAW;
  657. }
  658. if (ccdc->update & OMAP3ISP_CCDC_LPF) {
  659. ccdc_configure_lpf(ccdc);
  660. ccdc->update &= ~OMAP3ISP_CCDC_LPF;
  661. }
  662. if (ccdc->update & OMAP3ISP_CCDC_BLCLAMP) {
  663. ccdc_configure_clamp(ccdc);
  664. ccdc->update &= ~OMAP3ISP_CCDC_BLCLAMP;
  665. }
  666. if (ccdc->update & OMAP3ISP_CCDC_BCOMP) {
  667. ccdc_configure_black_comp(ccdc);
  668. ccdc->update &= ~OMAP3ISP_CCDC_BCOMP;
  669. }
  670. }
  671. /*
  672. * omap3isp_ccdc_restore_context - Restore values of the CCDC module registers
  673. * @dev: Pointer to ISP device
  674. */
  675. void omap3isp_ccdc_restore_context(struct isp_device *isp)
  676. {
  677. struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
  678. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG, ISPCCDC_CFG_VDLC);
  679. ccdc->update = OMAP3ISP_CCDC_ALAW | OMAP3ISP_CCDC_LPF
  680. | OMAP3ISP_CCDC_BLCLAMP | OMAP3ISP_CCDC_BCOMP;
  681. ccdc_apply_controls(ccdc);
  682. ccdc_configure_fpc(ccdc);
  683. }
  684. /* -----------------------------------------------------------------------------
  685. * Format- and pipeline-related configuration helpers
  686. */
  687. /*
  688. * ccdc_config_vp - Configure the Video Port.
  689. * @ccdc: Pointer to ISP CCDC device.
  690. */
  691. static void ccdc_config_vp(struct isp_ccdc_device *ccdc)
  692. {
  693. struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
  694. struct isp_device *isp = to_isp_device(ccdc);
  695. const struct isp_format_info *info;
  696. unsigned long l3_ick = pipe->l3_ick;
  697. unsigned int max_div = isp->revision == ISP_REVISION_15_0 ? 64 : 8;
  698. unsigned int div = 0;
  699. u32 fmtcfg_vp;
  700. fmtcfg_vp = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG)
  701. & ~(ISPCCDC_FMTCFG_VPIN_MASK | ISPCCDC_FMTCFG_VPIF_FRQ_MASK);
  702. info = omap3isp_video_format_info(ccdc->formats[CCDC_PAD_SINK].code);
  703. switch (info->width) {
  704. case 8:
  705. case 10:
  706. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_9_0;
  707. break;
  708. case 11:
  709. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_10_1;
  710. break;
  711. case 12:
  712. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_11_2;
  713. break;
  714. case 13:
  715. fmtcfg_vp |= ISPCCDC_FMTCFG_VPIN_12_3;
  716. break;
  717. }
  718. if (pipe->input)
  719. div = DIV_ROUND_UP(l3_ick, pipe->max_rate);
  720. else if (pipe->external_rate)
  721. div = l3_ick / pipe->external_rate;
  722. div = clamp(div, 2U, max_div);
  723. fmtcfg_vp |= (div - 2) << ISPCCDC_FMTCFG_VPIF_FRQ_SHIFT;
  724. isp_reg_writel(isp, fmtcfg_vp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG);
  725. }
  726. /*
  727. * ccdc_enable_vp - Enable Video Port.
  728. * @ccdc: Pointer to ISP CCDC device.
  729. * @enable: 0 Disables VP, 1 Enables VP
  730. *
  731. * This is needed for outputting image to Preview, H3A and HIST ISP submodules.
  732. */
  733. static void ccdc_enable_vp(struct isp_ccdc_device *ccdc, u8 enable)
  734. {
  735. struct isp_device *isp = to_isp_device(ccdc);
  736. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMTCFG,
  737. ISPCCDC_FMTCFG_VPEN, enable ? ISPCCDC_FMTCFG_VPEN : 0);
  738. }
  739. /*
  740. * ccdc_config_outlineoffset - Configure memory saving output line offset
  741. * @ccdc: Pointer to ISP CCDC device.
  742. * @offset: Address offset to start a new line. Must be twice the
  743. * Output width and aligned on 32 byte boundary
  744. * @oddeven: Specifies the odd/even line pattern to be chosen to store the
  745. * output.
  746. * @numlines: Set the value 0-3 for +1-4lines, 4-7 for -1-4lines.
  747. *
  748. * - Configures the output line offset when stored in memory
  749. * - Sets the odd/even line pattern to store the output
  750. * (EVENEVEN (1), ODDEVEN (2), EVENODD (3), ODDODD (4))
  751. * - Configures the number of even and odd line fields in case of rearranging
  752. * the lines.
  753. */
  754. static void ccdc_config_outlineoffset(struct isp_ccdc_device *ccdc,
  755. u32 offset, u8 oddeven, u8 numlines)
  756. {
  757. struct isp_device *isp = to_isp_device(ccdc);
  758. isp_reg_writel(isp, offset & 0xffff,
  759. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HSIZE_OFF);
  760. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  761. ISPCCDC_SDOFST_FINV);
  762. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  763. ISPCCDC_SDOFST_FOFST_4L);
  764. switch (oddeven) {
  765. case EVENEVEN:
  766. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  767. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST0_SHIFT);
  768. break;
  769. case ODDEVEN:
  770. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  771. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST1_SHIFT);
  772. break;
  773. case EVENODD:
  774. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  775. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST2_SHIFT);
  776. break;
  777. case ODDODD:
  778. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDOFST,
  779. (numlines & 0x7) << ISPCCDC_SDOFST_LOFST3_SHIFT);
  780. break;
  781. default:
  782. break;
  783. }
  784. }
  785. /*
  786. * ccdc_set_outaddr - Set memory address to save output image
  787. * @ccdc: Pointer to ISP CCDC device.
  788. * @addr: ISP MMU Mapped 32-bit memory address aligned on 32 byte boundary.
  789. *
  790. * Sets the memory address where the output will be saved.
  791. */
  792. static void ccdc_set_outaddr(struct isp_ccdc_device *ccdc, u32 addr)
  793. {
  794. struct isp_device *isp = to_isp_device(ccdc);
  795. isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SDR_ADDR);
  796. }
  797. /*
  798. * omap3isp_ccdc_max_rate - Calculate maximum input data rate based on the input
  799. * @ccdc: Pointer to ISP CCDC device.
  800. * @max_rate: Maximum calculated data rate.
  801. *
  802. * Returns in *max_rate less value between calculated and passed
  803. */
  804. void omap3isp_ccdc_max_rate(struct isp_ccdc_device *ccdc,
  805. unsigned int *max_rate)
  806. {
  807. struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
  808. unsigned int rate;
  809. if (pipe == NULL)
  810. return;
  811. /*
  812. * TRM says that for parallel sensors the maximum data rate
  813. * should be 90% form L3/2 clock, otherwise just L3/2.
  814. */
  815. if (ccdc->input == CCDC_INPUT_PARALLEL)
  816. rate = pipe->l3_ick / 2 * 9 / 10;
  817. else
  818. rate = pipe->l3_ick / 2;
  819. *max_rate = min(*max_rate, rate);
  820. }
  821. /*
  822. * ccdc_config_sync_if - Set CCDC sync interface configuration
  823. * @ccdc: Pointer to ISP CCDC device.
  824. * @pdata: Parallel interface platform data (may be NULL)
  825. * @data_size: Data size
  826. */
  827. static void ccdc_config_sync_if(struct isp_ccdc_device *ccdc,
  828. struct isp_parallel_platform_data *pdata,
  829. unsigned int data_size)
  830. {
  831. struct isp_device *isp = to_isp_device(ccdc);
  832. const struct v4l2_mbus_framefmt *format;
  833. u32 syn_mode = ISPCCDC_SYN_MODE_VDHDEN;
  834. format = &ccdc->formats[CCDC_PAD_SINK];
  835. if (format->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
  836. format->code == V4L2_MBUS_FMT_UYVY8_2X8) {
  837. /* The bridge is enabled for YUV8 formats. Configure the input
  838. * mode accordingly.
  839. */
  840. syn_mode |= ISPCCDC_SYN_MODE_INPMOD_YCBCR16;
  841. }
  842. switch (data_size) {
  843. case 8:
  844. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_8;
  845. break;
  846. case 10:
  847. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_10;
  848. break;
  849. case 11:
  850. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_11;
  851. break;
  852. case 12:
  853. syn_mode |= ISPCCDC_SYN_MODE_DATSIZ_12;
  854. break;
  855. }
  856. if (pdata && pdata->data_pol)
  857. syn_mode |= ISPCCDC_SYN_MODE_DATAPOL;
  858. if (pdata && pdata->hs_pol)
  859. syn_mode |= ISPCCDC_SYN_MODE_HDPOL;
  860. if (pdata && pdata->vs_pol)
  861. syn_mode |= ISPCCDC_SYN_MODE_VDPOL;
  862. isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
  863. /* The CCDC_CFG.Y8POS bit is used in YCbCr8 input mode only. The
  864. * hardware seems to ignore it in all other input modes.
  865. */
  866. if (format->code == V4L2_MBUS_FMT_UYVY8_2X8)
  867. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
  868. ISPCCDC_CFG_Y8POS);
  869. else
  870. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
  871. ISPCCDC_CFG_Y8POS);
  872. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_REC656IF,
  873. ISPCCDC_REC656IF_R656ON);
  874. }
  875. /* CCDC formats descriptions */
  876. static const u32 ccdc_sgrbg_pattern =
  877. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  878. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  879. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  880. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  881. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  882. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  883. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  884. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  885. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  886. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  887. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  888. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  889. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  890. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  891. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  892. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  893. static const u32 ccdc_srggb_pattern =
  894. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  895. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  896. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  897. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  898. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  899. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  900. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  901. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  902. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  903. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  904. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  905. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  906. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  907. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  908. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  909. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  910. static const u32 ccdc_sbggr_pattern =
  911. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  912. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  913. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  914. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  915. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  916. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  917. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  918. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  919. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  920. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  921. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  922. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  923. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  924. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  925. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  926. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  927. static const u32 ccdc_sgbrg_pattern =
  928. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC0_SHIFT |
  929. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC1_SHIFT |
  930. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP0PLC2_SHIFT |
  931. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP0PLC3_SHIFT |
  932. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC0_SHIFT |
  933. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC1_SHIFT |
  934. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP1PLC2_SHIFT |
  935. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP1PLC3_SHIFT |
  936. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC0_SHIFT |
  937. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC1_SHIFT |
  938. ISPCCDC_COLPTN_Gb_G << ISPCCDC_COLPTN_CP2PLC2_SHIFT |
  939. ISPCCDC_COLPTN_B_Mg << ISPCCDC_COLPTN_CP2PLC3_SHIFT |
  940. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC0_SHIFT |
  941. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC1_SHIFT |
  942. ISPCCDC_COLPTN_R_Ye << ISPCCDC_COLPTN_CP3PLC2_SHIFT |
  943. ISPCCDC_COLPTN_Gr_Cy << ISPCCDC_COLPTN_CP3PLC3_SHIFT;
  944. static void ccdc_configure(struct isp_ccdc_device *ccdc)
  945. {
  946. struct isp_device *isp = to_isp_device(ccdc);
  947. struct isp_parallel_platform_data *pdata = NULL;
  948. struct v4l2_subdev *sensor;
  949. struct v4l2_mbus_framefmt *format;
  950. const struct v4l2_rect *crop;
  951. const struct isp_format_info *fmt_info;
  952. struct v4l2_subdev_format fmt_src;
  953. unsigned int depth_out;
  954. unsigned int depth_in = 0;
  955. struct media_pad *pad;
  956. unsigned long flags;
  957. unsigned int bridge;
  958. unsigned int shift;
  959. u32 syn_mode;
  960. u32 ccdc_pattern;
  961. pad = media_entity_remote_source(&ccdc->pads[CCDC_PAD_SINK]);
  962. sensor = media_entity_to_v4l2_subdev(pad->entity);
  963. if (ccdc->input == CCDC_INPUT_PARALLEL)
  964. pdata = &((struct isp_v4l2_subdevs_group *)sensor->host_priv)
  965. ->bus.parallel;
  966. /* Compute the lane shifter shift value and enable the bridge when the
  967. * input format is YUV.
  968. */
  969. fmt_src.pad = pad->index;
  970. fmt_src.which = V4L2_SUBDEV_FORMAT_ACTIVE;
  971. if (!v4l2_subdev_call(sensor, pad, get_fmt, NULL, &fmt_src)) {
  972. fmt_info = omap3isp_video_format_info(fmt_src.format.code);
  973. depth_in = fmt_info->width;
  974. }
  975. fmt_info = omap3isp_video_format_info
  976. (isp->isp_ccdc.formats[CCDC_PAD_SINK].code);
  977. depth_out = fmt_info->width;
  978. shift = depth_in - depth_out;
  979. if (fmt_info->code == V4L2_MBUS_FMT_YUYV8_2X8)
  980. bridge = ISPCTRL_PAR_BRIDGE_LENDIAN;
  981. else if (fmt_info->code == V4L2_MBUS_FMT_UYVY8_2X8)
  982. bridge = ISPCTRL_PAR_BRIDGE_BENDIAN;
  983. else
  984. bridge = ISPCTRL_PAR_BRIDGE_DISABLE;
  985. omap3isp_configure_bridge(isp, ccdc->input, pdata, shift, bridge);
  986. ccdc_config_sync_if(ccdc, pdata, depth_out);
  987. syn_mode = isp_reg_readl(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
  988. /* Use the raw, unprocessed data when writing to memory. The H3A and
  989. * histogram modules are still fed with lens shading corrected data.
  990. */
  991. syn_mode &= ~ISPCCDC_SYN_MODE_VP2SDR;
  992. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  993. syn_mode |= ISPCCDC_SYN_MODE_WEN;
  994. else
  995. syn_mode &= ~ISPCCDC_SYN_MODE_WEN;
  996. if (ccdc->output & CCDC_OUTPUT_RESIZER)
  997. syn_mode |= ISPCCDC_SYN_MODE_SDR2RSZ;
  998. else
  999. syn_mode &= ~ISPCCDC_SYN_MODE_SDR2RSZ;
  1000. /* CCDC_PAD_SINK */
  1001. format = &ccdc->formats[CCDC_PAD_SINK];
  1002. /* Mosaic filter */
  1003. switch (format->code) {
  1004. case V4L2_MBUS_FMT_SRGGB10_1X10:
  1005. case V4L2_MBUS_FMT_SRGGB12_1X12:
  1006. ccdc_pattern = ccdc_srggb_pattern;
  1007. break;
  1008. case V4L2_MBUS_FMT_SBGGR10_1X10:
  1009. case V4L2_MBUS_FMT_SBGGR12_1X12:
  1010. ccdc_pattern = ccdc_sbggr_pattern;
  1011. break;
  1012. case V4L2_MBUS_FMT_SGBRG10_1X10:
  1013. case V4L2_MBUS_FMT_SGBRG12_1X12:
  1014. ccdc_pattern = ccdc_sgbrg_pattern;
  1015. break;
  1016. default:
  1017. /* Use GRBG */
  1018. ccdc_pattern = ccdc_sgrbg_pattern;
  1019. break;
  1020. }
  1021. ccdc_config_imgattr(ccdc, ccdc_pattern);
  1022. /* Generate VD0 on the last line of the image and VD1 on the
  1023. * 2/3 height line.
  1024. */
  1025. isp_reg_writel(isp, ((format->height - 2) << ISPCCDC_VDINT_0_SHIFT) |
  1026. ((format->height * 2 / 3) << ISPCCDC_VDINT_1_SHIFT),
  1027. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VDINT);
  1028. /* CCDC_PAD_SOURCE_OF */
  1029. format = &ccdc->formats[CCDC_PAD_SOURCE_OF];
  1030. crop = &ccdc->crop;
  1031. isp_reg_writel(isp, (crop->left << ISPCCDC_HORZ_INFO_SPH_SHIFT) |
  1032. ((crop->width - 1) << ISPCCDC_HORZ_INFO_NPH_SHIFT),
  1033. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_HORZ_INFO);
  1034. isp_reg_writel(isp, crop->top << ISPCCDC_VERT_START_SLV0_SHIFT,
  1035. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_START);
  1036. isp_reg_writel(isp, (crop->height - 1)
  1037. << ISPCCDC_VERT_LINES_NLV_SHIFT,
  1038. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VERT_LINES);
  1039. ccdc_config_outlineoffset(ccdc, ccdc->video_out.bpl_value, 0, 0);
  1040. /* The CCDC outputs data in UYVY order by default. Swap bytes to get
  1041. * YUYV.
  1042. */
  1043. if (format->code == V4L2_MBUS_FMT_YUYV8_1X16)
  1044. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
  1045. ISPCCDC_CFG_BSWD);
  1046. else
  1047. isp_reg_clr(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
  1048. ISPCCDC_CFG_BSWD);
  1049. /* Use PACK8 mode for 1byte per pixel formats. */
  1050. if (omap3isp_video_format_info(format->code)->width <= 8)
  1051. syn_mode |= ISPCCDC_SYN_MODE_PACK8;
  1052. else
  1053. syn_mode &= ~ISPCCDC_SYN_MODE_PACK8;
  1054. isp_reg_writel(isp, syn_mode, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_SYN_MODE);
  1055. /* CCDC_PAD_SOURCE_VP */
  1056. format = &ccdc->formats[CCDC_PAD_SOURCE_VP];
  1057. isp_reg_writel(isp, (0 << ISPCCDC_FMT_HORZ_FMTSPH_SHIFT) |
  1058. (format->width << ISPCCDC_FMT_HORZ_FMTLNH_SHIFT),
  1059. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_HORZ);
  1060. isp_reg_writel(isp, (0 << ISPCCDC_FMT_VERT_FMTSLV_SHIFT) |
  1061. ((format->height + 1) << ISPCCDC_FMT_VERT_FMTLNV_SHIFT),
  1062. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_FMT_VERT);
  1063. isp_reg_writel(isp, (format->width << ISPCCDC_VP_OUT_HORZ_NUM_SHIFT) |
  1064. (format->height << ISPCCDC_VP_OUT_VERT_NUM_SHIFT),
  1065. OMAP3_ISP_IOMEM_CCDC, ISPCCDC_VP_OUT);
  1066. /* Lens shading correction. */
  1067. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  1068. if (ccdc->lsc.request == NULL)
  1069. goto unlock;
  1070. WARN_ON(ccdc->lsc.active);
  1071. /* Get last good LSC configuration. If it is not supported for
  1072. * the current active resolution discard it.
  1073. */
  1074. if (ccdc->lsc.active == NULL &&
  1075. __ccdc_lsc_configure(ccdc, ccdc->lsc.request) == 0) {
  1076. ccdc->lsc.active = ccdc->lsc.request;
  1077. } else {
  1078. list_add_tail(&ccdc->lsc.request->list, &ccdc->lsc.free_queue);
  1079. schedule_work(&ccdc->lsc.table_work);
  1080. }
  1081. ccdc->lsc.request = NULL;
  1082. unlock:
  1083. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  1084. ccdc_apply_controls(ccdc);
  1085. }
  1086. static void __ccdc_enable(struct isp_ccdc_device *ccdc, int enable)
  1087. {
  1088. struct isp_device *isp = to_isp_device(ccdc);
  1089. isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_PCR,
  1090. ISPCCDC_PCR_EN, enable ? ISPCCDC_PCR_EN : 0);
  1091. }
  1092. static int ccdc_disable(struct isp_ccdc_device *ccdc)
  1093. {
  1094. unsigned long flags;
  1095. int ret = 0;
  1096. spin_lock_irqsave(&ccdc->lock, flags);
  1097. if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS)
  1098. ccdc->stopping = CCDC_STOP_REQUEST;
  1099. spin_unlock_irqrestore(&ccdc->lock, flags);
  1100. ret = wait_event_timeout(ccdc->wait,
  1101. ccdc->stopping == CCDC_STOP_FINISHED,
  1102. msecs_to_jiffies(2000));
  1103. if (ret == 0) {
  1104. ret = -ETIMEDOUT;
  1105. dev_warn(to_device(ccdc), "CCDC stop timeout!\n");
  1106. }
  1107. omap3isp_sbl_disable(to_isp_device(ccdc), OMAP3_ISP_SBL_CCDC_LSC_READ);
  1108. mutex_lock(&ccdc->ioctl_lock);
  1109. ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
  1110. ccdc->lsc.request = ccdc->lsc.active;
  1111. ccdc->lsc.active = NULL;
  1112. cancel_work_sync(&ccdc->lsc.table_work);
  1113. ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
  1114. mutex_unlock(&ccdc->ioctl_lock);
  1115. ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
  1116. return ret > 0 ? 0 : ret;
  1117. }
  1118. static void ccdc_enable(struct isp_ccdc_device *ccdc)
  1119. {
  1120. if (ccdc_lsc_is_configured(ccdc))
  1121. __ccdc_lsc_enable(ccdc, 1);
  1122. __ccdc_enable(ccdc, 1);
  1123. }
  1124. /* -----------------------------------------------------------------------------
  1125. * Interrupt handling
  1126. */
  1127. /*
  1128. * ccdc_sbl_busy - Poll idle state of CCDC and related SBL memory write bits
  1129. * @ccdc: Pointer to ISP CCDC device.
  1130. *
  1131. * Returns zero if the CCDC is idle and the image has been written to
  1132. * memory, too.
  1133. */
  1134. static int ccdc_sbl_busy(struct isp_ccdc_device *ccdc)
  1135. {
  1136. struct isp_device *isp = to_isp_device(ccdc);
  1137. return omap3isp_ccdc_busy(ccdc)
  1138. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_0) &
  1139. ISPSBL_CCDC_WR_0_DATA_READY)
  1140. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_1) &
  1141. ISPSBL_CCDC_WR_0_DATA_READY)
  1142. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_2) &
  1143. ISPSBL_CCDC_WR_0_DATA_READY)
  1144. | (isp_reg_readl(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_CCDC_WR_3) &
  1145. ISPSBL_CCDC_WR_0_DATA_READY);
  1146. }
  1147. /*
  1148. * ccdc_sbl_wait_idle - Wait until the CCDC and related SBL are idle
  1149. * @ccdc: Pointer to ISP CCDC device.
  1150. * @max_wait: Max retry count in us for wait for idle/busy transition.
  1151. */
  1152. static int ccdc_sbl_wait_idle(struct isp_ccdc_device *ccdc,
  1153. unsigned int max_wait)
  1154. {
  1155. unsigned int wait = 0;
  1156. if (max_wait == 0)
  1157. max_wait = 10000; /* 10 ms */
  1158. for (wait = 0; wait <= max_wait; wait++) {
  1159. if (!ccdc_sbl_busy(ccdc))
  1160. return 0;
  1161. rmb();
  1162. udelay(1);
  1163. }
  1164. return -EBUSY;
  1165. }
  1166. /* __ccdc_handle_stopping - Handle CCDC and/or LSC stopping sequence
  1167. * @ccdc: Pointer to ISP CCDC device.
  1168. * @event: Pointing which event trigger handler
  1169. *
  1170. * Return 1 when the event and stopping request combination is satisfied,
  1171. * zero otherwise.
  1172. */
  1173. static int __ccdc_handle_stopping(struct isp_ccdc_device *ccdc, u32 event)
  1174. {
  1175. int rval = 0;
  1176. switch ((ccdc->stopping & 3) | event) {
  1177. case CCDC_STOP_REQUEST | CCDC_EVENT_VD1:
  1178. if (ccdc->lsc.state != LSC_STATE_STOPPED)
  1179. __ccdc_lsc_enable(ccdc, 0);
  1180. __ccdc_enable(ccdc, 0);
  1181. ccdc->stopping = CCDC_STOP_EXECUTED;
  1182. return 1;
  1183. case CCDC_STOP_EXECUTED | CCDC_EVENT_VD0:
  1184. ccdc->stopping |= CCDC_STOP_CCDC_FINISHED;
  1185. if (ccdc->lsc.state == LSC_STATE_STOPPED)
  1186. ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
  1187. rval = 1;
  1188. break;
  1189. case CCDC_STOP_EXECUTED | CCDC_EVENT_LSC_DONE:
  1190. ccdc->stopping |= CCDC_STOP_LSC_FINISHED;
  1191. rval = 1;
  1192. break;
  1193. case CCDC_STOP_EXECUTED | CCDC_EVENT_VD1:
  1194. return 1;
  1195. }
  1196. if (ccdc->stopping == CCDC_STOP_FINISHED) {
  1197. wake_up(&ccdc->wait);
  1198. rval = 1;
  1199. }
  1200. return rval;
  1201. }
  1202. static void ccdc_hs_vs_isr(struct isp_ccdc_device *ccdc)
  1203. {
  1204. struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
  1205. struct video_device *vdev = ccdc->subdev.devnode;
  1206. struct v4l2_event event;
  1207. /* Frame number propagation */
  1208. atomic_inc(&pipe->frame_number);
  1209. memset(&event, 0, sizeof(event));
  1210. event.type = V4L2_EVENT_FRAME_SYNC;
  1211. event.u.frame_sync.frame_sequence = atomic_read(&pipe->frame_number);
  1212. v4l2_event_queue(vdev, &event);
  1213. }
  1214. /*
  1215. * ccdc_lsc_isr - Handle LSC events
  1216. * @ccdc: Pointer to ISP CCDC device.
  1217. * @events: LSC events
  1218. */
  1219. static void ccdc_lsc_isr(struct isp_ccdc_device *ccdc, u32 events)
  1220. {
  1221. unsigned long flags;
  1222. if (events & IRQ0STATUS_CCDC_LSC_PREF_ERR_IRQ) {
  1223. struct isp_pipeline *pipe =
  1224. to_isp_pipeline(&ccdc->subdev.entity);
  1225. ccdc_lsc_error_handler(ccdc);
  1226. pipe->error = true;
  1227. dev_dbg(to_device(ccdc), "lsc prefetch error\n");
  1228. }
  1229. if (!(events & IRQ0STATUS_CCDC_LSC_DONE_IRQ))
  1230. return;
  1231. /* LSC_DONE interrupt occur, there are two cases
  1232. * 1. stopping for reconfiguration
  1233. * 2. stopping because of STREAM OFF command
  1234. */
  1235. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  1236. if (ccdc->lsc.state == LSC_STATE_STOPPING)
  1237. ccdc->lsc.state = LSC_STATE_STOPPED;
  1238. if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_LSC_DONE))
  1239. goto done;
  1240. if (ccdc->lsc.state != LSC_STATE_RECONFIG)
  1241. goto done;
  1242. /* LSC is in STOPPING state, change to the new state */
  1243. ccdc->lsc.state = LSC_STATE_STOPPED;
  1244. /* This is an exception. Start of frame and LSC_DONE interrupt
  1245. * have been received on the same time. Skip this event and wait
  1246. * for better times.
  1247. */
  1248. if (events & IRQ0STATUS_HS_VS_IRQ)
  1249. goto done;
  1250. /* The LSC engine is stopped at this point. Enable it if there's a
  1251. * pending request.
  1252. */
  1253. if (ccdc->lsc.request == NULL)
  1254. goto done;
  1255. ccdc_lsc_enable(ccdc);
  1256. done:
  1257. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  1258. }
  1259. static int ccdc_isr_buffer(struct isp_ccdc_device *ccdc)
  1260. {
  1261. struct isp_pipeline *pipe = to_isp_pipeline(&ccdc->subdev.entity);
  1262. struct isp_device *isp = to_isp_device(ccdc);
  1263. struct isp_buffer *buffer;
  1264. int restart = 0;
  1265. /* The CCDC generates VD0 interrupts even when disabled (the datasheet
  1266. * doesn't explicitly state if that's supposed to happen or not, so it
  1267. * can be considered as a hardware bug or as a feature, but we have to
  1268. * deal with it anyway). Disabling the CCDC when no buffer is available
  1269. * would thus not be enough, we need to handle the situation explicitly.
  1270. */
  1271. if (list_empty(&ccdc->video_out.dmaqueue))
  1272. goto done;
  1273. /* We're in continuous mode, and memory writes were disabled due to a
  1274. * buffer underrun. Reenable them now that we have a buffer. The buffer
  1275. * address has been set in ccdc_video_queue.
  1276. */
  1277. if (ccdc->state == ISP_PIPELINE_STREAM_CONTINUOUS && ccdc->underrun) {
  1278. restart = 1;
  1279. ccdc->underrun = 0;
  1280. goto done;
  1281. }
  1282. if (ccdc_sbl_wait_idle(ccdc, 1000)) {
  1283. dev_info(isp->dev, "CCDC won't become idle!\n");
  1284. goto done;
  1285. }
  1286. buffer = omap3isp_video_buffer_next(&ccdc->video_out);
  1287. if (buffer != NULL) {
  1288. ccdc_set_outaddr(ccdc, buffer->isp_addr);
  1289. restart = 1;
  1290. }
  1291. pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
  1292. if (ccdc->state == ISP_PIPELINE_STREAM_SINGLESHOT &&
  1293. isp_pipeline_ready(pipe))
  1294. omap3isp_pipeline_set_stream(pipe,
  1295. ISP_PIPELINE_STREAM_SINGLESHOT);
  1296. done:
  1297. return restart;
  1298. }
  1299. /*
  1300. * ccdc_vd0_isr - Handle VD0 event
  1301. * @ccdc: Pointer to ISP CCDC device.
  1302. *
  1303. * Executes LSC deferred enablement before next frame starts.
  1304. */
  1305. static void ccdc_vd0_isr(struct isp_ccdc_device *ccdc)
  1306. {
  1307. unsigned long flags;
  1308. int restart = 0;
  1309. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  1310. restart = ccdc_isr_buffer(ccdc);
  1311. spin_lock_irqsave(&ccdc->lock, flags);
  1312. if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD0)) {
  1313. spin_unlock_irqrestore(&ccdc->lock, flags);
  1314. return;
  1315. }
  1316. if (!ccdc->shadow_update)
  1317. ccdc_apply_controls(ccdc);
  1318. spin_unlock_irqrestore(&ccdc->lock, flags);
  1319. if (restart)
  1320. ccdc_enable(ccdc);
  1321. }
  1322. /*
  1323. * ccdc_vd1_isr - Handle VD1 event
  1324. * @ccdc: Pointer to ISP CCDC device.
  1325. */
  1326. static void ccdc_vd1_isr(struct isp_ccdc_device *ccdc)
  1327. {
  1328. unsigned long flags;
  1329. spin_lock_irqsave(&ccdc->lsc.req_lock, flags);
  1330. /*
  1331. * Depending on the CCDC pipeline state, CCDC stopping should be
  1332. * handled differently. In SINGLESHOT we emulate an internal CCDC
  1333. * stopping because the CCDC hw works only in continuous mode.
  1334. * When CONTINUOUS pipeline state is used and the CCDC writes it's
  1335. * data to memory the CCDC and LSC are stopped immediately but
  1336. * without change the CCDC stopping state machine. The CCDC
  1337. * stopping state machine should be used only when user request
  1338. * for stopping is received (SINGLESHOT is an exeption).
  1339. */
  1340. switch (ccdc->state) {
  1341. case ISP_PIPELINE_STREAM_SINGLESHOT:
  1342. ccdc->stopping = CCDC_STOP_REQUEST;
  1343. break;
  1344. case ISP_PIPELINE_STREAM_CONTINUOUS:
  1345. if (ccdc->output & CCDC_OUTPUT_MEMORY) {
  1346. if (ccdc->lsc.state != LSC_STATE_STOPPED)
  1347. __ccdc_lsc_enable(ccdc, 0);
  1348. __ccdc_enable(ccdc, 0);
  1349. }
  1350. break;
  1351. case ISP_PIPELINE_STREAM_STOPPED:
  1352. break;
  1353. }
  1354. if (__ccdc_handle_stopping(ccdc, CCDC_EVENT_VD1))
  1355. goto done;
  1356. if (ccdc->lsc.request == NULL)
  1357. goto done;
  1358. /*
  1359. * LSC need to be reconfigured. Stop it here and on next LSC_DONE IRQ
  1360. * do the appropriate changes in registers
  1361. */
  1362. if (ccdc->lsc.state == LSC_STATE_RUNNING) {
  1363. __ccdc_lsc_enable(ccdc, 0);
  1364. ccdc->lsc.state = LSC_STATE_RECONFIG;
  1365. goto done;
  1366. }
  1367. /* LSC has been in STOPPED state, enable it */
  1368. if (ccdc->lsc.state == LSC_STATE_STOPPED)
  1369. ccdc_lsc_enable(ccdc);
  1370. done:
  1371. spin_unlock_irqrestore(&ccdc->lsc.req_lock, flags);
  1372. }
  1373. /*
  1374. * omap3isp_ccdc_isr - Configure CCDC during interframe time.
  1375. * @ccdc: Pointer to ISP CCDC device.
  1376. * @events: CCDC events
  1377. */
  1378. int omap3isp_ccdc_isr(struct isp_ccdc_device *ccdc, u32 events)
  1379. {
  1380. if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED)
  1381. return 0;
  1382. if (events & IRQ0STATUS_CCDC_VD1_IRQ)
  1383. ccdc_vd1_isr(ccdc);
  1384. ccdc_lsc_isr(ccdc, events);
  1385. if (events & IRQ0STATUS_CCDC_VD0_IRQ)
  1386. ccdc_vd0_isr(ccdc);
  1387. if (events & IRQ0STATUS_HS_VS_IRQ)
  1388. ccdc_hs_vs_isr(ccdc);
  1389. return 0;
  1390. }
  1391. /* -----------------------------------------------------------------------------
  1392. * ISP video operations
  1393. */
  1394. static int ccdc_video_queue(struct isp_video *video, struct isp_buffer *buffer)
  1395. {
  1396. struct isp_ccdc_device *ccdc = &video->isp->isp_ccdc;
  1397. if (!(ccdc->output & CCDC_OUTPUT_MEMORY))
  1398. return -ENODEV;
  1399. ccdc_set_outaddr(ccdc, buffer->isp_addr);
  1400. /* We now have a buffer queued on the output, restart the pipeline
  1401. * on the next CCDC interrupt if running in continuous mode (or when
  1402. * starting the stream).
  1403. */
  1404. ccdc->underrun = 1;
  1405. return 0;
  1406. }
  1407. static const struct isp_video_operations ccdc_video_ops = {
  1408. .queue = ccdc_video_queue,
  1409. };
  1410. /* -----------------------------------------------------------------------------
  1411. * V4L2 subdev operations
  1412. */
  1413. /*
  1414. * ccdc_ioctl - CCDC module private ioctl's
  1415. * @sd: ISP CCDC V4L2 subdevice
  1416. * @cmd: ioctl command
  1417. * @arg: ioctl argument
  1418. *
  1419. * Return 0 on success or a negative error code otherwise.
  1420. */
  1421. static long ccdc_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
  1422. {
  1423. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1424. int ret;
  1425. switch (cmd) {
  1426. case VIDIOC_OMAP3ISP_CCDC_CFG:
  1427. mutex_lock(&ccdc->ioctl_lock);
  1428. ret = ccdc_config(ccdc, arg);
  1429. mutex_unlock(&ccdc->ioctl_lock);
  1430. break;
  1431. default:
  1432. return -ENOIOCTLCMD;
  1433. }
  1434. return ret;
  1435. }
  1436. static int ccdc_subscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
  1437. const struct v4l2_event_subscription *sub)
  1438. {
  1439. if (sub->type != V4L2_EVENT_FRAME_SYNC)
  1440. return -EINVAL;
  1441. /* line number is zero at frame start */
  1442. if (sub->id != 0)
  1443. return -EINVAL;
  1444. return v4l2_event_subscribe(fh, sub, OMAP3ISP_CCDC_NEVENTS, NULL);
  1445. }
  1446. static int ccdc_unsubscribe_event(struct v4l2_subdev *sd, struct v4l2_fh *fh,
  1447. const struct v4l2_event_subscription *sub)
  1448. {
  1449. return v4l2_event_unsubscribe(fh, sub);
  1450. }
  1451. /*
  1452. * ccdc_set_stream - Enable/Disable streaming on the CCDC module
  1453. * @sd: ISP CCDC V4L2 subdevice
  1454. * @enable: Enable/disable stream
  1455. *
  1456. * When writing to memory, the CCDC hardware can't be enabled without a memory
  1457. * buffer to write to. As the s_stream operation is called in response to a
  1458. * STREAMON call without any buffer queued yet, just update the enabled field
  1459. * and return immediately. The CCDC will be enabled in ccdc_isr_buffer().
  1460. *
  1461. * When not writing to memory enable the CCDC immediately.
  1462. */
  1463. static int ccdc_set_stream(struct v4l2_subdev *sd, int enable)
  1464. {
  1465. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1466. struct isp_device *isp = to_isp_device(ccdc);
  1467. int ret = 0;
  1468. if (ccdc->state == ISP_PIPELINE_STREAM_STOPPED) {
  1469. if (enable == ISP_PIPELINE_STREAM_STOPPED)
  1470. return 0;
  1471. omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_CCDC);
  1472. isp_reg_set(isp, OMAP3_ISP_IOMEM_CCDC, ISPCCDC_CFG,
  1473. ISPCCDC_CFG_VDLC);
  1474. ccdc_configure(ccdc);
  1475. /* TODO: Don't configure the video port if all of its output
  1476. * links are inactive.
  1477. */
  1478. ccdc_config_vp(ccdc);
  1479. ccdc_enable_vp(ccdc, 1);
  1480. ccdc_print_status(ccdc);
  1481. }
  1482. switch (enable) {
  1483. case ISP_PIPELINE_STREAM_CONTINUOUS:
  1484. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  1485. omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
  1486. if (ccdc->underrun || !(ccdc->output & CCDC_OUTPUT_MEMORY))
  1487. ccdc_enable(ccdc);
  1488. ccdc->underrun = 0;
  1489. break;
  1490. case ISP_PIPELINE_STREAM_SINGLESHOT:
  1491. if (ccdc->output & CCDC_OUTPUT_MEMORY &&
  1492. ccdc->state != ISP_PIPELINE_STREAM_SINGLESHOT)
  1493. omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
  1494. ccdc_enable(ccdc);
  1495. break;
  1496. case ISP_PIPELINE_STREAM_STOPPED:
  1497. ret = ccdc_disable(ccdc);
  1498. if (ccdc->output & CCDC_OUTPUT_MEMORY)
  1499. omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_CCDC_WRITE);
  1500. omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_CCDC);
  1501. ccdc->underrun = 0;
  1502. break;
  1503. }
  1504. ccdc->state = enable;
  1505. return ret;
  1506. }
  1507. static struct v4l2_mbus_framefmt *
  1508. __ccdc_get_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
  1509. unsigned int pad, enum v4l2_subdev_format_whence which)
  1510. {
  1511. if (which == V4L2_SUBDEV_FORMAT_TRY)
  1512. return v4l2_subdev_get_try_format(fh, pad);
  1513. else
  1514. return &ccdc->formats[pad];
  1515. }
  1516. static struct v4l2_rect *
  1517. __ccdc_get_crop(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
  1518. enum v4l2_subdev_format_whence which)
  1519. {
  1520. if (which == V4L2_SUBDEV_FORMAT_TRY)
  1521. return v4l2_subdev_get_try_crop(fh, CCDC_PAD_SOURCE_OF);
  1522. else
  1523. return &ccdc->crop;
  1524. }
  1525. /*
  1526. * ccdc_try_format - Try video format on a pad
  1527. * @ccdc: ISP CCDC device
  1528. * @fh : V4L2 subdev file handle
  1529. * @pad: Pad number
  1530. * @fmt: Format
  1531. */
  1532. static void
  1533. ccdc_try_format(struct isp_ccdc_device *ccdc, struct v4l2_subdev_fh *fh,
  1534. unsigned int pad, struct v4l2_mbus_framefmt *fmt,
  1535. enum v4l2_subdev_format_whence which)
  1536. {
  1537. const struct isp_format_info *info;
  1538. enum v4l2_mbus_pixelcode pixelcode;
  1539. unsigned int width = fmt->width;
  1540. unsigned int height = fmt->height;
  1541. struct v4l2_rect *crop;
  1542. unsigned int i;
  1543. switch (pad) {
  1544. case CCDC_PAD_SINK:
  1545. for (i = 0; i < ARRAY_SIZE(ccdc_fmts); i++) {
  1546. if (fmt->code == ccdc_fmts[i])
  1547. break;
  1548. }
  1549. /* If not found, use SGRBG10 as default */
  1550. if (i >= ARRAY_SIZE(ccdc_fmts))
  1551. fmt->code = V4L2_MBUS_FMT_SGRBG10_1X10;
  1552. /* Clamp the input size. */
  1553. fmt->width = clamp_t(u32, width, 32, 4096);
  1554. fmt->height = clamp_t(u32, height, 32, 4096);
  1555. break;
  1556. case CCDC_PAD_SOURCE_OF:
  1557. pixelcode = fmt->code;
  1558. *fmt = *__ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
  1559. /* YUV formats are converted from 2X8 to 1X16 by the bridge and
  1560. * can be byte-swapped.
  1561. */
  1562. if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
  1563. fmt->code == V4L2_MBUS_FMT_UYVY8_2X8) {
  1564. /* Use the user requested format if YUV. */
  1565. if (pixelcode == V4L2_MBUS_FMT_YUYV8_2X8 ||
  1566. pixelcode == V4L2_MBUS_FMT_UYVY8_2X8 ||
  1567. pixelcode == V4L2_MBUS_FMT_YUYV8_1X16 ||
  1568. pixelcode == V4L2_MBUS_FMT_UYVY8_1X16)
  1569. fmt->code = pixelcode;
  1570. if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8)
  1571. fmt->code = V4L2_MBUS_FMT_YUYV8_1X16;
  1572. else if (fmt->code == V4L2_MBUS_FMT_UYVY8_2X8)
  1573. fmt->code = V4L2_MBUS_FMT_UYVY8_1X16;
  1574. }
  1575. /* Hardcode the output size to the crop rectangle size. */
  1576. crop = __ccdc_get_crop(ccdc, fh, which);
  1577. fmt->width = crop->width;
  1578. fmt->height = crop->height;
  1579. break;
  1580. case CCDC_PAD_SOURCE_VP:
  1581. *fmt = *__ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, which);
  1582. /* The video port interface truncates the data to 10 bits. */
  1583. info = omap3isp_video_format_info(fmt->code);
  1584. fmt->code = info->truncated;
  1585. /* YUV formats are not supported by the video port. */
  1586. if (fmt->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
  1587. fmt->code == V4L2_MBUS_FMT_UYVY8_2X8)
  1588. fmt->code = 0;
  1589. /* The number of lines that can be clocked out from the video
  1590. * port output must be at least one line less than the number
  1591. * of input lines.
  1592. */
  1593. fmt->width = clamp_t(u32, width, 32, fmt->width);
  1594. fmt->height = clamp_t(u32, height, 32, fmt->height - 1);
  1595. break;
  1596. }
  1597. /* Data is written to memory unpacked, each 10-bit or 12-bit pixel is
  1598. * stored on 2 bytes.
  1599. */
  1600. fmt->colorspace = V4L2_COLORSPACE_SRGB;
  1601. fmt->field = V4L2_FIELD_NONE;
  1602. }
  1603. /*
  1604. * ccdc_try_crop - Validate a crop rectangle
  1605. * @ccdc: ISP CCDC device
  1606. * @sink: format on the sink pad
  1607. * @crop: crop rectangle to be validated
  1608. */
  1609. static void ccdc_try_crop(struct isp_ccdc_device *ccdc,
  1610. const struct v4l2_mbus_framefmt *sink,
  1611. struct v4l2_rect *crop)
  1612. {
  1613. const struct isp_format_info *info;
  1614. unsigned int max_width;
  1615. /* For Bayer formats, restrict left/top and width/height to even values
  1616. * to keep the Bayer pattern.
  1617. */
  1618. info = omap3isp_video_format_info(sink->code);
  1619. if (info->flavor != V4L2_MBUS_FMT_Y8_1X8) {
  1620. crop->left &= ~1;
  1621. crop->top &= ~1;
  1622. }
  1623. crop->left = clamp_t(u32, crop->left, 0, sink->width - CCDC_MIN_WIDTH);
  1624. crop->top = clamp_t(u32, crop->top, 0, sink->height - CCDC_MIN_HEIGHT);
  1625. /* The data formatter truncates the number of horizontal output pixels
  1626. * to a multiple of 16. To avoid clipping data, allow callers to request
  1627. * an output size bigger than the input size up to the nearest multiple
  1628. * of 16.
  1629. */
  1630. max_width = (sink->width - crop->left + 15) & ~15;
  1631. crop->width = clamp_t(u32, crop->width, CCDC_MIN_WIDTH, max_width)
  1632. & ~15;
  1633. crop->height = clamp_t(u32, crop->height, CCDC_MIN_HEIGHT,
  1634. sink->height - crop->top);
  1635. /* Odd width/height values don't make sense for Bayer formats. */
  1636. if (info->flavor != V4L2_MBUS_FMT_Y8_1X8) {
  1637. crop->width &= ~1;
  1638. crop->height &= ~1;
  1639. }
  1640. }
  1641. /*
  1642. * ccdc_enum_mbus_code - Handle pixel format enumeration
  1643. * @sd : pointer to v4l2 subdev structure
  1644. * @fh : V4L2 subdev file handle
  1645. * @code : pointer to v4l2_subdev_mbus_code_enum structure
  1646. * return -EINVAL or zero on success
  1647. */
  1648. static int ccdc_enum_mbus_code(struct v4l2_subdev *sd,
  1649. struct v4l2_subdev_fh *fh,
  1650. struct v4l2_subdev_mbus_code_enum *code)
  1651. {
  1652. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1653. struct v4l2_mbus_framefmt *format;
  1654. switch (code->pad) {
  1655. case CCDC_PAD_SINK:
  1656. if (code->index >= ARRAY_SIZE(ccdc_fmts))
  1657. return -EINVAL;
  1658. code->code = ccdc_fmts[code->index];
  1659. break;
  1660. case CCDC_PAD_SOURCE_OF:
  1661. format = __ccdc_get_format(ccdc, fh, code->pad,
  1662. V4L2_SUBDEV_FORMAT_TRY);
  1663. if (format->code == V4L2_MBUS_FMT_YUYV8_2X8 ||
  1664. format->code == V4L2_MBUS_FMT_UYVY8_2X8) {
  1665. /* In YUV mode the CCDC can swap bytes. */
  1666. if (code->index == 0)
  1667. code->code = V4L2_MBUS_FMT_YUYV8_1X16;
  1668. else if (code->index == 1)
  1669. code->code = V4L2_MBUS_FMT_UYVY8_1X16;
  1670. else
  1671. return -EINVAL;
  1672. } else {
  1673. /* In raw mode, no configurable format confversion is
  1674. * available.
  1675. */
  1676. if (code->index == 0)
  1677. code->code = format->code;
  1678. else
  1679. return -EINVAL;
  1680. }
  1681. break;
  1682. case CCDC_PAD_SOURCE_VP:
  1683. /* The CCDC supports no configurable format conversion
  1684. * compatible with the video port. Enumerate a single output
  1685. * format code.
  1686. */
  1687. if (code->index != 0)
  1688. return -EINVAL;
  1689. format = __ccdc_get_format(ccdc, fh, code->pad,
  1690. V4L2_SUBDEV_FORMAT_TRY);
  1691. /* A pixel code equal to 0 means that the video port doesn't
  1692. * support the input format. Don't enumerate any pixel code.
  1693. */
  1694. if (format->code == 0)
  1695. return -EINVAL;
  1696. code->code = format->code;
  1697. break;
  1698. default:
  1699. return -EINVAL;
  1700. }
  1701. return 0;
  1702. }
  1703. static int ccdc_enum_frame_size(struct v4l2_subdev *sd,
  1704. struct v4l2_subdev_fh *fh,
  1705. struct v4l2_subdev_frame_size_enum *fse)
  1706. {
  1707. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1708. struct v4l2_mbus_framefmt format;
  1709. if (fse->index != 0)
  1710. return -EINVAL;
  1711. format.code = fse->code;
  1712. format.width = 1;
  1713. format.height = 1;
  1714. ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
  1715. fse->min_width = format.width;
  1716. fse->min_height = format.height;
  1717. if (format.code != fse->code)
  1718. return -EINVAL;
  1719. format.code = fse->code;
  1720. format.width = -1;
  1721. format.height = -1;
  1722. ccdc_try_format(ccdc, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
  1723. fse->max_width = format.width;
  1724. fse->max_height = format.height;
  1725. return 0;
  1726. }
  1727. /*
  1728. * ccdc_get_selection - Retrieve a selection rectangle on a pad
  1729. * @sd: ISP CCDC V4L2 subdevice
  1730. * @fh: V4L2 subdev file handle
  1731. * @sel: Selection rectangle
  1732. *
  1733. * The only supported rectangles are the crop rectangles on the output formatter
  1734. * source pad.
  1735. *
  1736. * Return 0 on success or a negative error code otherwise.
  1737. */
  1738. static int ccdc_get_selection(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
  1739. struct v4l2_subdev_selection *sel)
  1740. {
  1741. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1742. struct v4l2_mbus_framefmt *format;
  1743. if (sel->pad != CCDC_PAD_SOURCE_OF)
  1744. return -EINVAL;
  1745. switch (sel->target) {
  1746. case V4L2_SEL_TGT_CROP_BOUNDS:
  1747. sel->r.left = 0;
  1748. sel->r.top = 0;
  1749. sel->r.width = INT_MAX;
  1750. sel->r.height = INT_MAX;
  1751. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, sel->which);
  1752. ccdc_try_crop(ccdc, format, &sel->r);
  1753. break;
  1754. case V4L2_SEL_TGT_CROP:
  1755. sel->r = *__ccdc_get_crop(ccdc, fh, sel->which);
  1756. break;
  1757. default:
  1758. return -EINVAL;
  1759. }
  1760. return 0;
  1761. }
  1762. /*
  1763. * ccdc_set_selection - Set a selection rectangle on a pad
  1764. * @sd: ISP CCDC V4L2 subdevice
  1765. * @fh: V4L2 subdev file handle
  1766. * @sel: Selection rectangle
  1767. *
  1768. * The only supported rectangle is the actual crop rectangle on the output
  1769. * formatter source pad.
  1770. *
  1771. * Return 0 on success or a negative error code otherwise.
  1772. */
  1773. static int ccdc_set_selection(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
  1774. struct v4l2_subdev_selection *sel)
  1775. {
  1776. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1777. struct v4l2_mbus_framefmt *format;
  1778. if (sel->target != V4L2_SEL_TGT_CROP ||
  1779. sel->pad != CCDC_PAD_SOURCE_OF)
  1780. return -EINVAL;
  1781. /* The crop rectangle can't be changed while streaming. */
  1782. if (ccdc->state != ISP_PIPELINE_STREAM_STOPPED)
  1783. return -EBUSY;
  1784. /* Modifying the crop rectangle always changes the format on the source
  1785. * pad. If the KEEP_CONFIG flag is set, just return the current crop
  1786. * rectangle.
  1787. */
  1788. if (sel->flags & V4L2_SEL_FLAG_KEEP_CONFIG) {
  1789. sel->r = *__ccdc_get_crop(ccdc, fh, sel->which);
  1790. return 0;
  1791. }
  1792. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SINK, sel->which);
  1793. ccdc_try_crop(ccdc, format, &sel->r);
  1794. *__ccdc_get_crop(ccdc, fh, sel->which) = sel->r;
  1795. /* Update the source format. */
  1796. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_OF, sel->which);
  1797. ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_OF, format, sel->which);
  1798. return 0;
  1799. }
  1800. /*
  1801. * ccdc_get_format - Retrieve the video format on a pad
  1802. * @sd : ISP CCDC V4L2 subdevice
  1803. * @fh : V4L2 subdev file handle
  1804. * @fmt: Format
  1805. *
  1806. * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
  1807. * to the format type.
  1808. */
  1809. static int ccdc_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
  1810. struct v4l2_subdev_format *fmt)
  1811. {
  1812. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1813. struct v4l2_mbus_framefmt *format;
  1814. format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
  1815. if (format == NULL)
  1816. return -EINVAL;
  1817. fmt->format = *format;
  1818. return 0;
  1819. }
  1820. /*
  1821. * ccdc_set_format - Set the video format on a pad
  1822. * @sd : ISP CCDC V4L2 subdevice
  1823. * @fh : V4L2 subdev file handle
  1824. * @fmt: Format
  1825. *
  1826. * Return 0 on success or -EINVAL if the pad is invalid or doesn't correspond
  1827. * to the format type.
  1828. */
  1829. static int ccdc_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
  1830. struct v4l2_subdev_format *fmt)
  1831. {
  1832. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1833. struct v4l2_mbus_framefmt *format;
  1834. struct v4l2_rect *crop;
  1835. format = __ccdc_get_format(ccdc, fh, fmt->pad, fmt->which);
  1836. if (format == NULL)
  1837. return -EINVAL;
  1838. ccdc_try_format(ccdc, fh, fmt->pad, &fmt->format, fmt->which);
  1839. *format = fmt->format;
  1840. /* Propagate the format from sink to source */
  1841. if (fmt->pad == CCDC_PAD_SINK) {
  1842. /* Reset the crop rectangle. */
  1843. crop = __ccdc_get_crop(ccdc, fh, fmt->which);
  1844. crop->left = 0;
  1845. crop->top = 0;
  1846. crop->width = fmt->format.width;
  1847. crop->height = fmt->format.height;
  1848. ccdc_try_crop(ccdc, &fmt->format, crop);
  1849. /* Update the source formats. */
  1850. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_OF,
  1851. fmt->which);
  1852. *format = fmt->format;
  1853. ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_OF, format,
  1854. fmt->which);
  1855. format = __ccdc_get_format(ccdc, fh, CCDC_PAD_SOURCE_VP,
  1856. fmt->which);
  1857. *format = fmt->format;
  1858. ccdc_try_format(ccdc, fh, CCDC_PAD_SOURCE_VP, format,
  1859. fmt->which);
  1860. }
  1861. return 0;
  1862. }
  1863. /*
  1864. * Decide whether desired output pixel code can be obtained with
  1865. * the lane shifter by shifting the input pixel code.
  1866. * @in: input pixelcode to shifter
  1867. * @out: output pixelcode from shifter
  1868. * @additional_shift: # of bits the sensor's LSB is offset from CAMEXT[0]
  1869. *
  1870. * return true if the combination is possible
  1871. * return false otherwise
  1872. */
  1873. static bool ccdc_is_shiftable(enum v4l2_mbus_pixelcode in,
  1874. enum v4l2_mbus_pixelcode out,
  1875. unsigned int additional_shift)
  1876. {
  1877. const struct isp_format_info *in_info, *out_info;
  1878. if (in == out)
  1879. return true;
  1880. in_info = omap3isp_video_format_info(in);
  1881. out_info = omap3isp_video_format_info(out);
  1882. if ((in_info->flavor == 0) || (out_info->flavor == 0))
  1883. return false;
  1884. if (in_info->flavor != out_info->flavor)
  1885. return false;
  1886. return in_info->width - out_info->width + additional_shift <= 6;
  1887. }
  1888. static int ccdc_link_validate(struct v4l2_subdev *sd,
  1889. struct media_link *link,
  1890. struct v4l2_subdev_format *source_fmt,
  1891. struct v4l2_subdev_format *sink_fmt)
  1892. {
  1893. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1894. unsigned long parallel_shift;
  1895. /* Check if the two ends match */
  1896. if (source_fmt->format.width != sink_fmt->format.width ||
  1897. source_fmt->format.height != sink_fmt->format.height)
  1898. return -EPIPE;
  1899. /* We've got a parallel sensor here. */
  1900. if (ccdc->input == CCDC_INPUT_PARALLEL) {
  1901. struct isp_parallel_platform_data *pdata =
  1902. &((struct isp_v4l2_subdevs_group *)
  1903. media_entity_to_v4l2_subdev(link->source->entity)
  1904. ->host_priv)->bus.parallel;
  1905. parallel_shift = pdata->data_lane_shift * 2;
  1906. } else {
  1907. parallel_shift = 0;
  1908. }
  1909. /* Lane shifter may be used to drop bits on CCDC sink pad */
  1910. if (!ccdc_is_shiftable(source_fmt->format.code,
  1911. sink_fmt->format.code, parallel_shift))
  1912. return -EPIPE;
  1913. return 0;
  1914. }
  1915. /*
  1916. * ccdc_init_formats - Initialize formats on all pads
  1917. * @sd: ISP CCDC V4L2 subdevice
  1918. * @fh: V4L2 subdev file handle
  1919. *
  1920. * Initialize all pad formats with default values. If fh is not NULL, try
  1921. * formats are initialized on the file handle. Otherwise active formats are
  1922. * initialized on the device.
  1923. */
  1924. static int ccdc_init_formats(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
  1925. {
  1926. struct v4l2_subdev_format format;
  1927. memset(&format, 0, sizeof(format));
  1928. format.pad = CCDC_PAD_SINK;
  1929. format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
  1930. format.format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
  1931. format.format.width = 4096;
  1932. format.format.height = 4096;
  1933. ccdc_set_format(sd, fh, &format);
  1934. return 0;
  1935. }
  1936. /* V4L2 subdev core operations */
  1937. static const struct v4l2_subdev_core_ops ccdc_v4l2_core_ops = {
  1938. .ioctl = ccdc_ioctl,
  1939. .subscribe_event = ccdc_subscribe_event,
  1940. .unsubscribe_event = ccdc_unsubscribe_event,
  1941. };
  1942. /* V4L2 subdev video operations */
  1943. static const struct v4l2_subdev_video_ops ccdc_v4l2_video_ops = {
  1944. .s_stream = ccdc_set_stream,
  1945. };
  1946. /* V4L2 subdev pad operations */
  1947. static const struct v4l2_subdev_pad_ops ccdc_v4l2_pad_ops = {
  1948. .enum_mbus_code = ccdc_enum_mbus_code,
  1949. .enum_frame_size = ccdc_enum_frame_size,
  1950. .get_fmt = ccdc_get_format,
  1951. .set_fmt = ccdc_set_format,
  1952. .get_selection = ccdc_get_selection,
  1953. .set_selection = ccdc_set_selection,
  1954. .link_validate = ccdc_link_validate,
  1955. };
  1956. /* V4L2 subdev operations */
  1957. static const struct v4l2_subdev_ops ccdc_v4l2_ops = {
  1958. .core = &ccdc_v4l2_core_ops,
  1959. .video = &ccdc_v4l2_video_ops,
  1960. .pad = &ccdc_v4l2_pad_ops,
  1961. };
  1962. /* V4L2 subdev internal operations */
  1963. static const struct v4l2_subdev_internal_ops ccdc_v4l2_internal_ops = {
  1964. .open = ccdc_init_formats,
  1965. };
  1966. /* -----------------------------------------------------------------------------
  1967. * Media entity operations
  1968. */
  1969. /*
  1970. * ccdc_link_setup - Setup CCDC connections
  1971. * @entity: CCDC media entity
  1972. * @local: Pad at the local end of the link
  1973. * @remote: Pad at the remote end of the link
  1974. * @flags: Link flags
  1975. *
  1976. * return -EINVAL or zero on success
  1977. */
  1978. static int ccdc_link_setup(struct media_entity *entity,
  1979. const struct media_pad *local,
  1980. const struct media_pad *remote, u32 flags)
  1981. {
  1982. struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
  1983. struct isp_ccdc_device *ccdc = v4l2_get_subdevdata(sd);
  1984. struct isp_device *isp = to_isp_device(ccdc);
  1985. switch (local->index | media_entity_type(remote->entity)) {
  1986. case CCDC_PAD_SINK | MEDIA_ENT_T_V4L2_SUBDEV:
  1987. /* Read from the sensor (parallel interface), CCP2, CSI2a or
  1988. * CSI2c.
  1989. */
  1990. if (!(flags & MEDIA_LNK_FL_ENABLED)) {
  1991. ccdc->input = CCDC_INPUT_NONE;
  1992. break;
  1993. }
  1994. if (ccdc->input != CCDC_INPUT_NONE)
  1995. return -EBUSY;
  1996. if (remote->entity == &isp->isp_ccp2.subdev.entity)
  1997. ccdc->input = CCDC_INPUT_CCP2B;
  1998. else if (remote->entity == &isp->isp_csi2a.subdev.entity)
  1999. ccdc->input = CCDC_INPUT_CSI2A;
  2000. else if (remote->entity == &isp->isp_csi2c.subdev.entity)
  2001. ccdc->input = CCDC_INPUT_CSI2C;
  2002. else
  2003. ccdc->input = CCDC_INPUT_PARALLEL;
  2004. break;
  2005. /*
  2006. * The ISP core doesn't support pipelines with multiple video outputs.
  2007. * Revisit this when it will be implemented, and return -EBUSY for now.
  2008. */
  2009. case CCDC_PAD_SOURCE_VP | MEDIA_ENT_T_V4L2_SUBDEV:
  2010. /* Write to preview engine, histogram and H3A. When none of
  2011. * those links are active, the video port can be disabled.
  2012. */
  2013. if (flags & MEDIA_LNK_FL_ENABLED) {
  2014. if (ccdc->output & ~CCDC_OUTPUT_PREVIEW)
  2015. return -EBUSY;
  2016. ccdc->output |= CCDC_OUTPUT_PREVIEW;
  2017. } else {
  2018. ccdc->output &= ~CCDC_OUTPUT_PREVIEW;
  2019. }
  2020. break;
  2021. case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_DEVNODE:
  2022. /* Write to memory */
  2023. if (flags & MEDIA_LNK_FL_ENABLED) {
  2024. if (ccdc->output & ~CCDC_OUTPUT_MEMORY)
  2025. return -EBUSY;
  2026. ccdc->output |= CCDC_OUTPUT_MEMORY;
  2027. } else {
  2028. ccdc->output &= ~CCDC_OUTPUT_MEMORY;
  2029. }
  2030. break;
  2031. case CCDC_PAD_SOURCE_OF | MEDIA_ENT_T_V4L2_SUBDEV:
  2032. /* Write to resizer */
  2033. if (flags & MEDIA_LNK_FL_ENABLED) {
  2034. if (ccdc->output & ~CCDC_OUTPUT_RESIZER)
  2035. return -EBUSY;
  2036. ccdc->output |= CCDC_OUTPUT_RESIZER;
  2037. } else {
  2038. ccdc->output &= ~CCDC_OUTPUT_RESIZER;
  2039. }
  2040. break;
  2041. default:
  2042. return -EINVAL;
  2043. }
  2044. return 0;
  2045. }
  2046. /* media operations */
  2047. static const struct media_entity_operations ccdc_media_ops = {
  2048. .link_setup = ccdc_link_setup,
  2049. .link_validate = v4l2_subdev_link_validate,
  2050. };
  2051. void omap3isp_ccdc_unregister_entities(struct isp_ccdc_device *ccdc)
  2052. {
  2053. v4l2_device_unregister_subdev(&ccdc->subdev);
  2054. omap3isp_video_unregister(&ccdc->video_out);
  2055. }
  2056. int omap3isp_ccdc_register_entities(struct isp_ccdc_device *ccdc,
  2057. struct v4l2_device *vdev)
  2058. {
  2059. int ret;
  2060. /* Register the subdev and video node. */
  2061. ret = v4l2_device_register_subdev(vdev, &ccdc->subdev);
  2062. if (ret < 0)
  2063. goto error;
  2064. ret = omap3isp_video_register(&ccdc->video_out, vdev);
  2065. if (ret < 0)
  2066. goto error;
  2067. return 0;
  2068. error:
  2069. omap3isp_ccdc_unregister_entities(ccdc);
  2070. return ret;
  2071. }
  2072. /* -----------------------------------------------------------------------------
  2073. * ISP CCDC initialisation and cleanup
  2074. */
  2075. /*
  2076. * ccdc_init_entities - Initialize V4L2 subdev and media entity
  2077. * @ccdc: ISP CCDC module
  2078. *
  2079. * Return 0 on success and a negative error code on failure.
  2080. */
  2081. static int ccdc_init_entities(struct isp_ccdc_device *ccdc)
  2082. {
  2083. struct v4l2_subdev *sd = &ccdc->subdev;
  2084. struct media_pad *pads = ccdc->pads;
  2085. struct media_entity *me = &sd->entity;
  2086. int ret;
  2087. ccdc->input = CCDC_INPUT_NONE;
  2088. v4l2_subdev_init(sd, &ccdc_v4l2_ops);
  2089. sd->internal_ops = &ccdc_v4l2_internal_ops;
  2090. strlcpy(sd->name, "OMAP3 ISP CCDC", sizeof(sd->name));
  2091. sd->grp_id = 1 << 16; /* group ID for isp subdevs */
  2092. v4l2_set_subdevdata(sd, ccdc);
  2093. sd->flags |= V4L2_SUBDEV_FL_HAS_EVENTS | V4L2_SUBDEV_FL_HAS_DEVNODE;
  2094. pads[CCDC_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
  2095. pads[CCDC_PAD_SOURCE_VP].flags = MEDIA_PAD_FL_SOURCE;
  2096. pads[CCDC_PAD_SOURCE_OF].flags = MEDIA_PAD_FL_SOURCE;
  2097. me->ops = &ccdc_media_ops;
  2098. ret = media_entity_init(me, CCDC_PADS_NUM, pads, 0);
  2099. if (ret < 0)
  2100. return ret;
  2101. ccdc_init_formats(sd, NULL);
  2102. ccdc->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  2103. ccdc->video_out.ops = &ccdc_video_ops;
  2104. ccdc->video_out.isp = to_isp_device(ccdc);
  2105. ccdc->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 3;
  2106. ccdc->video_out.bpl_alignment = 32;
  2107. ret = omap3isp_video_init(&ccdc->video_out, "CCDC");
  2108. if (ret < 0)
  2109. goto error_video;
  2110. /* Connect the CCDC subdev to the video node. */
  2111. ret = media_entity_create_link(&ccdc->subdev.entity, CCDC_PAD_SOURCE_OF,
  2112. &ccdc->video_out.video.entity, 0, 0);
  2113. if (ret < 0)
  2114. goto error_link;
  2115. return 0;
  2116. error_link:
  2117. omap3isp_video_cleanup(&ccdc->video_out);
  2118. error_video:
  2119. media_entity_cleanup(me);
  2120. return ret;
  2121. }
  2122. /*
  2123. * omap3isp_ccdc_init - CCDC module initialization.
  2124. * @dev: Device pointer specific to the OMAP3 ISP.
  2125. *
  2126. * TODO: Get the initialisation values from platform data.
  2127. *
  2128. * Return 0 on success or a negative error code otherwise.
  2129. */
  2130. int omap3isp_ccdc_init(struct isp_device *isp)
  2131. {
  2132. struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
  2133. int ret;
  2134. spin_lock_init(&ccdc->lock);
  2135. init_waitqueue_head(&ccdc->wait);
  2136. mutex_init(&ccdc->ioctl_lock);
  2137. ccdc->stopping = CCDC_STOP_NOT_REQUESTED;
  2138. INIT_WORK(&ccdc->lsc.table_work, ccdc_lsc_free_table_work);
  2139. ccdc->lsc.state = LSC_STATE_STOPPED;
  2140. INIT_LIST_HEAD(&ccdc->lsc.free_queue);
  2141. spin_lock_init(&ccdc->lsc.req_lock);
  2142. ccdc->clamp.oblen = 0;
  2143. ccdc->clamp.dcsubval = 0;
  2144. ccdc->update = OMAP3ISP_CCDC_BLCLAMP;
  2145. ccdc_apply_controls(ccdc);
  2146. ret = ccdc_init_entities(ccdc);
  2147. if (ret < 0) {
  2148. mutex_destroy(&ccdc->ioctl_lock);
  2149. return ret;
  2150. }
  2151. return 0;
  2152. }
  2153. /*
  2154. * omap3isp_ccdc_cleanup - CCDC module cleanup.
  2155. * @dev: Device pointer specific to the OMAP3 ISP.
  2156. */
  2157. void omap3isp_ccdc_cleanup(struct isp_device *isp)
  2158. {
  2159. struct isp_ccdc_device *ccdc = &isp->isp_ccdc;
  2160. omap3isp_video_cleanup(&ccdc->video_out);
  2161. media_entity_cleanup(&ccdc->subdev.entity);
  2162. /* Free LSC requests. As the CCDC is stopped there's no active request,
  2163. * so only the pending request and the free queue need to be handled.
  2164. */
  2165. ccdc_lsc_free_request(ccdc, ccdc->lsc.request);
  2166. cancel_work_sync(&ccdc->lsc.table_work);
  2167. ccdc_lsc_free_queue(ccdc, &ccdc->lsc.free_queue);
  2168. if (ccdc->fpc.fpcaddr != 0)
  2169. omap_iommu_vfree(isp->domain, isp->dev, ccdc->fpc.fpcaddr);
  2170. mutex_destroy(&ccdc->ioctl_lock);
  2171. }