fw.c 22 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2009-2010 Realtek Corporation.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * wlanfae <wlanfae@realtek.com>
  23. * Realtek Corporation, No. 2, Innovation Road II, Hsinchu Science Park,
  24. * Hsinchu 300, Taiwan.
  25. *
  26. * Larry Finger <Larry.Finger@lwfinger.net>
  27. *
  28. *****************************************************************************/
  29. #include <linux/firmware.h>
  30. #include "../wifi.h"
  31. #include "../pci.h"
  32. #include "../base.h"
  33. #include "reg.h"
  34. #include "def.h"
  35. #include "fw.h"
  36. #include "table.h"
  37. static void _rtl92c_enable_fw_download(struct ieee80211_hw *hw, bool enable)
  38. {
  39. struct rtl_priv *rtlpriv = rtl_priv(hw);
  40. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  41. if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192CU) {
  42. u32 value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  43. if (enable)
  44. value32 |= MCUFWDL_EN;
  45. else
  46. value32 &= ~MCUFWDL_EN;
  47. rtl_write_dword(rtlpriv, REG_MCUFWDL, value32);
  48. } else if (rtlhal->hw_type == HARDWARE_TYPE_RTL8192CE) {
  49. u8 tmp;
  50. if (enable) {
  51. tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
  52. rtl_write_byte(rtlpriv, REG_SYS_FUNC_EN + 1,
  53. tmp | 0x04);
  54. tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL);
  55. rtl_write_byte(rtlpriv, REG_MCUFWDL, tmp | 0x01);
  56. tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL + 2);
  57. rtl_write_byte(rtlpriv, REG_MCUFWDL + 2, tmp & 0xf7);
  58. } else {
  59. tmp = rtl_read_byte(rtlpriv, REG_MCUFWDL);
  60. rtl_write_byte(rtlpriv, REG_MCUFWDL, tmp & 0xfe);
  61. rtl_write_byte(rtlpriv, REG_MCUFWDL + 1, 0x00);
  62. }
  63. }
  64. }
  65. static void _rtl92c_fw_block_write(struct ieee80211_hw *hw,
  66. const u8 *buffer, u32 size)
  67. {
  68. struct rtl_priv *rtlpriv = rtl_priv(hw);
  69. u32 blockSize = sizeof(u32);
  70. u8 *bufferPtr = (u8 *) buffer;
  71. u32 *pu4BytePtr = (u32 *) buffer;
  72. u32 i, offset, blockCount, remainSize;
  73. blockCount = size / blockSize;
  74. remainSize = size % blockSize;
  75. for (i = 0; i < blockCount; i++) {
  76. offset = i * blockSize;
  77. rtl_write_dword(rtlpriv, (FW_8192C_START_ADDRESS + offset),
  78. *(pu4BytePtr + i));
  79. }
  80. if (remainSize) {
  81. offset = blockCount * blockSize;
  82. bufferPtr += offset;
  83. for (i = 0; i < remainSize; i++) {
  84. rtl_write_byte(rtlpriv, (FW_8192C_START_ADDRESS +
  85. offset + i), *(bufferPtr + i));
  86. }
  87. }
  88. }
  89. static void _rtl92c_fw_page_write(struct ieee80211_hw *hw,
  90. u32 page, const u8 *buffer, u32 size)
  91. {
  92. struct rtl_priv *rtlpriv = rtl_priv(hw);
  93. u8 value8;
  94. u8 u8page = (u8) (page & 0x07);
  95. value8 = (rtl_read_byte(rtlpriv, REG_MCUFWDL + 2) & 0xF8) | u8page;
  96. rtl_write_byte(rtlpriv, (REG_MCUFWDL + 2), value8);
  97. _rtl92c_fw_block_write(hw, buffer, size);
  98. }
  99. static void _rtl92c_fill_dummy(u8 *pfwbuf, u32 *pfwlen)
  100. {
  101. u32 fwlen = *pfwlen;
  102. u8 remain = (u8) (fwlen % 4);
  103. remain = (remain == 0) ? 0 : (4 - remain);
  104. while (remain > 0) {
  105. pfwbuf[fwlen] = 0;
  106. fwlen++;
  107. remain--;
  108. }
  109. *pfwlen = fwlen;
  110. }
  111. static void _rtl92c_write_fw(struct ieee80211_hw *hw,
  112. enum version_8192c version, u8 *buffer, u32 size)
  113. {
  114. struct rtl_priv *rtlpriv = rtl_priv(hw);
  115. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  116. u8 *bufferPtr = (u8 *) buffer;
  117. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE, ("FW size is %d bytes,\n", size));
  118. if (IS_CHIP_VER_B(version)) {
  119. u32 pageNums, remainSize;
  120. u32 page, offset;
  121. if (IS_HARDWARE_TYPE_8192CE(rtlhal))
  122. _rtl92c_fill_dummy(bufferPtr, &size);
  123. pageNums = size / FW_8192C_PAGE_SIZE;
  124. remainSize = size % FW_8192C_PAGE_SIZE;
  125. if (pageNums > 4) {
  126. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  127. ("Page numbers should not greater then 4\n"));
  128. }
  129. for (page = 0; page < pageNums; page++) {
  130. offset = page * FW_8192C_PAGE_SIZE;
  131. _rtl92c_fw_page_write(hw, page, (bufferPtr + offset),
  132. FW_8192C_PAGE_SIZE);
  133. }
  134. if (remainSize) {
  135. offset = pageNums * FW_8192C_PAGE_SIZE;
  136. page = pageNums;
  137. _rtl92c_fw_page_write(hw, page, (bufferPtr + offset),
  138. remainSize);
  139. }
  140. } else {
  141. _rtl92c_fw_block_write(hw, buffer, size);
  142. }
  143. }
  144. static int _rtl92c_fw_free_to_go(struct ieee80211_hw *hw)
  145. {
  146. struct rtl_priv *rtlpriv = rtl_priv(hw);
  147. int err = -EIO;
  148. u32 counter = 0;
  149. u32 value32;
  150. do {
  151. value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  152. } while ((counter++ < FW_8192C_POLLING_TIMEOUT_COUNT) &&
  153. (!(value32 & FWDL_ChkSum_rpt)));
  154. if (counter >= FW_8192C_POLLING_TIMEOUT_COUNT) {
  155. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  156. ("chksum report faill ! REG_MCUFWDL:0x%08x .\n",
  157. value32));
  158. goto exit;
  159. }
  160. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  161. ("Checksum report OK ! REG_MCUFWDL:0x%08x .\n", value32));
  162. value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  163. value32 |= MCUFWDL_RDY;
  164. value32 &= ~WINTINI_RDY;
  165. rtl_write_dword(rtlpriv, REG_MCUFWDL, value32);
  166. counter = 0;
  167. do {
  168. value32 = rtl_read_dword(rtlpriv, REG_MCUFWDL);
  169. if (value32 & WINTINI_RDY) {
  170. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  171. ("Polling FW ready success!!"
  172. " REG_MCUFWDL:0x%08x .\n",
  173. value32));
  174. err = 0;
  175. goto exit;
  176. }
  177. mdelay(FW_8192C_POLLING_DELAY);
  178. } while (counter++ < FW_8192C_POLLING_TIMEOUT_COUNT);
  179. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  180. ("Polling FW ready fail!! REG_MCUFWDL:0x%08x .\n", value32));
  181. exit:
  182. return err;
  183. }
  184. int rtl92c_download_fw(struct ieee80211_hw *hw)
  185. {
  186. struct rtl_priv *rtlpriv = rtl_priv(hw);
  187. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  188. struct rtl92c_firmware_header *pfwheader;
  189. u8 *pfwdata;
  190. u32 fwsize;
  191. int err;
  192. enum version_8192c version = rtlhal->version;
  193. const struct firmware *firmware;
  194. printk(KERN_INFO "rtl8192cu: Loading firmware file %s\n",
  195. rtlpriv->cfg->fw_name);
  196. err = request_firmware(&firmware, rtlpriv->cfg->fw_name,
  197. rtlpriv->io.dev);
  198. if (err) {
  199. printk(KERN_ERR "rtl8192cu: Firmware loading failed\n");
  200. return 1;
  201. }
  202. if (firmware->size > 0x4000) {
  203. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  204. ("Firmware is too big!\n"));
  205. release_firmware(firmware);
  206. return 1;
  207. }
  208. memcpy(rtlhal->pfirmware, firmware->data, firmware->size);
  209. fwsize = firmware->size;
  210. release_firmware(firmware);
  211. pfwheader = (struct rtl92c_firmware_header *)rtlhal->pfirmware;
  212. pfwdata = (u8 *) rtlhal->pfirmware;
  213. if (IS_FW_HEADER_EXIST(pfwheader)) {
  214. RT_TRACE(rtlpriv, COMP_FW, DBG_DMESG,
  215. ("Firmware Version(%d), Signature(%#x),Size(%d)\n",
  216. pfwheader->version, pfwheader->signature,
  217. (uint)sizeof(struct rtl92c_firmware_header)));
  218. pfwdata = pfwdata + sizeof(struct rtl92c_firmware_header);
  219. fwsize = fwsize - sizeof(struct rtl92c_firmware_header);
  220. }
  221. _rtl92c_enable_fw_download(hw, true);
  222. _rtl92c_write_fw(hw, version, pfwdata, fwsize);
  223. _rtl92c_enable_fw_download(hw, false);
  224. err = _rtl92c_fw_free_to_go(hw);
  225. if (err) {
  226. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  227. ("Firmware is not ready to run!\n"));
  228. } else {
  229. RT_TRACE(rtlpriv, COMP_FW, DBG_TRACE,
  230. ("Firmware is ready to run!\n"));
  231. }
  232. return 0;
  233. }
  234. static bool _rtl92c_check_fw_read_last_h2c(struct ieee80211_hw *hw, u8 boxnum)
  235. {
  236. struct rtl_priv *rtlpriv = rtl_priv(hw);
  237. u8 val_hmetfr, val_mcutst_1;
  238. bool result = false;
  239. val_hmetfr = rtl_read_byte(rtlpriv, REG_HMETFR);
  240. val_mcutst_1 = rtl_read_byte(rtlpriv, (REG_MCUTST_1 + boxnum));
  241. if (((val_hmetfr >> boxnum) & BIT(0)) == 0 && val_mcutst_1 == 0)
  242. result = true;
  243. return result;
  244. }
  245. static void _rtl92c_fill_h2c_command(struct ieee80211_hw *hw,
  246. u8 element_id, u32 cmd_len, u8 *p_cmdbuffer)
  247. {
  248. struct rtl_priv *rtlpriv = rtl_priv(hw);
  249. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  250. u8 boxnum;
  251. u16 box_reg, box_extreg;
  252. u8 u1b_tmp;
  253. bool isfw_read = false;
  254. u8 buf_index;
  255. bool bwrite_sucess = false;
  256. u8 wait_h2c_limmit = 100;
  257. u8 wait_writeh2c_limmit = 100;
  258. u8 boxcontent[4], boxextcontent[2];
  259. u32 h2c_waitcounter = 0;
  260. unsigned long flag;
  261. u8 idx;
  262. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, ("come in\n"));
  263. while (true) {
  264. spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
  265. if (rtlhal->h2c_setinprogress) {
  266. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  267. ("H2C set in progress! Wait to set.."
  268. "element_id(%d).\n", element_id));
  269. while (rtlhal->h2c_setinprogress) {
  270. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock,
  271. flag);
  272. h2c_waitcounter++;
  273. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  274. ("Wait 100 us (%d times)...\n",
  275. h2c_waitcounter));
  276. udelay(100);
  277. if (h2c_waitcounter > 1000)
  278. return;
  279. spin_lock_irqsave(&rtlpriv->locks.h2c_lock,
  280. flag);
  281. }
  282. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  283. } else {
  284. rtlhal->h2c_setinprogress = true;
  285. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  286. break;
  287. }
  288. }
  289. while (!bwrite_sucess) {
  290. wait_writeh2c_limmit--;
  291. if (wait_writeh2c_limmit == 0) {
  292. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  293. ("Write H2C fail because no trigger "
  294. "for FW INT!\n"));
  295. break;
  296. }
  297. boxnum = rtlhal->last_hmeboxnum;
  298. switch (boxnum) {
  299. case 0:
  300. box_reg = REG_HMEBOX_0;
  301. box_extreg = REG_HMEBOX_EXT_0;
  302. break;
  303. case 1:
  304. box_reg = REG_HMEBOX_1;
  305. box_extreg = REG_HMEBOX_EXT_1;
  306. break;
  307. case 2:
  308. box_reg = REG_HMEBOX_2;
  309. box_extreg = REG_HMEBOX_EXT_2;
  310. break;
  311. case 3:
  312. box_reg = REG_HMEBOX_3;
  313. box_extreg = REG_HMEBOX_EXT_3;
  314. break;
  315. default:
  316. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  317. ("switch case not process\n"));
  318. break;
  319. }
  320. isfw_read = _rtl92c_check_fw_read_last_h2c(hw, boxnum);
  321. while (!isfw_read) {
  322. wait_h2c_limmit--;
  323. if (wait_h2c_limmit == 0) {
  324. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  325. ("Wating too long for FW read "
  326. "clear HMEBox(%d)!\n", boxnum));
  327. break;
  328. }
  329. udelay(10);
  330. isfw_read = _rtl92c_check_fw_read_last_h2c(hw, boxnum);
  331. u1b_tmp = rtl_read_byte(rtlpriv, 0x1BF);
  332. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  333. ("Wating for FW read clear HMEBox(%d)!!! "
  334. "0x1BF = %2x\n", boxnum, u1b_tmp));
  335. }
  336. if (!isfw_read) {
  337. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  338. ("Write H2C register BOX[%d] fail!!!!! "
  339. "Fw do not read.\n", boxnum));
  340. break;
  341. }
  342. memset(boxcontent, 0, sizeof(boxcontent));
  343. memset(boxextcontent, 0, sizeof(boxextcontent));
  344. boxcontent[0] = element_id;
  345. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  346. ("Write element_id box_reg(%4x) = %2x\n",
  347. box_reg, element_id));
  348. switch (cmd_len) {
  349. case 1:
  350. boxcontent[0] &= ~(BIT(7));
  351. memcpy((u8 *) (boxcontent) + 1,
  352. p_cmdbuffer + buf_index, 1);
  353. for (idx = 0; idx < 4; idx++) {
  354. rtl_write_byte(rtlpriv, box_reg + idx,
  355. boxcontent[idx]);
  356. }
  357. break;
  358. case 2:
  359. boxcontent[0] &= ~(BIT(7));
  360. memcpy((u8 *) (boxcontent) + 1,
  361. p_cmdbuffer + buf_index, 2);
  362. for (idx = 0; idx < 4; idx++) {
  363. rtl_write_byte(rtlpriv, box_reg + idx,
  364. boxcontent[idx]);
  365. }
  366. break;
  367. case 3:
  368. boxcontent[0] &= ~(BIT(7));
  369. memcpy((u8 *) (boxcontent) + 1,
  370. p_cmdbuffer + buf_index, 3);
  371. for (idx = 0; idx < 4; idx++) {
  372. rtl_write_byte(rtlpriv, box_reg + idx,
  373. boxcontent[idx]);
  374. }
  375. break;
  376. case 4:
  377. boxcontent[0] |= (BIT(7));
  378. memcpy((u8 *) (boxextcontent),
  379. p_cmdbuffer + buf_index, 2);
  380. memcpy((u8 *) (boxcontent) + 1,
  381. p_cmdbuffer + buf_index + 2, 2);
  382. for (idx = 0; idx < 2; idx++) {
  383. rtl_write_byte(rtlpriv, box_extreg + idx,
  384. boxextcontent[idx]);
  385. }
  386. for (idx = 0; idx < 4; idx++) {
  387. rtl_write_byte(rtlpriv, box_reg + idx,
  388. boxcontent[idx]);
  389. }
  390. break;
  391. case 5:
  392. boxcontent[0] |= (BIT(7));
  393. memcpy((u8 *) (boxextcontent),
  394. p_cmdbuffer + buf_index, 2);
  395. memcpy((u8 *) (boxcontent) + 1,
  396. p_cmdbuffer + buf_index + 2, 3);
  397. for (idx = 0; idx < 2; idx++) {
  398. rtl_write_byte(rtlpriv, box_extreg + idx,
  399. boxextcontent[idx]);
  400. }
  401. for (idx = 0; idx < 4; idx++) {
  402. rtl_write_byte(rtlpriv, box_reg + idx,
  403. boxcontent[idx]);
  404. }
  405. break;
  406. default:
  407. RT_TRACE(rtlpriv, COMP_ERR, DBG_EMERG,
  408. ("switch case not process\n"));
  409. break;
  410. }
  411. bwrite_sucess = true;
  412. rtlhal->last_hmeboxnum = boxnum + 1;
  413. if (rtlhal->last_hmeboxnum == 4)
  414. rtlhal->last_hmeboxnum = 0;
  415. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD,
  416. ("pHalData->last_hmeboxnum = %d\n",
  417. rtlhal->last_hmeboxnum));
  418. }
  419. spin_lock_irqsave(&rtlpriv->locks.h2c_lock, flag);
  420. rtlhal->h2c_setinprogress = false;
  421. spin_unlock_irqrestore(&rtlpriv->locks.h2c_lock, flag);
  422. RT_TRACE(rtlpriv, COMP_CMD, DBG_LOUD, ("go out\n"));
  423. }
  424. void rtl92c_fill_h2c_cmd(struct ieee80211_hw *hw,
  425. u8 element_id, u32 cmd_len, u8 *p_cmdbuffer)
  426. {
  427. struct rtl_hal *rtlhal = rtl_hal(rtl_priv(hw));
  428. u32 tmp_cmdbuf[2];
  429. if (rtlhal->fw_ready == false) {
  430. RT_ASSERT(false, ("return H2C cmd because of Fw "
  431. "download fail!!!\n"));
  432. return;
  433. }
  434. memset(tmp_cmdbuf, 0, 8);
  435. memcpy(tmp_cmdbuf, p_cmdbuffer, cmd_len);
  436. _rtl92c_fill_h2c_command(hw, element_id, cmd_len, (u8 *)&tmp_cmdbuf);
  437. return;
  438. }
  439. void rtl92c_firmware_selfreset(struct ieee80211_hw *hw)
  440. {
  441. u8 u1b_tmp;
  442. u8 delay = 100;
  443. struct rtl_priv *rtlpriv = rtl_priv(hw);
  444. rtl_write_byte(rtlpriv, REG_HMETFR + 3, 0x20);
  445. u1b_tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
  446. while (u1b_tmp & BIT(2)) {
  447. delay--;
  448. if (delay == 0) {
  449. RT_ASSERT(false, ("8051 reset fail.\n"));
  450. break;
  451. }
  452. udelay(50);
  453. u1b_tmp = rtl_read_byte(rtlpriv, REG_SYS_FUNC_EN + 1);
  454. }
  455. }
  456. void rtl92c_set_fw_pwrmode_cmd(struct ieee80211_hw *hw, u8 mode)
  457. {
  458. struct rtl_priv *rtlpriv = rtl_priv(hw);
  459. u8 u1_h2c_set_pwrmode[3] = {0};
  460. struct rtl_ps_ctl *ppsc = rtl_psc(rtl_priv(hw));
  461. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD, ("FW LPS mode = %d\n", mode));
  462. SET_H2CCMD_PWRMODE_PARM_MODE(u1_h2c_set_pwrmode, mode);
  463. SET_H2CCMD_PWRMODE_PARM_SMART_PS(u1_h2c_set_pwrmode, 1);
  464. SET_H2CCMD_PWRMODE_PARM_BCN_PASS_TIME(u1_h2c_set_pwrmode,
  465. ppsc->reg_max_lps_awakeintvl);
  466. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  467. "rtl92c_set_fw_rsvdpagepkt(): u1_h2c_set_pwrmode\n",
  468. u1_h2c_set_pwrmode, 3);
  469. rtl92c_fill_h2c_cmd(hw, H2C_SETPWRMODE, 3, u1_h2c_set_pwrmode);
  470. }
  471. #define BEACON_PG 0 /*->1*/
  472. #define PSPOLL_PG 2
  473. #define NULL_PG 3
  474. #define PROBERSP_PG 4 /*->5*/
  475. #define TOTAL_RESERVED_PKT_LEN 768
  476. static u8 reserved_page_packet[TOTAL_RESERVED_PKT_LEN] = {
  477. /* page 0 beacon */
  478. 0x80, 0x00, 0x00, 0x00, 0xFF, 0xFF, 0xFF, 0xFF,
  479. 0xFF, 0xFF, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  480. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x50, 0x08,
  481. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  482. 0x64, 0x00, 0x00, 0x04, 0x00, 0x0C, 0x6C, 0x69,
  483. 0x6E, 0x6B, 0x73, 0x79, 0x73, 0x5F, 0x77, 0x6C,
  484. 0x61, 0x6E, 0x01, 0x04, 0x82, 0x84, 0x8B, 0x96,
  485. 0x03, 0x01, 0x01, 0x06, 0x02, 0x00, 0x00, 0x2A,
  486. 0x01, 0x00, 0x32, 0x08, 0x24, 0x30, 0x48, 0x6C,
  487. 0x0C, 0x12, 0x18, 0x60, 0x2D, 0x1A, 0x6C, 0x18,
  488. 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  489. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  490. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  491. 0x3D, 0x00, 0xDD, 0x06, 0x00, 0xE0, 0x4C, 0x02,
  492. 0x01, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  493. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  494. /* page 1 beacon */
  495. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  496. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  497. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  498. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  499. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  500. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  501. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  502. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  503. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  504. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  505. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  506. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  507. 0x10, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x10, 0x00,
  508. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  509. 0x00, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  510. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  511. /* page 2 ps-poll */
  512. 0xA4, 0x10, 0x01, 0xC0, 0x00, 0x40, 0x10, 0x10,
  513. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  514. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  515. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  516. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  517. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  518. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  519. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  520. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  521. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  522. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  523. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  524. 0x18, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x00, 0x00,
  525. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
  526. 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  527. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  528. /* page 3 null */
  529. 0x48, 0x01, 0x00, 0x00, 0x00, 0x40, 0x10, 0x10,
  530. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  531. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x00, 0x00,
  532. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  533. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  534. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  535. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  536. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  537. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  538. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  539. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  540. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  541. 0x72, 0x00, 0x20, 0x8C, 0x00, 0x12, 0x00, 0x00,
  542. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80,
  543. 0x80, 0x01, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  544. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  545. /* page 4 probe_resp */
  546. 0x50, 0x00, 0x00, 0x00, 0x00, 0x40, 0x10, 0x10,
  547. 0x00, 0x03, 0x00, 0xE0, 0x4C, 0x76, 0x00, 0x42,
  548. 0x00, 0x40, 0x10, 0x10, 0x00, 0x03, 0x00, 0x00,
  549. 0x9E, 0x46, 0x15, 0x32, 0x27, 0xF2, 0x2D, 0x00,
  550. 0x64, 0x00, 0x00, 0x04, 0x00, 0x0C, 0x6C, 0x69,
  551. 0x6E, 0x6B, 0x73, 0x79, 0x73, 0x5F, 0x77, 0x6C,
  552. 0x61, 0x6E, 0x01, 0x04, 0x82, 0x84, 0x8B, 0x96,
  553. 0x03, 0x01, 0x01, 0x06, 0x02, 0x00, 0x00, 0x2A,
  554. 0x01, 0x00, 0x32, 0x08, 0x24, 0x30, 0x48, 0x6C,
  555. 0x0C, 0x12, 0x18, 0x60, 0x2D, 0x1A, 0x6C, 0x18,
  556. 0x03, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  557. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  558. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  559. 0x3D, 0x00, 0xDD, 0x06, 0x00, 0xE0, 0x4C, 0x02,
  560. 0x01, 0x70, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  561. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  562. /* page 5 probe_resp */
  563. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  564. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  565. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  566. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  567. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  568. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  569. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  570. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  571. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  572. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  573. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  574. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  575. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  576. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  577. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  578. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  579. };
  580. void rtl92c_set_fw_rsvdpagepkt(struct ieee80211_hw *hw, bool b_dl_finished)
  581. {
  582. struct rtl_priv *rtlpriv = rtl_priv(hw);
  583. struct rtl_mac *mac = rtl_mac(rtl_priv(hw));
  584. struct sk_buff *skb = NULL;
  585. u32 totalpacketlen;
  586. bool rtstatus;
  587. u8 u1RsvdPageLoc[3] = {0};
  588. bool b_dlok = false;
  589. u8 *beacon;
  590. u8 *p_pspoll;
  591. u8 *nullfunc;
  592. u8 *p_probersp;
  593. /*---------------------------------------------------------
  594. (1) beacon
  595. ---------------------------------------------------------*/
  596. beacon = &reserved_page_packet[BEACON_PG * 128];
  597. SET_80211_HDR_ADDRESS2(beacon, mac->mac_addr);
  598. SET_80211_HDR_ADDRESS3(beacon, mac->bssid);
  599. /*-------------------------------------------------------
  600. (2) ps-poll
  601. --------------------------------------------------------*/
  602. p_pspoll = &reserved_page_packet[PSPOLL_PG * 128];
  603. SET_80211_PS_POLL_AID(p_pspoll, (mac->assoc_id | 0xc000));
  604. SET_80211_PS_POLL_BSSID(p_pspoll, mac->bssid);
  605. SET_80211_PS_POLL_TA(p_pspoll, mac->mac_addr);
  606. SET_H2CCMD_RSVDPAGE_LOC_PSPOLL(u1RsvdPageLoc, PSPOLL_PG);
  607. /*--------------------------------------------------------
  608. (3) null data
  609. ---------------------------------------------------------*/
  610. nullfunc = &reserved_page_packet[NULL_PG * 128];
  611. SET_80211_HDR_ADDRESS1(nullfunc, mac->bssid);
  612. SET_80211_HDR_ADDRESS2(nullfunc, mac->mac_addr);
  613. SET_80211_HDR_ADDRESS3(nullfunc, mac->bssid);
  614. SET_H2CCMD_RSVDPAGE_LOC_NULL_DATA(u1RsvdPageLoc, NULL_PG);
  615. /*---------------------------------------------------------
  616. (4) probe response
  617. ----------------------------------------------------------*/
  618. p_probersp = &reserved_page_packet[PROBERSP_PG * 128];
  619. SET_80211_HDR_ADDRESS1(p_probersp, mac->bssid);
  620. SET_80211_HDR_ADDRESS2(p_probersp, mac->mac_addr);
  621. SET_80211_HDR_ADDRESS3(p_probersp, mac->bssid);
  622. SET_H2CCMD_RSVDPAGE_LOC_PROBE_RSP(u1RsvdPageLoc, PROBERSP_PG);
  623. totalpacketlen = TOTAL_RESERVED_PKT_LEN;
  624. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_LOUD,
  625. "rtl92c_set_fw_rsvdpagepkt(): HW_VAR_SET_TX_CMD: ALL\n",
  626. &reserved_page_packet[0], totalpacketlen);
  627. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  628. "rtl92c_set_fw_rsvdpagepkt(): HW_VAR_SET_TX_CMD: ALL\n",
  629. u1RsvdPageLoc, 3);
  630. skb = dev_alloc_skb(totalpacketlen);
  631. memcpy((u8 *) skb_put(skb, totalpacketlen),
  632. &reserved_page_packet, totalpacketlen);
  633. rtstatus = rtlpriv->cfg->ops->cmd_send_packet(hw, skb);
  634. if (rtstatus)
  635. b_dlok = true;
  636. if (b_dlok) {
  637. RT_TRACE(rtlpriv, COMP_POWER, DBG_LOUD,
  638. ("Set RSVD page location to Fw.\n"));
  639. RT_PRINT_DATA(rtlpriv, COMP_CMD, DBG_DMESG,
  640. "H2C_RSVDPAGE:\n",
  641. u1RsvdPageLoc, 3);
  642. rtl92c_fill_h2c_cmd(hw, H2C_RSVDPAGE,
  643. sizeof(u1RsvdPageLoc), u1RsvdPageLoc);
  644. } else
  645. RT_TRACE(rtlpriv, COMP_ERR, DBG_WARNING,
  646. ("Set RSVD page location to Fw FAIL!!!!!!.\n"));
  647. }
  648. void rtl92c_set_fw_joinbss_report_cmd(struct ieee80211_hw *hw, u8 mstatus)
  649. {
  650. u8 u1_joinbssrpt_parm[1] = {0};
  651. SET_H2CCMD_JOINBSSRPT_PARM_OPMODE(u1_joinbssrpt_parm, mstatus);
  652. rtl92c_fill_h2c_cmd(hw, H2C_JOINBSSRPT, 1, u1_joinbssrpt_parm);
  653. }