iwl-core.c 58 KB

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  1. /******************************************************************************
  2. *
  3. * GPL LICENSE SUMMARY
  4. *
  5. * Copyright(c) 2008 - 2010 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of version 2 of the GNU General Public License as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19. * USA
  20. *
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *****************************************************************************/
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/etherdevice.h>
  31. #include <linux/sched.h>
  32. #include <linux/slab.h>
  33. #include <net/mac80211.h>
  34. #include "iwl-eeprom.h"
  35. #include "iwl-dev.h" /* FIXME: remove */
  36. #include "iwl-debug.h"
  37. #include "iwl-core.h"
  38. #include "iwl-io.h"
  39. #include "iwl-power.h"
  40. #include "iwl-sta.h"
  41. #include "iwl-helpers.h"
  42. MODULE_DESCRIPTION("iwl core");
  43. MODULE_VERSION(IWLWIFI_VERSION);
  44. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  45. MODULE_LICENSE("GPL");
  46. /*
  47. * set bt_coex_active to true, uCode will do kill/defer
  48. * every time the priority line is asserted (BT is sending signals on the
  49. * priority line in the PCIx).
  50. * set bt_coex_active to false, uCode will ignore the BT activity and
  51. * perform the normal operation
  52. *
  53. * User might experience transmit issue on some platform due to WiFi/BT
  54. * co-exist problem. The possible behaviors are:
  55. * Able to scan and finding all the available AP
  56. * Not able to associate with any AP
  57. * On those platforms, WiFi communication can be restored by set
  58. * "bt_coex_active" module parameter to "false"
  59. *
  60. * default: bt_coex_active = true (BT_COEX_ENABLE)
  61. */
  62. bool bt_coex_active = true;
  63. EXPORT_SYMBOL_GPL(bt_coex_active);
  64. module_param(bt_coex_active, bool, S_IRUGO);
  65. MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
  66. u32 iwl_debug_level;
  67. EXPORT_SYMBOL(iwl_debug_level);
  68. const u8 iwl_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  69. EXPORT_SYMBOL(iwl_bcast_addr);
  70. /* This function both allocates and initializes hw and priv. */
  71. struct ieee80211_hw *iwl_alloc_all(struct iwl_cfg *cfg)
  72. {
  73. struct iwl_priv *priv;
  74. /* mac80211 allocates memory for this device instance, including
  75. * space for this driver's private structure */
  76. struct ieee80211_hw *hw;
  77. hw = ieee80211_alloc_hw(sizeof(struct iwl_priv),
  78. cfg->ops->ieee80211_ops);
  79. if (hw == NULL) {
  80. pr_err("%s: Can not allocate network device\n",
  81. cfg->name);
  82. goto out;
  83. }
  84. priv = hw->priv;
  85. priv->hw = hw;
  86. out:
  87. return hw;
  88. }
  89. EXPORT_SYMBOL(iwl_alloc_all);
  90. #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
  91. #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
  92. static void iwlcore_init_ht_hw_capab(const struct iwl_priv *priv,
  93. struct ieee80211_sta_ht_cap *ht_info,
  94. enum ieee80211_band band)
  95. {
  96. u16 max_bit_rate = 0;
  97. u8 rx_chains_num = priv->hw_params.rx_chains_num;
  98. u8 tx_chains_num = priv->hw_params.tx_chains_num;
  99. ht_info->cap = 0;
  100. memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
  101. ht_info->ht_supported = true;
  102. if (priv->cfg->ht_params &&
  103. priv->cfg->ht_params->ht_greenfield_support)
  104. ht_info->cap |= IEEE80211_HT_CAP_GRN_FLD;
  105. ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
  106. max_bit_rate = MAX_BIT_RATE_20_MHZ;
  107. if (priv->hw_params.ht40_channel & BIT(band)) {
  108. ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  109. ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
  110. ht_info->mcs.rx_mask[4] = 0x01;
  111. max_bit_rate = MAX_BIT_RATE_40_MHZ;
  112. }
  113. if (priv->cfg->mod_params->amsdu_size_8K)
  114. ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  115. ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  116. if (priv->cfg->bt_params && priv->cfg->bt_params->ampdu_factor)
  117. ht_info->ampdu_factor = priv->cfg->bt_params->ampdu_factor;
  118. ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
  119. if (priv->cfg->bt_params && priv->cfg->bt_params->ampdu_density)
  120. ht_info->ampdu_density = priv->cfg->bt_params->ampdu_density;
  121. ht_info->mcs.rx_mask[0] = 0xFF;
  122. if (rx_chains_num >= 2)
  123. ht_info->mcs.rx_mask[1] = 0xFF;
  124. if (rx_chains_num >= 3)
  125. ht_info->mcs.rx_mask[2] = 0xFF;
  126. /* Highest supported Rx data rate */
  127. max_bit_rate *= rx_chains_num;
  128. WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
  129. ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
  130. /* Tx MCS capabilities */
  131. ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  132. if (tx_chains_num != rx_chains_num) {
  133. ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  134. ht_info->mcs.tx_params |= ((tx_chains_num - 1) <<
  135. IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
  136. }
  137. }
  138. /**
  139. * iwlcore_init_geos - Initialize mac80211's geo/channel info based from eeprom
  140. */
  141. int iwlcore_init_geos(struct iwl_priv *priv)
  142. {
  143. struct iwl_channel_info *ch;
  144. struct ieee80211_supported_band *sband;
  145. struct ieee80211_channel *channels;
  146. struct ieee80211_channel *geo_ch;
  147. struct ieee80211_rate *rates;
  148. int i = 0;
  149. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  150. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  151. IWL_DEBUG_INFO(priv, "Geography modes already initialized.\n");
  152. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  153. return 0;
  154. }
  155. channels = kzalloc(sizeof(struct ieee80211_channel) *
  156. priv->channel_count, GFP_KERNEL);
  157. if (!channels)
  158. return -ENOMEM;
  159. rates = kzalloc((sizeof(struct ieee80211_rate) * IWL_RATE_COUNT_LEGACY),
  160. GFP_KERNEL);
  161. if (!rates) {
  162. kfree(channels);
  163. return -ENOMEM;
  164. }
  165. /* 5.2GHz channels start after the 2.4GHz channels */
  166. sband = &priv->bands[IEEE80211_BAND_5GHZ];
  167. sband->channels = &channels[ARRAY_SIZE(iwl_eeprom_band_1)];
  168. /* just OFDM */
  169. sband->bitrates = &rates[IWL_FIRST_OFDM_RATE];
  170. sband->n_bitrates = IWL_RATE_COUNT_LEGACY - IWL_FIRST_OFDM_RATE;
  171. if (priv->cfg->sku & IWL_SKU_N)
  172. iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
  173. IEEE80211_BAND_5GHZ);
  174. sband = &priv->bands[IEEE80211_BAND_2GHZ];
  175. sband->channels = channels;
  176. /* OFDM & CCK */
  177. sband->bitrates = rates;
  178. sband->n_bitrates = IWL_RATE_COUNT_LEGACY;
  179. if (priv->cfg->sku & IWL_SKU_N)
  180. iwlcore_init_ht_hw_capab(priv, &sband->ht_cap,
  181. IEEE80211_BAND_2GHZ);
  182. priv->ieee_channels = channels;
  183. priv->ieee_rates = rates;
  184. for (i = 0; i < priv->channel_count; i++) {
  185. ch = &priv->channel_info[i];
  186. /* FIXME: might be removed if scan is OK */
  187. if (!is_channel_valid(ch))
  188. continue;
  189. sband = &priv->bands[ch->band];
  190. geo_ch = &sband->channels[sband->n_channels++];
  191. geo_ch->center_freq =
  192. ieee80211_channel_to_frequency(ch->channel, ch->band);
  193. geo_ch->max_power = ch->max_power_avg;
  194. geo_ch->max_antenna_gain = 0xff;
  195. geo_ch->hw_value = ch->channel;
  196. if (is_channel_valid(ch)) {
  197. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  198. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  199. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  200. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  201. if (ch->flags & EEPROM_CHANNEL_RADAR)
  202. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  203. geo_ch->flags |= ch->ht40_extension_channel;
  204. if (ch->max_power_avg > priv->tx_power_device_lmt)
  205. priv->tx_power_device_lmt = ch->max_power_avg;
  206. } else {
  207. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  208. }
  209. IWL_DEBUG_INFO(priv, "Channel %d Freq=%d[%sGHz] %s flag=0x%X\n",
  210. ch->channel, geo_ch->center_freq,
  211. is_channel_a_band(ch) ? "5.2" : "2.4",
  212. geo_ch->flags & IEEE80211_CHAN_DISABLED ?
  213. "restricted" : "valid",
  214. geo_ch->flags);
  215. }
  216. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) &&
  217. priv->cfg->sku & IWL_SKU_A) {
  218. IWL_INFO(priv, "Incorrectly detected BG card as ABG. "
  219. "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
  220. priv->pci_dev->device,
  221. priv->pci_dev->subsystem_device);
  222. priv->cfg->sku &= ~IWL_SKU_A;
  223. }
  224. IWL_INFO(priv, "Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  225. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  226. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  227. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  228. return 0;
  229. }
  230. EXPORT_SYMBOL(iwlcore_init_geos);
  231. /*
  232. * iwlcore_free_geos - undo allocations in iwlcore_init_geos
  233. */
  234. void iwlcore_free_geos(struct iwl_priv *priv)
  235. {
  236. kfree(priv->ieee_channels);
  237. kfree(priv->ieee_rates);
  238. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  239. }
  240. EXPORT_SYMBOL(iwlcore_free_geos);
  241. static bool iwl_is_channel_extension(struct iwl_priv *priv,
  242. enum ieee80211_band band,
  243. u16 channel, u8 extension_chan_offset)
  244. {
  245. const struct iwl_channel_info *ch_info;
  246. ch_info = iwl_get_channel_info(priv, band, channel);
  247. if (!is_channel_valid(ch_info))
  248. return false;
  249. if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
  250. return !(ch_info->ht40_extension_channel &
  251. IEEE80211_CHAN_NO_HT40PLUS);
  252. else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
  253. return !(ch_info->ht40_extension_channel &
  254. IEEE80211_CHAN_NO_HT40MINUS);
  255. return false;
  256. }
  257. bool iwl_is_ht40_tx_allowed(struct iwl_priv *priv,
  258. struct iwl_rxon_context *ctx,
  259. struct ieee80211_sta_ht_cap *ht_cap)
  260. {
  261. if (!ctx->ht.enabled || !ctx->ht.is_40mhz)
  262. return false;
  263. /*
  264. * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
  265. * the bit will not set if it is pure 40MHz case
  266. */
  267. if (ht_cap && !ht_cap->ht_supported)
  268. return false;
  269. #ifdef CONFIG_IWLWIFI_DEBUGFS
  270. if (priv->disable_ht40)
  271. return false;
  272. #endif
  273. return iwl_is_channel_extension(priv, priv->band,
  274. le16_to_cpu(ctx->staging.channel),
  275. ctx->ht.extension_chan_offset);
  276. }
  277. EXPORT_SYMBOL(iwl_is_ht40_tx_allowed);
  278. static u16 iwl_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
  279. {
  280. u16 new_val;
  281. u16 beacon_factor;
  282. /*
  283. * If mac80211 hasn't given us a beacon interval, program
  284. * the default into the device (not checking this here
  285. * would cause the adjustment below to return the maximum
  286. * value, which may break PAN.)
  287. */
  288. if (!beacon_val)
  289. return DEFAULT_BEACON_INTERVAL;
  290. /*
  291. * If the beacon interval we obtained from the peer
  292. * is too large, we'll have to wake up more often
  293. * (and in IBSS case, we'll beacon too much)
  294. *
  295. * For example, if max_beacon_val is 4096, and the
  296. * requested beacon interval is 7000, we'll have to
  297. * use 3500 to be able to wake up on the beacons.
  298. *
  299. * This could badly influence beacon detection stats.
  300. */
  301. beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
  302. new_val = beacon_val / beacon_factor;
  303. if (!new_val)
  304. new_val = max_beacon_val;
  305. return new_val;
  306. }
  307. int iwl_send_rxon_timing(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
  308. {
  309. u64 tsf;
  310. s32 interval_tm, rem;
  311. struct ieee80211_conf *conf = NULL;
  312. u16 beacon_int;
  313. struct ieee80211_vif *vif = ctx->vif;
  314. conf = ieee80211_get_hw_conf(priv->hw);
  315. lockdep_assert_held(&priv->mutex);
  316. memset(&ctx->timing, 0, sizeof(struct iwl_rxon_time_cmd));
  317. ctx->timing.timestamp = cpu_to_le64(priv->timestamp);
  318. ctx->timing.listen_interval = cpu_to_le16(conf->listen_interval);
  319. beacon_int = vif ? vif->bss_conf.beacon_int : 0;
  320. /*
  321. * TODO: For IBSS we need to get atim_window from mac80211,
  322. * for now just always use 0
  323. */
  324. ctx->timing.atim_window = 0;
  325. if (ctx->ctxid == IWL_RXON_CTX_PAN &&
  326. (!ctx->vif || ctx->vif->type != NL80211_IFTYPE_STATION) &&
  327. iwl_is_associated(priv, IWL_RXON_CTX_BSS) &&
  328. priv->contexts[IWL_RXON_CTX_BSS].vif &&
  329. priv->contexts[IWL_RXON_CTX_BSS].vif->bss_conf.beacon_int) {
  330. ctx->timing.beacon_interval =
  331. priv->contexts[IWL_RXON_CTX_BSS].timing.beacon_interval;
  332. beacon_int = le16_to_cpu(ctx->timing.beacon_interval);
  333. } else if (ctx->ctxid == IWL_RXON_CTX_BSS &&
  334. iwl_is_associated(priv, IWL_RXON_CTX_PAN) &&
  335. priv->contexts[IWL_RXON_CTX_PAN].vif &&
  336. priv->contexts[IWL_RXON_CTX_PAN].vif->bss_conf.beacon_int &&
  337. (!iwl_is_associated_ctx(ctx) || !ctx->vif ||
  338. !ctx->vif->bss_conf.beacon_int)) {
  339. ctx->timing.beacon_interval =
  340. priv->contexts[IWL_RXON_CTX_PAN].timing.beacon_interval;
  341. beacon_int = le16_to_cpu(ctx->timing.beacon_interval);
  342. } else {
  343. beacon_int = iwl_adjust_beacon_interval(beacon_int,
  344. priv->hw_params.max_beacon_itrvl * TIME_UNIT);
  345. ctx->timing.beacon_interval = cpu_to_le16(beacon_int);
  346. }
  347. tsf = priv->timestamp; /* tsf is modifed by do_div: copy it */
  348. interval_tm = beacon_int * TIME_UNIT;
  349. rem = do_div(tsf, interval_tm);
  350. ctx->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
  351. ctx->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ?: 1) : 1;
  352. IWL_DEBUG_ASSOC(priv,
  353. "beacon interval %d beacon timer %d beacon tim %d\n",
  354. le16_to_cpu(ctx->timing.beacon_interval),
  355. le32_to_cpu(ctx->timing.beacon_init_val),
  356. le16_to_cpu(ctx->timing.atim_window));
  357. return iwl_send_cmd_pdu(priv, ctx->rxon_timing_cmd,
  358. sizeof(ctx->timing), &ctx->timing);
  359. }
  360. EXPORT_SYMBOL(iwl_send_rxon_timing);
  361. void iwl_set_rxon_hwcrypto(struct iwl_priv *priv, struct iwl_rxon_context *ctx,
  362. int hw_decrypt)
  363. {
  364. struct iwl_rxon_cmd *rxon = &ctx->staging;
  365. if (hw_decrypt)
  366. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  367. else
  368. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  369. }
  370. EXPORT_SYMBOL(iwl_set_rxon_hwcrypto);
  371. /* validate RXON structure is valid */
  372. int iwl_check_rxon_cmd(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
  373. {
  374. struct iwl_rxon_cmd *rxon = &ctx->staging;
  375. bool error = false;
  376. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  377. if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) {
  378. IWL_WARN(priv, "check 2.4G: wrong narrow\n");
  379. error = true;
  380. }
  381. if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) {
  382. IWL_WARN(priv, "check 2.4G: wrong radar\n");
  383. error = true;
  384. }
  385. } else {
  386. if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) {
  387. IWL_WARN(priv, "check 5.2G: not short slot!\n");
  388. error = true;
  389. }
  390. if (rxon->flags & RXON_FLG_CCK_MSK) {
  391. IWL_WARN(priv, "check 5.2G: CCK!\n");
  392. error = true;
  393. }
  394. }
  395. if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) {
  396. IWL_WARN(priv, "mac/bssid mcast!\n");
  397. error = true;
  398. }
  399. /* make sure basic rates 6Mbps and 1Mbps are supported */
  400. if ((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0 &&
  401. (rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0) {
  402. IWL_WARN(priv, "neither 1 nor 6 are basic\n");
  403. error = true;
  404. }
  405. if (le16_to_cpu(rxon->assoc_id) > 2007) {
  406. IWL_WARN(priv, "aid > 2007\n");
  407. error = true;
  408. }
  409. if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  410. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) {
  411. IWL_WARN(priv, "CCK and short slot\n");
  412. error = true;
  413. }
  414. if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  415. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) {
  416. IWL_WARN(priv, "CCK and auto detect");
  417. error = true;
  418. }
  419. if ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  420. RXON_FLG_TGG_PROTECT_MSK)) ==
  421. RXON_FLG_TGG_PROTECT_MSK) {
  422. IWL_WARN(priv, "TGg but no auto-detect\n");
  423. error = true;
  424. }
  425. if (error)
  426. IWL_WARN(priv, "Tuning to channel %d\n",
  427. le16_to_cpu(rxon->channel));
  428. if (error) {
  429. IWL_ERR(priv, "Invalid RXON\n");
  430. return -EINVAL;
  431. }
  432. return 0;
  433. }
  434. EXPORT_SYMBOL(iwl_check_rxon_cmd);
  435. /**
  436. * iwl_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  437. * @priv: staging_rxon is compared to active_rxon
  438. *
  439. * If the RXON structure is changing enough to require a new tune,
  440. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  441. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  442. */
  443. int iwl_full_rxon_required(struct iwl_priv *priv,
  444. struct iwl_rxon_context *ctx)
  445. {
  446. const struct iwl_rxon_cmd *staging = &ctx->staging;
  447. const struct iwl_rxon_cmd *active = &ctx->active;
  448. #define CHK(cond) \
  449. if ((cond)) { \
  450. IWL_DEBUG_INFO(priv, "need full RXON - " #cond "\n"); \
  451. return 1; \
  452. }
  453. #define CHK_NEQ(c1, c2) \
  454. if ((c1) != (c2)) { \
  455. IWL_DEBUG_INFO(priv, "need full RXON - " \
  456. #c1 " != " #c2 " - %d != %d\n", \
  457. (c1), (c2)); \
  458. return 1; \
  459. }
  460. /* These items are only settable from the full RXON command */
  461. CHK(!iwl_is_associated_ctx(ctx));
  462. CHK(compare_ether_addr(staging->bssid_addr, active->bssid_addr));
  463. CHK(compare_ether_addr(staging->node_addr, active->node_addr));
  464. CHK(compare_ether_addr(staging->wlap_bssid_addr,
  465. active->wlap_bssid_addr));
  466. CHK_NEQ(staging->dev_type, active->dev_type);
  467. CHK_NEQ(staging->channel, active->channel);
  468. CHK_NEQ(staging->air_propagation, active->air_propagation);
  469. CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
  470. active->ofdm_ht_single_stream_basic_rates);
  471. CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
  472. active->ofdm_ht_dual_stream_basic_rates);
  473. CHK_NEQ(staging->ofdm_ht_triple_stream_basic_rates,
  474. active->ofdm_ht_triple_stream_basic_rates);
  475. CHK_NEQ(staging->assoc_id, active->assoc_id);
  476. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  477. * be updated with the RXON_ASSOC command -- however only some
  478. * flag transitions are allowed using RXON_ASSOC */
  479. /* Check if we are not switching bands */
  480. CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
  481. active->flags & RXON_FLG_BAND_24G_MSK);
  482. /* Check if we are switching association toggle */
  483. CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
  484. active->filter_flags & RXON_FILTER_ASSOC_MSK);
  485. #undef CHK
  486. #undef CHK_NEQ
  487. return 0;
  488. }
  489. EXPORT_SYMBOL(iwl_full_rxon_required);
  490. u8 iwl_rate_get_lowest_plcp(struct iwl_priv *priv,
  491. struct iwl_rxon_context *ctx)
  492. {
  493. /*
  494. * Assign the lowest rate -- should really get this from
  495. * the beacon skb from mac80211.
  496. */
  497. if (ctx->staging.flags & RXON_FLG_BAND_24G_MSK)
  498. return IWL_RATE_1M_PLCP;
  499. else
  500. return IWL_RATE_6M_PLCP;
  501. }
  502. EXPORT_SYMBOL(iwl_rate_get_lowest_plcp);
  503. static void _iwl_set_rxon_ht(struct iwl_priv *priv,
  504. struct iwl_ht_config *ht_conf,
  505. struct iwl_rxon_context *ctx)
  506. {
  507. struct iwl_rxon_cmd *rxon = &ctx->staging;
  508. if (!ctx->ht.enabled) {
  509. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  510. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK |
  511. RXON_FLG_HT40_PROT_MSK |
  512. RXON_FLG_HT_PROT_MSK);
  513. return;
  514. }
  515. /* FIXME: if the definition of ht.protection changed, the "translation"
  516. * will be needed for rxon->flags
  517. */
  518. rxon->flags |= cpu_to_le32(ctx->ht.protection << RXON_FLG_HT_OPERATING_MODE_POS);
  519. /* Set up channel bandwidth:
  520. * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
  521. /* clear the HT channel mode before set the mode */
  522. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MSK |
  523. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  524. if (iwl_is_ht40_tx_allowed(priv, ctx, NULL)) {
  525. /* pure ht40 */
  526. if (ctx->ht.protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
  527. rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
  528. /* Note: control channel is opposite of extension channel */
  529. switch (ctx->ht.extension_chan_offset) {
  530. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  531. rxon->flags &= ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  532. break;
  533. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  534. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  535. break;
  536. }
  537. } else {
  538. /* Note: control channel is opposite of extension channel */
  539. switch (ctx->ht.extension_chan_offset) {
  540. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  541. rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  542. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  543. break;
  544. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  545. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  546. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  547. break;
  548. case IEEE80211_HT_PARAM_CHA_SEC_NONE:
  549. default:
  550. /* channel location only valid if in Mixed mode */
  551. IWL_ERR(priv, "invalid extension channel offset\n");
  552. break;
  553. }
  554. }
  555. } else {
  556. rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
  557. }
  558. if (priv->cfg->ops->hcmd->set_rxon_chain)
  559. priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
  560. IWL_DEBUG_ASSOC(priv, "rxon flags 0x%X operation mode :0x%X "
  561. "extension channel offset 0x%x\n",
  562. le32_to_cpu(rxon->flags), ctx->ht.protection,
  563. ctx->ht.extension_chan_offset);
  564. }
  565. void iwl_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_config *ht_conf)
  566. {
  567. struct iwl_rxon_context *ctx;
  568. for_each_context(priv, ctx)
  569. _iwl_set_rxon_ht(priv, ht_conf, ctx);
  570. }
  571. EXPORT_SYMBOL(iwl_set_rxon_ht);
  572. /* Return valid, unused, channel for a passive scan to reset the RF */
  573. u8 iwl_get_single_channel_number(struct iwl_priv *priv,
  574. enum ieee80211_band band)
  575. {
  576. const struct iwl_channel_info *ch_info;
  577. int i;
  578. u8 channel = 0;
  579. u8 min, max;
  580. struct iwl_rxon_context *ctx;
  581. if (band == IEEE80211_BAND_5GHZ) {
  582. min = 14;
  583. max = priv->channel_count;
  584. } else {
  585. min = 0;
  586. max = 14;
  587. }
  588. for (i = min; i < max; i++) {
  589. bool busy = false;
  590. for_each_context(priv, ctx) {
  591. busy = priv->channel_info[i].channel ==
  592. le16_to_cpu(ctx->staging.channel);
  593. if (busy)
  594. break;
  595. }
  596. if (busy)
  597. continue;
  598. channel = priv->channel_info[i].channel;
  599. ch_info = iwl_get_channel_info(priv, band, channel);
  600. if (is_channel_valid(ch_info))
  601. break;
  602. }
  603. return channel;
  604. }
  605. EXPORT_SYMBOL(iwl_get_single_channel_number);
  606. /**
  607. * iwl_set_rxon_channel - Set the band and channel values in staging RXON
  608. * @ch: requested channel as a pointer to struct ieee80211_channel
  609. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  610. * in the staging RXON flag structure based on the ch->band
  611. */
  612. int iwl_set_rxon_channel(struct iwl_priv *priv, struct ieee80211_channel *ch,
  613. struct iwl_rxon_context *ctx)
  614. {
  615. enum ieee80211_band band = ch->band;
  616. u16 channel = ch->hw_value;
  617. if ((le16_to_cpu(ctx->staging.channel) == channel) &&
  618. (priv->band == band))
  619. return 0;
  620. ctx->staging.channel = cpu_to_le16(channel);
  621. if (band == IEEE80211_BAND_5GHZ)
  622. ctx->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
  623. else
  624. ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
  625. priv->band = band;
  626. IWL_DEBUG_INFO(priv, "Staging channel set to %d [%d]\n", channel, band);
  627. return 0;
  628. }
  629. EXPORT_SYMBOL(iwl_set_rxon_channel);
  630. void iwl_set_flags_for_band(struct iwl_priv *priv,
  631. struct iwl_rxon_context *ctx,
  632. enum ieee80211_band band,
  633. struct ieee80211_vif *vif)
  634. {
  635. if (band == IEEE80211_BAND_5GHZ) {
  636. ctx->staging.flags &=
  637. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  638. | RXON_FLG_CCK_MSK);
  639. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  640. } else {
  641. /* Copied from iwl_post_associate() */
  642. if (vif && vif->bss_conf.use_short_slot)
  643. ctx->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  644. else
  645. ctx->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  646. ctx->staging.flags |= RXON_FLG_BAND_24G_MSK;
  647. ctx->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
  648. ctx->staging.flags &= ~RXON_FLG_CCK_MSK;
  649. }
  650. }
  651. EXPORT_SYMBOL(iwl_set_flags_for_band);
  652. /*
  653. * initialize rxon structure with default values from eeprom
  654. */
  655. void iwl_connection_init_rx_config(struct iwl_priv *priv,
  656. struct iwl_rxon_context *ctx)
  657. {
  658. const struct iwl_channel_info *ch_info;
  659. memset(&ctx->staging, 0, sizeof(ctx->staging));
  660. if (!ctx->vif) {
  661. ctx->staging.dev_type = ctx->unused_devtype;
  662. } else switch (ctx->vif->type) {
  663. case NL80211_IFTYPE_AP:
  664. ctx->staging.dev_type = ctx->ap_devtype;
  665. break;
  666. case NL80211_IFTYPE_STATION:
  667. ctx->staging.dev_type = ctx->station_devtype;
  668. ctx->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  669. break;
  670. case NL80211_IFTYPE_ADHOC:
  671. ctx->staging.dev_type = ctx->ibss_devtype;
  672. ctx->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  673. ctx->staging.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  674. RXON_FILTER_ACCEPT_GRP_MSK;
  675. break;
  676. default:
  677. IWL_ERR(priv, "Unsupported interface type %d\n",
  678. ctx->vif->type);
  679. break;
  680. }
  681. #if 0
  682. /* TODO: Figure out when short_preamble would be set and cache from
  683. * that */
  684. if (!hw_to_local(priv->hw)->short_preamble)
  685. ctx->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  686. else
  687. ctx->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  688. #endif
  689. ch_info = iwl_get_channel_info(priv, priv->band,
  690. le16_to_cpu(ctx->active.channel));
  691. if (!ch_info)
  692. ch_info = &priv->channel_info[0];
  693. ctx->staging.channel = cpu_to_le16(ch_info->channel);
  694. priv->band = ch_info->band;
  695. iwl_set_flags_for_band(priv, ctx, priv->band, ctx->vif);
  696. ctx->staging.ofdm_basic_rates =
  697. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  698. ctx->staging.cck_basic_rates =
  699. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  700. /* clear both MIX and PURE40 mode flag */
  701. ctx->staging.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED |
  702. RXON_FLG_CHANNEL_MODE_PURE_40);
  703. if (ctx->vif)
  704. memcpy(ctx->staging.node_addr, ctx->vif->addr, ETH_ALEN);
  705. ctx->staging.ofdm_ht_single_stream_basic_rates = 0xff;
  706. ctx->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
  707. ctx->staging.ofdm_ht_triple_stream_basic_rates = 0xff;
  708. }
  709. EXPORT_SYMBOL(iwl_connection_init_rx_config);
  710. void iwl_set_rate(struct iwl_priv *priv)
  711. {
  712. const struct ieee80211_supported_band *hw = NULL;
  713. struct ieee80211_rate *rate;
  714. struct iwl_rxon_context *ctx;
  715. int i;
  716. hw = iwl_get_hw_mode(priv, priv->band);
  717. if (!hw) {
  718. IWL_ERR(priv, "Failed to set rate: unable to get hw mode\n");
  719. return;
  720. }
  721. priv->active_rate = 0;
  722. for (i = 0; i < hw->n_bitrates; i++) {
  723. rate = &(hw->bitrates[i]);
  724. if (rate->hw_value < IWL_RATE_COUNT_LEGACY)
  725. priv->active_rate |= (1 << rate->hw_value);
  726. }
  727. IWL_DEBUG_RATE(priv, "Set active_rate = %0x\n", priv->active_rate);
  728. for_each_context(priv, ctx) {
  729. ctx->staging.cck_basic_rates =
  730. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  731. ctx->staging.ofdm_basic_rates =
  732. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  733. }
  734. }
  735. EXPORT_SYMBOL(iwl_set_rate);
  736. void iwl_chswitch_done(struct iwl_priv *priv, bool is_success)
  737. {
  738. /*
  739. * MULTI-FIXME
  740. * See iwl_mac_channel_switch.
  741. */
  742. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  743. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  744. return;
  745. if (priv->switch_rxon.switch_in_progress) {
  746. ieee80211_chswitch_done(ctx->vif, is_success);
  747. mutex_lock(&priv->mutex);
  748. priv->switch_rxon.switch_in_progress = false;
  749. mutex_unlock(&priv->mutex);
  750. }
  751. }
  752. EXPORT_SYMBOL(iwl_chswitch_done);
  753. void iwl_rx_csa(struct iwl_priv *priv, struct iwl_rx_mem_buffer *rxb)
  754. {
  755. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  756. struct iwl_csa_notification *csa = &(pkt->u.csa_notif);
  757. /*
  758. * MULTI-FIXME
  759. * See iwl_mac_channel_switch.
  760. */
  761. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  762. struct iwl_rxon_cmd *rxon = (void *)&ctx->active;
  763. if (priv->switch_rxon.switch_in_progress) {
  764. if (!le32_to_cpu(csa->status) &&
  765. (csa->channel == priv->switch_rxon.channel)) {
  766. rxon->channel = csa->channel;
  767. ctx->staging.channel = csa->channel;
  768. IWL_DEBUG_11H(priv, "CSA notif: channel %d\n",
  769. le16_to_cpu(csa->channel));
  770. iwl_chswitch_done(priv, true);
  771. } else {
  772. IWL_ERR(priv, "CSA notif (fail) : channel %d\n",
  773. le16_to_cpu(csa->channel));
  774. iwl_chswitch_done(priv, false);
  775. }
  776. }
  777. }
  778. EXPORT_SYMBOL(iwl_rx_csa);
  779. #ifdef CONFIG_IWLWIFI_DEBUG
  780. void iwl_print_rx_config_cmd(struct iwl_priv *priv,
  781. struct iwl_rxon_context *ctx)
  782. {
  783. struct iwl_rxon_cmd *rxon = &ctx->staging;
  784. IWL_DEBUG_RADIO(priv, "RX CONFIG:\n");
  785. iwl_print_hex_dump(priv, IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  786. IWL_DEBUG_RADIO(priv, "u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  787. IWL_DEBUG_RADIO(priv, "u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  788. IWL_DEBUG_RADIO(priv, "u32 filter_flags: 0x%08x\n",
  789. le32_to_cpu(rxon->filter_flags));
  790. IWL_DEBUG_RADIO(priv, "u8 dev_type: 0x%x\n", rxon->dev_type);
  791. IWL_DEBUG_RADIO(priv, "u8 ofdm_basic_rates: 0x%02x\n",
  792. rxon->ofdm_basic_rates);
  793. IWL_DEBUG_RADIO(priv, "u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  794. IWL_DEBUG_RADIO(priv, "u8[6] node_addr: %pM\n", rxon->node_addr);
  795. IWL_DEBUG_RADIO(priv, "u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  796. IWL_DEBUG_RADIO(priv, "u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  797. }
  798. EXPORT_SYMBOL(iwl_print_rx_config_cmd);
  799. #endif
  800. /**
  801. * iwl_irq_handle_error - called for HW or SW error interrupt from card
  802. */
  803. void iwl_irq_handle_error(struct iwl_priv *priv)
  804. {
  805. /* Set the FW error flag -- cleared on iwl_down */
  806. set_bit(STATUS_FW_ERROR, &priv->status);
  807. /* Cancel currently queued command. */
  808. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  809. /* W/A for WiFi/WiMAX coex and WiMAX own the RF */
  810. if (priv->cfg->internal_wimax_coex &&
  811. (!(iwl_read_prph(priv, APMG_CLK_CTRL_REG) &
  812. APMS_CLK_VAL_MRB_FUNC_MODE) ||
  813. (iwl_read_prph(priv, APMG_PS_CTRL_REG) &
  814. APMG_PS_CTRL_VAL_RESET_REQ))) {
  815. wake_up_interruptible(&priv->wait_command_queue);
  816. /*
  817. *Keep the restart process from trying to send host
  818. * commands by clearing the INIT status bit
  819. */
  820. clear_bit(STATUS_READY, &priv->status);
  821. IWL_ERR(priv, "RF is used by WiMAX\n");
  822. return;
  823. }
  824. IWL_ERR(priv, "Loaded firmware version: %s\n",
  825. priv->hw->wiphy->fw_version);
  826. priv->cfg->ops->lib->dump_nic_error_log(priv);
  827. if (priv->cfg->ops->lib->dump_csr)
  828. priv->cfg->ops->lib->dump_csr(priv);
  829. if (priv->cfg->ops->lib->dump_fh)
  830. priv->cfg->ops->lib->dump_fh(priv, NULL, false);
  831. priv->cfg->ops->lib->dump_nic_event_log(priv, false, NULL, false);
  832. #ifdef CONFIG_IWLWIFI_DEBUG
  833. if (iwl_get_debug_level(priv) & IWL_DL_FW_ERRORS)
  834. iwl_print_rx_config_cmd(priv,
  835. &priv->contexts[IWL_RXON_CTX_BSS]);
  836. #endif
  837. wake_up_interruptible(&priv->wait_command_queue);
  838. /* Keep the restart process from trying to send host
  839. * commands by clearing the INIT status bit */
  840. clear_bit(STATUS_READY, &priv->status);
  841. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  842. IWL_DEBUG(priv, IWL_DL_FW_ERRORS,
  843. "Restarting adapter due to uCode error.\n");
  844. if (priv->cfg->mod_params->restart_fw)
  845. queue_work(priv->workqueue, &priv->restart);
  846. }
  847. }
  848. EXPORT_SYMBOL(iwl_irq_handle_error);
  849. static int iwl_apm_stop_master(struct iwl_priv *priv)
  850. {
  851. int ret = 0;
  852. /* stop device's busmaster DMA activity */
  853. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
  854. ret = iwl_poll_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
  855. CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
  856. if (ret)
  857. IWL_WARN(priv, "Master Disable Timed Out, 100 usec\n");
  858. IWL_DEBUG_INFO(priv, "stop master\n");
  859. return ret;
  860. }
  861. void iwl_apm_stop(struct iwl_priv *priv)
  862. {
  863. IWL_DEBUG_INFO(priv, "Stop card, put in low power state\n");
  864. /* Stop device's DMA activity */
  865. iwl_apm_stop_master(priv);
  866. /* Reset the entire device */
  867. iwl_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  868. udelay(10);
  869. /*
  870. * Clear "initialization complete" bit to move adapter from
  871. * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
  872. */
  873. iwl_clear_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  874. }
  875. EXPORT_SYMBOL(iwl_apm_stop);
  876. /*
  877. * Start up NIC's basic functionality after it has been reset
  878. * (e.g. after platform boot, or shutdown via iwl_apm_stop())
  879. * NOTE: This does not load uCode nor start the embedded processor
  880. */
  881. int iwl_apm_init(struct iwl_priv *priv)
  882. {
  883. int ret = 0;
  884. u16 lctl;
  885. IWL_DEBUG_INFO(priv, "Init card's basic functions\n");
  886. /*
  887. * Use "set_bit" below rather than "write", to preserve any hardware
  888. * bits already set by default after reset.
  889. */
  890. /* Disable L0S exit timer (platform NMI Work/Around) */
  891. iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  892. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  893. /*
  894. * Disable L0s without affecting L1;
  895. * don't wait for ICH L0s (ICH bug W/A)
  896. */
  897. iwl_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  898. CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
  899. /* Set FH wait threshold to maximum (HW error during stress W/A) */
  900. iwl_set_bit(priv, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
  901. /*
  902. * Enable HAP INTA (interrupt from management bus) to
  903. * wake device's PCI Express link L1a -> L0s
  904. * NOTE: This is no-op for 3945 (non-existant bit)
  905. */
  906. iwl_set_bit(priv, CSR_HW_IF_CONFIG_REG,
  907. CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
  908. /*
  909. * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
  910. * Check if BIOS (or OS) enabled L1-ASPM on this device.
  911. * If so (likely), disable L0S, so device moves directly L0->L1;
  912. * costs negligible amount of power savings.
  913. * If not (unlikely), enable L0S, so there is at least some
  914. * power savings, even without L1.
  915. */
  916. if (priv->cfg->base_params->set_l0s) {
  917. lctl = iwl_pcie_link_ctl(priv);
  918. if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
  919. PCI_CFG_LINK_CTRL_VAL_L1_EN) {
  920. /* L1-ASPM enabled; disable(!) L0S */
  921. iwl_set_bit(priv, CSR_GIO_REG,
  922. CSR_GIO_REG_VAL_L0S_ENABLED);
  923. IWL_DEBUG_POWER(priv, "L1 Enabled; Disabling L0S\n");
  924. } else {
  925. /* L1-ASPM disabled; enable(!) L0S */
  926. iwl_clear_bit(priv, CSR_GIO_REG,
  927. CSR_GIO_REG_VAL_L0S_ENABLED);
  928. IWL_DEBUG_POWER(priv, "L1 Disabled; Enabling L0S\n");
  929. }
  930. }
  931. /* Configure analog phase-lock-loop before activating to D0A */
  932. if (priv->cfg->base_params->pll_cfg_val)
  933. iwl_set_bit(priv, CSR_ANA_PLL_CFG,
  934. priv->cfg->base_params->pll_cfg_val);
  935. /*
  936. * Set "initialization complete" bit to move adapter from
  937. * D0U* --> D0A* (powered-up active) state.
  938. */
  939. iwl_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  940. /*
  941. * Wait for clock stabilization; once stabilized, access to
  942. * device-internal resources is supported, e.g. iwl_write_prph()
  943. * and accesses to uCode SRAM.
  944. */
  945. ret = iwl_poll_bit(priv, CSR_GP_CNTRL,
  946. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  947. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  948. if (ret < 0) {
  949. IWL_DEBUG_INFO(priv, "Failed to init the card\n");
  950. goto out;
  951. }
  952. /*
  953. * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
  954. * BSM (Boostrap State Machine) is only in 3945 and 4965;
  955. * later devices (i.e. 5000 and later) have non-volatile SRAM,
  956. * and don't need BSM to restore data after power-saving sleep.
  957. *
  958. * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
  959. * do not disable clocks. This preserves any hardware bits already
  960. * set by default in "CLK_CTRL_REG" after reset.
  961. */
  962. if (priv->cfg->base_params->use_bsm)
  963. iwl_write_prph(priv, APMG_CLK_EN_REG,
  964. APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
  965. else
  966. iwl_write_prph(priv, APMG_CLK_EN_REG,
  967. APMG_CLK_VAL_DMA_CLK_RQT);
  968. udelay(20);
  969. /* Disable L1-Active */
  970. iwl_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
  971. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  972. out:
  973. return ret;
  974. }
  975. EXPORT_SYMBOL(iwl_apm_init);
  976. int iwl_set_tx_power(struct iwl_priv *priv, s8 tx_power, bool force)
  977. {
  978. int ret;
  979. s8 prev_tx_power;
  980. bool defer;
  981. struct iwl_rxon_context *ctx = &priv->contexts[IWL_RXON_CTX_BSS];
  982. lockdep_assert_held(&priv->mutex);
  983. if (priv->tx_power_user_lmt == tx_power && !force)
  984. return 0;
  985. if (!priv->cfg->ops->lib->send_tx_power)
  986. return -EOPNOTSUPP;
  987. if (tx_power < IWLAGN_TX_POWER_TARGET_POWER_MIN) {
  988. IWL_WARN(priv,
  989. "Requested user TXPOWER %d below lower limit %d.\n",
  990. tx_power,
  991. IWLAGN_TX_POWER_TARGET_POWER_MIN);
  992. return -EINVAL;
  993. }
  994. if (tx_power > priv->tx_power_device_lmt) {
  995. IWL_WARN(priv,
  996. "Requested user TXPOWER %d above upper limit %d.\n",
  997. tx_power, priv->tx_power_device_lmt);
  998. return -EINVAL;
  999. }
  1000. if (!iwl_is_ready_rf(priv))
  1001. return -EIO;
  1002. /* scan complete and commit_rxon use tx_power_next value,
  1003. * it always need to be updated for newest request */
  1004. priv->tx_power_next = tx_power;
  1005. /* do not set tx power when scanning or channel changing */
  1006. defer = test_bit(STATUS_SCANNING, &priv->status) ||
  1007. memcmp(&ctx->active, &ctx->staging, sizeof(ctx->staging));
  1008. if (defer && !force) {
  1009. IWL_DEBUG_INFO(priv, "Deferring tx power set\n");
  1010. return 0;
  1011. }
  1012. prev_tx_power = priv->tx_power_user_lmt;
  1013. priv->tx_power_user_lmt = tx_power;
  1014. ret = priv->cfg->ops->lib->send_tx_power(priv);
  1015. /* if fail to set tx_power, restore the orig. tx power */
  1016. if (ret) {
  1017. priv->tx_power_user_lmt = prev_tx_power;
  1018. priv->tx_power_next = prev_tx_power;
  1019. }
  1020. return ret;
  1021. }
  1022. EXPORT_SYMBOL(iwl_set_tx_power);
  1023. void iwl_send_bt_config(struct iwl_priv *priv)
  1024. {
  1025. struct iwl_bt_cmd bt_cmd = {
  1026. .lead_time = BT_LEAD_TIME_DEF,
  1027. .max_kill = BT_MAX_KILL_DEF,
  1028. .kill_ack_mask = 0,
  1029. .kill_cts_mask = 0,
  1030. };
  1031. if (!bt_coex_active)
  1032. bt_cmd.flags = BT_COEX_DISABLE;
  1033. else
  1034. bt_cmd.flags = BT_COEX_ENABLE;
  1035. priv->bt_enable_flag = bt_cmd.flags;
  1036. IWL_DEBUG_INFO(priv, "BT coex %s\n",
  1037. (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
  1038. if (iwl_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1039. sizeof(struct iwl_bt_cmd), &bt_cmd))
  1040. IWL_ERR(priv, "failed to send BT Coex Config\n");
  1041. }
  1042. EXPORT_SYMBOL(iwl_send_bt_config);
  1043. int iwl_send_statistics_request(struct iwl_priv *priv, u8 flags, bool clear)
  1044. {
  1045. struct iwl_statistics_cmd statistics_cmd = {
  1046. .configuration_flags =
  1047. clear ? IWL_STATS_CONF_CLEAR_STATS : 0,
  1048. };
  1049. if (flags & CMD_ASYNC)
  1050. return iwl_send_cmd_pdu_async(priv, REPLY_STATISTICS_CMD,
  1051. sizeof(struct iwl_statistics_cmd),
  1052. &statistics_cmd, NULL);
  1053. else
  1054. return iwl_send_cmd_pdu(priv, REPLY_STATISTICS_CMD,
  1055. sizeof(struct iwl_statistics_cmd),
  1056. &statistics_cmd);
  1057. }
  1058. EXPORT_SYMBOL(iwl_send_statistics_request);
  1059. void iwl_rx_pm_sleep_notif(struct iwl_priv *priv,
  1060. struct iwl_rx_mem_buffer *rxb)
  1061. {
  1062. #ifdef CONFIG_IWLWIFI_DEBUG
  1063. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1064. struct iwl_sleep_notification *sleep = &(pkt->u.sleep_notif);
  1065. IWL_DEBUG_RX(priv, "sleep mode: %d, src: %d\n",
  1066. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  1067. #endif
  1068. }
  1069. EXPORT_SYMBOL(iwl_rx_pm_sleep_notif);
  1070. void iwl_rx_pm_debug_statistics_notif(struct iwl_priv *priv,
  1071. struct iwl_rx_mem_buffer *rxb)
  1072. {
  1073. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1074. u32 len = le32_to_cpu(pkt->len_n_flags) & FH_RSCSR_FRAME_SIZE_MSK;
  1075. IWL_DEBUG_RADIO(priv, "Dumping %d bytes of unhandled "
  1076. "notification for %s:\n", len,
  1077. get_cmd_string(pkt->hdr.cmd));
  1078. iwl_print_hex_dump(priv, IWL_DL_RADIO, pkt->u.raw, len);
  1079. }
  1080. EXPORT_SYMBOL(iwl_rx_pm_debug_statistics_notif);
  1081. void iwl_rx_reply_error(struct iwl_priv *priv,
  1082. struct iwl_rx_mem_buffer *rxb)
  1083. {
  1084. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  1085. IWL_ERR(priv, "Error Reply type 0x%08X cmd %s (0x%02X) "
  1086. "seq 0x%04X ser 0x%08X\n",
  1087. le32_to_cpu(pkt->u.err_resp.error_type),
  1088. get_cmd_string(pkt->u.err_resp.cmd_id),
  1089. pkt->u.err_resp.cmd_id,
  1090. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  1091. le32_to_cpu(pkt->u.err_resp.error_info));
  1092. }
  1093. EXPORT_SYMBOL(iwl_rx_reply_error);
  1094. void iwl_clear_isr_stats(struct iwl_priv *priv)
  1095. {
  1096. memset(&priv->isr_stats, 0, sizeof(priv->isr_stats));
  1097. }
  1098. int iwl_mac_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1099. const struct ieee80211_tx_queue_params *params)
  1100. {
  1101. struct iwl_priv *priv = hw->priv;
  1102. struct iwl_rxon_context *ctx;
  1103. unsigned long flags;
  1104. int q;
  1105. IWL_DEBUG_MAC80211(priv, "enter\n");
  1106. if (!iwl_is_ready_rf(priv)) {
  1107. IWL_DEBUG_MAC80211(priv, "leave - RF not ready\n");
  1108. return -EIO;
  1109. }
  1110. if (queue >= AC_NUM) {
  1111. IWL_DEBUG_MAC80211(priv, "leave - queue >= AC_NUM %d\n", queue);
  1112. return 0;
  1113. }
  1114. q = AC_NUM - 1 - queue;
  1115. spin_lock_irqsave(&priv->lock, flags);
  1116. /*
  1117. * MULTI-FIXME
  1118. * This may need to be done per interface in nl80211/cfg80211/mac80211.
  1119. */
  1120. for_each_context(priv, ctx) {
  1121. ctx->qos_data.def_qos_parm.ac[q].cw_min =
  1122. cpu_to_le16(params->cw_min);
  1123. ctx->qos_data.def_qos_parm.ac[q].cw_max =
  1124. cpu_to_le16(params->cw_max);
  1125. ctx->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  1126. ctx->qos_data.def_qos_parm.ac[q].edca_txop =
  1127. cpu_to_le16((params->txop * 32));
  1128. ctx->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  1129. }
  1130. spin_unlock_irqrestore(&priv->lock, flags);
  1131. IWL_DEBUG_MAC80211(priv, "leave\n");
  1132. return 0;
  1133. }
  1134. EXPORT_SYMBOL(iwl_mac_conf_tx);
  1135. int iwl_mac_tx_last_beacon(struct ieee80211_hw *hw)
  1136. {
  1137. struct iwl_priv *priv = hw->priv;
  1138. return priv->ibss_manager == IWL_IBSS_MANAGER;
  1139. }
  1140. EXPORT_SYMBOL_GPL(iwl_mac_tx_last_beacon);
  1141. static int iwl_set_mode(struct iwl_priv *priv, struct iwl_rxon_context *ctx)
  1142. {
  1143. iwl_connection_init_rx_config(priv, ctx);
  1144. if (priv->cfg->ops->hcmd->set_rxon_chain)
  1145. priv->cfg->ops->hcmd->set_rxon_chain(priv, ctx);
  1146. return iwlcore_commit_rxon(priv, ctx);
  1147. }
  1148. static int iwl_setup_interface(struct iwl_priv *priv,
  1149. struct iwl_rxon_context *ctx)
  1150. {
  1151. struct ieee80211_vif *vif = ctx->vif;
  1152. int err;
  1153. lockdep_assert_held(&priv->mutex);
  1154. /*
  1155. * This variable will be correct only when there's just
  1156. * a single context, but all code using it is for hardware
  1157. * that supports only one context.
  1158. */
  1159. priv->iw_mode = vif->type;
  1160. ctx->is_active = true;
  1161. err = iwl_set_mode(priv, ctx);
  1162. if (err) {
  1163. if (!ctx->always_active)
  1164. ctx->is_active = false;
  1165. return err;
  1166. }
  1167. if (priv->cfg->bt_params && priv->cfg->bt_params->advanced_bt_coexist &&
  1168. vif->type == NL80211_IFTYPE_ADHOC) {
  1169. /*
  1170. * pretend to have high BT traffic as long as we
  1171. * are operating in IBSS mode, as this will cause
  1172. * the rate scaling etc. to behave as intended.
  1173. */
  1174. priv->bt_traffic_load = IWL_BT_COEX_TRAFFIC_LOAD_HIGH;
  1175. }
  1176. return 0;
  1177. }
  1178. int iwl_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  1179. {
  1180. struct iwl_priv *priv = hw->priv;
  1181. struct iwl_vif_priv *vif_priv = (void *)vif->drv_priv;
  1182. struct iwl_rxon_context *tmp, *ctx = NULL;
  1183. int err;
  1184. enum nl80211_iftype viftype = ieee80211_vif_type_p2p(vif);
  1185. IWL_DEBUG_MAC80211(priv, "enter: type %d, addr %pM\n",
  1186. viftype, vif->addr);
  1187. mutex_lock(&priv->mutex);
  1188. if (!iwl_is_ready_rf(priv)) {
  1189. IWL_WARN(priv, "Try to add interface when device not ready\n");
  1190. err = -EINVAL;
  1191. goto out;
  1192. }
  1193. for_each_context(priv, tmp) {
  1194. u32 possible_modes =
  1195. tmp->interface_modes | tmp->exclusive_interface_modes;
  1196. if (tmp->vif) {
  1197. /* check if this busy context is exclusive */
  1198. if (tmp->exclusive_interface_modes &
  1199. BIT(tmp->vif->type)) {
  1200. err = -EINVAL;
  1201. goto out;
  1202. }
  1203. continue;
  1204. }
  1205. if (!(possible_modes & BIT(viftype)))
  1206. continue;
  1207. /* have maybe usable context w/o interface */
  1208. ctx = tmp;
  1209. break;
  1210. }
  1211. if (!ctx) {
  1212. err = -EOPNOTSUPP;
  1213. goto out;
  1214. }
  1215. vif_priv->ctx = ctx;
  1216. ctx->vif = vif;
  1217. err = iwl_setup_interface(priv, ctx);
  1218. if (!err)
  1219. goto out;
  1220. ctx->vif = NULL;
  1221. priv->iw_mode = NL80211_IFTYPE_STATION;
  1222. out:
  1223. mutex_unlock(&priv->mutex);
  1224. IWL_DEBUG_MAC80211(priv, "leave\n");
  1225. return err;
  1226. }
  1227. EXPORT_SYMBOL(iwl_mac_add_interface);
  1228. static void iwl_teardown_interface(struct iwl_priv *priv,
  1229. struct ieee80211_vif *vif,
  1230. bool mode_change)
  1231. {
  1232. struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
  1233. lockdep_assert_held(&priv->mutex);
  1234. if (priv->scan_vif == vif) {
  1235. iwl_scan_cancel_timeout(priv, 200);
  1236. iwl_force_scan_end(priv);
  1237. }
  1238. if (!mode_change) {
  1239. iwl_set_mode(priv, ctx);
  1240. if (!ctx->always_active)
  1241. ctx->is_active = false;
  1242. }
  1243. /*
  1244. * When removing the IBSS interface, overwrite the
  1245. * BT traffic load with the stored one from the last
  1246. * notification, if any. If this is a device that
  1247. * doesn't implement this, this has no effect since
  1248. * both values are the same and zero.
  1249. */
  1250. if (vif->type == NL80211_IFTYPE_ADHOC)
  1251. priv->bt_traffic_load = priv->last_bt_traffic_load;
  1252. }
  1253. void iwl_mac_remove_interface(struct ieee80211_hw *hw,
  1254. struct ieee80211_vif *vif)
  1255. {
  1256. struct iwl_priv *priv = hw->priv;
  1257. struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
  1258. IWL_DEBUG_MAC80211(priv, "enter\n");
  1259. mutex_lock(&priv->mutex);
  1260. WARN_ON(ctx->vif != vif);
  1261. ctx->vif = NULL;
  1262. iwl_teardown_interface(priv, vif, false);
  1263. memset(priv->bssid, 0, ETH_ALEN);
  1264. mutex_unlock(&priv->mutex);
  1265. IWL_DEBUG_MAC80211(priv, "leave\n");
  1266. }
  1267. EXPORT_SYMBOL(iwl_mac_remove_interface);
  1268. int iwl_alloc_txq_mem(struct iwl_priv *priv)
  1269. {
  1270. if (!priv->txq)
  1271. priv->txq = kzalloc(
  1272. sizeof(struct iwl_tx_queue) *
  1273. priv->cfg->base_params->num_of_queues,
  1274. GFP_KERNEL);
  1275. if (!priv->txq) {
  1276. IWL_ERR(priv, "Not enough memory for txq\n");
  1277. return -ENOMEM;
  1278. }
  1279. return 0;
  1280. }
  1281. EXPORT_SYMBOL(iwl_alloc_txq_mem);
  1282. void iwl_free_txq_mem(struct iwl_priv *priv)
  1283. {
  1284. kfree(priv->txq);
  1285. priv->txq = NULL;
  1286. }
  1287. EXPORT_SYMBOL(iwl_free_txq_mem);
  1288. #ifdef CONFIG_IWLWIFI_DEBUGFS
  1289. #define IWL_TRAFFIC_DUMP_SIZE (IWL_TRAFFIC_ENTRY_SIZE * IWL_TRAFFIC_ENTRIES)
  1290. void iwl_reset_traffic_log(struct iwl_priv *priv)
  1291. {
  1292. priv->tx_traffic_idx = 0;
  1293. priv->rx_traffic_idx = 0;
  1294. if (priv->tx_traffic)
  1295. memset(priv->tx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
  1296. if (priv->rx_traffic)
  1297. memset(priv->rx_traffic, 0, IWL_TRAFFIC_DUMP_SIZE);
  1298. }
  1299. int iwl_alloc_traffic_mem(struct iwl_priv *priv)
  1300. {
  1301. u32 traffic_size = IWL_TRAFFIC_DUMP_SIZE;
  1302. if (iwl_debug_level & IWL_DL_TX) {
  1303. if (!priv->tx_traffic) {
  1304. priv->tx_traffic =
  1305. kzalloc(traffic_size, GFP_KERNEL);
  1306. if (!priv->tx_traffic)
  1307. return -ENOMEM;
  1308. }
  1309. }
  1310. if (iwl_debug_level & IWL_DL_RX) {
  1311. if (!priv->rx_traffic) {
  1312. priv->rx_traffic =
  1313. kzalloc(traffic_size, GFP_KERNEL);
  1314. if (!priv->rx_traffic)
  1315. return -ENOMEM;
  1316. }
  1317. }
  1318. iwl_reset_traffic_log(priv);
  1319. return 0;
  1320. }
  1321. EXPORT_SYMBOL(iwl_alloc_traffic_mem);
  1322. void iwl_free_traffic_mem(struct iwl_priv *priv)
  1323. {
  1324. kfree(priv->tx_traffic);
  1325. priv->tx_traffic = NULL;
  1326. kfree(priv->rx_traffic);
  1327. priv->rx_traffic = NULL;
  1328. }
  1329. EXPORT_SYMBOL(iwl_free_traffic_mem);
  1330. void iwl_dbg_log_tx_data_frame(struct iwl_priv *priv,
  1331. u16 length, struct ieee80211_hdr *header)
  1332. {
  1333. __le16 fc;
  1334. u16 len;
  1335. if (likely(!(iwl_debug_level & IWL_DL_TX)))
  1336. return;
  1337. if (!priv->tx_traffic)
  1338. return;
  1339. fc = header->frame_control;
  1340. if (ieee80211_is_data(fc)) {
  1341. len = (length > IWL_TRAFFIC_ENTRY_SIZE)
  1342. ? IWL_TRAFFIC_ENTRY_SIZE : length;
  1343. memcpy((priv->tx_traffic +
  1344. (priv->tx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
  1345. header, len);
  1346. priv->tx_traffic_idx =
  1347. (priv->tx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
  1348. }
  1349. }
  1350. EXPORT_SYMBOL(iwl_dbg_log_tx_data_frame);
  1351. void iwl_dbg_log_rx_data_frame(struct iwl_priv *priv,
  1352. u16 length, struct ieee80211_hdr *header)
  1353. {
  1354. __le16 fc;
  1355. u16 len;
  1356. if (likely(!(iwl_debug_level & IWL_DL_RX)))
  1357. return;
  1358. if (!priv->rx_traffic)
  1359. return;
  1360. fc = header->frame_control;
  1361. if (ieee80211_is_data(fc)) {
  1362. len = (length > IWL_TRAFFIC_ENTRY_SIZE)
  1363. ? IWL_TRAFFIC_ENTRY_SIZE : length;
  1364. memcpy((priv->rx_traffic +
  1365. (priv->rx_traffic_idx * IWL_TRAFFIC_ENTRY_SIZE)),
  1366. header, len);
  1367. priv->rx_traffic_idx =
  1368. (priv->rx_traffic_idx + 1) % IWL_TRAFFIC_ENTRIES;
  1369. }
  1370. }
  1371. EXPORT_SYMBOL(iwl_dbg_log_rx_data_frame);
  1372. const char *get_mgmt_string(int cmd)
  1373. {
  1374. switch (cmd) {
  1375. IWL_CMD(MANAGEMENT_ASSOC_REQ);
  1376. IWL_CMD(MANAGEMENT_ASSOC_RESP);
  1377. IWL_CMD(MANAGEMENT_REASSOC_REQ);
  1378. IWL_CMD(MANAGEMENT_REASSOC_RESP);
  1379. IWL_CMD(MANAGEMENT_PROBE_REQ);
  1380. IWL_CMD(MANAGEMENT_PROBE_RESP);
  1381. IWL_CMD(MANAGEMENT_BEACON);
  1382. IWL_CMD(MANAGEMENT_ATIM);
  1383. IWL_CMD(MANAGEMENT_DISASSOC);
  1384. IWL_CMD(MANAGEMENT_AUTH);
  1385. IWL_CMD(MANAGEMENT_DEAUTH);
  1386. IWL_CMD(MANAGEMENT_ACTION);
  1387. default:
  1388. return "UNKNOWN";
  1389. }
  1390. }
  1391. const char *get_ctrl_string(int cmd)
  1392. {
  1393. switch (cmd) {
  1394. IWL_CMD(CONTROL_BACK_REQ);
  1395. IWL_CMD(CONTROL_BACK);
  1396. IWL_CMD(CONTROL_PSPOLL);
  1397. IWL_CMD(CONTROL_RTS);
  1398. IWL_CMD(CONTROL_CTS);
  1399. IWL_CMD(CONTROL_ACK);
  1400. IWL_CMD(CONTROL_CFEND);
  1401. IWL_CMD(CONTROL_CFENDACK);
  1402. default:
  1403. return "UNKNOWN";
  1404. }
  1405. }
  1406. void iwl_clear_traffic_stats(struct iwl_priv *priv)
  1407. {
  1408. memset(&priv->tx_stats, 0, sizeof(struct traffic_stats));
  1409. memset(&priv->rx_stats, 0, sizeof(struct traffic_stats));
  1410. }
  1411. /*
  1412. * if CONFIG_IWLWIFI_DEBUGFS defined, iwl_update_stats function will
  1413. * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass.
  1414. * Use debugFs to display the rx/rx_statistics
  1415. * if CONFIG_IWLWIFI_DEBUGFS not being defined, then no MGMT and CTRL
  1416. * information will be recorded, but DATA pkt still will be recorded
  1417. * for the reason of iwl_led.c need to control the led blinking based on
  1418. * number of tx and rx data.
  1419. *
  1420. */
  1421. void iwl_update_stats(struct iwl_priv *priv, bool is_tx, __le16 fc, u16 len)
  1422. {
  1423. struct traffic_stats *stats;
  1424. if (is_tx)
  1425. stats = &priv->tx_stats;
  1426. else
  1427. stats = &priv->rx_stats;
  1428. if (ieee80211_is_mgmt(fc)) {
  1429. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  1430. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  1431. stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
  1432. break;
  1433. case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
  1434. stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
  1435. break;
  1436. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  1437. stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
  1438. break;
  1439. case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
  1440. stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
  1441. break;
  1442. case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
  1443. stats->mgmt[MANAGEMENT_PROBE_REQ]++;
  1444. break;
  1445. case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
  1446. stats->mgmt[MANAGEMENT_PROBE_RESP]++;
  1447. break;
  1448. case cpu_to_le16(IEEE80211_STYPE_BEACON):
  1449. stats->mgmt[MANAGEMENT_BEACON]++;
  1450. break;
  1451. case cpu_to_le16(IEEE80211_STYPE_ATIM):
  1452. stats->mgmt[MANAGEMENT_ATIM]++;
  1453. break;
  1454. case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
  1455. stats->mgmt[MANAGEMENT_DISASSOC]++;
  1456. break;
  1457. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  1458. stats->mgmt[MANAGEMENT_AUTH]++;
  1459. break;
  1460. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  1461. stats->mgmt[MANAGEMENT_DEAUTH]++;
  1462. break;
  1463. case cpu_to_le16(IEEE80211_STYPE_ACTION):
  1464. stats->mgmt[MANAGEMENT_ACTION]++;
  1465. break;
  1466. }
  1467. } else if (ieee80211_is_ctl(fc)) {
  1468. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  1469. case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
  1470. stats->ctrl[CONTROL_BACK_REQ]++;
  1471. break;
  1472. case cpu_to_le16(IEEE80211_STYPE_BACK):
  1473. stats->ctrl[CONTROL_BACK]++;
  1474. break;
  1475. case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
  1476. stats->ctrl[CONTROL_PSPOLL]++;
  1477. break;
  1478. case cpu_to_le16(IEEE80211_STYPE_RTS):
  1479. stats->ctrl[CONTROL_RTS]++;
  1480. break;
  1481. case cpu_to_le16(IEEE80211_STYPE_CTS):
  1482. stats->ctrl[CONTROL_CTS]++;
  1483. break;
  1484. case cpu_to_le16(IEEE80211_STYPE_ACK):
  1485. stats->ctrl[CONTROL_ACK]++;
  1486. break;
  1487. case cpu_to_le16(IEEE80211_STYPE_CFEND):
  1488. stats->ctrl[CONTROL_CFEND]++;
  1489. break;
  1490. case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
  1491. stats->ctrl[CONTROL_CFENDACK]++;
  1492. break;
  1493. }
  1494. } else {
  1495. /* data */
  1496. stats->data_cnt++;
  1497. stats->data_bytes += len;
  1498. }
  1499. }
  1500. EXPORT_SYMBOL(iwl_update_stats);
  1501. #endif
  1502. static void iwl_force_rf_reset(struct iwl_priv *priv)
  1503. {
  1504. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1505. return;
  1506. if (!iwl_is_any_associated(priv)) {
  1507. IWL_DEBUG_SCAN(priv, "force reset rejected: not associated\n");
  1508. return;
  1509. }
  1510. /*
  1511. * There is no easy and better way to force reset the radio,
  1512. * the only known method is switching channel which will force to
  1513. * reset and tune the radio.
  1514. * Use internal short scan (single channel) operation to should
  1515. * achieve this objective.
  1516. * Driver should reset the radio when number of consecutive missed
  1517. * beacon, or any other uCode error condition detected.
  1518. */
  1519. IWL_DEBUG_INFO(priv, "perform radio reset.\n");
  1520. iwl_internal_short_hw_scan(priv);
  1521. }
  1522. int iwl_force_reset(struct iwl_priv *priv, int mode, bool external)
  1523. {
  1524. struct iwl_force_reset *force_reset;
  1525. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1526. return -EINVAL;
  1527. if (mode >= IWL_MAX_FORCE_RESET) {
  1528. IWL_DEBUG_INFO(priv, "invalid reset request.\n");
  1529. return -EINVAL;
  1530. }
  1531. force_reset = &priv->force_reset[mode];
  1532. force_reset->reset_request_count++;
  1533. if (!external) {
  1534. if (force_reset->last_force_reset_jiffies &&
  1535. time_after(force_reset->last_force_reset_jiffies +
  1536. force_reset->reset_duration, jiffies)) {
  1537. IWL_DEBUG_INFO(priv, "force reset rejected\n");
  1538. force_reset->reset_reject_count++;
  1539. return -EAGAIN;
  1540. }
  1541. }
  1542. force_reset->reset_success_count++;
  1543. force_reset->last_force_reset_jiffies = jiffies;
  1544. IWL_DEBUG_INFO(priv, "perform force reset (%d)\n", mode);
  1545. switch (mode) {
  1546. case IWL_RF_RESET:
  1547. iwl_force_rf_reset(priv);
  1548. break;
  1549. case IWL_FW_RESET:
  1550. /*
  1551. * if the request is from external(ex: debugfs),
  1552. * then always perform the request in regardless the module
  1553. * parameter setting
  1554. * if the request is from internal (uCode error or driver
  1555. * detect failure), then fw_restart module parameter
  1556. * need to be check before performing firmware reload
  1557. */
  1558. if (!external && !priv->cfg->mod_params->restart_fw) {
  1559. IWL_DEBUG_INFO(priv, "Cancel firmware reload based on "
  1560. "module parameter setting\n");
  1561. break;
  1562. }
  1563. IWL_ERR(priv, "On demand firmware reload\n");
  1564. /* Set the FW error flag -- cleared on iwl_down */
  1565. set_bit(STATUS_FW_ERROR, &priv->status);
  1566. wake_up_interruptible(&priv->wait_command_queue);
  1567. /*
  1568. * Keep the restart process from trying to send host
  1569. * commands by clearing the INIT status bit
  1570. */
  1571. clear_bit(STATUS_READY, &priv->status);
  1572. queue_work(priv->workqueue, &priv->restart);
  1573. break;
  1574. }
  1575. return 0;
  1576. }
  1577. int iwl_mac_change_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  1578. enum nl80211_iftype newtype, bool newp2p)
  1579. {
  1580. struct iwl_priv *priv = hw->priv;
  1581. struct iwl_rxon_context *ctx = iwl_rxon_ctx_from_vif(vif);
  1582. struct iwl_rxon_context *tmp;
  1583. u32 interface_modes;
  1584. int err;
  1585. newtype = ieee80211_iftype_p2p(newtype, newp2p);
  1586. mutex_lock(&priv->mutex);
  1587. interface_modes = ctx->interface_modes | ctx->exclusive_interface_modes;
  1588. if (!(interface_modes & BIT(newtype))) {
  1589. err = -EBUSY;
  1590. goto out;
  1591. }
  1592. if (ctx->exclusive_interface_modes & BIT(newtype)) {
  1593. for_each_context(priv, tmp) {
  1594. if (ctx == tmp)
  1595. continue;
  1596. if (!tmp->vif)
  1597. continue;
  1598. /*
  1599. * The current mode switch would be exclusive, but
  1600. * another context is active ... refuse the switch.
  1601. */
  1602. err = -EBUSY;
  1603. goto out;
  1604. }
  1605. }
  1606. /* success */
  1607. iwl_teardown_interface(priv, vif, true);
  1608. vif->type = newtype;
  1609. err = iwl_setup_interface(priv, ctx);
  1610. WARN_ON(err);
  1611. /*
  1612. * We've switched internally, but submitting to the
  1613. * device may have failed for some reason. Mask this
  1614. * error, because otherwise mac80211 will not switch
  1615. * (and set the interface type back) and we'll be
  1616. * out of sync with it.
  1617. */
  1618. err = 0;
  1619. out:
  1620. mutex_unlock(&priv->mutex);
  1621. return err;
  1622. }
  1623. EXPORT_SYMBOL(iwl_mac_change_interface);
  1624. /*
  1625. * On every watchdog tick we check (latest) time stamp. If it does not
  1626. * change during timeout period and queue is not empty we reset firmware.
  1627. */
  1628. static int iwl_check_stuck_queue(struct iwl_priv *priv, int cnt)
  1629. {
  1630. struct iwl_tx_queue *txq = &priv->txq[cnt];
  1631. struct iwl_queue *q = &txq->q;
  1632. unsigned long timeout;
  1633. int ret;
  1634. if (q->read_ptr == q->write_ptr) {
  1635. txq->time_stamp = jiffies;
  1636. return 0;
  1637. }
  1638. timeout = txq->time_stamp +
  1639. msecs_to_jiffies(priv->cfg->base_params->wd_timeout);
  1640. if (time_after(jiffies, timeout)) {
  1641. IWL_ERR(priv, "Queue %d stuck for %u ms.\n",
  1642. q->id, priv->cfg->base_params->wd_timeout);
  1643. ret = iwl_force_reset(priv, IWL_FW_RESET, false);
  1644. return (ret == -EAGAIN) ? 0 : 1;
  1645. }
  1646. return 0;
  1647. }
  1648. /*
  1649. * Making watchdog tick be a quarter of timeout assure we will
  1650. * discover the queue hung between timeout and 1.25*timeout
  1651. */
  1652. #define IWL_WD_TICK(timeout) ((timeout) / 4)
  1653. /*
  1654. * Watchdog timer callback, we check each tx queue for stuck, if if hung
  1655. * we reset the firmware. If everything is fine just rearm the timer.
  1656. */
  1657. void iwl_bg_watchdog(unsigned long data)
  1658. {
  1659. struct iwl_priv *priv = (struct iwl_priv *)data;
  1660. int cnt;
  1661. unsigned long timeout;
  1662. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1663. return;
  1664. timeout = priv->cfg->base_params->wd_timeout;
  1665. if (timeout == 0)
  1666. return;
  1667. /* monitor and check for stuck cmd queue */
  1668. if (iwl_check_stuck_queue(priv, priv->cmd_queue))
  1669. return;
  1670. /* monitor and check for other stuck queues */
  1671. if (iwl_is_any_associated(priv)) {
  1672. for (cnt = 0; cnt < priv->hw_params.max_txq_num; cnt++) {
  1673. /* skip as we already checked the command queue */
  1674. if (cnt == priv->cmd_queue)
  1675. continue;
  1676. if (iwl_check_stuck_queue(priv, cnt))
  1677. return;
  1678. }
  1679. }
  1680. mod_timer(&priv->watchdog, jiffies +
  1681. msecs_to_jiffies(IWL_WD_TICK(timeout)));
  1682. }
  1683. EXPORT_SYMBOL(iwl_bg_watchdog);
  1684. void iwl_setup_watchdog(struct iwl_priv *priv)
  1685. {
  1686. unsigned int timeout = priv->cfg->base_params->wd_timeout;
  1687. if (timeout)
  1688. mod_timer(&priv->watchdog,
  1689. jiffies + msecs_to_jiffies(IWL_WD_TICK(timeout)));
  1690. else
  1691. del_timer(&priv->watchdog);
  1692. }
  1693. EXPORT_SYMBOL(iwl_setup_watchdog);
  1694. /*
  1695. * extended beacon time format
  1696. * time in usec will be changed into a 32-bit value in extended:internal format
  1697. * the extended part is the beacon counts
  1698. * the internal part is the time in usec within one beacon interval
  1699. */
  1700. u32 iwl_usecs_to_beacons(struct iwl_priv *priv, u32 usec, u32 beacon_interval)
  1701. {
  1702. u32 quot;
  1703. u32 rem;
  1704. u32 interval = beacon_interval * TIME_UNIT;
  1705. if (!interval || !usec)
  1706. return 0;
  1707. quot = (usec / interval) &
  1708. (iwl_beacon_time_mask_high(priv,
  1709. priv->hw_params.beacon_time_tsf_bits) >>
  1710. priv->hw_params.beacon_time_tsf_bits);
  1711. rem = (usec % interval) & iwl_beacon_time_mask_low(priv,
  1712. priv->hw_params.beacon_time_tsf_bits);
  1713. return (quot << priv->hw_params.beacon_time_tsf_bits) + rem;
  1714. }
  1715. EXPORT_SYMBOL(iwl_usecs_to_beacons);
  1716. /* base is usually what we get from ucode with each received frame,
  1717. * the same as HW timer counter counting down
  1718. */
  1719. __le32 iwl_add_beacon_time(struct iwl_priv *priv, u32 base,
  1720. u32 addon, u32 beacon_interval)
  1721. {
  1722. u32 base_low = base & iwl_beacon_time_mask_low(priv,
  1723. priv->hw_params.beacon_time_tsf_bits);
  1724. u32 addon_low = addon & iwl_beacon_time_mask_low(priv,
  1725. priv->hw_params.beacon_time_tsf_bits);
  1726. u32 interval = beacon_interval * TIME_UNIT;
  1727. u32 res = (base & iwl_beacon_time_mask_high(priv,
  1728. priv->hw_params.beacon_time_tsf_bits)) +
  1729. (addon & iwl_beacon_time_mask_high(priv,
  1730. priv->hw_params.beacon_time_tsf_bits));
  1731. if (base_low > addon_low)
  1732. res += base_low - addon_low;
  1733. else if (base_low < addon_low) {
  1734. res += interval + base_low - addon_low;
  1735. res += (1 << priv->hw_params.beacon_time_tsf_bits);
  1736. } else
  1737. res += (1 << priv->hw_params.beacon_time_tsf_bits);
  1738. return cpu_to_le32(res);
  1739. }
  1740. EXPORT_SYMBOL(iwl_add_beacon_time);
  1741. #ifdef CONFIG_PM
  1742. int iwl_pci_suspend(struct device *device)
  1743. {
  1744. struct pci_dev *pdev = to_pci_dev(device);
  1745. struct iwl_priv *priv = pci_get_drvdata(pdev);
  1746. /*
  1747. * This function is called when system goes into suspend state
  1748. * mac80211 will call iwl_mac_stop() from the mac80211 suspend function
  1749. * first but since iwl_mac_stop() has no knowledge of who the caller is,
  1750. * it will not call apm_ops.stop() to stop the DMA operation.
  1751. * Calling apm_ops.stop here to make sure we stop the DMA.
  1752. */
  1753. iwl_apm_stop(priv);
  1754. return 0;
  1755. }
  1756. EXPORT_SYMBOL(iwl_pci_suspend);
  1757. int iwl_pci_resume(struct device *device)
  1758. {
  1759. struct pci_dev *pdev = to_pci_dev(device);
  1760. struct iwl_priv *priv = pci_get_drvdata(pdev);
  1761. bool hw_rfkill = false;
  1762. /*
  1763. * We disable the RETRY_TIMEOUT register (0x41) to keep
  1764. * PCI Tx retries from interfering with C3 CPU state.
  1765. */
  1766. pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
  1767. iwl_enable_interrupts(priv);
  1768. if (!(iwl_read32(priv, CSR_GP_CNTRL) &
  1769. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  1770. hw_rfkill = true;
  1771. if (hw_rfkill)
  1772. set_bit(STATUS_RF_KILL_HW, &priv->status);
  1773. else
  1774. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  1775. wiphy_rfkill_set_hw_state(priv->hw->wiphy, hw_rfkill);
  1776. return 0;
  1777. }
  1778. EXPORT_SYMBOL(iwl_pci_resume);
  1779. const struct dev_pm_ops iwl_pm_ops = {
  1780. .suspend = iwl_pci_suspend,
  1781. .resume = iwl_pci_resume,
  1782. .freeze = iwl_pci_suspend,
  1783. .thaw = iwl_pci_resume,
  1784. .poweroff = iwl_pci_suspend,
  1785. .restore = iwl_pci_resume,
  1786. };
  1787. EXPORT_SYMBOL(iwl_pm_ops);
  1788. #endif /* CONFIG_PM */