rx.c 22 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745
  1. /****************************************************************************
  2. * Driver for Solarflare Solarstorm network controllers and boards
  3. * Copyright 2005-2006 Fen Systems Ltd.
  4. * Copyright 2005-2009 Solarflare Communications Inc.
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License version 2 as published
  8. * by the Free Software Foundation, incorporated herein by reference.
  9. */
  10. #include <linux/socket.h>
  11. #include <linux/in.h>
  12. #include <linux/slab.h>
  13. #include <linux/ip.h>
  14. #include <linux/tcp.h>
  15. #include <linux/udp.h>
  16. #include <net/ip.h>
  17. #include <net/checksum.h>
  18. #include "net_driver.h"
  19. #include "efx.h"
  20. #include "nic.h"
  21. #include "selftest.h"
  22. #include "workarounds.h"
  23. /* Number of RX descriptors pushed at once. */
  24. #define EFX_RX_BATCH 8
  25. /* Maximum size of a buffer sharing a page */
  26. #define EFX_RX_HALF_PAGE ((PAGE_SIZE >> 1) - sizeof(struct efx_rx_page_state))
  27. /* Size of buffer allocated for skb header area. */
  28. #define EFX_SKB_HEADERS 64u
  29. /*
  30. * rx_alloc_method - RX buffer allocation method
  31. *
  32. * This driver supports two methods for allocating and using RX buffers:
  33. * each RX buffer may be backed by an skb or by an order-n page.
  34. *
  35. * When GRO is in use then the second method has a lower overhead,
  36. * since we don't have to allocate then free skbs on reassembled frames.
  37. *
  38. * Values:
  39. * - RX_ALLOC_METHOD_AUTO = 0
  40. * - RX_ALLOC_METHOD_SKB = 1
  41. * - RX_ALLOC_METHOD_PAGE = 2
  42. *
  43. * The heuristic for %RX_ALLOC_METHOD_AUTO is a simple hysteresis count
  44. * controlled by the parameters below.
  45. *
  46. * - Since pushing and popping descriptors are separated by the rx_queue
  47. * size, so the watermarks should be ~rxd_size.
  48. * - The performance win by using page-based allocation for GRO is less
  49. * than the performance hit of using page-based allocation of non-GRO,
  50. * so the watermarks should reflect this.
  51. *
  52. * Per channel we maintain a single variable, updated by each channel:
  53. *
  54. * rx_alloc_level += (gro_performed ? RX_ALLOC_FACTOR_GRO :
  55. * RX_ALLOC_FACTOR_SKB)
  56. * Per NAPI poll interval, we constrain rx_alloc_level to 0..MAX (which
  57. * limits the hysteresis), and update the allocation strategy:
  58. *
  59. * rx_alloc_method = (rx_alloc_level > RX_ALLOC_LEVEL_GRO ?
  60. * RX_ALLOC_METHOD_PAGE : RX_ALLOC_METHOD_SKB)
  61. */
  62. static int rx_alloc_method = RX_ALLOC_METHOD_AUTO;
  63. #define RX_ALLOC_LEVEL_GRO 0x2000
  64. #define RX_ALLOC_LEVEL_MAX 0x3000
  65. #define RX_ALLOC_FACTOR_GRO 1
  66. #define RX_ALLOC_FACTOR_SKB (-2)
  67. /* This is the percentage fill level below which new RX descriptors
  68. * will be added to the RX descriptor ring.
  69. */
  70. static unsigned int rx_refill_threshold = 90;
  71. /* This is the percentage fill level to which an RX queue will be refilled
  72. * when the "RX refill threshold" is reached.
  73. */
  74. static unsigned int rx_refill_limit = 95;
  75. /*
  76. * RX maximum head room required.
  77. *
  78. * This must be at least 1 to prevent overflow and at least 2 to allow
  79. * pipelined receives.
  80. */
  81. #define EFX_RXD_HEAD_ROOM 2
  82. static inline unsigned int efx_rx_buf_offset(struct efx_rx_buffer *buf)
  83. {
  84. /* Offset is always within one page, so we don't need to consider
  85. * the page order.
  86. */
  87. return (__force unsigned long) buf->data & (PAGE_SIZE - 1);
  88. }
  89. static inline unsigned int efx_rx_buf_size(struct efx_nic *efx)
  90. {
  91. return PAGE_SIZE << efx->rx_buffer_order;
  92. }
  93. static inline u32 efx_rx_buf_hash(struct efx_rx_buffer *buf)
  94. {
  95. #if defined(CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS) || NET_IP_ALIGN % 4 == 0
  96. return __le32_to_cpup((const __le32 *)(buf->data - 4));
  97. #else
  98. const u8 *data = (const u8 *)(buf->data - 4);
  99. return ((u32)data[0] |
  100. (u32)data[1] << 8 |
  101. (u32)data[2] << 16 |
  102. (u32)data[3] << 24);
  103. #endif
  104. }
  105. /**
  106. * efx_init_rx_buffers_skb - create EFX_RX_BATCH skb-based RX buffers
  107. *
  108. * @rx_queue: Efx RX queue
  109. *
  110. * This allocates EFX_RX_BATCH skbs, maps them for DMA, and populates a
  111. * struct efx_rx_buffer for each one. Return a negative error code or 0
  112. * on success. May fail having only inserted fewer than EFX_RX_BATCH
  113. * buffers.
  114. */
  115. static int efx_init_rx_buffers_skb(struct efx_rx_queue *rx_queue)
  116. {
  117. struct efx_nic *efx = rx_queue->efx;
  118. struct net_device *net_dev = efx->net_dev;
  119. struct efx_rx_buffer *rx_buf;
  120. int skb_len = efx->rx_buffer_len;
  121. unsigned index, count;
  122. for (count = 0; count < EFX_RX_BATCH; ++count) {
  123. index = rx_queue->added_count & rx_queue->ptr_mask;
  124. rx_buf = efx_rx_buffer(rx_queue, index);
  125. rx_buf->skb = netdev_alloc_skb(net_dev, skb_len);
  126. if (unlikely(!rx_buf->skb))
  127. return -ENOMEM;
  128. rx_buf->page = NULL;
  129. /* Adjust the SKB for padding and checksum */
  130. skb_reserve(rx_buf->skb, NET_IP_ALIGN);
  131. rx_buf->len = skb_len - NET_IP_ALIGN;
  132. rx_buf->data = (char *)rx_buf->skb->data;
  133. rx_buf->skb->ip_summed = CHECKSUM_UNNECESSARY;
  134. rx_buf->dma_addr = pci_map_single(efx->pci_dev,
  135. rx_buf->data, rx_buf->len,
  136. PCI_DMA_FROMDEVICE);
  137. if (unlikely(pci_dma_mapping_error(efx->pci_dev,
  138. rx_buf->dma_addr))) {
  139. dev_kfree_skb_any(rx_buf->skb);
  140. rx_buf->skb = NULL;
  141. return -EIO;
  142. }
  143. ++rx_queue->added_count;
  144. ++rx_queue->alloc_skb_count;
  145. }
  146. return 0;
  147. }
  148. /**
  149. * efx_init_rx_buffers_page - create EFX_RX_BATCH page-based RX buffers
  150. *
  151. * @rx_queue: Efx RX queue
  152. *
  153. * This allocates memory for EFX_RX_BATCH receive buffers, maps them for DMA,
  154. * and populates struct efx_rx_buffers for each one. Return a negative error
  155. * code or 0 on success. If a single page can be split between two buffers,
  156. * then the page will either be inserted fully, or not at at all.
  157. */
  158. static int efx_init_rx_buffers_page(struct efx_rx_queue *rx_queue)
  159. {
  160. struct efx_nic *efx = rx_queue->efx;
  161. struct efx_rx_buffer *rx_buf;
  162. struct page *page;
  163. void *page_addr;
  164. struct efx_rx_page_state *state;
  165. dma_addr_t dma_addr;
  166. unsigned index, count;
  167. /* We can split a page between two buffers */
  168. BUILD_BUG_ON(EFX_RX_BATCH & 1);
  169. for (count = 0; count < EFX_RX_BATCH; ++count) {
  170. page = alloc_pages(__GFP_COLD | __GFP_COMP | GFP_ATOMIC,
  171. efx->rx_buffer_order);
  172. if (unlikely(page == NULL))
  173. return -ENOMEM;
  174. dma_addr = pci_map_page(efx->pci_dev, page, 0,
  175. efx_rx_buf_size(efx),
  176. PCI_DMA_FROMDEVICE);
  177. if (unlikely(pci_dma_mapping_error(efx->pci_dev, dma_addr))) {
  178. __free_pages(page, efx->rx_buffer_order);
  179. return -EIO;
  180. }
  181. page_addr = page_address(page);
  182. state = page_addr;
  183. state->refcnt = 0;
  184. state->dma_addr = dma_addr;
  185. page_addr += sizeof(struct efx_rx_page_state);
  186. dma_addr += sizeof(struct efx_rx_page_state);
  187. split:
  188. index = rx_queue->added_count & rx_queue->ptr_mask;
  189. rx_buf = efx_rx_buffer(rx_queue, index);
  190. rx_buf->dma_addr = dma_addr + EFX_PAGE_IP_ALIGN;
  191. rx_buf->skb = NULL;
  192. rx_buf->page = page;
  193. rx_buf->data = page_addr + EFX_PAGE_IP_ALIGN;
  194. rx_buf->len = efx->rx_buffer_len - EFX_PAGE_IP_ALIGN;
  195. ++rx_queue->added_count;
  196. ++rx_queue->alloc_page_count;
  197. ++state->refcnt;
  198. if ((~count & 1) && (efx->rx_buffer_len <= EFX_RX_HALF_PAGE)) {
  199. /* Use the second half of the page */
  200. get_page(page);
  201. dma_addr += (PAGE_SIZE >> 1);
  202. page_addr += (PAGE_SIZE >> 1);
  203. ++count;
  204. goto split;
  205. }
  206. }
  207. return 0;
  208. }
  209. static void efx_unmap_rx_buffer(struct efx_nic *efx,
  210. struct efx_rx_buffer *rx_buf)
  211. {
  212. if (rx_buf->page) {
  213. struct efx_rx_page_state *state;
  214. EFX_BUG_ON_PARANOID(rx_buf->skb);
  215. state = page_address(rx_buf->page);
  216. if (--state->refcnt == 0) {
  217. pci_unmap_page(efx->pci_dev,
  218. state->dma_addr,
  219. efx_rx_buf_size(efx),
  220. PCI_DMA_FROMDEVICE);
  221. }
  222. } else if (likely(rx_buf->skb)) {
  223. pci_unmap_single(efx->pci_dev, rx_buf->dma_addr,
  224. rx_buf->len, PCI_DMA_FROMDEVICE);
  225. }
  226. }
  227. static void efx_free_rx_buffer(struct efx_nic *efx,
  228. struct efx_rx_buffer *rx_buf)
  229. {
  230. if (rx_buf->page) {
  231. __free_pages(rx_buf->page, efx->rx_buffer_order);
  232. rx_buf->page = NULL;
  233. } else if (likely(rx_buf->skb)) {
  234. dev_kfree_skb_any(rx_buf->skb);
  235. rx_buf->skb = NULL;
  236. }
  237. }
  238. static void efx_fini_rx_buffer(struct efx_rx_queue *rx_queue,
  239. struct efx_rx_buffer *rx_buf)
  240. {
  241. efx_unmap_rx_buffer(rx_queue->efx, rx_buf);
  242. efx_free_rx_buffer(rx_queue->efx, rx_buf);
  243. }
  244. /* Attempt to resurrect the other receive buffer that used to share this page,
  245. * which had previously been passed up to the kernel and freed. */
  246. static void efx_resurrect_rx_buffer(struct efx_rx_queue *rx_queue,
  247. struct efx_rx_buffer *rx_buf)
  248. {
  249. struct efx_rx_page_state *state = page_address(rx_buf->page);
  250. struct efx_rx_buffer *new_buf;
  251. unsigned fill_level, index;
  252. /* +1 because efx_rx_packet() incremented removed_count. +1 because
  253. * we'd like to insert an additional descriptor whilst leaving
  254. * EFX_RXD_HEAD_ROOM for the non-recycle path */
  255. fill_level = (rx_queue->added_count - rx_queue->removed_count + 2);
  256. if (unlikely(fill_level > rx_queue->max_fill)) {
  257. /* We could place "state" on a list, and drain the list in
  258. * efx_fast_push_rx_descriptors(). For now, this will do. */
  259. return;
  260. }
  261. ++state->refcnt;
  262. get_page(rx_buf->page);
  263. index = rx_queue->added_count & rx_queue->ptr_mask;
  264. new_buf = efx_rx_buffer(rx_queue, index);
  265. new_buf->dma_addr = rx_buf->dma_addr ^ (PAGE_SIZE >> 1);
  266. new_buf->skb = NULL;
  267. new_buf->page = rx_buf->page;
  268. new_buf->data = (void *)
  269. ((__force unsigned long)rx_buf->data ^ (PAGE_SIZE >> 1));
  270. new_buf->len = rx_buf->len;
  271. ++rx_queue->added_count;
  272. }
  273. /* Recycle the given rx buffer directly back into the rx_queue. There is
  274. * always room to add this buffer, because we've just popped a buffer. */
  275. static void efx_recycle_rx_buffer(struct efx_channel *channel,
  276. struct efx_rx_buffer *rx_buf)
  277. {
  278. struct efx_nic *efx = channel->efx;
  279. struct efx_rx_queue *rx_queue = efx_channel_get_rx_queue(channel);
  280. struct efx_rx_buffer *new_buf;
  281. unsigned index;
  282. if (rx_buf->page != NULL && efx->rx_buffer_len <= EFX_RX_HALF_PAGE &&
  283. page_count(rx_buf->page) == 1)
  284. efx_resurrect_rx_buffer(rx_queue, rx_buf);
  285. index = rx_queue->added_count & rx_queue->ptr_mask;
  286. new_buf = efx_rx_buffer(rx_queue, index);
  287. memcpy(new_buf, rx_buf, sizeof(*new_buf));
  288. rx_buf->page = NULL;
  289. rx_buf->skb = NULL;
  290. ++rx_queue->added_count;
  291. }
  292. /**
  293. * efx_fast_push_rx_descriptors - push new RX descriptors quickly
  294. * @rx_queue: RX descriptor queue
  295. * This will aim to fill the RX descriptor queue up to
  296. * @rx_queue->@fast_fill_limit. If there is insufficient atomic
  297. * memory to do so, a slow fill will be scheduled.
  298. *
  299. * The caller must provide serialisation (none is used here). In practise,
  300. * this means this function must run from the NAPI handler, or be called
  301. * when NAPI is disabled.
  302. */
  303. void efx_fast_push_rx_descriptors(struct efx_rx_queue *rx_queue)
  304. {
  305. struct efx_channel *channel = efx_rx_queue_channel(rx_queue);
  306. unsigned fill_level;
  307. int space, rc = 0;
  308. /* Calculate current fill level, and exit if we don't need to fill */
  309. fill_level = (rx_queue->added_count - rx_queue->removed_count);
  310. EFX_BUG_ON_PARANOID(fill_level > rx_queue->efx->rxq_entries);
  311. if (fill_level >= rx_queue->fast_fill_trigger)
  312. goto out;
  313. /* Record minimum fill level */
  314. if (unlikely(fill_level < rx_queue->min_fill)) {
  315. if (fill_level)
  316. rx_queue->min_fill = fill_level;
  317. }
  318. space = rx_queue->fast_fill_limit - fill_level;
  319. if (space < EFX_RX_BATCH)
  320. goto out;
  321. netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
  322. "RX queue %d fast-filling descriptor ring from"
  323. " level %d to level %d using %s allocation\n",
  324. efx_rx_queue_index(rx_queue), fill_level,
  325. rx_queue->fast_fill_limit,
  326. channel->rx_alloc_push_pages ? "page" : "skb");
  327. do {
  328. if (channel->rx_alloc_push_pages)
  329. rc = efx_init_rx_buffers_page(rx_queue);
  330. else
  331. rc = efx_init_rx_buffers_skb(rx_queue);
  332. if (unlikely(rc)) {
  333. /* Ensure that we don't leave the rx queue empty */
  334. if (rx_queue->added_count == rx_queue->removed_count)
  335. efx_schedule_slow_fill(rx_queue);
  336. goto out;
  337. }
  338. } while ((space -= EFX_RX_BATCH) >= EFX_RX_BATCH);
  339. netif_vdbg(rx_queue->efx, rx_status, rx_queue->efx->net_dev,
  340. "RX queue %d fast-filled descriptor ring "
  341. "to level %d\n", efx_rx_queue_index(rx_queue),
  342. rx_queue->added_count - rx_queue->removed_count);
  343. out:
  344. if (rx_queue->notified_count != rx_queue->added_count)
  345. efx_nic_notify_rx_desc(rx_queue);
  346. }
  347. void efx_rx_slow_fill(unsigned long context)
  348. {
  349. struct efx_rx_queue *rx_queue = (struct efx_rx_queue *)context;
  350. struct efx_channel *channel = efx_rx_queue_channel(rx_queue);
  351. /* Post an event to cause NAPI to run and refill the queue */
  352. efx_nic_generate_fill_event(channel);
  353. ++rx_queue->slow_fill_count;
  354. }
  355. static void efx_rx_packet__check_len(struct efx_rx_queue *rx_queue,
  356. struct efx_rx_buffer *rx_buf,
  357. int len, bool *discard,
  358. bool *leak_packet)
  359. {
  360. struct efx_nic *efx = rx_queue->efx;
  361. unsigned max_len = rx_buf->len - efx->type->rx_buffer_padding;
  362. if (likely(len <= max_len))
  363. return;
  364. /* The packet must be discarded, but this is only a fatal error
  365. * if the caller indicated it was
  366. */
  367. *discard = true;
  368. if ((len > rx_buf->len) && EFX_WORKAROUND_8071(efx)) {
  369. if (net_ratelimit())
  370. netif_err(efx, rx_err, efx->net_dev,
  371. " RX queue %d seriously overlength "
  372. "RX event (0x%x > 0x%x+0x%x). Leaking\n",
  373. efx_rx_queue_index(rx_queue), len, max_len,
  374. efx->type->rx_buffer_padding);
  375. /* If this buffer was skb-allocated, then the meta
  376. * data at the end of the skb will be trashed. So
  377. * we have no choice but to leak the fragment.
  378. */
  379. *leak_packet = (rx_buf->skb != NULL);
  380. efx_schedule_reset(efx, RESET_TYPE_RX_RECOVERY);
  381. } else {
  382. if (net_ratelimit())
  383. netif_err(efx, rx_err, efx->net_dev,
  384. " RX queue %d overlength RX event "
  385. "(0x%x > 0x%x)\n",
  386. efx_rx_queue_index(rx_queue), len, max_len);
  387. }
  388. efx_rx_queue_channel(rx_queue)->n_rx_overlength++;
  389. }
  390. /* Pass a received packet up through the generic GRO stack
  391. *
  392. * Handles driverlink veto, and passes the fragment up via
  393. * the appropriate GRO method
  394. */
  395. static void efx_rx_packet_gro(struct efx_channel *channel,
  396. struct efx_rx_buffer *rx_buf,
  397. bool checksummed)
  398. {
  399. struct napi_struct *napi = &channel->napi_str;
  400. gro_result_t gro_result;
  401. /* Pass the skb/page into the GRO engine */
  402. if (rx_buf->page) {
  403. struct efx_nic *efx = channel->efx;
  404. struct page *page = rx_buf->page;
  405. struct sk_buff *skb;
  406. EFX_BUG_ON_PARANOID(rx_buf->skb);
  407. rx_buf->page = NULL;
  408. skb = napi_get_frags(napi);
  409. if (!skb) {
  410. put_page(page);
  411. return;
  412. }
  413. if (efx->net_dev->features & NETIF_F_RXHASH)
  414. skb->rxhash = efx_rx_buf_hash(rx_buf);
  415. skb_shinfo(skb)->frags[0].page = page;
  416. skb_shinfo(skb)->frags[0].page_offset =
  417. efx_rx_buf_offset(rx_buf);
  418. skb_shinfo(skb)->frags[0].size = rx_buf->len;
  419. skb_shinfo(skb)->nr_frags = 1;
  420. skb->len = rx_buf->len;
  421. skb->data_len = rx_buf->len;
  422. skb->truesize += rx_buf->len;
  423. skb->ip_summed =
  424. checksummed ? CHECKSUM_UNNECESSARY : CHECKSUM_NONE;
  425. skb_record_rx_queue(skb, channel->channel);
  426. gro_result = napi_gro_frags(napi);
  427. } else {
  428. struct sk_buff *skb = rx_buf->skb;
  429. EFX_BUG_ON_PARANOID(!skb);
  430. EFX_BUG_ON_PARANOID(!checksummed);
  431. rx_buf->skb = NULL;
  432. gro_result = napi_gro_receive(napi, skb);
  433. }
  434. if (gro_result == GRO_NORMAL) {
  435. channel->rx_alloc_level += RX_ALLOC_FACTOR_SKB;
  436. } else if (gro_result != GRO_DROP) {
  437. channel->rx_alloc_level += RX_ALLOC_FACTOR_GRO;
  438. channel->irq_mod_score += 2;
  439. }
  440. }
  441. void efx_rx_packet(struct efx_rx_queue *rx_queue, unsigned int index,
  442. unsigned int len, bool checksummed, bool discard)
  443. {
  444. struct efx_nic *efx = rx_queue->efx;
  445. struct efx_channel *channel = efx_rx_queue_channel(rx_queue);
  446. struct efx_rx_buffer *rx_buf;
  447. bool leak_packet = false;
  448. rx_buf = efx_rx_buffer(rx_queue, index);
  449. EFX_BUG_ON_PARANOID(!rx_buf->data);
  450. EFX_BUG_ON_PARANOID(rx_buf->skb && rx_buf->page);
  451. EFX_BUG_ON_PARANOID(!(rx_buf->skb || rx_buf->page));
  452. /* This allows the refill path to post another buffer.
  453. * EFX_RXD_HEAD_ROOM ensures that the slot we are using
  454. * isn't overwritten yet.
  455. */
  456. rx_queue->removed_count++;
  457. /* Validate the length encoded in the event vs the descriptor pushed */
  458. efx_rx_packet__check_len(rx_queue, rx_buf, len,
  459. &discard, &leak_packet);
  460. netif_vdbg(efx, rx_status, efx->net_dev,
  461. "RX queue %d received id %x at %llx+%x %s%s\n",
  462. efx_rx_queue_index(rx_queue), index,
  463. (unsigned long long)rx_buf->dma_addr, len,
  464. (checksummed ? " [SUMMED]" : ""),
  465. (discard ? " [DISCARD]" : ""));
  466. /* Discard packet, if instructed to do so */
  467. if (unlikely(discard)) {
  468. if (unlikely(leak_packet))
  469. channel->n_skbuff_leaks++;
  470. else
  471. efx_recycle_rx_buffer(channel, rx_buf);
  472. /* Don't hold off the previous receive */
  473. rx_buf = NULL;
  474. goto out;
  475. }
  476. /* Release card resources - assumes all RX buffers consumed in-order
  477. * per RX queue
  478. */
  479. efx_unmap_rx_buffer(efx, rx_buf);
  480. /* Prefetch nice and early so data will (hopefully) be in cache by
  481. * the time we look at it.
  482. */
  483. prefetch(rx_buf->data);
  484. /* Pipeline receives so that we give time for packet headers to be
  485. * prefetched into cache.
  486. */
  487. rx_buf->len = len;
  488. out:
  489. if (channel->rx_pkt)
  490. __efx_rx_packet(channel,
  491. channel->rx_pkt, channel->rx_pkt_csummed);
  492. channel->rx_pkt = rx_buf;
  493. channel->rx_pkt_csummed = checksummed;
  494. }
  495. /* Handle a received packet. Second half: Touches packet payload. */
  496. void __efx_rx_packet(struct efx_channel *channel,
  497. struct efx_rx_buffer *rx_buf, bool checksummed)
  498. {
  499. struct efx_nic *efx = channel->efx;
  500. struct sk_buff *skb;
  501. rx_buf->data += efx->type->rx_buffer_hash_size;
  502. rx_buf->len -= efx->type->rx_buffer_hash_size;
  503. /* If we're in loopback test, then pass the packet directly to the
  504. * loopback layer, and free the rx_buf here
  505. */
  506. if (unlikely(efx->loopback_selftest)) {
  507. efx_loopback_rx_packet(efx, rx_buf->data, rx_buf->len);
  508. efx_free_rx_buffer(efx, rx_buf);
  509. return;
  510. }
  511. if (rx_buf->skb) {
  512. prefetch(skb_shinfo(rx_buf->skb));
  513. skb_reserve(rx_buf->skb, efx->type->rx_buffer_hash_size);
  514. skb_put(rx_buf->skb, rx_buf->len);
  515. if (efx->net_dev->features & NETIF_F_RXHASH)
  516. rx_buf->skb->rxhash = efx_rx_buf_hash(rx_buf);
  517. /* Move past the ethernet header. rx_buf->data still points
  518. * at the ethernet header */
  519. rx_buf->skb->protocol = eth_type_trans(rx_buf->skb,
  520. efx->net_dev);
  521. skb_record_rx_queue(rx_buf->skb, channel->channel);
  522. }
  523. if (likely(checksummed || rx_buf->page)) {
  524. efx_rx_packet_gro(channel, rx_buf, checksummed);
  525. return;
  526. }
  527. /* We now own the SKB */
  528. skb = rx_buf->skb;
  529. rx_buf->skb = NULL;
  530. EFX_BUG_ON_PARANOID(!skb);
  531. /* Set the SKB flags */
  532. skb_checksum_none_assert(skb);
  533. /* Pass the packet up */
  534. netif_receive_skb(skb);
  535. /* Update allocation strategy method */
  536. channel->rx_alloc_level += RX_ALLOC_FACTOR_SKB;
  537. }
  538. void efx_rx_strategy(struct efx_channel *channel)
  539. {
  540. enum efx_rx_alloc_method method = rx_alloc_method;
  541. /* Only makes sense to use page based allocation if GRO is enabled */
  542. if (!(channel->efx->net_dev->features & NETIF_F_GRO)) {
  543. method = RX_ALLOC_METHOD_SKB;
  544. } else if (method == RX_ALLOC_METHOD_AUTO) {
  545. /* Constrain the rx_alloc_level */
  546. if (channel->rx_alloc_level < 0)
  547. channel->rx_alloc_level = 0;
  548. else if (channel->rx_alloc_level > RX_ALLOC_LEVEL_MAX)
  549. channel->rx_alloc_level = RX_ALLOC_LEVEL_MAX;
  550. /* Decide on the allocation method */
  551. method = ((channel->rx_alloc_level > RX_ALLOC_LEVEL_GRO) ?
  552. RX_ALLOC_METHOD_PAGE : RX_ALLOC_METHOD_SKB);
  553. }
  554. /* Push the option */
  555. channel->rx_alloc_push_pages = (method == RX_ALLOC_METHOD_PAGE);
  556. }
  557. int efx_probe_rx_queue(struct efx_rx_queue *rx_queue)
  558. {
  559. struct efx_nic *efx = rx_queue->efx;
  560. unsigned int entries;
  561. int rc;
  562. /* Create the smallest power-of-two aligned ring */
  563. entries = max(roundup_pow_of_two(efx->rxq_entries), EFX_MIN_DMAQ_SIZE);
  564. EFX_BUG_ON_PARANOID(entries > EFX_MAX_DMAQ_SIZE);
  565. rx_queue->ptr_mask = entries - 1;
  566. netif_dbg(efx, probe, efx->net_dev,
  567. "creating RX queue %d size %#x mask %#x\n",
  568. efx_rx_queue_index(rx_queue), efx->rxq_entries,
  569. rx_queue->ptr_mask);
  570. /* Allocate RX buffers */
  571. rx_queue->buffer = kzalloc(entries * sizeof(*rx_queue->buffer),
  572. GFP_KERNEL);
  573. if (!rx_queue->buffer)
  574. return -ENOMEM;
  575. rc = efx_nic_probe_rx(rx_queue);
  576. if (rc) {
  577. kfree(rx_queue->buffer);
  578. rx_queue->buffer = NULL;
  579. }
  580. return rc;
  581. }
  582. void efx_init_rx_queue(struct efx_rx_queue *rx_queue)
  583. {
  584. struct efx_nic *efx = rx_queue->efx;
  585. unsigned int max_fill, trigger, limit;
  586. netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
  587. "initialising RX queue %d\n", efx_rx_queue_index(rx_queue));
  588. /* Initialise ptr fields */
  589. rx_queue->added_count = 0;
  590. rx_queue->notified_count = 0;
  591. rx_queue->removed_count = 0;
  592. rx_queue->min_fill = -1U;
  593. /* Initialise limit fields */
  594. max_fill = efx->rxq_entries - EFX_RXD_HEAD_ROOM;
  595. trigger = max_fill * min(rx_refill_threshold, 100U) / 100U;
  596. limit = max_fill * min(rx_refill_limit, 100U) / 100U;
  597. rx_queue->max_fill = max_fill;
  598. rx_queue->fast_fill_trigger = trigger;
  599. rx_queue->fast_fill_limit = limit;
  600. /* Set up RX descriptor ring */
  601. efx_nic_init_rx(rx_queue);
  602. }
  603. void efx_fini_rx_queue(struct efx_rx_queue *rx_queue)
  604. {
  605. int i;
  606. struct efx_rx_buffer *rx_buf;
  607. netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
  608. "shutting down RX queue %d\n", efx_rx_queue_index(rx_queue));
  609. del_timer_sync(&rx_queue->slow_fill);
  610. efx_nic_fini_rx(rx_queue);
  611. /* Release RX buffers NB start at index 0 not current HW ptr */
  612. if (rx_queue->buffer) {
  613. for (i = 0; i <= rx_queue->ptr_mask; i++) {
  614. rx_buf = efx_rx_buffer(rx_queue, i);
  615. efx_fini_rx_buffer(rx_queue, rx_buf);
  616. }
  617. }
  618. }
  619. void efx_remove_rx_queue(struct efx_rx_queue *rx_queue)
  620. {
  621. netif_dbg(rx_queue->efx, drv, rx_queue->efx->net_dev,
  622. "destroying RX queue %d\n", efx_rx_queue_index(rx_queue));
  623. efx_nic_remove_rx(rx_queue);
  624. kfree(rx_queue->buffer);
  625. rx_queue->buffer = NULL;
  626. }
  627. module_param(rx_alloc_method, int, 0644);
  628. MODULE_PARM_DESC(rx_alloc_method, "Allocation method used for RX buffers");
  629. module_param(rx_refill_threshold, uint, 0444);
  630. MODULE_PARM_DESC(rx_refill_threshold,
  631. "RX descriptor ring fast/slow fill threshold (%)");