ixgbe_dcb_nl.c 21 KB

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  1. /*******************************************************************************
  2. Intel 10 Gigabit PCI Express Linux driver
  3. Copyright(c) 1999 - 2010 Intel Corporation.
  4. This program is free software; you can redistribute it and/or modify it
  5. under the terms and conditions of the GNU General Public License,
  6. version 2, as published by the Free Software Foundation.
  7. This program is distributed in the hope it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc.,
  13. 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  14. The full GNU General Public License is included in this distribution in
  15. the file called "COPYING".
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  19. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  20. *******************************************************************************/
  21. #include "ixgbe.h"
  22. #include <linux/dcbnl.h>
  23. #include "ixgbe_dcb_82598.h"
  24. #include "ixgbe_dcb_82599.h"
  25. /* Callbacks for DCB netlink in the kernel */
  26. #define BIT_DCB_MODE 0x01
  27. #define BIT_PFC 0x02
  28. #define BIT_PG_RX 0x04
  29. #define BIT_PG_TX 0x08
  30. #define BIT_APP_UPCHG 0x10
  31. #define BIT_LINKSPEED 0x80
  32. /* Responses for the DCB_C_SET_ALL command */
  33. #define DCB_HW_CHG_RST 0 /* DCB configuration changed with reset */
  34. #define DCB_NO_HW_CHG 1 /* DCB configuration did not change */
  35. #define DCB_HW_CHG 2 /* DCB configuration changed, no reset */
  36. int ixgbe_copy_dcb_cfg(struct ixgbe_dcb_config *src_dcb_cfg,
  37. struct ixgbe_dcb_config *dst_dcb_cfg, int tc_max)
  38. {
  39. struct tc_configuration *src_tc_cfg = NULL;
  40. struct tc_configuration *dst_tc_cfg = NULL;
  41. int i;
  42. if (!src_dcb_cfg || !dst_dcb_cfg)
  43. return -EINVAL;
  44. for (i = DCB_PG_ATTR_TC_0; i < tc_max + DCB_PG_ATTR_TC_0; i++) {
  45. src_tc_cfg = &src_dcb_cfg->tc_config[i - DCB_PG_ATTR_TC_0];
  46. dst_tc_cfg = &dst_dcb_cfg->tc_config[i - DCB_PG_ATTR_TC_0];
  47. dst_tc_cfg->path[DCB_TX_CONFIG].prio_type =
  48. src_tc_cfg->path[DCB_TX_CONFIG].prio_type;
  49. dst_tc_cfg->path[DCB_TX_CONFIG].bwg_id =
  50. src_tc_cfg->path[DCB_TX_CONFIG].bwg_id;
  51. dst_tc_cfg->path[DCB_TX_CONFIG].bwg_percent =
  52. src_tc_cfg->path[DCB_TX_CONFIG].bwg_percent;
  53. dst_tc_cfg->path[DCB_TX_CONFIG].up_to_tc_bitmap =
  54. src_tc_cfg->path[DCB_TX_CONFIG].up_to_tc_bitmap;
  55. dst_tc_cfg->path[DCB_RX_CONFIG].prio_type =
  56. src_tc_cfg->path[DCB_RX_CONFIG].prio_type;
  57. dst_tc_cfg->path[DCB_RX_CONFIG].bwg_id =
  58. src_tc_cfg->path[DCB_RX_CONFIG].bwg_id;
  59. dst_tc_cfg->path[DCB_RX_CONFIG].bwg_percent =
  60. src_tc_cfg->path[DCB_RX_CONFIG].bwg_percent;
  61. dst_tc_cfg->path[DCB_RX_CONFIG].up_to_tc_bitmap =
  62. src_tc_cfg->path[DCB_RX_CONFIG].up_to_tc_bitmap;
  63. }
  64. for (i = DCB_PG_ATTR_BW_ID_0; i < DCB_PG_ATTR_BW_ID_MAX; i++) {
  65. dst_dcb_cfg->bw_percentage[DCB_TX_CONFIG]
  66. [i-DCB_PG_ATTR_BW_ID_0] = src_dcb_cfg->bw_percentage
  67. [DCB_TX_CONFIG][i-DCB_PG_ATTR_BW_ID_0];
  68. dst_dcb_cfg->bw_percentage[DCB_RX_CONFIG]
  69. [i-DCB_PG_ATTR_BW_ID_0] = src_dcb_cfg->bw_percentage
  70. [DCB_RX_CONFIG][i-DCB_PG_ATTR_BW_ID_0];
  71. }
  72. for (i = DCB_PFC_UP_ATTR_0; i < DCB_PFC_UP_ATTR_MAX; i++) {
  73. dst_dcb_cfg->tc_config[i - DCB_PFC_UP_ATTR_0].dcb_pfc =
  74. src_dcb_cfg->tc_config[i - DCB_PFC_UP_ATTR_0].dcb_pfc;
  75. }
  76. dst_dcb_cfg->pfc_mode_enable = src_dcb_cfg->pfc_mode_enable;
  77. return 0;
  78. }
  79. static u8 ixgbe_dcbnl_get_state(struct net_device *netdev)
  80. {
  81. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  82. return !!(adapter->flags & IXGBE_FLAG_DCB_ENABLED);
  83. }
  84. static u8 ixgbe_dcbnl_set_state(struct net_device *netdev, u8 state)
  85. {
  86. u8 err = 0;
  87. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  88. if (state > 0) {
  89. /* Turn on DCB */
  90. if (adapter->flags & IXGBE_FLAG_DCB_ENABLED)
  91. goto out;
  92. if (!(adapter->flags & IXGBE_FLAG_MSIX_ENABLED)) {
  93. e_err(drv, "Enable failed, needs MSI-X\n");
  94. err = 1;
  95. goto out;
  96. }
  97. if (netif_running(netdev))
  98. netdev->netdev_ops->ndo_stop(netdev);
  99. ixgbe_clear_interrupt_scheme(adapter);
  100. adapter->flags &= ~IXGBE_FLAG_RSS_ENABLED;
  101. switch (adapter->hw.mac.type) {
  102. case ixgbe_mac_82598EB:
  103. adapter->last_lfc_mode = adapter->hw.fc.current_mode;
  104. adapter->hw.fc.requested_mode = ixgbe_fc_none;
  105. break;
  106. case ixgbe_mac_82599EB:
  107. case ixgbe_mac_X540:
  108. adapter->flags &= ~IXGBE_FLAG_FDIR_HASH_CAPABLE;
  109. adapter->flags &= ~IXGBE_FLAG_FDIR_PERFECT_CAPABLE;
  110. break;
  111. default:
  112. break;
  113. }
  114. adapter->flags |= IXGBE_FLAG_DCB_ENABLED;
  115. ixgbe_init_interrupt_scheme(adapter);
  116. if (netif_running(netdev))
  117. netdev->netdev_ops->ndo_open(netdev);
  118. } else {
  119. /* Turn off DCB */
  120. if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
  121. if (netif_running(netdev))
  122. netdev->netdev_ops->ndo_stop(netdev);
  123. ixgbe_clear_interrupt_scheme(adapter);
  124. adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
  125. adapter->temp_dcb_cfg.pfc_mode_enable = false;
  126. adapter->dcb_cfg.pfc_mode_enable = false;
  127. adapter->flags &= ~IXGBE_FLAG_DCB_ENABLED;
  128. adapter->flags |= IXGBE_FLAG_RSS_ENABLED;
  129. switch (adapter->hw.mac.type) {
  130. case ixgbe_mac_82599EB:
  131. case ixgbe_mac_X540:
  132. adapter->flags |= IXGBE_FLAG_FDIR_HASH_CAPABLE;
  133. break;
  134. default:
  135. break;
  136. }
  137. ixgbe_init_interrupt_scheme(adapter);
  138. if (netif_running(netdev))
  139. netdev->netdev_ops->ndo_open(netdev);
  140. }
  141. }
  142. out:
  143. return err;
  144. }
  145. static void ixgbe_dcbnl_get_perm_hw_addr(struct net_device *netdev,
  146. u8 *perm_addr)
  147. {
  148. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  149. int i, j;
  150. memset(perm_addr, 0xff, MAX_ADDR_LEN);
  151. for (i = 0; i < netdev->addr_len; i++)
  152. perm_addr[i] = adapter->hw.mac.perm_addr[i];
  153. switch (adapter->hw.mac.type) {
  154. case ixgbe_mac_82599EB:
  155. case ixgbe_mac_X540:
  156. for (j = 0; j < netdev->addr_len; j++, i++)
  157. perm_addr[i] = adapter->hw.mac.san_addr[j];
  158. break;
  159. default:
  160. break;
  161. }
  162. }
  163. static void ixgbe_dcbnl_set_pg_tc_cfg_tx(struct net_device *netdev, int tc,
  164. u8 prio, u8 bwg_id, u8 bw_pct,
  165. u8 up_map)
  166. {
  167. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  168. if (prio != DCB_ATTR_VALUE_UNDEFINED)
  169. adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type = prio;
  170. if (bwg_id != DCB_ATTR_VALUE_UNDEFINED)
  171. adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id = bwg_id;
  172. if (bw_pct != DCB_ATTR_VALUE_UNDEFINED)
  173. adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent =
  174. bw_pct;
  175. if (up_map != DCB_ATTR_VALUE_UNDEFINED)
  176. adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap =
  177. up_map;
  178. if ((adapter->temp_dcb_cfg.tc_config[tc].path[0].prio_type !=
  179. adapter->dcb_cfg.tc_config[tc].path[0].prio_type) ||
  180. (adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_id !=
  181. adapter->dcb_cfg.tc_config[tc].path[0].bwg_id) ||
  182. (adapter->temp_dcb_cfg.tc_config[tc].path[0].bwg_percent !=
  183. adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent) ||
  184. (adapter->temp_dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap !=
  185. adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap))
  186. adapter->dcb_set_bitmap |= BIT_PG_TX;
  187. }
  188. static void ixgbe_dcbnl_set_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
  189. u8 bw_pct)
  190. {
  191. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  192. adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] = bw_pct;
  193. if (adapter->temp_dcb_cfg.bw_percentage[0][bwg_id] !=
  194. adapter->dcb_cfg.bw_percentage[0][bwg_id])
  195. adapter->dcb_set_bitmap |= BIT_PG_TX;
  196. }
  197. static void ixgbe_dcbnl_set_pg_tc_cfg_rx(struct net_device *netdev, int tc,
  198. u8 prio, u8 bwg_id, u8 bw_pct,
  199. u8 up_map)
  200. {
  201. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  202. if (prio != DCB_ATTR_VALUE_UNDEFINED)
  203. adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type = prio;
  204. if (bwg_id != DCB_ATTR_VALUE_UNDEFINED)
  205. adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id = bwg_id;
  206. if (bw_pct != DCB_ATTR_VALUE_UNDEFINED)
  207. adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent =
  208. bw_pct;
  209. if (up_map != DCB_ATTR_VALUE_UNDEFINED)
  210. adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap =
  211. up_map;
  212. if ((adapter->temp_dcb_cfg.tc_config[tc].path[1].prio_type !=
  213. adapter->dcb_cfg.tc_config[tc].path[1].prio_type) ||
  214. (adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_id !=
  215. adapter->dcb_cfg.tc_config[tc].path[1].bwg_id) ||
  216. (adapter->temp_dcb_cfg.tc_config[tc].path[1].bwg_percent !=
  217. adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent) ||
  218. (adapter->temp_dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap !=
  219. adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap))
  220. adapter->dcb_set_bitmap |= BIT_PG_RX;
  221. }
  222. static void ixgbe_dcbnl_set_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
  223. u8 bw_pct)
  224. {
  225. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  226. adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] = bw_pct;
  227. if (adapter->temp_dcb_cfg.bw_percentage[1][bwg_id] !=
  228. adapter->dcb_cfg.bw_percentage[1][bwg_id])
  229. adapter->dcb_set_bitmap |= BIT_PG_RX;
  230. }
  231. static void ixgbe_dcbnl_get_pg_tc_cfg_tx(struct net_device *netdev, int tc,
  232. u8 *prio, u8 *bwg_id, u8 *bw_pct,
  233. u8 *up_map)
  234. {
  235. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  236. *prio = adapter->dcb_cfg.tc_config[tc].path[0].prio_type;
  237. *bwg_id = adapter->dcb_cfg.tc_config[tc].path[0].bwg_id;
  238. *bw_pct = adapter->dcb_cfg.tc_config[tc].path[0].bwg_percent;
  239. *up_map = adapter->dcb_cfg.tc_config[tc].path[0].up_to_tc_bitmap;
  240. }
  241. static void ixgbe_dcbnl_get_pg_bwg_cfg_tx(struct net_device *netdev, int bwg_id,
  242. u8 *bw_pct)
  243. {
  244. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  245. *bw_pct = adapter->dcb_cfg.bw_percentage[0][bwg_id];
  246. }
  247. static void ixgbe_dcbnl_get_pg_tc_cfg_rx(struct net_device *netdev, int tc,
  248. u8 *prio, u8 *bwg_id, u8 *bw_pct,
  249. u8 *up_map)
  250. {
  251. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  252. *prio = adapter->dcb_cfg.tc_config[tc].path[1].prio_type;
  253. *bwg_id = adapter->dcb_cfg.tc_config[tc].path[1].bwg_id;
  254. *bw_pct = adapter->dcb_cfg.tc_config[tc].path[1].bwg_percent;
  255. *up_map = adapter->dcb_cfg.tc_config[tc].path[1].up_to_tc_bitmap;
  256. }
  257. static void ixgbe_dcbnl_get_pg_bwg_cfg_rx(struct net_device *netdev, int bwg_id,
  258. u8 *bw_pct)
  259. {
  260. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  261. *bw_pct = adapter->dcb_cfg.bw_percentage[1][bwg_id];
  262. }
  263. static void ixgbe_dcbnl_set_pfc_cfg(struct net_device *netdev, int priority,
  264. u8 setting)
  265. {
  266. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  267. adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc = setting;
  268. if (adapter->temp_dcb_cfg.tc_config[priority].dcb_pfc !=
  269. adapter->dcb_cfg.tc_config[priority].dcb_pfc) {
  270. adapter->dcb_set_bitmap |= BIT_PFC;
  271. adapter->temp_dcb_cfg.pfc_mode_enable = true;
  272. }
  273. }
  274. static void ixgbe_dcbnl_get_pfc_cfg(struct net_device *netdev, int priority,
  275. u8 *setting)
  276. {
  277. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  278. *setting = adapter->dcb_cfg.tc_config[priority].dcb_pfc;
  279. }
  280. static u8 ixgbe_dcbnl_set_all(struct net_device *netdev)
  281. {
  282. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  283. int ret;
  284. if (!adapter->dcb_set_bitmap)
  285. return DCB_NO_HW_CHG;
  286. ret = ixgbe_copy_dcb_cfg(&adapter->temp_dcb_cfg, &adapter->dcb_cfg,
  287. adapter->ring_feature[RING_F_DCB].indices);
  288. if (ret)
  289. return DCB_NO_HW_CHG;
  290. /*
  291. * Only take down the adapter if an app change occured. FCoE
  292. * may shuffle tx rings in this case and this can not be done
  293. * without a reset currently.
  294. */
  295. if (adapter->dcb_set_bitmap & BIT_APP_UPCHG) {
  296. while (test_and_set_bit(__IXGBE_RESETTING, &adapter->state))
  297. msleep(1);
  298. if (netif_running(netdev))
  299. netdev->netdev_ops->ndo_stop(netdev);
  300. ixgbe_clear_interrupt_scheme(adapter);
  301. }
  302. if (adapter->dcb_cfg.pfc_mode_enable) {
  303. switch (adapter->hw.mac.type) {
  304. case ixgbe_mac_82599EB:
  305. case ixgbe_mac_X540:
  306. if (adapter->hw.fc.current_mode != ixgbe_fc_pfc)
  307. adapter->last_lfc_mode =
  308. adapter->hw.fc.current_mode;
  309. break;
  310. default:
  311. break;
  312. }
  313. adapter->hw.fc.requested_mode = ixgbe_fc_pfc;
  314. } else {
  315. switch (adapter->hw.mac.type) {
  316. case ixgbe_mac_82598EB:
  317. adapter->hw.fc.requested_mode = ixgbe_fc_none;
  318. break;
  319. case ixgbe_mac_82599EB:
  320. case ixgbe_mac_X540:
  321. adapter->hw.fc.requested_mode = adapter->last_lfc_mode;
  322. break;
  323. default:
  324. break;
  325. }
  326. }
  327. if (adapter->dcb_set_bitmap & BIT_APP_UPCHG) {
  328. ixgbe_init_interrupt_scheme(adapter);
  329. if (netif_running(netdev))
  330. netdev->netdev_ops->ndo_open(netdev);
  331. ret = DCB_HW_CHG_RST;
  332. }
  333. if (adapter->dcb_set_bitmap & BIT_PFC) {
  334. u8 pfc_en;
  335. ixgbe_dcb_unpack_pfc(&adapter->dcb_cfg, &pfc_en);
  336. ixgbe_dcb_hw_pfc_config(&adapter->hw, pfc_en);
  337. ret = DCB_HW_CHG;
  338. }
  339. if (adapter->dcb_set_bitmap & (BIT_PG_TX|BIT_PG_RX)) {
  340. u16 refill[MAX_TRAFFIC_CLASS], max[MAX_TRAFFIC_CLASS];
  341. u8 bwg_id[MAX_TRAFFIC_CLASS], prio_type[MAX_TRAFFIC_CLASS];
  342. int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
  343. #ifdef CONFIG_FCOE
  344. if (adapter->netdev->features & NETIF_F_FCOE_MTU)
  345. max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
  346. #endif
  347. ixgbe_dcb_calculate_tc_credits(&adapter->hw, &adapter->dcb_cfg,
  348. max_frame, DCB_TX_CONFIG);
  349. ixgbe_dcb_calculate_tc_credits(&adapter->hw, &adapter->dcb_cfg,
  350. max_frame, DCB_RX_CONFIG);
  351. ixgbe_dcb_unpack_refill(&adapter->dcb_cfg,
  352. DCB_TX_CONFIG, refill);
  353. ixgbe_dcb_unpack_max(&adapter->dcb_cfg, max);
  354. ixgbe_dcb_unpack_bwgid(&adapter->dcb_cfg,
  355. DCB_TX_CONFIG, bwg_id);
  356. ixgbe_dcb_unpack_prio(&adapter->dcb_cfg,
  357. DCB_TX_CONFIG, prio_type);
  358. ixgbe_dcb_hw_ets_config(&adapter->hw, refill, max,
  359. bwg_id, prio_type);
  360. }
  361. if (adapter->dcb_cfg.pfc_mode_enable)
  362. adapter->hw.fc.current_mode = ixgbe_fc_pfc;
  363. if (adapter->dcb_set_bitmap & BIT_APP_UPCHG)
  364. clear_bit(__IXGBE_RESETTING, &adapter->state);
  365. adapter->dcb_set_bitmap = 0x00;
  366. return ret;
  367. }
  368. static u8 ixgbe_dcbnl_getcap(struct net_device *netdev, int capid, u8 *cap)
  369. {
  370. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  371. u8 rval = 0;
  372. if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
  373. switch (capid) {
  374. case DCB_CAP_ATTR_PG:
  375. *cap = true;
  376. break;
  377. case DCB_CAP_ATTR_PFC:
  378. *cap = true;
  379. break;
  380. case DCB_CAP_ATTR_UP2TC:
  381. *cap = false;
  382. break;
  383. case DCB_CAP_ATTR_PG_TCS:
  384. *cap = 0x80;
  385. break;
  386. case DCB_CAP_ATTR_PFC_TCS:
  387. *cap = 0x80;
  388. break;
  389. case DCB_CAP_ATTR_GSP:
  390. *cap = true;
  391. break;
  392. case DCB_CAP_ATTR_BCN:
  393. *cap = false;
  394. break;
  395. default:
  396. rval = -EINVAL;
  397. break;
  398. }
  399. } else {
  400. rval = -EINVAL;
  401. }
  402. return rval;
  403. }
  404. static u8 ixgbe_dcbnl_getnumtcs(struct net_device *netdev, int tcid, u8 *num)
  405. {
  406. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  407. u8 rval = 0;
  408. if (adapter->flags & IXGBE_FLAG_DCB_ENABLED) {
  409. switch (tcid) {
  410. case DCB_NUMTCS_ATTR_PG:
  411. *num = MAX_TRAFFIC_CLASS;
  412. break;
  413. case DCB_NUMTCS_ATTR_PFC:
  414. *num = MAX_TRAFFIC_CLASS;
  415. break;
  416. default:
  417. rval = -EINVAL;
  418. break;
  419. }
  420. } else {
  421. rval = -EINVAL;
  422. }
  423. return rval;
  424. }
  425. static u8 ixgbe_dcbnl_setnumtcs(struct net_device *netdev, int tcid, u8 num)
  426. {
  427. return -EINVAL;
  428. }
  429. static u8 ixgbe_dcbnl_getpfcstate(struct net_device *netdev)
  430. {
  431. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  432. return adapter->dcb_cfg.pfc_mode_enable;
  433. }
  434. static void ixgbe_dcbnl_setpfcstate(struct net_device *netdev, u8 state)
  435. {
  436. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  437. adapter->temp_dcb_cfg.pfc_mode_enable = state;
  438. if (adapter->temp_dcb_cfg.pfc_mode_enable !=
  439. adapter->dcb_cfg.pfc_mode_enable)
  440. adapter->dcb_set_bitmap |= BIT_PFC;
  441. }
  442. /**
  443. * ixgbe_dcbnl_getapp - retrieve the DCBX application user priority
  444. * @netdev : the corresponding netdev
  445. * @idtype : identifies the id as ether type or TCP/UDP port number
  446. * @id: id is either ether type or TCP/UDP port number
  447. *
  448. * Returns : on success, returns a non-zero 802.1p user priority bitmap
  449. * otherwise returns 0 as the invalid user priority bitmap to indicate an
  450. * error.
  451. */
  452. static u8 ixgbe_dcbnl_getapp(struct net_device *netdev, u8 idtype, u16 id)
  453. {
  454. u8 rval = 0;
  455. switch (idtype) {
  456. case DCB_APP_IDTYPE_ETHTYPE:
  457. #ifdef IXGBE_FCOE
  458. if (id == ETH_P_FCOE)
  459. rval = ixgbe_fcoe_getapp(netdev_priv(netdev));
  460. #endif
  461. break;
  462. case DCB_APP_IDTYPE_PORTNUM:
  463. break;
  464. default:
  465. break;
  466. }
  467. return rval;
  468. }
  469. /**
  470. * ixgbe_dcbnl_setapp - set the DCBX application user priority
  471. * @netdev : the corresponding netdev
  472. * @idtype : identifies the id as ether type or TCP/UDP port number
  473. * @id: id is either ether type or TCP/UDP port number
  474. * @up: the 802.1p user priority bitmap
  475. *
  476. * Returns : 0 on success or 1 on error
  477. */
  478. static u8 ixgbe_dcbnl_setapp(struct net_device *netdev,
  479. u8 idtype, u16 id, u8 up)
  480. {
  481. u8 rval = 1;
  482. switch (idtype) {
  483. case DCB_APP_IDTYPE_ETHTYPE:
  484. #ifdef IXGBE_FCOE
  485. if (id == ETH_P_FCOE) {
  486. u8 old_tc;
  487. struct ixgbe_adapter *adapter = netdev_priv(netdev);
  488. /* Get current programmed tc */
  489. old_tc = adapter->fcoe.tc;
  490. rval = ixgbe_fcoe_setapp(adapter, up);
  491. if (rval ||
  492. !(adapter->flags & IXGBE_FLAG_DCB_ENABLED) ||
  493. !(adapter->flags & IXGBE_FLAG_FCOE_ENABLED))
  494. break;
  495. /* The FCoE application priority may be changed multiple
  496. * times in quick sucession with switches that build up
  497. * TLVs. To avoid creating uneeded device resets this
  498. * checks the actual HW configuration and clears
  499. * BIT_APP_UPCHG if a HW configuration change is not
  500. * need
  501. */
  502. if (old_tc == adapter->fcoe.tc)
  503. adapter->dcb_set_bitmap &= ~BIT_APP_UPCHG;
  504. else
  505. adapter->dcb_set_bitmap |= BIT_APP_UPCHG;
  506. }
  507. #endif
  508. break;
  509. case DCB_APP_IDTYPE_PORTNUM:
  510. break;
  511. default:
  512. break;
  513. }
  514. return rval;
  515. }
  516. static int ixgbe_dcbnl_ieee_getets(struct net_device *dev,
  517. struct ieee_ets *ets)
  518. {
  519. struct ixgbe_adapter *adapter = netdev_priv(dev);
  520. struct ieee_ets *my_ets = adapter->ixgbe_ieee_ets;
  521. /* No IEEE PFC settings available */
  522. if (!my_ets)
  523. return -EINVAL;
  524. ets->ets_cap = MAX_TRAFFIC_CLASS;
  525. ets->cbs = my_ets->cbs;
  526. memcpy(ets->tc_tx_bw, my_ets->tc_tx_bw, sizeof(ets->tc_tx_bw));
  527. memcpy(ets->tc_rx_bw, my_ets->tc_rx_bw, sizeof(ets->tc_rx_bw));
  528. memcpy(ets->tc_tsa, my_ets->tc_tsa, sizeof(ets->tc_tsa));
  529. memcpy(ets->prio_tc, my_ets->prio_tc, sizeof(ets->prio_tc));
  530. return 0;
  531. }
  532. static int ixgbe_dcbnl_ieee_setets(struct net_device *dev,
  533. struct ieee_ets *ets)
  534. {
  535. struct ixgbe_adapter *adapter = netdev_priv(dev);
  536. __u16 refill[IEEE_8021QAZ_MAX_TCS], max[IEEE_8021QAZ_MAX_TCS];
  537. int max_frame = dev->mtu + ETH_HLEN + ETH_FCS_LEN;
  538. int err;
  539. /* naively give each TC a bwg to map onto CEE hardware */
  540. __u8 bwg_id[IEEE_8021QAZ_MAX_TCS] = {0, 1, 2, 3, 4, 5, 6, 7};
  541. if (!adapter->ixgbe_ieee_ets) {
  542. adapter->ixgbe_ieee_ets = kmalloc(sizeof(struct ieee_ets),
  543. GFP_KERNEL);
  544. if (!adapter->ixgbe_ieee_ets)
  545. return -ENOMEM;
  546. }
  547. memcpy(adapter->ixgbe_ieee_ets, ets, sizeof(*adapter->ixgbe_ieee_ets));
  548. ixgbe_ieee_credits(ets->tc_tx_bw, refill, max, max_frame);
  549. err = ixgbe_dcb_hw_ets_config(&adapter->hw, refill, max,
  550. bwg_id, ets->tc_tsa);
  551. return err;
  552. }
  553. static int ixgbe_dcbnl_ieee_getpfc(struct net_device *dev,
  554. struct ieee_pfc *pfc)
  555. {
  556. struct ixgbe_adapter *adapter = netdev_priv(dev);
  557. struct ieee_pfc *my_pfc = adapter->ixgbe_ieee_pfc;
  558. int i;
  559. /* No IEEE PFC settings available */
  560. if (!my_pfc)
  561. return -EINVAL;
  562. pfc->pfc_cap = MAX_TRAFFIC_CLASS;
  563. pfc->pfc_en = my_pfc->pfc_en;
  564. pfc->mbc = my_pfc->mbc;
  565. pfc->delay = my_pfc->delay;
  566. for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
  567. pfc->requests[i] = adapter->stats.pxoffrxc[i];
  568. pfc->indications[i] = adapter->stats.pxofftxc[i];
  569. }
  570. return 0;
  571. }
  572. static int ixgbe_dcbnl_ieee_setpfc(struct net_device *dev,
  573. struct ieee_pfc *pfc)
  574. {
  575. struct ixgbe_adapter *adapter = netdev_priv(dev);
  576. int err;
  577. if (!adapter->ixgbe_ieee_pfc) {
  578. adapter->ixgbe_ieee_pfc = kmalloc(sizeof(struct ieee_pfc),
  579. GFP_KERNEL);
  580. if (!adapter->ixgbe_ieee_pfc)
  581. return -ENOMEM;
  582. }
  583. memcpy(adapter->ixgbe_ieee_pfc, pfc, sizeof(*adapter->ixgbe_ieee_pfc));
  584. err = ixgbe_dcb_hw_pfc_config(&adapter->hw, pfc->pfc_en);
  585. return err;
  586. }
  587. const struct dcbnl_rtnl_ops dcbnl_ops = {
  588. .ieee_getets = ixgbe_dcbnl_ieee_getets,
  589. .ieee_setets = ixgbe_dcbnl_ieee_setets,
  590. .ieee_getpfc = ixgbe_dcbnl_ieee_getpfc,
  591. .ieee_setpfc = ixgbe_dcbnl_ieee_setpfc,
  592. .getstate = ixgbe_dcbnl_get_state,
  593. .setstate = ixgbe_dcbnl_set_state,
  594. .getpermhwaddr = ixgbe_dcbnl_get_perm_hw_addr,
  595. .setpgtccfgtx = ixgbe_dcbnl_set_pg_tc_cfg_tx,
  596. .setpgbwgcfgtx = ixgbe_dcbnl_set_pg_bwg_cfg_tx,
  597. .setpgtccfgrx = ixgbe_dcbnl_set_pg_tc_cfg_rx,
  598. .setpgbwgcfgrx = ixgbe_dcbnl_set_pg_bwg_cfg_rx,
  599. .getpgtccfgtx = ixgbe_dcbnl_get_pg_tc_cfg_tx,
  600. .getpgbwgcfgtx = ixgbe_dcbnl_get_pg_bwg_cfg_tx,
  601. .getpgtccfgrx = ixgbe_dcbnl_get_pg_tc_cfg_rx,
  602. .getpgbwgcfgrx = ixgbe_dcbnl_get_pg_bwg_cfg_rx,
  603. .setpfccfg = ixgbe_dcbnl_set_pfc_cfg,
  604. .getpfccfg = ixgbe_dcbnl_get_pfc_cfg,
  605. .setall = ixgbe_dcbnl_set_all,
  606. .getcap = ixgbe_dcbnl_getcap,
  607. .getnumtcs = ixgbe_dcbnl_getnumtcs,
  608. .setnumtcs = ixgbe_dcbnl_setnumtcs,
  609. .getpfcstate = ixgbe_dcbnl_getpfcstate,
  610. .setpfcstate = ixgbe_dcbnl_setpfcstate,
  611. .getapp = ixgbe_dcbnl_getapp,
  612. .setapp = ixgbe_dcbnl_setapp,
  613. };