bfa_ioc.h 8.4 KB

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  1. /*
  2. * Linux network driver for Brocade Converged Network Adapter.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License (GPL) Version 2 as
  6. * published by the Free Software Foundation
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  11. * General Public License for more details.
  12. */
  13. /*
  14. * Copyright (c) 2005-2010 Brocade Communications Systems, Inc.
  15. * All rights reserved
  16. * www.brocade.com
  17. */
  18. #ifndef __BFA_IOC_H__
  19. #define __BFA_IOC_H__
  20. #include "bfa_sm.h"
  21. #include "bfi.h"
  22. #include "cna.h"
  23. #define BFA_IOC_TOV 3000 /* msecs */
  24. #define BFA_IOC_HWSEM_TOV 500 /* msecs */
  25. #define BFA_IOC_HB_TOV 500 /* msecs */
  26. #define BFA_IOC_HWINIT_MAX 5
  27. /**
  28. * PCI device information required by IOC
  29. */
  30. struct bfa_pcidev {
  31. int pci_slot;
  32. u8 pci_func;
  33. u16 device_id;
  34. void __iomem *pci_bar_kva;
  35. };
  36. /**
  37. * Structure used to remember the DMA-able memory block's KVA and Physical
  38. * Address
  39. */
  40. struct bfa_dma {
  41. void *kva; /* ! Kernel virtual address */
  42. u64 pa; /* ! Physical address */
  43. };
  44. #define BFA_DMA_ALIGN_SZ 256
  45. /**
  46. * smem size for Crossbow and Catapult
  47. */
  48. #define BFI_SMEM_CB_SIZE 0x200000U /* ! 2MB for crossbow */
  49. #define BFI_SMEM_CT_SIZE 0x280000U /* ! 2.5MB for catapult */
  50. /**
  51. * @brief BFA dma address assignment macro. (big endian format)
  52. */
  53. #define bfa_dma_be_addr_set(dma_addr, pa) \
  54. __bfa_dma_be_addr_set(&dma_addr, (u64)pa)
  55. static inline void
  56. __bfa_dma_be_addr_set(union bfi_addr_u *dma_addr, u64 pa)
  57. {
  58. dma_addr->a32.addr_lo = (u32) htonl(pa);
  59. dma_addr->a32.addr_hi = (u32) htonl(upper_32_bits(pa));
  60. }
  61. struct bfa_ioc_regs {
  62. void __iomem *hfn_mbox_cmd;
  63. void __iomem *hfn_mbox;
  64. void __iomem *lpu_mbox_cmd;
  65. void __iomem *lpu_mbox;
  66. void __iomem *pss_ctl_reg;
  67. void __iomem *pss_err_status_reg;
  68. void __iomem *app_pll_fast_ctl_reg;
  69. void __iomem *app_pll_slow_ctl_reg;
  70. void __iomem *ioc_sem_reg;
  71. void __iomem *ioc_usage_sem_reg;
  72. void __iomem *ioc_init_sem_reg;
  73. void __iomem *ioc_usage_reg;
  74. void __iomem *host_page_num_fn;
  75. void __iomem *heartbeat;
  76. void __iomem *ioc_fwstate;
  77. void __iomem *alt_ioc_fwstate;
  78. void __iomem *ll_halt;
  79. void __iomem *alt_ll_halt;
  80. void __iomem *err_set;
  81. void __iomem *ioc_fail_sync;
  82. void __iomem *shirq_isr_next;
  83. void __iomem *shirq_msk_next;
  84. void __iomem *smem_page_start;
  85. u32 smem_pg0;
  86. };
  87. /**
  88. * IOC Mailbox structures
  89. */
  90. struct bfa_mbox_cmd {
  91. struct list_head qe;
  92. u32 msg[BFI_IOC_MSGSZ];
  93. };
  94. /**
  95. * IOC mailbox module
  96. */
  97. typedef void (*bfa_ioc_mbox_mcfunc_t)(void *cbarg, struct bfi_mbmsg *m);
  98. struct bfa_ioc_mbox_mod {
  99. struct list_head cmd_q; /*!< pending mbox queue */
  100. int nmclass; /*!< number of handlers */
  101. struct {
  102. bfa_ioc_mbox_mcfunc_t cbfn; /*!< message handlers */
  103. void *cbarg;
  104. } mbhdlr[BFI_MC_MAX];
  105. };
  106. /**
  107. * IOC callback function interfaces
  108. */
  109. typedef void (*bfa_ioc_enable_cbfn_t)(void *bfa, enum bfa_status status);
  110. typedef void (*bfa_ioc_disable_cbfn_t)(void *bfa);
  111. typedef void (*bfa_ioc_hbfail_cbfn_t)(void *bfa);
  112. typedef void (*bfa_ioc_reset_cbfn_t)(void *bfa);
  113. struct bfa_ioc_cbfn {
  114. bfa_ioc_enable_cbfn_t enable_cbfn;
  115. bfa_ioc_disable_cbfn_t disable_cbfn;
  116. bfa_ioc_hbfail_cbfn_t hbfail_cbfn;
  117. bfa_ioc_reset_cbfn_t reset_cbfn;
  118. };
  119. /**
  120. * Heartbeat failure notification queue element.
  121. */
  122. struct bfa_ioc_hbfail_notify {
  123. struct list_head qe;
  124. bfa_ioc_hbfail_cbfn_t cbfn;
  125. void *cbarg;
  126. };
  127. /**
  128. * Initialize a heartbeat failure notification structure
  129. */
  130. #define bfa_ioc_hbfail_init(__notify, __cbfn, __cbarg) do { \
  131. (__notify)->cbfn = (__cbfn); \
  132. (__notify)->cbarg = (__cbarg); \
  133. } while (0)
  134. struct bfa_iocpf {
  135. bfa_fsm_t fsm;
  136. struct bfa_ioc *ioc;
  137. u32 retry_count;
  138. bool auto_recover;
  139. };
  140. struct bfa_ioc {
  141. bfa_fsm_t fsm;
  142. struct bfa *bfa;
  143. struct bfa_pcidev pcidev;
  144. struct timer_list ioc_timer;
  145. struct timer_list iocpf_timer;
  146. struct timer_list sem_timer;
  147. struct timer_list hb_timer;
  148. u32 hb_count;
  149. struct list_head hb_notify_q;
  150. void *dbg_fwsave;
  151. int dbg_fwsave_len;
  152. bool dbg_fwsave_once;
  153. enum bfi_mclass ioc_mc;
  154. struct bfa_ioc_regs ioc_regs;
  155. struct bfa_ioc_drv_stats stats;
  156. bool fcmode;
  157. bool ctdev;
  158. bool cna;
  159. bool pllinit;
  160. bool stats_busy; /*!< outstanding stats */
  161. u8 port_id;
  162. struct bfa_dma attr_dma;
  163. struct bfi_ioc_attr *attr;
  164. struct bfa_ioc_cbfn *cbfn;
  165. struct bfa_ioc_mbox_mod mbox_mod;
  166. struct bfa_ioc_hwif *ioc_hwif;
  167. struct bfa_iocpf iocpf;
  168. };
  169. struct bfa_ioc_hwif {
  170. enum bfa_status (*ioc_pll_init) (void __iomem *rb, bool fcmode);
  171. bool (*ioc_firmware_lock) (struct bfa_ioc *ioc);
  172. void (*ioc_firmware_unlock) (struct bfa_ioc *ioc);
  173. void (*ioc_reg_init) (struct bfa_ioc *ioc);
  174. void (*ioc_map_port) (struct bfa_ioc *ioc);
  175. void (*ioc_isr_mode_set) (struct bfa_ioc *ioc,
  176. bool msix);
  177. void (*ioc_notify_fail) (struct bfa_ioc *ioc);
  178. void (*ioc_ownership_reset) (struct bfa_ioc *ioc);
  179. void (*ioc_sync_join) (struct bfa_ioc *ioc);
  180. void (*ioc_sync_leave) (struct bfa_ioc *ioc);
  181. void (*ioc_sync_ack) (struct bfa_ioc *ioc);
  182. bool (*ioc_sync_complete) (struct bfa_ioc *ioc);
  183. };
  184. #define bfa_ioc_pcifn(__ioc) ((__ioc)->pcidev.pci_func)
  185. #define bfa_ioc_devid(__ioc) ((__ioc)->pcidev.device_id)
  186. #define bfa_ioc_bar0(__ioc) ((__ioc)->pcidev.pci_bar_kva)
  187. #define bfa_ioc_portid(__ioc) ((__ioc)->port_id)
  188. #define bfa_ioc_fetch_stats(__ioc, __stats) \
  189. (((__stats)->drv_stats) = (__ioc)->stats)
  190. #define bfa_ioc_clr_stats(__ioc) \
  191. memset(&(__ioc)->stats, 0, sizeof((__ioc)->stats))
  192. #define bfa_ioc_maxfrsize(__ioc) ((__ioc)->attr->maxfrsize)
  193. #define bfa_ioc_rx_bbcredit(__ioc) ((__ioc)->attr->rx_bbcredit)
  194. #define bfa_ioc_speed_sup(__ioc) \
  195. BFI_ADAPTER_GETP(SPEED, (__ioc)->attr->adapter_prop)
  196. #define bfa_ioc_get_nports(__ioc) \
  197. BFI_ADAPTER_GETP(NPORTS, (__ioc)->attr->adapter_prop)
  198. #define bfa_ioc_stats(_ioc, _stats) ((_ioc)->stats._stats++)
  199. #define BFA_IOC_FWIMG_MINSZ (16 * 1024)
  200. #define BFA_IOC_FWIMG_TYPE(__ioc) \
  201. (((__ioc)->ctdev) ? \
  202. (((__ioc)->fcmode) ? BFI_IMAGE_CT_FC : BFI_IMAGE_CT_CNA) : \
  203. BFI_IMAGE_CB_FC)
  204. #define BFA_IOC_FW_SMEM_SIZE(__ioc) \
  205. (((__ioc)->ctdev) ? BFI_SMEM_CT_SIZE : BFI_SMEM_CB_SIZE)
  206. #define BFA_IOC_FLASH_CHUNK_NO(off) (off / BFI_FLASH_CHUNK_SZ_WORDS)
  207. #define BFA_IOC_FLASH_OFFSET_IN_CHUNK(off) (off % BFI_FLASH_CHUNK_SZ_WORDS)
  208. #define BFA_IOC_FLASH_CHUNK_ADDR(chunkno) (chunkno * BFI_FLASH_CHUNK_SZ_WORDS)
  209. /**
  210. * IOC mailbox interface
  211. */
  212. void bfa_nw_ioc_mbox_queue(struct bfa_ioc *ioc, struct bfa_mbox_cmd *cmd);
  213. void bfa_nw_ioc_mbox_isr(struct bfa_ioc *ioc);
  214. void bfa_nw_ioc_mbox_regisr(struct bfa_ioc *ioc, enum bfi_mclass mc,
  215. bfa_ioc_mbox_mcfunc_t cbfn, void *cbarg);
  216. /**
  217. * IOC interfaces
  218. */
  219. #define bfa_ioc_pll_init_asic(__ioc) \
  220. ((__ioc)->ioc_hwif->ioc_pll_init((__ioc)->pcidev.pci_bar_kva, \
  221. (__ioc)->fcmode))
  222. #define bfa_ioc_isr_mode_set(__ioc, __msix) \
  223. ((__ioc)->ioc_hwif->ioc_isr_mode_set(__ioc, __msix))
  224. #define bfa_ioc_ownership_reset(__ioc) \
  225. ((__ioc)->ioc_hwif->ioc_ownership_reset(__ioc))
  226. void bfa_nw_ioc_set_ct_hwif(struct bfa_ioc *ioc);
  227. void bfa_nw_ioc_attach(struct bfa_ioc *ioc, void *bfa,
  228. struct bfa_ioc_cbfn *cbfn);
  229. void bfa_nw_ioc_auto_recover(bool auto_recover);
  230. void bfa_nw_ioc_detach(struct bfa_ioc *ioc);
  231. void bfa_nw_ioc_pci_init(struct bfa_ioc *ioc, struct bfa_pcidev *pcidev,
  232. enum bfi_mclass mc);
  233. u32 bfa_nw_ioc_meminfo(void);
  234. void bfa_nw_ioc_mem_claim(struct bfa_ioc *ioc, u8 *dm_kva, u64 dm_pa);
  235. void bfa_nw_ioc_enable(struct bfa_ioc *ioc);
  236. void bfa_nw_ioc_disable(struct bfa_ioc *ioc);
  237. void bfa_nw_ioc_error_isr(struct bfa_ioc *ioc);
  238. void bfa_nw_ioc_get_attr(struct bfa_ioc *ioc, struct bfa_ioc_attr *ioc_attr);
  239. void bfa_nw_ioc_hbfail_register(struct bfa_ioc *ioc,
  240. struct bfa_ioc_hbfail_notify *notify);
  241. bool bfa_nw_ioc_sem_get(void __iomem *sem_reg);
  242. void bfa_nw_ioc_sem_release(void __iomem *sem_reg);
  243. void bfa_nw_ioc_hw_sem_release(struct bfa_ioc *ioc);
  244. void bfa_nw_ioc_fwver_get(struct bfa_ioc *ioc,
  245. struct bfi_ioc_image_hdr *fwhdr);
  246. bool bfa_nw_ioc_fwver_cmp(struct bfa_ioc *ioc,
  247. struct bfi_ioc_image_hdr *fwhdr);
  248. mac_t bfa_nw_ioc_get_mac(struct bfa_ioc *ioc);
  249. /*
  250. * Timeout APIs
  251. */
  252. void bfa_nw_ioc_timeout(void *ioc);
  253. void bfa_nw_ioc_hb_check(void *ioc);
  254. void bfa_nw_iocpf_timeout(void *ioc);
  255. void bfa_nw_iocpf_sem_timeout(void *ioc);
  256. /*
  257. * F/W Image Size & Chunk
  258. */
  259. u32 *bfa_cb_image_get_chunk(int type, u32 off);
  260. u32 bfa_cb_image_get_size(int type);
  261. #endif /* __BFA_IOC_H__ */