e1000_main.c 129 KB

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  1. /*******************************************************************************
  2. Copyright(c) 1999 - 2005 Intel Corporation. All rights reserved.
  3. This program is free software; you can redistribute it and/or modify it
  4. under the terms of the GNU General Public License as published by the Free
  5. Software Foundation; either version 2 of the License, or (at your option)
  6. any later version.
  7. This program is distributed in the hope that it will be useful, but WITHOUT
  8. ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  9. FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  10. more details.
  11. You should have received a copy of the GNU General Public License along with
  12. this program; if not, write to the Free Software Foundation, Inc., 59
  13. Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  14. The full GNU General Public License is included in this distribution in the
  15. file called LICENSE.
  16. Contact Information:
  17. Linux NICS <linux.nics@intel.com>
  18. Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. *******************************************************************************/
  20. #include "e1000.h"
  21. /* Change Log
  22. * 6.3.9 12/16/2005
  23. * o incorporate fix for recycled skbs from IBM LTC
  24. * 6.3.7 11/18/2005
  25. * o Honor eeprom setting for enabling/disabling Wake On Lan
  26. * 6.3.5 11/17/2005
  27. * o Fix memory leak in rx ring handling for PCI Express adapters
  28. * 6.3.4 11/8/05
  29. * o Patch from Jesper Juhl to remove redundant NULL checks for kfree
  30. * 6.3.2 9/20/05
  31. * o Render logic that sets/resets DRV_LOAD as inline functions to
  32. * avoid code replication. If f/w is AMT then set DRV_LOAD only when
  33. * network interface is open.
  34. * o Handle DRV_LOAD set/reset in cases where AMT uses VLANs.
  35. * o Adjust PBA partioning for Jumbo frames using MTU size and not
  36. * rx_buffer_len
  37. * 6.3.1 9/19/05
  38. * o Use adapter->tx_timeout_factor in Tx Hung Detect logic
  39. (e1000_clean_tx_irq)
  40. * o Support for 8086:10B5 device (Quad Port)
  41. * 6.2.14 9/15/05
  42. * o In AMT enabled configurations, set/reset DRV_LOAD bit on interface
  43. * open/close
  44. * 6.2.13 9/14/05
  45. * o Invoke e1000_check_mng_mode only for 8257x controllers since it
  46. * accesses the FWSM that is not supported in other controllers
  47. * 6.2.12 9/9/05
  48. * o Add support for device id E1000_DEV_ID_82546GB_QUAD_COPPER
  49. * o set RCTL:SECRC only for controllers newer than 82543.
  50. * o When the n/w interface comes down reset DRV_LOAD bit to notify f/w.
  51. * This code was moved from e1000_remove to e1000_close
  52. * 6.2.10 9/6/05
  53. * o Fix error in updating RDT in el1000_alloc_rx_buffers[_ps] -- one off.
  54. * o Enable fc by default on 82573 controllers (do not read eeprom)
  55. * o Fix rx_errors statistic not to include missed_packet_count
  56. * o Fix rx_dropped statistic not to include missed_packet_count
  57. (Padraig Brady)
  58. * 6.2.9 8/30/05
  59. * o Remove call to update statistics from the controller ib e1000_get_stats
  60. * 6.2.8 8/30/05
  61. * o Improved algorithm for rx buffer allocation/rdt update
  62. * o Flow control watermarks relative to rx PBA size
  63. * o Simplified 'Tx Hung' detect logic
  64. * 6.2.7 8/17/05
  65. * o Report rx buffer allocation failures and tx timeout counts in stats
  66. * 6.2.6 8/16/05
  67. * o Implement workaround for controller erratum -- linear non-tso packet
  68. * following a TSO gets written back prematurely
  69. * 6.2.5 8/15/05
  70. * o Set netdev->tx_queue_len based on link speed/duplex settings.
  71. * o Fix net_stats.rx_fifo_errors <p@draigBrady.com>
  72. * o Do not power off PHY if SoL/IDER session is active
  73. * 6.2.4 8/10/05
  74. * o Fix loopback test setup/cleanup for 82571/3 controllers
  75. * o Fix parsing of outgoing packets (e1000_transfer_dhcp_info) to treat
  76. * all packets as raw
  77. * o Prevent operations that will cause the PHY to be reset if SoL/IDER
  78. * sessions are active and log a message
  79. * 6.2.2 7/21/05
  80. * o used fixed size descriptors for all MTU sizes, reduces memory load
  81. * 6.1.2 4/13/05
  82. * o Fixed ethtool diagnostics
  83. * o Enabled flow control to take default eeprom settings
  84. * o Added stats_lock around e1000_read_phy_reg commands to avoid concurrent
  85. * calls, one from mii_ioctl and other from within update_stats while
  86. * processing MIIREG ioctl.
  87. */
  88. char e1000_driver_name[] = "e1000";
  89. static char e1000_driver_string[] = "Intel(R) PRO/1000 Network Driver";
  90. #ifndef CONFIG_E1000_NAPI
  91. #define DRIVERNAPI
  92. #else
  93. #define DRIVERNAPI "-NAPI"
  94. #endif
  95. #define DRV_VERSION "7.0.33-k2"DRIVERNAPI
  96. char e1000_driver_version[] = DRV_VERSION;
  97. static char e1000_copyright[] = "Copyright (c) 1999-2005 Intel Corporation.";
  98. /* e1000_pci_tbl - PCI Device ID Table
  99. *
  100. * Last entry must be all 0s
  101. *
  102. * Macro expands to...
  103. * {PCI_DEVICE(PCI_VENDOR_ID_INTEL, device_id)}
  104. */
  105. static struct pci_device_id e1000_pci_tbl[] = {
  106. INTEL_E1000_ETHERNET_DEVICE(0x1000),
  107. INTEL_E1000_ETHERNET_DEVICE(0x1001),
  108. INTEL_E1000_ETHERNET_DEVICE(0x1004),
  109. INTEL_E1000_ETHERNET_DEVICE(0x1008),
  110. INTEL_E1000_ETHERNET_DEVICE(0x1009),
  111. INTEL_E1000_ETHERNET_DEVICE(0x100C),
  112. INTEL_E1000_ETHERNET_DEVICE(0x100D),
  113. INTEL_E1000_ETHERNET_DEVICE(0x100E),
  114. INTEL_E1000_ETHERNET_DEVICE(0x100F),
  115. INTEL_E1000_ETHERNET_DEVICE(0x1010),
  116. INTEL_E1000_ETHERNET_DEVICE(0x1011),
  117. INTEL_E1000_ETHERNET_DEVICE(0x1012),
  118. INTEL_E1000_ETHERNET_DEVICE(0x1013),
  119. INTEL_E1000_ETHERNET_DEVICE(0x1014),
  120. INTEL_E1000_ETHERNET_DEVICE(0x1015),
  121. INTEL_E1000_ETHERNET_DEVICE(0x1016),
  122. INTEL_E1000_ETHERNET_DEVICE(0x1017),
  123. INTEL_E1000_ETHERNET_DEVICE(0x1018),
  124. INTEL_E1000_ETHERNET_DEVICE(0x1019),
  125. INTEL_E1000_ETHERNET_DEVICE(0x101A),
  126. INTEL_E1000_ETHERNET_DEVICE(0x101D),
  127. INTEL_E1000_ETHERNET_DEVICE(0x101E),
  128. INTEL_E1000_ETHERNET_DEVICE(0x1026),
  129. INTEL_E1000_ETHERNET_DEVICE(0x1027),
  130. INTEL_E1000_ETHERNET_DEVICE(0x1028),
  131. INTEL_E1000_ETHERNET_DEVICE(0x105E),
  132. INTEL_E1000_ETHERNET_DEVICE(0x105F),
  133. INTEL_E1000_ETHERNET_DEVICE(0x1060),
  134. INTEL_E1000_ETHERNET_DEVICE(0x1075),
  135. INTEL_E1000_ETHERNET_DEVICE(0x1076),
  136. INTEL_E1000_ETHERNET_DEVICE(0x1077),
  137. INTEL_E1000_ETHERNET_DEVICE(0x1078),
  138. INTEL_E1000_ETHERNET_DEVICE(0x1079),
  139. INTEL_E1000_ETHERNET_DEVICE(0x107A),
  140. INTEL_E1000_ETHERNET_DEVICE(0x107B),
  141. INTEL_E1000_ETHERNET_DEVICE(0x107C),
  142. INTEL_E1000_ETHERNET_DEVICE(0x107D),
  143. INTEL_E1000_ETHERNET_DEVICE(0x107E),
  144. INTEL_E1000_ETHERNET_DEVICE(0x107F),
  145. INTEL_E1000_ETHERNET_DEVICE(0x108A),
  146. INTEL_E1000_ETHERNET_DEVICE(0x108B),
  147. INTEL_E1000_ETHERNET_DEVICE(0x108C),
  148. INTEL_E1000_ETHERNET_DEVICE(0x1099),
  149. INTEL_E1000_ETHERNET_DEVICE(0x109A),
  150. INTEL_E1000_ETHERNET_DEVICE(0x10B5),
  151. /* required last entry */
  152. {0,}
  153. };
  154. MODULE_DEVICE_TABLE(pci, e1000_pci_tbl);
  155. int e1000_up(struct e1000_adapter *adapter);
  156. void e1000_down(struct e1000_adapter *adapter);
  157. void e1000_reset(struct e1000_adapter *adapter);
  158. int e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx);
  159. int e1000_setup_all_tx_resources(struct e1000_adapter *adapter);
  160. int e1000_setup_all_rx_resources(struct e1000_adapter *adapter);
  161. void e1000_free_all_tx_resources(struct e1000_adapter *adapter);
  162. void e1000_free_all_rx_resources(struct e1000_adapter *adapter);
  163. static int e1000_setup_tx_resources(struct e1000_adapter *adapter,
  164. struct e1000_tx_ring *txdr);
  165. static int e1000_setup_rx_resources(struct e1000_adapter *adapter,
  166. struct e1000_rx_ring *rxdr);
  167. static void e1000_free_tx_resources(struct e1000_adapter *adapter,
  168. struct e1000_tx_ring *tx_ring);
  169. static void e1000_free_rx_resources(struct e1000_adapter *adapter,
  170. struct e1000_rx_ring *rx_ring);
  171. void e1000_update_stats(struct e1000_adapter *adapter);
  172. /* Local Function Prototypes */
  173. static int e1000_init_module(void);
  174. static void e1000_exit_module(void);
  175. static int e1000_probe(struct pci_dev *pdev, const struct pci_device_id *ent);
  176. static void __devexit e1000_remove(struct pci_dev *pdev);
  177. static int e1000_alloc_queues(struct e1000_adapter *adapter);
  178. static int e1000_sw_init(struct e1000_adapter *adapter);
  179. static int e1000_open(struct net_device *netdev);
  180. static int e1000_close(struct net_device *netdev);
  181. static void e1000_configure_tx(struct e1000_adapter *adapter);
  182. static void e1000_configure_rx(struct e1000_adapter *adapter);
  183. static void e1000_setup_rctl(struct e1000_adapter *adapter);
  184. static void e1000_clean_all_tx_rings(struct e1000_adapter *adapter);
  185. static void e1000_clean_all_rx_rings(struct e1000_adapter *adapter);
  186. static void e1000_clean_tx_ring(struct e1000_adapter *adapter,
  187. struct e1000_tx_ring *tx_ring);
  188. static void e1000_clean_rx_ring(struct e1000_adapter *adapter,
  189. struct e1000_rx_ring *rx_ring);
  190. static void e1000_set_multi(struct net_device *netdev);
  191. static void e1000_update_phy_info(unsigned long data);
  192. static void e1000_watchdog(unsigned long data);
  193. static void e1000_watchdog_task(struct e1000_adapter *adapter);
  194. static void e1000_82547_tx_fifo_stall(unsigned long data);
  195. static int e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev);
  196. static struct net_device_stats * e1000_get_stats(struct net_device *netdev);
  197. static int e1000_change_mtu(struct net_device *netdev, int new_mtu);
  198. static int e1000_set_mac(struct net_device *netdev, void *p);
  199. static irqreturn_t e1000_intr(int irq, void *data, struct pt_regs *regs);
  200. static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter,
  201. struct e1000_tx_ring *tx_ring);
  202. #ifdef CONFIG_E1000_NAPI
  203. static int e1000_clean(struct net_device *poll_dev, int *budget);
  204. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  205. struct e1000_rx_ring *rx_ring,
  206. int *work_done, int work_to_do);
  207. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  208. struct e1000_rx_ring *rx_ring,
  209. int *work_done, int work_to_do);
  210. #else
  211. static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter,
  212. struct e1000_rx_ring *rx_ring);
  213. static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  214. struct e1000_rx_ring *rx_ring);
  215. #endif
  216. static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  217. struct e1000_rx_ring *rx_ring,
  218. int cleaned_count);
  219. static void e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  220. struct e1000_rx_ring *rx_ring,
  221. int cleaned_count);
  222. static int e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd);
  223. static int e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
  224. int cmd);
  225. void e1000_set_ethtool_ops(struct net_device *netdev);
  226. static void e1000_enter_82542_rst(struct e1000_adapter *adapter);
  227. static void e1000_leave_82542_rst(struct e1000_adapter *adapter);
  228. static void e1000_tx_timeout(struct net_device *dev);
  229. static void e1000_tx_timeout_task(struct net_device *dev);
  230. static void e1000_smartspeed(struct e1000_adapter *adapter);
  231. static inline int e1000_82547_fifo_workaround(struct e1000_adapter *adapter,
  232. struct sk_buff *skb);
  233. static void e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp);
  234. static void e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid);
  235. static void e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid);
  236. static void e1000_restore_vlan(struct e1000_adapter *adapter);
  237. #ifdef CONFIG_PM
  238. static int e1000_suspend(struct pci_dev *pdev, pm_message_t state);
  239. static int e1000_resume(struct pci_dev *pdev);
  240. #endif
  241. #ifdef CONFIG_NET_POLL_CONTROLLER
  242. /* for netdump / net console */
  243. static void e1000_netpoll (struct net_device *netdev);
  244. #endif
  245. /* Exported from other modules */
  246. extern void e1000_check_options(struct e1000_adapter *adapter);
  247. static struct pci_driver e1000_driver = {
  248. .name = e1000_driver_name,
  249. .id_table = e1000_pci_tbl,
  250. .probe = e1000_probe,
  251. .remove = __devexit_p(e1000_remove),
  252. /* Power Managment Hooks */
  253. #ifdef CONFIG_PM
  254. .suspend = e1000_suspend,
  255. .resume = e1000_resume
  256. #endif
  257. };
  258. MODULE_AUTHOR("Intel Corporation, <linux.nics@intel.com>");
  259. MODULE_DESCRIPTION("Intel(R) PRO/1000 Network Driver");
  260. MODULE_LICENSE("GPL");
  261. MODULE_VERSION(DRV_VERSION);
  262. static int debug = NETIF_MSG_DRV | NETIF_MSG_PROBE;
  263. module_param(debug, int, 0);
  264. MODULE_PARM_DESC(debug, "Debug level (0=none,...,16=all)");
  265. /**
  266. * e1000_init_module - Driver Registration Routine
  267. *
  268. * e1000_init_module is the first routine called when the driver is
  269. * loaded. All it does is register with the PCI subsystem.
  270. **/
  271. static int __init
  272. e1000_init_module(void)
  273. {
  274. int ret;
  275. printk(KERN_INFO "%s - version %s\n",
  276. e1000_driver_string, e1000_driver_version);
  277. printk(KERN_INFO "%s\n", e1000_copyright);
  278. ret = pci_module_init(&e1000_driver);
  279. return ret;
  280. }
  281. module_init(e1000_init_module);
  282. /**
  283. * e1000_exit_module - Driver Exit Cleanup Routine
  284. *
  285. * e1000_exit_module is called just before the driver is removed
  286. * from memory.
  287. **/
  288. static void __exit
  289. e1000_exit_module(void)
  290. {
  291. pci_unregister_driver(&e1000_driver);
  292. }
  293. module_exit(e1000_exit_module);
  294. /**
  295. * e1000_irq_disable - Mask off interrupt generation on the NIC
  296. * @adapter: board private structure
  297. **/
  298. static inline void
  299. e1000_irq_disable(struct e1000_adapter *adapter)
  300. {
  301. atomic_inc(&adapter->irq_sem);
  302. E1000_WRITE_REG(&adapter->hw, IMC, ~0);
  303. E1000_WRITE_FLUSH(&adapter->hw);
  304. synchronize_irq(adapter->pdev->irq);
  305. }
  306. /**
  307. * e1000_irq_enable - Enable default interrupt generation settings
  308. * @adapter: board private structure
  309. **/
  310. static inline void
  311. e1000_irq_enable(struct e1000_adapter *adapter)
  312. {
  313. if (likely(atomic_dec_and_test(&adapter->irq_sem))) {
  314. E1000_WRITE_REG(&adapter->hw, IMS, IMS_ENABLE_MASK);
  315. E1000_WRITE_FLUSH(&adapter->hw);
  316. }
  317. }
  318. static void
  319. e1000_update_mng_vlan(struct e1000_adapter *adapter)
  320. {
  321. struct net_device *netdev = adapter->netdev;
  322. uint16_t vid = adapter->hw.mng_cookie.vlan_id;
  323. uint16_t old_vid = adapter->mng_vlan_id;
  324. if (adapter->vlgrp) {
  325. if (!adapter->vlgrp->vlan_devices[vid]) {
  326. if (adapter->hw.mng_cookie.status &
  327. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) {
  328. e1000_vlan_rx_add_vid(netdev, vid);
  329. adapter->mng_vlan_id = vid;
  330. } else
  331. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  332. if ((old_vid != (uint16_t)E1000_MNG_VLAN_NONE) &&
  333. (vid != old_vid) &&
  334. !adapter->vlgrp->vlan_devices[old_vid])
  335. e1000_vlan_rx_kill_vid(netdev, old_vid);
  336. } else
  337. adapter->mng_vlan_id = vid;
  338. }
  339. }
  340. /**
  341. * e1000_release_hw_control - release control of the h/w to f/w
  342. * @adapter: address of board private structure
  343. *
  344. * e1000_release_hw_control resets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  345. * For ASF and Pass Through versions of f/w this means that the
  346. * driver is no longer loaded. For AMT version (only with 82573) i
  347. * of the f/w this means that the netowrk i/f is closed.
  348. *
  349. **/
  350. static inline void
  351. e1000_release_hw_control(struct e1000_adapter *adapter)
  352. {
  353. uint32_t ctrl_ext;
  354. uint32_t swsm;
  355. /* Let firmware taken over control of h/w */
  356. switch (adapter->hw.mac_type) {
  357. case e1000_82571:
  358. case e1000_82572:
  359. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  360. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  361. ctrl_ext & ~E1000_CTRL_EXT_DRV_LOAD);
  362. break;
  363. case e1000_82573:
  364. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  365. E1000_WRITE_REG(&adapter->hw, SWSM,
  366. swsm & ~E1000_SWSM_DRV_LOAD);
  367. default:
  368. break;
  369. }
  370. }
  371. /**
  372. * e1000_get_hw_control - get control of the h/w from f/w
  373. * @adapter: address of board private structure
  374. *
  375. * e1000_get_hw_control sets {CTRL_EXT|FWSM}:DRV_LOAD bit.
  376. * For ASF and Pass Through versions of f/w this means that
  377. * the driver is loaded. For AMT version (only with 82573)
  378. * of the f/w this means that the netowrk i/f is open.
  379. *
  380. **/
  381. static inline void
  382. e1000_get_hw_control(struct e1000_adapter *adapter)
  383. {
  384. uint32_t ctrl_ext;
  385. uint32_t swsm;
  386. /* Let firmware know the driver has taken over */
  387. switch (adapter->hw.mac_type) {
  388. case e1000_82571:
  389. case e1000_82572:
  390. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  391. E1000_WRITE_REG(&adapter->hw, CTRL_EXT,
  392. ctrl_ext | E1000_CTRL_EXT_DRV_LOAD);
  393. break;
  394. case e1000_82573:
  395. swsm = E1000_READ_REG(&adapter->hw, SWSM);
  396. E1000_WRITE_REG(&adapter->hw, SWSM,
  397. swsm | E1000_SWSM_DRV_LOAD);
  398. break;
  399. default:
  400. break;
  401. }
  402. }
  403. int
  404. e1000_up(struct e1000_adapter *adapter)
  405. {
  406. struct net_device *netdev = adapter->netdev;
  407. int i, err;
  408. /* hardware has been reset, we need to reload some things */
  409. /* Reset the PHY if it was previously powered down */
  410. if (adapter->hw.media_type == e1000_media_type_copper) {
  411. uint16_t mii_reg;
  412. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  413. if (mii_reg & MII_CR_POWER_DOWN)
  414. e1000_phy_reset(&adapter->hw);
  415. }
  416. e1000_set_multi(netdev);
  417. e1000_restore_vlan(adapter);
  418. e1000_configure_tx(adapter);
  419. e1000_setup_rctl(adapter);
  420. e1000_configure_rx(adapter);
  421. /* call E1000_DESC_UNUSED which always leaves
  422. * at least 1 descriptor unused to make sure
  423. * next_to_use != next_to_clean */
  424. for (i = 0; i < adapter->num_rx_queues; i++) {
  425. struct e1000_rx_ring *ring = &adapter->rx_ring[i];
  426. adapter->alloc_rx_buf(adapter, ring,
  427. E1000_DESC_UNUSED(ring));
  428. }
  429. #ifdef CONFIG_PCI_MSI
  430. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  431. adapter->have_msi = TRUE;
  432. if ((err = pci_enable_msi(adapter->pdev))) {
  433. DPRINTK(PROBE, ERR,
  434. "Unable to allocate MSI interrupt Error: %d\n", err);
  435. adapter->have_msi = FALSE;
  436. }
  437. }
  438. #endif
  439. if ((err = request_irq(adapter->pdev->irq, &e1000_intr,
  440. SA_SHIRQ | SA_SAMPLE_RANDOM,
  441. netdev->name, netdev))) {
  442. DPRINTK(PROBE, ERR,
  443. "Unable to allocate interrupt Error: %d\n", err);
  444. return err;
  445. }
  446. adapter->tx_queue_len = netdev->tx_queue_len;
  447. mod_timer(&adapter->watchdog_timer, jiffies);
  448. #ifdef CONFIG_E1000_NAPI
  449. netif_poll_enable(netdev);
  450. #endif
  451. e1000_irq_enable(adapter);
  452. return 0;
  453. }
  454. void
  455. e1000_down(struct e1000_adapter *adapter)
  456. {
  457. struct net_device *netdev = adapter->netdev;
  458. boolean_t mng_mode_enabled = (adapter->hw.mac_type >= e1000_82571) &&
  459. e1000_check_mng_mode(&adapter->hw);
  460. e1000_irq_disable(adapter);
  461. free_irq(adapter->pdev->irq, netdev);
  462. #ifdef CONFIG_PCI_MSI
  463. if (adapter->hw.mac_type > e1000_82547_rev_2 &&
  464. adapter->have_msi == TRUE)
  465. pci_disable_msi(adapter->pdev);
  466. #endif
  467. del_timer_sync(&adapter->tx_fifo_stall_timer);
  468. del_timer_sync(&adapter->watchdog_timer);
  469. del_timer_sync(&adapter->phy_info_timer);
  470. #ifdef CONFIG_E1000_NAPI
  471. netif_poll_disable(netdev);
  472. #endif
  473. netdev->tx_queue_len = adapter->tx_queue_len;
  474. adapter->link_speed = 0;
  475. adapter->link_duplex = 0;
  476. netif_carrier_off(netdev);
  477. netif_stop_queue(netdev);
  478. e1000_reset(adapter);
  479. e1000_clean_all_tx_rings(adapter);
  480. e1000_clean_all_rx_rings(adapter);
  481. /* Power down the PHY so no link is implied when interface is down *
  482. * The PHY cannot be powered down if any of the following is TRUE *
  483. * (a) WoL is enabled
  484. * (b) AMT is active
  485. * (c) SoL/IDER session is active */
  486. if (!adapter->wol && adapter->hw.mac_type >= e1000_82540 &&
  487. adapter->hw.media_type == e1000_media_type_copper &&
  488. !(E1000_READ_REG(&adapter->hw, MANC) & E1000_MANC_SMBUS_EN) &&
  489. !mng_mode_enabled &&
  490. !e1000_check_phy_reset_block(&adapter->hw)) {
  491. uint16_t mii_reg;
  492. e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &mii_reg);
  493. mii_reg |= MII_CR_POWER_DOWN;
  494. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, mii_reg);
  495. mdelay(1);
  496. }
  497. }
  498. void
  499. e1000_reset(struct e1000_adapter *adapter)
  500. {
  501. uint32_t pba, manc;
  502. uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF;
  503. /* Repartition Pba for greater than 9k mtu
  504. * To take effect CTRL.RST is required.
  505. */
  506. switch (adapter->hw.mac_type) {
  507. case e1000_82547:
  508. case e1000_82547_rev_2:
  509. pba = E1000_PBA_30K;
  510. break;
  511. case e1000_82571:
  512. case e1000_82572:
  513. pba = E1000_PBA_38K;
  514. break;
  515. case e1000_82573:
  516. pba = E1000_PBA_12K;
  517. break;
  518. default:
  519. pba = E1000_PBA_48K;
  520. break;
  521. }
  522. if ((adapter->hw.mac_type != e1000_82573) &&
  523. (adapter->netdev->mtu > E1000_RXBUFFER_8192))
  524. pba -= 8; /* allocate more FIFO for Tx */
  525. if (adapter->hw.mac_type == e1000_82547) {
  526. adapter->tx_fifo_head = 0;
  527. adapter->tx_head_addr = pba << E1000_TX_HEAD_ADDR_SHIFT;
  528. adapter->tx_fifo_size =
  529. (E1000_PBA_40K - pba) << E1000_PBA_BYTES_SHIFT;
  530. atomic_set(&adapter->tx_fifo_stall, 0);
  531. }
  532. E1000_WRITE_REG(&adapter->hw, PBA, pba);
  533. /* flow control settings */
  534. /* Set the FC high water mark to 90% of the FIFO size.
  535. * Required to clear last 3 LSB */
  536. fc_high_water_mark = ((pba * 9216)/10) & 0xFFF8;
  537. adapter->hw.fc_high_water = fc_high_water_mark;
  538. adapter->hw.fc_low_water = fc_high_water_mark - 8;
  539. adapter->hw.fc_pause_time = E1000_FC_PAUSE_TIME;
  540. adapter->hw.fc_send_xon = 1;
  541. adapter->hw.fc = adapter->hw.original_fc;
  542. /* Allow time for pending master requests to run */
  543. e1000_reset_hw(&adapter->hw);
  544. if (adapter->hw.mac_type >= e1000_82544)
  545. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  546. if (e1000_init_hw(&adapter->hw))
  547. DPRINTK(PROBE, ERR, "Hardware Error\n");
  548. e1000_update_mng_vlan(adapter);
  549. /* Enable h/w to recognize an 802.1Q VLAN Ethernet packet */
  550. E1000_WRITE_REG(&adapter->hw, VET, ETHERNET_IEEE_VLAN_TYPE);
  551. e1000_reset_adaptive(&adapter->hw);
  552. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  553. if (adapter->en_mng_pt) {
  554. manc = E1000_READ_REG(&adapter->hw, MANC);
  555. manc |= (E1000_MANC_ARP_EN | E1000_MANC_EN_MNG2HOST);
  556. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  557. }
  558. }
  559. /**
  560. * e1000_probe - Device Initialization Routine
  561. * @pdev: PCI device information struct
  562. * @ent: entry in e1000_pci_tbl
  563. *
  564. * Returns 0 on success, negative on failure
  565. *
  566. * e1000_probe initializes an adapter identified by a pci_dev structure.
  567. * The OS initialization, configuring of the adapter private structure,
  568. * and a hardware reset occur.
  569. **/
  570. static int __devinit
  571. e1000_probe(struct pci_dev *pdev,
  572. const struct pci_device_id *ent)
  573. {
  574. struct net_device *netdev;
  575. struct e1000_adapter *adapter;
  576. unsigned long mmio_start, mmio_len;
  577. static int cards_found = 0;
  578. static int e1000_ksp3_port_a = 0; /* global ksp3 port a indication */
  579. int i, err, pci_using_dac;
  580. uint16_t eeprom_data;
  581. uint16_t eeprom_apme_mask = E1000_EEPROM_APME;
  582. if ((err = pci_enable_device(pdev)))
  583. return err;
  584. if (!(err = pci_set_dma_mask(pdev, DMA_64BIT_MASK))) {
  585. pci_using_dac = 1;
  586. } else {
  587. if ((err = pci_set_dma_mask(pdev, DMA_32BIT_MASK))) {
  588. E1000_ERR("No usable DMA configuration, aborting\n");
  589. return err;
  590. }
  591. pci_using_dac = 0;
  592. }
  593. if ((err = pci_request_regions(pdev, e1000_driver_name)))
  594. return err;
  595. pci_set_master(pdev);
  596. netdev = alloc_etherdev(sizeof(struct e1000_adapter));
  597. if (!netdev) {
  598. err = -ENOMEM;
  599. goto err_alloc_etherdev;
  600. }
  601. SET_MODULE_OWNER(netdev);
  602. SET_NETDEV_DEV(netdev, &pdev->dev);
  603. pci_set_drvdata(pdev, netdev);
  604. adapter = netdev_priv(netdev);
  605. adapter->netdev = netdev;
  606. adapter->pdev = pdev;
  607. adapter->hw.back = adapter;
  608. adapter->msg_enable = (1 << debug) - 1;
  609. mmio_start = pci_resource_start(pdev, BAR_0);
  610. mmio_len = pci_resource_len(pdev, BAR_0);
  611. adapter->hw.hw_addr = ioremap(mmio_start, mmio_len);
  612. if (!adapter->hw.hw_addr) {
  613. err = -EIO;
  614. goto err_ioremap;
  615. }
  616. for (i = BAR_1; i <= BAR_5; i++) {
  617. if (pci_resource_len(pdev, i) == 0)
  618. continue;
  619. if (pci_resource_flags(pdev, i) & IORESOURCE_IO) {
  620. adapter->hw.io_base = pci_resource_start(pdev, i);
  621. break;
  622. }
  623. }
  624. netdev->open = &e1000_open;
  625. netdev->stop = &e1000_close;
  626. netdev->hard_start_xmit = &e1000_xmit_frame;
  627. netdev->get_stats = &e1000_get_stats;
  628. netdev->set_multicast_list = &e1000_set_multi;
  629. netdev->set_mac_address = &e1000_set_mac;
  630. netdev->change_mtu = &e1000_change_mtu;
  631. netdev->do_ioctl = &e1000_ioctl;
  632. e1000_set_ethtool_ops(netdev);
  633. netdev->tx_timeout = &e1000_tx_timeout;
  634. netdev->watchdog_timeo = 5 * HZ;
  635. #ifdef CONFIG_E1000_NAPI
  636. netdev->poll = &e1000_clean;
  637. netdev->weight = 64;
  638. #endif
  639. netdev->vlan_rx_register = e1000_vlan_rx_register;
  640. netdev->vlan_rx_add_vid = e1000_vlan_rx_add_vid;
  641. netdev->vlan_rx_kill_vid = e1000_vlan_rx_kill_vid;
  642. #ifdef CONFIG_NET_POLL_CONTROLLER
  643. netdev->poll_controller = e1000_netpoll;
  644. #endif
  645. strcpy(netdev->name, pci_name(pdev));
  646. netdev->mem_start = mmio_start;
  647. netdev->mem_end = mmio_start + mmio_len;
  648. netdev->base_addr = adapter->hw.io_base;
  649. adapter->bd_number = cards_found;
  650. /* setup the private structure */
  651. if ((err = e1000_sw_init(adapter)))
  652. goto err_sw_init;
  653. if ((err = e1000_check_phy_reset_block(&adapter->hw)))
  654. DPRINTK(PROBE, INFO, "PHY reset is blocked due to SOL/IDER session.\n");
  655. /* if ksp3, indicate if it's port a being setup */
  656. if (pdev->device == E1000_DEV_ID_82546GB_QUAD_COPPER_KSP3 &&
  657. e1000_ksp3_port_a == 0)
  658. adapter->ksp3_port_a = 1;
  659. e1000_ksp3_port_a++;
  660. /* Reset for multiple KP3 adapters */
  661. if (e1000_ksp3_port_a == 4)
  662. e1000_ksp3_port_a = 0;
  663. if (adapter->hw.mac_type >= e1000_82543) {
  664. netdev->features = NETIF_F_SG |
  665. NETIF_F_HW_CSUM |
  666. NETIF_F_HW_VLAN_TX |
  667. NETIF_F_HW_VLAN_RX |
  668. NETIF_F_HW_VLAN_FILTER;
  669. }
  670. #ifdef NETIF_F_TSO
  671. if ((adapter->hw.mac_type >= e1000_82544) &&
  672. (adapter->hw.mac_type != e1000_82547))
  673. netdev->features |= NETIF_F_TSO;
  674. #ifdef NETIF_F_TSO_IPV6
  675. if (adapter->hw.mac_type > e1000_82547_rev_2)
  676. netdev->features |= NETIF_F_TSO_IPV6;
  677. #endif
  678. #endif
  679. if (pci_using_dac)
  680. netdev->features |= NETIF_F_HIGHDMA;
  681. /* hard_start_xmit is safe against parallel locking */
  682. netdev->features |= NETIF_F_LLTX;
  683. adapter->en_mng_pt = e1000_enable_mng_pass_thru(&adapter->hw);
  684. /* before reading the EEPROM, reset the controller to
  685. * put the device in a known good starting state */
  686. e1000_reset_hw(&adapter->hw);
  687. /* make sure the EEPROM is good */
  688. if (e1000_validate_eeprom_checksum(&adapter->hw) < 0) {
  689. DPRINTK(PROBE, ERR, "The EEPROM Checksum Is Not Valid\n");
  690. err = -EIO;
  691. goto err_eeprom;
  692. }
  693. /* copy the MAC address out of the EEPROM */
  694. if (e1000_read_mac_addr(&adapter->hw))
  695. DPRINTK(PROBE, ERR, "EEPROM Read Error\n");
  696. memcpy(netdev->dev_addr, adapter->hw.mac_addr, netdev->addr_len);
  697. memcpy(netdev->perm_addr, adapter->hw.mac_addr, netdev->addr_len);
  698. if (!is_valid_ether_addr(netdev->perm_addr)) {
  699. DPRINTK(PROBE, ERR, "Invalid MAC Address\n");
  700. err = -EIO;
  701. goto err_eeprom;
  702. }
  703. e1000_read_part_num(&adapter->hw, &(adapter->part_num));
  704. e1000_get_bus_info(&adapter->hw);
  705. init_timer(&adapter->tx_fifo_stall_timer);
  706. adapter->tx_fifo_stall_timer.function = &e1000_82547_tx_fifo_stall;
  707. adapter->tx_fifo_stall_timer.data = (unsigned long) adapter;
  708. init_timer(&adapter->watchdog_timer);
  709. adapter->watchdog_timer.function = &e1000_watchdog;
  710. adapter->watchdog_timer.data = (unsigned long) adapter;
  711. INIT_WORK(&adapter->watchdog_task,
  712. (void (*)(void *))e1000_watchdog_task, adapter);
  713. init_timer(&adapter->phy_info_timer);
  714. adapter->phy_info_timer.function = &e1000_update_phy_info;
  715. adapter->phy_info_timer.data = (unsigned long) adapter;
  716. INIT_WORK(&adapter->tx_timeout_task,
  717. (void (*)(void *))e1000_tx_timeout_task, netdev);
  718. /* we're going to reset, so assume we have no link for now */
  719. netif_carrier_off(netdev);
  720. netif_stop_queue(netdev);
  721. e1000_check_options(adapter);
  722. /* Initial Wake on LAN setting
  723. * If APM wake is enabled in the EEPROM,
  724. * enable the ACPI Magic Packet filter
  725. */
  726. switch (adapter->hw.mac_type) {
  727. case e1000_82542_rev2_0:
  728. case e1000_82542_rev2_1:
  729. case e1000_82543:
  730. break;
  731. case e1000_82544:
  732. e1000_read_eeprom(&adapter->hw,
  733. EEPROM_INIT_CONTROL2_REG, 1, &eeprom_data);
  734. eeprom_apme_mask = E1000_EEPROM_82544_APM;
  735. break;
  736. case e1000_82546:
  737. case e1000_82546_rev_3:
  738. case e1000_82571:
  739. if (E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_FUNC_1){
  740. e1000_read_eeprom(&adapter->hw,
  741. EEPROM_INIT_CONTROL3_PORT_B, 1, &eeprom_data);
  742. break;
  743. }
  744. /* Fall Through */
  745. default:
  746. e1000_read_eeprom(&adapter->hw,
  747. EEPROM_INIT_CONTROL3_PORT_A, 1, &eeprom_data);
  748. break;
  749. }
  750. if (eeprom_data & eeprom_apme_mask)
  751. adapter->wol |= E1000_WUFC_MAG;
  752. /* print bus type/speed/width info */
  753. {
  754. struct e1000_hw *hw = &adapter->hw;
  755. DPRINTK(PROBE, INFO, "(PCI%s:%s:%s) ",
  756. ((hw->bus_type == e1000_bus_type_pcix) ? "-X" :
  757. (hw->bus_type == e1000_bus_type_pci_express ? " Express":"")),
  758. ((hw->bus_speed == e1000_bus_speed_2500) ? "2.5Gb/s" :
  759. (hw->bus_speed == e1000_bus_speed_133) ? "133MHz" :
  760. (hw->bus_speed == e1000_bus_speed_120) ? "120MHz" :
  761. (hw->bus_speed == e1000_bus_speed_100) ? "100MHz" :
  762. (hw->bus_speed == e1000_bus_speed_66) ? "66MHz" : "33MHz"),
  763. ((hw->bus_width == e1000_bus_width_64) ? "64-bit" :
  764. (hw->bus_width == e1000_bus_width_pciex_4) ? "Width x4" :
  765. (hw->bus_width == e1000_bus_width_pciex_1) ? "Width x1" :
  766. "32-bit"));
  767. }
  768. for (i = 0; i < 6; i++)
  769. printk("%2.2x%c", netdev->dev_addr[i], i == 5 ? '\n' : ':');
  770. /* reset the hardware with the new settings */
  771. e1000_reset(adapter);
  772. /* If the controller is 82573 and f/w is AMT, do not set
  773. * DRV_LOAD until the interface is up. For all other cases,
  774. * let the f/w know that the h/w is now under the control
  775. * of the driver. */
  776. if (adapter->hw.mac_type != e1000_82573 ||
  777. !e1000_check_mng_mode(&adapter->hw))
  778. e1000_get_hw_control(adapter);
  779. strcpy(netdev->name, "eth%d");
  780. if ((err = register_netdev(netdev)))
  781. goto err_register;
  782. DPRINTK(PROBE, INFO, "Intel(R) PRO/1000 Network Connection\n");
  783. cards_found++;
  784. return 0;
  785. err_register:
  786. err_sw_init:
  787. err_eeprom:
  788. iounmap(adapter->hw.hw_addr);
  789. err_ioremap:
  790. free_netdev(netdev);
  791. err_alloc_etherdev:
  792. pci_release_regions(pdev);
  793. return err;
  794. }
  795. /**
  796. * e1000_remove - Device Removal Routine
  797. * @pdev: PCI device information struct
  798. *
  799. * e1000_remove is called by the PCI subsystem to alert the driver
  800. * that it should release a PCI device. The could be caused by a
  801. * Hot-Plug event, or because the driver is going to be removed from
  802. * memory.
  803. **/
  804. static void __devexit
  805. e1000_remove(struct pci_dev *pdev)
  806. {
  807. struct net_device *netdev = pci_get_drvdata(pdev);
  808. struct e1000_adapter *adapter = netdev_priv(netdev);
  809. uint32_t manc;
  810. #ifdef CONFIG_E1000_NAPI
  811. int i;
  812. #endif
  813. flush_scheduled_work();
  814. if (adapter->hw.mac_type >= e1000_82540 &&
  815. adapter->hw.media_type == e1000_media_type_copper) {
  816. manc = E1000_READ_REG(&adapter->hw, MANC);
  817. if (manc & E1000_MANC_SMBUS_EN) {
  818. manc |= E1000_MANC_ARP_EN;
  819. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  820. }
  821. }
  822. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  823. * would have already happened in close and is redundant. */
  824. e1000_release_hw_control(adapter);
  825. unregister_netdev(netdev);
  826. #ifdef CONFIG_E1000_NAPI
  827. for (i = 0; i < adapter->num_rx_queues; i++)
  828. __dev_put(&adapter->polling_netdev[i]);
  829. #endif
  830. if (!e1000_check_phy_reset_block(&adapter->hw))
  831. e1000_phy_hw_reset(&adapter->hw);
  832. kfree(adapter->tx_ring);
  833. kfree(adapter->rx_ring);
  834. #ifdef CONFIG_E1000_NAPI
  835. kfree(adapter->polling_netdev);
  836. #endif
  837. iounmap(adapter->hw.hw_addr);
  838. pci_release_regions(pdev);
  839. free_netdev(netdev);
  840. pci_disable_device(pdev);
  841. }
  842. /**
  843. * e1000_sw_init - Initialize general software structures (struct e1000_adapter)
  844. * @adapter: board private structure to initialize
  845. *
  846. * e1000_sw_init initializes the Adapter private data structure.
  847. * Fields are initialized based on PCI device information and
  848. * OS network device settings (MTU size).
  849. **/
  850. static int __devinit
  851. e1000_sw_init(struct e1000_adapter *adapter)
  852. {
  853. struct e1000_hw *hw = &adapter->hw;
  854. struct net_device *netdev = adapter->netdev;
  855. struct pci_dev *pdev = adapter->pdev;
  856. #ifdef CONFIG_E1000_NAPI
  857. int i;
  858. #endif
  859. /* PCI config space info */
  860. hw->vendor_id = pdev->vendor;
  861. hw->device_id = pdev->device;
  862. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  863. hw->subsystem_id = pdev->subsystem_device;
  864. pci_read_config_byte(pdev, PCI_REVISION_ID, &hw->revision_id);
  865. pci_read_config_word(pdev, PCI_COMMAND, &hw->pci_cmd_word);
  866. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  867. adapter->rx_ps_bsize0 = E1000_RXBUFFER_256;
  868. hw->max_frame_size = netdev->mtu +
  869. ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  870. hw->min_frame_size = MINIMUM_ETHERNET_FRAME_SIZE;
  871. /* identify the MAC */
  872. if (e1000_set_mac_type(hw)) {
  873. DPRINTK(PROBE, ERR, "Unknown MAC Type\n");
  874. return -EIO;
  875. }
  876. /* initialize eeprom parameters */
  877. if (e1000_init_eeprom_params(hw)) {
  878. E1000_ERR("EEPROM initialization failed\n");
  879. return -EIO;
  880. }
  881. switch (hw->mac_type) {
  882. default:
  883. break;
  884. case e1000_82541:
  885. case e1000_82547:
  886. case e1000_82541_rev_2:
  887. case e1000_82547_rev_2:
  888. hw->phy_init_script = 1;
  889. break;
  890. }
  891. e1000_set_media_type(hw);
  892. hw->wait_autoneg_complete = FALSE;
  893. hw->tbi_compatibility_en = TRUE;
  894. hw->adaptive_ifs = TRUE;
  895. /* Copper options */
  896. if (hw->media_type == e1000_media_type_copper) {
  897. hw->mdix = AUTO_ALL_MODES;
  898. hw->disable_polarity_correction = FALSE;
  899. hw->master_slave = E1000_MASTER_SLAVE;
  900. }
  901. adapter->num_tx_queues = 1;
  902. adapter->num_rx_queues = 1;
  903. if (e1000_alloc_queues(adapter)) {
  904. DPRINTK(PROBE, ERR, "Unable to allocate memory for queues\n");
  905. return -ENOMEM;
  906. }
  907. #ifdef CONFIG_E1000_NAPI
  908. for (i = 0; i < adapter->num_rx_queues; i++) {
  909. adapter->polling_netdev[i].priv = adapter;
  910. adapter->polling_netdev[i].poll = &e1000_clean;
  911. adapter->polling_netdev[i].weight = 64;
  912. dev_hold(&adapter->polling_netdev[i]);
  913. set_bit(__LINK_STATE_START, &adapter->polling_netdev[i].state);
  914. }
  915. spin_lock_init(&adapter->tx_queue_lock);
  916. #endif
  917. atomic_set(&adapter->irq_sem, 1);
  918. spin_lock_init(&adapter->stats_lock);
  919. return 0;
  920. }
  921. /**
  922. * e1000_alloc_queues - Allocate memory for all rings
  923. * @adapter: board private structure to initialize
  924. *
  925. * We allocate one ring per queue at run-time since we don't know the
  926. * number of queues at compile-time. The polling_netdev array is
  927. * intended for Multiqueue, but should work fine with a single queue.
  928. **/
  929. static int __devinit
  930. e1000_alloc_queues(struct e1000_adapter *adapter)
  931. {
  932. int size;
  933. size = sizeof(struct e1000_tx_ring) * adapter->num_tx_queues;
  934. adapter->tx_ring = kmalloc(size, GFP_KERNEL);
  935. if (!adapter->tx_ring)
  936. return -ENOMEM;
  937. memset(adapter->tx_ring, 0, size);
  938. size = sizeof(struct e1000_rx_ring) * adapter->num_rx_queues;
  939. adapter->rx_ring = kmalloc(size, GFP_KERNEL);
  940. if (!adapter->rx_ring) {
  941. kfree(adapter->tx_ring);
  942. return -ENOMEM;
  943. }
  944. memset(adapter->rx_ring, 0, size);
  945. #ifdef CONFIG_E1000_NAPI
  946. size = sizeof(struct net_device) * adapter->num_rx_queues;
  947. adapter->polling_netdev = kmalloc(size, GFP_KERNEL);
  948. if (!adapter->polling_netdev) {
  949. kfree(adapter->tx_ring);
  950. kfree(adapter->rx_ring);
  951. return -ENOMEM;
  952. }
  953. memset(adapter->polling_netdev, 0, size);
  954. #endif
  955. return E1000_SUCCESS;
  956. }
  957. /**
  958. * e1000_open - Called when a network interface is made active
  959. * @netdev: network interface device structure
  960. *
  961. * Returns 0 on success, negative value on failure
  962. *
  963. * The open entry point is called when a network interface is made
  964. * active by the system (IFF_UP). At this point all resources needed
  965. * for transmit and receive operations are allocated, the interrupt
  966. * handler is registered with the OS, the watchdog timer is started,
  967. * and the stack is notified that the interface is ready.
  968. **/
  969. static int
  970. e1000_open(struct net_device *netdev)
  971. {
  972. struct e1000_adapter *adapter = netdev_priv(netdev);
  973. int err;
  974. /* allocate transmit descriptors */
  975. if ((err = e1000_setup_all_tx_resources(adapter)))
  976. goto err_setup_tx;
  977. /* allocate receive descriptors */
  978. if ((err = e1000_setup_all_rx_resources(adapter)))
  979. goto err_setup_rx;
  980. if ((err = e1000_up(adapter)))
  981. goto err_up;
  982. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  983. if ((adapter->hw.mng_cookie.status &
  984. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  985. e1000_update_mng_vlan(adapter);
  986. }
  987. /* If AMT is enabled, let the firmware know that the network
  988. * interface is now open */
  989. if (adapter->hw.mac_type == e1000_82573 &&
  990. e1000_check_mng_mode(&adapter->hw))
  991. e1000_get_hw_control(adapter);
  992. return E1000_SUCCESS;
  993. err_up:
  994. e1000_free_all_rx_resources(adapter);
  995. err_setup_rx:
  996. e1000_free_all_tx_resources(adapter);
  997. err_setup_tx:
  998. e1000_reset(adapter);
  999. return err;
  1000. }
  1001. /**
  1002. * e1000_close - Disables a network interface
  1003. * @netdev: network interface device structure
  1004. *
  1005. * Returns 0, this is not allowed to fail
  1006. *
  1007. * The close entry point is called when an interface is de-activated
  1008. * by the OS. The hardware is still under the drivers control, but
  1009. * needs to be disabled. A global MAC reset is issued to stop the
  1010. * hardware, and all transmit and receive resources are freed.
  1011. **/
  1012. static int
  1013. e1000_close(struct net_device *netdev)
  1014. {
  1015. struct e1000_adapter *adapter = netdev_priv(netdev);
  1016. e1000_down(adapter);
  1017. e1000_free_all_tx_resources(adapter);
  1018. e1000_free_all_rx_resources(adapter);
  1019. if ((adapter->hw.mng_cookie.status &
  1020. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) {
  1021. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  1022. }
  1023. /* If AMT is enabled, let the firmware know that the network
  1024. * interface is now closed */
  1025. if (adapter->hw.mac_type == e1000_82573 &&
  1026. e1000_check_mng_mode(&adapter->hw))
  1027. e1000_release_hw_control(adapter);
  1028. return 0;
  1029. }
  1030. /**
  1031. * e1000_check_64k_bound - check that memory doesn't cross 64kB boundary
  1032. * @adapter: address of board private structure
  1033. * @start: address of beginning of memory
  1034. * @len: length of memory
  1035. **/
  1036. static inline boolean_t
  1037. e1000_check_64k_bound(struct e1000_adapter *adapter,
  1038. void *start, unsigned long len)
  1039. {
  1040. unsigned long begin = (unsigned long) start;
  1041. unsigned long end = begin + len;
  1042. /* First rev 82545 and 82546 need to not allow any memory
  1043. * write location to cross 64k boundary due to errata 23 */
  1044. if (adapter->hw.mac_type == e1000_82545 ||
  1045. adapter->hw.mac_type == e1000_82546) {
  1046. return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE;
  1047. }
  1048. return TRUE;
  1049. }
  1050. /**
  1051. * e1000_setup_tx_resources - allocate Tx resources (Descriptors)
  1052. * @adapter: board private structure
  1053. * @txdr: tx descriptor ring (for a specific queue) to setup
  1054. *
  1055. * Return 0 on success, negative on failure
  1056. **/
  1057. static int
  1058. e1000_setup_tx_resources(struct e1000_adapter *adapter,
  1059. struct e1000_tx_ring *txdr)
  1060. {
  1061. struct pci_dev *pdev = adapter->pdev;
  1062. int size;
  1063. size = sizeof(struct e1000_buffer) * txdr->count;
  1064. txdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1065. if (!txdr->buffer_info) {
  1066. DPRINTK(PROBE, ERR,
  1067. "Unable to allocate memory for the transmit descriptor ring\n");
  1068. return -ENOMEM;
  1069. }
  1070. memset(txdr->buffer_info, 0, size);
  1071. /* round up to nearest 4K */
  1072. txdr->size = txdr->count * sizeof(struct e1000_tx_desc);
  1073. E1000_ROUNDUP(txdr->size, 4096);
  1074. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1075. if (!txdr->desc) {
  1076. setup_tx_desc_die:
  1077. vfree(txdr->buffer_info);
  1078. DPRINTK(PROBE, ERR,
  1079. "Unable to allocate memory for the transmit descriptor ring\n");
  1080. return -ENOMEM;
  1081. }
  1082. /* Fix for errata 23, can't cross 64kB boundary */
  1083. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1084. void *olddesc = txdr->desc;
  1085. dma_addr_t olddma = txdr->dma;
  1086. DPRINTK(TX_ERR, ERR, "txdr align check failed: %u bytes "
  1087. "at %p\n", txdr->size, txdr->desc);
  1088. /* Try again, without freeing the previous */
  1089. txdr->desc = pci_alloc_consistent(pdev, txdr->size, &txdr->dma);
  1090. /* Failed allocation, critical failure */
  1091. if (!txdr->desc) {
  1092. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1093. goto setup_tx_desc_die;
  1094. }
  1095. if (!e1000_check_64k_bound(adapter, txdr->desc, txdr->size)) {
  1096. /* give up */
  1097. pci_free_consistent(pdev, txdr->size, txdr->desc,
  1098. txdr->dma);
  1099. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1100. DPRINTK(PROBE, ERR,
  1101. "Unable to allocate aligned memory "
  1102. "for the transmit descriptor ring\n");
  1103. vfree(txdr->buffer_info);
  1104. return -ENOMEM;
  1105. } else {
  1106. /* Free old allocation, new allocation was successful */
  1107. pci_free_consistent(pdev, txdr->size, olddesc, olddma);
  1108. }
  1109. }
  1110. memset(txdr->desc, 0, txdr->size);
  1111. txdr->next_to_use = 0;
  1112. txdr->next_to_clean = 0;
  1113. spin_lock_init(&txdr->tx_lock);
  1114. return 0;
  1115. }
  1116. /**
  1117. * e1000_setup_all_tx_resources - wrapper to allocate Tx resources
  1118. * (Descriptors) for all queues
  1119. * @adapter: board private structure
  1120. *
  1121. * If this function returns with an error, then it's possible one or
  1122. * more of the rings is populated (while the rest are not). It is the
  1123. * callers duty to clean those orphaned rings.
  1124. *
  1125. * Return 0 on success, negative on failure
  1126. **/
  1127. int
  1128. e1000_setup_all_tx_resources(struct e1000_adapter *adapter)
  1129. {
  1130. int i, err = 0;
  1131. for (i = 0; i < adapter->num_tx_queues; i++) {
  1132. err = e1000_setup_tx_resources(adapter, &adapter->tx_ring[i]);
  1133. if (err) {
  1134. DPRINTK(PROBE, ERR,
  1135. "Allocation for Tx Queue %u failed\n", i);
  1136. break;
  1137. }
  1138. }
  1139. return err;
  1140. }
  1141. /**
  1142. * e1000_configure_tx - Configure 8254x Transmit Unit after Reset
  1143. * @adapter: board private structure
  1144. *
  1145. * Configure the Tx unit of the MAC after a reset.
  1146. **/
  1147. static void
  1148. e1000_configure_tx(struct e1000_adapter *adapter)
  1149. {
  1150. uint64_t tdba;
  1151. struct e1000_hw *hw = &adapter->hw;
  1152. uint32_t tdlen, tctl, tipg, tarc;
  1153. uint32_t ipgr1, ipgr2;
  1154. /* Setup the HW Tx Head and Tail descriptor pointers */
  1155. switch (adapter->num_tx_queues) {
  1156. case 1:
  1157. default:
  1158. tdba = adapter->tx_ring[0].dma;
  1159. tdlen = adapter->tx_ring[0].count *
  1160. sizeof(struct e1000_tx_desc);
  1161. E1000_WRITE_REG(hw, TDBAL, (tdba & 0x00000000ffffffffULL));
  1162. E1000_WRITE_REG(hw, TDBAH, (tdba >> 32));
  1163. E1000_WRITE_REG(hw, TDLEN, tdlen);
  1164. E1000_WRITE_REG(hw, TDH, 0);
  1165. E1000_WRITE_REG(hw, TDT, 0);
  1166. adapter->tx_ring[0].tdh = E1000_TDH;
  1167. adapter->tx_ring[0].tdt = E1000_TDT;
  1168. break;
  1169. }
  1170. /* Set the default values for the Tx Inter Packet Gap timer */
  1171. if (hw->media_type == e1000_media_type_fiber ||
  1172. hw->media_type == e1000_media_type_internal_serdes)
  1173. tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
  1174. else
  1175. tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
  1176. switch (hw->mac_type) {
  1177. case e1000_82542_rev2_0:
  1178. case e1000_82542_rev2_1:
  1179. tipg = DEFAULT_82542_TIPG_IPGT;
  1180. ipgr1 = DEFAULT_82542_TIPG_IPGR1;
  1181. ipgr2 = DEFAULT_82542_TIPG_IPGR2;
  1182. break;
  1183. default:
  1184. ipgr1 = DEFAULT_82543_TIPG_IPGR1;
  1185. ipgr2 = DEFAULT_82543_TIPG_IPGR2;
  1186. break;
  1187. }
  1188. tipg |= ipgr1 << E1000_TIPG_IPGR1_SHIFT;
  1189. tipg |= ipgr2 << E1000_TIPG_IPGR2_SHIFT;
  1190. E1000_WRITE_REG(hw, TIPG, tipg);
  1191. /* Set the Tx Interrupt Delay register */
  1192. E1000_WRITE_REG(hw, TIDV, adapter->tx_int_delay);
  1193. if (hw->mac_type >= e1000_82540)
  1194. E1000_WRITE_REG(hw, TADV, adapter->tx_abs_int_delay);
  1195. /* Program the Transmit Control Register */
  1196. tctl = E1000_READ_REG(hw, TCTL);
  1197. tctl &= ~E1000_TCTL_CT;
  1198. tctl |= E1000_TCTL_PSP | E1000_TCTL_RTLC |
  1199. (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT);
  1200. #ifdef DISABLE_MULR
  1201. /* disable Multiple Reads for debugging */
  1202. tctl &= ~E1000_TCTL_MULR;
  1203. #endif
  1204. if (hw->mac_type == e1000_82571 || hw->mac_type == e1000_82572) {
  1205. tarc = E1000_READ_REG(hw, TARC0);
  1206. tarc |= ((1 << 25) | (1 << 21));
  1207. E1000_WRITE_REG(hw, TARC0, tarc);
  1208. tarc = E1000_READ_REG(hw, TARC1);
  1209. tarc |= (1 << 25);
  1210. if (tctl & E1000_TCTL_MULR)
  1211. tarc &= ~(1 << 28);
  1212. else
  1213. tarc |= (1 << 28);
  1214. E1000_WRITE_REG(hw, TARC1, tarc);
  1215. }
  1216. e1000_config_collision_dist(hw);
  1217. /* Setup Transmit Descriptor Settings for eop descriptor */
  1218. adapter->txd_cmd = E1000_TXD_CMD_IDE | E1000_TXD_CMD_EOP |
  1219. E1000_TXD_CMD_IFCS;
  1220. if (hw->mac_type < e1000_82543)
  1221. adapter->txd_cmd |= E1000_TXD_CMD_RPS;
  1222. else
  1223. adapter->txd_cmd |= E1000_TXD_CMD_RS;
  1224. /* Cache if we're 82544 running in PCI-X because we'll
  1225. * need this to apply a workaround later in the send path. */
  1226. if (hw->mac_type == e1000_82544 &&
  1227. hw->bus_type == e1000_bus_type_pcix)
  1228. adapter->pcix_82544 = 1;
  1229. E1000_WRITE_REG(hw, TCTL, tctl);
  1230. }
  1231. /**
  1232. * e1000_setup_rx_resources - allocate Rx resources (Descriptors)
  1233. * @adapter: board private structure
  1234. * @rxdr: rx descriptor ring (for a specific queue) to setup
  1235. *
  1236. * Returns 0 on success, negative on failure
  1237. **/
  1238. static int
  1239. e1000_setup_rx_resources(struct e1000_adapter *adapter,
  1240. struct e1000_rx_ring *rxdr)
  1241. {
  1242. struct pci_dev *pdev = adapter->pdev;
  1243. int size, desc_len;
  1244. size = sizeof(struct e1000_buffer) * rxdr->count;
  1245. rxdr->buffer_info = vmalloc_node(size, pcibus_to_node(pdev->bus));
  1246. if (!rxdr->buffer_info) {
  1247. DPRINTK(PROBE, ERR,
  1248. "Unable to allocate memory for the receive descriptor ring\n");
  1249. return -ENOMEM;
  1250. }
  1251. memset(rxdr->buffer_info, 0, size);
  1252. size = sizeof(struct e1000_ps_page) * rxdr->count;
  1253. rxdr->ps_page = kmalloc(size, GFP_KERNEL);
  1254. if (!rxdr->ps_page) {
  1255. vfree(rxdr->buffer_info);
  1256. DPRINTK(PROBE, ERR,
  1257. "Unable to allocate memory for the receive descriptor ring\n");
  1258. return -ENOMEM;
  1259. }
  1260. memset(rxdr->ps_page, 0, size);
  1261. size = sizeof(struct e1000_ps_page_dma) * rxdr->count;
  1262. rxdr->ps_page_dma = kmalloc(size, GFP_KERNEL);
  1263. if (!rxdr->ps_page_dma) {
  1264. vfree(rxdr->buffer_info);
  1265. kfree(rxdr->ps_page);
  1266. DPRINTK(PROBE, ERR,
  1267. "Unable to allocate memory for the receive descriptor ring\n");
  1268. return -ENOMEM;
  1269. }
  1270. memset(rxdr->ps_page_dma, 0, size);
  1271. if (adapter->hw.mac_type <= e1000_82547_rev_2)
  1272. desc_len = sizeof(struct e1000_rx_desc);
  1273. else
  1274. desc_len = sizeof(union e1000_rx_desc_packet_split);
  1275. /* Round up to nearest 4K */
  1276. rxdr->size = rxdr->count * desc_len;
  1277. E1000_ROUNDUP(rxdr->size, 4096);
  1278. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1279. if (!rxdr->desc) {
  1280. DPRINTK(PROBE, ERR,
  1281. "Unable to allocate memory for the receive descriptor ring\n");
  1282. setup_rx_desc_die:
  1283. vfree(rxdr->buffer_info);
  1284. kfree(rxdr->ps_page);
  1285. kfree(rxdr->ps_page_dma);
  1286. return -ENOMEM;
  1287. }
  1288. /* Fix for errata 23, can't cross 64kB boundary */
  1289. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1290. void *olddesc = rxdr->desc;
  1291. dma_addr_t olddma = rxdr->dma;
  1292. DPRINTK(RX_ERR, ERR, "rxdr align check failed: %u bytes "
  1293. "at %p\n", rxdr->size, rxdr->desc);
  1294. /* Try again, without freeing the previous */
  1295. rxdr->desc = pci_alloc_consistent(pdev, rxdr->size, &rxdr->dma);
  1296. /* Failed allocation, critical failure */
  1297. if (!rxdr->desc) {
  1298. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1299. DPRINTK(PROBE, ERR,
  1300. "Unable to allocate memory "
  1301. "for the receive descriptor ring\n");
  1302. goto setup_rx_desc_die;
  1303. }
  1304. if (!e1000_check_64k_bound(adapter, rxdr->desc, rxdr->size)) {
  1305. /* give up */
  1306. pci_free_consistent(pdev, rxdr->size, rxdr->desc,
  1307. rxdr->dma);
  1308. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1309. DPRINTK(PROBE, ERR,
  1310. "Unable to allocate aligned memory "
  1311. "for the receive descriptor ring\n");
  1312. goto setup_rx_desc_die;
  1313. } else {
  1314. /* Free old allocation, new allocation was successful */
  1315. pci_free_consistent(pdev, rxdr->size, olddesc, olddma);
  1316. }
  1317. }
  1318. memset(rxdr->desc, 0, rxdr->size);
  1319. rxdr->next_to_clean = 0;
  1320. rxdr->next_to_use = 0;
  1321. return 0;
  1322. }
  1323. /**
  1324. * e1000_setup_all_rx_resources - wrapper to allocate Rx resources
  1325. * (Descriptors) for all queues
  1326. * @adapter: board private structure
  1327. *
  1328. * If this function returns with an error, then it's possible one or
  1329. * more of the rings is populated (while the rest are not). It is the
  1330. * callers duty to clean those orphaned rings.
  1331. *
  1332. * Return 0 on success, negative on failure
  1333. **/
  1334. int
  1335. e1000_setup_all_rx_resources(struct e1000_adapter *adapter)
  1336. {
  1337. int i, err = 0;
  1338. for (i = 0; i < adapter->num_rx_queues; i++) {
  1339. err = e1000_setup_rx_resources(adapter, &adapter->rx_ring[i]);
  1340. if (err) {
  1341. DPRINTK(PROBE, ERR,
  1342. "Allocation for Rx Queue %u failed\n", i);
  1343. break;
  1344. }
  1345. }
  1346. return err;
  1347. }
  1348. /**
  1349. * e1000_setup_rctl - configure the receive control registers
  1350. * @adapter: Board private structure
  1351. **/
  1352. #define PAGE_USE_COUNT(S) (((S) >> PAGE_SHIFT) + \
  1353. (((S) & (PAGE_SIZE - 1)) ? 1 : 0))
  1354. static void
  1355. e1000_setup_rctl(struct e1000_adapter *adapter)
  1356. {
  1357. uint32_t rctl, rfctl;
  1358. uint32_t psrctl = 0;
  1359. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1360. uint32_t pages = 0;
  1361. #endif
  1362. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1363. rctl &= ~(3 << E1000_RCTL_MO_SHIFT);
  1364. rctl |= E1000_RCTL_EN | E1000_RCTL_BAM |
  1365. E1000_RCTL_LBM_NO | E1000_RCTL_RDMTS_HALF |
  1366. (adapter->hw.mc_filter_type << E1000_RCTL_MO_SHIFT);
  1367. if (adapter->hw.mac_type > e1000_82543)
  1368. rctl |= E1000_RCTL_SECRC;
  1369. if (adapter->hw.tbi_compatibility_on == 1)
  1370. rctl |= E1000_RCTL_SBP;
  1371. else
  1372. rctl &= ~E1000_RCTL_SBP;
  1373. if (adapter->netdev->mtu <= ETH_DATA_LEN)
  1374. rctl &= ~E1000_RCTL_LPE;
  1375. else
  1376. rctl |= E1000_RCTL_LPE;
  1377. /* Setup buffer sizes */
  1378. if (adapter->hw.mac_type >= e1000_82571) {
  1379. /* We can now specify buffers in 1K increments.
  1380. * BSIZE and BSEX are ignored in this case. */
  1381. rctl |= adapter->rx_buffer_len << 0x11;
  1382. } else {
  1383. rctl &= ~E1000_RCTL_SZ_4096;
  1384. rctl |= E1000_RCTL_BSEX;
  1385. switch (adapter->rx_buffer_len) {
  1386. case E1000_RXBUFFER_2048:
  1387. default:
  1388. rctl |= E1000_RCTL_SZ_2048;
  1389. rctl &= ~E1000_RCTL_BSEX;
  1390. break;
  1391. case E1000_RXBUFFER_4096:
  1392. rctl |= E1000_RCTL_SZ_4096;
  1393. break;
  1394. case E1000_RXBUFFER_8192:
  1395. rctl |= E1000_RCTL_SZ_8192;
  1396. break;
  1397. case E1000_RXBUFFER_16384:
  1398. rctl |= E1000_RCTL_SZ_16384;
  1399. break;
  1400. }
  1401. }
  1402. #ifndef CONFIG_E1000_DISABLE_PACKET_SPLIT
  1403. /* 82571 and greater support packet-split where the protocol
  1404. * header is placed in skb->data and the packet data is
  1405. * placed in pages hanging off of skb_shinfo(skb)->nr_frags.
  1406. * In the case of a non-split, skb->data is linearly filled,
  1407. * followed by the page buffers. Therefore, skb->data is
  1408. * sized to hold the largest protocol header.
  1409. */
  1410. pages = PAGE_USE_COUNT(adapter->netdev->mtu);
  1411. if ((adapter->hw.mac_type > e1000_82547_rev_2) && (pages <= 3) &&
  1412. PAGE_SIZE <= 16384)
  1413. adapter->rx_ps_pages = pages;
  1414. else
  1415. adapter->rx_ps_pages = 0;
  1416. #endif
  1417. if (adapter->rx_ps_pages) {
  1418. /* Configure extra packet-split registers */
  1419. rfctl = E1000_READ_REG(&adapter->hw, RFCTL);
  1420. rfctl |= E1000_RFCTL_EXTEN;
  1421. /* disable IPv6 packet split support */
  1422. rfctl |= E1000_RFCTL_IPV6_DIS;
  1423. E1000_WRITE_REG(&adapter->hw, RFCTL, rfctl);
  1424. rctl |= E1000_RCTL_DTYP_PS | E1000_RCTL_SECRC;
  1425. psrctl |= adapter->rx_ps_bsize0 >>
  1426. E1000_PSRCTL_BSIZE0_SHIFT;
  1427. switch (adapter->rx_ps_pages) {
  1428. case 3:
  1429. psrctl |= PAGE_SIZE <<
  1430. E1000_PSRCTL_BSIZE3_SHIFT;
  1431. case 2:
  1432. psrctl |= PAGE_SIZE <<
  1433. E1000_PSRCTL_BSIZE2_SHIFT;
  1434. case 1:
  1435. psrctl |= PAGE_SIZE >>
  1436. E1000_PSRCTL_BSIZE1_SHIFT;
  1437. break;
  1438. }
  1439. E1000_WRITE_REG(&adapter->hw, PSRCTL, psrctl);
  1440. }
  1441. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1442. }
  1443. /**
  1444. * e1000_configure_rx - Configure 8254x Receive Unit after Reset
  1445. * @adapter: board private structure
  1446. *
  1447. * Configure the Rx unit of the MAC after a reset.
  1448. **/
  1449. static void
  1450. e1000_configure_rx(struct e1000_adapter *adapter)
  1451. {
  1452. uint64_t rdba;
  1453. struct e1000_hw *hw = &adapter->hw;
  1454. uint32_t rdlen, rctl, rxcsum, ctrl_ext;
  1455. if (adapter->rx_ps_pages) {
  1456. rdlen = adapter->rx_ring[0].count *
  1457. sizeof(union e1000_rx_desc_packet_split);
  1458. adapter->clean_rx = e1000_clean_rx_irq_ps;
  1459. adapter->alloc_rx_buf = e1000_alloc_rx_buffers_ps;
  1460. } else {
  1461. rdlen = adapter->rx_ring[0].count *
  1462. sizeof(struct e1000_rx_desc);
  1463. adapter->clean_rx = e1000_clean_rx_irq;
  1464. adapter->alloc_rx_buf = e1000_alloc_rx_buffers;
  1465. }
  1466. /* disable receives while setting up the descriptors */
  1467. rctl = E1000_READ_REG(hw, RCTL);
  1468. E1000_WRITE_REG(hw, RCTL, rctl & ~E1000_RCTL_EN);
  1469. /* set the Receive Delay Timer Register */
  1470. E1000_WRITE_REG(hw, RDTR, adapter->rx_int_delay);
  1471. if (hw->mac_type >= e1000_82540) {
  1472. E1000_WRITE_REG(hw, RADV, adapter->rx_abs_int_delay);
  1473. if (adapter->itr > 1)
  1474. E1000_WRITE_REG(hw, ITR,
  1475. 1000000000 / (adapter->itr * 256));
  1476. }
  1477. if (hw->mac_type >= e1000_82571) {
  1478. ctrl_ext = E1000_READ_REG(hw, CTRL_EXT);
  1479. /* Reset delay timers after every interrupt */
  1480. ctrl_ext |= E1000_CTRL_EXT_CANC;
  1481. #ifdef CONFIG_E1000_NAPI
  1482. /* Auto-Mask interrupts upon ICR read. */
  1483. ctrl_ext |= E1000_CTRL_EXT_IAME;
  1484. #endif
  1485. E1000_WRITE_REG(hw, CTRL_EXT, ctrl_ext);
  1486. E1000_WRITE_REG(hw, IAM, ~0);
  1487. E1000_WRITE_FLUSH(hw);
  1488. }
  1489. /* Setup the HW Rx Head and Tail Descriptor Pointers and
  1490. * the Base and Length of the Rx Descriptor Ring */
  1491. switch (adapter->num_rx_queues) {
  1492. case 1:
  1493. default:
  1494. rdba = adapter->rx_ring[0].dma;
  1495. E1000_WRITE_REG(hw, RDBAL, (rdba & 0x00000000ffffffffULL));
  1496. E1000_WRITE_REG(hw, RDBAH, (rdba >> 32));
  1497. E1000_WRITE_REG(hw, RDLEN, rdlen);
  1498. E1000_WRITE_REG(hw, RDH, 0);
  1499. E1000_WRITE_REG(hw, RDT, 0);
  1500. adapter->rx_ring[0].rdh = E1000_RDH;
  1501. adapter->rx_ring[0].rdt = E1000_RDT;
  1502. break;
  1503. }
  1504. /* Enable 82543 Receive Checksum Offload for TCP and UDP */
  1505. if (hw->mac_type >= e1000_82543) {
  1506. rxcsum = E1000_READ_REG(hw, RXCSUM);
  1507. if (adapter->rx_csum == TRUE) {
  1508. rxcsum |= E1000_RXCSUM_TUOFL;
  1509. /* Enable 82571 IPv4 payload checksum for UDP fragments
  1510. * Must be used in conjunction with packet-split. */
  1511. if ((hw->mac_type >= e1000_82571) &&
  1512. (adapter->rx_ps_pages)) {
  1513. rxcsum |= E1000_RXCSUM_IPPCSE;
  1514. }
  1515. } else {
  1516. rxcsum &= ~E1000_RXCSUM_TUOFL;
  1517. /* don't need to clear IPPCSE as it defaults to 0 */
  1518. }
  1519. E1000_WRITE_REG(hw, RXCSUM, rxcsum);
  1520. }
  1521. if (hw->mac_type == e1000_82573)
  1522. E1000_WRITE_REG(hw, ERT, 0x0100);
  1523. /* Enable Receives */
  1524. E1000_WRITE_REG(hw, RCTL, rctl);
  1525. }
  1526. /**
  1527. * e1000_free_tx_resources - Free Tx Resources per Queue
  1528. * @adapter: board private structure
  1529. * @tx_ring: Tx descriptor ring for a specific queue
  1530. *
  1531. * Free all transmit software resources
  1532. **/
  1533. static void
  1534. e1000_free_tx_resources(struct e1000_adapter *adapter,
  1535. struct e1000_tx_ring *tx_ring)
  1536. {
  1537. struct pci_dev *pdev = adapter->pdev;
  1538. e1000_clean_tx_ring(adapter, tx_ring);
  1539. vfree(tx_ring->buffer_info);
  1540. tx_ring->buffer_info = NULL;
  1541. pci_free_consistent(pdev, tx_ring->size, tx_ring->desc, tx_ring->dma);
  1542. tx_ring->desc = NULL;
  1543. }
  1544. /**
  1545. * e1000_free_all_tx_resources - Free Tx Resources for All Queues
  1546. * @adapter: board private structure
  1547. *
  1548. * Free all transmit software resources
  1549. **/
  1550. void
  1551. e1000_free_all_tx_resources(struct e1000_adapter *adapter)
  1552. {
  1553. int i;
  1554. for (i = 0; i < adapter->num_tx_queues; i++)
  1555. e1000_free_tx_resources(adapter, &adapter->tx_ring[i]);
  1556. }
  1557. static inline void
  1558. e1000_unmap_and_free_tx_resource(struct e1000_adapter *adapter,
  1559. struct e1000_buffer *buffer_info)
  1560. {
  1561. if (buffer_info->dma) {
  1562. pci_unmap_page(adapter->pdev,
  1563. buffer_info->dma,
  1564. buffer_info->length,
  1565. PCI_DMA_TODEVICE);
  1566. }
  1567. if (buffer_info->skb)
  1568. dev_kfree_skb_any(buffer_info->skb);
  1569. memset(buffer_info, 0, sizeof(struct e1000_buffer));
  1570. }
  1571. /**
  1572. * e1000_clean_tx_ring - Free Tx Buffers
  1573. * @adapter: board private structure
  1574. * @tx_ring: ring to be cleaned
  1575. **/
  1576. static void
  1577. e1000_clean_tx_ring(struct e1000_adapter *adapter,
  1578. struct e1000_tx_ring *tx_ring)
  1579. {
  1580. struct e1000_buffer *buffer_info;
  1581. unsigned long size;
  1582. unsigned int i;
  1583. /* Free all the Tx ring sk_buffs */
  1584. for (i = 0; i < tx_ring->count; i++) {
  1585. buffer_info = &tx_ring->buffer_info[i];
  1586. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  1587. }
  1588. size = sizeof(struct e1000_buffer) * tx_ring->count;
  1589. memset(tx_ring->buffer_info, 0, size);
  1590. /* Zero out the descriptor ring */
  1591. memset(tx_ring->desc, 0, tx_ring->size);
  1592. tx_ring->next_to_use = 0;
  1593. tx_ring->next_to_clean = 0;
  1594. tx_ring->last_tx_tso = 0;
  1595. writel(0, adapter->hw.hw_addr + tx_ring->tdh);
  1596. writel(0, adapter->hw.hw_addr + tx_ring->tdt);
  1597. }
  1598. /**
  1599. * e1000_clean_all_tx_rings - Free Tx Buffers for all queues
  1600. * @adapter: board private structure
  1601. **/
  1602. static void
  1603. e1000_clean_all_tx_rings(struct e1000_adapter *adapter)
  1604. {
  1605. int i;
  1606. for (i = 0; i < adapter->num_tx_queues; i++)
  1607. e1000_clean_tx_ring(adapter, &adapter->tx_ring[i]);
  1608. }
  1609. /**
  1610. * e1000_free_rx_resources - Free Rx Resources
  1611. * @adapter: board private structure
  1612. * @rx_ring: ring to clean the resources from
  1613. *
  1614. * Free all receive software resources
  1615. **/
  1616. static void
  1617. e1000_free_rx_resources(struct e1000_adapter *adapter,
  1618. struct e1000_rx_ring *rx_ring)
  1619. {
  1620. struct pci_dev *pdev = adapter->pdev;
  1621. e1000_clean_rx_ring(adapter, rx_ring);
  1622. vfree(rx_ring->buffer_info);
  1623. rx_ring->buffer_info = NULL;
  1624. kfree(rx_ring->ps_page);
  1625. rx_ring->ps_page = NULL;
  1626. kfree(rx_ring->ps_page_dma);
  1627. rx_ring->ps_page_dma = NULL;
  1628. pci_free_consistent(pdev, rx_ring->size, rx_ring->desc, rx_ring->dma);
  1629. rx_ring->desc = NULL;
  1630. }
  1631. /**
  1632. * e1000_free_all_rx_resources - Free Rx Resources for All Queues
  1633. * @adapter: board private structure
  1634. *
  1635. * Free all receive software resources
  1636. **/
  1637. void
  1638. e1000_free_all_rx_resources(struct e1000_adapter *adapter)
  1639. {
  1640. int i;
  1641. for (i = 0; i < adapter->num_rx_queues; i++)
  1642. e1000_free_rx_resources(adapter, &adapter->rx_ring[i]);
  1643. }
  1644. /**
  1645. * e1000_clean_rx_ring - Free Rx Buffers per Queue
  1646. * @adapter: board private structure
  1647. * @rx_ring: ring to free buffers from
  1648. **/
  1649. static void
  1650. e1000_clean_rx_ring(struct e1000_adapter *adapter,
  1651. struct e1000_rx_ring *rx_ring)
  1652. {
  1653. struct e1000_buffer *buffer_info;
  1654. struct e1000_ps_page *ps_page;
  1655. struct e1000_ps_page_dma *ps_page_dma;
  1656. struct pci_dev *pdev = adapter->pdev;
  1657. unsigned long size;
  1658. unsigned int i, j;
  1659. /* Free all the Rx ring sk_buffs */
  1660. for (i = 0; i < rx_ring->count; i++) {
  1661. buffer_info = &rx_ring->buffer_info[i];
  1662. if (buffer_info->skb) {
  1663. pci_unmap_single(pdev,
  1664. buffer_info->dma,
  1665. buffer_info->length,
  1666. PCI_DMA_FROMDEVICE);
  1667. dev_kfree_skb(buffer_info->skb);
  1668. buffer_info->skb = NULL;
  1669. }
  1670. ps_page = &rx_ring->ps_page[i];
  1671. ps_page_dma = &rx_ring->ps_page_dma[i];
  1672. for (j = 0; j < adapter->rx_ps_pages; j++) {
  1673. if (!ps_page->ps_page[j]) break;
  1674. pci_unmap_page(pdev,
  1675. ps_page_dma->ps_page_dma[j],
  1676. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  1677. ps_page_dma->ps_page_dma[j] = 0;
  1678. put_page(ps_page->ps_page[j]);
  1679. ps_page->ps_page[j] = NULL;
  1680. }
  1681. }
  1682. size = sizeof(struct e1000_buffer) * rx_ring->count;
  1683. memset(rx_ring->buffer_info, 0, size);
  1684. size = sizeof(struct e1000_ps_page) * rx_ring->count;
  1685. memset(rx_ring->ps_page, 0, size);
  1686. size = sizeof(struct e1000_ps_page_dma) * rx_ring->count;
  1687. memset(rx_ring->ps_page_dma, 0, size);
  1688. /* Zero out the descriptor ring */
  1689. memset(rx_ring->desc, 0, rx_ring->size);
  1690. rx_ring->next_to_clean = 0;
  1691. rx_ring->next_to_use = 0;
  1692. writel(0, adapter->hw.hw_addr + rx_ring->rdh);
  1693. writel(0, adapter->hw.hw_addr + rx_ring->rdt);
  1694. }
  1695. /**
  1696. * e1000_clean_all_rx_rings - Free Rx Buffers for all queues
  1697. * @adapter: board private structure
  1698. **/
  1699. static void
  1700. e1000_clean_all_rx_rings(struct e1000_adapter *adapter)
  1701. {
  1702. int i;
  1703. for (i = 0; i < adapter->num_rx_queues; i++)
  1704. e1000_clean_rx_ring(adapter, &adapter->rx_ring[i]);
  1705. }
  1706. /* The 82542 2.0 (revision 2) needs to have the receive unit in reset
  1707. * and memory write and invalidate disabled for certain operations
  1708. */
  1709. static void
  1710. e1000_enter_82542_rst(struct e1000_adapter *adapter)
  1711. {
  1712. struct net_device *netdev = adapter->netdev;
  1713. uint32_t rctl;
  1714. e1000_pci_clear_mwi(&adapter->hw);
  1715. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1716. rctl |= E1000_RCTL_RST;
  1717. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1718. E1000_WRITE_FLUSH(&adapter->hw);
  1719. mdelay(5);
  1720. if (netif_running(netdev))
  1721. e1000_clean_all_rx_rings(adapter);
  1722. }
  1723. static void
  1724. e1000_leave_82542_rst(struct e1000_adapter *adapter)
  1725. {
  1726. struct net_device *netdev = adapter->netdev;
  1727. uint32_t rctl;
  1728. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  1729. rctl &= ~E1000_RCTL_RST;
  1730. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  1731. E1000_WRITE_FLUSH(&adapter->hw);
  1732. mdelay(5);
  1733. if (adapter->hw.pci_cmd_word & PCI_COMMAND_INVALIDATE)
  1734. e1000_pci_set_mwi(&adapter->hw);
  1735. if (netif_running(netdev)) {
  1736. /* No need to loop, because 82542 supports only 1 queue */
  1737. struct e1000_rx_ring *ring = &adapter->rx_ring[0];
  1738. e1000_configure_rx(adapter);
  1739. adapter->alloc_rx_buf(adapter, ring, E1000_DESC_UNUSED(ring));
  1740. }
  1741. }
  1742. /**
  1743. * e1000_set_mac - Change the Ethernet Address of the NIC
  1744. * @netdev: network interface device structure
  1745. * @p: pointer to an address structure
  1746. *
  1747. * Returns 0 on success, negative on failure
  1748. **/
  1749. static int
  1750. e1000_set_mac(struct net_device *netdev, void *p)
  1751. {
  1752. struct e1000_adapter *adapter = netdev_priv(netdev);
  1753. struct sockaddr *addr = p;
  1754. if (!is_valid_ether_addr(addr->sa_data))
  1755. return -EADDRNOTAVAIL;
  1756. /* 82542 2.0 needs to be in reset to write receive address registers */
  1757. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1758. e1000_enter_82542_rst(adapter);
  1759. memcpy(netdev->dev_addr, addr->sa_data, netdev->addr_len);
  1760. memcpy(adapter->hw.mac_addr, addr->sa_data, netdev->addr_len);
  1761. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  1762. /* With 82571 controllers, LAA may be overwritten (with the default)
  1763. * due to controller reset from the other port. */
  1764. if (adapter->hw.mac_type == e1000_82571) {
  1765. /* activate the work around */
  1766. adapter->hw.laa_is_present = 1;
  1767. /* Hold a copy of the LAA in RAR[14] This is done so that
  1768. * between the time RAR[0] gets clobbered and the time it
  1769. * gets fixed (in e1000_watchdog), the actual LAA is in one
  1770. * of the RARs and no incoming packets directed to this port
  1771. * are dropped. Eventaully the LAA will be in RAR[0] and
  1772. * RAR[14] */
  1773. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr,
  1774. E1000_RAR_ENTRIES - 1);
  1775. }
  1776. if (adapter->hw.mac_type == e1000_82542_rev2_0)
  1777. e1000_leave_82542_rst(adapter);
  1778. return 0;
  1779. }
  1780. /**
  1781. * e1000_set_multi - Multicast and Promiscuous mode set
  1782. * @netdev: network interface device structure
  1783. *
  1784. * The set_multi entry point is called whenever the multicast address
  1785. * list or the network interface flags are updated. This routine is
  1786. * responsible for configuring the hardware for proper multicast,
  1787. * promiscuous mode, and all-multi behavior.
  1788. **/
  1789. static void
  1790. e1000_set_multi(struct net_device *netdev)
  1791. {
  1792. struct e1000_adapter *adapter = netdev_priv(netdev);
  1793. struct e1000_hw *hw = &adapter->hw;
  1794. struct dev_mc_list *mc_ptr;
  1795. uint32_t rctl;
  1796. uint32_t hash_value;
  1797. int i, rar_entries = E1000_RAR_ENTRIES;
  1798. /* reserve RAR[14] for LAA over-write work-around */
  1799. if (adapter->hw.mac_type == e1000_82571)
  1800. rar_entries--;
  1801. /* Check for Promiscuous and All Multicast modes */
  1802. rctl = E1000_READ_REG(hw, RCTL);
  1803. if (netdev->flags & IFF_PROMISC) {
  1804. rctl |= (E1000_RCTL_UPE | E1000_RCTL_MPE);
  1805. } else if (netdev->flags & IFF_ALLMULTI) {
  1806. rctl |= E1000_RCTL_MPE;
  1807. rctl &= ~E1000_RCTL_UPE;
  1808. } else {
  1809. rctl &= ~(E1000_RCTL_UPE | E1000_RCTL_MPE);
  1810. }
  1811. E1000_WRITE_REG(hw, RCTL, rctl);
  1812. /* 82542 2.0 needs to be in reset to write receive address registers */
  1813. if (hw->mac_type == e1000_82542_rev2_0)
  1814. e1000_enter_82542_rst(adapter);
  1815. /* load the first 14 multicast address into the exact filters 1-14
  1816. * RAR 0 is used for the station MAC adddress
  1817. * if there are not 14 addresses, go ahead and clear the filters
  1818. * -- with 82571 controllers only 0-13 entries are filled here
  1819. */
  1820. mc_ptr = netdev->mc_list;
  1821. for (i = 1; i < rar_entries; i++) {
  1822. if (mc_ptr) {
  1823. e1000_rar_set(hw, mc_ptr->dmi_addr, i);
  1824. mc_ptr = mc_ptr->next;
  1825. } else {
  1826. E1000_WRITE_REG_ARRAY(hw, RA, i << 1, 0);
  1827. E1000_WRITE_REG_ARRAY(hw, RA, (i << 1) + 1, 0);
  1828. }
  1829. }
  1830. /* clear the old settings from the multicast hash table */
  1831. for (i = 0; i < E1000_NUM_MTA_REGISTERS; i++)
  1832. E1000_WRITE_REG_ARRAY(hw, MTA, i, 0);
  1833. /* load any remaining addresses into the hash table */
  1834. for (; mc_ptr; mc_ptr = mc_ptr->next) {
  1835. hash_value = e1000_hash_mc_addr(hw, mc_ptr->dmi_addr);
  1836. e1000_mta_set(hw, hash_value);
  1837. }
  1838. if (hw->mac_type == e1000_82542_rev2_0)
  1839. e1000_leave_82542_rst(adapter);
  1840. }
  1841. /* Need to wait a few seconds after link up to get diagnostic information from
  1842. * the phy */
  1843. static void
  1844. e1000_update_phy_info(unsigned long data)
  1845. {
  1846. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1847. e1000_phy_get_info(&adapter->hw, &adapter->phy_info);
  1848. }
  1849. /**
  1850. * e1000_82547_tx_fifo_stall - Timer Call-back
  1851. * @data: pointer to adapter cast into an unsigned long
  1852. **/
  1853. static void
  1854. e1000_82547_tx_fifo_stall(unsigned long data)
  1855. {
  1856. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1857. struct net_device *netdev = adapter->netdev;
  1858. uint32_t tctl;
  1859. if (atomic_read(&adapter->tx_fifo_stall)) {
  1860. if ((E1000_READ_REG(&adapter->hw, TDT) ==
  1861. E1000_READ_REG(&adapter->hw, TDH)) &&
  1862. (E1000_READ_REG(&adapter->hw, TDFT) ==
  1863. E1000_READ_REG(&adapter->hw, TDFH)) &&
  1864. (E1000_READ_REG(&adapter->hw, TDFTS) ==
  1865. E1000_READ_REG(&adapter->hw, TDFHS))) {
  1866. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1867. E1000_WRITE_REG(&adapter->hw, TCTL,
  1868. tctl & ~E1000_TCTL_EN);
  1869. E1000_WRITE_REG(&adapter->hw, TDFT,
  1870. adapter->tx_head_addr);
  1871. E1000_WRITE_REG(&adapter->hw, TDFH,
  1872. adapter->tx_head_addr);
  1873. E1000_WRITE_REG(&adapter->hw, TDFTS,
  1874. adapter->tx_head_addr);
  1875. E1000_WRITE_REG(&adapter->hw, TDFHS,
  1876. adapter->tx_head_addr);
  1877. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1878. E1000_WRITE_FLUSH(&adapter->hw);
  1879. adapter->tx_fifo_head = 0;
  1880. atomic_set(&adapter->tx_fifo_stall, 0);
  1881. netif_wake_queue(netdev);
  1882. } else {
  1883. mod_timer(&adapter->tx_fifo_stall_timer, jiffies + 1);
  1884. }
  1885. }
  1886. }
  1887. /**
  1888. * e1000_watchdog - Timer Call-back
  1889. * @data: pointer to adapter cast into an unsigned long
  1890. **/
  1891. static void
  1892. e1000_watchdog(unsigned long data)
  1893. {
  1894. struct e1000_adapter *adapter = (struct e1000_adapter *) data;
  1895. /* Do the rest outside of interrupt context */
  1896. schedule_work(&adapter->watchdog_task);
  1897. }
  1898. static void
  1899. e1000_watchdog_task(struct e1000_adapter *adapter)
  1900. {
  1901. struct net_device *netdev = adapter->netdev;
  1902. struct e1000_tx_ring *txdr = adapter->tx_ring;
  1903. uint32_t link, tctl;
  1904. e1000_check_for_link(&adapter->hw);
  1905. if (adapter->hw.mac_type == e1000_82573) {
  1906. e1000_enable_tx_pkt_filtering(&adapter->hw);
  1907. if (adapter->mng_vlan_id != adapter->hw.mng_cookie.vlan_id)
  1908. e1000_update_mng_vlan(adapter);
  1909. }
  1910. if ((adapter->hw.media_type == e1000_media_type_internal_serdes) &&
  1911. !(E1000_READ_REG(&adapter->hw, TXCW) & E1000_TXCW_ANE))
  1912. link = !adapter->hw.serdes_link_down;
  1913. else
  1914. link = E1000_READ_REG(&adapter->hw, STATUS) & E1000_STATUS_LU;
  1915. if (link) {
  1916. if (!netif_carrier_ok(netdev)) {
  1917. e1000_get_speed_and_duplex(&adapter->hw,
  1918. &adapter->link_speed,
  1919. &adapter->link_duplex);
  1920. DPRINTK(LINK, INFO, "NIC Link is Up %d Mbps %s\n",
  1921. adapter->link_speed,
  1922. adapter->link_duplex == FULL_DUPLEX ?
  1923. "Full Duplex" : "Half Duplex");
  1924. /* tweak tx_queue_len according to speed/duplex
  1925. * and adjust the timeout factor */
  1926. netdev->tx_queue_len = adapter->tx_queue_len;
  1927. adapter->tx_timeout_factor = 1;
  1928. adapter->txb2b = 1;
  1929. switch (adapter->link_speed) {
  1930. case SPEED_10:
  1931. adapter->txb2b = 0;
  1932. netdev->tx_queue_len = 10;
  1933. adapter->tx_timeout_factor = 8;
  1934. break;
  1935. case SPEED_100:
  1936. adapter->txb2b = 0;
  1937. netdev->tx_queue_len = 100;
  1938. /* maybe add some timeout factor ? */
  1939. break;
  1940. }
  1941. if ((adapter->hw.mac_type == e1000_82571 ||
  1942. adapter->hw.mac_type == e1000_82572) &&
  1943. adapter->txb2b == 0) {
  1944. #define SPEED_MODE_BIT (1 << 21)
  1945. uint32_t tarc0;
  1946. tarc0 = E1000_READ_REG(&adapter->hw, TARC0);
  1947. tarc0 &= ~SPEED_MODE_BIT;
  1948. E1000_WRITE_REG(&adapter->hw, TARC0, tarc0);
  1949. }
  1950. #ifdef NETIF_F_TSO
  1951. /* disable TSO for pcie and 10/100 speeds, to avoid
  1952. * some hardware issues */
  1953. if (!adapter->tso_force &&
  1954. adapter->hw.bus_type == e1000_bus_type_pci_express){
  1955. switch (adapter->link_speed) {
  1956. case SPEED_10:
  1957. case SPEED_100:
  1958. DPRINTK(PROBE,INFO,
  1959. "10/100 speed: disabling TSO\n");
  1960. netdev->features &= ~NETIF_F_TSO;
  1961. break;
  1962. case SPEED_1000:
  1963. netdev->features |= NETIF_F_TSO;
  1964. break;
  1965. default:
  1966. /* oops */
  1967. break;
  1968. }
  1969. }
  1970. #endif
  1971. /* enable transmits in the hardware, need to do this
  1972. * after setting TARC0 */
  1973. tctl = E1000_READ_REG(&adapter->hw, TCTL);
  1974. tctl |= E1000_TCTL_EN;
  1975. E1000_WRITE_REG(&adapter->hw, TCTL, tctl);
  1976. netif_carrier_on(netdev);
  1977. netif_wake_queue(netdev);
  1978. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1979. adapter->smartspeed = 0;
  1980. }
  1981. } else {
  1982. if (netif_carrier_ok(netdev)) {
  1983. adapter->link_speed = 0;
  1984. adapter->link_duplex = 0;
  1985. DPRINTK(LINK, INFO, "NIC Link is Down\n");
  1986. netif_carrier_off(netdev);
  1987. netif_stop_queue(netdev);
  1988. mod_timer(&adapter->phy_info_timer, jiffies + 2 * HZ);
  1989. }
  1990. e1000_smartspeed(adapter);
  1991. }
  1992. e1000_update_stats(adapter);
  1993. adapter->hw.tx_packet_delta = adapter->stats.tpt - adapter->tpt_old;
  1994. adapter->tpt_old = adapter->stats.tpt;
  1995. adapter->hw.collision_delta = adapter->stats.colc - adapter->colc_old;
  1996. adapter->colc_old = adapter->stats.colc;
  1997. adapter->gorcl = adapter->stats.gorcl - adapter->gorcl_old;
  1998. adapter->gorcl_old = adapter->stats.gorcl;
  1999. adapter->gotcl = adapter->stats.gotcl - adapter->gotcl_old;
  2000. adapter->gotcl_old = adapter->stats.gotcl;
  2001. e1000_update_adaptive(&adapter->hw);
  2002. if (!netif_carrier_ok(netdev)) {
  2003. if (E1000_DESC_UNUSED(txdr) + 1 < txdr->count) {
  2004. /* We've lost link, so the controller stops DMA,
  2005. * but we've got queued Tx work that's never going
  2006. * to get done, so reset controller to flush Tx.
  2007. * (Do the reset outside of interrupt context). */
  2008. schedule_work(&adapter->tx_timeout_task);
  2009. }
  2010. }
  2011. /* Dynamic mode for Interrupt Throttle Rate (ITR) */
  2012. if (adapter->hw.mac_type >= e1000_82540 && adapter->itr == 1) {
  2013. /* Symmetric Tx/Rx gets a reduced ITR=2000; Total
  2014. * asymmetrical Tx or Rx gets ITR=8000; everyone
  2015. * else is between 2000-8000. */
  2016. uint32_t goc = (adapter->gotcl + adapter->gorcl) / 10000;
  2017. uint32_t dif = (adapter->gotcl > adapter->gorcl ?
  2018. adapter->gotcl - adapter->gorcl :
  2019. adapter->gorcl - adapter->gotcl) / 10000;
  2020. uint32_t itr = goc > 0 ? (dif * 6000 / goc + 2000) : 8000;
  2021. E1000_WRITE_REG(&adapter->hw, ITR, 1000000000 / (itr * 256));
  2022. }
  2023. /* Cause software interrupt to ensure rx ring is cleaned */
  2024. E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0);
  2025. /* Force detection of hung controller every watchdog period */
  2026. adapter->detect_tx_hung = TRUE;
  2027. /* With 82571 controllers, LAA may be overwritten due to controller
  2028. * reset from the other port. Set the appropriate LAA in RAR[0] */
  2029. if (adapter->hw.mac_type == e1000_82571 && adapter->hw.laa_is_present)
  2030. e1000_rar_set(&adapter->hw, adapter->hw.mac_addr, 0);
  2031. /* Reset the timer */
  2032. mod_timer(&adapter->watchdog_timer, jiffies + 2 * HZ);
  2033. }
  2034. #define E1000_TX_FLAGS_CSUM 0x00000001
  2035. #define E1000_TX_FLAGS_VLAN 0x00000002
  2036. #define E1000_TX_FLAGS_TSO 0x00000004
  2037. #define E1000_TX_FLAGS_IPV4 0x00000008
  2038. #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
  2039. #define E1000_TX_FLAGS_VLAN_SHIFT 16
  2040. static inline int
  2041. e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2042. struct sk_buff *skb)
  2043. {
  2044. #ifdef NETIF_F_TSO
  2045. struct e1000_context_desc *context_desc;
  2046. struct e1000_buffer *buffer_info;
  2047. unsigned int i;
  2048. uint32_t cmd_length = 0;
  2049. uint16_t ipcse = 0, tucse, mss;
  2050. uint8_t ipcss, ipcso, tucss, tucso, hdr_len;
  2051. int err;
  2052. if (skb_shinfo(skb)->tso_size) {
  2053. if (skb_header_cloned(skb)) {
  2054. err = pskb_expand_head(skb, 0, 0, GFP_ATOMIC);
  2055. if (err)
  2056. return err;
  2057. }
  2058. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2059. mss = skb_shinfo(skb)->tso_size;
  2060. if (skb->protocol == ntohs(ETH_P_IP)) {
  2061. skb->nh.iph->tot_len = 0;
  2062. skb->nh.iph->check = 0;
  2063. skb->h.th->check =
  2064. ~csum_tcpudp_magic(skb->nh.iph->saddr,
  2065. skb->nh.iph->daddr,
  2066. 0,
  2067. IPPROTO_TCP,
  2068. 0);
  2069. cmd_length = E1000_TXD_CMD_IP;
  2070. ipcse = skb->h.raw - skb->data - 1;
  2071. #ifdef NETIF_F_TSO_IPV6
  2072. } else if (skb->protocol == ntohs(ETH_P_IPV6)) {
  2073. skb->nh.ipv6h->payload_len = 0;
  2074. skb->h.th->check =
  2075. ~csum_ipv6_magic(&skb->nh.ipv6h->saddr,
  2076. &skb->nh.ipv6h->daddr,
  2077. 0,
  2078. IPPROTO_TCP,
  2079. 0);
  2080. ipcse = 0;
  2081. #endif
  2082. }
  2083. ipcss = skb->nh.raw - skb->data;
  2084. ipcso = (void *)&(skb->nh.iph->check) - (void *)skb->data;
  2085. tucss = skb->h.raw - skb->data;
  2086. tucso = (void *)&(skb->h.th->check) - (void *)skb->data;
  2087. tucse = 0;
  2088. cmd_length |= (E1000_TXD_CMD_DEXT | E1000_TXD_CMD_TSE |
  2089. E1000_TXD_CMD_TCP | (skb->len - (hdr_len)));
  2090. i = tx_ring->next_to_use;
  2091. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2092. buffer_info = &tx_ring->buffer_info[i];
  2093. context_desc->lower_setup.ip_fields.ipcss = ipcss;
  2094. context_desc->lower_setup.ip_fields.ipcso = ipcso;
  2095. context_desc->lower_setup.ip_fields.ipcse = cpu_to_le16(ipcse);
  2096. context_desc->upper_setup.tcp_fields.tucss = tucss;
  2097. context_desc->upper_setup.tcp_fields.tucso = tucso;
  2098. context_desc->upper_setup.tcp_fields.tucse = cpu_to_le16(tucse);
  2099. context_desc->tcp_seg_setup.fields.mss = cpu_to_le16(mss);
  2100. context_desc->tcp_seg_setup.fields.hdr_len = hdr_len;
  2101. context_desc->cmd_and_length = cpu_to_le32(cmd_length);
  2102. buffer_info->time_stamp = jiffies;
  2103. if (++i == tx_ring->count) i = 0;
  2104. tx_ring->next_to_use = i;
  2105. return TRUE;
  2106. }
  2107. #endif
  2108. return FALSE;
  2109. }
  2110. static inline boolean_t
  2111. e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2112. struct sk_buff *skb)
  2113. {
  2114. struct e1000_context_desc *context_desc;
  2115. struct e1000_buffer *buffer_info;
  2116. unsigned int i;
  2117. uint8_t css;
  2118. if (likely(skb->ip_summed == CHECKSUM_HW)) {
  2119. css = skb->h.raw - skb->data;
  2120. i = tx_ring->next_to_use;
  2121. buffer_info = &tx_ring->buffer_info[i];
  2122. context_desc = E1000_CONTEXT_DESC(*tx_ring, i);
  2123. context_desc->upper_setup.tcp_fields.tucss = css;
  2124. context_desc->upper_setup.tcp_fields.tucso = css + skb->csum;
  2125. context_desc->upper_setup.tcp_fields.tucse = 0;
  2126. context_desc->tcp_seg_setup.data = 0;
  2127. context_desc->cmd_and_length = cpu_to_le32(E1000_TXD_CMD_DEXT);
  2128. buffer_info->time_stamp = jiffies;
  2129. if (unlikely(++i == tx_ring->count)) i = 0;
  2130. tx_ring->next_to_use = i;
  2131. return TRUE;
  2132. }
  2133. return FALSE;
  2134. }
  2135. #define E1000_MAX_TXD_PWR 12
  2136. #define E1000_MAX_DATA_PER_TXD (1<<E1000_MAX_TXD_PWR)
  2137. static inline int
  2138. e1000_tx_map(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2139. struct sk_buff *skb, unsigned int first, unsigned int max_per_txd,
  2140. unsigned int nr_frags, unsigned int mss)
  2141. {
  2142. struct e1000_buffer *buffer_info;
  2143. unsigned int len = skb->len;
  2144. unsigned int offset = 0, size, count = 0, i;
  2145. unsigned int f;
  2146. len -= skb->data_len;
  2147. i = tx_ring->next_to_use;
  2148. while (len) {
  2149. buffer_info = &tx_ring->buffer_info[i];
  2150. size = min(len, max_per_txd);
  2151. #ifdef NETIF_F_TSO
  2152. /* Workaround for Controller erratum --
  2153. * descriptor for non-tso packet in a linear SKB that follows a
  2154. * tso gets written back prematurely before the data is fully
  2155. * DMAd to the controller */
  2156. if (!skb->data_len && tx_ring->last_tx_tso &&
  2157. !skb_shinfo(skb)->tso_size) {
  2158. tx_ring->last_tx_tso = 0;
  2159. size -= 4;
  2160. }
  2161. /* Workaround for premature desc write-backs
  2162. * in TSO mode. Append 4-byte sentinel desc */
  2163. if (unlikely(mss && !nr_frags && size == len && size > 8))
  2164. size -= 4;
  2165. #endif
  2166. /* work-around for errata 10 and it applies
  2167. * to all controllers in PCI-X mode
  2168. * The fix is to make sure that the first descriptor of a
  2169. * packet is smaller than 2048 - 16 - 16 (or 2016) bytes
  2170. */
  2171. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2172. (size > 2015) && count == 0))
  2173. size = 2015;
  2174. /* Workaround for potential 82544 hang in PCI-X. Avoid
  2175. * terminating buffers within evenly-aligned dwords. */
  2176. if (unlikely(adapter->pcix_82544 &&
  2177. !((unsigned long)(skb->data + offset + size - 1) & 4) &&
  2178. size > 4))
  2179. size -= 4;
  2180. buffer_info->length = size;
  2181. buffer_info->dma =
  2182. pci_map_single(adapter->pdev,
  2183. skb->data + offset,
  2184. size,
  2185. PCI_DMA_TODEVICE);
  2186. buffer_info->time_stamp = jiffies;
  2187. len -= size;
  2188. offset += size;
  2189. count++;
  2190. if (unlikely(++i == tx_ring->count)) i = 0;
  2191. }
  2192. for (f = 0; f < nr_frags; f++) {
  2193. struct skb_frag_struct *frag;
  2194. frag = &skb_shinfo(skb)->frags[f];
  2195. len = frag->size;
  2196. offset = frag->page_offset;
  2197. while (len) {
  2198. buffer_info = &tx_ring->buffer_info[i];
  2199. size = min(len, max_per_txd);
  2200. #ifdef NETIF_F_TSO
  2201. /* Workaround for premature desc write-backs
  2202. * in TSO mode. Append 4-byte sentinel desc */
  2203. if (unlikely(mss && f == (nr_frags-1) && size == len && size > 8))
  2204. size -= 4;
  2205. #endif
  2206. /* Workaround for potential 82544 hang in PCI-X.
  2207. * Avoid terminating buffers within evenly-aligned
  2208. * dwords. */
  2209. if (unlikely(adapter->pcix_82544 &&
  2210. !((unsigned long)(frag->page+offset+size-1) & 4) &&
  2211. size > 4))
  2212. size -= 4;
  2213. buffer_info->length = size;
  2214. buffer_info->dma =
  2215. pci_map_page(adapter->pdev,
  2216. frag->page,
  2217. offset,
  2218. size,
  2219. PCI_DMA_TODEVICE);
  2220. buffer_info->time_stamp = jiffies;
  2221. len -= size;
  2222. offset += size;
  2223. count++;
  2224. if (unlikely(++i == tx_ring->count)) i = 0;
  2225. }
  2226. }
  2227. i = (i == 0) ? tx_ring->count - 1 : i - 1;
  2228. tx_ring->buffer_info[i].skb = skb;
  2229. tx_ring->buffer_info[first].next_to_watch = i;
  2230. return count;
  2231. }
  2232. static inline void
  2233. e1000_tx_queue(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring,
  2234. int tx_flags, int count)
  2235. {
  2236. struct e1000_tx_desc *tx_desc = NULL;
  2237. struct e1000_buffer *buffer_info;
  2238. uint32_t txd_upper = 0, txd_lower = E1000_TXD_CMD_IFCS;
  2239. unsigned int i;
  2240. if (likely(tx_flags & E1000_TX_FLAGS_TSO)) {
  2241. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D |
  2242. E1000_TXD_CMD_TSE;
  2243. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2244. if (likely(tx_flags & E1000_TX_FLAGS_IPV4))
  2245. txd_upper |= E1000_TXD_POPTS_IXSM << 8;
  2246. }
  2247. if (likely(tx_flags & E1000_TX_FLAGS_CSUM)) {
  2248. txd_lower |= E1000_TXD_CMD_DEXT | E1000_TXD_DTYP_D;
  2249. txd_upper |= E1000_TXD_POPTS_TXSM << 8;
  2250. }
  2251. if (unlikely(tx_flags & E1000_TX_FLAGS_VLAN)) {
  2252. txd_lower |= E1000_TXD_CMD_VLE;
  2253. txd_upper |= (tx_flags & E1000_TX_FLAGS_VLAN_MASK);
  2254. }
  2255. i = tx_ring->next_to_use;
  2256. while (count--) {
  2257. buffer_info = &tx_ring->buffer_info[i];
  2258. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2259. tx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  2260. tx_desc->lower.data =
  2261. cpu_to_le32(txd_lower | buffer_info->length);
  2262. tx_desc->upper.data = cpu_to_le32(txd_upper);
  2263. if (unlikely(++i == tx_ring->count)) i = 0;
  2264. }
  2265. tx_desc->lower.data |= cpu_to_le32(adapter->txd_cmd);
  2266. /* Force memory writes to complete before letting h/w
  2267. * know there are new descriptors to fetch. (Only
  2268. * applicable for weak-ordered memory model archs,
  2269. * such as IA-64). */
  2270. wmb();
  2271. tx_ring->next_to_use = i;
  2272. writel(i, adapter->hw.hw_addr + tx_ring->tdt);
  2273. }
  2274. /**
  2275. * 82547 workaround to avoid controller hang in half-duplex environment.
  2276. * The workaround is to avoid queuing a large packet that would span
  2277. * the internal Tx FIFO ring boundary by notifying the stack to resend
  2278. * the packet at a later time. This gives the Tx FIFO an opportunity to
  2279. * flush all packets. When that occurs, we reset the Tx FIFO pointers
  2280. * to the beginning of the Tx FIFO.
  2281. **/
  2282. #define E1000_FIFO_HDR 0x10
  2283. #define E1000_82547_PAD_LEN 0x3E0
  2284. static inline int
  2285. e1000_82547_fifo_workaround(struct e1000_adapter *adapter, struct sk_buff *skb)
  2286. {
  2287. uint32_t fifo_space = adapter->tx_fifo_size - adapter->tx_fifo_head;
  2288. uint32_t skb_fifo_len = skb->len + E1000_FIFO_HDR;
  2289. E1000_ROUNDUP(skb_fifo_len, E1000_FIFO_HDR);
  2290. if (adapter->link_duplex != HALF_DUPLEX)
  2291. goto no_fifo_stall_required;
  2292. if (atomic_read(&adapter->tx_fifo_stall))
  2293. return 1;
  2294. if (skb_fifo_len >= (E1000_82547_PAD_LEN + fifo_space)) {
  2295. atomic_set(&adapter->tx_fifo_stall, 1);
  2296. return 1;
  2297. }
  2298. no_fifo_stall_required:
  2299. adapter->tx_fifo_head += skb_fifo_len;
  2300. if (adapter->tx_fifo_head >= adapter->tx_fifo_size)
  2301. adapter->tx_fifo_head -= adapter->tx_fifo_size;
  2302. return 0;
  2303. }
  2304. #define MINIMUM_DHCP_PACKET_SIZE 282
  2305. static inline int
  2306. e1000_transfer_dhcp_info(struct e1000_adapter *adapter, struct sk_buff *skb)
  2307. {
  2308. struct e1000_hw *hw = &adapter->hw;
  2309. uint16_t length, offset;
  2310. if (vlan_tx_tag_present(skb)) {
  2311. if (!((vlan_tx_tag_get(skb) == adapter->hw.mng_cookie.vlan_id) &&
  2312. ( adapter->hw.mng_cookie.status &
  2313. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT)) )
  2314. return 0;
  2315. }
  2316. if (skb->len > MINIMUM_DHCP_PACKET_SIZE) {
  2317. struct ethhdr *eth = (struct ethhdr *) skb->data;
  2318. if ((htons(ETH_P_IP) == eth->h_proto)) {
  2319. const struct iphdr *ip =
  2320. (struct iphdr *)((uint8_t *)skb->data+14);
  2321. if (IPPROTO_UDP == ip->protocol) {
  2322. struct udphdr *udp =
  2323. (struct udphdr *)((uint8_t *)ip +
  2324. (ip->ihl << 2));
  2325. if (ntohs(udp->dest) == 67) {
  2326. offset = (uint8_t *)udp + 8 - skb->data;
  2327. length = skb->len - offset;
  2328. return e1000_mng_write_dhcp_info(hw,
  2329. (uint8_t *)udp + 8,
  2330. length);
  2331. }
  2332. }
  2333. }
  2334. }
  2335. return 0;
  2336. }
  2337. #define TXD_USE_COUNT(S, X) (((S) >> (X)) + 1 )
  2338. static int
  2339. e1000_xmit_frame(struct sk_buff *skb, struct net_device *netdev)
  2340. {
  2341. struct e1000_adapter *adapter = netdev_priv(netdev);
  2342. struct e1000_tx_ring *tx_ring;
  2343. unsigned int first, max_per_txd = E1000_MAX_DATA_PER_TXD;
  2344. unsigned int max_txd_pwr = E1000_MAX_TXD_PWR;
  2345. unsigned int tx_flags = 0;
  2346. unsigned int len = skb->len;
  2347. unsigned long flags;
  2348. unsigned int nr_frags = 0;
  2349. unsigned int mss = 0;
  2350. int count = 0;
  2351. int tso;
  2352. unsigned int f;
  2353. len -= skb->data_len;
  2354. tx_ring = adapter->tx_ring;
  2355. if (unlikely(skb->len <= 0)) {
  2356. dev_kfree_skb_any(skb);
  2357. return NETDEV_TX_OK;
  2358. }
  2359. #ifdef NETIF_F_TSO
  2360. mss = skb_shinfo(skb)->tso_size;
  2361. /* The controller does a simple calculation to
  2362. * make sure there is enough room in the FIFO before
  2363. * initiating the DMA for each buffer. The calc is:
  2364. * 4 = ceil(buffer len/mss). To make sure we don't
  2365. * overrun the FIFO, adjust the max buffer len if mss
  2366. * drops. */
  2367. if (mss) {
  2368. uint8_t hdr_len;
  2369. max_per_txd = min(mss << 2, max_per_txd);
  2370. max_txd_pwr = fls(max_per_txd) - 1;
  2371. /* TSO Workaround for 82571/2/3 Controllers -- if skb->data
  2372. * points to just header, pull a few bytes of payload from
  2373. * frags into skb->data */
  2374. hdr_len = ((skb->h.raw - skb->data) + (skb->h.th->doff << 2));
  2375. if (skb->data_len && (hdr_len == (skb->len - skb->data_len))) {
  2376. switch (adapter->hw.mac_type) {
  2377. unsigned int pull_size;
  2378. case e1000_82571:
  2379. case e1000_82572:
  2380. case e1000_82573:
  2381. pull_size = min((unsigned int)4, skb->data_len);
  2382. if (!__pskb_pull_tail(skb, pull_size)) {
  2383. printk(KERN_ERR
  2384. "__pskb_pull_tail failed.\n");
  2385. dev_kfree_skb_any(skb);
  2386. return -EFAULT;
  2387. }
  2388. len = skb->len - skb->data_len;
  2389. break;
  2390. default:
  2391. /* do nothing */
  2392. break;
  2393. }
  2394. }
  2395. }
  2396. /* reserve a descriptor for the offload context */
  2397. if ((mss) || (skb->ip_summed == CHECKSUM_HW))
  2398. count++;
  2399. count++;
  2400. #else
  2401. if (skb->ip_summed == CHECKSUM_HW)
  2402. count++;
  2403. #endif
  2404. #ifdef NETIF_F_TSO
  2405. /* Controller Erratum workaround */
  2406. if (!skb->data_len && tx_ring->last_tx_tso &&
  2407. !skb_shinfo(skb)->tso_size)
  2408. count++;
  2409. #endif
  2410. count += TXD_USE_COUNT(len, max_txd_pwr);
  2411. if (adapter->pcix_82544)
  2412. count++;
  2413. /* work-around for errata 10 and it applies to all controllers
  2414. * in PCI-X mode, so add one more descriptor to the count
  2415. */
  2416. if (unlikely((adapter->hw.bus_type == e1000_bus_type_pcix) &&
  2417. (len > 2015)))
  2418. count++;
  2419. nr_frags = skb_shinfo(skb)->nr_frags;
  2420. for (f = 0; f < nr_frags; f++)
  2421. count += TXD_USE_COUNT(skb_shinfo(skb)->frags[f].size,
  2422. max_txd_pwr);
  2423. if (adapter->pcix_82544)
  2424. count += nr_frags;
  2425. if (adapter->hw.tx_pkt_filtering && (adapter->hw.mac_type == e1000_82573) )
  2426. e1000_transfer_dhcp_info(adapter, skb);
  2427. local_irq_save(flags);
  2428. if (!spin_trylock(&tx_ring->tx_lock)) {
  2429. /* Collision - tell upper layer to requeue */
  2430. local_irq_restore(flags);
  2431. return NETDEV_TX_LOCKED;
  2432. }
  2433. /* need: count + 2 desc gap to keep tail from touching
  2434. * head, otherwise try next time */
  2435. if (unlikely(E1000_DESC_UNUSED(tx_ring) < count + 2)) {
  2436. netif_stop_queue(netdev);
  2437. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2438. return NETDEV_TX_BUSY;
  2439. }
  2440. if (unlikely(adapter->hw.mac_type == e1000_82547)) {
  2441. if (unlikely(e1000_82547_fifo_workaround(adapter, skb))) {
  2442. netif_stop_queue(netdev);
  2443. mod_timer(&adapter->tx_fifo_stall_timer, jiffies);
  2444. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2445. return NETDEV_TX_BUSY;
  2446. }
  2447. }
  2448. if (unlikely(adapter->vlgrp && vlan_tx_tag_present(skb))) {
  2449. tx_flags |= E1000_TX_FLAGS_VLAN;
  2450. tx_flags |= (vlan_tx_tag_get(skb) << E1000_TX_FLAGS_VLAN_SHIFT);
  2451. }
  2452. first = tx_ring->next_to_use;
  2453. tso = e1000_tso(adapter, tx_ring, skb);
  2454. if (tso < 0) {
  2455. dev_kfree_skb_any(skb);
  2456. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2457. return NETDEV_TX_OK;
  2458. }
  2459. if (likely(tso)) {
  2460. tx_ring->last_tx_tso = 1;
  2461. tx_flags |= E1000_TX_FLAGS_TSO;
  2462. } else if (likely(e1000_tx_csum(adapter, tx_ring, skb)))
  2463. tx_flags |= E1000_TX_FLAGS_CSUM;
  2464. /* Old method was to assume IPv4 packet by default if TSO was enabled.
  2465. * 82571 hardware supports TSO capabilities for IPv6 as well...
  2466. * no longer assume, we must. */
  2467. if (likely(skb->protocol == ntohs(ETH_P_IP)))
  2468. tx_flags |= E1000_TX_FLAGS_IPV4;
  2469. e1000_tx_queue(adapter, tx_ring, tx_flags,
  2470. e1000_tx_map(adapter, tx_ring, skb, first,
  2471. max_per_txd, nr_frags, mss));
  2472. netdev->trans_start = jiffies;
  2473. /* Make sure there is space in the ring for the next send. */
  2474. if (unlikely(E1000_DESC_UNUSED(tx_ring) < MAX_SKB_FRAGS + 2))
  2475. netif_stop_queue(netdev);
  2476. spin_unlock_irqrestore(&tx_ring->tx_lock, flags);
  2477. return NETDEV_TX_OK;
  2478. }
  2479. /**
  2480. * e1000_tx_timeout - Respond to a Tx Hang
  2481. * @netdev: network interface device structure
  2482. **/
  2483. static void
  2484. e1000_tx_timeout(struct net_device *netdev)
  2485. {
  2486. struct e1000_adapter *adapter = netdev_priv(netdev);
  2487. /* Do the reset outside of interrupt context */
  2488. schedule_work(&adapter->tx_timeout_task);
  2489. }
  2490. static void
  2491. e1000_tx_timeout_task(struct net_device *netdev)
  2492. {
  2493. struct e1000_adapter *adapter = netdev_priv(netdev);
  2494. adapter->tx_timeout_count++;
  2495. e1000_down(adapter);
  2496. e1000_up(adapter);
  2497. }
  2498. /**
  2499. * e1000_get_stats - Get System Network Statistics
  2500. * @netdev: network interface device structure
  2501. *
  2502. * Returns the address of the device statistics structure.
  2503. * The statistics are actually updated from the timer callback.
  2504. **/
  2505. static struct net_device_stats *
  2506. e1000_get_stats(struct net_device *netdev)
  2507. {
  2508. struct e1000_adapter *adapter = netdev_priv(netdev);
  2509. /* only return the current stats */
  2510. return &adapter->net_stats;
  2511. }
  2512. /**
  2513. * e1000_change_mtu - Change the Maximum Transfer Unit
  2514. * @netdev: network interface device structure
  2515. * @new_mtu: new value for maximum frame size
  2516. *
  2517. * Returns 0 on success, negative on failure
  2518. **/
  2519. static int
  2520. e1000_change_mtu(struct net_device *netdev, int new_mtu)
  2521. {
  2522. struct e1000_adapter *adapter = netdev_priv(netdev);
  2523. int max_frame = new_mtu + ENET_HEADER_SIZE + ETHERNET_FCS_SIZE;
  2524. uint16_t eeprom_data = 0;
  2525. if ((max_frame < MINIMUM_ETHERNET_FRAME_SIZE) ||
  2526. (max_frame > MAX_JUMBO_FRAME_SIZE)) {
  2527. DPRINTK(PROBE, ERR, "Invalid MTU setting\n");
  2528. return -EINVAL;
  2529. }
  2530. /* Adapter-specific max frame size limits. */
  2531. switch (adapter->hw.mac_type) {
  2532. case e1000_82542_rev2_0:
  2533. case e1000_82542_rev2_1:
  2534. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2535. DPRINTK(PROBE, ERR, "Jumbo Frames not supported.\n");
  2536. return -EINVAL;
  2537. }
  2538. break;
  2539. case e1000_82573:
  2540. /* only enable jumbo frames if ASPM is disabled completely
  2541. * this means both bits must be zero in 0x1A bits 3:2 */
  2542. e1000_read_eeprom(&adapter->hw, EEPROM_INIT_3GIO_3, 1,
  2543. &eeprom_data);
  2544. if (eeprom_data & EEPROM_WORD1A_ASPM_MASK) {
  2545. if (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE) {
  2546. DPRINTK(PROBE, ERR,
  2547. "Jumbo Frames not supported.\n");
  2548. return -EINVAL;
  2549. }
  2550. break;
  2551. }
  2552. /* fall through to get support */
  2553. case e1000_82571:
  2554. case e1000_82572:
  2555. #define MAX_STD_JUMBO_FRAME_SIZE 9234
  2556. if (max_frame > MAX_STD_JUMBO_FRAME_SIZE) {
  2557. DPRINTK(PROBE, ERR, "MTU > 9216 not supported.\n");
  2558. return -EINVAL;
  2559. }
  2560. break;
  2561. default:
  2562. /* Capable of supporting up to MAX_JUMBO_FRAME_SIZE limit. */
  2563. break;
  2564. }
  2565. if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2566. adapter->rx_buffer_len = max_frame;
  2567. E1000_ROUNDUP(adapter->rx_buffer_len, 1024);
  2568. } else {
  2569. if(unlikely((adapter->hw.mac_type < e1000_82543) &&
  2570. (max_frame > MAXIMUM_ETHERNET_FRAME_SIZE))) {
  2571. DPRINTK(PROBE, ERR, "Jumbo Frames not supported "
  2572. "on 82542\n");
  2573. return -EINVAL;
  2574. } else {
  2575. if(max_frame <= E1000_RXBUFFER_2048)
  2576. adapter->rx_buffer_len = E1000_RXBUFFER_2048;
  2577. else if(max_frame <= E1000_RXBUFFER_4096)
  2578. adapter->rx_buffer_len = E1000_RXBUFFER_4096;
  2579. else if(max_frame <= E1000_RXBUFFER_8192)
  2580. adapter->rx_buffer_len = E1000_RXBUFFER_8192;
  2581. else if(max_frame <= E1000_RXBUFFER_16384)
  2582. adapter->rx_buffer_len = E1000_RXBUFFER_16384;
  2583. }
  2584. }
  2585. netdev->mtu = new_mtu;
  2586. if (netif_running(netdev)) {
  2587. e1000_down(adapter);
  2588. e1000_up(adapter);
  2589. }
  2590. adapter->hw.max_frame_size = max_frame;
  2591. return 0;
  2592. }
  2593. /**
  2594. * e1000_update_stats - Update the board statistics counters
  2595. * @adapter: board private structure
  2596. **/
  2597. void
  2598. e1000_update_stats(struct e1000_adapter *adapter)
  2599. {
  2600. struct e1000_hw *hw = &adapter->hw;
  2601. unsigned long flags;
  2602. uint16_t phy_tmp;
  2603. #define PHY_IDLE_ERROR_COUNT_MASK 0x00FF
  2604. spin_lock_irqsave(&adapter->stats_lock, flags);
  2605. /* these counters are modified from e1000_adjust_tbi_stats,
  2606. * called from the interrupt context, so they must only
  2607. * be written while holding adapter->stats_lock
  2608. */
  2609. adapter->stats.crcerrs += E1000_READ_REG(hw, CRCERRS);
  2610. adapter->stats.gprc += E1000_READ_REG(hw, GPRC);
  2611. adapter->stats.gorcl += E1000_READ_REG(hw, GORCL);
  2612. adapter->stats.gorch += E1000_READ_REG(hw, GORCH);
  2613. adapter->stats.bprc += E1000_READ_REG(hw, BPRC);
  2614. adapter->stats.mprc += E1000_READ_REG(hw, MPRC);
  2615. adapter->stats.roc += E1000_READ_REG(hw, ROC);
  2616. adapter->stats.prc64 += E1000_READ_REG(hw, PRC64);
  2617. adapter->stats.prc127 += E1000_READ_REG(hw, PRC127);
  2618. adapter->stats.prc255 += E1000_READ_REG(hw, PRC255);
  2619. adapter->stats.prc511 += E1000_READ_REG(hw, PRC511);
  2620. adapter->stats.prc1023 += E1000_READ_REG(hw, PRC1023);
  2621. adapter->stats.prc1522 += E1000_READ_REG(hw, PRC1522);
  2622. adapter->stats.symerrs += E1000_READ_REG(hw, SYMERRS);
  2623. adapter->stats.mpc += E1000_READ_REG(hw, MPC);
  2624. adapter->stats.scc += E1000_READ_REG(hw, SCC);
  2625. adapter->stats.ecol += E1000_READ_REG(hw, ECOL);
  2626. adapter->stats.mcc += E1000_READ_REG(hw, MCC);
  2627. adapter->stats.latecol += E1000_READ_REG(hw, LATECOL);
  2628. adapter->stats.dc += E1000_READ_REG(hw, DC);
  2629. adapter->stats.sec += E1000_READ_REG(hw, SEC);
  2630. adapter->stats.rlec += E1000_READ_REG(hw, RLEC);
  2631. adapter->stats.xonrxc += E1000_READ_REG(hw, XONRXC);
  2632. adapter->stats.xontxc += E1000_READ_REG(hw, XONTXC);
  2633. adapter->stats.xoffrxc += E1000_READ_REG(hw, XOFFRXC);
  2634. adapter->stats.xofftxc += E1000_READ_REG(hw, XOFFTXC);
  2635. adapter->stats.fcruc += E1000_READ_REG(hw, FCRUC);
  2636. adapter->stats.gptc += E1000_READ_REG(hw, GPTC);
  2637. adapter->stats.gotcl += E1000_READ_REG(hw, GOTCL);
  2638. adapter->stats.gotch += E1000_READ_REG(hw, GOTCH);
  2639. adapter->stats.rnbc += E1000_READ_REG(hw, RNBC);
  2640. adapter->stats.ruc += E1000_READ_REG(hw, RUC);
  2641. adapter->stats.rfc += E1000_READ_REG(hw, RFC);
  2642. adapter->stats.rjc += E1000_READ_REG(hw, RJC);
  2643. adapter->stats.torl += E1000_READ_REG(hw, TORL);
  2644. adapter->stats.torh += E1000_READ_REG(hw, TORH);
  2645. adapter->stats.totl += E1000_READ_REG(hw, TOTL);
  2646. adapter->stats.toth += E1000_READ_REG(hw, TOTH);
  2647. adapter->stats.tpr += E1000_READ_REG(hw, TPR);
  2648. adapter->stats.ptc64 += E1000_READ_REG(hw, PTC64);
  2649. adapter->stats.ptc127 += E1000_READ_REG(hw, PTC127);
  2650. adapter->stats.ptc255 += E1000_READ_REG(hw, PTC255);
  2651. adapter->stats.ptc511 += E1000_READ_REG(hw, PTC511);
  2652. adapter->stats.ptc1023 += E1000_READ_REG(hw, PTC1023);
  2653. adapter->stats.ptc1522 += E1000_READ_REG(hw, PTC1522);
  2654. adapter->stats.mptc += E1000_READ_REG(hw, MPTC);
  2655. adapter->stats.bptc += E1000_READ_REG(hw, BPTC);
  2656. /* used for adaptive IFS */
  2657. hw->tx_packet_delta = E1000_READ_REG(hw, TPT);
  2658. adapter->stats.tpt += hw->tx_packet_delta;
  2659. hw->collision_delta = E1000_READ_REG(hw, COLC);
  2660. adapter->stats.colc += hw->collision_delta;
  2661. if (hw->mac_type >= e1000_82543) {
  2662. adapter->stats.algnerrc += E1000_READ_REG(hw, ALGNERRC);
  2663. adapter->stats.rxerrc += E1000_READ_REG(hw, RXERRC);
  2664. adapter->stats.tncrs += E1000_READ_REG(hw, TNCRS);
  2665. adapter->stats.cexterr += E1000_READ_REG(hw, CEXTERR);
  2666. adapter->stats.tsctc += E1000_READ_REG(hw, TSCTC);
  2667. adapter->stats.tsctfc += E1000_READ_REG(hw, TSCTFC);
  2668. }
  2669. if (hw->mac_type > e1000_82547_rev_2) {
  2670. adapter->stats.iac += E1000_READ_REG(hw, IAC);
  2671. adapter->stats.icrxoc += E1000_READ_REG(hw, ICRXOC);
  2672. adapter->stats.icrxptc += E1000_READ_REG(hw, ICRXPTC);
  2673. adapter->stats.icrxatc += E1000_READ_REG(hw, ICRXATC);
  2674. adapter->stats.ictxptc += E1000_READ_REG(hw, ICTXPTC);
  2675. adapter->stats.ictxatc += E1000_READ_REG(hw, ICTXATC);
  2676. adapter->stats.ictxqec += E1000_READ_REG(hw, ICTXQEC);
  2677. adapter->stats.ictxqmtc += E1000_READ_REG(hw, ICTXQMTC);
  2678. adapter->stats.icrxdmtc += E1000_READ_REG(hw, ICRXDMTC);
  2679. }
  2680. /* Fill out the OS statistics structure */
  2681. adapter->net_stats.rx_packets = adapter->stats.gprc;
  2682. adapter->net_stats.tx_packets = adapter->stats.gptc;
  2683. adapter->net_stats.rx_bytes = adapter->stats.gorcl;
  2684. adapter->net_stats.tx_bytes = adapter->stats.gotcl;
  2685. adapter->net_stats.multicast = adapter->stats.mprc;
  2686. adapter->net_stats.collisions = adapter->stats.colc;
  2687. /* Rx Errors */
  2688. adapter->net_stats.rx_errors = adapter->stats.rxerrc +
  2689. adapter->stats.crcerrs + adapter->stats.algnerrc +
  2690. adapter->stats.rlec + adapter->stats.cexterr;
  2691. adapter->net_stats.rx_dropped = 0;
  2692. adapter->net_stats.rx_length_errors = adapter->stats.rlec;
  2693. adapter->net_stats.rx_crc_errors = adapter->stats.crcerrs;
  2694. adapter->net_stats.rx_frame_errors = adapter->stats.algnerrc;
  2695. adapter->net_stats.rx_missed_errors = adapter->stats.mpc;
  2696. /* Tx Errors */
  2697. adapter->net_stats.tx_errors = adapter->stats.ecol +
  2698. adapter->stats.latecol;
  2699. adapter->net_stats.tx_aborted_errors = adapter->stats.ecol;
  2700. adapter->net_stats.tx_window_errors = adapter->stats.latecol;
  2701. adapter->net_stats.tx_carrier_errors = adapter->stats.tncrs;
  2702. /* Tx Dropped needs to be maintained elsewhere */
  2703. /* Phy Stats */
  2704. if (hw->media_type == e1000_media_type_copper) {
  2705. if ((adapter->link_speed == SPEED_1000) &&
  2706. (!e1000_read_phy_reg(hw, PHY_1000T_STATUS, &phy_tmp))) {
  2707. phy_tmp &= PHY_IDLE_ERROR_COUNT_MASK;
  2708. adapter->phy_stats.idle_errors += phy_tmp;
  2709. }
  2710. if ((hw->mac_type <= e1000_82546) &&
  2711. (hw->phy_type == e1000_phy_m88) &&
  2712. !e1000_read_phy_reg(hw, M88E1000_RX_ERR_CNTR, &phy_tmp))
  2713. adapter->phy_stats.receive_errors += phy_tmp;
  2714. }
  2715. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  2716. }
  2717. /**
  2718. * e1000_intr - Interrupt Handler
  2719. * @irq: interrupt number
  2720. * @data: pointer to a network interface device structure
  2721. * @pt_regs: CPU registers structure
  2722. **/
  2723. static irqreturn_t
  2724. e1000_intr(int irq, void *data, struct pt_regs *regs)
  2725. {
  2726. struct net_device *netdev = data;
  2727. struct e1000_adapter *adapter = netdev_priv(netdev);
  2728. struct e1000_hw *hw = &adapter->hw;
  2729. uint32_t icr = E1000_READ_REG(hw, ICR);
  2730. #ifndef CONFIG_E1000_NAPI
  2731. int i;
  2732. #else
  2733. /* Interrupt Auto-Mask...upon reading ICR,
  2734. * interrupts are masked. No need for the
  2735. * IMC write, but it does mean we should
  2736. * account for it ASAP. */
  2737. if (likely(hw->mac_type >= e1000_82571))
  2738. atomic_inc(&adapter->irq_sem);
  2739. #endif
  2740. if (unlikely(!icr)) {
  2741. #ifdef CONFIG_E1000_NAPI
  2742. if (hw->mac_type >= e1000_82571)
  2743. e1000_irq_enable(adapter);
  2744. #endif
  2745. return IRQ_NONE; /* Not our interrupt */
  2746. }
  2747. if (unlikely(icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC))) {
  2748. hw->get_link_status = 1;
  2749. mod_timer(&adapter->watchdog_timer, jiffies);
  2750. }
  2751. #ifdef CONFIG_E1000_NAPI
  2752. if (unlikely(hw->mac_type < e1000_82571)) {
  2753. atomic_inc(&adapter->irq_sem);
  2754. E1000_WRITE_REG(hw, IMC, ~0);
  2755. E1000_WRITE_FLUSH(hw);
  2756. }
  2757. if (likely(netif_rx_schedule_prep(&adapter->polling_netdev[0])))
  2758. __netif_rx_schedule(&adapter->polling_netdev[0]);
  2759. else
  2760. e1000_irq_enable(adapter);
  2761. #else
  2762. /* Writing IMC and IMS is needed for 82547.
  2763. * Due to Hub Link bus being occupied, an interrupt
  2764. * de-assertion message is not able to be sent.
  2765. * When an interrupt assertion message is generated later,
  2766. * two messages are re-ordered and sent out.
  2767. * That causes APIC to think 82547 is in de-assertion
  2768. * state, while 82547 is in assertion state, resulting
  2769. * in dead lock. Writing IMC forces 82547 into
  2770. * de-assertion state.
  2771. */
  2772. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2) {
  2773. atomic_inc(&adapter->irq_sem);
  2774. E1000_WRITE_REG(hw, IMC, ~0);
  2775. }
  2776. for (i = 0; i < E1000_MAX_INTR; i++)
  2777. if (unlikely(!adapter->clean_rx(adapter, adapter->rx_ring) &
  2778. !e1000_clean_tx_irq(adapter, adapter->tx_ring)))
  2779. break;
  2780. if (hw->mac_type == e1000_82547 || hw->mac_type == e1000_82547_rev_2)
  2781. e1000_irq_enable(adapter);
  2782. #endif
  2783. return IRQ_HANDLED;
  2784. }
  2785. #ifdef CONFIG_E1000_NAPI
  2786. /**
  2787. * e1000_clean - NAPI Rx polling callback
  2788. * @adapter: board private structure
  2789. **/
  2790. static int
  2791. e1000_clean(struct net_device *poll_dev, int *budget)
  2792. {
  2793. struct e1000_adapter *adapter;
  2794. int work_to_do = min(*budget, poll_dev->quota);
  2795. int tx_cleaned = 0, i = 0, work_done = 0;
  2796. /* Must NOT use netdev_priv macro here. */
  2797. adapter = poll_dev->priv;
  2798. /* Keep link state information with original netdev */
  2799. if (!netif_carrier_ok(adapter->netdev))
  2800. goto quit_polling;
  2801. while (poll_dev != &adapter->polling_netdev[i]) {
  2802. i++;
  2803. if (unlikely(i == adapter->num_rx_queues))
  2804. BUG();
  2805. }
  2806. if (likely(adapter->num_tx_queues == 1)) {
  2807. /* e1000_clean is called per-cpu. This lock protects
  2808. * tx_ring[0] from being cleaned by multiple cpus
  2809. * simultaneously. A failure obtaining the lock means
  2810. * tx_ring[0] is currently being cleaned anyway. */
  2811. if (spin_trylock(&adapter->tx_queue_lock)) {
  2812. tx_cleaned = e1000_clean_tx_irq(adapter,
  2813. &adapter->tx_ring[0]);
  2814. spin_unlock(&adapter->tx_queue_lock);
  2815. }
  2816. } else
  2817. tx_cleaned = e1000_clean_tx_irq(adapter, &adapter->tx_ring[i]);
  2818. adapter->clean_rx(adapter, &adapter->rx_ring[i],
  2819. &work_done, work_to_do);
  2820. *budget -= work_done;
  2821. poll_dev->quota -= work_done;
  2822. /* If no Tx and not enough Rx work done, exit the polling mode */
  2823. if ((!tx_cleaned && (work_done == 0)) ||
  2824. !netif_running(adapter->netdev)) {
  2825. quit_polling:
  2826. netif_rx_complete(poll_dev);
  2827. e1000_irq_enable(adapter);
  2828. return 0;
  2829. }
  2830. return 1;
  2831. }
  2832. #endif
  2833. /**
  2834. * e1000_clean_tx_irq - Reclaim resources after transmit completes
  2835. * @adapter: board private structure
  2836. **/
  2837. static boolean_t
  2838. e1000_clean_tx_irq(struct e1000_adapter *adapter,
  2839. struct e1000_tx_ring *tx_ring)
  2840. {
  2841. struct net_device *netdev = adapter->netdev;
  2842. struct e1000_tx_desc *tx_desc, *eop_desc;
  2843. struct e1000_buffer *buffer_info;
  2844. unsigned int i, eop;
  2845. boolean_t cleaned = FALSE;
  2846. i = tx_ring->next_to_clean;
  2847. eop = tx_ring->buffer_info[i].next_to_watch;
  2848. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2849. while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) {
  2850. for (cleaned = FALSE; !cleaned; ) {
  2851. tx_desc = E1000_TX_DESC(*tx_ring, i);
  2852. buffer_info = &tx_ring->buffer_info[i];
  2853. cleaned = (i == eop);
  2854. e1000_unmap_and_free_tx_resource(adapter, buffer_info);
  2855. memset(tx_desc, 0, sizeof(struct e1000_tx_desc));
  2856. if (unlikely(++i == tx_ring->count)) i = 0;
  2857. }
  2858. eop = tx_ring->buffer_info[i].next_to_watch;
  2859. eop_desc = E1000_TX_DESC(*tx_ring, eop);
  2860. }
  2861. tx_ring->next_to_clean = i;
  2862. spin_lock(&tx_ring->tx_lock);
  2863. if (unlikely(cleaned && netif_queue_stopped(netdev) &&
  2864. netif_carrier_ok(netdev)))
  2865. netif_wake_queue(netdev);
  2866. spin_unlock(&tx_ring->tx_lock);
  2867. if (adapter->detect_tx_hung) {
  2868. /* Detect a transmit hang in hardware, this serializes the
  2869. * check with the clearing of time_stamp and movement of i */
  2870. adapter->detect_tx_hung = FALSE;
  2871. if (tx_ring->buffer_info[eop].dma &&
  2872. time_after(jiffies, tx_ring->buffer_info[eop].time_stamp +
  2873. (adapter->tx_timeout_factor * HZ))
  2874. && !(E1000_READ_REG(&adapter->hw, STATUS) &
  2875. E1000_STATUS_TXOFF)) {
  2876. /* detected Tx unit hang */
  2877. DPRINTK(DRV, ERR, "Detected Tx Unit Hang\n"
  2878. " Tx Queue <%lu>\n"
  2879. " TDH <%x>\n"
  2880. " TDT <%x>\n"
  2881. " next_to_use <%x>\n"
  2882. " next_to_clean <%x>\n"
  2883. "buffer_info[next_to_clean]\n"
  2884. " time_stamp <%lx>\n"
  2885. " next_to_watch <%x>\n"
  2886. " jiffies <%lx>\n"
  2887. " next_to_watch.status <%x>\n",
  2888. (unsigned long)((tx_ring - adapter->tx_ring) /
  2889. sizeof(struct e1000_tx_ring)),
  2890. readl(adapter->hw.hw_addr + tx_ring->tdh),
  2891. readl(adapter->hw.hw_addr + tx_ring->tdt),
  2892. tx_ring->next_to_use,
  2893. tx_ring->next_to_clean,
  2894. tx_ring->buffer_info[eop].time_stamp,
  2895. eop,
  2896. jiffies,
  2897. eop_desc->upper.fields.status);
  2898. netif_stop_queue(netdev);
  2899. }
  2900. }
  2901. return cleaned;
  2902. }
  2903. /**
  2904. * e1000_rx_checksum - Receive Checksum Offload for 82543
  2905. * @adapter: board private structure
  2906. * @status_err: receive descriptor status and error fields
  2907. * @csum: receive descriptor csum field
  2908. * @sk_buff: socket buffer with received data
  2909. **/
  2910. static inline void
  2911. e1000_rx_checksum(struct e1000_adapter *adapter,
  2912. uint32_t status_err, uint32_t csum,
  2913. struct sk_buff *skb)
  2914. {
  2915. uint16_t status = (uint16_t)status_err;
  2916. uint8_t errors = (uint8_t)(status_err >> 24);
  2917. skb->ip_summed = CHECKSUM_NONE;
  2918. /* 82543 or newer only */
  2919. if (unlikely(adapter->hw.mac_type < e1000_82543)) return;
  2920. /* Ignore Checksum bit is set */
  2921. if (unlikely(status & E1000_RXD_STAT_IXSM)) return;
  2922. /* TCP/UDP checksum error bit is set */
  2923. if (unlikely(errors & E1000_RXD_ERR_TCPE)) {
  2924. /* let the stack verify checksum errors */
  2925. adapter->hw_csum_err++;
  2926. return;
  2927. }
  2928. /* TCP/UDP Checksum has not been calculated */
  2929. if (adapter->hw.mac_type <= e1000_82547_rev_2) {
  2930. if (!(status & E1000_RXD_STAT_TCPCS))
  2931. return;
  2932. } else {
  2933. if (!(status & (E1000_RXD_STAT_TCPCS | E1000_RXD_STAT_UDPCS)))
  2934. return;
  2935. }
  2936. /* It must be a TCP or UDP packet with a valid checksum */
  2937. if (likely(status & E1000_RXD_STAT_TCPCS)) {
  2938. /* TCP checksum is good */
  2939. skb->ip_summed = CHECKSUM_UNNECESSARY;
  2940. } else if (adapter->hw.mac_type > e1000_82547_rev_2) {
  2941. /* IP fragment with UDP payload */
  2942. /* Hardware complements the payload checksum, so we undo it
  2943. * and then put the value in host order for further stack use.
  2944. */
  2945. csum = ntohl(csum ^ 0xFFFF);
  2946. skb->csum = csum;
  2947. skb->ip_summed = CHECKSUM_HW;
  2948. }
  2949. adapter->hw_csum_good++;
  2950. }
  2951. /**
  2952. * e1000_clean_rx_irq - Send received data up the network stack; legacy
  2953. * @adapter: board private structure
  2954. **/
  2955. static boolean_t
  2956. #ifdef CONFIG_E1000_NAPI
  2957. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  2958. struct e1000_rx_ring *rx_ring,
  2959. int *work_done, int work_to_do)
  2960. #else
  2961. e1000_clean_rx_irq(struct e1000_adapter *adapter,
  2962. struct e1000_rx_ring *rx_ring)
  2963. #endif
  2964. {
  2965. struct net_device *netdev = adapter->netdev;
  2966. struct pci_dev *pdev = adapter->pdev;
  2967. struct e1000_rx_desc *rx_desc, *next_rxd;
  2968. struct e1000_buffer *buffer_info, *next_buffer;
  2969. unsigned long flags;
  2970. uint32_t length;
  2971. uint8_t last_byte;
  2972. unsigned int i;
  2973. int cleaned_count = 0;
  2974. boolean_t cleaned = FALSE;
  2975. i = rx_ring->next_to_clean;
  2976. rx_desc = E1000_RX_DESC(*rx_ring, i);
  2977. buffer_info = &rx_ring->buffer_info[i];
  2978. while (rx_desc->status & E1000_RXD_STAT_DD) {
  2979. struct sk_buff *skb, *next_skb;
  2980. u8 status;
  2981. #ifdef CONFIG_E1000_NAPI
  2982. if (*work_done >= work_to_do)
  2983. break;
  2984. (*work_done)++;
  2985. #endif
  2986. status = rx_desc->status;
  2987. skb = buffer_info->skb;
  2988. buffer_info->skb = NULL;
  2989. if (++i == rx_ring->count) i = 0;
  2990. next_rxd = E1000_RX_DESC(*rx_ring, i);
  2991. next_buffer = &rx_ring->buffer_info[i];
  2992. next_skb = next_buffer->skb;
  2993. cleaned = TRUE;
  2994. cleaned_count++;
  2995. pci_unmap_single(pdev,
  2996. buffer_info->dma,
  2997. buffer_info->length,
  2998. PCI_DMA_FROMDEVICE);
  2999. length = le16_to_cpu(rx_desc->length);
  3000. if (unlikely(!(status & E1000_RXD_STAT_EOP))) {
  3001. /* All receives must fit into a single buffer */
  3002. E1000_DBG("%s: Receive packet consumed multiple"
  3003. " buffers\n", netdev->name);
  3004. dev_kfree_skb_irq(skb);
  3005. goto next_desc;
  3006. }
  3007. if (unlikely(rx_desc->errors & E1000_RXD_ERR_FRAME_ERR_MASK)) {
  3008. last_byte = *(skb->data + length - 1);
  3009. if (TBI_ACCEPT(&adapter->hw, status,
  3010. rx_desc->errors, length, last_byte)) {
  3011. spin_lock_irqsave(&adapter->stats_lock, flags);
  3012. e1000_tbi_adjust_stats(&adapter->hw,
  3013. &adapter->stats,
  3014. length, skb->data);
  3015. spin_unlock_irqrestore(&adapter->stats_lock,
  3016. flags);
  3017. length--;
  3018. } else {
  3019. dev_kfree_skb_irq(skb);
  3020. goto next_desc;
  3021. }
  3022. }
  3023. /* code added for copybreak, this should improve
  3024. * performance for small packets with large amounts
  3025. * of reassembly being done in the stack */
  3026. #define E1000_CB_LENGTH 256
  3027. if (length < E1000_CB_LENGTH) {
  3028. struct sk_buff *new_skb =
  3029. dev_alloc_skb(length + NET_IP_ALIGN);
  3030. if (new_skb) {
  3031. skb_reserve(new_skb, NET_IP_ALIGN);
  3032. new_skb->dev = netdev;
  3033. memcpy(new_skb->data - NET_IP_ALIGN,
  3034. skb->data - NET_IP_ALIGN,
  3035. length + NET_IP_ALIGN);
  3036. /* save the skb in buffer_info as good */
  3037. buffer_info->skb = skb;
  3038. skb = new_skb;
  3039. skb_put(skb, length);
  3040. }
  3041. } else
  3042. skb_put(skb, length);
  3043. /* end copybreak code */
  3044. /* Receive Checksum Offload */
  3045. e1000_rx_checksum(adapter,
  3046. (uint32_t)(status) |
  3047. ((uint32_t)(rx_desc->errors) << 24),
  3048. rx_desc->csum, skb);
  3049. skb->protocol = eth_type_trans(skb, netdev);
  3050. #ifdef CONFIG_E1000_NAPI
  3051. if (unlikely(adapter->vlgrp &&
  3052. (status & E1000_RXD_STAT_VP))) {
  3053. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3054. le16_to_cpu(rx_desc->special) &
  3055. E1000_RXD_SPC_VLAN_MASK);
  3056. } else {
  3057. netif_receive_skb(skb);
  3058. }
  3059. #else /* CONFIG_E1000_NAPI */
  3060. if (unlikely(adapter->vlgrp &&
  3061. (status & E1000_RXD_STAT_VP))) {
  3062. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3063. le16_to_cpu(rx_desc->special) &
  3064. E1000_RXD_SPC_VLAN_MASK);
  3065. } else {
  3066. netif_rx(skb);
  3067. }
  3068. #endif /* CONFIG_E1000_NAPI */
  3069. netdev->last_rx = jiffies;
  3070. next_desc:
  3071. rx_desc->status = 0;
  3072. /* return some buffers to hardware, one at a time is too slow */
  3073. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3074. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3075. cleaned_count = 0;
  3076. }
  3077. rx_desc = next_rxd;
  3078. buffer_info = next_buffer;
  3079. }
  3080. rx_ring->next_to_clean = i;
  3081. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3082. if (cleaned_count)
  3083. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3084. return cleaned;
  3085. }
  3086. /**
  3087. * e1000_clean_rx_irq_ps - Send received data up the network stack; packet split
  3088. * @adapter: board private structure
  3089. **/
  3090. static boolean_t
  3091. #ifdef CONFIG_E1000_NAPI
  3092. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3093. struct e1000_rx_ring *rx_ring,
  3094. int *work_done, int work_to_do)
  3095. #else
  3096. e1000_clean_rx_irq_ps(struct e1000_adapter *adapter,
  3097. struct e1000_rx_ring *rx_ring)
  3098. #endif
  3099. {
  3100. union e1000_rx_desc_packet_split *rx_desc, *next_rxd;
  3101. struct net_device *netdev = adapter->netdev;
  3102. struct pci_dev *pdev = adapter->pdev;
  3103. struct e1000_buffer *buffer_info, *next_buffer;
  3104. struct e1000_ps_page *ps_page;
  3105. struct e1000_ps_page_dma *ps_page_dma;
  3106. struct sk_buff *skb, *next_skb;
  3107. unsigned int i, j;
  3108. uint32_t length, staterr;
  3109. int cleaned_count = 0;
  3110. boolean_t cleaned = FALSE;
  3111. i = rx_ring->next_to_clean;
  3112. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3113. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3114. buffer_info = &rx_ring->buffer_info[i];
  3115. while (staterr & E1000_RXD_STAT_DD) {
  3116. ps_page = &rx_ring->ps_page[i];
  3117. ps_page_dma = &rx_ring->ps_page_dma[i];
  3118. #ifdef CONFIG_E1000_NAPI
  3119. if (unlikely(*work_done >= work_to_do))
  3120. break;
  3121. (*work_done)++;
  3122. #endif
  3123. skb = buffer_info->skb;
  3124. if (++i == rx_ring->count) i = 0;
  3125. next_rxd = E1000_RX_DESC_PS(*rx_ring, i);
  3126. next_buffer = &rx_ring->buffer_info[i];
  3127. next_skb = next_buffer->skb;
  3128. cleaned = TRUE;
  3129. cleaned_count++;
  3130. pci_unmap_single(pdev, buffer_info->dma,
  3131. buffer_info->length,
  3132. PCI_DMA_FROMDEVICE);
  3133. if (unlikely(!(staterr & E1000_RXD_STAT_EOP))) {
  3134. E1000_DBG("%s: Packet Split buffers didn't pick up"
  3135. " the full packet\n", netdev->name);
  3136. dev_kfree_skb_irq(skb);
  3137. goto next_desc;
  3138. }
  3139. if (unlikely(staterr & E1000_RXDEXT_ERR_FRAME_ERR_MASK)) {
  3140. dev_kfree_skb_irq(skb);
  3141. goto next_desc;
  3142. }
  3143. length = le16_to_cpu(rx_desc->wb.middle.length0);
  3144. if (unlikely(!length)) {
  3145. E1000_DBG("%s: Last part of the packet spanning"
  3146. " multiple descriptors\n", netdev->name);
  3147. dev_kfree_skb_irq(skb);
  3148. goto next_desc;
  3149. }
  3150. /* Good Receive */
  3151. skb_put(skb, length);
  3152. for (j = 0; j < adapter->rx_ps_pages; j++) {
  3153. if (!(length = le16_to_cpu(rx_desc->wb.upper.length[j])))
  3154. break;
  3155. pci_unmap_page(pdev, ps_page_dma->ps_page_dma[j],
  3156. PAGE_SIZE, PCI_DMA_FROMDEVICE);
  3157. ps_page_dma->ps_page_dma[j] = 0;
  3158. skb_fill_page_desc(skb, j, ps_page->ps_page[j], 0,
  3159. length);
  3160. ps_page->ps_page[j] = NULL;
  3161. skb->len += length;
  3162. skb->data_len += length;
  3163. }
  3164. e1000_rx_checksum(adapter, staterr,
  3165. rx_desc->wb.lower.hi_dword.csum_ip.csum, skb);
  3166. skb->protocol = eth_type_trans(skb, netdev);
  3167. if (likely(rx_desc->wb.upper.header_status &
  3168. E1000_RXDPS_HDRSTAT_HDRSP))
  3169. adapter->rx_hdr_split++;
  3170. #ifdef CONFIG_E1000_NAPI
  3171. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3172. vlan_hwaccel_receive_skb(skb, adapter->vlgrp,
  3173. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3174. E1000_RXD_SPC_VLAN_MASK);
  3175. } else {
  3176. netif_receive_skb(skb);
  3177. }
  3178. #else /* CONFIG_E1000_NAPI */
  3179. if (unlikely(adapter->vlgrp && (staterr & E1000_RXD_STAT_VP))) {
  3180. vlan_hwaccel_rx(skb, adapter->vlgrp,
  3181. le16_to_cpu(rx_desc->wb.middle.vlan) &
  3182. E1000_RXD_SPC_VLAN_MASK);
  3183. } else {
  3184. netif_rx(skb);
  3185. }
  3186. #endif /* CONFIG_E1000_NAPI */
  3187. netdev->last_rx = jiffies;
  3188. next_desc:
  3189. rx_desc->wb.middle.status_error &= ~0xFF;
  3190. buffer_info->skb = NULL;
  3191. /* return some buffers to hardware, one at a time is too slow */
  3192. if (unlikely(cleaned_count >= E1000_RX_BUFFER_WRITE)) {
  3193. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3194. cleaned_count = 0;
  3195. }
  3196. rx_desc = next_rxd;
  3197. buffer_info = next_buffer;
  3198. staterr = le32_to_cpu(rx_desc->wb.middle.status_error);
  3199. }
  3200. rx_ring->next_to_clean = i;
  3201. cleaned_count = E1000_DESC_UNUSED(rx_ring);
  3202. if (cleaned_count)
  3203. adapter->alloc_rx_buf(adapter, rx_ring, cleaned_count);
  3204. return cleaned;
  3205. }
  3206. /**
  3207. * e1000_alloc_rx_buffers - Replace used receive buffers; legacy & extended
  3208. * @adapter: address of board private structure
  3209. **/
  3210. static void
  3211. e1000_alloc_rx_buffers(struct e1000_adapter *adapter,
  3212. struct e1000_rx_ring *rx_ring,
  3213. int cleaned_count)
  3214. {
  3215. struct net_device *netdev = adapter->netdev;
  3216. struct pci_dev *pdev = adapter->pdev;
  3217. struct e1000_rx_desc *rx_desc;
  3218. struct e1000_buffer *buffer_info;
  3219. struct sk_buff *skb;
  3220. unsigned int i;
  3221. unsigned int bufsz = adapter->rx_buffer_len + NET_IP_ALIGN;
  3222. i = rx_ring->next_to_use;
  3223. buffer_info = &rx_ring->buffer_info[i];
  3224. while (cleaned_count--) {
  3225. if (!(skb = buffer_info->skb))
  3226. skb = dev_alloc_skb(bufsz);
  3227. else {
  3228. skb_trim(skb, 0);
  3229. goto map_skb;
  3230. }
  3231. if (unlikely(!skb)) {
  3232. /* Better luck next round */
  3233. adapter->alloc_rx_buff_failed++;
  3234. break;
  3235. }
  3236. /* Fix for errata 23, can't cross 64kB boundary */
  3237. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3238. struct sk_buff *oldskb = skb;
  3239. DPRINTK(RX_ERR, ERR, "skb align check failed: %u bytes "
  3240. "at %p\n", bufsz, skb->data);
  3241. /* Try again, without freeing the previous */
  3242. skb = dev_alloc_skb(bufsz);
  3243. /* Failed allocation, critical failure */
  3244. if (!skb) {
  3245. dev_kfree_skb(oldskb);
  3246. break;
  3247. }
  3248. if (!e1000_check_64k_bound(adapter, skb->data, bufsz)) {
  3249. /* give up */
  3250. dev_kfree_skb(skb);
  3251. dev_kfree_skb(oldskb);
  3252. break; /* while !buffer_info->skb */
  3253. } else {
  3254. /* Use new allocation */
  3255. dev_kfree_skb(oldskb);
  3256. }
  3257. }
  3258. /* Make buffer alignment 2 beyond a 16 byte boundary
  3259. * this will result in a 16 byte aligned IP header after
  3260. * the 14 byte MAC header is removed
  3261. */
  3262. skb_reserve(skb, NET_IP_ALIGN);
  3263. skb->dev = netdev;
  3264. buffer_info->skb = skb;
  3265. buffer_info->length = adapter->rx_buffer_len;
  3266. map_skb:
  3267. buffer_info->dma = pci_map_single(pdev,
  3268. skb->data,
  3269. adapter->rx_buffer_len,
  3270. PCI_DMA_FROMDEVICE);
  3271. /* Fix for errata 23, can't cross 64kB boundary */
  3272. if (!e1000_check_64k_bound(adapter,
  3273. (void *)(unsigned long)buffer_info->dma,
  3274. adapter->rx_buffer_len)) {
  3275. DPRINTK(RX_ERR, ERR,
  3276. "dma align check failed: %u bytes at %p\n",
  3277. adapter->rx_buffer_len,
  3278. (void *)(unsigned long)buffer_info->dma);
  3279. dev_kfree_skb(skb);
  3280. buffer_info->skb = NULL;
  3281. pci_unmap_single(pdev, buffer_info->dma,
  3282. adapter->rx_buffer_len,
  3283. PCI_DMA_FROMDEVICE);
  3284. break; /* while !buffer_info->skb */
  3285. }
  3286. rx_desc = E1000_RX_DESC(*rx_ring, i);
  3287. rx_desc->buffer_addr = cpu_to_le64(buffer_info->dma);
  3288. if (unlikely(++i == rx_ring->count))
  3289. i = 0;
  3290. buffer_info = &rx_ring->buffer_info[i];
  3291. }
  3292. if (likely(rx_ring->next_to_use != i)) {
  3293. rx_ring->next_to_use = i;
  3294. if (unlikely(i-- == 0))
  3295. i = (rx_ring->count - 1);
  3296. /* Force memory writes to complete before letting h/w
  3297. * know there are new descriptors to fetch. (Only
  3298. * applicable for weak-ordered memory model archs,
  3299. * such as IA-64). */
  3300. wmb();
  3301. writel(i, adapter->hw.hw_addr + rx_ring->rdt);
  3302. }
  3303. }
  3304. /**
  3305. * e1000_alloc_rx_buffers_ps - Replace used receive buffers; packet split
  3306. * @adapter: address of board private structure
  3307. **/
  3308. static void
  3309. e1000_alloc_rx_buffers_ps(struct e1000_adapter *adapter,
  3310. struct e1000_rx_ring *rx_ring,
  3311. int cleaned_count)
  3312. {
  3313. struct net_device *netdev = adapter->netdev;
  3314. struct pci_dev *pdev = adapter->pdev;
  3315. union e1000_rx_desc_packet_split *rx_desc;
  3316. struct e1000_buffer *buffer_info;
  3317. struct e1000_ps_page *ps_page;
  3318. struct e1000_ps_page_dma *ps_page_dma;
  3319. struct sk_buff *skb;
  3320. unsigned int i, j;
  3321. i = rx_ring->next_to_use;
  3322. buffer_info = &rx_ring->buffer_info[i];
  3323. ps_page = &rx_ring->ps_page[i];
  3324. ps_page_dma = &rx_ring->ps_page_dma[i];
  3325. while (cleaned_count--) {
  3326. rx_desc = E1000_RX_DESC_PS(*rx_ring, i);
  3327. for (j = 0; j < PS_PAGE_BUFFERS; j++) {
  3328. if (j < adapter->rx_ps_pages) {
  3329. if (likely(!ps_page->ps_page[j])) {
  3330. ps_page->ps_page[j] =
  3331. alloc_page(GFP_ATOMIC);
  3332. if (unlikely(!ps_page->ps_page[j])) {
  3333. adapter->alloc_rx_buff_failed++;
  3334. goto no_buffers;
  3335. }
  3336. ps_page_dma->ps_page_dma[j] =
  3337. pci_map_page(pdev,
  3338. ps_page->ps_page[j],
  3339. 0, PAGE_SIZE,
  3340. PCI_DMA_FROMDEVICE);
  3341. }
  3342. /* Refresh the desc even if buffer_addrs didn't
  3343. * change because each write-back erases
  3344. * this info.
  3345. */
  3346. rx_desc->read.buffer_addr[j+1] =
  3347. cpu_to_le64(ps_page_dma->ps_page_dma[j]);
  3348. } else
  3349. rx_desc->read.buffer_addr[j+1] = ~0;
  3350. }
  3351. skb = dev_alloc_skb(adapter->rx_ps_bsize0 + NET_IP_ALIGN);
  3352. if (unlikely(!skb)) {
  3353. adapter->alloc_rx_buff_failed++;
  3354. break;
  3355. }
  3356. /* Make buffer alignment 2 beyond a 16 byte boundary
  3357. * this will result in a 16 byte aligned IP header after
  3358. * the 14 byte MAC header is removed
  3359. */
  3360. skb_reserve(skb, NET_IP_ALIGN);
  3361. skb->dev = netdev;
  3362. buffer_info->skb = skb;
  3363. buffer_info->length = adapter->rx_ps_bsize0;
  3364. buffer_info->dma = pci_map_single(pdev, skb->data,
  3365. adapter->rx_ps_bsize0,
  3366. PCI_DMA_FROMDEVICE);
  3367. rx_desc->read.buffer_addr[0] = cpu_to_le64(buffer_info->dma);
  3368. if (unlikely(++i == rx_ring->count)) i = 0;
  3369. buffer_info = &rx_ring->buffer_info[i];
  3370. ps_page = &rx_ring->ps_page[i];
  3371. ps_page_dma = &rx_ring->ps_page_dma[i];
  3372. }
  3373. no_buffers:
  3374. if (likely(rx_ring->next_to_use != i)) {
  3375. rx_ring->next_to_use = i;
  3376. if (unlikely(i-- == 0)) i = (rx_ring->count - 1);
  3377. /* Force memory writes to complete before letting h/w
  3378. * know there are new descriptors to fetch. (Only
  3379. * applicable for weak-ordered memory model archs,
  3380. * such as IA-64). */
  3381. wmb();
  3382. /* Hardware increments by 16 bytes, but packet split
  3383. * descriptors are 32 bytes...so we increment tail
  3384. * twice as much.
  3385. */
  3386. writel(i<<1, adapter->hw.hw_addr + rx_ring->rdt);
  3387. }
  3388. }
  3389. /**
  3390. * e1000_smartspeed - Workaround for SmartSpeed on 82541 and 82547 controllers.
  3391. * @adapter:
  3392. **/
  3393. static void
  3394. e1000_smartspeed(struct e1000_adapter *adapter)
  3395. {
  3396. uint16_t phy_status;
  3397. uint16_t phy_ctrl;
  3398. if ((adapter->hw.phy_type != e1000_phy_igp) || !adapter->hw.autoneg ||
  3399. !(adapter->hw.autoneg_advertised & ADVERTISE_1000_FULL))
  3400. return;
  3401. if (adapter->smartspeed == 0) {
  3402. /* If Master/Slave config fault is asserted twice,
  3403. * we assume back-to-back */
  3404. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3405. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3406. e1000_read_phy_reg(&adapter->hw, PHY_1000T_STATUS, &phy_status);
  3407. if (!(phy_status & SR_1000T_MS_CONFIG_FAULT)) return;
  3408. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3409. if (phy_ctrl & CR_1000T_MS_ENABLE) {
  3410. phy_ctrl &= ~CR_1000T_MS_ENABLE;
  3411. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL,
  3412. phy_ctrl);
  3413. adapter->smartspeed++;
  3414. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3415. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL,
  3416. &phy_ctrl)) {
  3417. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3418. MII_CR_RESTART_AUTO_NEG);
  3419. e1000_write_phy_reg(&adapter->hw, PHY_CTRL,
  3420. phy_ctrl);
  3421. }
  3422. }
  3423. return;
  3424. } else if (adapter->smartspeed == E1000_SMARTSPEED_DOWNSHIFT) {
  3425. /* If still no link, perhaps using 2/3 pair cable */
  3426. e1000_read_phy_reg(&adapter->hw, PHY_1000T_CTRL, &phy_ctrl);
  3427. phy_ctrl |= CR_1000T_MS_ENABLE;
  3428. e1000_write_phy_reg(&adapter->hw, PHY_1000T_CTRL, phy_ctrl);
  3429. if (!e1000_phy_setup_autoneg(&adapter->hw) &&
  3430. !e1000_read_phy_reg(&adapter->hw, PHY_CTRL, &phy_ctrl)) {
  3431. phy_ctrl |= (MII_CR_AUTO_NEG_EN |
  3432. MII_CR_RESTART_AUTO_NEG);
  3433. e1000_write_phy_reg(&adapter->hw, PHY_CTRL, phy_ctrl);
  3434. }
  3435. }
  3436. /* Restart process after E1000_SMARTSPEED_MAX iterations */
  3437. if (adapter->smartspeed++ == E1000_SMARTSPEED_MAX)
  3438. adapter->smartspeed = 0;
  3439. }
  3440. /**
  3441. * e1000_ioctl -
  3442. * @netdev:
  3443. * @ifreq:
  3444. * @cmd:
  3445. **/
  3446. static int
  3447. e1000_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3448. {
  3449. switch (cmd) {
  3450. case SIOCGMIIPHY:
  3451. case SIOCGMIIREG:
  3452. case SIOCSMIIREG:
  3453. return e1000_mii_ioctl(netdev, ifr, cmd);
  3454. default:
  3455. return -EOPNOTSUPP;
  3456. }
  3457. }
  3458. /**
  3459. * e1000_mii_ioctl -
  3460. * @netdev:
  3461. * @ifreq:
  3462. * @cmd:
  3463. **/
  3464. static int
  3465. e1000_mii_ioctl(struct net_device *netdev, struct ifreq *ifr, int cmd)
  3466. {
  3467. struct e1000_adapter *adapter = netdev_priv(netdev);
  3468. struct mii_ioctl_data *data = if_mii(ifr);
  3469. int retval;
  3470. uint16_t mii_reg;
  3471. uint16_t spddplx;
  3472. unsigned long flags;
  3473. if (adapter->hw.media_type != e1000_media_type_copper)
  3474. return -EOPNOTSUPP;
  3475. switch (cmd) {
  3476. case SIOCGMIIPHY:
  3477. data->phy_id = adapter->hw.phy_addr;
  3478. break;
  3479. case SIOCGMIIREG:
  3480. if (!capable(CAP_NET_ADMIN))
  3481. return -EPERM;
  3482. spin_lock_irqsave(&adapter->stats_lock, flags);
  3483. if (e1000_read_phy_reg(&adapter->hw, data->reg_num & 0x1F,
  3484. &data->val_out)) {
  3485. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3486. return -EIO;
  3487. }
  3488. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3489. break;
  3490. case SIOCSMIIREG:
  3491. if (!capable(CAP_NET_ADMIN))
  3492. return -EPERM;
  3493. if (data->reg_num & ~(0x1F))
  3494. return -EFAULT;
  3495. mii_reg = data->val_in;
  3496. spin_lock_irqsave(&adapter->stats_lock, flags);
  3497. if (e1000_write_phy_reg(&adapter->hw, data->reg_num,
  3498. mii_reg)) {
  3499. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3500. return -EIO;
  3501. }
  3502. if (adapter->hw.phy_type == e1000_phy_m88) {
  3503. switch (data->reg_num) {
  3504. case PHY_CTRL:
  3505. if (mii_reg & MII_CR_POWER_DOWN)
  3506. break;
  3507. if (mii_reg & MII_CR_AUTO_NEG_EN) {
  3508. adapter->hw.autoneg = 1;
  3509. adapter->hw.autoneg_advertised = 0x2F;
  3510. } else {
  3511. if (mii_reg & 0x40)
  3512. spddplx = SPEED_1000;
  3513. else if (mii_reg & 0x2000)
  3514. spddplx = SPEED_100;
  3515. else
  3516. spddplx = SPEED_10;
  3517. spddplx += (mii_reg & 0x100)
  3518. ? FULL_DUPLEX :
  3519. HALF_DUPLEX;
  3520. retval = e1000_set_spd_dplx(adapter,
  3521. spddplx);
  3522. if (retval) {
  3523. spin_unlock_irqrestore(
  3524. &adapter->stats_lock,
  3525. flags);
  3526. return retval;
  3527. }
  3528. }
  3529. if (netif_running(adapter->netdev)) {
  3530. e1000_down(adapter);
  3531. e1000_up(adapter);
  3532. } else
  3533. e1000_reset(adapter);
  3534. break;
  3535. case M88E1000_PHY_SPEC_CTRL:
  3536. case M88E1000_EXT_PHY_SPEC_CTRL:
  3537. if (e1000_phy_reset(&adapter->hw)) {
  3538. spin_unlock_irqrestore(
  3539. &adapter->stats_lock, flags);
  3540. return -EIO;
  3541. }
  3542. break;
  3543. }
  3544. } else {
  3545. switch (data->reg_num) {
  3546. case PHY_CTRL:
  3547. if (mii_reg & MII_CR_POWER_DOWN)
  3548. break;
  3549. if (netif_running(adapter->netdev)) {
  3550. e1000_down(adapter);
  3551. e1000_up(adapter);
  3552. } else
  3553. e1000_reset(adapter);
  3554. break;
  3555. }
  3556. }
  3557. spin_unlock_irqrestore(&adapter->stats_lock, flags);
  3558. break;
  3559. default:
  3560. return -EOPNOTSUPP;
  3561. }
  3562. return E1000_SUCCESS;
  3563. }
  3564. void
  3565. e1000_pci_set_mwi(struct e1000_hw *hw)
  3566. {
  3567. struct e1000_adapter *adapter = hw->back;
  3568. int ret_val = pci_set_mwi(adapter->pdev);
  3569. if (ret_val)
  3570. DPRINTK(PROBE, ERR, "Error in setting MWI\n");
  3571. }
  3572. void
  3573. e1000_pci_clear_mwi(struct e1000_hw *hw)
  3574. {
  3575. struct e1000_adapter *adapter = hw->back;
  3576. pci_clear_mwi(adapter->pdev);
  3577. }
  3578. void
  3579. e1000_read_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3580. {
  3581. struct e1000_adapter *adapter = hw->back;
  3582. pci_read_config_word(adapter->pdev, reg, value);
  3583. }
  3584. void
  3585. e1000_write_pci_cfg(struct e1000_hw *hw, uint32_t reg, uint16_t *value)
  3586. {
  3587. struct e1000_adapter *adapter = hw->back;
  3588. pci_write_config_word(adapter->pdev, reg, *value);
  3589. }
  3590. uint32_t
  3591. e1000_io_read(struct e1000_hw *hw, unsigned long port)
  3592. {
  3593. return inl(port);
  3594. }
  3595. void
  3596. e1000_io_write(struct e1000_hw *hw, unsigned long port, uint32_t value)
  3597. {
  3598. outl(value, port);
  3599. }
  3600. static void
  3601. e1000_vlan_rx_register(struct net_device *netdev, struct vlan_group *grp)
  3602. {
  3603. struct e1000_adapter *adapter = netdev_priv(netdev);
  3604. uint32_t ctrl, rctl;
  3605. e1000_irq_disable(adapter);
  3606. adapter->vlgrp = grp;
  3607. if (grp) {
  3608. /* enable VLAN tag insert/strip */
  3609. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3610. ctrl |= E1000_CTRL_VME;
  3611. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3612. /* enable VLAN receive filtering */
  3613. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3614. rctl |= E1000_RCTL_VFE;
  3615. rctl &= ~E1000_RCTL_CFIEN;
  3616. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3617. e1000_update_mng_vlan(adapter);
  3618. } else {
  3619. /* disable VLAN tag insert/strip */
  3620. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3621. ctrl &= ~E1000_CTRL_VME;
  3622. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3623. /* disable VLAN filtering */
  3624. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3625. rctl &= ~E1000_RCTL_VFE;
  3626. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3627. if (adapter->mng_vlan_id != (uint16_t)E1000_MNG_VLAN_NONE) {
  3628. e1000_vlan_rx_kill_vid(netdev, adapter->mng_vlan_id);
  3629. adapter->mng_vlan_id = E1000_MNG_VLAN_NONE;
  3630. }
  3631. }
  3632. e1000_irq_enable(adapter);
  3633. }
  3634. static void
  3635. e1000_vlan_rx_add_vid(struct net_device *netdev, uint16_t vid)
  3636. {
  3637. struct e1000_adapter *adapter = netdev_priv(netdev);
  3638. uint32_t vfta, index;
  3639. if ((adapter->hw.mng_cookie.status &
  3640. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3641. (vid == adapter->mng_vlan_id))
  3642. return;
  3643. /* add VID to filter table */
  3644. index = (vid >> 5) & 0x7F;
  3645. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3646. vfta |= (1 << (vid & 0x1F));
  3647. e1000_write_vfta(&adapter->hw, index, vfta);
  3648. }
  3649. static void
  3650. e1000_vlan_rx_kill_vid(struct net_device *netdev, uint16_t vid)
  3651. {
  3652. struct e1000_adapter *adapter = netdev_priv(netdev);
  3653. uint32_t vfta, index;
  3654. e1000_irq_disable(adapter);
  3655. if (adapter->vlgrp)
  3656. adapter->vlgrp->vlan_devices[vid] = NULL;
  3657. e1000_irq_enable(adapter);
  3658. if ((adapter->hw.mng_cookie.status &
  3659. E1000_MNG_DHCP_COOKIE_STATUS_VLAN_SUPPORT) &&
  3660. (vid == adapter->mng_vlan_id)) {
  3661. /* release control to f/w */
  3662. e1000_release_hw_control(adapter);
  3663. return;
  3664. }
  3665. /* remove VID from filter table */
  3666. index = (vid >> 5) & 0x7F;
  3667. vfta = E1000_READ_REG_ARRAY(&adapter->hw, VFTA, index);
  3668. vfta &= ~(1 << (vid & 0x1F));
  3669. e1000_write_vfta(&adapter->hw, index, vfta);
  3670. }
  3671. static void
  3672. e1000_restore_vlan(struct e1000_adapter *adapter)
  3673. {
  3674. e1000_vlan_rx_register(adapter->netdev, adapter->vlgrp);
  3675. if (adapter->vlgrp) {
  3676. uint16_t vid;
  3677. for (vid = 0; vid < VLAN_GROUP_ARRAY_LEN; vid++) {
  3678. if (!adapter->vlgrp->vlan_devices[vid])
  3679. continue;
  3680. e1000_vlan_rx_add_vid(adapter->netdev, vid);
  3681. }
  3682. }
  3683. }
  3684. int
  3685. e1000_set_spd_dplx(struct e1000_adapter *adapter, uint16_t spddplx)
  3686. {
  3687. adapter->hw.autoneg = 0;
  3688. /* Fiber NICs only allow 1000 gbps Full duplex */
  3689. if ((adapter->hw.media_type == e1000_media_type_fiber) &&
  3690. spddplx != (SPEED_1000 + DUPLEX_FULL)) {
  3691. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3692. return -EINVAL;
  3693. }
  3694. switch (spddplx) {
  3695. case SPEED_10 + DUPLEX_HALF:
  3696. adapter->hw.forced_speed_duplex = e1000_10_half;
  3697. break;
  3698. case SPEED_10 + DUPLEX_FULL:
  3699. adapter->hw.forced_speed_duplex = e1000_10_full;
  3700. break;
  3701. case SPEED_100 + DUPLEX_HALF:
  3702. adapter->hw.forced_speed_duplex = e1000_100_half;
  3703. break;
  3704. case SPEED_100 + DUPLEX_FULL:
  3705. adapter->hw.forced_speed_duplex = e1000_100_full;
  3706. break;
  3707. case SPEED_1000 + DUPLEX_FULL:
  3708. adapter->hw.autoneg = 1;
  3709. adapter->hw.autoneg_advertised = ADVERTISE_1000_FULL;
  3710. break;
  3711. case SPEED_1000 + DUPLEX_HALF: /* not supported */
  3712. default:
  3713. DPRINTK(PROBE, ERR, "Unsupported Speed/Duplex configuration\n");
  3714. return -EINVAL;
  3715. }
  3716. return 0;
  3717. }
  3718. #ifdef CONFIG_PM
  3719. /* these functions save and restore 16 or 64 dwords (64-256 bytes) of config
  3720. * space versus the 64 bytes that pci_[save|restore]_state handle
  3721. */
  3722. #define PCIE_CONFIG_SPACE_LEN 256
  3723. #define PCI_CONFIG_SPACE_LEN 64
  3724. static int
  3725. e1000_pci_save_state(struct e1000_adapter *adapter)
  3726. {
  3727. struct pci_dev *dev = adapter->pdev;
  3728. int size;
  3729. int i;
  3730. if (adapter->hw.mac_type >= e1000_82571)
  3731. size = PCIE_CONFIG_SPACE_LEN;
  3732. else
  3733. size = PCI_CONFIG_SPACE_LEN;
  3734. WARN_ON(adapter->config_space != NULL);
  3735. adapter->config_space = kmalloc(size, GFP_KERNEL);
  3736. if (!adapter->config_space) {
  3737. DPRINTK(PROBE, ERR, "unable to allocate %d bytes\n", size);
  3738. return -ENOMEM;
  3739. }
  3740. for (i = 0; i < (size / 4); i++)
  3741. pci_read_config_dword(dev, i * 4, &adapter->config_space[i]);
  3742. return 0;
  3743. }
  3744. static void
  3745. e1000_pci_restore_state(struct e1000_adapter *adapter)
  3746. {
  3747. struct pci_dev *dev = adapter->pdev;
  3748. int size;
  3749. int i;
  3750. if (adapter->config_space == NULL)
  3751. return;
  3752. if (adapter->hw.mac_type >= e1000_82571)
  3753. size = PCIE_CONFIG_SPACE_LEN;
  3754. else
  3755. size = PCI_CONFIG_SPACE_LEN;
  3756. for (i = 0; i < (size / 4); i++)
  3757. pci_write_config_dword(dev, i * 4, adapter->config_space[i]);
  3758. kfree(adapter->config_space);
  3759. adapter->config_space = NULL;
  3760. return;
  3761. }
  3762. #endif /* CONFIG_PM */
  3763. static int
  3764. e1000_suspend(struct pci_dev *pdev, pm_message_t state)
  3765. {
  3766. struct net_device *netdev = pci_get_drvdata(pdev);
  3767. struct e1000_adapter *adapter = netdev_priv(netdev);
  3768. uint32_t ctrl, ctrl_ext, rctl, manc, status;
  3769. uint32_t wufc = adapter->wol;
  3770. int retval = 0;
  3771. netif_device_detach(netdev);
  3772. if (netif_running(netdev))
  3773. e1000_down(adapter);
  3774. #ifdef CONFIG_PM
  3775. /* implement our own version of pci_save_state(pdev) because pci
  3776. * express adapters have larger 256 byte config spaces */
  3777. retval = e1000_pci_save_state(adapter);
  3778. if (retval)
  3779. return retval;
  3780. #endif
  3781. status = E1000_READ_REG(&adapter->hw, STATUS);
  3782. if (status & E1000_STATUS_LU)
  3783. wufc &= ~E1000_WUFC_LNKC;
  3784. if (wufc) {
  3785. e1000_setup_rctl(adapter);
  3786. e1000_set_multi(netdev);
  3787. /* turn on all-multi mode if wake on multicast is enabled */
  3788. if (adapter->wol & E1000_WUFC_MC) {
  3789. rctl = E1000_READ_REG(&adapter->hw, RCTL);
  3790. rctl |= E1000_RCTL_MPE;
  3791. E1000_WRITE_REG(&adapter->hw, RCTL, rctl);
  3792. }
  3793. if (adapter->hw.mac_type >= e1000_82540) {
  3794. ctrl = E1000_READ_REG(&adapter->hw, CTRL);
  3795. /* advertise wake from D3Cold */
  3796. #define E1000_CTRL_ADVD3WUC 0x00100000
  3797. /* phy power management enable */
  3798. #define E1000_CTRL_EN_PHY_PWR_MGMT 0x00200000
  3799. ctrl |= E1000_CTRL_ADVD3WUC |
  3800. E1000_CTRL_EN_PHY_PWR_MGMT;
  3801. E1000_WRITE_REG(&adapter->hw, CTRL, ctrl);
  3802. }
  3803. if (adapter->hw.media_type == e1000_media_type_fiber ||
  3804. adapter->hw.media_type == e1000_media_type_internal_serdes) {
  3805. /* keep the laser running in D3 */
  3806. ctrl_ext = E1000_READ_REG(&adapter->hw, CTRL_EXT);
  3807. ctrl_ext |= E1000_CTRL_EXT_SDP7_DATA;
  3808. E1000_WRITE_REG(&adapter->hw, CTRL_EXT, ctrl_ext);
  3809. }
  3810. /* Allow time for pending master requests to run */
  3811. e1000_disable_pciex_master(&adapter->hw);
  3812. E1000_WRITE_REG(&adapter->hw, WUC, E1000_WUC_PME_EN);
  3813. E1000_WRITE_REG(&adapter->hw, WUFC, wufc);
  3814. retval = pci_enable_wake(pdev, PCI_D3hot, 1);
  3815. if (retval)
  3816. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3817. retval = pci_enable_wake(pdev, PCI_D3cold, 1);
  3818. if (retval)
  3819. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3820. } else {
  3821. E1000_WRITE_REG(&adapter->hw, WUC, 0);
  3822. E1000_WRITE_REG(&adapter->hw, WUFC, 0);
  3823. retval = pci_enable_wake(pdev, PCI_D3hot, 0);
  3824. if (retval)
  3825. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3826. retval = pci_enable_wake(pdev, PCI_D3cold, 0); /* 4 == D3 cold */
  3827. if (retval)
  3828. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3829. }
  3830. if (adapter->hw.mac_type >= e1000_82540 &&
  3831. adapter->hw.media_type == e1000_media_type_copper) {
  3832. manc = E1000_READ_REG(&adapter->hw, MANC);
  3833. if (manc & E1000_MANC_SMBUS_EN) {
  3834. manc |= E1000_MANC_ARP_EN;
  3835. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3836. retval = pci_enable_wake(pdev, PCI_D3hot, 1);
  3837. if (retval)
  3838. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3839. retval = pci_enable_wake(pdev, PCI_D3cold, 1);
  3840. if (retval)
  3841. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3842. }
  3843. }
  3844. /* Release control of h/w to f/w. If f/w is AMT enabled, this
  3845. * would have already happened in close and is redundant. */
  3846. e1000_release_hw_control(adapter);
  3847. pci_disable_device(pdev);
  3848. retval = pci_set_power_state(pdev, pci_choose_state(pdev, state));
  3849. if (retval)
  3850. DPRINTK(PROBE, ERR, "Error in setting power state\n");
  3851. return 0;
  3852. }
  3853. #ifdef CONFIG_PM
  3854. static int
  3855. e1000_resume(struct pci_dev *pdev)
  3856. {
  3857. struct net_device *netdev = pci_get_drvdata(pdev);
  3858. struct e1000_adapter *adapter = netdev_priv(netdev);
  3859. int retval;
  3860. uint32_t manc, ret_val;
  3861. retval = pci_set_power_state(pdev, PCI_D0);
  3862. if (retval)
  3863. DPRINTK(PROBE, ERR, "Error in setting power state\n");
  3864. e1000_pci_restore_state(adapter);
  3865. ret_val = pci_enable_device(pdev);
  3866. pci_set_master(pdev);
  3867. retval = pci_enable_wake(pdev, PCI_D3hot, 0);
  3868. if (retval)
  3869. DPRINTK(PROBE, ERR, "Error enabling D3 wake\n");
  3870. retval = pci_enable_wake(pdev, PCI_D3cold, 0);
  3871. if (retval)
  3872. DPRINTK(PROBE, ERR, "Error enabling D3 cold wake\n");
  3873. e1000_reset(adapter);
  3874. E1000_WRITE_REG(&adapter->hw, WUS, ~0);
  3875. if (netif_running(netdev))
  3876. e1000_up(adapter);
  3877. netif_device_attach(netdev);
  3878. if (adapter->hw.mac_type >= e1000_82540 &&
  3879. adapter->hw.media_type == e1000_media_type_copper) {
  3880. manc = E1000_READ_REG(&adapter->hw, MANC);
  3881. manc &= ~(E1000_MANC_ARP_EN);
  3882. E1000_WRITE_REG(&adapter->hw, MANC, manc);
  3883. }
  3884. /* If the controller is 82573 and f/w is AMT, do not set
  3885. * DRV_LOAD until the interface is up. For all other cases,
  3886. * let the f/w know that the h/w is now under the control
  3887. * of the driver. */
  3888. if (adapter->hw.mac_type != e1000_82573 ||
  3889. !e1000_check_mng_mode(&adapter->hw))
  3890. e1000_get_hw_control(adapter);
  3891. return 0;
  3892. }
  3893. #endif
  3894. #ifdef CONFIG_NET_POLL_CONTROLLER
  3895. /*
  3896. * Polling 'interrupt' - used by things like netconsole to send skbs
  3897. * without having to re-enable interrupts. It's not called while
  3898. * the interrupt routine is executing.
  3899. */
  3900. static void
  3901. e1000_netpoll(struct net_device *netdev)
  3902. {
  3903. struct e1000_adapter *adapter = netdev_priv(netdev);
  3904. disable_irq(adapter->pdev->irq);
  3905. e1000_intr(adapter->pdev->irq, netdev, NULL);
  3906. e1000_clean_tx_irq(adapter, adapter->tx_ring);
  3907. #ifndef CONFIG_E1000_NAPI
  3908. adapter->clean_rx(adapter, adapter->rx_ring);
  3909. #endif
  3910. enable_irq(adapter->pdev->irq);
  3911. }
  3912. #endif
  3913. /* e1000_main.c */