uhci-q.c 40 KB

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  1. /*
  2. * Universal Host Controller Interface driver for USB.
  3. *
  4. * Maintainer: Alan Stern <stern@rowland.harvard.edu>
  5. *
  6. * (C) Copyright 1999 Linus Torvalds
  7. * (C) Copyright 1999-2002 Johannes Erdfelt, johannes@erdfelt.com
  8. * (C) Copyright 1999 Randy Dunlap
  9. * (C) Copyright 1999 Georg Acher, acher@in.tum.de
  10. * (C) Copyright 1999 Deti Fliegl, deti@fliegl.de
  11. * (C) Copyright 1999 Thomas Sailer, sailer@ife.ee.ethz.ch
  12. * (C) Copyright 1999 Roman Weissgaerber, weissg@vienna.at
  13. * (C) Copyright 2000 Yggdrasil Computing, Inc. (port of new PCI interface
  14. * support from usb-ohci.c by Adam Richter, adam@yggdrasil.com).
  15. * (C) Copyright 1999 Gregory P. Smith (from usb-ohci.c)
  16. * (C) Copyright 2004-2006 Alan Stern, stern@rowland.harvard.edu
  17. */
  18. /*
  19. * Technically, updating td->status here is a race, but it's not really a
  20. * problem. The worst that can happen is that we set the IOC bit again
  21. * generating a spurious interrupt. We could fix this by creating another
  22. * QH and leaving the IOC bit always set, but then we would have to play
  23. * games with the FSBR code to make sure we get the correct order in all
  24. * the cases. I don't think it's worth the effort
  25. */
  26. static void uhci_set_next_interrupt(struct uhci_hcd *uhci)
  27. {
  28. if (uhci->is_stopped)
  29. mod_timer(&uhci_to_hcd(uhci)->rh_timer, jiffies);
  30. uhci->term_td->status |= cpu_to_le32(TD_CTRL_IOC);
  31. }
  32. static inline void uhci_clear_next_interrupt(struct uhci_hcd *uhci)
  33. {
  34. uhci->term_td->status &= ~cpu_to_le32(TD_CTRL_IOC);
  35. }
  36. /*
  37. * Full-Speed Bandwidth Reclamation (FSBR).
  38. * We turn on FSBR whenever a queue that wants it is advancing,
  39. * and leave it on for a short time thereafter.
  40. */
  41. static void uhci_fsbr_on(struct uhci_hcd *uhci)
  42. {
  43. uhci->fsbr_is_on = 1;
  44. uhci->skel_term_qh->link = cpu_to_le32(
  45. uhci->skel_fs_control_qh->dma_handle) | UHCI_PTR_QH;
  46. }
  47. static void uhci_fsbr_off(struct uhci_hcd *uhci)
  48. {
  49. uhci->fsbr_is_on = 0;
  50. uhci->skel_term_qh->link = UHCI_PTR_TERM;
  51. }
  52. static void uhci_add_fsbr(struct uhci_hcd *uhci, struct urb *urb)
  53. {
  54. struct urb_priv *urbp = urb->hcpriv;
  55. if (!(urb->transfer_flags & URB_NO_FSBR))
  56. urbp->fsbr = 1;
  57. }
  58. static void uhci_urbp_wants_fsbr(struct uhci_hcd *uhci, struct urb_priv *urbp)
  59. {
  60. if (urbp->fsbr) {
  61. uhci->fsbr_is_wanted = 1;
  62. if (!uhci->fsbr_is_on)
  63. uhci_fsbr_on(uhci);
  64. else if (uhci->fsbr_expiring) {
  65. uhci->fsbr_expiring = 0;
  66. del_timer(&uhci->fsbr_timer);
  67. }
  68. }
  69. }
  70. static void uhci_fsbr_timeout(unsigned long _uhci)
  71. {
  72. struct uhci_hcd *uhci = (struct uhci_hcd *) _uhci;
  73. unsigned long flags;
  74. spin_lock_irqsave(&uhci->lock, flags);
  75. if (uhci->fsbr_expiring) {
  76. uhci->fsbr_expiring = 0;
  77. uhci_fsbr_off(uhci);
  78. }
  79. spin_unlock_irqrestore(&uhci->lock, flags);
  80. }
  81. static struct uhci_td *uhci_alloc_td(struct uhci_hcd *uhci)
  82. {
  83. dma_addr_t dma_handle;
  84. struct uhci_td *td;
  85. td = dma_pool_alloc(uhci->td_pool, GFP_ATOMIC, &dma_handle);
  86. if (!td)
  87. return NULL;
  88. td->dma_handle = dma_handle;
  89. td->frame = -1;
  90. INIT_LIST_HEAD(&td->list);
  91. INIT_LIST_HEAD(&td->fl_list);
  92. return td;
  93. }
  94. static void uhci_free_td(struct uhci_hcd *uhci, struct uhci_td *td)
  95. {
  96. if (!list_empty(&td->list))
  97. dev_warn(uhci_dev(uhci), "td %p still in list!\n", td);
  98. if (!list_empty(&td->fl_list))
  99. dev_warn(uhci_dev(uhci), "td %p still in fl_list!\n", td);
  100. dma_pool_free(uhci->td_pool, td, td->dma_handle);
  101. }
  102. static inline void uhci_fill_td(struct uhci_td *td, u32 status,
  103. u32 token, u32 buffer)
  104. {
  105. td->status = cpu_to_le32(status);
  106. td->token = cpu_to_le32(token);
  107. td->buffer = cpu_to_le32(buffer);
  108. }
  109. static void uhci_add_td_to_urbp(struct uhci_td *td, struct urb_priv *urbp)
  110. {
  111. list_add_tail(&td->list, &urbp->td_list);
  112. }
  113. static void uhci_remove_td_from_urbp(struct uhci_td *td)
  114. {
  115. list_del_init(&td->list);
  116. }
  117. /*
  118. * We insert Isochronous URBs directly into the frame list at the beginning
  119. */
  120. static inline void uhci_insert_td_in_frame_list(struct uhci_hcd *uhci,
  121. struct uhci_td *td, unsigned framenum)
  122. {
  123. framenum &= (UHCI_NUMFRAMES - 1);
  124. td->frame = framenum;
  125. /* Is there a TD already mapped there? */
  126. if (uhci->frame_cpu[framenum]) {
  127. struct uhci_td *ftd, *ltd;
  128. ftd = uhci->frame_cpu[framenum];
  129. ltd = list_entry(ftd->fl_list.prev, struct uhci_td, fl_list);
  130. list_add_tail(&td->fl_list, &ftd->fl_list);
  131. td->link = ltd->link;
  132. wmb();
  133. ltd->link = cpu_to_le32(td->dma_handle);
  134. } else {
  135. td->link = uhci->frame[framenum];
  136. wmb();
  137. uhci->frame[framenum] = cpu_to_le32(td->dma_handle);
  138. uhci->frame_cpu[framenum] = td;
  139. }
  140. }
  141. static inline void uhci_remove_td_from_frame_list(struct uhci_hcd *uhci,
  142. struct uhci_td *td)
  143. {
  144. /* If it's not inserted, don't remove it */
  145. if (td->frame == -1) {
  146. WARN_ON(!list_empty(&td->fl_list));
  147. return;
  148. }
  149. if (uhci->frame_cpu[td->frame] == td) {
  150. if (list_empty(&td->fl_list)) {
  151. uhci->frame[td->frame] = td->link;
  152. uhci->frame_cpu[td->frame] = NULL;
  153. } else {
  154. struct uhci_td *ntd;
  155. ntd = list_entry(td->fl_list.next, struct uhci_td, fl_list);
  156. uhci->frame[td->frame] = cpu_to_le32(ntd->dma_handle);
  157. uhci->frame_cpu[td->frame] = ntd;
  158. }
  159. } else {
  160. struct uhci_td *ptd;
  161. ptd = list_entry(td->fl_list.prev, struct uhci_td, fl_list);
  162. ptd->link = td->link;
  163. }
  164. list_del_init(&td->fl_list);
  165. td->frame = -1;
  166. }
  167. static inline void uhci_remove_tds_from_frame(struct uhci_hcd *uhci,
  168. unsigned int framenum)
  169. {
  170. struct uhci_td *ftd, *ltd;
  171. framenum &= (UHCI_NUMFRAMES - 1);
  172. ftd = uhci->frame_cpu[framenum];
  173. if (ftd) {
  174. ltd = list_entry(ftd->fl_list.prev, struct uhci_td, fl_list);
  175. uhci->frame[framenum] = ltd->link;
  176. uhci->frame_cpu[framenum] = NULL;
  177. while (!list_empty(&ftd->fl_list))
  178. list_del_init(ftd->fl_list.prev);
  179. }
  180. }
  181. /*
  182. * Remove all the TDs for an Isochronous URB from the frame list
  183. */
  184. static void uhci_unlink_isochronous_tds(struct uhci_hcd *uhci, struct urb *urb)
  185. {
  186. struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
  187. struct uhci_td *td;
  188. list_for_each_entry(td, &urbp->td_list, list)
  189. uhci_remove_td_from_frame_list(uhci, td);
  190. }
  191. static struct uhci_qh *uhci_alloc_qh(struct uhci_hcd *uhci,
  192. struct usb_device *udev, struct usb_host_endpoint *hep)
  193. {
  194. dma_addr_t dma_handle;
  195. struct uhci_qh *qh;
  196. qh = dma_pool_alloc(uhci->qh_pool, GFP_ATOMIC, &dma_handle);
  197. if (!qh)
  198. return NULL;
  199. memset(qh, 0, sizeof(*qh));
  200. qh->dma_handle = dma_handle;
  201. qh->element = UHCI_PTR_TERM;
  202. qh->link = UHCI_PTR_TERM;
  203. INIT_LIST_HEAD(&qh->queue);
  204. INIT_LIST_HEAD(&qh->node);
  205. if (udev) { /* Normal QH */
  206. qh->type = hep->desc.bmAttributes & USB_ENDPOINT_XFERTYPE_MASK;
  207. if (qh->type != USB_ENDPOINT_XFER_ISOC) {
  208. qh->dummy_td = uhci_alloc_td(uhci);
  209. if (!qh->dummy_td) {
  210. dma_pool_free(uhci->qh_pool, qh, dma_handle);
  211. return NULL;
  212. }
  213. }
  214. qh->state = QH_STATE_IDLE;
  215. qh->hep = hep;
  216. qh->udev = udev;
  217. hep->hcpriv = qh;
  218. } else { /* Skeleton QH */
  219. qh->state = QH_STATE_ACTIVE;
  220. qh->type = -1;
  221. }
  222. return qh;
  223. }
  224. static void uhci_free_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
  225. {
  226. WARN_ON(qh->state != QH_STATE_IDLE && qh->udev);
  227. if (!list_empty(&qh->queue))
  228. dev_warn(uhci_dev(uhci), "qh %p list not empty!\n", qh);
  229. list_del(&qh->node);
  230. if (qh->udev) {
  231. qh->hep->hcpriv = NULL;
  232. if (qh->dummy_td)
  233. uhci_free_td(uhci, qh->dummy_td);
  234. }
  235. dma_pool_free(uhci->qh_pool, qh, qh->dma_handle);
  236. }
  237. /*
  238. * When a queue is stopped and a dequeued URB is given back, adjust
  239. * the previous TD link (if the URB isn't first on the queue) or
  240. * save its toggle value (if it is first and is currently executing).
  241. *
  242. * Returns 0 if the URB should not yet be given back, 1 otherwise.
  243. */
  244. static int uhci_cleanup_queue(struct uhci_hcd *uhci, struct uhci_qh *qh,
  245. struct urb *urb)
  246. {
  247. struct urb_priv *urbp = urb->hcpriv;
  248. struct uhci_td *td;
  249. int ret = 1;
  250. /* Isochronous pipes don't use toggles and their TD link pointers
  251. * get adjusted during uhci_urb_dequeue(). But since their queues
  252. * cannot truly be stopped, we have to watch out for dequeues
  253. * occurring after the nominal unlink frame. */
  254. if (qh->type == USB_ENDPOINT_XFER_ISOC) {
  255. ret = (uhci->frame_number + uhci->is_stopped !=
  256. qh->unlink_frame);
  257. goto done;
  258. }
  259. /* If the URB isn't first on its queue, adjust the link pointer
  260. * of the last TD in the previous URB. The toggle doesn't need
  261. * to be saved since this URB can't be executing yet. */
  262. if (qh->queue.next != &urbp->node) {
  263. struct urb_priv *purbp;
  264. struct uhci_td *ptd;
  265. purbp = list_entry(urbp->node.prev, struct urb_priv, node);
  266. WARN_ON(list_empty(&purbp->td_list));
  267. ptd = list_entry(purbp->td_list.prev, struct uhci_td,
  268. list);
  269. td = list_entry(urbp->td_list.prev, struct uhci_td,
  270. list);
  271. ptd->link = td->link;
  272. goto done;
  273. }
  274. /* If the QH element pointer is UHCI_PTR_TERM then then currently
  275. * executing URB has already been unlinked, so this one isn't it. */
  276. if (qh_element(qh) == UHCI_PTR_TERM)
  277. goto done;
  278. qh->element = UHCI_PTR_TERM;
  279. /* Control pipes don't have to worry about toggles */
  280. if (qh->type == USB_ENDPOINT_XFER_CONTROL)
  281. goto done;
  282. /* Save the next toggle value */
  283. WARN_ON(list_empty(&urbp->td_list));
  284. td = list_entry(urbp->td_list.next, struct uhci_td, list);
  285. qh->needs_fixup = 1;
  286. qh->initial_toggle = uhci_toggle(td_token(td));
  287. done:
  288. return ret;
  289. }
  290. /*
  291. * Fix up the data toggles for URBs in a queue, when one of them
  292. * terminates early (short transfer, error, or dequeued).
  293. */
  294. static void uhci_fixup_toggles(struct uhci_qh *qh, int skip_first)
  295. {
  296. struct urb_priv *urbp = NULL;
  297. struct uhci_td *td;
  298. unsigned int toggle = qh->initial_toggle;
  299. unsigned int pipe;
  300. /* Fixups for a short transfer start with the second URB in the
  301. * queue (the short URB is the first). */
  302. if (skip_first)
  303. urbp = list_entry(qh->queue.next, struct urb_priv, node);
  304. /* When starting with the first URB, if the QH element pointer is
  305. * still valid then we know the URB's toggles are okay. */
  306. else if (qh_element(qh) != UHCI_PTR_TERM)
  307. toggle = 2;
  308. /* Fix up the toggle for the URBs in the queue. Normally this
  309. * loop won't run more than once: When an error or short transfer
  310. * occurs, the queue usually gets emptied. */
  311. urbp = list_prepare_entry(urbp, &qh->queue, node);
  312. list_for_each_entry_continue(urbp, &qh->queue, node) {
  313. /* If the first TD has the right toggle value, we don't
  314. * need to change any toggles in this URB */
  315. td = list_entry(urbp->td_list.next, struct uhci_td, list);
  316. if (toggle > 1 || uhci_toggle(td_token(td)) == toggle) {
  317. td = list_entry(urbp->td_list.prev, struct uhci_td,
  318. list);
  319. toggle = uhci_toggle(td_token(td)) ^ 1;
  320. /* Otherwise all the toggles in the URB have to be switched */
  321. } else {
  322. list_for_each_entry(td, &urbp->td_list, list) {
  323. td->token ^= __constant_cpu_to_le32(
  324. TD_TOKEN_TOGGLE);
  325. toggle ^= 1;
  326. }
  327. }
  328. }
  329. wmb();
  330. pipe = list_entry(qh->queue.next, struct urb_priv, node)->urb->pipe;
  331. usb_settoggle(qh->udev, usb_pipeendpoint(pipe),
  332. usb_pipeout(pipe), toggle);
  333. qh->needs_fixup = 0;
  334. }
  335. /*
  336. * Put a QH on the schedule in both hardware and software
  337. */
  338. static void uhci_activate_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
  339. {
  340. struct uhci_qh *pqh;
  341. WARN_ON(list_empty(&qh->queue));
  342. /* Set the element pointer if it isn't set already.
  343. * This isn't needed for Isochronous queues, but it doesn't hurt. */
  344. if (qh_element(qh) == UHCI_PTR_TERM) {
  345. struct urb_priv *urbp = list_entry(qh->queue.next,
  346. struct urb_priv, node);
  347. struct uhci_td *td = list_entry(urbp->td_list.next,
  348. struct uhci_td, list);
  349. qh->element = cpu_to_le32(td->dma_handle);
  350. }
  351. /* Treat the queue as if it has just advanced */
  352. qh->wait_expired = 0;
  353. qh->advance_jiffies = jiffies;
  354. if (qh->state == QH_STATE_ACTIVE)
  355. return;
  356. qh->state = QH_STATE_ACTIVE;
  357. /* Move the QH from its old list to the end of the appropriate
  358. * skeleton's list */
  359. if (qh == uhci->next_qh)
  360. uhci->next_qh = list_entry(qh->node.next, struct uhci_qh,
  361. node);
  362. list_move_tail(&qh->node, &qh->skel->node);
  363. /* Link it into the schedule */
  364. pqh = list_entry(qh->node.prev, struct uhci_qh, node);
  365. qh->link = pqh->link;
  366. wmb();
  367. pqh->link = UHCI_PTR_QH | cpu_to_le32(qh->dma_handle);
  368. }
  369. /*
  370. * Take a QH off the hardware schedule
  371. */
  372. static void uhci_unlink_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
  373. {
  374. struct uhci_qh *pqh;
  375. if (qh->state == QH_STATE_UNLINKING)
  376. return;
  377. WARN_ON(qh->state != QH_STATE_ACTIVE || !qh->udev);
  378. qh->state = QH_STATE_UNLINKING;
  379. /* Unlink the QH from the schedule and record when we did it */
  380. pqh = list_entry(qh->node.prev, struct uhci_qh, node);
  381. pqh->link = qh->link;
  382. mb();
  383. uhci_get_current_frame_number(uhci);
  384. qh->unlink_frame = uhci->frame_number;
  385. /* Force an interrupt so we know when the QH is fully unlinked */
  386. if (list_empty(&uhci->skel_unlink_qh->node))
  387. uhci_set_next_interrupt(uhci);
  388. /* Move the QH from its old list to the end of the unlinking list */
  389. if (qh == uhci->next_qh)
  390. uhci->next_qh = list_entry(qh->node.next, struct uhci_qh,
  391. node);
  392. list_move_tail(&qh->node, &uhci->skel_unlink_qh->node);
  393. }
  394. /*
  395. * When we and the controller are through with a QH, it becomes IDLE.
  396. * This happens when a QH has been off the schedule (on the unlinking
  397. * list) for more than one frame, or when an error occurs while adding
  398. * the first URB onto a new QH.
  399. */
  400. static void uhci_make_qh_idle(struct uhci_hcd *uhci, struct uhci_qh *qh)
  401. {
  402. WARN_ON(qh->state == QH_STATE_ACTIVE);
  403. if (qh == uhci->next_qh)
  404. uhci->next_qh = list_entry(qh->node.next, struct uhci_qh,
  405. node);
  406. list_move(&qh->node, &uhci->idle_qh_list);
  407. qh->state = QH_STATE_IDLE;
  408. /* Now that the QH is idle, its post_td isn't being used */
  409. if (qh->post_td) {
  410. uhci_free_td(uhci, qh->post_td);
  411. qh->post_td = NULL;
  412. }
  413. /* If anyone is waiting for a QH to become idle, wake them up */
  414. if (uhci->num_waiting)
  415. wake_up_all(&uhci->waitqh);
  416. }
  417. static inline struct urb_priv *uhci_alloc_urb_priv(struct uhci_hcd *uhci,
  418. struct urb *urb)
  419. {
  420. struct urb_priv *urbp;
  421. urbp = kmem_cache_alloc(uhci_up_cachep, GFP_ATOMIC);
  422. if (!urbp)
  423. return NULL;
  424. memset((void *)urbp, 0, sizeof(*urbp));
  425. urbp->urb = urb;
  426. urb->hcpriv = urbp;
  427. INIT_LIST_HEAD(&urbp->node);
  428. INIT_LIST_HEAD(&urbp->td_list);
  429. return urbp;
  430. }
  431. static void uhci_free_urb_priv(struct uhci_hcd *uhci,
  432. struct urb_priv *urbp)
  433. {
  434. struct uhci_td *td, *tmp;
  435. if (!list_empty(&urbp->node))
  436. dev_warn(uhci_dev(uhci), "urb %p still on QH's list!\n",
  437. urbp->urb);
  438. list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
  439. uhci_remove_td_from_urbp(td);
  440. uhci_free_td(uhci, td);
  441. }
  442. urbp->urb->hcpriv = NULL;
  443. kmem_cache_free(uhci_up_cachep, urbp);
  444. }
  445. /*
  446. * Map status to standard result codes
  447. *
  448. * <status> is (td_status(td) & 0xF60000), a.k.a.
  449. * uhci_status_bits(td_status(td)).
  450. * Note: <status> does not include the TD_CTRL_NAK bit.
  451. * <dir_out> is True for output TDs and False for input TDs.
  452. */
  453. static int uhci_map_status(int status, int dir_out)
  454. {
  455. if (!status)
  456. return 0;
  457. if (status & TD_CTRL_BITSTUFF) /* Bitstuff error */
  458. return -EPROTO;
  459. if (status & TD_CTRL_CRCTIMEO) { /* CRC/Timeout */
  460. if (dir_out)
  461. return -EPROTO;
  462. else
  463. return -EILSEQ;
  464. }
  465. if (status & TD_CTRL_BABBLE) /* Babble */
  466. return -EOVERFLOW;
  467. if (status & TD_CTRL_DBUFERR) /* Buffer error */
  468. return -ENOSR;
  469. if (status & TD_CTRL_STALLED) /* Stalled */
  470. return -EPIPE;
  471. return 0;
  472. }
  473. /*
  474. * Control transfers
  475. */
  476. static int uhci_submit_control(struct uhci_hcd *uhci, struct urb *urb,
  477. struct uhci_qh *qh)
  478. {
  479. struct uhci_td *td;
  480. unsigned long destination, status;
  481. int maxsze = le16_to_cpu(qh->hep->desc.wMaxPacketSize);
  482. int len = urb->transfer_buffer_length;
  483. dma_addr_t data = urb->transfer_dma;
  484. __le32 *plink;
  485. struct urb_priv *urbp = urb->hcpriv;
  486. /* The "pipe" thing contains the destination in bits 8--18 */
  487. destination = (urb->pipe & PIPE_DEVEP_MASK) | USB_PID_SETUP;
  488. /* 3 errors, dummy TD remains inactive */
  489. status = uhci_maxerr(3);
  490. if (urb->dev->speed == USB_SPEED_LOW)
  491. status |= TD_CTRL_LS;
  492. /*
  493. * Build the TD for the control request setup packet
  494. */
  495. td = qh->dummy_td;
  496. uhci_add_td_to_urbp(td, urbp);
  497. uhci_fill_td(td, status, destination | uhci_explen(8),
  498. urb->setup_dma);
  499. plink = &td->link;
  500. status |= TD_CTRL_ACTIVE;
  501. /*
  502. * If direction is "send", change the packet ID from SETUP (0x2D)
  503. * to OUT (0xE1). Else change it from SETUP to IN (0x69) and
  504. * set Short Packet Detect (SPD) for all data packets.
  505. */
  506. if (usb_pipeout(urb->pipe))
  507. destination ^= (USB_PID_SETUP ^ USB_PID_OUT);
  508. else {
  509. destination ^= (USB_PID_SETUP ^ USB_PID_IN);
  510. status |= TD_CTRL_SPD;
  511. }
  512. /*
  513. * Build the DATA TDs
  514. */
  515. while (len > 0) {
  516. int pktsze = min(len, maxsze);
  517. td = uhci_alloc_td(uhci);
  518. if (!td)
  519. goto nomem;
  520. *plink = cpu_to_le32(td->dma_handle);
  521. /* Alternate Data0/1 (start with Data1) */
  522. destination ^= TD_TOKEN_TOGGLE;
  523. uhci_add_td_to_urbp(td, urbp);
  524. uhci_fill_td(td, status, destination | uhci_explen(pktsze),
  525. data);
  526. plink = &td->link;
  527. data += pktsze;
  528. len -= pktsze;
  529. }
  530. /*
  531. * Build the final TD for control status
  532. */
  533. td = uhci_alloc_td(uhci);
  534. if (!td)
  535. goto nomem;
  536. *plink = cpu_to_le32(td->dma_handle);
  537. /*
  538. * It's IN if the pipe is an output pipe or we're not expecting
  539. * data back.
  540. */
  541. destination &= ~TD_TOKEN_PID_MASK;
  542. if (usb_pipeout(urb->pipe) || !urb->transfer_buffer_length)
  543. destination |= USB_PID_IN;
  544. else
  545. destination |= USB_PID_OUT;
  546. destination |= TD_TOKEN_TOGGLE; /* End in Data1 */
  547. status &= ~TD_CTRL_SPD;
  548. uhci_add_td_to_urbp(td, urbp);
  549. uhci_fill_td(td, status | TD_CTRL_IOC,
  550. destination | uhci_explen(0), 0);
  551. plink = &td->link;
  552. /*
  553. * Build the new dummy TD and activate the old one
  554. */
  555. td = uhci_alloc_td(uhci);
  556. if (!td)
  557. goto nomem;
  558. *plink = cpu_to_le32(td->dma_handle);
  559. uhci_fill_td(td, 0, USB_PID_OUT | uhci_explen(0), 0);
  560. wmb();
  561. qh->dummy_td->status |= __constant_cpu_to_le32(TD_CTRL_ACTIVE);
  562. qh->dummy_td = td;
  563. /* Low-speed transfers get a different queue, and won't hog the bus.
  564. * Also, some devices enumerate better without FSBR; the easiest way
  565. * to do that is to put URBs on the low-speed queue while the device
  566. * isn't in the CONFIGURED state. */
  567. if (urb->dev->speed == USB_SPEED_LOW ||
  568. urb->dev->state != USB_STATE_CONFIGURED)
  569. qh->skel = uhci->skel_ls_control_qh;
  570. else {
  571. qh->skel = uhci->skel_fs_control_qh;
  572. uhci_add_fsbr(uhci, urb);
  573. }
  574. urb->actual_length = -8; /* Account for the SETUP packet */
  575. return 0;
  576. nomem:
  577. /* Remove the dummy TD from the td_list so it doesn't get freed */
  578. uhci_remove_td_from_urbp(qh->dummy_td);
  579. return -ENOMEM;
  580. }
  581. /*
  582. * Common submit for bulk and interrupt
  583. */
  584. static int uhci_submit_common(struct uhci_hcd *uhci, struct urb *urb,
  585. struct uhci_qh *qh)
  586. {
  587. struct uhci_td *td;
  588. unsigned long destination, status;
  589. int maxsze = le16_to_cpu(qh->hep->desc.wMaxPacketSize);
  590. int len = urb->transfer_buffer_length;
  591. dma_addr_t data = urb->transfer_dma;
  592. __le32 *plink;
  593. struct urb_priv *urbp = urb->hcpriv;
  594. unsigned int toggle;
  595. if (len < 0)
  596. return -EINVAL;
  597. /* The "pipe" thing contains the destination in bits 8--18 */
  598. destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe);
  599. toggle = usb_gettoggle(urb->dev, usb_pipeendpoint(urb->pipe),
  600. usb_pipeout(urb->pipe));
  601. /* 3 errors, dummy TD remains inactive */
  602. status = uhci_maxerr(3);
  603. if (urb->dev->speed == USB_SPEED_LOW)
  604. status |= TD_CTRL_LS;
  605. if (usb_pipein(urb->pipe))
  606. status |= TD_CTRL_SPD;
  607. /*
  608. * Build the DATA TDs
  609. */
  610. plink = NULL;
  611. td = qh->dummy_td;
  612. do { /* Allow zero length packets */
  613. int pktsze = maxsze;
  614. if (len <= pktsze) { /* The last packet */
  615. pktsze = len;
  616. if (!(urb->transfer_flags & URB_SHORT_NOT_OK))
  617. status &= ~TD_CTRL_SPD;
  618. }
  619. if (plink) {
  620. td = uhci_alloc_td(uhci);
  621. if (!td)
  622. goto nomem;
  623. *plink = cpu_to_le32(td->dma_handle);
  624. }
  625. uhci_add_td_to_urbp(td, urbp);
  626. uhci_fill_td(td, status,
  627. destination | uhci_explen(pktsze) |
  628. (toggle << TD_TOKEN_TOGGLE_SHIFT),
  629. data);
  630. plink = &td->link;
  631. status |= TD_CTRL_ACTIVE;
  632. data += pktsze;
  633. len -= maxsze;
  634. toggle ^= 1;
  635. } while (len > 0);
  636. /*
  637. * URB_ZERO_PACKET means adding a 0-length packet, if direction
  638. * is OUT and the transfer_length was an exact multiple of maxsze,
  639. * hence (len = transfer_length - N * maxsze) == 0
  640. * however, if transfer_length == 0, the zero packet was already
  641. * prepared above.
  642. */
  643. if ((urb->transfer_flags & URB_ZERO_PACKET) &&
  644. usb_pipeout(urb->pipe) && len == 0 &&
  645. urb->transfer_buffer_length > 0) {
  646. td = uhci_alloc_td(uhci);
  647. if (!td)
  648. goto nomem;
  649. *plink = cpu_to_le32(td->dma_handle);
  650. uhci_add_td_to_urbp(td, urbp);
  651. uhci_fill_td(td, status,
  652. destination | uhci_explen(0) |
  653. (toggle << TD_TOKEN_TOGGLE_SHIFT),
  654. data);
  655. plink = &td->link;
  656. toggle ^= 1;
  657. }
  658. /* Set the interrupt-on-completion flag on the last packet.
  659. * A more-or-less typical 4 KB URB (= size of one memory page)
  660. * will require about 3 ms to transfer; that's a little on the
  661. * fast side but not enough to justify delaying an interrupt
  662. * more than 2 or 3 URBs, so we will ignore the URB_NO_INTERRUPT
  663. * flag setting. */
  664. td->status |= __constant_cpu_to_le32(TD_CTRL_IOC);
  665. /*
  666. * Build the new dummy TD and activate the old one
  667. */
  668. td = uhci_alloc_td(uhci);
  669. if (!td)
  670. goto nomem;
  671. *plink = cpu_to_le32(td->dma_handle);
  672. uhci_fill_td(td, 0, USB_PID_OUT | uhci_explen(0), 0);
  673. wmb();
  674. qh->dummy_td->status |= __constant_cpu_to_le32(TD_CTRL_ACTIVE);
  675. qh->dummy_td = td;
  676. qh->period = urb->interval;
  677. usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
  678. usb_pipeout(urb->pipe), toggle);
  679. return 0;
  680. nomem:
  681. /* Remove the dummy TD from the td_list so it doesn't get freed */
  682. uhci_remove_td_from_urbp(qh->dummy_td);
  683. return -ENOMEM;
  684. }
  685. static inline int uhci_submit_bulk(struct uhci_hcd *uhci, struct urb *urb,
  686. struct uhci_qh *qh)
  687. {
  688. int ret;
  689. /* Can't have low-speed bulk transfers */
  690. if (urb->dev->speed == USB_SPEED_LOW)
  691. return -EINVAL;
  692. qh->skel = uhci->skel_bulk_qh;
  693. ret = uhci_submit_common(uhci, urb, qh);
  694. if (ret == 0)
  695. uhci_add_fsbr(uhci, urb);
  696. return ret;
  697. }
  698. static int uhci_submit_interrupt(struct uhci_hcd *uhci, struct urb *urb,
  699. struct uhci_qh *qh)
  700. {
  701. int exponent;
  702. /* USB 1.1 interrupt transfers only involve one packet per interval.
  703. * Drivers can submit URBs of any length, but longer ones will need
  704. * multiple intervals to complete.
  705. */
  706. /* Figure out which power-of-two queue to use */
  707. for (exponent = 7; exponent >= 0; --exponent) {
  708. if ((1 << exponent) <= urb->interval)
  709. break;
  710. }
  711. if (exponent < 0)
  712. return -EINVAL;
  713. urb->interval = 1 << exponent;
  714. if (qh->period == 0)
  715. qh->skel = uhci->skelqh[UHCI_SKEL_INDEX(exponent)];
  716. else if (qh->period != urb->interval)
  717. return -EINVAL; /* Can't change the period */
  718. return uhci_submit_common(uhci, urb, qh);
  719. }
  720. /*
  721. * Fix up the data structures following a short transfer
  722. */
  723. static int uhci_fixup_short_transfer(struct uhci_hcd *uhci,
  724. struct uhci_qh *qh, struct urb_priv *urbp)
  725. {
  726. struct uhci_td *td;
  727. struct list_head *tmp;
  728. int ret;
  729. td = list_entry(urbp->td_list.prev, struct uhci_td, list);
  730. if (qh->type == USB_ENDPOINT_XFER_CONTROL) {
  731. /* When a control transfer is short, we have to restart
  732. * the queue at the status stage transaction, which is
  733. * the last TD. */
  734. WARN_ON(list_empty(&urbp->td_list));
  735. qh->element = cpu_to_le32(td->dma_handle);
  736. tmp = td->list.prev;
  737. ret = -EINPROGRESS;
  738. } else {
  739. /* When a bulk/interrupt transfer is short, we have to
  740. * fix up the toggles of the following URBs on the queue
  741. * before restarting the queue at the next URB. */
  742. qh->initial_toggle = uhci_toggle(td_token(qh->post_td)) ^ 1;
  743. uhci_fixup_toggles(qh, 1);
  744. if (list_empty(&urbp->td_list))
  745. td = qh->post_td;
  746. qh->element = td->link;
  747. tmp = urbp->td_list.prev;
  748. ret = 0;
  749. }
  750. /* Remove all the TDs we skipped over, from tmp back to the start */
  751. while (tmp != &urbp->td_list) {
  752. td = list_entry(tmp, struct uhci_td, list);
  753. tmp = tmp->prev;
  754. uhci_remove_td_from_urbp(td);
  755. uhci_free_td(uhci, td);
  756. }
  757. return ret;
  758. }
  759. /*
  760. * Common result for control, bulk, and interrupt
  761. */
  762. static int uhci_result_common(struct uhci_hcd *uhci, struct urb *urb)
  763. {
  764. struct urb_priv *urbp = urb->hcpriv;
  765. struct uhci_qh *qh = urbp->qh;
  766. struct uhci_td *td, *tmp;
  767. unsigned status;
  768. int ret = 0;
  769. list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
  770. unsigned int ctrlstat;
  771. int len;
  772. ctrlstat = td_status(td);
  773. status = uhci_status_bits(ctrlstat);
  774. if (status & TD_CTRL_ACTIVE)
  775. return -EINPROGRESS;
  776. len = uhci_actual_length(ctrlstat);
  777. urb->actual_length += len;
  778. if (status) {
  779. ret = uhci_map_status(status,
  780. uhci_packetout(td_token(td)));
  781. if ((debug == 1 && ret != -EPIPE) || debug > 1) {
  782. /* Some debugging code */
  783. dev_dbg(&urb->dev->dev,
  784. "%s: failed with status %x\n",
  785. __FUNCTION__, status);
  786. if (debug > 1 && errbuf) {
  787. /* Print the chain for debugging */
  788. uhci_show_qh(urbp->qh, errbuf,
  789. ERRBUF_LEN, 0);
  790. lprintk(errbuf);
  791. }
  792. }
  793. } else if (len < uhci_expected_length(td_token(td))) {
  794. /* We received a short packet */
  795. if (urb->transfer_flags & URB_SHORT_NOT_OK)
  796. ret = -EREMOTEIO;
  797. /* Fixup needed only if this isn't the URB's last TD */
  798. else if (&td->list != urbp->td_list.prev)
  799. ret = 1;
  800. }
  801. uhci_remove_td_from_urbp(td);
  802. if (qh->post_td)
  803. uhci_free_td(uhci, qh->post_td);
  804. qh->post_td = td;
  805. if (ret != 0)
  806. goto err;
  807. }
  808. return ret;
  809. err:
  810. if (ret < 0) {
  811. /* In case a control transfer gets an error
  812. * during the setup stage */
  813. urb->actual_length = max(urb->actual_length, 0);
  814. /* Note that the queue has stopped and save
  815. * the next toggle value */
  816. qh->element = UHCI_PTR_TERM;
  817. qh->is_stopped = 1;
  818. qh->needs_fixup = (qh->type != USB_ENDPOINT_XFER_CONTROL);
  819. qh->initial_toggle = uhci_toggle(td_token(td)) ^
  820. (ret == -EREMOTEIO);
  821. } else /* Short packet received */
  822. ret = uhci_fixup_short_transfer(uhci, qh, urbp);
  823. return ret;
  824. }
  825. /*
  826. * Isochronous transfers
  827. */
  828. static int uhci_submit_isochronous(struct uhci_hcd *uhci, struct urb *urb,
  829. struct uhci_qh *qh)
  830. {
  831. struct uhci_td *td = NULL; /* Since urb->number_of_packets > 0 */
  832. int i, frame;
  833. unsigned long destination, status;
  834. struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
  835. /* Values must not be too big (could overflow below) */
  836. if (urb->interval >= UHCI_NUMFRAMES ||
  837. urb->number_of_packets >= UHCI_NUMFRAMES)
  838. return -EFBIG;
  839. /* Check the period and figure out the starting frame number */
  840. if (qh->period == 0) {
  841. if (urb->transfer_flags & URB_ISO_ASAP) {
  842. uhci_get_current_frame_number(uhci);
  843. urb->start_frame = uhci->frame_number + 10;
  844. } else {
  845. i = urb->start_frame - uhci->last_iso_frame;
  846. if (i <= 0 || i >= UHCI_NUMFRAMES)
  847. return -EINVAL;
  848. }
  849. } else if (qh->period != urb->interval) {
  850. return -EINVAL; /* Can't change the period */
  851. } else { /* Pick up where the last URB leaves off */
  852. if (list_empty(&qh->queue)) {
  853. frame = qh->iso_frame;
  854. } else {
  855. struct urb *lurb;
  856. lurb = list_entry(qh->queue.prev,
  857. struct urb_priv, node)->urb;
  858. frame = lurb->start_frame +
  859. lurb->number_of_packets *
  860. lurb->interval;
  861. }
  862. if (urb->transfer_flags & URB_ISO_ASAP)
  863. urb->start_frame = frame;
  864. else if (urb->start_frame != frame)
  865. return -EINVAL;
  866. }
  867. /* Make sure we won't have to go too far into the future */
  868. if (uhci_frame_before_eq(uhci->last_iso_frame + UHCI_NUMFRAMES,
  869. urb->start_frame + urb->number_of_packets *
  870. urb->interval))
  871. return -EFBIG;
  872. status = TD_CTRL_ACTIVE | TD_CTRL_IOS;
  873. destination = (urb->pipe & PIPE_DEVEP_MASK) | usb_packetid(urb->pipe);
  874. for (i = 0; i < urb->number_of_packets; i++) {
  875. td = uhci_alloc_td(uhci);
  876. if (!td)
  877. return -ENOMEM;
  878. uhci_add_td_to_urbp(td, urbp);
  879. uhci_fill_td(td, status, destination |
  880. uhci_explen(urb->iso_frame_desc[i].length),
  881. urb->transfer_dma +
  882. urb->iso_frame_desc[i].offset);
  883. }
  884. /* Set the interrupt-on-completion flag on the last packet. */
  885. td->status |= __constant_cpu_to_le32(TD_CTRL_IOC);
  886. qh->skel = uhci->skel_iso_qh;
  887. qh->period = urb->interval;
  888. /* Add the TDs to the frame list */
  889. frame = urb->start_frame;
  890. list_for_each_entry(td, &urbp->td_list, list) {
  891. uhci_insert_td_in_frame_list(uhci, td, frame);
  892. frame += qh->period;
  893. }
  894. if (list_empty(&qh->queue)) {
  895. qh->iso_packet_desc = &urb->iso_frame_desc[0];
  896. qh->iso_frame = urb->start_frame;
  897. qh->iso_status = 0;
  898. }
  899. return 0;
  900. }
  901. static int uhci_result_isochronous(struct uhci_hcd *uhci, struct urb *urb)
  902. {
  903. struct uhci_td *td, *tmp;
  904. struct urb_priv *urbp = urb->hcpriv;
  905. struct uhci_qh *qh = urbp->qh;
  906. list_for_each_entry_safe(td, tmp, &urbp->td_list, list) {
  907. unsigned int ctrlstat;
  908. int status;
  909. int actlength;
  910. if (uhci_frame_before_eq(uhci->cur_iso_frame, qh->iso_frame))
  911. return -EINPROGRESS;
  912. uhci_remove_tds_from_frame(uhci, qh->iso_frame);
  913. ctrlstat = td_status(td);
  914. if (ctrlstat & TD_CTRL_ACTIVE) {
  915. status = -EXDEV; /* TD was added too late? */
  916. } else {
  917. status = uhci_map_status(uhci_status_bits(ctrlstat),
  918. usb_pipeout(urb->pipe));
  919. actlength = uhci_actual_length(ctrlstat);
  920. urb->actual_length += actlength;
  921. qh->iso_packet_desc->actual_length = actlength;
  922. qh->iso_packet_desc->status = status;
  923. }
  924. if (status) {
  925. urb->error_count++;
  926. qh->iso_status = status;
  927. }
  928. uhci_remove_td_from_urbp(td);
  929. uhci_free_td(uhci, td);
  930. qh->iso_frame += qh->period;
  931. ++qh->iso_packet_desc;
  932. }
  933. return qh->iso_status;
  934. }
  935. static int uhci_urb_enqueue(struct usb_hcd *hcd,
  936. struct usb_host_endpoint *hep,
  937. struct urb *urb, gfp_t mem_flags)
  938. {
  939. int ret;
  940. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  941. unsigned long flags;
  942. struct urb_priv *urbp;
  943. struct uhci_qh *qh;
  944. int bustime;
  945. spin_lock_irqsave(&uhci->lock, flags);
  946. ret = urb->status;
  947. if (ret != -EINPROGRESS) /* URB already unlinked! */
  948. goto done;
  949. ret = -ENOMEM;
  950. urbp = uhci_alloc_urb_priv(uhci, urb);
  951. if (!urbp)
  952. goto done;
  953. if (hep->hcpriv)
  954. qh = (struct uhci_qh *) hep->hcpriv;
  955. else {
  956. qh = uhci_alloc_qh(uhci, urb->dev, hep);
  957. if (!qh)
  958. goto err_no_qh;
  959. }
  960. urbp->qh = qh;
  961. switch (qh->type) {
  962. case USB_ENDPOINT_XFER_CONTROL:
  963. ret = uhci_submit_control(uhci, urb, qh);
  964. break;
  965. case USB_ENDPOINT_XFER_BULK:
  966. ret = uhci_submit_bulk(uhci, urb, qh);
  967. break;
  968. case USB_ENDPOINT_XFER_INT:
  969. if (list_empty(&qh->queue)) {
  970. bustime = usb_check_bandwidth(urb->dev, urb);
  971. if (bustime < 0)
  972. ret = bustime;
  973. else {
  974. ret = uhci_submit_interrupt(uhci, urb, qh);
  975. if (ret == 0)
  976. usb_claim_bandwidth(urb->dev, urb, bustime, 0);
  977. }
  978. } else { /* inherit from parent */
  979. struct urb_priv *eurbp;
  980. eurbp = list_entry(qh->queue.prev, struct urb_priv,
  981. node);
  982. urb->bandwidth = eurbp->urb->bandwidth;
  983. ret = uhci_submit_interrupt(uhci, urb, qh);
  984. }
  985. break;
  986. case USB_ENDPOINT_XFER_ISOC:
  987. urb->error_count = 0;
  988. bustime = usb_check_bandwidth(urb->dev, urb);
  989. if (bustime < 0) {
  990. ret = bustime;
  991. break;
  992. }
  993. ret = uhci_submit_isochronous(uhci, urb, qh);
  994. if (ret == 0)
  995. usb_claim_bandwidth(urb->dev, urb, bustime, 1);
  996. break;
  997. }
  998. if (ret != 0)
  999. goto err_submit_failed;
  1000. /* Add this URB to the QH */
  1001. urbp->qh = qh;
  1002. list_add_tail(&urbp->node, &qh->queue);
  1003. /* If the new URB is the first and only one on this QH then either
  1004. * the QH is new and idle or else it's unlinked and waiting to
  1005. * become idle, so we can activate it right away. But only if the
  1006. * queue isn't stopped. */
  1007. if (qh->queue.next == &urbp->node && !qh->is_stopped) {
  1008. uhci_activate_qh(uhci, qh);
  1009. uhci_urbp_wants_fsbr(uhci, urbp);
  1010. }
  1011. goto done;
  1012. err_submit_failed:
  1013. if (qh->state == QH_STATE_IDLE)
  1014. uhci_make_qh_idle(uhci, qh); /* Reclaim unused QH */
  1015. err_no_qh:
  1016. uhci_free_urb_priv(uhci, urbp);
  1017. done:
  1018. spin_unlock_irqrestore(&uhci->lock, flags);
  1019. return ret;
  1020. }
  1021. static int uhci_urb_dequeue(struct usb_hcd *hcd, struct urb *urb)
  1022. {
  1023. struct uhci_hcd *uhci = hcd_to_uhci(hcd);
  1024. unsigned long flags;
  1025. struct urb_priv *urbp;
  1026. struct uhci_qh *qh;
  1027. spin_lock_irqsave(&uhci->lock, flags);
  1028. urbp = urb->hcpriv;
  1029. if (!urbp) /* URB was never linked! */
  1030. goto done;
  1031. qh = urbp->qh;
  1032. /* Remove Isochronous TDs from the frame list ASAP */
  1033. if (qh->type == USB_ENDPOINT_XFER_ISOC) {
  1034. uhci_unlink_isochronous_tds(uhci, urb);
  1035. mb();
  1036. /* If the URB has already started, update the QH unlink time */
  1037. uhci_get_current_frame_number(uhci);
  1038. if (uhci_frame_before_eq(urb->start_frame, uhci->frame_number))
  1039. qh->unlink_frame = uhci->frame_number;
  1040. }
  1041. uhci_unlink_qh(uhci, qh);
  1042. done:
  1043. spin_unlock_irqrestore(&uhci->lock, flags);
  1044. return 0;
  1045. }
  1046. /*
  1047. * Finish unlinking an URB and give it back
  1048. */
  1049. static void uhci_giveback_urb(struct uhci_hcd *uhci, struct uhci_qh *qh,
  1050. struct urb *urb)
  1051. __releases(uhci->lock)
  1052. __acquires(uhci->lock)
  1053. {
  1054. struct urb_priv *urbp = (struct urb_priv *) urb->hcpriv;
  1055. /* When giving back the first URB in an Isochronous queue,
  1056. * reinitialize the QH's iso-related members for the next URB. */
  1057. if (qh->type == USB_ENDPOINT_XFER_ISOC &&
  1058. urbp->node.prev == &qh->queue &&
  1059. urbp->node.next != &qh->queue) {
  1060. struct urb *nurb = list_entry(urbp->node.next,
  1061. struct urb_priv, node)->urb;
  1062. qh->iso_packet_desc = &nurb->iso_frame_desc[0];
  1063. qh->iso_frame = nurb->start_frame;
  1064. qh->iso_status = 0;
  1065. }
  1066. /* Take the URB off the QH's queue. If the queue is now empty,
  1067. * this is a perfect time for a toggle fixup. */
  1068. list_del_init(&urbp->node);
  1069. if (list_empty(&qh->queue) && qh->needs_fixup) {
  1070. usb_settoggle(urb->dev, usb_pipeendpoint(urb->pipe),
  1071. usb_pipeout(urb->pipe), qh->initial_toggle);
  1072. qh->needs_fixup = 0;
  1073. }
  1074. uhci_free_urb_priv(uhci, urbp);
  1075. switch (qh->type) {
  1076. case USB_ENDPOINT_XFER_ISOC:
  1077. /* Release bandwidth for Interrupt or Isoc. transfers */
  1078. if (urb->bandwidth)
  1079. usb_release_bandwidth(urb->dev, urb, 1);
  1080. break;
  1081. case USB_ENDPOINT_XFER_INT:
  1082. /* Release bandwidth for Interrupt or Isoc. transfers */
  1083. /* Make sure we don't release if we have a queued URB */
  1084. if (list_empty(&qh->queue) && urb->bandwidth)
  1085. usb_release_bandwidth(urb->dev, urb, 0);
  1086. else
  1087. /* bandwidth was passed on to queued URB, */
  1088. /* so don't let usb_unlink_urb() release it */
  1089. urb->bandwidth = 0;
  1090. break;
  1091. }
  1092. spin_unlock(&uhci->lock);
  1093. usb_hcd_giveback_urb(uhci_to_hcd(uhci), urb);
  1094. spin_lock(&uhci->lock);
  1095. /* If the queue is now empty, we can unlink the QH and give up its
  1096. * reserved bandwidth. */
  1097. if (list_empty(&qh->queue)) {
  1098. uhci_unlink_qh(uhci, qh);
  1099. /* Bandwidth stuff not yet implemented */
  1100. qh->period = 0;
  1101. }
  1102. }
  1103. /*
  1104. * Scan the URBs in a QH's queue
  1105. */
  1106. #define QH_FINISHED_UNLINKING(qh) \
  1107. (qh->state == QH_STATE_UNLINKING && \
  1108. uhci->frame_number + uhci->is_stopped != qh->unlink_frame)
  1109. static void uhci_scan_qh(struct uhci_hcd *uhci, struct uhci_qh *qh)
  1110. {
  1111. struct urb_priv *urbp;
  1112. struct urb *urb;
  1113. int status;
  1114. while (!list_empty(&qh->queue)) {
  1115. urbp = list_entry(qh->queue.next, struct urb_priv, node);
  1116. urb = urbp->urb;
  1117. if (qh->type == USB_ENDPOINT_XFER_ISOC)
  1118. status = uhci_result_isochronous(uhci, urb);
  1119. else
  1120. status = uhci_result_common(uhci, urb);
  1121. if (status == -EINPROGRESS)
  1122. break;
  1123. spin_lock(&urb->lock);
  1124. if (urb->status == -EINPROGRESS) /* Not dequeued */
  1125. urb->status = status;
  1126. else
  1127. status = ECONNRESET; /* Not -ECONNRESET */
  1128. spin_unlock(&urb->lock);
  1129. /* Dequeued but completed URBs can't be given back unless
  1130. * the QH is stopped or has finished unlinking. */
  1131. if (status == ECONNRESET) {
  1132. if (QH_FINISHED_UNLINKING(qh))
  1133. qh->is_stopped = 1;
  1134. else if (!qh->is_stopped)
  1135. return;
  1136. }
  1137. uhci_giveback_urb(uhci, qh, urb);
  1138. if (status < 0 && qh->type != USB_ENDPOINT_XFER_ISOC)
  1139. break;
  1140. }
  1141. /* If the QH is neither stopped nor finished unlinking (normal case),
  1142. * our work here is done. */
  1143. if (QH_FINISHED_UNLINKING(qh))
  1144. qh->is_stopped = 1;
  1145. else if (!qh->is_stopped)
  1146. return;
  1147. /* Otherwise give back each of the dequeued URBs */
  1148. restart:
  1149. list_for_each_entry(urbp, &qh->queue, node) {
  1150. urb = urbp->urb;
  1151. if (urb->status != -EINPROGRESS) {
  1152. /* Fix up the TD links and save the toggles for
  1153. * non-Isochronous queues. For Isochronous queues,
  1154. * test for too-recent dequeues. */
  1155. if (!uhci_cleanup_queue(uhci, qh, urb)) {
  1156. qh->is_stopped = 0;
  1157. return;
  1158. }
  1159. uhci_giveback_urb(uhci, qh, urb);
  1160. goto restart;
  1161. }
  1162. }
  1163. qh->is_stopped = 0;
  1164. /* There are no more dequeued URBs. If there are still URBs on the
  1165. * queue, the QH can now be re-activated. */
  1166. if (!list_empty(&qh->queue)) {
  1167. if (qh->needs_fixup)
  1168. uhci_fixup_toggles(qh, 0);
  1169. /* If the first URB on the queue wants FSBR but its time
  1170. * limit has expired, set the next TD to interrupt on
  1171. * completion before reactivating the QH. */
  1172. urbp = list_entry(qh->queue.next, struct urb_priv, node);
  1173. if (urbp->fsbr && qh->wait_expired) {
  1174. struct uhci_td *td = list_entry(urbp->td_list.next,
  1175. struct uhci_td, list);
  1176. td->status |= __cpu_to_le32(TD_CTRL_IOC);
  1177. }
  1178. uhci_activate_qh(uhci, qh);
  1179. }
  1180. /* The queue is empty. The QH can become idle if it is fully
  1181. * unlinked. */
  1182. else if (QH_FINISHED_UNLINKING(qh))
  1183. uhci_make_qh_idle(uhci, qh);
  1184. }
  1185. /*
  1186. * Check for queues that have made some forward progress.
  1187. * Returns 0 if the queue is not Isochronous, is ACTIVE, and
  1188. * has not advanced since last examined; 1 otherwise.
  1189. *
  1190. * Early Intel controllers have a bug which causes qh->element sometimes
  1191. * not to advance when a TD completes successfully. The queue remains
  1192. * stuck on the inactive completed TD. We detect such cases and advance
  1193. * the element pointer by hand.
  1194. */
  1195. static int uhci_advance_check(struct uhci_hcd *uhci, struct uhci_qh *qh)
  1196. {
  1197. struct urb_priv *urbp = NULL;
  1198. struct uhci_td *td;
  1199. int ret = 1;
  1200. unsigned status;
  1201. if (qh->type == USB_ENDPOINT_XFER_ISOC)
  1202. goto done;
  1203. /* Treat an UNLINKING queue as though it hasn't advanced.
  1204. * This is okay because reactivation will treat it as though
  1205. * it has advanced, and if it is going to become IDLE then
  1206. * this doesn't matter anyway. Furthermore it's possible
  1207. * for an UNLINKING queue not to have any URBs at all, or
  1208. * for its first URB not to have any TDs (if it was dequeued
  1209. * just as it completed). So it's not easy in any case to
  1210. * test whether such queues have advanced. */
  1211. if (qh->state != QH_STATE_ACTIVE) {
  1212. urbp = NULL;
  1213. status = 0;
  1214. } else {
  1215. urbp = list_entry(qh->queue.next, struct urb_priv, node);
  1216. td = list_entry(urbp->td_list.next, struct uhci_td, list);
  1217. status = td_status(td);
  1218. if (!(status & TD_CTRL_ACTIVE)) {
  1219. /* We're okay, the queue has advanced */
  1220. qh->wait_expired = 0;
  1221. qh->advance_jiffies = jiffies;
  1222. goto done;
  1223. }
  1224. ret = 0;
  1225. }
  1226. /* The queue hasn't advanced; check for timeout */
  1227. if (qh->wait_expired)
  1228. goto done;
  1229. if (time_after(jiffies, qh->advance_jiffies + QH_WAIT_TIMEOUT)) {
  1230. /* Detect the Intel bug and work around it */
  1231. if (qh->post_td && qh_element(qh) ==
  1232. cpu_to_le32(qh->post_td->dma_handle)) {
  1233. qh->element = qh->post_td->link;
  1234. qh->advance_jiffies = jiffies;
  1235. ret = 1;
  1236. goto done;
  1237. }
  1238. qh->wait_expired = 1;
  1239. /* If the current URB wants FSBR, unlink it temporarily
  1240. * so that we can safely set the next TD to interrupt on
  1241. * completion. That way we'll know as soon as the queue
  1242. * starts moving again. */
  1243. if (urbp && urbp->fsbr && !(status & TD_CTRL_IOC))
  1244. uhci_unlink_qh(uhci, qh);
  1245. } else {
  1246. /* Unmoving but not-yet-expired queues keep FSBR alive */
  1247. if (urbp)
  1248. uhci_urbp_wants_fsbr(uhci, urbp);
  1249. }
  1250. done:
  1251. return ret;
  1252. }
  1253. /*
  1254. * Process events in the schedule, but only in one thread at a time
  1255. */
  1256. static void uhci_scan_schedule(struct uhci_hcd *uhci)
  1257. {
  1258. int i;
  1259. struct uhci_qh *qh;
  1260. /* Don't allow re-entrant calls */
  1261. if (uhci->scan_in_progress) {
  1262. uhci->need_rescan = 1;
  1263. return;
  1264. }
  1265. uhci->scan_in_progress = 1;
  1266. rescan:
  1267. uhci->need_rescan = 0;
  1268. uhci->fsbr_is_wanted = 0;
  1269. uhci_clear_next_interrupt(uhci);
  1270. uhci_get_current_frame_number(uhci);
  1271. uhci->cur_iso_frame = uhci->frame_number;
  1272. /* Go through all the QH queues and process the URBs in each one */
  1273. for (i = 0; i < UHCI_NUM_SKELQH - 1; ++i) {
  1274. uhci->next_qh = list_entry(uhci->skelqh[i]->node.next,
  1275. struct uhci_qh, node);
  1276. while ((qh = uhci->next_qh) != uhci->skelqh[i]) {
  1277. uhci->next_qh = list_entry(qh->node.next,
  1278. struct uhci_qh, node);
  1279. if (uhci_advance_check(uhci, qh)) {
  1280. uhci_scan_qh(uhci, qh);
  1281. if (qh->state == QH_STATE_ACTIVE) {
  1282. uhci_urbp_wants_fsbr(uhci,
  1283. list_entry(qh->queue.next, struct urb_priv, node));
  1284. }
  1285. }
  1286. }
  1287. }
  1288. uhci->last_iso_frame = uhci->cur_iso_frame;
  1289. if (uhci->need_rescan)
  1290. goto rescan;
  1291. uhci->scan_in_progress = 0;
  1292. if (uhci->fsbr_is_on && !uhci->fsbr_is_wanted &&
  1293. !uhci->fsbr_expiring) {
  1294. uhci->fsbr_expiring = 1;
  1295. mod_timer(&uhci->fsbr_timer, jiffies + FSBR_OFF_DELAY);
  1296. }
  1297. if (list_empty(&uhci->skel_unlink_qh->node))
  1298. uhci_clear_next_interrupt(uhci);
  1299. else
  1300. uhci_set_next_interrupt(uhci);
  1301. }