host.c 15 KB

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  1. /*
  2. * This file is provided under a dual BSD/GPLv2 license. When using or
  3. * redistributing this file, you may do so under either license.
  4. *
  5. * GPL LICENSE SUMMARY
  6. *
  7. * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of version 2 of the GNU General Public License as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful, but
  14. * WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  16. * General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program; if not, write to the Free Software
  20. * Foundation, Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * BSD LICENSE
  25. *
  26. * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  27. * All rights reserved.
  28. *
  29. * Redistribution and use in source and binary forms, with or without
  30. * modification, are permitted provided that the following conditions
  31. * are met:
  32. *
  33. * * Redistributions of source code must retain the above copyright
  34. * notice, this list of conditions and the following disclaimer.
  35. * * Redistributions in binary form must reproduce the above copyright
  36. * notice, this list of conditions and the following disclaimer in
  37. * the documentation and/or other materials provided with the
  38. * distribution.
  39. * * Neither the name of Intel Corporation nor the names of its
  40. * contributors may be used to endorse or promote products derived
  41. * from this software without specific prior written permission.
  42. *
  43. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  44. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  45. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  46. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  47. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  48. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  49. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  50. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  51. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  52. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  53. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  54. */
  55. #include "isci.h"
  56. #include "scic_io_request.h"
  57. #include "scic_remote_device.h"
  58. #include "scic_port.h"
  59. #include "port.h"
  60. #include "request.h"
  61. #include "host.h"
  62. irqreturn_t isci_msix_isr(int vec, void *data)
  63. {
  64. struct isci_host *ihost = data;
  65. struct scic_sds_controller *scic = ihost->core_controller;
  66. if (scic_sds_controller_isr(scic))
  67. tasklet_schedule(&ihost->completion_tasklet);
  68. return IRQ_HANDLED;
  69. }
  70. irqreturn_t isci_intx_isr(int vec, void *data)
  71. {
  72. struct pci_dev *pdev = data;
  73. struct isci_host *ihost;
  74. irqreturn_t ret = IRQ_NONE;
  75. for_each_isci_host(ihost, pdev) {
  76. struct scic_sds_controller *scic = ihost->core_controller;
  77. if (scic_sds_controller_isr(scic)) {
  78. tasklet_schedule(&ihost->completion_tasklet);
  79. ret = IRQ_HANDLED;
  80. } else if (scic_sds_controller_error_isr(scic)) {
  81. spin_lock(&ihost->scic_lock);
  82. scic_sds_controller_error_handler(scic);
  83. spin_unlock(&ihost->scic_lock);
  84. ret = IRQ_HANDLED;
  85. }
  86. }
  87. return ret;
  88. }
  89. irqreturn_t isci_error_isr(int vec, void *data)
  90. {
  91. struct isci_host *ihost = data;
  92. struct scic_sds_controller *scic = ihost->core_controller;
  93. if (scic_sds_controller_error_isr(scic))
  94. scic_sds_controller_error_handler(scic);
  95. return IRQ_HANDLED;
  96. }
  97. /**
  98. * isci_host_start_complete() - This function is called by the core library,
  99. * through the ISCI Module, to indicate controller start status.
  100. * @isci_host: This parameter specifies the ISCI host object
  101. * @completion_status: This parameter specifies the completion status from the
  102. * core library.
  103. *
  104. */
  105. void isci_host_start_complete(struct isci_host *ihost, enum sci_status completion_status)
  106. {
  107. if (completion_status != SCI_SUCCESS)
  108. dev_info(&ihost->pdev->dev,
  109. "controller start timed out, continuing...\n");
  110. isci_host_change_state(ihost, isci_ready);
  111. clear_bit(IHOST_START_PENDING, &ihost->flags);
  112. wake_up(&ihost->eventq);
  113. }
  114. int isci_host_scan_finished(struct Scsi_Host *shost, unsigned long time)
  115. {
  116. struct isci_host *ihost = isci_host_from_sas_ha(SHOST_TO_SAS_HA(shost));
  117. if (test_bit(IHOST_START_PENDING, &ihost->flags))
  118. return 0;
  119. /* todo: use sas_flush_discovery once it is upstream */
  120. scsi_flush_work(shost);
  121. scsi_flush_work(shost);
  122. dev_dbg(&ihost->pdev->dev,
  123. "%s: ihost->status = %d, time = %ld\n",
  124. __func__, isci_host_get_state(ihost), time);
  125. return 1;
  126. }
  127. void isci_host_scan_start(struct Scsi_Host *shost)
  128. {
  129. struct isci_host *ihost = isci_host_from_sas_ha(SHOST_TO_SAS_HA(shost));
  130. struct scic_sds_controller *scic = ihost->core_controller;
  131. unsigned long tmo = scic_controller_get_suggested_start_timeout(scic);
  132. set_bit(IHOST_START_PENDING, &ihost->flags);
  133. spin_lock_irq(&ihost->scic_lock);
  134. scic_controller_start(scic, tmo);
  135. scic_controller_enable_interrupts(scic);
  136. spin_unlock_irq(&ihost->scic_lock);
  137. }
  138. void isci_host_stop_complete(struct isci_host *ihost, enum sci_status completion_status)
  139. {
  140. isci_host_change_state(ihost, isci_stopped);
  141. scic_controller_disable_interrupts(ihost->core_controller);
  142. clear_bit(IHOST_STOP_PENDING, &ihost->flags);
  143. wake_up(&ihost->eventq);
  144. }
  145. static struct coherent_memory_info *isci_host_alloc_mdl_struct(
  146. struct isci_host *isci_host,
  147. u32 size)
  148. {
  149. struct coherent_memory_info *mdl_struct;
  150. void *uncached_address = NULL;
  151. mdl_struct = devm_kzalloc(&isci_host->pdev->dev,
  152. sizeof(*mdl_struct),
  153. GFP_KERNEL);
  154. if (!mdl_struct)
  155. return NULL;
  156. INIT_LIST_HEAD(&mdl_struct->node);
  157. uncached_address = dmam_alloc_coherent(&isci_host->pdev->dev,
  158. size,
  159. &mdl_struct->dma_handle,
  160. GFP_KERNEL);
  161. if (!uncached_address)
  162. return NULL;
  163. /* memset the whole memory area. */
  164. memset((char *)uncached_address, 0, size);
  165. mdl_struct->vaddr = uncached_address;
  166. mdl_struct->size = (size_t)size;
  167. return mdl_struct;
  168. }
  169. static void isci_host_build_mde(
  170. struct sci_physical_memory_descriptor *mde_struct,
  171. struct coherent_memory_info *mdl_struct)
  172. {
  173. unsigned long address = 0;
  174. dma_addr_t dma_addr = 0;
  175. address = (unsigned long)mdl_struct->vaddr;
  176. dma_addr = mdl_struct->dma_handle;
  177. /* to satisfy the alignment. */
  178. if ((address % mde_struct->constant_memory_alignment) != 0) {
  179. int align_offset
  180. = (mde_struct->constant_memory_alignment
  181. - (address % mde_struct->constant_memory_alignment));
  182. address += align_offset;
  183. dma_addr += align_offset;
  184. }
  185. mde_struct->virtual_address = (void *)address;
  186. mde_struct->physical_address = dma_addr;
  187. mdl_struct->mde = mde_struct;
  188. }
  189. static int isci_host_mdl_allocate_coherent(
  190. struct isci_host *isci_host)
  191. {
  192. struct sci_physical_memory_descriptor *current_mde;
  193. struct coherent_memory_info *mdl_struct;
  194. u32 size = 0;
  195. struct sci_base_memory_descriptor_list *mdl_handle
  196. = sci_controller_get_memory_descriptor_list_handle(
  197. isci_host->core_controller);
  198. sci_mdl_first_entry(mdl_handle);
  199. current_mde = sci_mdl_get_current_entry(mdl_handle);
  200. while (current_mde != NULL) {
  201. size = (current_mde->constant_memory_size
  202. + current_mde->constant_memory_alignment);
  203. mdl_struct = isci_host_alloc_mdl_struct(isci_host, size);
  204. if (!mdl_struct)
  205. return -ENOMEM;
  206. list_add_tail(&mdl_struct->node, &isci_host->mdl_struct_list);
  207. isci_host_build_mde(current_mde, mdl_struct);
  208. sci_mdl_next_entry(mdl_handle);
  209. current_mde = sci_mdl_get_current_entry(mdl_handle);
  210. }
  211. return 0;
  212. }
  213. /**
  214. * isci_host_completion_routine() - This function is the delayed service
  215. * routine that calls the sci core library's completion handler. It's
  216. * scheduled as a tasklet from the interrupt service routine when interrupts
  217. * in use, or set as the timeout function in polled mode.
  218. * @data: This parameter specifies the ISCI host object
  219. *
  220. */
  221. static void isci_host_completion_routine(unsigned long data)
  222. {
  223. struct isci_host *isci_host = (struct isci_host *)data;
  224. struct list_head completed_request_list;
  225. struct list_head aborted_request_list;
  226. struct list_head *current_position;
  227. struct list_head *next_position;
  228. struct isci_request *request;
  229. struct isci_request *next_request;
  230. struct sas_task *task;
  231. INIT_LIST_HEAD(&completed_request_list);
  232. INIT_LIST_HEAD(&aborted_request_list);
  233. spin_lock_irq(&isci_host->scic_lock);
  234. scic_sds_controller_completion_handler(isci_host->core_controller);
  235. /* Take the lists of completed I/Os from the host. */
  236. list_splice_init(&isci_host->requests_to_complete,
  237. &completed_request_list);
  238. list_splice_init(&isci_host->requests_to_abort,
  239. &aborted_request_list);
  240. spin_unlock_irq(&isci_host->scic_lock);
  241. /* Process any completions in the lists. */
  242. list_for_each_safe(current_position, next_position,
  243. &completed_request_list) {
  244. request = list_entry(current_position, struct isci_request,
  245. completed_node);
  246. task = isci_request_access_task(request);
  247. /* Normal notification (task_done) */
  248. dev_dbg(&isci_host->pdev->dev,
  249. "%s: Normal - request/task = %p/%p\n",
  250. __func__,
  251. request,
  252. task);
  253. task->task_done(task);
  254. task->lldd_task = NULL;
  255. /* Free the request object. */
  256. isci_request_free(isci_host, request);
  257. }
  258. list_for_each_entry_safe(request, next_request, &aborted_request_list,
  259. completed_node) {
  260. task = isci_request_access_task(request);
  261. /* Use sas_task_abort */
  262. dev_warn(&isci_host->pdev->dev,
  263. "%s: Error - request/task = %p/%p\n",
  264. __func__,
  265. request,
  266. task);
  267. /* Put the task into the abort path. */
  268. sas_task_abort(task);
  269. }
  270. }
  271. void isci_host_deinit(struct isci_host *ihost)
  272. {
  273. struct scic_sds_controller *scic = ihost->core_controller;
  274. int i;
  275. isci_host_change_state(ihost, isci_stopping);
  276. for (i = 0; i < SCI_MAX_PORTS; i++) {
  277. struct isci_port *port = &ihost->isci_ports[i];
  278. struct isci_remote_device *idev, *d;
  279. list_for_each_entry_safe(idev, d, &port->remote_dev_list, node) {
  280. isci_remote_device_change_state(idev, isci_stopping);
  281. isci_remote_device_stop(idev);
  282. }
  283. }
  284. set_bit(IHOST_STOP_PENDING, &ihost->flags);
  285. scic_controller_stop(scic, SCIC_CONTROLLER_STOP_TIMEOUT);
  286. wait_for_stop(ihost);
  287. scic_controller_reset(scic);
  288. }
  289. static void __iomem *scu_base(struct isci_host *isci_host)
  290. {
  291. struct pci_dev *pdev = isci_host->pdev;
  292. int id = isci_host->id;
  293. return pcim_iomap_table(pdev)[SCI_SCU_BAR * 2] + SCI_SCU_BAR_SIZE * id;
  294. }
  295. static void __iomem *smu_base(struct isci_host *isci_host)
  296. {
  297. struct pci_dev *pdev = isci_host->pdev;
  298. int id = isci_host->id;
  299. return pcim_iomap_table(pdev)[SCI_SMU_BAR * 2] + SCI_SMU_BAR_SIZE * id;
  300. }
  301. #define SCI_MAX_TIMER_COUNT 25
  302. int isci_host_init(struct isci_host *isci_host)
  303. {
  304. int err = 0;
  305. int index = 0;
  306. enum sci_status status;
  307. struct scic_sds_controller *controller;
  308. struct scic_sds_port *scic_port;
  309. union scic_oem_parameters scic_oem_params;
  310. union scic_user_parameters scic_user_params;
  311. INIT_LIST_HEAD(&isci_host->timer_list_struct.timers);
  312. isci_timer_list_construct(
  313. &isci_host->timer_list_struct,
  314. SCI_MAX_TIMER_COUNT
  315. );
  316. controller = scic_controller_alloc(&isci_host->pdev->dev);
  317. if (!controller) {
  318. dev_err(&isci_host->pdev->dev,
  319. "%s: failed (%d)\n",
  320. __func__,
  321. err);
  322. return -ENOMEM;
  323. }
  324. isci_host->core_controller = controller;
  325. spin_lock_init(&isci_host->state_lock);
  326. spin_lock_init(&isci_host->scic_lock);
  327. spin_lock_init(&isci_host->queue_lock);
  328. init_waitqueue_head(&isci_host->eventq);
  329. isci_host_change_state(isci_host, isci_starting);
  330. isci_host->can_queue = ISCI_CAN_QUEUE_VAL;
  331. status = scic_controller_construct(controller, scu_base(isci_host),
  332. smu_base(isci_host));
  333. if (status != SCI_SUCCESS) {
  334. dev_err(&isci_host->pdev->dev,
  335. "%s: scic_controller_construct failed - status = %x\n",
  336. __func__,
  337. status);
  338. return -ENODEV;
  339. }
  340. isci_host->sas_ha.dev = &isci_host->pdev->dev;
  341. isci_host->sas_ha.lldd_ha = isci_host;
  342. /*----------- SCIC controller Initialization Stuff ------------------
  343. * set association host adapter struct in core controller.
  344. */
  345. sci_object_set_association(isci_host->core_controller,
  346. (void *)isci_host);
  347. /* grab initial values stored in the controller object for OEM and USER
  348. * parameters */
  349. scic_oem_parameters_get(controller, &scic_oem_params);
  350. scic_user_parameters_get(controller, &scic_user_params);
  351. if (isci_firmware) {
  352. /* grab any OEM and USER parameters specified in binary blob */
  353. status = isci_parse_oem_parameters(&scic_oem_params,
  354. isci_host->id,
  355. isci_firmware);
  356. if (status != SCI_SUCCESS) {
  357. dev_warn(&isci_host->pdev->dev,
  358. "parsing firmware oem parameters failed\n");
  359. return -EINVAL;
  360. }
  361. status = isci_parse_user_parameters(&scic_user_params,
  362. isci_host->id,
  363. isci_firmware);
  364. if (status != SCI_SUCCESS) {
  365. dev_warn(&isci_host->pdev->dev,
  366. "%s: isci_parse_user_parameters"
  367. " failed\n", __func__);
  368. return -EINVAL;
  369. }
  370. } else {
  371. status = scic_oem_parameters_set(isci_host->core_controller,
  372. &scic_oem_params);
  373. if (status != SCI_SUCCESS) {
  374. dev_warn(&isci_host->pdev->dev,
  375. "%s: scic_oem_parameters_set failed\n",
  376. __func__);
  377. return -ENODEV;
  378. }
  379. status = scic_user_parameters_set(isci_host->core_controller,
  380. &scic_user_params);
  381. if (status != SCI_SUCCESS) {
  382. dev_warn(&isci_host->pdev->dev,
  383. "%s: scic_user_parameters_set failed\n",
  384. __func__);
  385. return -ENODEV;
  386. }
  387. }
  388. status = scic_controller_initialize(isci_host->core_controller);
  389. if (status != SCI_SUCCESS) {
  390. dev_warn(&isci_host->pdev->dev,
  391. "%s: scic_controller_initialize failed -"
  392. " status = 0x%x\n",
  393. __func__, status);
  394. return -ENODEV;
  395. }
  396. tasklet_init(&isci_host->completion_tasklet,
  397. isci_host_completion_routine, (unsigned long)isci_host);
  398. INIT_LIST_HEAD(&(isci_host->mdl_struct_list));
  399. INIT_LIST_HEAD(&isci_host->requests_to_complete);
  400. INIT_LIST_HEAD(&isci_host->requests_to_abort);
  401. /* populate mdl with dma memory. scu_mdl_allocate_coherent() */
  402. err = isci_host_mdl_allocate_coherent(isci_host);
  403. if (err)
  404. return err;
  405. /*
  406. * keep the pool alloc size around, will use it for a bounds checking
  407. * when trying to convert virtual addresses to physical addresses
  408. */
  409. isci_host->dma_pool_alloc_size = sizeof(struct isci_request) +
  410. scic_io_request_get_object_size();
  411. isci_host->dma_pool = dmam_pool_create(DRV_NAME, &isci_host->pdev->dev,
  412. isci_host->dma_pool_alloc_size,
  413. SLAB_HWCACHE_ALIGN, 0);
  414. if (!isci_host->dma_pool)
  415. return -ENOMEM;
  416. for (index = 0; index < SCI_MAX_PORTS; index++)
  417. isci_port_init(&isci_host->isci_ports[index],
  418. isci_host,
  419. index);
  420. for (index = 0; index < SCI_MAX_PHYS; index++)
  421. isci_phy_init(&isci_host->phys[index], isci_host, index);
  422. /* Why are we doing this? Is this even necessary? */
  423. memcpy(&isci_host->sas_addr[0],
  424. &isci_host->phys[0].sas_addr[0],
  425. SAS_ADDR_SIZE);
  426. /* Start the ports */
  427. for (index = 0; index < SCI_MAX_PORTS; index++) {
  428. scic_controller_get_port_handle(controller, index, &scic_port);
  429. scic_port_start(scic_port);
  430. }
  431. return 0;
  432. }