ptrace.c 12 KB

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  1. /*
  2. * This file is subject to the terms and conditions of the GNU General Public
  3. * License. See the file "COPYING" in the main directory of this archive
  4. * for more details.
  5. *
  6. * Copyright (C) 1992 Ross Biro
  7. * Copyright (C) Linus Torvalds
  8. * Copyright (C) 1994, 95, 96, 97, 98, 2000 Ralf Baechle
  9. * Copyright (C) 1996 David S. Miller
  10. * Kevin D. Kissell, kevink@mips.com and Carsten Langgaard, carstenl@mips.com
  11. * Copyright (C) 1999 MIPS Technologies, Inc.
  12. * Copyright (C) 2000 Ulf Carlsson
  13. *
  14. * At this time Linux/MIPS64 only supports syscall tracing, even for 32-bit
  15. * binaries.
  16. */
  17. #include <linux/config.h>
  18. #include <linux/compiler.h>
  19. #include <linux/kernel.h>
  20. #include <linux/sched.h>
  21. #include <linux/mm.h>
  22. #include <linux/errno.h>
  23. #include <linux/ptrace.h>
  24. #include <linux/audit.h>
  25. #include <linux/smp.h>
  26. #include <linux/smp_lock.h>
  27. #include <linux/user.h>
  28. #include <linux/security.h>
  29. #include <linux/signal.h>
  30. #include <asm/byteorder.h>
  31. #include <asm/cpu.h>
  32. #include <asm/dsp.h>
  33. #include <asm/fpu.h>
  34. #include <asm/mipsregs.h>
  35. #include <asm/mipsmtregs.h>
  36. #include <asm/pgtable.h>
  37. #include <asm/page.h>
  38. #include <asm/system.h>
  39. #include <asm/uaccess.h>
  40. #include <asm/bootinfo.h>
  41. #include <asm/reg.h>
  42. /*
  43. * Called by kernel/ptrace.c when detaching..
  44. *
  45. * Make sure single step bits etc are not set.
  46. */
  47. void ptrace_disable(struct task_struct *child)
  48. {
  49. /* Nothing to do.. */
  50. }
  51. /*
  52. * Read a general register set. We always use the 64-bit format, even
  53. * for 32-bit kernels and for 32-bit processes on a 64-bit kernel.
  54. * Registers are sign extended to fill the available space.
  55. */
  56. int ptrace_getregs (struct task_struct *child, __s64 __user *data)
  57. {
  58. struct pt_regs *regs;
  59. int i;
  60. if (!access_ok(VERIFY_WRITE, data, 38 * 8))
  61. return -EIO;
  62. regs = task_pt_regs(child);
  63. for (i = 0; i < 32; i++)
  64. __put_user (regs->regs[i], data + i);
  65. __put_user (regs->lo, data + EF_LO - EF_R0);
  66. __put_user (regs->hi, data + EF_HI - EF_R0);
  67. __put_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
  68. __put_user (regs->cp0_badvaddr, data + EF_CP0_BADVADDR - EF_R0);
  69. __put_user (regs->cp0_status, data + EF_CP0_STATUS - EF_R0);
  70. __put_user (regs->cp0_cause, data + EF_CP0_CAUSE - EF_R0);
  71. return 0;
  72. }
  73. /*
  74. * Write a general register set. As for PTRACE_GETREGS, we always use
  75. * the 64-bit format. On a 32-bit kernel only the lower order half
  76. * (according to endianness) will be used.
  77. */
  78. int ptrace_setregs (struct task_struct *child, __s64 __user *data)
  79. {
  80. struct pt_regs *regs;
  81. int i;
  82. if (!access_ok(VERIFY_READ, data, 38 * 8))
  83. return -EIO;
  84. regs = task_pt_regs(child);
  85. for (i = 0; i < 32; i++)
  86. __get_user (regs->regs[i], data + i);
  87. __get_user (regs->lo, data + EF_LO - EF_R0);
  88. __get_user (regs->hi, data + EF_HI - EF_R0);
  89. __get_user (regs->cp0_epc, data + EF_CP0_EPC - EF_R0);
  90. /* badvaddr, status, and cause may not be written. */
  91. return 0;
  92. }
  93. int ptrace_getfpregs (struct task_struct *child, __u32 __user *data)
  94. {
  95. int i;
  96. if (!access_ok(VERIFY_WRITE, data, 33 * 8))
  97. return -EIO;
  98. if (tsk_used_math(child)) {
  99. fpureg_t *fregs = get_fpu_regs(child);
  100. for (i = 0; i < 32; i++)
  101. __put_user (fregs[i], i + (__u64 __user *) data);
  102. } else {
  103. for (i = 0; i < 32; i++)
  104. __put_user ((__u64) -1, i + (__u64 __user *) data);
  105. }
  106. if (cpu_has_fpu) {
  107. unsigned int flags, tmp;
  108. __put_user (child->thread.fpu.hard.fcr31, data + 64);
  109. preempt_disable();
  110. if (cpu_has_mipsmt) {
  111. unsigned int vpflags = dvpe();
  112. flags = read_c0_status();
  113. __enable_fpu();
  114. __asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
  115. write_c0_status(flags);
  116. evpe(vpflags);
  117. } else {
  118. flags = read_c0_status();
  119. __enable_fpu();
  120. __asm__ __volatile__("cfc1\t%0,$0" : "=r" (tmp));
  121. write_c0_status(flags);
  122. }
  123. preempt_enable();
  124. __put_user (tmp, data + 65);
  125. } else {
  126. __put_user (child->thread.fpu.soft.fcr31, data + 64);
  127. __put_user ((__u32) 0, data + 65);
  128. }
  129. return 0;
  130. }
  131. int ptrace_setfpregs (struct task_struct *child, __u32 __user *data)
  132. {
  133. fpureg_t *fregs;
  134. int i;
  135. if (!access_ok(VERIFY_READ, data, 33 * 8))
  136. return -EIO;
  137. fregs = get_fpu_regs(child);
  138. for (i = 0; i < 32; i++)
  139. __get_user (fregs[i], i + (__u64 __user *) data);
  140. if (cpu_has_fpu)
  141. __get_user (child->thread.fpu.hard.fcr31, data + 64);
  142. else
  143. __get_user (child->thread.fpu.soft.fcr31, data + 64);
  144. /* FIR may not be written. */
  145. return 0;
  146. }
  147. long arch_ptrace(struct task_struct *child, long request, long addr, long data)
  148. {
  149. int ret;
  150. switch (request) {
  151. /* when I and D space are separate, these will need to be fixed. */
  152. case PTRACE_PEEKTEXT: /* read word at location addr. */
  153. case PTRACE_PEEKDATA: {
  154. unsigned long tmp;
  155. int copied;
  156. copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
  157. ret = -EIO;
  158. if (copied != sizeof(tmp))
  159. break;
  160. ret = put_user(tmp,(unsigned long __user *) data);
  161. break;
  162. }
  163. /* Read the word at location addr in the USER area. */
  164. case PTRACE_PEEKUSR: {
  165. struct pt_regs *regs;
  166. unsigned long tmp = 0;
  167. regs = task_pt_regs(child);
  168. ret = 0; /* Default return value. */
  169. switch (addr) {
  170. case 0 ... 31:
  171. tmp = regs->regs[addr];
  172. break;
  173. case FPR_BASE ... FPR_BASE + 31:
  174. if (tsk_used_math(child)) {
  175. fpureg_t *fregs = get_fpu_regs(child);
  176. #ifdef CONFIG_32BIT
  177. /*
  178. * The odd registers are actually the high
  179. * order bits of the values stored in the even
  180. * registers - unless we're using r2k_switch.S.
  181. */
  182. if (addr & 1)
  183. tmp = (unsigned long) (fregs[((addr & ~1) - 32)] >> 32);
  184. else
  185. tmp = (unsigned long) (fregs[(addr - 32)] & 0xffffffff);
  186. #endif
  187. #ifdef CONFIG_64BIT
  188. tmp = fregs[addr - FPR_BASE];
  189. #endif
  190. } else {
  191. tmp = -1; /* FP not yet used */
  192. }
  193. break;
  194. case PC:
  195. tmp = regs->cp0_epc;
  196. break;
  197. case CAUSE:
  198. tmp = regs->cp0_cause;
  199. break;
  200. case BADVADDR:
  201. tmp = regs->cp0_badvaddr;
  202. break;
  203. case MMHI:
  204. tmp = regs->hi;
  205. break;
  206. case MMLO:
  207. tmp = regs->lo;
  208. break;
  209. case FPC_CSR:
  210. if (cpu_has_fpu)
  211. tmp = child->thread.fpu.hard.fcr31;
  212. else
  213. tmp = child->thread.fpu.soft.fcr31;
  214. break;
  215. case FPC_EIR: { /* implementation / version register */
  216. unsigned int flags;
  217. #ifdef CONFIG_MIPS_MT_SMTC
  218. unsigned int irqflags;
  219. unsigned int mtflags;
  220. #endif /* CONFIG_MIPS_MT_SMTC */
  221. if (!cpu_has_fpu)
  222. break;
  223. #ifdef CONFIG_MIPS_MT_SMTC
  224. /* Read-modify-write of Status must be atomic */
  225. local_irq_save(irqflags);
  226. mtflags = dmt();
  227. #endif /* CONFIG_MIPS_MT_SMTC */
  228. preempt_disable();
  229. if (cpu_has_mipsmt) {
  230. unsigned int vpflags = dvpe();
  231. flags = read_c0_status();
  232. __enable_fpu();
  233. __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
  234. write_c0_status(flags);
  235. evpe(vpflags);
  236. } else {
  237. flags = read_c0_status();
  238. __enable_fpu();
  239. __asm__ __volatile__("cfc1\t%0,$0": "=r" (tmp));
  240. write_c0_status(flags);
  241. }
  242. #ifdef CONFIG_MIPS_MT_SMTC
  243. emt(mtflags);
  244. local_irq_restore(irqflags);
  245. #endif /* CONFIG_MIPS_MT_SMTC */
  246. preempt_enable();
  247. break;
  248. }
  249. case DSP_BASE ... DSP_BASE + 5: {
  250. dspreg_t *dregs;
  251. if (!cpu_has_dsp) {
  252. tmp = 0;
  253. ret = -EIO;
  254. goto out;
  255. }
  256. dregs = __get_dsp_regs(child);
  257. tmp = (unsigned long) (dregs[addr - DSP_BASE]);
  258. break;
  259. }
  260. case DSP_CONTROL:
  261. if (!cpu_has_dsp) {
  262. tmp = 0;
  263. ret = -EIO;
  264. goto out;
  265. }
  266. tmp = child->thread.dsp.dspcontrol;
  267. break;
  268. default:
  269. tmp = 0;
  270. ret = -EIO;
  271. goto out;
  272. }
  273. ret = put_user(tmp, (unsigned long __user *) data);
  274. break;
  275. }
  276. /* when I and D space are separate, this will have to be fixed. */
  277. case PTRACE_POKETEXT: /* write the word at location addr. */
  278. case PTRACE_POKEDATA:
  279. ret = 0;
  280. if (access_process_vm(child, addr, &data, sizeof(data), 1)
  281. == sizeof(data))
  282. break;
  283. ret = -EIO;
  284. break;
  285. case PTRACE_POKEUSR: {
  286. struct pt_regs *regs;
  287. ret = 0;
  288. regs = task_pt_regs(child);
  289. switch (addr) {
  290. case 0 ... 31:
  291. regs->regs[addr] = data;
  292. break;
  293. case FPR_BASE ... FPR_BASE + 31: {
  294. fpureg_t *fregs = get_fpu_regs(child);
  295. if (!tsk_used_math(child)) {
  296. /* FP not yet used */
  297. memset(&child->thread.fpu.hard, ~0,
  298. sizeof(child->thread.fpu.hard));
  299. child->thread.fpu.hard.fcr31 = 0;
  300. }
  301. #ifdef CONFIG_32BIT
  302. /*
  303. * The odd registers are actually the high order bits
  304. * of the values stored in the even registers - unless
  305. * we're using r2k_switch.S.
  306. */
  307. if (addr & 1) {
  308. fregs[(addr & ~1) - FPR_BASE] &= 0xffffffff;
  309. fregs[(addr & ~1) - FPR_BASE] |= ((unsigned long long) data) << 32;
  310. } else {
  311. fregs[addr - FPR_BASE] &= ~0xffffffffLL;
  312. fregs[addr - FPR_BASE] |= data;
  313. }
  314. #endif
  315. #ifdef CONFIG_64BIT
  316. fregs[addr - FPR_BASE] = data;
  317. #endif
  318. break;
  319. }
  320. case PC:
  321. regs->cp0_epc = data;
  322. break;
  323. case MMHI:
  324. regs->hi = data;
  325. break;
  326. case MMLO:
  327. regs->lo = data;
  328. break;
  329. case FPC_CSR:
  330. if (cpu_has_fpu)
  331. child->thread.fpu.hard.fcr31 = data;
  332. else
  333. child->thread.fpu.soft.fcr31 = data;
  334. break;
  335. case DSP_BASE ... DSP_BASE + 5: {
  336. dspreg_t *dregs;
  337. if (!cpu_has_dsp) {
  338. ret = -EIO;
  339. break;
  340. }
  341. dregs = __get_dsp_regs(child);
  342. dregs[addr - DSP_BASE] = data;
  343. break;
  344. }
  345. case DSP_CONTROL:
  346. if (!cpu_has_dsp) {
  347. ret = -EIO;
  348. break;
  349. }
  350. child->thread.dsp.dspcontrol = data;
  351. break;
  352. default:
  353. /* The rest are not allowed. */
  354. ret = -EIO;
  355. break;
  356. }
  357. break;
  358. }
  359. case PTRACE_GETREGS:
  360. ret = ptrace_getregs (child, (__u64 __user *) data);
  361. break;
  362. case PTRACE_SETREGS:
  363. ret = ptrace_setregs (child, (__u64 __user *) data);
  364. break;
  365. case PTRACE_GETFPREGS:
  366. ret = ptrace_getfpregs (child, (__u32 __user *) data);
  367. break;
  368. case PTRACE_SETFPREGS:
  369. ret = ptrace_setfpregs (child, (__u32 __user *) data);
  370. break;
  371. case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
  372. case PTRACE_CONT: { /* restart after signal. */
  373. ret = -EIO;
  374. if (!valid_signal(data))
  375. break;
  376. if (request == PTRACE_SYSCALL) {
  377. set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
  378. }
  379. else {
  380. clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
  381. }
  382. child->exit_code = data;
  383. wake_up_process(child);
  384. ret = 0;
  385. break;
  386. }
  387. /*
  388. * make the child exit. Best I can do is send it a sigkill.
  389. * perhaps it should be put in the status that it wants to
  390. * exit.
  391. */
  392. case PTRACE_KILL:
  393. ret = 0;
  394. if (child->exit_state == EXIT_ZOMBIE) /* already dead */
  395. break;
  396. child->exit_code = SIGKILL;
  397. wake_up_process(child);
  398. break;
  399. case PTRACE_DETACH: /* detach a process that was attached. */
  400. ret = ptrace_detach(child, data);
  401. break;
  402. case PTRACE_GET_THREAD_AREA:
  403. ret = put_user(task_thread_info(child)->tp_value,
  404. (unsigned long __user *) data);
  405. break;
  406. default:
  407. ret = ptrace_request(child, request, addr, data);
  408. break;
  409. }
  410. out:
  411. return ret;
  412. }
  413. static inline int audit_arch(void)
  414. {
  415. int arch = EM_MIPS;
  416. #ifdef CONFIG_64BIT
  417. arch |= __AUDIT_ARCH_64BIT;
  418. #endif
  419. #if defined(__LITTLE_ENDIAN)
  420. arch |= __AUDIT_ARCH_LE;
  421. #endif
  422. return arch;
  423. }
  424. /*
  425. * Notification of system call entry/exit
  426. * - triggered by current->work.syscall_trace
  427. */
  428. asmlinkage void do_syscall_trace(struct pt_regs *regs, int entryexit)
  429. {
  430. if (unlikely(current->audit_context) && entryexit)
  431. audit_syscall_exit(current, AUDITSC_RESULT(regs->regs[2]),
  432. regs->regs[2]);
  433. if (!(current->ptrace & PT_PTRACED))
  434. goto out;
  435. if (!test_thread_flag(TIF_SYSCALL_TRACE))
  436. goto out;
  437. /* The 0x80 provides a way for the tracing parent to distinguish
  438. between a syscall stop and SIGTRAP delivery */
  439. ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) ?
  440. 0x80 : 0));
  441. /*
  442. * this isn't the same as continuing with a signal, but it will do
  443. * for normal use. strace only continues with a signal if the
  444. * stopping signal is not SIGTRAP. -brl
  445. */
  446. if (current->exit_code) {
  447. send_sig(current->exit_code, current, 1);
  448. current->exit_code = 0;
  449. }
  450. out:
  451. if (unlikely(current->audit_context) && !entryexit)
  452. audit_syscall_entry(current, audit_arch(), regs->regs[2],
  453. regs->regs[4], regs->regs[5],
  454. regs->regs[6], regs->regs[7]);
  455. }