irq.c 2.5 KB

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  1. /*
  2. * Copyright 2000 MontaVista Software Inc.
  3. * Author: MontaVista Software, Inc.
  4. * ppopov@mvista.com or source@mvista.com
  5. *
  6. * This file was derived from Carsten Langgaard's
  7. * arch/mips/mips-boards/atlas/atlas_int.c.
  8. *
  9. * Carsten Langgaard, carstenl@mips.com
  10. * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
  11. *
  12. * This program is free software; you can redistribute it and/or modify it
  13. * under the terms of the GNU General Public License as published by the
  14. * Free Software Foundation; either version 2 of the License, or (at your
  15. * option) any later version.
  16. *
  17. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  18. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  19. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  20. * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  21. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  22. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  23. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  24. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  25. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  26. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  27. *
  28. * You should have received a copy of the GNU General Public License along
  29. * with this program; if not, write to the Free Software Foundation, Inc.,
  30. * 675 Mass Ave, Cambridge, MA 02139, USA.
  31. */
  32. #include <linux/errno.h>
  33. #include <linux/init.h>
  34. #include <linux/kernel_stat.h>
  35. #include <linux/irq.h>
  36. #include <linux/module.h>
  37. #include <linux/signal.h>
  38. #include <linux/sched.h>
  39. #include <linux/types.h>
  40. #include <linux/interrupt.h>
  41. #include <asm/irq_cpu.h>
  42. static inline unsigned int ffz8(unsigned int word)
  43. {
  44. unsigned long k;
  45. k = 7;
  46. if (word & 0x0fUL) { k -= 4; word <<= 4; }
  47. if (word & 0x30UL) { k -= 2; word <<= 2; }
  48. if (word & 0x40UL) { k -= 1; }
  49. return k;
  50. }
  51. extern void mips_timer_interrupt(struct pt_regs *regs);
  52. asmlinkage void ev96100_cpu_irq(unsigned int pending, struct pt_regs *regs)
  53. {
  54. do_IRQ(ffz8(pending >> 8), regs);
  55. }
  56. asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
  57. {
  58. unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM;
  59. if (pending & CAUSEF_IP7)
  60. mips_timer_interrupt(regs);
  61. else if (pending)
  62. ev96100_cpu_irq(pending, regs);
  63. else
  64. spurious_interrupt(regs);
  65. }
  66. void __init arch_init_irq(void)
  67. {
  68. mips_cpu_irq_init(0);
  69. }