iwl-4965.c 140 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2008 Intel Corporation. All rights reserved.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of version 2 of the GNU General Public License as
  7. * published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program; if not, write to the Free Software Foundation, Inc.,
  16. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  17. *
  18. * The full GNU General Public License is included in this distribution in the
  19. * file called LICENSE.
  20. *
  21. * Contact Information:
  22. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  23. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  24. *
  25. *****************************************************************************/
  26. #include <linux/kernel.h>
  27. #include <linux/module.h>
  28. #include <linux/version.h>
  29. #include <linux/init.h>
  30. #include <linux/pci.h>
  31. #include <linux/dma-mapping.h>
  32. #include <linux/delay.h>
  33. #include <linux/skbuff.h>
  34. #include <linux/netdevice.h>
  35. #include <linux/wireless.h>
  36. #include <net/mac80211.h>
  37. #include <linux/etherdevice.h>
  38. #include <asm/unaligned.h>
  39. #include "iwl-eeprom.h"
  40. #include "iwl-core.h"
  41. #include "iwl-4965.h"
  42. #include "iwl-helpers.h"
  43. static void iwl4965_hw_card_show_info(struct iwl_priv *priv);
  44. #define IWL_DECLARE_RATE_INFO(r, s, ip, in, rp, rn, pp, np) \
  45. [IWL_RATE_##r##M_INDEX] = { IWL_RATE_##r##M_PLCP, \
  46. IWL_RATE_SISO_##s##M_PLCP, \
  47. IWL_RATE_MIMO_##s##M_PLCP, \
  48. IWL_RATE_##r##M_IEEE, \
  49. IWL_RATE_##ip##M_INDEX, \
  50. IWL_RATE_##in##M_INDEX, \
  51. IWL_RATE_##rp##M_INDEX, \
  52. IWL_RATE_##rn##M_INDEX, \
  53. IWL_RATE_##pp##M_INDEX, \
  54. IWL_RATE_##np##M_INDEX }
  55. /*
  56. * Parameter order:
  57. * rate, ht rate, prev rate, next rate, prev tgg rate, next tgg rate
  58. *
  59. * If there isn't a valid next or previous rate then INV is used which
  60. * maps to IWL_RATE_INVALID
  61. *
  62. */
  63. const struct iwl4965_rate_info iwl4965_rates[IWL_RATE_COUNT] = {
  64. IWL_DECLARE_RATE_INFO(1, INV, INV, 2, INV, 2, INV, 2), /* 1mbps */
  65. IWL_DECLARE_RATE_INFO(2, INV, 1, 5, 1, 5, 1, 5), /* 2mbps */
  66. IWL_DECLARE_RATE_INFO(5, INV, 2, 6, 2, 11, 2, 11), /*5.5mbps */
  67. IWL_DECLARE_RATE_INFO(11, INV, 9, 12, 9, 12, 5, 18), /* 11mbps */
  68. IWL_DECLARE_RATE_INFO(6, 6, 5, 9, 5, 11, 5, 11), /* 6mbps */
  69. IWL_DECLARE_RATE_INFO(9, 6, 6, 11, 6, 11, 5, 11), /* 9mbps */
  70. IWL_DECLARE_RATE_INFO(12, 12, 11, 18, 11, 18, 11, 18), /* 12mbps */
  71. IWL_DECLARE_RATE_INFO(18, 18, 12, 24, 12, 24, 11, 24), /* 18mbps */
  72. IWL_DECLARE_RATE_INFO(24, 24, 18, 36, 18, 36, 18, 36), /* 24mbps */
  73. IWL_DECLARE_RATE_INFO(36, 36, 24, 48, 24, 48, 24, 48), /* 36mbps */
  74. IWL_DECLARE_RATE_INFO(48, 48, 36, 54, 36, 54, 36, 54), /* 48mbps */
  75. IWL_DECLARE_RATE_INFO(54, 54, 48, INV, 48, INV, 48, INV),/* 54mbps */
  76. IWL_DECLARE_RATE_INFO(60, 60, 48, INV, 48, INV, 48, INV),/* 60mbps */
  77. };
  78. #ifdef CONFIG_IWL4965_HT
  79. static const u16 default_tid_to_tx_fifo[] = {
  80. IWL_TX_FIFO_AC1,
  81. IWL_TX_FIFO_AC0,
  82. IWL_TX_FIFO_AC0,
  83. IWL_TX_FIFO_AC1,
  84. IWL_TX_FIFO_AC2,
  85. IWL_TX_FIFO_AC2,
  86. IWL_TX_FIFO_AC3,
  87. IWL_TX_FIFO_AC3,
  88. IWL_TX_FIFO_NONE,
  89. IWL_TX_FIFO_NONE,
  90. IWL_TX_FIFO_NONE,
  91. IWL_TX_FIFO_NONE,
  92. IWL_TX_FIFO_NONE,
  93. IWL_TX_FIFO_NONE,
  94. IWL_TX_FIFO_NONE,
  95. IWL_TX_FIFO_NONE,
  96. IWL_TX_FIFO_AC3
  97. };
  98. #endif /*CONFIG_IWL4965_HT */
  99. static int iwl4965_init_drv(struct iwl_priv *priv)
  100. {
  101. int ret;
  102. int i;
  103. priv->antenna = (enum iwl4965_antenna)iwl4965_mod_params.antenna;
  104. priv->retry_rate = 1;
  105. priv->ibss_beacon = NULL;
  106. spin_lock_init(&priv->lock);
  107. spin_lock_init(&priv->power_data.lock);
  108. spin_lock_init(&priv->sta_lock);
  109. spin_lock_init(&priv->hcmd_lock);
  110. spin_lock_init(&priv->lq_mngr.lock);
  111. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
  112. INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
  113. INIT_LIST_HEAD(&priv->free_frames);
  114. mutex_init(&priv->mutex);
  115. /* Clear the driver's (not device's) station table */
  116. iwlcore_clear_stations_table(priv);
  117. priv->data_retry_limit = -1;
  118. priv->ieee_channels = NULL;
  119. priv->ieee_rates = NULL;
  120. priv->band = IEEE80211_BAND_2GHZ;
  121. priv->iw_mode = IEEE80211_IF_TYPE_STA;
  122. priv->use_ant_b_for_management_frame = 1; /* start with ant B */
  123. priv->valid_antenna = 0x7; /* assume all 3 connected */
  124. priv->ps_mode = IWL_MIMO_PS_NONE;
  125. /* Choose which receivers/antennas to use */
  126. iwl4965_set_rxon_chain(priv);
  127. iwlcore_reset_qos(priv);
  128. priv->qos_data.qos_active = 0;
  129. priv->qos_data.qos_cap.val = 0;
  130. iwlcore_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
  131. priv->rates_mask = IWL_RATES_MASK;
  132. /* If power management is turned on, default to AC mode */
  133. priv->power_mode = IWL_POWER_AC;
  134. priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
  135. ret = iwl_init_channel_map(priv);
  136. if (ret) {
  137. IWL_ERROR("initializing regulatory failed: %d\n", ret);
  138. goto err;
  139. }
  140. ret = iwl4965_init_geos(priv);
  141. if (ret) {
  142. IWL_ERROR("initializing geos failed: %d\n", ret);
  143. goto err_free_channel_map;
  144. }
  145. iwl4965_rate_control_register(priv->hw);
  146. ret = ieee80211_register_hw(priv->hw);
  147. if (ret) {
  148. IWL_ERROR("Failed to register network device (error %d)\n",
  149. ret);
  150. goto err_free_geos;
  151. }
  152. priv->hw->conf.beacon_int = 100;
  153. priv->mac80211_registered = 1;
  154. return 0;
  155. err_free_geos:
  156. iwl4965_free_geos(priv);
  157. err_free_channel_map:
  158. iwl_free_channel_map(priv);
  159. err:
  160. return ret;
  161. }
  162. static int is_fat_channel(__le32 rxon_flags)
  163. {
  164. return (rxon_flags & RXON_FLG_CHANNEL_MODE_PURE_40_MSK) ||
  165. (rxon_flags & RXON_FLG_CHANNEL_MODE_MIXED_MSK);
  166. }
  167. static u8 is_single_stream(struct iwl_priv *priv)
  168. {
  169. #ifdef CONFIG_IWL4965_HT
  170. if (!priv->current_ht_config.is_ht ||
  171. (priv->current_ht_config.supp_mcs_set[1] == 0) ||
  172. (priv->ps_mode == IWL_MIMO_PS_STATIC))
  173. return 1;
  174. #else
  175. return 1;
  176. #endif /*CONFIG_IWL4965_HT */
  177. return 0;
  178. }
  179. int iwl4965_hwrate_to_plcp_idx(u32 rate_n_flags)
  180. {
  181. int idx = 0;
  182. /* 4965 HT rate format */
  183. if (rate_n_flags & RATE_MCS_HT_MSK) {
  184. idx = (rate_n_flags & 0xff);
  185. if (idx >= IWL_RATE_MIMO_6M_PLCP)
  186. idx = idx - IWL_RATE_MIMO_6M_PLCP;
  187. idx += IWL_FIRST_OFDM_RATE;
  188. /* skip 9M not supported in ht*/
  189. if (idx >= IWL_RATE_9M_INDEX)
  190. idx += 1;
  191. if ((idx >= IWL_FIRST_OFDM_RATE) && (idx <= IWL_LAST_OFDM_RATE))
  192. return idx;
  193. /* 4965 legacy rate format, search for match in table */
  194. } else {
  195. for (idx = 0; idx < ARRAY_SIZE(iwl4965_rates); idx++)
  196. if (iwl4965_rates[idx].plcp == (rate_n_flags & 0xFF))
  197. return idx;
  198. }
  199. return -1;
  200. }
  201. /**
  202. * translate ucode response to mac80211 tx status control values
  203. */
  204. void iwl4965_hwrate_to_tx_control(struct iwl_priv *priv, u32 rate_n_flags,
  205. struct ieee80211_tx_control *control)
  206. {
  207. int rate_index;
  208. control->antenna_sel_tx =
  209. ((rate_n_flags & RATE_MCS_ANT_AB_MSK) >> RATE_MCS_ANT_A_POS);
  210. if (rate_n_flags & RATE_MCS_HT_MSK)
  211. control->flags |= IEEE80211_TXCTL_OFDM_HT;
  212. if (rate_n_flags & RATE_MCS_GF_MSK)
  213. control->flags |= IEEE80211_TXCTL_GREEN_FIELD;
  214. if (rate_n_flags & RATE_MCS_FAT_MSK)
  215. control->flags |= IEEE80211_TXCTL_40_MHZ_WIDTH;
  216. if (rate_n_flags & RATE_MCS_DUP_MSK)
  217. control->flags |= IEEE80211_TXCTL_DUP_DATA;
  218. if (rate_n_flags & RATE_MCS_SGI_MSK)
  219. control->flags |= IEEE80211_TXCTL_SHORT_GI;
  220. /* since iwl4965_hwrate_to_plcp_idx is band indifferent, we always use
  221. * IEEE80211_BAND_2GHZ band as it contains all the rates */
  222. rate_index = iwl4965_hwrate_to_plcp_idx(rate_n_flags);
  223. if (rate_index == -1)
  224. control->tx_rate = NULL;
  225. else
  226. control->tx_rate =
  227. &priv->bands[IEEE80211_BAND_2GHZ].bitrates[rate_index];
  228. }
  229. /*
  230. * Determine how many receiver/antenna chains to use.
  231. * More provides better reception via diversity. Fewer saves power.
  232. * MIMO (dual stream) requires at least 2, but works better with 3.
  233. * This does not determine *which* chains to use, just how many.
  234. */
  235. static int iwl4965_get_rx_chain_counter(struct iwl_priv *priv,
  236. u8 *idle_state, u8 *rx_state)
  237. {
  238. u8 is_single = is_single_stream(priv);
  239. u8 is_cam = test_bit(STATUS_POWER_PMI, &priv->status) ? 0 : 1;
  240. /* # of Rx chains to use when expecting MIMO. */
  241. if (is_single || (!is_cam && (priv->ps_mode == IWL_MIMO_PS_STATIC)))
  242. *rx_state = 2;
  243. else
  244. *rx_state = 3;
  245. /* # Rx chains when idling and maybe trying to save power */
  246. switch (priv->ps_mode) {
  247. case IWL_MIMO_PS_STATIC:
  248. case IWL_MIMO_PS_DYNAMIC:
  249. *idle_state = (is_cam) ? 2 : 1;
  250. break;
  251. case IWL_MIMO_PS_NONE:
  252. *idle_state = (is_cam) ? *rx_state : 1;
  253. break;
  254. default:
  255. *idle_state = 1;
  256. break;
  257. }
  258. return 0;
  259. }
  260. int iwl4965_hw_rxq_stop(struct iwl_priv *priv)
  261. {
  262. int rc;
  263. unsigned long flags;
  264. spin_lock_irqsave(&priv->lock, flags);
  265. rc = iwl4965_grab_nic_access(priv);
  266. if (rc) {
  267. spin_unlock_irqrestore(&priv->lock, flags);
  268. return rc;
  269. }
  270. /* stop Rx DMA */
  271. iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
  272. rc = iwl4965_poll_direct_bit(priv, FH_MEM_RSSR_RX_STATUS_REG,
  273. (1 << 24), 1000);
  274. if (rc < 0)
  275. IWL_ERROR("Can't stop Rx DMA.\n");
  276. iwl4965_release_nic_access(priv);
  277. spin_unlock_irqrestore(&priv->lock, flags);
  278. return 0;
  279. }
  280. u8 iwl4965_hw_find_station(struct iwl_priv *priv, const u8 *addr)
  281. {
  282. int i;
  283. int start = 0;
  284. int ret = IWL_INVALID_STATION;
  285. unsigned long flags;
  286. DECLARE_MAC_BUF(mac);
  287. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) ||
  288. (priv->iw_mode == IEEE80211_IF_TYPE_AP))
  289. start = IWL_STA_ID;
  290. if (is_broadcast_ether_addr(addr))
  291. return priv->hw_setting.bcast_sta_id;
  292. spin_lock_irqsave(&priv->sta_lock, flags);
  293. for (i = start; i < priv->hw_setting.max_stations; i++)
  294. if ((priv->stations[i].used) &&
  295. (!compare_ether_addr
  296. (priv->stations[i].sta.sta.addr, addr))) {
  297. ret = i;
  298. goto out;
  299. }
  300. IWL_DEBUG_ASSOC_LIMIT("can not find STA %s total %d\n",
  301. print_mac(mac, addr), priv->num_stations);
  302. out:
  303. spin_unlock_irqrestore(&priv->sta_lock, flags);
  304. return ret;
  305. }
  306. static int iwl4965_nic_set_pwr_src(struct iwl_priv *priv, int pwr_max)
  307. {
  308. int ret;
  309. unsigned long flags;
  310. spin_lock_irqsave(&priv->lock, flags);
  311. ret = iwl4965_grab_nic_access(priv);
  312. if (ret) {
  313. spin_unlock_irqrestore(&priv->lock, flags);
  314. return ret;
  315. }
  316. if (!pwr_max) {
  317. u32 val;
  318. ret = pci_read_config_dword(priv->pci_dev, PCI_POWER_SOURCE,
  319. &val);
  320. if (val & PCI_CFG_PMC_PME_FROM_D3COLD_SUPPORT)
  321. iwl4965_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
  322. APMG_PS_CTRL_VAL_PWR_SRC_VAUX,
  323. ~APMG_PS_CTRL_MSK_PWR_SRC);
  324. } else
  325. iwl4965_set_bits_mask_prph(priv, APMG_PS_CTRL_REG,
  326. APMG_PS_CTRL_VAL_PWR_SRC_VMAIN,
  327. ~APMG_PS_CTRL_MSK_PWR_SRC);
  328. iwl4965_release_nic_access(priv);
  329. spin_unlock_irqrestore(&priv->lock, flags);
  330. return ret;
  331. }
  332. static int iwl4965_rx_init(struct iwl_priv *priv, struct iwl4965_rx_queue *rxq)
  333. {
  334. int rc;
  335. unsigned long flags;
  336. unsigned int rb_size;
  337. spin_lock_irqsave(&priv->lock, flags);
  338. rc = iwl4965_grab_nic_access(priv);
  339. if (rc) {
  340. spin_unlock_irqrestore(&priv->lock, flags);
  341. return rc;
  342. }
  343. if (iwl4965_mod_params.amsdu_size_8K)
  344. rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_8K;
  345. else
  346. rb_size = FH_RCSR_RX_CONFIG_REG_VAL_RB_SIZE_4K;
  347. /* Stop Rx DMA */
  348. iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG, 0);
  349. /* Reset driver's Rx queue write index */
  350. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_WPTR_REG, 0);
  351. /* Tell device where to find RBD circular buffer in DRAM */
  352. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_RBDCB_BASE_REG,
  353. rxq->dma_addr >> 8);
  354. /* Tell device where in DRAM to update its Rx status */
  355. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_STTS_WPTR_REG,
  356. (priv->hw_setting.shared_phys +
  357. offsetof(struct iwl4965_shared, val0)) >> 4);
  358. /* Enable Rx DMA, enable host interrupt, Rx buffer size 4k, 256 RBDs */
  359. iwl4965_write_direct32(priv, FH_MEM_RCSR_CHNL0_CONFIG_REG,
  360. FH_RCSR_RX_CONFIG_CHNL_EN_ENABLE_VAL |
  361. FH_RCSR_CHNL0_RX_CONFIG_IRQ_DEST_INT_HOST_VAL |
  362. rb_size |
  363. /*0x10 << 4 | */
  364. (RX_QUEUE_SIZE_LOG <<
  365. FH_RCSR_RX_CONFIG_RBDCB_SIZE_BITSHIFT));
  366. /*
  367. * iwl4965_write32(priv,CSR_INT_COAL_REG,0);
  368. */
  369. iwl4965_release_nic_access(priv);
  370. spin_unlock_irqrestore(&priv->lock, flags);
  371. return 0;
  372. }
  373. /* Tell 4965 where to find the "keep warm" buffer */
  374. static int iwl4965_kw_init(struct iwl_priv *priv)
  375. {
  376. unsigned long flags;
  377. int rc;
  378. spin_lock_irqsave(&priv->lock, flags);
  379. rc = iwl4965_grab_nic_access(priv);
  380. if (rc)
  381. goto out;
  382. iwl4965_write_direct32(priv, IWL_FH_KW_MEM_ADDR_REG,
  383. priv->kw.dma_addr >> 4);
  384. iwl4965_release_nic_access(priv);
  385. out:
  386. spin_unlock_irqrestore(&priv->lock, flags);
  387. return rc;
  388. }
  389. static int iwl4965_kw_alloc(struct iwl_priv *priv)
  390. {
  391. struct pci_dev *dev = priv->pci_dev;
  392. struct iwl4965_kw *kw = &priv->kw;
  393. kw->size = IWL4965_KW_SIZE; /* TBW need set somewhere else */
  394. kw->v_addr = pci_alloc_consistent(dev, kw->size, &kw->dma_addr);
  395. if (!kw->v_addr)
  396. return -ENOMEM;
  397. return 0;
  398. }
  399. /**
  400. * iwl4965_kw_free - Free the "keep warm" buffer
  401. */
  402. static void iwl4965_kw_free(struct iwl_priv *priv)
  403. {
  404. struct pci_dev *dev = priv->pci_dev;
  405. struct iwl4965_kw *kw = &priv->kw;
  406. if (kw->v_addr) {
  407. pci_free_consistent(dev, kw->size, kw->v_addr, kw->dma_addr);
  408. memset(kw, 0, sizeof(*kw));
  409. }
  410. }
  411. /**
  412. * iwl4965_txq_ctx_reset - Reset TX queue context
  413. * Destroys all DMA structures and initialise them again
  414. *
  415. * @param priv
  416. * @return error code
  417. */
  418. static int iwl4965_txq_ctx_reset(struct iwl_priv *priv)
  419. {
  420. int rc = 0;
  421. int txq_id, slots_num;
  422. unsigned long flags;
  423. iwl4965_kw_free(priv);
  424. /* Free all tx/cmd queues and keep-warm buffer */
  425. iwl4965_hw_txq_ctx_free(priv);
  426. /* Alloc keep-warm buffer */
  427. rc = iwl4965_kw_alloc(priv);
  428. if (rc) {
  429. IWL_ERROR("Keep Warm allocation failed");
  430. goto error_kw;
  431. }
  432. spin_lock_irqsave(&priv->lock, flags);
  433. rc = iwl4965_grab_nic_access(priv);
  434. if (unlikely(rc)) {
  435. IWL_ERROR("TX reset failed");
  436. spin_unlock_irqrestore(&priv->lock, flags);
  437. goto error_reset;
  438. }
  439. /* Turn off all Tx DMA channels */
  440. iwl4965_write_prph(priv, KDR_SCD_TXFACT, 0);
  441. iwl4965_release_nic_access(priv);
  442. spin_unlock_irqrestore(&priv->lock, flags);
  443. /* Tell 4965 where to find the keep-warm buffer */
  444. rc = iwl4965_kw_init(priv);
  445. if (rc) {
  446. IWL_ERROR("kw_init failed\n");
  447. goto error_reset;
  448. }
  449. /* Alloc and init all (default 16) Tx queues,
  450. * including the command queue (#4) */
  451. for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++) {
  452. slots_num = (txq_id == IWL_CMD_QUEUE_NUM) ?
  453. TFD_CMD_SLOTS : TFD_TX_CMD_SLOTS;
  454. rc = iwl4965_tx_queue_init(priv, &priv->txq[txq_id], slots_num,
  455. txq_id);
  456. if (rc) {
  457. IWL_ERROR("Tx %d queue init failed\n", txq_id);
  458. goto error;
  459. }
  460. }
  461. return rc;
  462. error:
  463. iwl4965_hw_txq_ctx_free(priv);
  464. error_reset:
  465. iwl4965_kw_free(priv);
  466. error_kw:
  467. return rc;
  468. }
  469. int iwl4965_hw_nic_init(struct iwl_priv *priv)
  470. {
  471. int rc;
  472. unsigned long flags;
  473. struct iwl4965_rx_queue *rxq = &priv->rxq;
  474. u8 rev_id;
  475. u32 val;
  476. u8 val_link;
  477. iwl4965_power_init_handle(priv);
  478. /* nic_init */
  479. spin_lock_irqsave(&priv->lock, flags);
  480. iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  481. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  482. iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  483. rc = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
  484. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  485. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  486. if (rc < 0) {
  487. spin_unlock_irqrestore(&priv->lock, flags);
  488. IWL_DEBUG_INFO("Failed to init the card\n");
  489. return rc;
  490. }
  491. rc = iwl4965_grab_nic_access(priv);
  492. if (rc) {
  493. spin_unlock_irqrestore(&priv->lock, flags);
  494. return rc;
  495. }
  496. iwl4965_read_prph(priv, APMG_CLK_CTRL_REG);
  497. iwl4965_write_prph(priv, APMG_CLK_CTRL_REG,
  498. APMG_CLK_VAL_DMA_CLK_RQT |
  499. APMG_CLK_VAL_BSM_CLK_RQT);
  500. iwl4965_read_prph(priv, APMG_CLK_CTRL_REG);
  501. udelay(20);
  502. iwl4965_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
  503. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  504. iwl4965_release_nic_access(priv);
  505. iwl4965_write32(priv, CSR_INT_COALESCING, 512 / 32);
  506. spin_unlock_irqrestore(&priv->lock, flags);
  507. /* Determine HW type */
  508. rc = pci_read_config_byte(priv->pci_dev, PCI_REVISION_ID, &rev_id);
  509. if (rc)
  510. return rc;
  511. IWL_DEBUG_INFO("HW Revision ID = 0x%X\n", rev_id);
  512. iwl4965_nic_set_pwr_src(priv, 1);
  513. spin_lock_irqsave(&priv->lock, flags);
  514. if ((rev_id & 0x80) == 0x80 && (rev_id & 0x7f) < 8) {
  515. pci_read_config_dword(priv->pci_dev, PCI_REG_WUM8, &val);
  516. /* Enable No Snoop field */
  517. pci_write_config_dword(priv->pci_dev, PCI_REG_WUM8,
  518. val & ~(1 << 11));
  519. }
  520. spin_unlock_irqrestore(&priv->lock, flags);
  521. if (priv->eeprom.calib_version < EEPROM_TX_POWER_VERSION_NEW) {
  522. IWL_ERROR("Older EEPROM detected! Aborting.\n");
  523. return -EINVAL;
  524. }
  525. pci_read_config_byte(priv->pci_dev, PCI_LINK_CTRL, &val_link);
  526. /* disable L1 entry -- workaround for pre-B1 */
  527. pci_write_config_byte(priv->pci_dev, PCI_LINK_CTRL, val_link & ~0x02);
  528. spin_lock_irqsave(&priv->lock, flags);
  529. /* set CSR_HW_CONFIG_REG for uCode use */
  530. iwl4965_set_bit(priv, CSR_HW_IF_CONFIG_REG,
  531. CSR49_HW_IF_CONFIG_REG_BIT_4965_R |
  532. CSR49_HW_IF_CONFIG_REG_BIT_RADIO_SI |
  533. CSR49_HW_IF_CONFIG_REG_BIT_MAC_SI);
  534. rc = iwl4965_grab_nic_access(priv);
  535. if (rc < 0) {
  536. spin_unlock_irqrestore(&priv->lock, flags);
  537. IWL_DEBUG_INFO("Failed to init the card\n");
  538. return rc;
  539. }
  540. iwl4965_read_prph(priv, APMG_PS_CTRL_REG);
  541. iwl4965_set_bits_prph(priv, APMG_PS_CTRL_REG,
  542. APMG_PS_CTRL_VAL_RESET_REQ);
  543. udelay(5);
  544. iwl4965_clear_bits_prph(priv, APMG_PS_CTRL_REG,
  545. APMG_PS_CTRL_VAL_RESET_REQ);
  546. iwl4965_release_nic_access(priv);
  547. spin_unlock_irqrestore(&priv->lock, flags);
  548. iwl4965_hw_card_show_info(priv);
  549. /* end nic_init */
  550. /* Allocate the RX queue, or reset if it is already allocated */
  551. if (!rxq->bd) {
  552. rc = iwl4965_rx_queue_alloc(priv);
  553. if (rc) {
  554. IWL_ERROR("Unable to initialize Rx queue\n");
  555. return -ENOMEM;
  556. }
  557. } else
  558. iwl4965_rx_queue_reset(priv, rxq);
  559. iwl4965_rx_replenish(priv);
  560. iwl4965_rx_init(priv, rxq);
  561. spin_lock_irqsave(&priv->lock, flags);
  562. rxq->need_update = 1;
  563. iwl4965_rx_queue_update_write_ptr(priv, rxq);
  564. spin_unlock_irqrestore(&priv->lock, flags);
  565. /* Allocate and init all Tx and Command queues */
  566. rc = iwl4965_txq_ctx_reset(priv);
  567. if (rc)
  568. return rc;
  569. if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_SW_RF_KILL_ENABLE)
  570. IWL_DEBUG_RF_KILL("SW RF KILL supported in EEPROM.\n");
  571. if (priv->eeprom.sku_cap & EEPROM_SKU_CAP_HW_RF_KILL_ENABLE)
  572. IWL_DEBUG_RF_KILL("HW RF KILL supported in EEPROM.\n");
  573. set_bit(STATUS_INIT, &priv->status);
  574. return 0;
  575. }
  576. int iwl4965_hw_nic_stop_master(struct iwl_priv *priv)
  577. {
  578. int rc = 0;
  579. u32 reg_val;
  580. unsigned long flags;
  581. spin_lock_irqsave(&priv->lock, flags);
  582. /* set stop master bit */
  583. iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
  584. reg_val = iwl4965_read32(priv, CSR_GP_CNTRL);
  585. if (CSR_GP_CNTRL_REG_FLAG_MAC_POWER_SAVE ==
  586. (reg_val & CSR_GP_CNTRL_REG_MSK_POWER_SAVE_TYPE))
  587. IWL_DEBUG_INFO("Card in power save, master is already "
  588. "stopped\n");
  589. else {
  590. rc = iwl4965_poll_bit(priv, CSR_RESET,
  591. CSR_RESET_REG_FLAG_MASTER_DISABLED,
  592. CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
  593. if (rc < 0) {
  594. spin_unlock_irqrestore(&priv->lock, flags);
  595. return rc;
  596. }
  597. }
  598. spin_unlock_irqrestore(&priv->lock, flags);
  599. IWL_DEBUG_INFO("stop master\n");
  600. return rc;
  601. }
  602. /**
  603. * iwl4965_hw_txq_ctx_stop - Stop all Tx DMA channels, free Tx queue memory
  604. */
  605. void iwl4965_hw_txq_ctx_stop(struct iwl_priv *priv)
  606. {
  607. int txq_id;
  608. unsigned long flags;
  609. /* Stop each Tx DMA channel, and wait for it to be idle */
  610. for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++) {
  611. spin_lock_irqsave(&priv->lock, flags);
  612. if (iwl4965_grab_nic_access(priv)) {
  613. spin_unlock_irqrestore(&priv->lock, flags);
  614. continue;
  615. }
  616. iwl4965_write_direct32(priv,
  617. IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id),
  618. 0x0);
  619. iwl4965_poll_direct_bit(priv, IWL_FH_TSSR_TX_STATUS_REG,
  620. IWL_FH_TSSR_TX_STATUS_REG_MSK_CHNL_IDLE
  621. (txq_id), 200);
  622. iwl4965_release_nic_access(priv);
  623. spin_unlock_irqrestore(&priv->lock, flags);
  624. }
  625. /* Deallocate memory for all Tx queues */
  626. iwl4965_hw_txq_ctx_free(priv);
  627. }
  628. int iwl4965_hw_nic_reset(struct iwl_priv *priv)
  629. {
  630. int rc = 0;
  631. unsigned long flags;
  632. iwl4965_hw_nic_stop_master(priv);
  633. spin_lock_irqsave(&priv->lock, flags);
  634. iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  635. udelay(10);
  636. iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  637. rc = iwl4965_poll_bit(priv, CSR_RESET,
  638. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  639. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25);
  640. udelay(10);
  641. rc = iwl4965_grab_nic_access(priv);
  642. if (!rc) {
  643. iwl4965_write_prph(priv, APMG_CLK_EN_REG,
  644. APMG_CLK_VAL_DMA_CLK_RQT |
  645. APMG_CLK_VAL_BSM_CLK_RQT);
  646. udelay(10);
  647. iwl4965_set_bits_prph(priv, APMG_PCIDEV_STT_REG,
  648. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  649. iwl4965_release_nic_access(priv);
  650. }
  651. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  652. wake_up_interruptible(&priv->wait_command_queue);
  653. spin_unlock_irqrestore(&priv->lock, flags);
  654. return rc;
  655. }
  656. #define REG_RECALIB_PERIOD (60)
  657. /**
  658. * iwl4965_bg_statistics_periodic - Timer callback to queue statistics
  659. *
  660. * This callback is provided in order to queue the statistics_work
  661. * in work_queue context (v. softirq)
  662. *
  663. * This timer function is continually reset to execute within
  664. * REG_RECALIB_PERIOD seconds since the last STATISTICS_NOTIFICATION
  665. * was received. We need to ensure we receive the statistics in order
  666. * to update the temperature used for calibrating the TXPOWER. However,
  667. * we can't send the statistics command from softirq context (which
  668. * is the context which timers run at) so we have to queue off the
  669. * statistics_work to actually send the command to the hardware.
  670. */
  671. static void iwl4965_bg_statistics_periodic(unsigned long data)
  672. {
  673. struct iwl_priv *priv = (struct iwl_priv *)data;
  674. queue_work(priv->workqueue, &priv->statistics_work);
  675. }
  676. /**
  677. * iwl4965_bg_statistics_work - Send the statistics request to the hardware.
  678. *
  679. * This is queued by iwl4965_bg_statistics_periodic.
  680. */
  681. static void iwl4965_bg_statistics_work(struct work_struct *work)
  682. {
  683. struct iwl_priv *priv = container_of(work, struct iwl_priv,
  684. statistics_work);
  685. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  686. return;
  687. mutex_lock(&priv->mutex);
  688. iwl4965_send_statistics_request(priv);
  689. mutex_unlock(&priv->mutex);
  690. }
  691. #define CT_LIMIT_CONST 259
  692. #define TM_CT_KILL_THRESHOLD 110
  693. void iwl4965_rf_kill_ct_config(struct iwl_priv *priv)
  694. {
  695. struct iwl4965_ct_kill_config cmd;
  696. u32 R1, R2, R3;
  697. u32 temp_th;
  698. u32 crit_temperature;
  699. unsigned long flags;
  700. int ret = 0;
  701. spin_lock_irqsave(&priv->lock, flags);
  702. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  703. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  704. spin_unlock_irqrestore(&priv->lock, flags);
  705. if (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK) {
  706. R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
  707. R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
  708. R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
  709. } else {
  710. R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
  711. R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
  712. R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
  713. }
  714. temp_th = CELSIUS_TO_KELVIN(TM_CT_KILL_THRESHOLD);
  715. crit_temperature = ((temp_th * (R3-R1))/CT_LIMIT_CONST) + R2;
  716. cmd.critical_temperature_R = cpu_to_le32(crit_temperature);
  717. ret = iwl_send_cmd_pdu(priv, REPLY_CT_KILL_CONFIG_CMD,
  718. sizeof(cmd), &cmd);
  719. if (ret)
  720. IWL_ERROR("REPLY_CT_KILL_CONFIG_CMD failed\n");
  721. else
  722. IWL_DEBUG_INFO("REPLY_CT_KILL_CONFIG_CMD succeeded\n");
  723. }
  724. #ifdef CONFIG_IWL4965_SENSITIVITY
  725. /* "false alarms" are signals that our DSP tries to lock onto,
  726. * but then determines that they are either noise, or transmissions
  727. * from a distant wireless network (also "noise", really) that get
  728. * "stepped on" by stronger transmissions within our own network.
  729. * This algorithm attempts to set a sensitivity level that is high
  730. * enough to receive all of our own network traffic, but not so
  731. * high that our DSP gets too busy trying to lock onto non-network
  732. * activity/noise. */
  733. static int iwl4965_sens_energy_cck(struct iwl_priv *priv,
  734. u32 norm_fa,
  735. u32 rx_enable_time,
  736. struct statistics_general_data *rx_info)
  737. {
  738. u32 max_nrg_cck = 0;
  739. int i = 0;
  740. u8 max_silence_rssi = 0;
  741. u32 silence_ref = 0;
  742. u8 silence_rssi_a = 0;
  743. u8 silence_rssi_b = 0;
  744. u8 silence_rssi_c = 0;
  745. u32 val;
  746. /* "false_alarms" values below are cross-multiplications to assess the
  747. * numbers of false alarms within the measured period of actual Rx
  748. * (Rx is off when we're txing), vs the min/max expected false alarms
  749. * (some should be expected if rx is sensitive enough) in a
  750. * hypothetical listening period of 200 time units (TU), 204.8 msec:
  751. *
  752. * MIN_FA/fixed-time < false_alarms/actual-rx-time < MAX_FA/beacon-time
  753. *
  754. * */
  755. u32 false_alarms = norm_fa * 200 * 1024;
  756. u32 max_false_alarms = MAX_FA_CCK * rx_enable_time;
  757. u32 min_false_alarms = MIN_FA_CCK * rx_enable_time;
  758. struct iwl4965_sensitivity_data *data = NULL;
  759. data = &(priv->sensitivity_data);
  760. data->nrg_auto_corr_silence_diff = 0;
  761. /* Find max silence rssi among all 3 receivers.
  762. * This is background noise, which may include transmissions from other
  763. * networks, measured during silence before our network's beacon */
  764. silence_rssi_a = (u8)((rx_info->beacon_silence_rssi_a &
  765. ALL_BAND_FILTER) >> 8);
  766. silence_rssi_b = (u8)((rx_info->beacon_silence_rssi_b &
  767. ALL_BAND_FILTER) >> 8);
  768. silence_rssi_c = (u8)((rx_info->beacon_silence_rssi_c &
  769. ALL_BAND_FILTER) >> 8);
  770. val = max(silence_rssi_b, silence_rssi_c);
  771. max_silence_rssi = max(silence_rssi_a, (u8) val);
  772. /* Store silence rssi in 20-beacon history table */
  773. data->nrg_silence_rssi[data->nrg_silence_idx] = max_silence_rssi;
  774. data->nrg_silence_idx++;
  775. if (data->nrg_silence_idx >= NRG_NUM_PREV_STAT_L)
  776. data->nrg_silence_idx = 0;
  777. /* Find max silence rssi across 20 beacon history */
  778. for (i = 0; i < NRG_NUM_PREV_STAT_L; i++) {
  779. val = data->nrg_silence_rssi[i];
  780. silence_ref = max(silence_ref, val);
  781. }
  782. IWL_DEBUG_CALIB("silence a %u, b %u, c %u, 20-bcn max %u\n",
  783. silence_rssi_a, silence_rssi_b, silence_rssi_c,
  784. silence_ref);
  785. /* Find max rx energy (min value!) among all 3 receivers,
  786. * measured during beacon frame.
  787. * Save it in 10-beacon history table. */
  788. i = data->nrg_energy_idx;
  789. val = min(rx_info->beacon_energy_b, rx_info->beacon_energy_c);
  790. data->nrg_value[i] = min(rx_info->beacon_energy_a, val);
  791. data->nrg_energy_idx++;
  792. if (data->nrg_energy_idx >= 10)
  793. data->nrg_energy_idx = 0;
  794. /* Find min rx energy (max value) across 10 beacon history.
  795. * This is the minimum signal level that we want to receive well.
  796. * Add backoff (margin so we don't miss slightly lower energy frames).
  797. * This establishes an upper bound (min value) for energy threshold. */
  798. max_nrg_cck = data->nrg_value[0];
  799. for (i = 1; i < 10; i++)
  800. max_nrg_cck = (u32) max(max_nrg_cck, (data->nrg_value[i]));
  801. max_nrg_cck += 6;
  802. IWL_DEBUG_CALIB("rx energy a %u, b %u, c %u, 10-bcn max/min %u\n",
  803. rx_info->beacon_energy_a, rx_info->beacon_energy_b,
  804. rx_info->beacon_energy_c, max_nrg_cck - 6);
  805. /* Count number of consecutive beacons with fewer-than-desired
  806. * false alarms. */
  807. if (false_alarms < min_false_alarms)
  808. data->num_in_cck_no_fa++;
  809. else
  810. data->num_in_cck_no_fa = 0;
  811. IWL_DEBUG_CALIB("consecutive bcns with few false alarms = %u\n",
  812. data->num_in_cck_no_fa);
  813. /* If we got too many false alarms this time, reduce sensitivity */
  814. if (false_alarms > max_false_alarms) {
  815. IWL_DEBUG_CALIB("norm FA %u > max FA %u\n",
  816. false_alarms, max_false_alarms);
  817. IWL_DEBUG_CALIB("... reducing sensitivity\n");
  818. data->nrg_curr_state = IWL_FA_TOO_MANY;
  819. if (data->auto_corr_cck > AUTO_CORR_MAX_TH_CCK) {
  820. /* Store for "fewer than desired" on later beacon */
  821. data->nrg_silence_ref = silence_ref;
  822. /* increase energy threshold (reduce nrg value)
  823. * to decrease sensitivity */
  824. if (data->nrg_th_cck > (NRG_MAX_CCK + NRG_STEP_CCK))
  825. data->nrg_th_cck = data->nrg_th_cck
  826. - NRG_STEP_CCK;
  827. }
  828. /* increase auto_corr values to decrease sensitivity */
  829. if (data->auto_corr_cck < AUTO_CORR_MAX_TH_CCK)
  830. data->auto_corr_cck = AUTO_CORR_MAX_TH_CCK + 1;
  831. else {
  832. val = data->auto_corr_cck + AUTO_CORR_STEP_CCK;
  833. data->auto_corr_cck = min((u32)AUTO_CORR_MAX_CCK, val);
  834. }
  835. val = data->auto_corr_cck_mrc + AUTO_CORR_STEP_CCK;
  836. data->auto_corr_cck_mrc = min((u32)AUTO_CORR_MAX_CCK_MRC, val);
  837. /* Else if we got fewer than desired, increase sensitivity */
  838. } else if (false_alarms < min_false_alarms) {
  839. data->nrg_curr_state = IWL_FA_TOO_FEW;
  840. /* Compare silence level with silence level for most recent
  841. * healthy number or too many false alarms */
  842. data->nrg_auto_corr_silence_diff = (s32)data->nrg_silence_ref -
  843. (s32)silence_ref;
  844. IWL_DEBUG_CALIB("norm FA %u < min FA %u, silence diff %d\n",
  845. false_alarms, min_false_alarms,
  846. data->nrg_auto_corr_silence_diff);
  847. /* Increase value to increase sensitivity, but only if:
  848. * 1a) previous beacon did *not* have *too many* false alarms
  849. * 1b) AND there's a significant difference in Rx levels
  850. * from a previous beacon with too many, or healthy # FAs
  851. * OR 2) We've seen a lot of beacons (100) with too few
  852. * false alarms */
  853. if ((data->nrg_prev_state != IWL_FA_TOO_MANY) &&
  854. ((data->nrg_auto_corr_silence_diff > NRG_DIFF) ||
  855. (data->num_in_cck_no_fa > MAX_NUMBER_CCK_NO_FA))) {
  856. IWL_DEBUG_CALIB("... increasing sensitivity\n");
  857. /* Increase nrg value to increase sensitivity */
  858. val = data->nrg_th_cck + NRG_STEP_CCK;
  859. data->nrg_th_cck = min((u32)NRG_MIN_CCK, val);
  860. /* Decrease auto_corr values to increase sensitivity */
  861. val = data->auto_corr_cck - AUTO_CORR_STEP_CCK;
  862. data->auto_corr_cck = max((u32)AUTO_CORR_MIN_CCK, val);
  863. val = data->auto_corr_cck_mrc - AUTO_CORR_STEP_CCK;
  864. data->auto_corr_cck_mrc =
  865. max((u32)AUTO_CORR_MIN_CCK_MRC, val);
  866. } else
  867. IWL_DEBUG_CALIB("... but not changing sensitivity\n");
  868. /* Else we got a healthy number of false alarms, keep status quo */
  869. } else {
  870. IWL_DEBUG_CALIB(" FA in safe zone\n");
  871. data->nrg_curr_state = IWL_FA_GOOD_RANGE;
  872. /* Store for use in "fewer than desired" with later beacon */
  873. data->nrg_silence_ref = silence_ref;
  874. /* If previous beacon had too many false alarms,
  875. * give it some extra margin by reducing sensitivity again
  876. * (but don't go below measured energy of desired Rx) */
  877. if (IWL_FA_TOO_MANY == data->nrg_prev_state) {
  878. IWL_DEBUG_CALIB("... increasing margin\n");
  879. data->nrg_th_cck -= NRG_MARGIN;
  880. }
  881. }
  882. /* Make sure the energy threshold does not go above the measured
  883. * energy of the desired Rx signals (reduced by backoff margin),
  884. * or else we might start missing Rx frames.
  885. * Lower value is higher energy, so we use max()!
  886. */
  887. data->nrg_th_cck = max(max_nrg_cck, data->nrg_th_cck);
  888. IWL_DEBUG_CALIB("new nrg_th_cck %u\n", data->nrg_th_cck);
  889. data->nrg_prev_state = data->nrg_curr_state;
  890. return 0;
  891. }
  892. static int iwl4965_sens_auto_corr_ofdm(struct iwl_priv *priv,
  893. u32 norm_fa,
  894. u32 rx_enable_time)
  895. {
  896. u32 val;
  897. u32 false_alarms = norm_fa * 200 * 1024;
  898. u32 max_false_alarms = MAX_FA_OFDM * rx_enable_time;
  899. u32 min_false_alarms = MIN_FA_OFDM * rx_enable_time;
  900. struct iwl4965_sensitivity_data *data = NULL;
  901. data = &(priv->sensitivity_data);
  902. /* If we got too many false alarms this time, reduce sensitivity */
  903. if (false_alarms > max_false_alarms) {
  904. IWL_DEBUG_CALIB("norm FA %u > max FA %u)\n",
  905. false_alarms, max_false_alarms);
  906. val = data->auto_corr_ofdm + AUTO_CORR_STEP_OFDM;
  907. data->auto_corr_ofdm =
  908. min((u32)AUTO_CORR_MAX_OFDM, val);
  909. val = data->auto_corr_ofdm_mrc + AUTO_CORR_STEP_OFDM;
  910. data->auto_corr_ofdm_mrc =
  911. min((u32)AUTO_CORR_MAX_OFDM_MRC, val);
  912. val = data->auto_corr_ofdm_x1 + AUTO_CORR_STEP_OFDM;
  913. data->auto_corr_ofdm_x1 =
  914. min((u32)AUTO_CORR_MAX_OFDM_X1, val);
  915. val = data->auto_corr_ofdm_mrc_x1 + AUTO_CORR_STEP_OFDM;
  916. data->auto_corr_ofdm_mrc_x1 =
  917. min((u32)AUTO_CORR_MAX_OFDM_MRC_X1, val);
  918. }
  919. /* Else if we got fewer than desired, increase sensitivity */
  920. else if (false_alarms < min_false_alarms) {
  921. IWL_DEBUG_CALIB("norm FA %u < min FA %u\n",
  922. false_alarms, min_false_alarms);
  923. val = data->auto_corr_ofdm - AUTO_CORR_STEP_OFDM;
  924. data->auto_corr_ofdm =
  925. max((u32)AUTO_CORR_MIN_OFDM, val);
  926. val = data->auto_corr_ofdm_mrc - AUTO_CORR_STEP_OFDM;
  927. data->auto_corr_ofdm_mrc =
  928. max((u32)AUTO_CORR_MIN_OFDM_MRC, val);
  929. val = data->auto_corr_ofdm_x1 - AUTO_CORR_STEP_OFDM;
  930. data->auto_corr_ofdm_x1 =
  931. max((u32)AUTO_CORR_MIN_OFDM_X1, val);
  932. val = data->auto_corr_ofdm_mrc_x1 - AUTO_CORR_STEP_OFDM;
  933. data->auto_corr_ofdm_mrc_x1 =
  934. max((u32)AUTO_CORR_MIN_OFDM_MRC_X1, val);
  935. }
  936. else
  937. IWL_DEBUG_CALIB("min FA %u < norm FA %u < max FA %u OK\n",
  938. min_false_alarms, false_alarms, max_false_alarms);
  939. return 0;
  940. }
  941. static int iwl4965_sensitivity_callback(struct iwl_priv *priv,
  942. struct iwl_cmd *cmd, struct sk_buff *skb)
  943. {
  944. /* We didn't cache the SKB; let the caller free it */
  945. return 1;
  946. }
  947. /* Prepare a SENSITIVITY_CMD, send to uCode if values have changed */
  948. static int iwl4965_sensitivity_write(struct iwl_priv *priv, u8 flags)
  949. {
  950. struct iwl4965_sensitivity_cmd cmd ;
  951. struct iwl4965_sensitivity_data *data = NULL;
  952. struct iwl_host_cmd cmd_out = {
  953. .id = SENSITIVITY_CMD,
  954. .len = sizeof(struct iwl4965_sensitivity_cmd),
  955. .meta.flags = flags,
  956. .data = &cmd,
  957. };
  958. int ret;
  959. data = &(priv->sensitivity_data);
  960. memset(&cmd, 0, sizeof(cmd));
  961. cmd.table[HD_AUTO_CORR32_X4_TH_ADD_MIN_INDEX] =
  962. cpu_to_le16((u16)data->auto_corr_ofdm);
  963. cmd.table[HD_AUTO_CORR32_X4_TH_ADD_MIN_MRC_INDEX] =
  964. cpu_to_le16((u16)data->auto_corr_ofdm_mrc);
  965. cmd.table[HD_AUTO_CORR32_X1_TH_ADD_MIN_INDEX] =
  966. cpu_to_le16((u16)data->auto_corr_ofdm_x1);
  967. cmd.table[HD_AUTO_CORR32_X1_TH_ADD_MIN_MRC_INDEX] =
  968. cpu_to_le16((u16)data->auto_corr_ofdm_mrc_x1);
  969. cmd.table[HD_AUTO_CORR40_X4_TH_ADD_MIN_INDEX] =
  970. cpu_to_le16((u16)data->auto_corr_cck);
  971. cmd.table[HD_AUTO_CORR40_X4_TH_ADD_MIN_MRC_INDEX] =
  972. cpu_to_le16((u16)data->auto_corr_cck_mrc);
  973. cmd.table[HD_MIN_ENERGY_CCK_DET_INDEX] =
  974. cpu_to_le16((u16)data->nrg_th_cck);
  975. cmd.table[HD_MIN_ENERGY_OFDM_DET_INDEX] =
  976. cpu_to_le16((u16)data->nrg_th_ofdm);
  977. cmd.table[HD_BARKER_CORR_TH_ADD_MIN_INDEX] =
  978. __constant_cpu_to_le16(190);
  979. cmd.table[HD_BARKER_CORR_TH_ADD_MIN_MRC_INDEX] =
  980. __constant_cpu_to_le16(390);
  981. cmd.table[HD_OFDM_ENERGY_TH_IN_INDEX] =
  982. __constant_cpu_to_le16(62);
  983. IWL_DEBUG_CALIB("ofdm: ac %u mrc %u x1 %u mrc_x1 %u thresh %u\n",
  984. data->auto_corr_ofdm, data->auto_corr_ofdm_mrc,
  985. data->auto_corr_ofdm_x1, data->auto_corr_ofdm_mrc_x1,
  986. data->nrg_th_ofdm);
  987. IWL_DEBUG_CALIB("cck: ac %u mrc %u thresh %u\n",
  988. data->auto_corr_cck, data->auto_corr_cck_mrc,
  989. data->nrg_th_cck);
  990. /* Update uCode's "work" table, and copy it to DSP */
  991. cmd.control = SENSITIVITY_CMD_CONTROL_WORK_TABLE;
  992. if (flags & CMD_ASYNC)
  993. cmd_out.meta.u.callback = iwl4965_sensitivity_callback;
  994. /* Don't send command to uCode if nothing has changed */
  995. if (!memcmp(&cmd.table[0], &(priv->sensitivity_tbl[0]),
  996. sizeof(u16)*HD_TABLE_SIZE)) {
  997. IWL_DEBUG_CALIB("No change in SENSITIVITY_CMD\n");
  998. return 0;
  999. }
  1000. /* Copy table for comparison next time */
  1001. memcpy(&(priv->sensitivity_tbl[0]), &(cmd.table[0]),
  1002. sizeof(u16)*HD_TABLE_SIZE);
  1003. ret = iwl_send_cmd(priv, &cmd_out);
  1004. if (ret)
  1005. IWL_ERROR("SENSITIVITY_CMD failed\n");
  1006. return ret;
  1007. }
  1008. void iwl4965_init_sensitivity(struct iwl_priv *priv, u8 flags, u8 force)
  1009. {
  1010. struct iwl4965_sensitivity_data *data = NULL;
  1011. int i;
  1012. int ret = 0;
  1013. IWL_DEBUG_CALIB("Start iwl4965_init_sensitivity\n");
  1014. if (force)
  1015. memset(&(priv->sensitivity_tbl[0]), 0,
  1016. sizeof(u16)*HD_TABLE_SIZE);
  1017. /* Clear driver's sensitivity algo data */
  1018. data = &(priv->sensitivity_data);
  1019. memset(data, 0, sizeof(struct iwl4965_sensitivity_data));
  1020. data->num_in_cck_no_fa = 0;
  1021. data->nrg_curr_state = IWL_FA_TOO_MANY;
  1022. data->nrg_prev_state = IWL_FA_TOO_MANY;
  1023. data->nrg_silence_ref = 0;
  1024. data->nrg_silence_idx = 0;
  1025. data->nrg_energy_idx = 0;
  1026. for (i = 0; i < 10; i++)
  1027. data->nrg_value[i] = 0;
  1028. for (i = 0; i < NRG_NUM_PREV_STAT_L; i++)
  1029. data->nrg_silence_rssi[i] = 0;
  1030. data->auto_corr_ofdm = 90;
  1031. data->auto_corr_ofdm_mrc = 170;
  1032. data->auto_corr_ofdm_x1 = 105;
  1033. data->auto_corr_ofdm_mrc_x1 = 220;
  1034. data->auto_corr_cck = AUTO_CORR_CCK_MIN_VAL_DEF;
  1035. data->auto_corr_cck_mrc = 200;
  1036. data->nrg_th_cck = 100;
  1037. data->nrg_th_ofdm = 100;
  1038. data->last_bad_plcp_cnt_ofdm = 0;
  1039. data->last_fa_cnt_ofdm = 0;
  1040. data->last_bad_plcp_cnt_cck = 0;
  1041. data->last_fa_cnt_cck = 0;
  1042. /* Clear prior Sensitivity command data to force send to uCode */
  1043. if (force)
  1044. memset(&(priv->sensitivity_tbl[0]), 0,
  1045. sizeof(u16)*HD_TABLE_SIZE);
  1046. ret |= iwl4965_sensitivity_write(priv, flags);
  1047. IWL_DEBUG_CALIB("<<return 0x%X\n", ret);
  1048. return;
  1049. }
  1050. /* Reset differential Rx gains in NIC to prepare for chain noise calibration.
  1051. * Called after every association, but this runs only once!
  1052. * ... once chain noise is calibrated the first time, it's good forever. */
  1053. void iwl4965_chain_noise_reset(struct iwl_priv *priv)
  1054. {
  1055. struct iwl4965_chain_noise_data *data = NULL;
  1056. data = &(priv->chain_noise_data);
  1057. if ((data->state == IWL_CHAIN_NOISE_ALIVE) && iwl4965_is_associated(priv)) {
  1058. struct iwl4965_calibration_cmd cmd;
  1059. memset(&cmd, 0, sizeof(cmd));
  1060. cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
  1061. cmd.diff_gain_a = 0;
  1062. cmd.diff_gain_b = 0;
  1063. cmd.diff_gain_c = 0;
  1064. iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
  1065. sizeof(cmd), &cmd);
  1066. msleep(4);
  1067. data->state = IWL_CHAIN_NOISE_ACCUMULATE;
  1068. IWL_DEBUG_CALIB("Run chain_noise_calibrate\n");
  1069. }
  1070. return;
  1071. }
  1072. /*
  1073. * Accumulate 20 beacons of signal and noise statistics for each of
  1074. * 3 receivers/antennas/rx-chains, then figure out:
  1075. * 1) Which antennas are connected.
  1076. * 2) Differential rx gain settings to balance the 3 receivers.
  1077. */
  1078. static void iwl4965_noise_calibration(struct iwl_priv *priv,
  1079. struct iwl4965_notif_statistics *stat_resp)
  1080. {
  1081. struct iwl4965_chain_noise_data *data = NULL;
  1082. int ret = 0;
  1083. u32 chain_noise_a;
  1084. u32 chain_noise_b;
  1085. u32 chain_noise_c;
  1086. u32 chain_sig_a;
  1087. u32 chain_sig_b;
  1088. u32 chain_sig_c;
  1089. u32 average_sig[NUM_RX_CHAINS] = {INITIALIZATION_VALUE};
  1090. u32 average_noise[NUM_RX_CHAINS] = {INITIALIZATION_VALUE};
  1091. u32 max_average_sig;
  1092. u16 max_average_sig_antenna_i;
  1093. u32 min_average_noise = MIN_AVERAGE_NOISE_MAX_VALUE;
  1094. u16 min_average_noise_antenna_i = INITIALIZATION_VALUE;
  1095. u16 i = 0;
  1096. u16 chan_num = INITIALIZATION_VALUE;
  1097. u32 band = INITIALIZATION_VALUE;
  1098. u32 active_chains = 0;
  1099. unsigned long flags;
  1100. struct statistics_rx_non_phy *rx_info = &(stat_resp->rx.general);
  1101. data = &(priv->chain_noise_data);
  1102. /* Accumulate just the first 20 beacons after the first association,
  1103. * then we're done forever. */
  1104. if (data->state != IWL_CHAIN_NOISE_ACCUMULATE) {
  1105. if (data->state == IWL_CHAIN_NOISE_ALIVE)
  1106. IWL_DEBUG_CALIB("Wait for noise calib reset\n");
  1107. return;
  1108. }
  1109. spin_lock_irqsave(&priv->lock, flags);
  1110. if (rx_info->interference_data_flag != INTERFERENCE_DATA_AVAILABLE) {
  1111. IWL_DEBUG_CALIB(" << Interference data unavailable\n");
  1112. spin_unlock_irqrestore(&priv->lock, flags);
  1113. return;
  1114. }
  1115. band = (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) ? 0 : 1;
  1116. chan_num = le16_to_cpu(priv->staging_rxon.channel);
  1117. /* Make sure we accumulate data for just the associated channel
  1118. * (even if scanning). */
  1119. if ((chan_num != (le32_to_cpu(stat_resp->flag) >> 16)) ||
  1120. ((STATISTICS_REPLY_FLG_BAND_24G_MSK ==
  1121. (stat_resp->flag & STATISTICS_REPLY_FLG_BAND_24G_MSK)) && band)) {
  1122. IWL_DEBUG_CALIB("Stats not from chan=%d, band=%d\n",
  1123. chan_num, band);
  1124. spin_unlock_irqrestore(&priv->lock, flags);
  1125. return;
  1126. }
  1127. /* Accumulate beacon statistics values across 20 beacons */
  1128. chain_noise_a = le32_to_cpu(rx_info->beacon_silence_rssi_a) &
  1129. IN_BAND_FILTER;
  1130. chain_noise_b = le32_to_cpu(rx_info->beacon_silence_rssi_b) &
  1131. IN_BAND_FILTER;
  1132. chain_noise_c = le32_to_cpu(rx_info->beacon_silence_rssi_c) &
  1133. IN_BAND_FILTER;
  1134. chain_sig_a = le32_to_cpu(rx_info->beacon_rssi_a) & IN_BAND_FILTER;
  1135. chain_sig_b = le32_to_cpu(rx_info->beacon_rssi_b) & IN_BAND_FILTER;
  1136. chain_sig_c = le32_to_cpu(rx_info->beacon_rssi_c) & IN_BAND_FILTER;
  1137. spin_unlock_irqrestore(&priv->lock, flags);
  1138. data->beacon_count++;
  1139. data->chain_noise_a = (chain_noise_a + data->chain_noise_a);
  1140. data->chain_noise_b = (chain_noise_b + data->chain_noise_b);
  1141. data->chain_noise_c = (chain_noise_c + data->chain_noise_c);
  1142. data->chain_signal_a = (chain_sig_a + data->chain_signal_a);
  1143. data->chain_signal_b = (chain_sig_b + data->chain_signal_b);
  1144. data->chain_signal_c = (chain_sig_c + data->chain_signal_c);
  1145. IWL_DEBUG_CALIB("chan=%d, band=%d, beacon=%d\n", chan_num, band,
  1146. data->beacon_count);
  1147. IWL_DEBUG_CALIB("chain_sig: a %d b %d c %d\n",
  1148. chain_sig_a, chain_sig_b, chain_sig_c);
  1149. IWL_DEBUG_CALIB("chain_noise: a %d b %d c %d\n",
  1150. chain_noise_a, chain_noise_b, chain_noise_c);
  1151. /* If this is the 20th beacon, determine:
  1152. * 1) Disconnected antennas (using signal strengths)
  1153. * 2) Differential gain (using silence noise) to balance receivers */
  1154. if (data->beacon_count == CAL_NUM_OF_BEACONS) {
  1155. /* Analyze signal for disconnected antenna */
  1156. average_sig[0] = (data->chain_signal_a) / CAL_NUM_OF_BEACONS;
  1157. average_sig[1] = (data->chain_signal_b) / CAL_NUM_OF_BEACONS;
  1158. average_sig[2] = (data->chain_signal_c) / CAL_NUM_OF_BEACONS;
  1159. if (average_sig[0] >= average_sig[1]) {
  1160. max_average_sig = average_sig[0];
  1161. max_average_sig_antenna_i = 0;
  1162. active_chains = (1 << max_average_sig_antenna_i);
  1163. } else {
  1164. max_average_sig = average_sig[1];
  1165. max_average_sig_antenna_i = 1;
  1166. active_chains = (1 << max_average_sig_antenna_i);
  1167. }
  1168. if (average_sig[2] >= max_average_sig) {
  1169. max_average_sig = average_sig[2];
  1170. max_average_sig_antenna_i = 2;
  1171. active_chains = (1 << max_average_sig_antenna_i);
  1172. }
  1173. IWL_DEBUG_CALIB("average_sig: a %d b %d c %d\n",
  1174. average_sig[0], average_sig[1], average_sig[2]);
  1175. IWL_DEBUG_CALIB("max_average_sig = %d, antenna %d\n",
  1176. max_average_sig, max_average_sig_antenna_i);
  1177. /* Compare signal strengths for all 3 receivers. */
  1178. for (i = 0; i < NUM_RX_CHAINS; i++) {
  1179. if (i != max_average_sig_antenna_i) {
  1180. s32 rssi_delta = (max_average_sig -
  1181. average_sig[i]);
  1182. /* If signal is very weak, compared with
  1183. * strongest, mark it as disconnected. */
  1184. if (rssi_delta > MAXIMUM_ALLOWED_PATHLOSS)
  1185. data->disconn_array[i] = 1;
  1186. else
  1187. active_chains |= (1 << i);
  1188. IWL_DEBUG_CALIB("i = %d rssiDelta = %d "
  1189. "disconn_array[i] = %d\n",
  1190. i, rssi_delta, data->disconn_array[i]);
  1191. }
  1192. }
  1193. /*If both chains A & B are disconnected -
  1194. * connect B and leave A as is */
  1195. if (data->disconn_array[CHAIN_A] &&
  1196. data->disconn_array[CHAIN_B]) {
  1197. data->disconn_array[CHAIN_B] = 0;
  1198. active_chains |= (1 << CHAIN_B);
  1199. IWL_DEBUG_CALIB("both A & B chains are disconnected! "
  1200. "W/A - declare B as connected\n");
  1201. }
  1202. IWL_DEBUG_CALIB("active_chains (bitwise) = 0x%x\n",
  1203. active_chains);
  1204. /* Save for use within RXON, TX, SCAN commands, etc. */
  1205. priv->valid_antenna = active_chains;
  1206. /* Analyze noise for rx balance */
  1207. average_noise[0] = ((data->chain_noise_a)/CAL_NUM_OF_BEACONS);
  1208. average_noise[1] = ((data->chain_noise_b)/CAL_NUM_OF_BEACONS);
  1209. average_noise[2] = ((data->chain_noise_c)/CAL_NUM_OF_BEACONS);
  1210. for (i = 0; i < NUM_RX_CHAINS; i++) {
  1211. if (!(data->disconn_array[i]) &&
  1212. (average_noise[i] <= min_average_noise)) {
  1213. /* This means that chain i is active and has
  1214. * lower noise values so far: */
  1215. min_average_noise = average_noise[i];
  1216. min_average_noise_antenna_i = i;
  1217. }
  1218. }
  1219. data->delta_gain_code[min_average_noise_antenna_i] = 0;
  1220. IWL_DEBUG_CALIB("average_noise: a %d b %d c %d\n",
  1221. average_noise[0], average_noise[1],
  1222. average_noise[2]);
  1223. IWL_DEBUG_CALIB("min_average_noise = %d, antenna %d\n",
  1224. min_average_noise, min_average_noise_antenna_i);
  1225. for (i = 0; i < NUM_RX_CHAINS; i++) {
  1226. s32 delta_g = 0;
  1227. if (!(data->disconn_array[i]) &&
  1228. (data->delta_gain_code[i] ==
  1229. CHAIN_NOISE_DELTA_GAIN_INIT_VAL)) {
  1230. delta_g = average_noise[i] - min_average_noise;
  1231. data->delta_gain_code[i] = (u8)((delta_g *
  1232. 10) / 15);
  1233. if (CHAIN_NOISE_MAX_DELTA_GAIN_CODE <
  1234. data->delta_gain_code[i])
  1235. data->delta_gain_code[i] =
  1236. CHAIN_NOISE_MAX_DELTA_GAIN_CODE;
  1237. data->delta_gain_code[i] =
  1238. (data->delta_gain_code[i] | (1 << 2));
  1239. } else
  1240. data->delta_gain_code[i] = 0;
  1241. }
  1242. IWL_DEBUG_CALIB("delta_gain_codes: a %d b %d c %d\n",
  1243. data->delta_gain_code[0],
  1244. data->delta_gain_code[1],
  1245. data->delta_gain_code[2]);
  1246. /* Differential gain gets sent to uCode only once */
  1247. if (!data->radio_write) {
  1248. struct iwl4965_calibration_cmd cmd;
  1249. data->radio_write = 1;
  1250. memset(&cmd, 0, sizeof(cmd));
  1251. cmd.opCode = PHY_CALIBRATE_DIFF_GAIN_CMD;
  1252. cmd.diff_gain_a = data->delta_gain_code[0];
  1253. cmd.diff_gain_b = data->delta_gain_code[1];
  1254. cmd.diff_gain_c = data->delta_gain_code[2];
  1255. ret = iwl_send_cmd_pdu(priv, REPLY_PHY_CALIBRATION_CMD,
  1256. sizeof(cmd), &cmd);
  1257. if (ret)
  1258. IWL_DEBUG_CALIB("fail sending cmd "
  1259. "REPLY_PHY_CALIBRATION_CMD \n");
  1260. /* TODO we might want recalculate
  1261. * rx_chain in rxon cmd */
  1262. /* Mark so we run this algo only once! */
  1263. data->state = IWL_CHAIN_NOISE_CALIBRATED;
  1264. }
  1265. data->chain_noise_a = 0;
  1266. data->chain_noise_b = 0;
  1267. data->chain_noise_c = 0;
  1268. data->chain_signal_a = 0;
  1269. data->chain_signal_b = 0;
  1270. data->chain_signal_c = 0;
  1271. data->beacon_count = 0;
  1272. }
  1273. return;
  1274. }
  1275. static void iwl4965_sensitivity_calibration(struct iwl_priv *priv,
  1276. struct iwl4965_notif_statistics *resp)
  1277. {
  1278. u32 rx_enable_time;
  1279. u32 fa_cck;
  1280. u32 fa_ofdm;
  1281. u32 bad_plcp_cck;
  1282. u32 bad_plcp_ofdm;
  1283. u32 norm_fa_ofdm;
  1284. u32 norm_fa_cck;
  1285. struct iwl4965_sensitivity_data *data = NULL;
  1286. struct statistics_rx_non_phy *rx_info = &(resp->rx.general);
  1287. struct statistics_rx *statistics = &(resp->rx);
  1288. unsigned long flags;
  1289. struct statistics_general_data statis;
  1290. int ret;
  1291. data = &(priv->sensitivity_data);
  1292. if (!iwl4965_is_associated(priv)) {
  1293. IWL_DEBUG_CALIB("<< - not associated\n");
  1294. return;
  1295. }
  1296. spin_lock_irqsave(&priv->lock, flags);
  1297. if (rx_info->interference_data_flag != INTERFERENCE_DATA_AVAILABLE) {
  1298. IWL_DEBUG_CALIB("<< invalid data.\n");
  1299. spin_unlock_irqrestore(&priv->lock, flags);
  1300. return;
  1301. }
  1302. /* Extract Statistics: */
  1303. rx_enable_time = le32_to_cpu(rx_info->channel_load);
  1304. fa_cck = le32_to_cpu(statistics->cck.false_alarm_cnt);
  1305. fa_ofdm = le32_to_cpu(statistics->ofdm.false_alarm_cnt);
  1306. bad_plcp_cck = le32_to_cpu(statistics->cck.plcp_err);
  1307. bad_plcp_ofdm = le32_to_cpu(statistics->ofdm.plcp_err);
  1308. statis.beacon_silence_rssi_a =
  1309. le32_to_cpu(statistics->general.beacon_silence_rssi_a);
  1310. statis.beacon_silence_rssi_b =
  1311. le32_to_cpu(statistics->general.beacon_silence_rssi_b);
  1312. statis.beacon_silence_rssi_c =
  1313. le32_to_cpu(statistics->general.beacon_silence_rssi_c);
  1314. statis.beacon_energy_a =
  1315. le32_to_cpu(statistics->general.beacon_energy_a);
  1316. statis.beacon_energy_b =
  1317. le32_to_cpu(statistics->general.beacon_energy_b);
  1318. statis.beacon_energy_c =
  1319. le32_to_cpu(statistics->general.beacon_energy_c);
  1320. spin_unlock_irqrestore(&priv->lock, flags);
  1321. IWL_DEBUG_CALIB("rx_enable_time = %u usecs\n", rx_enable_time);
  1322. if (!rx_enable_time) {
  1323. IWL_DEBUG_CALIB("<< RX Enable Time == 0! \n");
  1324. return;
  1325. }
  1326. /* These statistics increase monotonically, and do not reset
  1327. * at each beacon. Calculate difference from last value, or just
  1328. * use the new statistics value if it has reset or wrapped around. */
  1329. if (data->last_bad_plcp_cnt_cck > bad_plcp_cck)
  1330. data->last_bad_plcp_cnt_cck = bad_plcp_cck;
  1331. else {
  1332. bad_plcp_cck -= data->last_bad_plcp_cnt_cck;
  1333. data->last_bad_plcp_cnt_cck += bad_plcp_cck;
  1334. }
  1335. if (data->last_bad_plcp_cnt_ofdm > bad_plcp_ofdm)
  1336. data->last_bad_plcp_cnt_ofdm = bad_plcp_ofdm;
  1337. else {
  1338. bad_plcp_ofdm -= data->last_bad_plcp_cnt_ofdm;
  1339. data->last_bad_plcp_cnt_ofdm += bad_plcp_ofdm;
  1340. }
  1341. if (data->last_fa_cnt_ofdm > fa_ofdm)
  1342. data->last_fa_cnt_ofdm = fa_ofdm;
  1343. else {
  1344. fa_ofdm -= data->last_fa_cnt_ofdm;
  1345. data->last_fa_cnt_ofdm += fa_ofdm;
  1346. }
  1347. if (data->last_fa_cnt_cck > fa_cck)
  1348. data->last_fa_cnt_cck = fa_cck;
  1349. else {
  1350. fa_cck -= data->last_fa_cnt_cck;
  1351. data->last_fa_cnt_cck += fa_cck;
  1352. }
  1353. /* Total aborted signal locks */
  1354. norm_fa_ofdm = fa_ofdm + bad_plcp_ofdm;
  1355. norm_fa_cck = fa_cck + bad_plcp_cck;
  1356. IWL_DEBUG_CALIB("cck: fa %u badp %u ofdm: fa %u badp %u\n", fa_cck,
  1357. bad_plcp_cck, fa_ofdm, bad_plcp_ofdm);
  1358. iwl4965_sens_auto_corr_ofdm(priv, norm_fa_ofdm, rx_enable_time);
  1359. iwl4965_sens_energy_cck(priv, norm_fa_cck, rx_enable_time, &statis);
  1360. ret = iwl4965_sensitivity_write(priv, CMD_ASYNC);
  1361. return;
  1362. }
  1363. static void iwl4965_bg_sensitivity_work(struct work_struct *work)
  1364. {
  1365. struct iwl_priv *priv = container_of(work, struct iwl_priv,
  1366. sensitivity_work);
  1367. mutex_lock(&priv->mutex);
  1368. if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
  1369. test_bit(STATUS_SCANNING, &priv->status)) {
  1370. mutex_unlock(&priv->mutex);
  1371. return;
  1372. }
  1373. if (priv->start_calib) {
  1374. iwl4965_noise_calibration(priv, &priv->statistics);
  1375. if (priv->sensitivity_data.state ==
  1376. IWL_SENS_CALIB_NEED_REINIT) {
  1377. iwl4965_init_sensitivity(priv, CMD_ASYNC, 0);
  1378. priv->sensitivity_data.state = IWL_SENS_CALIB_ALLOWED;
  1379. } else
  1380. iwl4965_sensitivity_calibration(priv,
  1381. &priv->statistics);
  1382. }
  1383. mutex_unlock(&priv->mutex);
  1384. return;
  1385. }
  1386. #endif /*CONFIG_IWL4965_SENSITIVITY*/
  1387. static void iwl4965_bg_txpower_work(struct work_struct *work)
  1388. {
  1389. struct iwl_priv *priv = container_of(work, struct iwl_priv,
  1390. txpower_work);
  1391. /* If a scan happened to start before we got here
  1392. * then just return; the statistics notification will
  1393. * kick off another scheduled work to compensate for
  1394. * any temperature delta we missed here. */
  1395. if (test_bit(STATUS_EXIT_PENDING, &priv->status) ||
  1396. test_bit(STATUS_SCANNING, &priv->status))
  1397. return;
  1398. mutex_lock(&priv->mutex);
  1399. /* Regardless of if we are assocaited, we must reconfigure the
  1400. * TX power since frames can be sent on non-radar channels while
  1401. * not associated */
  1402. iwl4965_hw_reg_send_txpower(priv);
  1403. /* Update last_temperature to keep is_calib_needed from running
  1404. * when it isn't needed... */
  1405. priv->last_temperature = priv->temperature;
  1406. mutex_unlock(&priv->mutex);
  1407. }
  1408. /*
  1409. * Acquire priv->lock before calling this function !
  1410. */
  1411. static void iwl4965_set_wr_ptrs(struct iwl_priv *priv, int txq_id, u32 index)
  1412. {
  1413. iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
  1414. (index & 0xff) | (txq_id << 8));
  1415. iwl4965_write_prph(priv, KDR_SCD_QUEUE_RDPTR(txq_id), index);
  1416. }
  1417. /**
  1418. * iwl4965_tx_queue_set_status - (optionally) start Tx/Cmd queue
  1419. * @tx_fifo_id: Tx DMA/FIFO channel (range 0-7) that the queue will feed
  1420. * @scd_retry: (1) Indicates queue will be used in aggregation mode
  1421. *
  1422. * NOTE: Acquire priv->lock before calling this function !
  1423. */
  1424. static void iwl4965_tx_queue_set_status(struct iwl_priv *priv,
  1425. struct iwl4965_tx_queue *txq,
  1426. int tx_fifo_id, int scd_retry)
  1427. {
  1428. int txq_id = txq->q.id;
  1429. /* Find out whether to activate Tx queue */
  1430. int active = test_bit(txq_id, &priv->txq_ctx_active_msk)?1:0;
  1431. /* Set up and activate */
  1432. iwl4965_write_prph(priv, KDR_SCD_QUEUE_STATUS_BITS(txq_id),
  1433. (active << SCD_QUEUE_STTS_REG_POS_ACTIVE) |
  1434. (tx_fifo_id << SCD_QUEUE_STTS_REG_POS_TXF) |
  1435. (scd_retry << SCD_QUEUE_STTS_REG_POS_WSL) |
  1436. (scd_retry << SCD_QUEUE_STTS_REG_POS_SCD_ACK) |
  1437. SCD_QUEUE_STTS_REG_MSK);
  1438. txq->sched_retry = scd_retry;
  1439. IWL_DEBUG_INFO("%s %s Queue %d on AC %d\n",
  1440. active ? "Activate" : "Deactivate",
  1441. scd_retry ? "BA" : "AC", txq_id, tx_fifo_id);
  1442. }
  1443. static const u16 default_queue_to_tx_fifo[] = {
  1444. IWL_TX_FIFO_AC3,
  1445. IWL_TX_FIFO_AC2,
  1446. IWL_TX_FIFO_AC1,
  1447. IWL_TX_FIFO_AC0,
  1448. IWL_CMD_FIFO_NUM,
  1449. IWL_TX_FIFO_HCCA_1,
  1450. IWL_TX_FIFO_HCCA_2
  1451. };
  1452. static inline void iwl4965_txq_ctx_activate(struct iwl_priv *priv, int txq_id)
  1453. {
  1454. set_bit(txq_id, &priv->txq_ctx_active_msk);
  1455. }
  1456. static inline void iwl4965_txq_ctx_deactivate(struct iwl_priv *priv, int txq_id)
  1457. {
  1458. clear_bit(txq_id, &priv->txq_ctx_active_msk);
  1459. }
  1460. int iwl4965_alive_notify(struct iwl_priv *priv)
  1461. {
  1462. u32 a;
  1463. int i = 0;
  1464. unsigned long flags;
  1465. int ret;
  1466. spin_lock_irqsave(&priv->lock, flags);
  1467. #ifdef CONFIG_IWL4965_SENSITIVITY
  1468. memset(&(priv->sensitivity_data), 0,
  1469. sizeof(struct iwl4965_sensitivity_data));
  1470. memset(&(priv->chain_noise_data), 0,
  1471. sizeof(struct iwl4965_chain_noise_data));
  1472. for (i = 0; i < NUM_RX_CHAINS; i++)
  1473. priv->chain_noise_data.delta_gain_code[i] =
  1474. CHAIN_NOISE_DELTA_GAIN_INIT_VAL;
  1475. #endif /* CONFIG_IWL4965_SENSITIVITY*/
  1476. ret = iwl4965_grab_nic_access(priv);
  1477. if (ret) {
  1478. spin_unlock_irqrestore(&priv->lock, flags);
  1479. return ret;
  1480. }
  1481. /* Clear 4965's internal Tx Scheduler data base */
  1482. priv->scd_base_addr = iwl4965_read_prph(priv, KDR_SCD_SRAM_BASE_ADDR);
  1483. a = priv->scd_base_addr + SCD_CONTEXT_DATA_OFFSET;
  1484. for (; a < priv->scd_base_addr + SCD_TX_STTS_BITMAP_OFFSET; a += 4)
  1485. iwl4965_write_targ_mem(priv, a, 0);
  1486. for (; a < priv->scd_base_addr + SCD_TRANSLATE_TBL_OFFSET; a += 4)
  1487. iwl4965_write_targ_mem(priv, a, 0);
  1488. for (; a < sizeof(u16) * priv->hw_setting.max_txq_num; a += 4)
  1489. iwl4965_write_targ_mem(priv, a, 0);
  1490. /* Tel 4965 where to find Tx byte count tables */
  1491. iwl4965_write_prph(priv, KDR_SCD_DRAM_BASE_ADDR,
  1492. (priv->hw_setting.shared_phys +
  1493. offsetof(struct iwl4965_shared, queues_byte_cnt_tbls)) >> 10);
  1494. /* Disable chain mode for all queues */
  1495. iwl4965_write_prph(priv, KDR_SCD_QUEUECHAIN_SEL, 0);
  1496. /* Initialize each Tx queue (including the command queue) */
  1497. for (i = 0; i < priv->hw_setting.max_txq_num; i++) {
  1498. /* TFD circular buffer read/write indexes */
  1499. iwl4965_write_prph(priv, KDR_SCD_QUEUE_RDPTR(i), 0);
  1500. iwl4965_write_direct32(priv, HBUS_TARG_WRPTR, 0 | (i << 8));
  1501. /* Max Tx Window size for Scheduler-ACK mode */
  1502. iwl4965_write_targ_mem(priv, priv->scd_base_addr +
  1503. SCD_CONTEXT_QUEUE_OFFSET(i),
  1504. (SCD_WIN_SIZE <<
  1505. SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
  1506. SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
  1507. /* Frame limit */
  1508. iwl4965_write_targ_mem(priv, priv->scd_base_addr +
  1509. SCD_CONTEXT_QUEUE_OFFSET(i) +
  1510. sizeof(u32),
  1511. (SCD_FRAME_LIMIT <<
  1512. SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS) &
  1513. SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
  1514. }
  1515. iwl4965_write_prph(priv, KDR_SCD_INTERRUPT_MASK,
  1516. (1 << priv->hw_setting.max_txq_num) - 1);
  1517. /* Activate all Tx DMA/FIFO channels */
  1518. iwl4965_write_prph(priv, KDR_SCD_TXFACT,
  1519. SCD_TXFACT_REG_TXFIFO_MASK(0, 7));
  1520. iwl4965_set_wr_ptrs(priv, IWL_CMD_QUEUE_NUM, 0);
  1521. /* Map each Tx/cmd queue to its corresponding fifo */
  1522. for (i = 0; i < ARRAY_SIZE(default_queue_to_tx_fifo); i++) {
  1523. int ac = default_queue_to_tx_fifo[i];
  1524. iwl4965_txq_ctx_activate(priv, i);
  1525. iwl4965_tx_queue_set_status(priv, &priv->txq[i], ac, 0);
  1526. }
  1527. iwl4965_release_nic_access(priv);
  1528. spin_unlock_irqrestore(&priv->lock, flags);
  1529. return ret;
  1530. }
  1531. /**
  1532. * iwl4965_hw_set_hw_setting
  1533. *
  1534. * Called when initializing driver
  1535. */
  1536. int iwl4965_hw_set_hw_setting(struct iwl_priv *priv)
  1537. {
  1538. int ret = 0;
  1539. if ((iwl4965_mod_params.num_of_queues > IWL_MAX_NUM_QUEUES) ||
  1540. (iwl4965_mod_params.num_of_queues < IWL_MIN_NUM_QUEUES)) {
  1541. IWL_ERROR("invalid queues_num, should be between %d and %d\n",
  1542. IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
  1543. ret = -EINVAL;
  1544. goto out;
  1545. }
  1546. /* Allocate area for Tx byte count tables and Rx queue status */
  1547. priv->hw_setting.shared_virt =
  1548. pci_alloc_consistent(priv->pci_dev,
  1549. sizeof(struct iwl4965_shared),
  1550. &priv->hw_setting.shared_phys);
  1551. if (!priv->hw_setting.shared_virt) {
  1552. ret = -ENOMEM;
  1553. goto out;
  1554. }
  1555. memset(priv->hw_setting.shared_virt, 0, sizeof(struct iwl4965_shared));
  1556. priv->hw_setting.max_txq_num = iwl4965_mod_params.num_of_queues;
  1557. priv->hw_setting.tx_cmd_len = sizeof(struct iwl4965_tx_cmd);
  1558. priv->hw_setting.max_rxq_size = RX_QUEUE_SIZE;
  1559. priv->hw_setting.max_rxq_log = RX_QUEUE_SIZE_LOG;
  1560. if (iwl4965_mod_params.amsdu_size_8K)
  1561. priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE_8K;
  1562. else
  1563. priv->hw_setting.rx_buf_size = IWL_RX_BUF_SIZE_4K;
  1564. priv->hw_setting.max_pkt_size = priv->hw_setting.rx_buf_size - 256;
  1565. priv->hw_setting.max_stations = IWL4965_STATION_COUNT;
  1566. priv->hw_setting.bcast_sta_id = IWL4965_BROADCAST_ID;
  1567. priv->hw_setting.tx_ant_num = 2;
  1568. out:
  1569. return ret;
  1570. }
  1571. /**
  1572. * iwl4965_hw_txq_ctx_free - Free TXQ Context
  1573. *
  1574. * Destroy all TX DMA queues and structures
  1575. */
  1576. void iwl4965_hw_txq_ctx_free(struct iwl_priv *priv)
  1577. {
  1578. int txq_id;
  1579. /* Tx queues */
  1580. for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++)
  1581. iwl4965_tx_queue_free(priv, &priv->txq[txq_id]);
  1582. /* Keep-warm buffer */
  1583. iwl4965_kw_free(priv);
  1584. }
  1585. /**
  1586. * iwl4965_hw_txq_free_tfd - Free all chunks referenced by TFD [txq->q.read_ptr]
  1587. *
  1588. * Does NOT advance any TFD circular buffer read/write indexes
  1589. * Does NOT free the TFD itself (which is within circular buffer)
  1590. */
  1591. int iwl4965_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl4965_tx_queue *txq)
  1592. {
  1593. struct iwl4965_tfd_frame *bd_tmp = (struct iwl4965_tfd_frame *)&txq->bd[0];
  1594. struct iwl4965_tfd_frame *bd = &bd_tmp[txq->q.read_ptr];
  1595. struct pci_dev *dev = priv->pci_dev;
  1596. int i;
  1597. int counter = 0;
  1598. int index, is_odd;
  1599. /* Host command buffers stay mapped in memory, nothing to clean */
  1600. if (txq->q.id == IWL_CMD_QUEUE_NUM)
  1601. return 0;
  1602. /* Sanity check on number of chunks */
  1603. counter = IWL_GET_BITS(*bd, num_tbs);
  1604. if (counter > MAX_NUM_OF_TBS) {
  1605. IWL_ERROR("Too many chunks: %i\n", counter);
  1606. /* @todo issue fatal error, it is quite serious situation */
  1607. return 0;
  1608. }
  1609. /* Unmap chunks, if any.
  1610. * TFD info for odd chunks is different format than for even chunks. */
  1611. for (i = 0; i < counter; i++) {
  1612. index = i / 2;
  1613. is_odd = i & 0x1;
  1614. if (is_odd)
  1615. pci_unmap_single(
  1616. dev,
  1617. IWL_GET_BITS(bd->pa[index], tb2_addr_lo16) |
  1618. (IWL_GET_BITS(bd->pa[index],
  1619. tb2_addr_hi20) << 16),
  1620. IWL_GET_BITS(bd->pa[index], tb2_len),
  1621. PCI_DMA_TODEVICE);
  1622. else if (i > 0)
  1623. pci_unmap_single(dev,
  1624. le32_to_cpu(bd->pa[index].tb1_addr),
  1625. IWL_GET_BITS(bd->pa[index], tb1_len),
  1626. PCI_DMA_TODEVICE);
  1627. /* Free SKB, if any, for this chunk */
  1628. if (txq->txb[txq->q.read_ptr].skb[i]) {
  1629. struct sk_buff *skb = txq->txb[txq->q.read_ptr].skb[i];
  1630. dev_kfree_skb(skb);
  1631. txq->txb[txq->q.read_ptr].skb[i] = NULL;
  1632. }
  1633. }
  1634. return 0;
  1635. }
  1636. int iwl4965_hw_reg_set_txpower(struct iwl_priv *priv, s8 power)
  1637. {
  1638. IWL_ERROR("TODO: Implement iwl4965_hw_reg_set_txpower!\n");
  1639. return -EINVAL;
  1640. }
  1641. static s32 iwl4965_math_div_round(s32 num, s32 denom, s32 *res)
  1642. {
  1643. s32 sign = 1;
  1644. if (num < 0) {
  1645. sign = -sign;
  1646. num = -num;
  1647. }
  1648. if (denom < 0) {
  1649. sign = -sign;
  1650. denom = -denom;
  1651. }
  1652. *res = 1;
  1653. *res = ((num * 2 + denom) / (denom * 2)) * sign;
  1654. return 1;
  1655. }
  1656. /**
  1657. * iwl4965_get_voltage_compensation - Power supply voltage comp for txpower
  1658. *
  1659. * Determines power supply voltage compensation for txpower calculations.
  1660. * Returns number of 1/2-dB steps to subtract from gain table index,
  1661. * to compensate for difference between power supply voltage during
  1662. * factory measurements, vs. current power supply voltage.
  1663. *
  1664. * Voltage indication is higher for lower voltage.
  1665. * Lower voltage requires more gain (lower gain table index).
  1666. */
  1667. static s32 iwl4965_get_voltage_compensation(s32 eeprom_voltage,
  1668. s32 current_voltage)
  1669. {
  1670. s32 comp = 0;
  1671. if ((TX_POWER_IWL_ILLEGAL_VOLTAGE == eeprom_voltage) ||
  1672. (TX_POWER_IWL_ILLEGAL_VOLTAGE == current_voltage))
  1673. return 0;
  1674. iwl4965_math_div_round(current_voltage - eeprom_voltage,
  1675. TX_POWER_IWL_VOLTAGE_CODES_PER_03V, &comp);
  1676. if (current_voltage > eeprom_voltage)
  1677. comp *= 2;
  1678. if ((comp < -2) || (comp > 2))
  1679. comp = 0;
  1680. return comp;
  1681. }
  1682. static const struct iwl_channel_info *
  1683. iwl4965_get_channel_txpower_info(struct iwl_priv *priv,
  1684. enum ieee80211_band band, u16 channel)
  1685. {
  1686. const struct iwl_channel_info *ch_info;
  1687. ch_info = iwl_get_channel_info(priv, band, channel);
  1688. if (!is_channel_valid(ch_info))
  1689. return NULL;
  1690. return ch_info;
  1691. }
  1692. static s32 iwl4965_get_tx_atten_grp(u16 channel)
  1693. {
  1694. if (channel >= CALIB_IWL_TX_ATTEN_GR5_FCH &&
  1695. channel <= CALIB_IWL_TX_ATTEN_GR5_LCH)
  1696. return CALIB_CH_GROUP_5;
  1697. if (channel >= CALIB_IWL_TX_ATTEN_GR1_FCH &&
  1698. channel <= CALIB_IWL_TX_ATTEN_GR1_LCH)
  1699. return CALIB_CH_GROUP_1;
  1700. if (channel >= CALIB_IWL_TX_ATTEN_GR2_FCH &&
  1701. channel <= CALIB_IWL_TX_ATTEN_GR2_LCH)
  1702. return CALIB_CH_GROUP_2;
  1703. if (channel >= CALIB_IWL_TX_ATTEN_GR3_FCH &&
  1704. channel <= CALIB_IWL_TX_ATTEN_GR3_LCH)
  1705. return CALIB_CH_GROUP_3;
  1706. if (channel >= CALIB_IWL_TX_ATTEN_GR4_FCH &&
  1707. channel <= CALIB_IWL_TX_ATTEN_GR4_LCH)
  1708. return CALIB_CH_GROUP_4;
  1709. IWL_ERROR("Can't find txatten group for channel %d.\n", channel);
  1710. return -1;
  1711. }
  1712. static u32 iwl4965_get_sub_band(const struct iwl_priv *priv, u32 channel)
  1713. {
  1714. s32 b = -1;
  1715. for (b = 0; b < EEPROM_TX_POWER_BANDS; b++) {
  1716. if (priv->eeprom.calib_info.band_info[b].ch_from == 0)
  1717. continue;
  1718. if ((channel >= priv->eeprom.calib_info.band_info[b].ch_from)
  1719. && (channel <= priv->eeprom.calib_info.band_info[b].ch_to))
  1720. break;
  1721. }
  1722. return b;
  1723. }
  1724. static s32 iwl4965_interpolate_value(s32 x, s32 x1, s32 y1, s32 x2, s32 y2)
  1725. {
  1726. s32 val;
  1727. if (x2 == x1)
  1728. return y1;
  1729. else {
  1730. iwl4965_math_div_round((x2 - x) * (y1 - y2), (x2 - x1), &val);
  1731. return val + y2;
  1732. }
  1733. }
  1734. /**
  1735. * iwl4965_interpolate_chan - Interpolate factory measurements for one channel
  1736. *
  1737. * Interpolates factory measurements from the two sample channels within a
  1738. * sub-band, to apply to channel of interest. Interpolation is proportional to
  1739. * differences in channel frequencies, which is proportional to differences
  1740. * in channel number.
  1741. */
  1742. static int iwl4965_interpolate_chan(struct iwl_priv *priv, u32 channel,
  1743. struct iwl4965_eeprom_calib_ch_info *chan_info)
  1744. {
  1745. s32 s = -1;
  1746. u32 c;
  1747. u32 m;
  1748. const struct iwl4965_eeprom_calib_measure *m1;
  1749. const struct iwl4965_eeprom_calib_measure *m2;
  1750. struct iwl4965_eeprom_calib_measure *omeas;
  1751. u32 ch_i1;
  1752. u32 ch_i2;
  1753. s = iwl4965_get_sub_band(priv, channel);
  1754. if (s >= EEPROM_TX_POWER_BANDS) {
  1755. IWL_ERROR("Tx Power can not find channel %d ", channel);
  1756. return -1;
  1757. }
  1758. ch_i1 = priv->eeprom.calib_info.band_info[s].ch1.ch_num;
  1759. ch_i2 = priv->eeprom.calib_info.band_info[s].ch2.ch_num;
  1760. chan_info->ch_num = (u8) channel;
  1761. IWL_DEBUG_TXPOWER("channel %d subband %d factory cal ch %d & %d\n",
  1762. channel, s, ch_i1, ch_i2);
  1763. for (c = 0; c < EEPROM_TX_POWER_TX_CHAINS; c++) {
  1764. for (m = 0; m < EEPROM_TX_POWER_MEASUREMENTS; m++) {
  1765. m1 = &(priv->eeprom.calib_info.band_info[s].ch1.
  1766. measurements[c][m]);
  1767. m2 = &(priv->eeprom.calib_info.band_info[s].ch2.
  1768. measurements[c][m]);
  1769. omeas = &(chan_info->measurements[c][m]);
  1770. omeas->actual_pow =
  1771. (u8) iwl4965_interpolate_value(channel, ch_i1,
  1772. m1->actual_pow,
  1773. ch_i2,
  1774. m2->actual_pow);
  1775. omeas->gain_idx =
  1776. (u8) iwl4965_interpolate_value(channel, ch_i1,
  1777. m1->gain_idx, ch_i2,
  1778. m2->gain_idx);
  1779. omeas->temperature =
  1780. (u8) iwl4965_interpolate_value(channel, ch_i1,
  1781. m1->temperature,
  1782. ch_i2,
  1783. m2->temperature);
  1784. omeas->pa_det =
  1785. (s8) iwl4965_interpolate_value(channel, ch_i1,
  1786. m1->pa_det, ch_i2,
  1787. m2->pa_det);
  1788. IWL_DEBUG_TXPOWER
  1789. ("chain %d meas %d AP1=%d AP2=%d AP=%d\n", c, m,
  1790. m1->actual_pow, m2->actual_pow, omeas->actual_pow);
  1791. IWL_DEBUG_TXPOWER
  1792. ("chain %d meas %d NI1=%d NI2=%d NI=%d\n", c, m,
  1793. m1->gain_idx, m2->gain_idx, omeas->gain_idx);
  1794. IWL_DEBUG_TXPOWER
  1795. ("chain %d meas %d PA1=%d PA2=%d PA=%d\n", c, m,
  1796. m1->pa_det, m2->pa_det, omeas->pa_det);
  1797. IWL_DEBUG_TXPOWER
  1798. ("chain %d meas %d T1=%d T2=%d T=%d\n", c, m,
  1799. m1->temperature, m2->temperature,
  1800. omeas->temperature);
  1801. }
  1802. }
  1803. return 0;
  1804. }
  1805. /* bit-rate-dependent table to prevent Tx distortion, in half-dB units,
  1806. * for OFDM 6, 12, 18, 24, 36, 48, 54, 60 MBit, and CCK all rates. */
  1807. static s32 back_off_table[] = {
  1808. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 20 MHz */
  1809. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 20 MHz */
  1810. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM SISO 40 MHz */
  1811. 10, 10, 10, 10, 10, 15, 17, 20, /* OFDM MIMO 40 MHz */
  1812. 10 /* CCK */
  1813. };
  1814. /* Thermal compensation values for txpower for various frequency ranges ...
  1815. * ratios from 3:1 to 4.5:1 of degrees (Celsius) per half-dB gain adjust */
  1816. static struct iwl4965_txpower_comp_entry {
  1817. s32 degrees_per_05db_a;
  1818. s32 degrees_per_05db_a_denom;
  1819. } tx_power_cmp_tble[CALIB_CH_GROUP_MAX] = {
  1820. {9, 2}, /* group 0 5.2, ch 34-43 */
  1821. {4, 1}, /* group 1 5.2, ch 44-70 */
  1822. {4, 1}, /* group 2 5.2, ch 71-124 */
  1823. {4, 1}, /* group 3 5.2, ch 125-200 */
  1824. {3, 1} /* group 4 2.4, ch all */
  1825. };
  1826. static s32 get_min_power_index(s32 rate_power_index, u32 band)
  1827. {
  1828. if (!band) {
  1829. if ((rate_power_index & 7) <= 4)
  1830. return MIN_TX_GAIN_INDEX_52GHZ_EXT;
  1831. }
  1832. return MIN_TX_GAIN_INDEX;
  1833. }
  1834. struct gain_entry {
  1835. u8 dsp;
  1836. u8 radio;
  1837. };
  1838. static const struct gain_entry gain_table[2][108] = {
  1839. /* 5.2GHz power gain index table */
  1840. {
  1841. {123, 0x3F}, /* highest txpower */
  1842. {117, 0x3F},
  1843. {110, 0x3F},
  1844. {104, 0x3F},
  1845. {98, 0x3F},
  1846. {110, 0x3E},
  1847. {104, 0x3E},
  1848. {98, 0x3E},
  1849. {110, 0x3D},
  1850. {104, 0x3D},
  1851. {98, 0x3D},
  1852. {110, 0x3C},
  1853. {104, 0x3C},
  1854. {98, 0x3C},
  1855. {110, 0x3B},
  1856. {104, 0x3B},
  1857. {98, 0x3B},
  1858. {110, 0x3A},
  1859. {104, 0x3A},
  1860. {98, 0x3A},
  1861. {110, 0x39},
  1862. {104, 0x39},
  1863. {98, 0x39},
  1864. {110, 0x38},
  1865. {104, 0x38},
  1866. {98, 0x38},
  1867. {110, 0x37},
  1868. {104, 0x37},
  1869. {98, 0x37},
  1870. {110, 0x36},
  1871. {104, 0x36},
  1872. {98, 0x36},
  1873. {110, 0x35},
  1874. {104, 0x35},
  1875. {98, 0x35},
  1876. {110, 0x34},
  1877. {104, 0x34},
  1878. {98, 0x34},
  1879. {110, 0x33},
  1880. {104, 0x33},
  1881. {98, 0x33},
  1882. {110, 0x32},
  1883. {104, 0x32},
  1884. {98, 0x32},
  1885. {110, 0x31},
  1886. {104, 0x31},
  1887. {98, 0x31},
  1888. {110, 0x30},
  1889. {104, 0x30},
  1890. {98, 0x30},
  1891. {110, 0x25},
  1892. {104, 0x25},
  1893. {98, 0x25},
  1894. {110, 0x24},
  1895. {104, 0x24},
  1896. {98, 0x24},
  1897. {110, 0x23},
  1898. {104, 0x23},
  1899. {98, 0x23},
  1900. {110, 0x22},
  1901. {104, 0x18},
  1902. {98, 0x18},
  1903. {110, 0x17},
  1904. {104, 0x17},
  1905. {98, 0x17},
  1906. {110, 0x16},
  1907. {104, 0x16},
  1908. {98, 0x16},
  1909. {110, 0x15},
  1910. {104, 0x15},
  1911. {98, 0x15},
  1912. {110, 0x14},
  1913. {104, 0x14},
  1914. {98, 0x14},
  1915. {110, 0x13},
  1916. {104, 0x13},
  1917. {98, 0x13},
  1918. {110, 0x12},
  1919. {104, 0x08},
  1920. {98, 0x08},
  1921. {110, 0x07},
  1922. {104, 0x07},
  1923. {98, 0x07},
  1924. {110, 0x06},
  1925. {104, 0x06},
  1926. {98, 0x06},
  1927. {110, 0x05},
  1928. {104, 0x05},
  1929. {98, 0x05},
  1930. {110, 0x04},
  1931. {104, 0x04},
  1932. {98, 0x04},
  1933. {110, 0x03},
  1934. {104, 0x03},
  1935. {98, 0x03},
  1936. {110, 0x02},
  1937. {104, 0x02},
  1938. {98, 0x02},
  1939. {110, 0x01},
  1940. {104, 0x01},
  1941. {98, 0x01},
  1942. {110, 0x00},
  1943. {104, 0x00},
  1944. {98, 0x00},
  1945. {93, 0x00},
  1946. {88, 0x00},
  1947. {83, 0x00},
  1948. {78, 0x00},
  1949. },
  1950. /* 2.4GHz power gain index table */
  1951. {
  1952. {110, 0x3f}, /* highest txpower */
  1953. {104, 0x3f},
  1954. {98, 0x3f},
  1955. {110, 0x3e},
  1956. {104, 0x3e},
  1957. {98, 0x3e},
  1958. {110, 0x3d},
  1959. {104, 0x3d},
  1960. {98, 0x3d},
  1961. {110, 0x3c},
  1962. {104, 0x3c},
  1963. {98, 0x3c},
  1964. {110, 0x3b},
  1965. {104, 0x3b},
  1966. {98, 0x3b},
  1967. {110, 0x3a},
  1968. {104, 0x3a},
  1969. {98, 0x3a},
  1970. {110, 0x39},
  1971. {104, 0x39},
  1972. {98, 0x39},
  1973. {110, 0x38},
  1974. {104, 0x38},
  1975. {98, 0x38},
  1976. {110, 0x37},
  1977. {104, 0x37},
  1978. {98, 0x37},
  1979. {110, 0x36},
  1980. {104, 0x36},
  1981. {98, 0x36},
  1982. {110, 0x35},
  1983. {104, 0x35},
  1984. {98, 0x35},
  1985. {110, 0x34},
  1986. {104, 0x34},
  1987. {98, 0x34},
  1988. {110, 0x33},
  1989. {104, 0x33},
  1990. {98, 0x33},
  1991. {110, 0x32},
  1992. {104, 0x32},
  1993. {98, 0x32},
  1994. {110, 0x31},
  1995. {104, 0x31},
  1996. {98, 0x31},
  1997. {110, 0x30},
  1998. {104, 0x30},
  1999. {98, 0x30},
  2000. {110, 0x6},
  2001. {104, 0x6},
  2002. {98, 0x6},
  2003. {110, 0x5},
  2004. {104, 0x5},
  2005. {98, 0x5},
  2006. {110, 0x4},
  2007. {104, 0x4},
  2008. {98, 0x4},
  2009. {110, 0x3},
  2010. {104, 0x3},
  2011. {98, 0x3},
  2012. {110, 0x2},
  2013. {104, 0x2},
  2014. {98, 0x2},
  2015. {110, 0x1},
  2016. {104, 0x1},
  2017. {98, 0x1},
  2018. {110, 0x0},
  2019. {104, 0x0},
  2020. {98, 0x0},
  2021. {97, 0},
  2022. {96, 0},
  2023. {95, 0},
  2024. {94, 0},
  2025. {93, 0},
  2026. {92, 0},
  2027. {91, 0},
  2028. {90, 0},
  2029. {89, 0},
  2030. {88, 0},
  2031. {87, 0},
  2032. {86, 0},
  2033. {85, 0},
  2034. {84, 0},
  2035. {83, 0},
  2036. {82, 0},
  2037. {81, 0},
  2038. {80, 0},
  2039. {79, 0},
  2040. {78, 0},
  2041. {77, 0},
  2042. {76, 0},
  2043. {75, 0},
  2044. {74, 0},
  2045. {73, 0},
  2046. {72, 0},
  2047. {71, 0},
  2048. {70, 0},
  2049. {69, 0},
  2050. {68, 0},
  2051. {67, 0},
  2052. {66, 0},
  2053. {65, 0},
  2054. {64, 0},
  2055. {63, 0},
  2056. {62, 0},
  2057. {61, 0},
  2058. {60, 0},
  2059. {59, 0},
  2060. }
  2061. };
  2062. static int iwl4965_fill_txpower_tbl(struct iwl_priv *priv, u8 band, u16 channel,
  2063. u8 is_fat, u8 ctrl_chan_high,
  2064. struct iwl4965_tx_power_db *tx_power_tbl)
  2065. {
  2066. u8 saturation_power;
  2067. s32 target_power;
  2068. s32 user_target_power;
  2069. s32 power_limit;
  2070. s32 current_temp;
  2071. s32 reg_limit;
  2072. s32 current_regulatory;
  2073. s32 txatten_grp = CALIB_CH_GROUP_MAX;
  2074. int i;
  2075. int c;
  2076. const struct iwl_channel_info *ch_info = NULL;
  2077. struct iwl4965_eeprom_calib_ch_info ch_eeprom_info;
  2078. const struct iwl4965_eeprom_calib_measure *measurement;
  2079. s16 voltage;
  2080. s32 init_voltage;
  2081. s32 voltage_compensation;
  2082. s32 degrees_per_05db_num;
  2083. s32 degrees_per_05db_denom;
  2084. s32 factory_temp;
  2085. s32 temperature_comp[2];
  2086. s32 factory_gain_index[2];
  2087. s32 factory_actual_pwr[2];
  2088. s32 power_index;
  2089. /* Sanity check requested level (dBm) */
  2090. if (priv->user_txpower_limit < IWL_TX_POWER_TARGET_POWER_MIN) {
  2091. IWL_WARNING("Requested user TXPOWER %d below limit.\n",
  2092. priv->user_txpower_limit);
  2093. return -EINVAL;
  2094. }
  2095. if (priv->user_txpower_limit > IWL_TX_POWER_TARGET_POWER_MAX) {
  2096. IWL_WARNING("Requested user TXPOWER %d above limit.\n",
  2097. priv->user_txpower_limit);
  2098. return -EINVAL;
  2099. }
  2100. /* user_txpower_limit is in dBm, convert to half-dBm (half-dB units
  2101. * are used for indexing into txpower table) */
  2102. user_target_power = 2 * priv->user_txpower_limit;
  2103. /* Get current (RXON) channel, band, width */
  2104. ch_info =
  2105. iwl4965_get_channel_txpower_info(priv, priv->band, channel);
  2106. IWL_DEBUG_TXPOWER("chan %d band %d is_fat %d\n", channel, band,
  2107. is_fat);
  2108. if (!ch_info)
  2109. return -EINVAL;
  2110. /* get txatten group, used to select 1) thermal txpower adjustment
  2111. * and 2) mimo txpower balance between Tx chains. */
  2112. txatten_grp = iwl4965_get_tx_atten_grp(channel);
  2113. if (txatten_grp < 0)
  2114. return -EINVAL;
  2115. IWL_DEBUG_TXPOWER("channel %d belongs to txatten group %d\n",
  2116. channel, txatten_grp);
  2117. if (is_fat) {
  2118. if (ctrl_chan_high)
  2119. channel -= 2;
  2120. else
  2121. channel += 2;
  2122. }
  2123. /* hardware txpower limits ...
  2124. * saturation (clipping distortion) txpowers are in half-dBm */
  2125. if (band)
  2126. saturation_power = priv->eeprom.calib_info.saturation_power24;
  2127. else
  2128. saturation_power = priv->eeprom.calib_info.saturation_power52;
  2129. if (saturation_power < IWL_TX_POWER_SATURATION_MIN ||
  2130. saturation_power > IWL_TX_POWER_SATURATION_MAX) {
  2131. if (band)
  2132. saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_24;
  2133. else
  2134. saturation_power = IWL_TX_POWER_DEFAULT_SATURATION_52;
  2135. }
  2136. /* regulatory txpower limits ... reg_limit values are in half-dBm,
  2137. * max_power_avg values are in dBm, convert * 2 */
  2138. if (is_fat)
  2139. reg_limit = ch_info->fat_max_power_avg * 2;
  2140. else
  2141. reg_limit = ch_info->max_power_avg * 2;
  2142. if ((reg_limit < IWL_TX_POWER_REGULATORY_MIN) ||
  2143. (reg_limit > IWL_TX_POWER_REGULATORY_MAX)) {
  2144. if (band)
  2145. reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_24;
  2146. else
  2147. reg_limit = IWL_TX_POWER_DEFAULT_REGULATORY_52;
  2148. }
  2149. /* Interpolate txpower calibration values for this channel,
  2150. * based on factory calibration tests on spaced channels. */
  2151. iwl4965_interpolate_chan(priv, channel, &ch_eeprom_info);
  2152. /* calculate tx gain adjustment based on power supply voltage */
  2153. voltage = priv->eeprom.calib_info.voltage;
  2154. init_voltage = (s32)le32_to_cpu(priv->card_alive_init.voltage);
  2155. voltage_compensation =
  2156. iwl4965_get_voltage_compensation(voltage, init_voltage);
  2157. IWL_DEBUG_TXPOWER("curr volt %d eeprom volt %d volt comp %d\n",
  2158. init_voltage,
  2159. voltage, voltage_compensation);
  2160. /* get current temperature (Celsius) */
  2161. current_temp = max(priv->temperature, IWL_TX_POWER_TEMPERATURE_MIN);
  2162. current_temp = min(priv->temperature, IWL_TX_POWER_TEMPERATURE_MAX);
  2163. current_temp = KELVIN_TO_CELSIUS(current_temp);
  2164. /* select thermal txpower adjustment params, based on channel group
  2165. * (same frequency group used for mimo txatten adjustment) */
  2166. degrees_per_05db_num =
  2167. tx_power_cmp_tble[txatten_grp].degrees_per_05db_a;
  2168. degrees_per_05db_denom =
  2169. tx_power_cmp_tble[txatten_grp].degrees_per_05db_a_denom;
  2170. /* get per-chain txpower values from factory measurements */
  2171. for (c = 0; c < 2; c++) {
  2172. measurement = &ch_eeprom_info.measurements[c][1];
  2173. /* txgain adjustment (in half-dB steps) based on difference
  2174. * between factory and current temperature */
  2175. factory_temp = measurement->temperature;
  2176. iwl4965_math_div_round((current_temp - factory_temp) *
  2177. degrees_per_05db_denom,
  2178. degrees_per_05db_num,
  2179. &temperature_comp[c]);
  2180. factory_gain_index[c] = measurement->gain_idx;
  2181. factory_actual_pwr[c] = measurement->actual_pow;
  2182. IWL_DEBUG_TXPOWER("chain = %d\n", c);
  2183. IWL_DEBUG_TXPOWER("fctry tmp %d, "
  2184. "curr tmp %d, comp %d steps\n",
  2185. factory_temp, current_temp,
  2186. temperature_comp[c]);
  2187. IWL_DEBUG_TXPOWER("fctry idx %d, fctry pwr %d\n",
  2188. factory_gain_index[c],
  2189. factory_actual_pwr[c]);
  2190. }
  2191. /* for each of 33 bit-rates (including 1 for CCK) */
  2192. for (i = 0; i < POWER_TABLE_NUM_ENTRIES; i++) {
  2193. u8 is_mimo_rate;
  2194. union iwl4965_tx_power_dual_stream tx_power;
  2195. /* for mimo, reduce each chain's txpower by half
  2196. * (3dB, 6 steps), so total output power is regulatory
  2197. * compliant. */
  2198. if (i & 0x8) {
  2199. current_regulatory = reg_limit -
  2200. IWL_TX_POWER_MIMO_REGULATORY_COMPENSATION;
  2201. is_mimo_rate = 1;
  2202. } else {
  2203. current_regulatory = reg_limit;
  2204. is_mimo_rate = 0;
  2205. }
  2206. /* find txpower limit, either hardware or regulatory */
  2207. power_limit = saturation_power - back_off_table[i];
  2208. if (power_limit > current_regulatory)
  2209. power_limit = current_regulatory;
  2210. /* reduce user's txpower request if necessary
  2211. * for this rate on this channel */
  2212. target_power = user_target_power;
  2213. if (target_power > power_limit)
  2214. target_power = power_limit;
  2215. IWL_DEBUG_TXPOWER("rate %d sat %d reg %d usr %d tgt %d\n",
  2216. i, saturation_power - back_off_table[i],
  2217. current_regulatory, user_target_power,
  2218. target_power);
  2219. /* for each of 2 Tx chains (radio transmitters) */
  2220. for (c = 0; c < 2; c++) {
  2221. s32 atten_value;
  2222. if (is_mimo_rate)
  2223. atten_value =
  2224. (s32)le32_to_cpu(priv->card_alive_init.
  2225. tx_atten[txatten_grp][c]);
  2226. else
  2227. atten_value = 0;
  2228. /* calculate index; higher index means lower txpower */
  2229. power_index = (u8) (factory_gain_index[c] -
  2230. (target_power -
  2231. factory_actual_pwr[c]) -
  2232. temperature_comp[c] -
  2233. voltage_compensation +
  2234. atten_value);
  2235. /* IWL_DEBUG_TXPOWER("calculated txpower index %d\n",
  2236. power_index); */
  2237. if (power_index < get_min_power_index(i, band))
  2238. power_index = get_min_power_index(i, band);
  2239. /* adjust 5 GHz index to support negative indexes */
  2240. if (!band)
  2241. power_index += 9;
  2242. /* CCK, rate 32, reduce txpower for CCK */
  2243. if (i == POWER_TABLE_CCK_ENTRY)
  2244. power_index +=
  2245. IWL_TX_POWER_CCK_COMPENSATION_C_STEP;
  2246. /* stay within the table! */
  2247. if (power_index > 107) {
  2248. IWL_WARNING("txpower index %d > 107\n",
  2249. power_index);
  2250. power_index = 107;
  2251. }
  2252. if (power_index < 0) {
  2253. IWL_WARNING("txpower index %d < 0\n",
  2254. power_index);
  2255. power_index = 0;
  2256. }
  2257. /* fill txpower command for this rate/chain */
  2258. tx_power.s.radio_tx_gain[c] =
  2259. gain_table[band][power_index].radio;
  2260. tx_power.s.dsp_predis_atten[c] =
  2261. gain_table[band][power_index].dsp;
  2262. IWL_DEBUG_TXPOWER("chain %d mimo %d index %d "
  2263. "gain 0x%02x dsp %d\n",
  2264. c, atten_value, power_index,
  2265. tx_power.s.radio_tx_gain[c],
  2266. tx_power.s.dsp_predis_atten[c]);
  2267. }/* for each chain */
  2268. tx_power_tbl->power_tbl[i].dw = cpu_to_le32(tx_power.dw);
  2269. }/* for each rate */
  2270. return 0;
  2271. }
  2272. /**
  2273. * iwl4965_hw_reg_send_txpower - Configure the TXPOWER level user limit
  2274. *
  2275. * Uses the active RXON for channel, band, and characteristics (fat, high)
  2276. * The power limit is taken from priv->user_txpower_limit.
  2277. */
  2278. int iwl4965_hw_reg_send_txpower(struct iwl_priv *priv)
  2279. {
  2280. struct iwl4965_txpowertable_cmd cmd = { 0 };
  2281. int ret;
  2282. u8 band = 0;
  2283. u8 is_fat = 0;
  2284. u8 ctrl_chan_high = 0;
  2285. if (test_bit(STATUS_SCANNING, &priv->status)) {
  2286. /* If this gets hit a lot, switch it to a BUG() and catch
  2287. * the stack trace to find out who is calling this during
  2288. * a scan. */
  2289. IWL_WARNING("TX Power requested while scanning!\n");
  2290. return -EAGAIN;
  2291. }
  2292. band = priv->band == IEEE80211_BAND_2GHZ;
  2293. is_fat = is_fat_channel(priv->active_rxon.flags);
  2294. if (is_fat &&
  2295. (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
  2296. ctrl_chan_high = 1;
  2297. cmd.band = band;
  2298. cmd.channel = priv->active_rxon.channel;
  2299. ret = iwl4965_fill_txpower_tbl(priv, band,
  2300. le16_to_cpu(priv->active_rxon.channel),
  2301. is_fat, ctrl_chan_high, &cmd.tx_power);
  2302. if (ret)
  2303. goto out;
  2304. ret = iwl_send_cmd_pdu(priv, REPLY_TX_PWR_TABLE_CMD, sizeof(cmd), &cmd);
  2305. out:
  2306. return ret;
  2307. }
  2308. int iwl4965_hw_channel_switch(struct iwl_priv *priv, u16 channel)
  2309. {
  2310. int rc;
  2311. u8 band = 0;
  2312. u8 is_fat = 0;
  2313. u8 ctrl_chan_high = 0;
  2314. struct iwl4965_channel_switch_cmd cmd = { 0 };
  2315. const struct iwl_channel_info *ch_info;
  2316. band = priv->band == IEEE80211_BAND_2GHZ;
  2317. ch_info = iwl_get_channel_info(priv, priv->band, channel);
  2318. is_fat = is_fat_channel(priv->staging_rxon.flags);
  2319. if (is_fat &&
  2320. (priv->active_rxon.flags & RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK))
  2321. ctrl_chan_high = 1;
  2322. cmd.band = band;
  2323. cmd.expect_beacon = 0;
  2324. cmd.channel = cpu_to_le16(channel);
  2325. cmd.rxon_flags = priv->active_rxon.flags;
  2326. cmd.rxon_filter_flags = priv->active_rxon.filter_flags;
  2327. cmd.switch_time = cpu_to_le32(priv->ucode_beacon_time);
  2328. if (ch_info)
  2329. cmd.expect_beacon = is_channel_radar(ch_info);
  2330. else
  2331. cmd.expect_beacon = 1;
  2332. rc = iwl4965_fill_txpower_tbl(priv, band, channel, is_fat,
  2333. ctrl_chan_high, &cmd.tx_power);
  2334. if (rc) {
  2335. IWL_DEBUG_11H("error:%d fill txpower_tbl\n", rc);
  2336. return rc;
  2337. }
  2338. rc = iwl_send_cmd_pdu(priv, REPLY_CHANNEL_SWITCH, sizeof(cmd), &cmd);
  2339. return rc;
  2340. }
  2341. #define RTS_HCCA_RETRY_LIMIT 3
  2342. #define RTS_DFAULT_RETRY_LIMIT 60
  2343. void iwl4965_hw_build_tx_cmd_rate(struct iwl_priv *priv,
  2344. struct iwl_cmd *cmd,
  2345. struct ieee80211_tx_control *ctrl,
  2346. struct ieee80211_hdr *hdr, int sta_id,
  2347. int is_hcca)
  2348. {
  2349. struct iwl4965_tx_cmd *tx = &cmd->cmd.tx;
  2350. u8 rts_retry_limit = 0;
  2351. u8 data_retry_limit = 0;
  2352. u16 fc = le16_to_cpu(hdr->frame_control);
  2353. u8 rate_plcp;
  2354. u16 rate_flags = 0;
  2355. int rate_idx = min(ctrl->tx_rate->hw_value & 0xffff, IWL_RATE_COUNT - 1);
  2356. rate_plcp = iwl4965_rates[rate_idx].plcp;
  2357. rts_retry_limit = (is_hcca) ?
  2358. RTS_HCCA_RETRY_LIMIT : RTS_DFAULT_RETRY_LIMIT;
  2359. if ((rate_idx >= IWL_FIRST_CCK_RATE) && (rate_idx <= IWL_LAST_CCK_RATE))
  2360. rate_flags |= RATE_MCS_CCK_MSK;
  2361. if (ieee80211_is_probe_response(fc)) {
  2362. data_retry_limit = 3;
  2363. if (data_retry_limit < rts_retry_limit)
  2364. rts_retry_limit = data_retry_limit;
  2365. } else
  2366. data_retry_limit = IWL_DEFAULT_TX_RETRY;
  2367. if (priv->data_retry_limit != -1)
  2368. data_retry_limit = priv->data_retry_limit;
  2369. if (ieee80211_is_data(fc)) {
  2370. tx->initial_rate_index = 0;
  2371. tx->tx_flags |= TX_CMD_FLG_STA_RATE_MSK;
  2372. } else {
  2373. switch (fc & IEEE80211_FCTL_STYPE) {
  2374. case IEEE80211_STYPE_AUTH:
  2375. case IEEE80211_STYPE_DEAUTH:
  2376. case IEEE80211_STYPE_ASSOC_REQ:
  2377. case IEEE80211_STYPE_REASSOC_REQ:
  2378. if (tx->tx_flags & TX_CMD_FLG_RTS_MSK) {
  2379. tx->tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2380. tx->tx_flags |= TX_CMD_FLG_CTS_MSK;
  2381. }
  2382. break;
  2383. default:
  2384. break;
  2385. }
  2386. /* Alternate between antenna A and B for successive frames */
  2387. if (priv->use_ant_b_for_management_frame) {
  2388. priv->use_ant_b_for_management_frame = 0;
  2389. rate_flags |= RATE_MCS_ANT_B_MSK;
  2390. } else {
  2391. priv->use_ant_b_for_management_frame = 1;
  2392. rate_flags |= RATE_MCS_ANT_A_MSK;
  2393. }
  2394. }
  2395. tx->rts_retry_limit = rts_retry_limit;
  2396. tx->data_retry_limit = data_retry_limit;
  2397. tx->rate_n_flags = iwl4965_hw_set_rate_n_flags(rate_plcp, rate_flags);
  2398. }
  2399. int iwl4965_hw_get_rx_read(struct iwl_priv *priv)
  2400. {
  2401. struct iwl4965_shared *shared_data = priv->hw_setting.shared_virt;
  2402. return IWL_GET_BITS(*shared_data, rb_closed_stts_rb_num);
  2403. }
  2404. int iwl4965_hw_get_temperature(struct iwl_priv *priv)
  2405. {
  2406. return priv->temperature;
  2407. }
  2408. unsigned int iwl4965_hw_get_beacon_cmd(struct iwl_priv *priv,
  2409. struct iwl4965_frame *frame, u8 rate)
  2410. {
  2411. struct iwl4965_tx_beacon_cmd *tx_beacon_cmd;
  2412. unsigned int frame_size;
  2413. tx_beacon_cmd = &frame->u.beacon;
  2414. memset(tx_beacon_cmd, 0, sizeof(*tx_beacon_cmd));
  2415. tx_beacon_cmd->tx.sta_id = priv->hw_setting.bcast_sta_id;
  2416. tx_beacon_cmd->tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2417. frame_size = iwl4965_fill_beacon_frame(priv,
  2418. tx_beacon_cmd->frame,
  2419. iwl4965_broadcast_addr,
  2420. sizeof(frame->u) - sizeof(*tx_beacon_cmd));
  2421. BUG_ON(frame_size > MAX_MPDU_SIZE);
  2422. tx_beacon_cmd->tx.len = cpu_to_le16((u16)frame_size);
  2423. if ((rate == IWL_RATE_1M_PLCP) || (rate >= IWL_RATE_2M_PLCP))
  2424. tx_beacon_cmd->tx.rate_n_flags =
  2425. iwl4965_hw_set_rate_n_flags(rate, RATE_MCS_CCK_MSK);
  2426. else
  2427. tx_beacon_cmd->tx.rate_n_flags =
  2428. iwl4965_hw_set_rate_n_flags(rate, 0);
  2429. tx_beacon_cmd->tx.tx_flags = (TX_CMD_FLG_SEQ_CTL_MSK |
  2430. TX_CMD_FLG_TSF_MSK | TX_CMD_FLG_STA_RATE_MSK);
  2431. return (sizeof(*tx_beacon_cmd) + frame_size);
  2432. }
  2433. /*
  2434. * Tell 4965 where to find circular buffer of Tx Frame Descriptors for
  2435. * given Tx queue, and enable the DMA channel used for that queue.
  2436. *
  2437. * 4965 supports up to 16 Tx queues in DRAM, mapped to up to 8 Tx DMA
  2438. * channels supported in hardware.
  2439. */
  2440. int iwl4965_hw_tx_queue_init(struct iwl_priv *priv, struct iwl4965_tx_queue *txq)
  2441. {
  2442. int rc;
  2443. unsigned long flags;
  2444. int txq_id = txq->q.id;
  2445. spin_lock_irqsave(&priv->lock, flags);
  2446. rc = iwl4965_grab_nic_access(priv);
  2447. if (rc) {
  2448. spin_unlock_irqrestore(&priv->lock, flags);
  2449. return rc;
  2450. }
  2451. /* Circular buffer (TFD queue in DRAM) physical base address */
  2452. iwl4965_write_direct32(priv, FH_MEM_CBBC_QUEUE(txq_id),
  2453. txq->q.dma_addr >> 8);
  2454. /* Enable DMA channel, using same id as for TFD queue */
  2455. iwl4965_write_direct32(
  2456. priv, IWL_FH_TCSR_CHNL_TX_CONFIG_REG(txq_id),
  2457. IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CHNL_ENABLE |
  2458. IWL_FH_TCSR_TX_CONFIG_REG_VAL_DMA_CREDIT_ENABLE_VAL);
  2459. iwl4965_release_nic_access(priv);
  2460. spin_unlock_irqrestore(&priv->lock, flags);
  2461. return 0;
  2462. }
  2463. int iwl4965_hw_txq_attach_buf_to_tfd(struct iwl_priv *priv, void *ptr,
  2464. dma_addr_t addr, u16 len)
  2465. {
  2466. int index, is_odd;
  2467. struct iwl4965_tfd_frame *tfd = ptr;
  2468. u32 num_tbs = IWL_GET_BITS(*tfd, num_tbs);
  2469. /* Each TFD can point to a maximum 20 Tx buffers */
  2470. if ((num_tbs >= MAX_NUM_OF_TBS) || (num_tbs < 0)) {
  2471. IWL_ERROR("Error can not send more than %d chunks\n",
  2472. MAX_NUM_OF_TBS);
  2473. return -EINVAL;
  2474. }
  2475. index = num_tbs / 2;
  2476. is_odd = num_tbs & 0x1;
  2477. if (!is_odd) {
  2478. tfd->pa[index].tb1_addr = cpu_to_le32(addr);
  2479. IWL_SET_BITS(tfd->pa[index], tb1_addr_hi,
  2480. iwl_get_dma_hi_address(addr));
  2481. IWL_SET_BITS(tfd->pa[index], tb1_len, len);
  2482. } else {
  2483. IWL_SET_BITS(tfd->pa[index], tb2_addr_lo16,
  2484. (u32) (addr & 0xffff));
  2485. IWL_SET_BITS(tfd->pa[index], tb2_addr_hi20, addr >> 16);
  2486. IWL_SET_BITS(tfd->pa[index], tb2_len, len);
  2487. }
  2488. IWL_SET_BITS(*tfd, num_tbs, num_tbs + 1);
  2489. return 0;
  2490. }
  2491. static void iwl4965_hw_card_show_info(struct iwl_priv *priv)
  2492. {
  2493. u16 hw_version = priv->eeprom.board_revision_4965;
  2494. IWL_DEBUG_INFO("4965ABGN HW Version %u.%u.%u\n",
  2495. ((hw_version >> 8) & 0x0F),
  2496. ((hw_version >> 8) >> 4), (hw_version & 0x00FF));
  2497. IWL_DEBUG_INFO("4965ABGN PBA Number %.16s\n",
  2498. priv->eeprom.board_pba_number_4965);
  2499. }
  2500. #define IWL_TX_CRC_SIZE 4
  2501. #define IWL_TX_DELIMITER_SIZE 4
  2502. /**
  2503. * iwl4965_tx_queue_update_wr_ptr - Set up entry in Tx byte-count array
  2504. */
  2505. int iwl4965_tx_queue_update_wr_ptr(struct iwl_priv *priv,
  2506. struct iwl4965_tx_queue *txq, u16 byte_cnt)
  2507. {
  2508. int len;
  2509. int txq_id = txq->q.id;
  2510. struct iwl4965_shared *shared_data = priv->hw_setting.shared_virt;
  2511. if (txq->need_update == 0)
  2512. return 0;
  2513. len = byte_cnt + IWL_TX_CRC_SIZE + IWL_TX_DELIMITER_SIZE;
  2514. /* Set up byte count within first 256 entries */
  2515. IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
  2516. tfd_offset[txq->q.write_ptr], byte_cnt, len);
  2517. /* If within first 64 entries, duplicate at end */
  2518. if (txq->q.write_ptr < IWL4965_MAX_WIN_SIZE)
  2519. IWL_SET_BITS16(shared_data->queues_byte_cnt_tbls[txq_id].
  2520. tfd_offset[IWL4965_QUEUE_SIZE + txq->q.write_ptr],
  2521. byte_cnt, len);
  2522. return 0;
  2523. }
  2524. /**
  2525. * iwl4965_set_rxon_chain - Set up Rx chain usage in "staging" RXON image
  2526. *
  2527. * Selects how many and which Rx receivers/antennas/chains to use.
  2528. * This should not be used for scan command ... it puts data in wrong place.
  2529. */
  2530. void iwl4965_set_rxon_chain(struct iwl_priv *priv)
  2531. {
  2532. u8 is_single = is_single_stream(priv);
  2533. u8 idle_state, rx_state;
  2534. priv->staging_rxon.rx_chain = 0;
  2535. rx_state = idle_state = 3;
  2536. /* Tell uCode which antennas are actually connected.
  2537. * Before first association, we assume all antennas are connected.
  2538. * Just after first association, iwl4965_noise_calibration()
  2539. * checks which antennas actually *are* connected. */
  2540. priv->staging_rxon.rx_chain |=
  2541. cpu_to_le16(priv->valid_antenna << RXON_RX_CHAIN_VALID_POS);
  2542. /* How many receivers should we use? */
  2543. iwl4965_get_rx_chain_counter(priv, &idle_state, &rx_state);
  2544. priv->staging_rxon.rx_chain |=
  2545. cpu_to_le16(rx_state << RXON_RX_CHAIN_MIMO_CNT_POS);
  2546. priv->staging_rxon.rx_chain |=
  2547. cpu_to_le16(idle_state << RXON_RX_CHAIN_CNT_POS);
  2548. if (!is_single && (rx_state >= 2) &&
  2549. !test_bit(STATUS_POWER_PMI, &priv->status))
  2550. priv->staging_rxon.rx_chain |= RXON_RX_CHAIN_MIMO_FORCE_MSK;
  2551. else
  2552. priv->staging_rxon.rx_chain &= ~RXON_RX_CHAIN_MIMO_FORCE_MSK;
  2553. IWL_DEBUG_ASSOC("rx chain %X\n", priv->staging_rxon.rx_chain);
  2554. }
  2555. /**
  2556. * sign_extend - Sign extend a value using specified bit as sign-bit
  2557. *
  2558. * Example: sign_extend(9, 3) would return -7 as bit3 of 1001b is 1
  2559. * and bit0..2 is 001b which when sign extended to 1111111111111001b is -7.
  2560. *
  2561. * @param oper value to sign extend
  2562. * @param index 0 based bit index (0<=index<32) to sign bit
  2563. */
  2564. static s32 sign_extend(u32 oper, int index)
  2565. {
  2566. u8 shift = 31 - index;
  2567. return (s32)(oper << shift) >> shift;
  2568. }
  2569. /**
  2570. * iwl4965_get_temperature - return the calibrated temperature (in Kelvin)
  2571. * @statistics: Provides the temperature reading from the uCode
  2572. *
  2573. * A return of <0 indicates bogus data in the statistics
  2574. */
  2575. int iwl4965_get_temperature(const struct iwl_priv *priv)
  2576. {
  2577. s32 temperature;
  2578. s32 vt;
  2579. s32 R1, R2, R3;
  2580. u32 R4;
  2581. if (test_bit(STATUS_TEMPERATURE, &priv->status) &&
  2582. (priv->statistics.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)) {
  2583. IWL_DEBUG_TEMP("Running FAT temperature calibration\n");
  2584. R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[1]);
  2585. R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[1]);
  2586. R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[1]);
  2587. R4 = le32_to_cpu(priv->card_alive_init.therm_r4[1]);
  2588. } else {
  2589. IWL_DEBUG_TEMP("Running temperature calibration\n");
  2590. R1 = (s32)le32_to_cpu(priv->card_alive_init.therm_r1[0]);
  2591. R2 = (s32)le32_to_cpu(priv->card_alive_init.therm_r2[0]);
  2592. R3 = (s32)le32_to_cpu(priv->card_alive_init.therm_r3[0]);
  2593. R4 = le32_to_cpu(priv->card_alive_init.therm_r4[0]);
  2594. }
  2595. /*
  2596. * Temperature is only 23 bits, so sign extend out to 32.
  2597. *
  2598. * NOTE If we haven't received a statistics notification yet
  2599. * with an updated temperature, use R4 provided to us in the
  2600. * "initialize" ALIVE response.
  2601. */
  2602. if (!test_bit(STATUS_TEMPERATURE, &priv->status))
  2603. vt = sign_extend(R4, 23);
  2604. else
  2605. vt = sign_extend(
  2606. le32_to_cpu(priv->statistics.general.temperature), 23);
  2607. IWL_DEBUG_TEMP("Calib values R[1-3]: %d %d %d R4: %d\n",
  2608. R1, R2, R3, vt);
  2609. if (R3 == R1) {
  2610. IWL_ERROR("Calibration conflict R1 == R3\n");
  2611. return -1;
  2612. }
  2613. /* Calculate temperature in degrees Kelvin, adjust by 97%.
  2614. * Add offset to center the adjustment around 0 degrees Centigrade. */
  2615. temperature = TEMPERATURE_CALIB_A_VAL * (vt - R2);
  2616. temperature /= (R3 - R1);
  2617. temperature = (temperature * 97) / 100 +
  2618. TEMPERATURE_CALIB_KELVIN_OFFSET;
  2619. IWL_DEBUG_TEMP("Calibrated temperature: %dK, %dC\n", temperature,
  2620. KELVIN_TO_CELSIUS(temperature));
  2621. return temperature;
  2622. }
  2623. /* Adjust Txpower only if temperature variance is greater than threshold. */
  2624. #define IWL_TEMPERATURE_THRESHOLD 3
  2625. /**
  2626. * iwl4965_is_temp_calib_needed - determines if new calibration is needed
  2627. *
  2628. * If the temperature changed has changed sufficiently, then a recalibration
  2629. * is needed.
  2630. *
  2631. * Assumes caller will replace priv->last_temperature once calibration
  2632. * executed.
  2633. */
  2634. static int iwl4965_is_temp_calib_needed(struct iwl_priv *priv)
  2635. {
  2636. int temp_diff;
  2637. if (!test_bit(STATUS_STATISTICS, &priv->status)) {
  2638. IWL_DEBUG_TEMP("Temperature not updated -- no statistics.\n");
  2639. return 0;
  2640. }
  2641. temp_diff = priv->temperature - priv->last_temperature;
  2642. /* get absolute value */
  2643. if (temp_diff < 0) {
  2644. IWL_DEBUG_POWER("Getting cooler, delta %d, \n", temp_diff);
  2645. temp_diff = -temp_diff;
  2646. } else if (temp_diff == 0)
  2647. IWL_DEBUG_POWER("Same temp, \n");
  2648. else
  2649. IWL_DEBUG_POWER("Getting warmer, delta %d, \n", temp_diff);
  2650. if (temp_diff < IWL_TEMPERATURE_THRESHOLD) {
  2651. IWL_DEBUG_POWER("Thermal txpower calib not needed\n");
  2652. return 0;
  2653. }
  2654. IWL_DEBUG_POWER("Thermal txpower calib needed\n");
  2655. return 1;
  2656. }
  2657. /* Calculate noise level, based on measurements during network silence just
  2658. * before arriving beacon. This measurement can be done only if we know
  2659. * exactly when to expect beacons, therefore only when we're associated. */
  2660. static void iwl4965_rx_calc_noise(struct iwl_priv *priv)
  2661. {
  2662. struct statistics_rx_non_phy *rx_info
  2663. = &(priv->statistics.rx.general);
  2664. int num_active_rx = 0;
  2665. int total_silence = 0;
  2666. int bcn_silence_a =
  2667. le32_to_cpu(rx_info->beacon_silence_rssi_a) & IN_BAND_FILTER;
  2668. int bcn_silence_b =
  2669. le32_to_cpu(rx_info->beacon_silence_rssi_b) & IN_BAND_FILTER;
  2670. int bcn_silence_c =
  2671. le32_to_cpu(rx_info->beacon_silence_rssi_c) & IN_BAND_FILTER;
  2672. if (bcn_silence_a) {
  2673. total_silence += bcn_silence_a;
  2674. num_active_rx++;
  2675. }
  2676. if (bcn_silence_b) {
  2677. total_silence += bcn_silence_b;
  2678. num_active_rx++;
  2679. }
  2680. if (bcn_silence_c) {
  2681. total_silence += bcn_silence_c;
  2682. num_active_rx++;
  2683. }
  2684. /* Average among active antennas */
  2685. if (num_active_rx)
  2686. priv->last_rx_noise = (total_silence / num_active_rx) - 107;
  2687. else
  2688. priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
  2689. IWL_DEBUG_CALIB("inband silence a %u, b %u, c %u, dBm %d\n",
  2690. bcn_silence_a, bcn_silence_b, bcn_silence_c,
  2691. priv->last_rx_noise);
  2692. }
  2693. void iwl4965_hw_rx_statistics(struct iwl_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
  2694. {
  2695. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  2696. int change;
  2697. s32 temp;
  2698. IWL_DEBUG_RX("Statistics notification received (%d vs %d).\n",
  2699. (int)sizeof(priv->statistics), pkt->len);
  2700. change = ((priv->statistics.general.temperature !=
  2701. pkt->u.stats.general.temperature) ||
  2702. ((priv->statistics.flag &
  2703. STATISTICS_REPLY_FLG_FAT_MODE_MSK) !=
  2704. (pkt->u.stats.flag & STATISTICS_REPLY_FLG_FAT_MODE_MSK)));
  2705. memcpy(&priv->statistics, &pkt->u.stats, sizeof(priv->statistics));
  2706. set_bit(STATUS_STATISTICS, &priv->status);
  2707. /* Reschedule the statistics timer to occur in
  2708. * REG_RECALIB_PERIOD seconds to ensure we get a
  2709. * thermal update even if the uCode doesn't give
  2710. * us one */
  2711. mod_timer(&priv->statistics_periodic, jiffies +
  2712. msecs_to_jiffies(REG_RECALIB_PERIOD * 1000));
  2713. if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
  2714. (pkt->hdr.cmd == STATISTICS_NOTIFICATION)) {
  2715. iwl4965_rx_calc_noise(priv);
  2716. #ifdef CONFIG_IWL4965_SENSITIVITY
  2717. queue_work(priv->workqueue, &priv->sensitivity_work);
  2718. #endif
  2719. }
  2720. /* If the hardware hasn't reported a change in
  2721. * temperature then don't bother computing a
  2722. * calibrated temperature value */
  2723. if (!change)
  2724. return;
  2725. temp = iwl4965_get_temperature(priv);
  2726. if (temp < 0)
  2727. return;
  2728. if (priv->temperature != temp) {
  2729. if (priv->temperature)
  2730. IWL_DEBUG_TEMP("Temperature changed "
  2731. "from %dC to %dC\n",
  2732. KELVIN_TO_CELSIUS(priv->temperature),
  2733. KELVIN_TO_CELSIUS(temp));
  2734. else
  2735. IWL_DEBUG_TEMP("Temperature "
  2736. "initialized to %dC\n",
  2737. KELVIN_TO_CELSIUS(temp));
  2738. }
  2739. priv->temperature = temp;
  2740. set_bit(STATUS_TEMPERATURE, &priv->status);
  2741. if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)) &&
  2742. iwl4965_is_temp_calib_needed(priv))
  2743. queue_work(priv->workqueue, &priv->txpower_work);
  2744. }
  2745. static void iwl4965_add_radiotap(struct iwl_priv *priv,
  2746. struct sk_buff *skb,
  2747. struct iwl4965_rx_phy_res *rx_start,
  2748. struct ieee80211_rx_status *stats,
  2749. u32 ampdu_status)
  2750. {
  2751. s8 signal = stats->ssi;
  2752. s8 noise = 0;
  2753. int rate = stats->rate_idx;
  2754. u64 tsf = stats->mactime;
  2755. __le16 phy_flags_hw = rx_start->phy_flags;
  2756. struct iwl4965_rt_rx_hdr {
  2757. struct ieee80211_radiotap_header rt_hdr;
  2758. __le64 rt_tsf; /* TSF */
  2759. u8 rt_flags; /* radiotap packet flags */
  2760. u8 rt_rate; /* rate in 500kb/s */
  2761. __le16 rt_channelMHz; /* channel in MHz */
  2762. __le16 rt_chbitmask; /* channel bitfield */
  2763. s8 rt_dbmsignal; /* signal in dBm, kluged to signed */
  2764. s8 rt_dbmnoise;
  2765. u8 rt_antenna; /* antenna number */
  2766. } __attribute__ ((packed)) *iwl4965_rt;
  2767. /* TODO: We won't have enough headroom for HT frames. Fix it later. */
  2768. if (skb_headroom(skb) < sizeof(*iwl4965_rt)) {
  2769. if (net_ratelimit())
  2770. printk(KERN_ERR "not enough headroom [%d] for "
  2771. "radiotap head [%zd]\n",
  2772. skb_headroom(skb), sizeof(*iwl4965_rt));
  2773. return;
  2774. }
  2775. /* put radiotap header in front of 802.11 header and data */
  2776. iwl4965_rt = (void *)skb_push(skb, sizeof(*iwl4965_rt));
  2777. /* initialise radiotap header */
  2778. iwl4965_rt->rt_hdr.it_version = PKTHDR_RADIOTAP_VERSION;
  2779. iwl4965_rt->rt_hdr.it_pad = 0;
  2780. /* total header + data */
  2781. put_unaligned(cpu_to_le16(sizeof(*iwl4965_rt)),
  2782. &iwl4965_rt->rt_hdr.it_len);
  2783. /* Indicate all the fields we add to the radiotap header */
  2784. put_unaligned(cpu_to_le32((1 << IEEE80211_RADIOTAP_TSFT) |
  2785. (1 << IEEE80211_RADIOTAP_FLAGS) |
  2786. (1 << IEEE80211_RADIOTAP_RATE) |
  2787. (1 << IEEE80211_RADIOTAP_CHANNEL) |
  2788. (1 << IEEE80211_RADIOTAP_DBM_ANTSIGNAL) |
  2789. (1 << IEEE80211_RADIOTAP_DBM_ANTNOISE) |
  2790. (1 << IEEE80211_RADIOTAP_ANTENNA)),
  2791. &iwl4965_rt->rt_hdr.it_present);
  2792. /* Zero the flags, we'll add to them as we go */
  2793. iwl4965_rt->rt_flags = 0;
  2794. put_unaligned(cpu_to_le64(tsf), &iwl4965_rt->rt_tsf);
  2795. iwl4965_rt->rt_dbmsignal = signal;
  2796. iwl4965_rt->rt_dbmnoise = noise;
  2797. /* Convert the channel frequency and set the flags */
  2798. put_unaligned(cpu_to_le16(stats->freq), &iwl4965_rt->rt_channelMHz);
  2799. if (!(phy_flags_hw & RX_RES_PHY_FLAGS_BAND_24_MSK))
  2800. put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
  2801. IEEE80211_CHAN_5GHZ),
  2802. &iwl4965_rt->rt_chbitmask);
  2803. else if (phy_flags_hw & RX_RES_PHY_FLAGS_MOD_CCK_MSK)
  2804. put_unaligned(cpu_to_le16(IEEE80211_CHAN_CCK |
  2805. IEEE80211_CHAN_2GHZ),
  2806. &iwl4965_rt->rt_chbitmask);
  2807. else /* 802.11g */
  2808. put_unaligned(cpu_to_le16(IEEE80211_CHAN_OFDM |
  2809. IEEE80211_CHAN_2GHZ),
  2810. &iwl4965_rt->rt_chbitmask);
  2811. if (rate == -1)
  2812. iwl4965_rt->rt_rate = 0;
  2813. else
  2814. iwl4965_rt->rt_rate = iwl4965_rates[rate].ieee;
  2815. /*
  2816. * "antenna number"
  2817. *
  2818. * It seems that the antenna field in the phy flags value
  2819. * is actually a bitfield. This is undefined by radiotap,
  2820. * it wants an actual antenna number but I always get "7"
  2821. * for most legacy frames I receive indicating that the
  2822. * same frame was received on all three RX chains.
  2823. *
  2824. * I think this field should be removed in favour of a
  2825. * new 802.11n radiotap field "RX chains" that is defined
  2826. * as a bitmask.
  2827. */
  2828. iwl4965_rt->rt_antenna =
  2829. le16_to_cpu(phy_flags_hw & RX_RES_PHY_FLAGS_ANTENNA_MSK) >> 4;
  2830. /* set the preamble flag if appropriate */
  2831. if (phy_flags_hw & RX_RES_PHY_FLAGS_SHORT_PREAMBLE_MSK)
  2832. iwl4965_rt->rt_flags |= IEEE80211_RADIOTAP_F_SHORTPRE;
  2833. stats->flag |= RX_FLAG_RADIOTAP;
  2834. }
  2835. static void iwl_update_rx_stats(struct iwl_priv *priv, u16 fc, u16 len)
  2836. {
  2837. /* 0 - mgmt, 1 - cnt, 2 - data */
  2838. int idx = (fc & IEEE80211_FCTL_FTYPE) >> 2;
  2839. priv->rx_stats[idx].cnt++;
  2840. priv->rx_stats[idx].bytes += len;
  2841. }
  2842. static u32 iwl4965_translate_rx_status(u32 decrypt_in)
  2843. {
  2844. u32 decrypt_out = 0;
  2845. if ((decrypt_in & RX_RES_STATUS_STATION_FOUND) ==
  2846. RX_RES_STATUS_STATION_FOUND)
  2847. decrypt_out |= (RX_RES_STATUS_STATION_FOUND |
  2848. RX_RES_STATUS_NO_STATION_INFO_MISMATCH);
  2849. decrypt_out |= (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK);
  2850. /* packet was not encrypted */
  2851. if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
  2852. RX_RES_STATUS_SEC_TYPE_NONE)
  2853. return decrypt_out;
  2854. /* packet was encrypted with unknown alg */
  2855. if ((decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) ==
  2856. RX_RES_STATUS_SEC_TYPE_ERR)
  2857. return decrypt_out;
  2858. /* decryption was not done in HW */
  2859. if ((decrypt_in & RX_MPDU_RES_STATUS_DEC_DONE_MSK) !=
  2860. RX_MPDU_RES_STATUS_DEC_DONE_MSK)
  2861. return decrypt_out;
  2862. switch (decrypt_in & RX_RES_STATUS_SEC_TYPE_MSK) {
  2863. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2864. /* alg is CCM: check MIC only */
  2865. if (!(decrypt_in & RX_MPDU_RES_STATUS_MIC_OK))
  2866. /* Bad MIC */
  2867. decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
  2868. else
  2869. decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
  2870. break;
  2871. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2872. if (!(decrypt_in & RX_MPDU_RES_STATUS_TTAK_OK)) {
  2873. /* Bad TTAK */
  2874. decrypt_out |= RX_RES_STATUS_BAD_KEY_TTAK;
  2875. break;
  2876. }
  2877. /* fall through if TTAK OK */
  2878. default:
  2879. if (!(decrypt_in & RX_MPDU_RES_STATUS_ICV_OK))
  2880. decrypt_out |= RX_RES_STATUS_BAD_ICV_MIC;
  2881. else
  2882. decrypt_out |= RX_RES_STATUS_DECRYPT_OK;
  2883. break;
  2884. };
  2885. IWL_DEBUG_RX("decrypt_in:0x%x decrypt_out = 0x%x\n",
  2886. decrypt_in, decrypt_out);
  2887. return decrypt_out;
  2888. }
  2889. static void iwl4965_handle_data_packet(struct iwl_priv *priv, int is_data,
  2890. int include_phy,
  2891. struct iwl4965_rx_mem_buffer *rxb,
  2892. struct ieee80211_rx_status *stats)
  2893. {
  2894. struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  2895. struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
  2896. (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) : NULL;
  2897. struct ieee80211_hdr *hdr;
  2898. u16 len;
  2899. __le32 *rx_end;
  2900. unsigned int skblen;
  2901. u32 ampdu_status;
  2902. u32 ampdu_status_legacy;
  2903. if (!include_phy && priv->last_phy_res[0])
  2904. rx_start = (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
  2905. if (!rx_start) {
  2906. IWL_ERROR("MPDU frame without a PHY data\n");
  2907. return;
  2908. }
  2909. if (include_phy) {
  2910. hdr = (struct ieee80211_hdr *)((u8 *) & rx_start[1] +
  2911. rx_start->cfg_phy_cnt);
  2912. len = le16_to_cpu(rx_start->byte_count);
  2913. rx_end = (__le32 *) ((u8 *) & pkt->u.raw[0] +
  2914. sizeof(struct iwl4965_rx_phy_res) +
  2915. rx_start->cfg_phy_cnt + len);
  2916. } else {
  2917. struct iwl4965_rx_mpdu_res_start *amsdu =
  2918. (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
  2919. hdr = (struct ieee80211_hdr *)(pkt->u.raw +
  2920. sizeof(struct iwl4965_rx_mpdu_res_start));
  2921. len = le16_to_cpu(amsdu->byte_count);
  2922. rx_start->byte_count = amsdu->byte_count;
  2923. rx_end = (__le32 *) (((u8 *) hdr) + len);
  2924. }
  2925. if (len > priv->hw_setting.max_pkt_size || len < 16) {
  2926. IWL_WARNING("byte count out of range [16,4K] : %d\n", len);
  2927. return;
  2928. }
  2929. ampdu_status = le32_to_cpu(*rx_end);
  2930. skblen = ((u8 *) rx_end - (u8 *) & pkt->u.raw[0]) + sizeof(u32);
  2931. if (!include_phy) {
  2932. /* New status scheme, need to translate */
  2933. ampdu_status_legacy = ampdu_status;
  2934. ampdu_status = iwl4965_translate_rx_status(ampdu_status);
  2935. }
  2936. /* start from MAC */
  2937. skb_reserve(rxb->skb, (void *)hdr - (void *)pkt);
  2938. skb_put(rxb->skb, len); /* end where data ends */
  2939. /* We only process data packets if the interface is open */
  2940. if (unlikely(!priv->is_open)) {
  2941. IWL_DEBUG_DROP_LIMIT
  2942. ("Dropping packet while interface is not open.\n");
  2943. return;
  2944. }
  2945. stats->flag = 0;
  2946. hdr = (struct ieee80211_hdr *)rxb->skb->data;
  2947. if (iwl4965_mod_params.hw_crypto)
  2948. iwl4965_set_decrypted_flag(priv, rxb->skb, ampdu_status, stats);
  2949. if (priv->add_radiotap)
  2950. iwl4965_add_radiotap(priv, rxb->skb, rx_start, stats, ampdu_status);
  2951. iwl_update_rx_stats(priv, le16_to_cpu(hdr->frame_control), len);
  2952. ieee80211_rx_irqsafe(priv->hw, rxb->skb, stats);
  2953. priv->alloc_rxb_skb--;
  2954. rxb->skb = NULL;
  2955. #ifdef LED
  2956. priv->led_packets += len;
  2957. iwl4965_setup_activity_timer(priv);
  2958. #endif
  2959. }
  2960. /* Calc max signal level (dBm) among 3 possible receivers */
  2961. static int iwl4965_calc_rssi(struct iwl4965_rx_phy_res *rx_resp)
  2962. {
  2963. /* data from PHY/DSP regarding signal strength, etc.,
  2964. * contents are always there, not configurable by host. */
  2965. struct iwl4965_rx_non_cfg_phy *ncphy =
  2966. (struct iwl4965_rx_non_cfg_phy *)rx_resp->non_cfg_phy;
  2967. u32 agc = (le16_to_cpu(ncphy->agc_info) & IWL_AGC_DB_MASK)
  2968. >> IWL_AGC_DB_POS;
  2969. u32 valid_antennae =
  2970. (le16_to_cpu(rx_resp->phy_flags) & RX_PHY_FLAGS_ANTENNAE_MASK)
  2971. >> RX_PHY_FLAGS_ANTENNAE_OFFSET;
  2972. u8 max_rssi = 0;
  2973. u32 i;
  2974. /* Find max rssi among 3 possible receivers.
  2975. * These values are measured by the digital signal processor (DSP).
  2976. * They should stay fairly constant even as the signal strength varies,
  2977. * if the radio's automatic gain control (AGC) is working right.
  2978. * AGC value (see below) will provide the "interesting" info. */
  2979. for (i = 0; i < 3; i++)
  2980. if (valid_antennae & (1 << i))
  2981. max_rssi = max(ncphy->rssi_info[i << 1], max_rssi);
  2982. IWL_DEBUG_STATS("Rssi In A %d B %d C %d Max %d AGC dB %d\n",
  2983. ncphy->rssi_info[0], ncphy->rssi_info[2], ncphy->rssi_info[4],
  2984. max_rssi, agc);
  2985. /* dBm = max_rssi dB - agc dB - constant.
  2986. * Higher AGC (higher radio gain) means lower signal. */
  2987. return (max_rssi - agc - IWL_RSSI_OFFSET);
  2988. }
  2989. #ifdef CONFIG_IWL4965_HT
  2990. /* Parsed Information Elements */
  2991. struct ieee802_11_elems {
  2992. u8 *ds_params;
  2993. u8 ds_params_len;
  2994. u8 *tim;
  2995. u8 tim_len;
  2996. u8 *ibss_params;
  2997. u8 ibss_params_len;
  2998. u8 *erp_info;
  2999. u8 erp_info_len;
  3000. u8 *ht_cap_param;
  3001. u8 ht_cap_param_len;
  3002. u8 *ht_extra_param;
  3003. u8 ht_extra_param_len;
  3004. };
  3005. static int parse_elems(u8 *start, size_t len, struct ieee802_11_elems *elems)
  3006. {
  3007. size_t left = len;
  3008. u8 *pos = start;
  3009. int unknown = 0;
  3010. memset(elems, 0, sizeof(*elems));
  3011. while (left >= 2) {
  3012. u8 id, elen;
  3013. id = *pos++;
  3014. elen = *pos++;
  3015. left -= 2;
  3016. if (elen > left)
  3017. return -1;
  3018. switch (id) {
  3019. case WLAN_EID_DS_PARAMS:
  3020. elems->ds_params = pos;
  3021. elems->ds_params_len = elen;
  3022. break;
  3023. case WLAN_EID_TIM:
  3024. elems->tim = pos;
  3025. elems->tim_len = elen;
  3026. break;
  3027. case WLAN_EID_IBSS_PARAMS:
  3028. elems->ibss_params = pos;
  3029. elems->ibss_params_len = elen;
  3030. break;
  3031. case WLAN_EID_ERP_INFO:
  3032. elems->erp_info = pos;
  3033. elems->erp_info_len = elen;
  3034. break;
  3035. case WLAN_EID_HT_CAPABILITY:
  3036. elems->ht_cap_param = pos;
  3037. elems->ht_cap_param_len = elen;
  3038. break;
  3039. case WLAN_EID_HT_EXTRA_INFO:
  3040. elems->ht_extra_param = pos;
  3041. elems->ht_extra_param_len = elen;
  3042. break;
  3043. default:
  3044. unknown++;
  3045. break;
  3046. }
  3047. left -= elen;
  3048. pos += elen;
  3049. }
  3050. return 0;
  3051. }
  3052. void iwl4965_init_ht_hw_capab(struct ieee80211_ht_info *ht_info,
  3053. enum ieee80211_band band)
  3054. {
  3055. ht_info->cap = 0;
  3056. memset(ht_info->supp_mcs_set, 0, 16);
  3057. ht_info->ht_supported = 1;
  3058. if (band == IEEE80211_BAND_5GHZ) {
  3059. ht_info->cap |= (u16)IEEE80211_HT_CAP_SUP_WIDTH;
  3060. ht_info->cap |= (u16)IEEE80211_HT_CAP_SGI_40;
  3061. ht_info->supp_mcs_set[4] = 0x01;
  3062. }
  3063. ht_info->cap |= (u16)IEEE80211_HT_CAP_GRN_FLD;
  3064. ht_info->cap |= (u16)IEEE80211_HT_CAP_SGI_20;
  3065. ht_info->cap |= (u16)(IEEE80211_HT_CAP_MIMO_PS &
  3066. (IWL_MIMO_PS_NONE << 2));
  3067. if (iwl4965_mod_params.amsdu_size_8K) {
  3068. printk(KERN_DEBUG "iwl4965 in A-MSDU 8K support mode\n");
  3069. ht_info->cap |= (u16)IEEE80211_HT_CAP_MAX_AMSDU;
  3070. }
  3071. ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  3072. ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
  3073. ht_info->supp_mcs_set[0] = 0xFF;
  3074. ht_info->supp_mcs_set[1] = 0xFF;
  3075. }
  3076. #endif /* CONFIG_IWL4965_HT */
  3077. static void iwl4965_sta_modify_ps_wake(struct iwl_priv *priv, int sta_id)
  3078. {
  3079. unsigned long flags;
  3080. spin_lock_irqsave(&priv->sta_lock, flags);
  3081. priv->stations[sta_id].sta.station_flags &= ~STA_FLG_PWR_SAVE_MSK;
  3082. priv->stations[sta_id].sta.station_flags_msk = STA_FLG_PWR_SAVE_MSK;
  3083. priv->stations[sta_id].sta.sta.modify_mask = 0;
  3084. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  3085. spin_unlock_irqrestore(&priv->sta_lock, flags);
  3086. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  3087. }
  3088. static void iwl4965_update_ps_mode(struct iwl_priv *priv, u16 ps_bit, u8 *addr)
  3089. {
  3090. /* FIXME: need locking over ps_status ??? */
  3091. u8 sta_id = iwl4965_hw_find_station(priv, addr);
  3092. if (sta_id != IWL_INVALID_STATION) {
  3093. u8 sta_awake = priv->stations[sta_id].
  3094. ps_status == STA_PS_STATUS_WAKE;
  3095. if (sta_awake && ps_bit)
  3096. priv->stations[sta_id].ps_status = STA_PS_STATUS_SLEEP;
  3097. else if (!sta_awake && !ps_bit) {
  3098. iwl4965_sta_modify_ps_wake(priv, sta_id);
  3099. priv->stations[sta_id].ps_status = STA_PS_STATUS_WAKE;
  3100. }
  3101. }
  3102. }
  3103. #ifdef CONFIG_IWLWIFI_DEBUG
  3104. /**
  3105. * iwl4965_dbg_report_frame - dump frame to syslog during debug sessions
  3106. *
  3107. * You may hack this function to show different aspects of received frames,
  3108. * including selective frame dumps.
  3109. * group100 parameter selects whether to show 1 out of 100 good frames.
  3110. *
  3111. * TODO: This was originally written for 3945, need to audit for
  3112. * proper operation with 4965.
  3113. */
  3114. static void iwl4965_dbg_report_frame(struct iwl_priv *priv,
  3115. struct iwl4965_rx_packet *pkt,
  3116. struct ieee80211_hdr *header, int group100)
  3117. {
  3118. u32 to_us;
  3119. u32 print_summary = 0;
  3120. u32 print_dump = 0; /* set to 1 to dump all frames' contents */
  3121. u32 hundred = 0;
  3122. u32 dataframe = 0;
  3123. u16 fc;
  3124. u16 seq_ctl;
  3125. u16 channel;
  3126. u16 phy_flags;
  3127. int rate_sym;
  3128. u16 length;
  3129. u16 status;
  3130. u16 bcn_tmr;
  3131. u32 tsf_low;
  3132. u64 tsf;
  3133. u8 rssi;
  3134. u8 agc;
  3135. u16 sig_avg;
  3136. u16 noise_diff;
  3137. struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
  3138. struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
  3139. struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
  3140. u8 *data = IWL_RX_DATA(pkt);
  3141. if (likely(!(iwl_debug_level & IWL_DL_RX)))
  3142. return;
  3143. /* MAC header */
  3144. fc = le16_to_cpu(header->frame_control);
  3145. seq_ctl = le16_to_cpu(header->seq_ctrl);
  3146. /* metadata */
  3147. channel = le16_to_cpu(rx_hdr->channel);
  3148. phy_flags = le16_to_cpu(rx_hdr->phy_flags);
  3149. rate_sym = rx_hdr->rate;
  3150. length = le16_to_cpu(rx_hdr->len);
  3151. /* end-of-frame status and timestamp */
  3152. status = le32_to_cpu(rx_end->status);
  3153. bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
  3154. tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
  3155. tsf = le64_to_cpu(rx_end->timestamp);
  3156. /* signal statistics */
  3157. rssi = rx_stats->rssi;
  3158. agc = rx_stats->agc;
  3159. sig_avg = le16_to_cpu(rx_stats->sig_avg);
  3160. noise_diff = le16_to_cpu(rx_stats->noise_diff);
  3161. to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
  3162. /* if data frame is to us and all is good,
  3163. * (optionally) print summary for only 1 out of every 100 */
  3164. if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
  3165. (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
  3166. dataframe = 1;
  3167. if (!group100)
  3168. print_summary = 1; /* print each frame */
  3169. else if (priv->framecnt_to_us < 100) {
  3170. priv->framecnt_to_us++;
  3171. print_summary = 0;
  3172. } else {
  3173. priv->framecnt_to_us = 0;
  3174. print_summary = 1;
  3175. hundred = 1;
  3176. }
  3177. } else {
  3178. /* print summary for all other frames */
  3179. print_summary = 1;
  3180. }
  3181. if (print_summary) {
  3182. char *title;
  3183. int rate_idx;
  3184. u32 bitrate;
  3185. if (hundred)
  3186. title = "100Frames";
  3187. else if (fc & IEEE80211_FCTL_RETRY)
  3188. title = "Retry";
  3189. else if (ieee80211_is_assoc_response(fc))
  3190. title = "AscRsp";
  3191. else if (ieee80211_is_reassoc_response(fc))
  3192. title = "RasRsp";
  3193. else if (ieee80211_is_probe_response(fc)) {
  3194. title = "PrbRsp";
  3195. print_dump = 1; /* dump frame contents */
  3196. } else if (ieee80211_is_beacon(fc)) {
  3197. title = "Beacon";
  3198. print_dump = 1; /* dump frame contents */
  3199. } else if (ieee80211_is_atim(fc))
  3200. title = "ATIM";
  3201. else if (ieee80211_is_auth(fc))
  3202. title = "Auth";
  3203. else if (ieee80211_is_deauth(fc))
  3204. title = "DeAuth";
  3205. else if (ieee80211_is_disassoc(fc))
  3206. title = "DisAssoc";
  3207. else
  3208. title = "Frame";
  3209. rate_idx = iwl4965_hwrate_to_plcp_idx(rate_sym);
  3210. if (unlikely(rate_idx == -1))
  3211. bitrate = 0;
  3212. else
  3213. bitrate = iwl4965_rates[rate_idx].ieee / 2;
  3214. /* print frame summary.
  3215. * MAC addresses show just the last byte (for brevity),
  3216. * but you can hack it to show more, if you'd like to. */
  3217. if (dataframe)
  3218. IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
  3219. "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
  3220. title, fc, header->addr1[5],
  3221. length, rssi, channel, bitrate);
  3222. else {
  3223. /* src/dst addresses assume managed mode */
  3224. IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
  3225. "src=0x%02x, rssi=%u, tim=%lu usec, "
  3226. "phy=0x%02x, chnl=%d\n",
  3227. title, fc, header->addr1[5],
  3228. header->addr3[5], rssi,
  3229. tsf_low - priv->scan_start_tsf,
  3230. phy_flags, channel);
  3231. }
  3232. }
  3233. if (print_dump)
  3234. iwl_print_hex_dump(IWL_DL_RX, data, length);
  3235. }
  3236. #else
  3237. static inline void iwl4965_dbg_report_frame(struct iwl_priv *priv,
  3238. struct iwl4965_rx_packet *pkt,
  3239. struct ieee80211_hdr *header,
  3240. int group100)
  3241. {
  3242. }
  3243. #endif
  3244. #define IWL_DELAY_NEXT_SCAN_AFTER_ASSOC (HZ*6)
  3245. /* Called for REPLY_RX (legacy ABG frames), or
  3246. * REPLY_RX_MPDU_CMD (HT high-throughput N frames). */
  3247. static void iwl4965_rx_reply_rx(struct iwl_priv *priv,
  3248. struct iwl4965_rx_mem_buffer *rxb)
  3249. {
  3250. struct ieee80211_hdr *header;
  3251. struct ieee80211_rx_status rx_status;
  3252. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3253. /* Use phy data (Rx signal strength, etc.) contained within
  3254. * this rx packet for legacy frames,
  3255. * or phy data cached from REPLY_RX_PHY_CMD for HT frames. */
  3256. int include_phy = (pkt->hdr.cmd == REPLY_RX);
  3257. struct iwl4965_rx_phy_res *rx_start = (include_phy) ?
  3258. (struct iwl4965_rx_phy_res *)&(pkt->u.raw[0]) :
  3259. (struct iwl4965_rx_phy_res *)&priv->last_phy_res[1];
  3260. __le32 *rx_end;
  3261. unsigned int len = 0;
  3262. u16 fc;
  3263. u8 network_packet;
  3264. rx_status.mactime = le64_to_cpu(rx_start->timestamp);
  3265. rx_status.freq = ieee80211chan2mhz(le16_to_cpu(rx_start->channel));
  3266. rx_status.band = (rx_start->phy_flags & RX_RES_PHY_FLAGS_BAND_24_MSK) ?
  3267. IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  3268. rx_status.rate_idx = iwl4965_hwrate_to_plcp_idx(
  3269. le32_to_cpu(rx_start->rate_n_flags));
  3270. if (rx_status.band == IEEE80211_BAND_5GHZ)
  3271. rx_status.rate_idx -= IWL_FIRST_OFDM_RATE;
  3272. rx_status.antenna = 0;
  3273. rx_status.flag = 0;
  3274. if ((unlikely(rx_start->cfg_phy_cnt > 20))) {
  3275. IWL_DEBUG_DROP
  3276. ("dsp size out of range [0,20]: "
  3277. "%d/n", rx_start->cfg_phy_cnt);
  3278. return;
  3279. }
  3280. if (!include_phy) {
  3281. if (priv->last_phy_res[0])
  3282. rx_start = (struct iwl4965_rx_phy_res *)
  3283. &priv->last_phy_res[1];
  3284. else
  3285. rx_start = NULL;
  3286. }
  3287. if (!rx_start) {
  3288. IWL_ERROR("MPDU frame without a PHY data\n");
  3289. return;
  3290. }
  3291. if (include_phy) {
  3292. header = (struct ieee80211_hdr *)((u8 *) & rx_start[1]
  3293. + rx_start->cfg_phy_cnt);
  3294. len = le16_to_cpu(rx_start->byte_count);
  3295. rx_end = (__le32 *)(pkt->u.raw + rx_start->cfg_phy_cnt +
  3296. sizeof(struct iwl4965_rx_phy_res) + len);
  3297. } else {
  3298. struct iwl4965_rx_mpdu_res_start *amsdu =
  3299. (struct iwl4965_rx_mpdu_res_start *)pkt->u.raw;
  3300. header = (void *)(pkt->u.raw +
  3301. sizeof(struct iwl4965_rx_mpdu_res_start));
  3302. len = le16_to_cpu(amsdu->byte_count);
  3303. rx_end = (__le32 *) (pkt->u.raw +
  3304. sizeof(struct iwl4965_rx_mpdu_res_start) + len);
  3305. }
  3306. if (!(*rx_end & RX_RES_STATUS_NO_CRC32_ERROR) ||
  3307. !(*rx_end & RX_RES_STATUS_NO_RXE_OVERFLOW)) {
  3308. IWL_DEBUG_RX("Bad CRC or FIFO: 0x%08X.\n",
  3309. le32_to_cpu(*rx_end));
  3310. return;
  3311. }
  3312. priv->ucode_beacon_time = le32_to_cpu(rx_start->beacon_time_stamp);
  3313. /* Find max signal strength (dBm) among 3 antenna/receiver chains */
  3314. rx_status.ssi = iwl4965_calc_rssi(rx_start);
  3315. /* Meaningful noise values are available only from beacon statistics,
  3316. * which are gathered only when associated, and indicate noise
  3317. * only for the associated network channel ...
  3318. * Ignore these noise values while scanning (other channels) */
  3319. if (iwl4965_is_associated(priv) &&
  3320. !test_bit(STATUS_SCANNING, &priv->status)) {
  3321. rx_status.noise = priv->last_rx_noise;
  3322. rx_status.signal = iwl4965_calc_sig_qual(rx_status.ssi,
  3323. rx_status.noise);
  3324. } else {
  3325. rx_status.noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
  3326. rx_status.signal = iwl4965_calc_sig_qual(rx_status.ssi, 0);
  3327. }
  3328. /* Reset beacon noise level if not associated. */
  3329. if (!iwl4965_is_associated(priv))
  3330. priv->last_rx_noise = IWL_NOISE_MEAS_NOT_AVAILABLE;
  3331. /* Set "1" to report good data frames in groups of 100 */
  3332. /* FIXME: need to optimze the call: */
  3333. iwl4965_dbg_report_frame(priv, pkt, header, 1);
  3334. IWL_DEBUG_STATS_LIMIT("Rssi %d, noise %d, qual %d, TSF %llu\n",
  3335. rx_status.ssi, rx_status.noise, rx_status.signal,
  3336. rx_status.mactime);
  3337. network_packet = iwl4965_is_network_packet(priv, header);
  3338. if (network_packet) {
  3339. priv->last_rx_rssi = rx_status.ssi;
  3340. priv->last_beacon_time = priv->ucode_beacon_time;
  3341. priv->last_tsf = le64_to_cpu(rx_start->timestamp);
  3342. }
  3343. fc = le16_to_cpu(header->frame_control);
  3344. switch (fc & IEEE80211_FCTL_FTYPE) {
  3345. case IEEE80211_FTYPE_MGMT:
  3346. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  3347. iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
  3348. header->addr2);
  3349. switch (fc & IEEE80211_FCTL_STYPE) {
  3350. case IEEE80211_STYPE_PROBE_RESP:
  3351. case IEEE80211_STYPE_BEACON:
  3352. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA &&
  3353. !compare_ether_addr(header->addr2, priv->bssid)) ||
  3354. (priv->iw_mode == IEEE80211_IF_TYPE_IBSS &&
  3355. !compare_ether_addr(header->addr3, priv->bssid))) {
  3356. struct ieee80211_mgmt *mgmt =
  3357. (struct ieee80211_mgmt *)header;
  3358. u64 timestamp =
  3359. le64_to_cpu(mgmt->u.beacon.timestamp);
  3360. priv->timestamp0 = timestamp & 0xFFFFFFFF;
  3361. priv->timestamp1 =
  3362. (timestamp >> 32) & 0xFFFFFFFF;
  3363. priv->beacon_int = le16_to_cpu(
  3364. mgmt->u.beacon.beacon_int);
  3365. if (priv->call_post_assoc_from_beacon &&
  3366. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  3367. priv->call_post_assoc_from_beacon = 0;
  3368. queue_work(priv->workqueue,
  3369. &priv->post_associate.work);
  3370. }
  3371. }
  3372. break;
  3373. case IEEE80211_STYPE_ACTION:
  3374. break;
  3375. /*
  3376. * TODO: Use the new callback function from
  3377. * mac80211 instead of sniffing these packets.
  3378. */
  3379. case IEEE80211_STYPE_ASSOC_RESP:
  3380. case IEEE80211_STYPE_REASSOC_RESP:
  3381. if (network_packet) {
  3382. #ifdef CONFIG_IWL4965_HT
  3383. u8 *pos = NULL;
  3384. struct ieee802_11_elems elems;
  3385. #endif /*CONFIG_IWL4965_HT */
  3386. struct ieee80211_mgmt *mgnt =
  3387. (struct ieee80211_mgmt *)header;
  3388. /* We have just associated, give some
  3389. * time for the 4-way handshake if
  3390. * any. Don't start scan too early. */
  3391. priv->next_scan_jiffies = jiffies +
  3392. IWL_DELAY_NEXT_SCAN_AFTER_ASSOC;
  3393. priv->assoc_id = (~((1 << 15) | (1 << 14))
  3394. & le16_to_cpu(mgnt->u.assoc_resp.aid));
  3395. priv->assoc_capability =
  3396. le16_to_cpu(
  3397. mgnt->u.assoc_resp.capab_info);
  3398. #ifdef CONFIG_IWL4965_HT
  3399. pos = mgnt->u.assoc_resp.variable;
  3400. if (!parse_elems(pos,
  3401. len - (pos - (u8 *) mgnt),
  3402. &elems)) {
  3403. if (elems.ht_extra_param &&
  3404. elems.ht_cap_param)
  3405. break;
  3406. }
  3407. #endif /*CONFIG_IWL4965_HT */
  3408. /* assoc_id is 0 no association */
  3409. if (!priv->assoc_id)
  3410. break;
  3411. if (priv->beacon_int)
  3412. queue_work(priv->workqueue,
  3413. &priv->post_associate.work);
  3414. else
  3415. priv->call_post_assoc_from_beacon = 1;
  3416. }
  3417. break;
  3418. case IEEE80211_STYPE_PROBE_REQ:
  3419. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  3420. !iwl4965_is_associated(priv)) {
  3421. DECLARE_MAC_BUF(mac1);
  3422. DECLARE_MAC_BUF(mac2);
  3423. DECLARE_MAC_BUF(mac3);
  3424. IWL_DEBUG_DROP("Dropping (non network): "
  3425. "%s, %s, %s\n",
  3426. print_mac(mac1, header->addr1),
  3427. print_mac(mac2, header->addr2),
  3428. print_mac(mac3, header->addr3));
  3429. return;
  3430. }
  3431. }
  3432. iwl4965_handle_data_packet(priv, 0, include_phy, rxb, &rx_status);
  3433. break;
  3434. case IEEE80211_FTYPE_CTL:
  3435. #ifdef CONFIG_IWL4965_HT
  3436. switch (fc & IEEE80211_FCTL_STYPE) {
  3437. case IEEE80211_STYPE_BACK_REQ:
  3438. IWL_DEBUG_HT("IEEE80211_STYPE_BACK_REQ arrived\n");
  3439. iwl4965_handle_data_packet(priv, 0, include_phy,
  3440. rxb, &rx_status);
  3441. break;
  3442. default:
  3443. break;
  3444. }
  3445. #endif
  3446. break;
  3447. case IEEE80211_FTYPE_DATA: {
  3448. DECLARE_MAC_BUF(mac1);
  3449. DECLARE_MAC_BUF(mac2);
  3450. DECLARE_MAC_BUF(mac3);
  3451. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  3452. iwl4965_update_ps_mode(priv, fc & IEEE80211_FCTL_PM,
  3453. header->addr2);
  3454. if (unlikely(!network_packet))
  3455. IWL_DEBUG_DROP("Dropping (non network): "
  3456. "%s, %s, %s\n",
  3457. print_mac(mac1, header->addr1),
  3458. print_mac(mac2, header->addr2),
  3459. print_mac(mac3, header->addr3));
  3460. else if (unlikely(iwl4965_is_duplicate_packet(priv, header)))
  3461. IWL_DEBUG_DROP("Dropping (dup): %s, %s, %s\n",
  3462. print_mac(mac1, header->addr1),
  3463. print_mac(mac2, header->addr2),
  3464. print_mac(mac3, header->addr3));
  3465. else
  3466. iwl4965_handle_data_packet(priv, 1, include_phy, rxb,
  3467. &rx_status);
  3468. break;
  3469. }
  3470. default:
  3471. break;
  3472. }
  3473. }
  3474. /* Cache phy data (Rx signal strength, etc) for HT frame (REPLY_RX_PHY_CMD).
  3475. * This will be used later in iwl4965_rx_reply_rx() for REPLY_RX_MPDU_CMD. */
  3476. static void iwl4965_rx_reply_rx_phy(struct iwl_priv *priv,
  3477. struct iwl4965_rx_mem_buffer *rxb)
  3478. {
  3479. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3480. priv->last_phy_res[0] = 1;
  3481. memcpy(&priv->last_phy_res[1], &(pkt->u.raw[0]),
  3482. sizeof(struct iwl4965_rx_phy_res));
  3483. }
  3484. static void iwl4965_rx_missed_beacon_notif(struct iwl_priv *priv,
  3485. struct iwl4965_rx_mem_buffer *rxb)
  3486. {
  3487. #ifdef CONFIG_IWL4965_SENSITIVITY
  3488. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3489. struct iwl4965_missed_beacon_notif *missed_beacon;
  3490. missed_beacon = &pkt->u.missed_beacon;
  3491. if (le32_to_cpu(missed_beacon->consequtive_missed_beacons) > 5) {
  3492. IWL_DEBUG_CALIB("missed bcn cnsq %d totl %d rcd %d expctd %d\n",
  3493. le32_to_cpu(missed_beacon->consequtive_missed_beacons),
  3494. le32_to_cpu(missed_beacon->total_missed_becons),
  3495. le32_to_cpu(missed_beacon->num_recvd_beacons),
  3496. le32_to_cpu(missed_beacon->num_expected_beacons));
  3497. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  3498. if (unlikely(!test_bit(STATUS_SCANNING, &priv->status)))
  3499. queue_work(priv->workqueue, &priv->sensitivity_work);
  3500. }
  3501. #endif /*CONFIG_IWL4965_SENSITIVITY*/
  3502. }
  3503. #ifdef CONFIG_IWL4965_HT
  3504. /**
  3505. * iwl4965_sta_modify_enable_tid_tx - Enable Tx for this TID in station table
  3506. */
  3507. static void iwl4965_sta_modify_enable_tid_tx(struct iwl_priv *priv,
  3508. int sta_id, int tid)
  3509. {
  3510. unsigned long flags;
  3511. /* Remove "disable" flag, to enable Tx for this TID */
  3512. spin_lock_irqsave(&priv->sta_lock, flags);
  3513. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_TID_DISABLE_TX;
  3514. priv->stations[sta_id].sta.tid_disable_tx &= cpu_to_le16(~(1 << tid));
  3515. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  3516. spin_unlock_irqrestore(&priv->sta_lock, flags);
  3517. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  3518. }
  3519. /**
  3520. * iwl4965_tx_status_reply_compressed_ba - Update tx status from block-ack
  3521. *
  3522. * Go through block-ack's bitmap of ACK'd frames, update driver's record of
  3523. * ACK vs. not. This gets sent to mac80211, then to rate scaling algo.
  3524. */
  3525. static int iwl4965_tx_status_reply_compressed_ba(struct iwl_priv *priv,
  3526. struct iwl4965_ht_agg *agg,
  3527. struct iwl4965_compressed_ba_resp*
  3528. ba_resp)
  3529. {
  3530. int i, sh, ack;
  3531. u16 seq_ctl = le16_to_cpu(ba_resp->seq_ctl);
  3532. u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
  3533. u64 bitmap;
  3534. int successes = 0;
  3535. struct ieee80211_tx_status *tx_status;
  3536. if (unlikely(!agg->wait_for_ba)) {
  3537. IWL_ERROR("Received BA when not expected\n");
  3538. return -EINVAL;
  3539. }
  3540. /* Mark that the expected block-ack response arrived */
  3541. agg->wait_for_ba = 0;
  3542. IWL_DEBUG_TX_REPLY("BA %d %d\n", agg->start_idx, ba_resp->seq_ctl);
  3543. /* Calculate shift to align block-ack bits with our Tx window bits */
  3544. sh = agg->start_idx - SEQ_TO_INDEX(seq_ctl>>4);
  3545. if (sh < 0) /* tbw something is wrong with indices */
  3546. sh += 0x100;
  3547. /* don't use 64-bit values for now */
  3548. bitmap = le64_to_cpu(ba_resp->bitmap) >> sh;
  3549. if (agg->frame_count > (64 - sh)) {
  3550. IWL_DEBUG_TX_REPLY("more frames than bitmap size");
  3551. return -1;
  3552. }
  3553. /* check for success or failure according to the
  3554. * transmitted bitmap and block-ack bitmap */
  3555. bitmap &= agg->bitmap;
  3556. /* For each frame attempted in aggregation,
  3557. * update driver's record of tx frame's status. */
  3558. for (i = 0; i < agg->frame_count ; i++) {
  3559. ack = bitmap & (1 << i);
  3560. successes += !!ack;
  3561. IWL_DEBUG_TX_REPLY("%s ON i=%d idx=%d raw=%d\n",
  3562. ack? "ACK":"NACK", i, (agg->start_idx + i) & 0xff,
  3563. agg->start_idx + i);
  3564. }
  3565. tx_status = &priv->txq[scd_flow].txb[agg->start_idx].status;
  3566. tx_status->flags = IEEE80211_TX_STATUS_ACK;
  3567. tx_status->flags |= IEEE80211_TX_STATUS_AMPDU;
  3568. tx_status->ampdu_ack_map = successes;
  3569. tx_status->ampdu_ack_len = agg->frame_count;
  3570. iwl4965_hwrate_to_tx_control(priv, agg->rate_n_flags,
  3571. &tx_status->control);
  3572. IWL_DEBUG_TX_REPLY("Bitmap %llx\n", (unsigned long long)bitmap);
  3573. return 0;
  3574. }
  3575. /**
  3576. * iwl4965_tx_queue_stop_scheduler - Stop queue, but keep configuration
  3577. */
  3578. static void iwl4965_tx_queue_stop_scheduler(struct iwl_priv *priv,
  3579. u16 txq_id)
  3580. {
  3581. /* Simply stop the queue, but don't change any configuration;
  3582. * the SCD_ACT_EN bit is the write-enable mask for the ACTIVE bit. */
  3583. iwl4965_write_prph(priv,
  3584. KDR_SCD_QUEUE_STATUS_BITS(txq_id),
  3585. (0 << SCD_QUEUE_STTS_REG_POS_ACTIVE)|
  3586. (1 << SCD_QUEUE_STTS_REG_POS_SCD_ACT_EN));
  3587. }
  3588. /**
  3589. * txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID
  3590. * priv->lock must be held by the caller
  3591. */
  3592. static int iwl4965_tx_queue_agg_disable(struct iwl_priv *priv, u16 txq_id,
  3593. u16 ssn_idx, u8 tx_fifo)
  3594. {
  3595. int ret = 0;
  3596. if (IWL_BACK_QUEUE_FIRST_ID > txq_id) {
  3597. IWL_WARNING("queue number too small: %d, must be > %d\n",
  3598. txq_id, IWL_BACK_QUEUE_FIRST_ID);
  3599. return -EINVAL;
  3600. }
  3601. ret = iwl4965_grab_nic_access(priv);
  3602. if (ret)
  3603. return ret;
  3604. iwl4965_tx_queue_stop_scheduler(priv, txq_id);
  3605. iwl4965_clear_bits_prph(priv, KDR_SCD_QUEUECHAIN_SEL, (1 << txq_id));
  3606. priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
  3607. priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
  3608. /* supposes that ssn_idx is valid (!= 0xFFF) */
  3609. iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
  3610. iwl4965_clear_bits_prph(priv, KDR_SCD_INTERRUPT_MASK, (1 << txq_id));
  3611. iwl4965_txq_ctx_deactivate(priv, txq_id);
  3612. iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 0);
  3613. iwl4965_release_nic_access(priv);
  3614. return 0;
  3615. }
  3616. int iwl4965_check_empty_hw_queue(struct iwl_priv *priv, int sta_id,
  3617. u8 tid, int txq_id)
  3618. {
  3619. struct iwl4965_queue *q = &priv->txq[txq_id].q;
  3620. u8 *addr = priv->stations[sta_id].sta.sta.addr;
  3621. struct iwl4965_tid_data *tid_data = &priv->stations[sta_id].tid[tid];
  3622. switch (priv->stations[sta_id].tid[tid].agg.state) {
  3623. case IWL_EMPTYING_HW_QUEUE_DELBA:
  3624. /* We are reclaiming the last packet of the */
  3625. /* aggregated HW queue */
  3626. if (txq_id == tid_data->agg.txq_id &&
  3627. q->read_ptr == q->write_ptr) {
  3628. u16 ssn = SEQ_TO_SN(tid_data->seq_number);
  3629. int tx_fifo = default_tid_to_tx_fifo[tid];
  3630. IWL_DEBUG_HT("HW queue empty: continue DELBA flow\n");
  3631. iwl4965_tx_queue_agg_disable(priv, txq_id,
  3632. ssn, tx_fifo);
  3633. tid_data->agg.state = IWL_AGG_OFF;
  3634. ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, addr, tid);
  3635. }
  3636. break;
  3637. case IWL_EMPTYING_HW_QUEUE_ADDBA:
  3638. /* We are reclaiming the last packet of the queue */
  3639. if (tid_data->tfds_in_queue == 0) {
  3640. IWL_DEBUG_HT("HW queue empty: continue ADDBA flow\n");
  3641. tid_data->agg.state = IWL_AGG_ON;
  3642. ieee80211_start_tx_ba_cb_irqsafe(priv->hw, addr, tid);
  3643. }
  3644. break;
  3645. }
  3646. return 0;
  3647. }
  3648. /**
  3649. * iwl4965_queue_dec_wrap - Decrement queue index, wrap back to end if needed
  3650. * @index -- current index
  3651. * @n_bd -- total number of entries in queue (s/b power of 2)
  3652. */
  3653. static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
  3654. {
  3655. return (index == 0) ? n_bd - 1 : index - 1;
  3656. }
  3657. /**
  3658. * iwl4965_rx_reply_compressed_ba - Handler for REPLY_COMPRESSED_BA
  3659. *
  3660. * Handles block-acknowledge notification from device, which reports success
  3661. * of frames sent via aggregation.
  3662. */
  3663. static void iwl4965_rx_reply_compressed_ba(struct iwl_priv *priv,
  3664. struct iwl4965_rx_mem_buffer *rxb)
  3665. {
  3666. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3667. struct iwl4965_compressed_ba_resp *ba_resp = &pkt->u.compressed_ba;
  3668. int index;
  3669. struct iwl4965_tx_queue *txq = NULL;
  3670. struct iwl4965_ht_agg *agg;
  3671. DECLARE_MAC_BUF(mac);
  3672. /* "flow" corresponds to Tx queue */
  3673. u16 scd_flow = le16_to_cpu(ba_resp->scd_flow);
  3674. /* "ssn" is start of block-ack Tx window, corresponds to index
  3675. * (in Tx queue's circular buffer) of first TFD/frame in window */
  3676. u16 ba_resp_scd_ssn = le16_to_cpu(ba_resp->scd_ssn);
  3677. if (scd_flow >= ARRAY_SIZE(priv->txq)) {
  3678. IWL_ERROR("BUG_ON scd_flow is bigger than number of queues");
  3679. return;
  3680. }
  3681. txq = &priv->txq[scd_flow];
  3682. agg = &priv->stations[ba_resp->sta_id].tid[ba_resp->tid].agg;
  3683. /* Find index just before block-ack window */
  3684. index = iwl4965_queue_dec_wrap(ba_resp_scd_ssn & 0xff, txq->q.n_bd);
  3685. /* TODO: Need to get this copy more safely - now good for debug */
  3686. IWL_DEBUG_TX_REPLY("REPLY_COMPRESSED_BA [%d]Received from %s, "
  3687. "sta_id = %d\n",
  3688. agg->wait_for_ba,
  3689. print_mac(mac, (u8*) &ba_resp->sta_addr_lo32),
  3690. ba_resp->sta_id);
  3691. IWL_DEBUG_TX_REPLY("TID = %d, SeqCtl = %d, bitmap = 0x%llx, scd_flow = "
  3692. "%d, scd_ssn = %d\n",
  3693. ba_resp->tid,
  3694. ba_resp->seq_ctl,
  3695. (unsigned long long)le64_to_cpu(ba_resp->bitmap),
  3696. ba_resp->scd_flow,
  3697. ba_resp->scd_ssn);
  3698. IWL_DEBUG_TX_REPLY("DAT start_idx = %d, bitmap = 0x%llx \n",
  3699. agg->start_idx,
  3700. (unsigned long long)agg->bitmap);
  3701. /* Update driver's record of ACK vs. not for each frame in window */
  3702. iwl4965_tx_status_reply_compressed_ba(priv, agg, ba_resp);
  3703. /* Release all TFDs before the SSN, i.e. all TFDs in front of
  3704. * block-ack window (we assume that they've been successfully
  3705. * transmitted ... if not, it's too late anyway). */
  3706. if (txq->q.read_ptr != (ba_resp_scd_ssn & 0xff)) {
  3707. int freed = iwl4965_tx_queue_reclaim(priv, scd_flow, index);
  3708. priv->stations[ba_resp->sta_id].
  3709. tid[ba_resp->tid].tfds_in_queue -= freed;
  3710. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  3711. priv->mac80211_registered &&
  3712. agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
  3713. ieee80211_wake_queue(priv->hw, scd_flow);
  3714. iwl4965_check_empty_hw_queue(priv, ba_resp->sta_id,
  3715. ba_resp->tid, scd_flow);
  3716. }
  3717. }
  3718. /**
  3719. * iwl4965_tx_queue_set_q2ratid - Map unique receiver/tid combination to a queue
  3720. */
  3721. static int iwl4965_tx_queue_set_q2ratid(struct iwl_priv *priv, u16 ra_tid,
  3722. u16 txq_id)
  3723. {
  3724. u32 tbl_dw_addr;
  3725. u32 tbl_dw;
  3726. u16 scd_q2ratid;
  3727. scd_q2ratid = ra_tid & SCD_QUEUE_RA_TID_MAP_RATID_MSK;
  3728. tbl_dw_addr = priv->scd_base_addr +
  3729. SCD_TRANSLATE_TBL_OFFSET_QUEUE(txq_id);
  3730. tbl_dw = iwl4965_read_targ_mem(priv, tbl_dw_addr);
  3731. if (txq_id & 0x1)
  3732. tbl_dw = (scd_q2ratid << 16) | (tbl_dw & 0x0000FFFF);
  3733. else
  3734. tbl_dw = scd_q2ratid | (tbl_dw & 0xFFFF0000);
  3735. iwl4965_write_targ_mem(priv, tbl_dw_addr, tbl_dw);
  3736. return 0;
  3737. }
  3738. /**
  3739. * iwl4965_tx_queue_agg_enable - Set up & enable aggregation for selected queue
  3740. *
  3741. * NOTE: txq_id must be greater than IWL_BACK_QUEUE_FIRST_ID,
  3742. * i.e. it must be one of the higher queues used for aggregation
  3743. */
  3744. static int iwl4965_tx_queue_agg_enable(struct iwl_priv *priv, int txq_id,
  3745. int tx_fifo, int sta_id, int tid,
  3746. u16 ssn_idx)
  3747. {
  3748. unsigned long flags;
  3749. int rc;
  3750. u16 ra_tid;
  3751. if (IWL_BACK_QUEUE_FIRST_ID > txq_id)
  3752. IWL_WARNING("queue number too small: %d, must be > %d\n",
  3753. txq_id, IWL_BACK_QUEUE_FIRST_ID);
  3754. ra_tid = BUILD_RAxTID(sta_id, tid);
  3755. /* Modify device's station table to Tx this TID */
  3756. iwl4965_sta_modify_enable_tid_tx(priv, sta_id, tid);
  3757. spin_lock_irqsave(&priv->lock, flags);
  3758. rc = iwl4965_grab_nic_access(priv);
  3759. if (rc) {
  3760. spin_unlock_irqrestore(&priv->lock, flags);
  3761. return rc;
  3762. }
  3763. /* Stop this Tx queue before configuring it */
  3764. iwl4965_tx_queue_stop_scheduler(priv, txq_id);
  3765. /* Map receiver-address / traffic-ID to this queue */
  3766. iwl4965_tx_queue_set_q2ratid(priv, ra_tid, txq_id);
  3767. /* Set this queue as a chain-building queue */
  3768. iwl4965_set_bits_prph(priv, KDR_SCD_QUEUECHAIN_SEL, (1 << txq_id));
  3769. /* Place first TFD at index corresponding to start sequence number.
  3770. * Assumes that ssn_idx is valid (!= 0xFFF) */
  3771. priv->txq[txq_id].q.read_ptr = (ssn_idx & 0xff);
  3772. priv->txq[txq_id].q.write_ptr = (ssn_idx & 0xff);
  3773. iwl4965_set_wr_ptrs(priv, txq_id, ssn_idx);
  3774. /* Set up Tx window size and frame limit for this queue */
  3775. iwl4965_write_targ_mem(priv,
  3776. priv->scd_base_addr + SCD_CONTEXT_QUEUE_OFFSET(txq_id),
  3777. (SCD_WIN_SIZE << SCD_QUEUE_CTX_REG1_WIN_SIZE_POS) &
  3778. SCD_QUEUE_CTX_REG1_WIN_SIZE_MSK);
  3779. iwl4965_write_targ_mem(priv, priv->scd_base_addr +
  3780. SCD_CONTEXT_QUEUE_OFFSET(txq_id) + sizeof(u32),
  3781. (SCD_FRAME_LIMIT << SCD_QUEUE_CTX_REG2_FRAME_LIMIT_POS)
  3782. & SCD_QUEUE_CTX_REG2_FRAME_LIMIT_MSK);
  3783. iwl4965_set_bits_prph(priv, KDR_SCD_INTERRUPT_MASK, (1 << txq_id));
  3784. /* Set up Status area in SRAM, map to Tx DMA/FIFO, activate the queue */
  3785. iwl4965_tx_queue_set_status(priv, &priv->txq[txq_id], tx_fifo, 1);
  3786. iwl4965_release_nic_access(priv);
  3787. spin_unlock_irqrestore(&priv->lock, flags);
  3788. return 0;
  3789. }
  3790. #endif /* CONFIG_IWL4965_HT */
  3791. /**
  3792. * iwl4965_add_station - Initialize a station's hardware rate table
  3793. *
  3794. * The uCode's station table contains a table of fallback rates
  3795. * for automatic fallback during transmission.
  3796. *
  3797. * NOTE: This sets up a default set of values. These will be replaced later
  3798. * if the driver's iwl-4965-rs rate scaling algorithm is used, instead of
  3799. * rc80211_simple.
  3800. *
  3801. * NOTE: Run REPLY_ADD_STA command to set up station table entry, before
  3802. * calling this function (which runs REPLY_TX_LINK_QUALITY_CMD,
  3803. * which requires station table entry to exist).
  3804. */
  3805. void iwl4965_add_station(struct iwl_priv *priv, const u8 *addr, int is_ap)
  3806. {
  3807. int i, r;
  3808. struct iwl4965_link_quality_cmd link_cmd = {
  3809. .reserved1 = 0,
  3810. };
  3811. u16 rate_flags;
  3812. /* Set up the rate scaling to start at selected rate, fall back
  3813. * all the way down to 1M in IEEE order, and then spin on 1M */
  3814. if (is_ap)
  3815. r = IWL_RATE_54M_INDEX;
  3816. else if (priv->band == IEEE80211_BAND_5GHZ)
  3817. r = IWL_RATE_6M_INDEX;
  3818. else
  3819. r = IWL_RATE_1M_INDEX;
  3820. for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) {
  3821. rate_flags = 0;
  3822. if (r >= IWL_FIRST_CCK_RATE && r <= IWL_LAST_CCK_RATE)
  3823. rate_flags |= RATE_MCS_CCK_MSK;
  3824. /* Use Tx antenna B only */
  3825. rate_flags |= RATE_MCS_ANT_B_MSK;
  3826. rate_flags &= ~RATE_MCS_ANT_A_MSK;
  3827. link_cmd.rs_table[i].rate_n_flags =
  3828. iwl4965_hw_set_rate_n_flags(iwl4965_rates[r].plcp, rate_flags);
  3829. r = iwl4965_get_prev_ieee_rate(r);
  3830. }
  3831. link_cmd.general_params.single_stream_ant_msk = 2;
  3832. link_cmd.general_params.dual_stream_ant_msk = 3;
  3833. link_cmd.agg_params.agg_dis_start_th = 3;
  3834. link_cmd.agg_params.agg_time_limit = cpu_to_le16(4000);
  3835. /* Update the rate scaling for control frame Tx to AP */
  3836. link_cmd.sta_id = is_ap ? IWL_AP_ID : priv->hw_setting.bcast_sta_id;
  3837. iwl_send_cmd_pdu(priv, REPLY_TX_LINK_QUALITY_CMD, sizeof(link_cmd),
  3838. &link_cmd);
  3839. }
  3840. #ifdef CONFIG_IWL4965_HT
  3841. static u8 iwl4965_is_channel_extension(struct iwl_priv *priv,
  3842. enum ieee80211_band band,
  3843. u16 channel, u8 extension_chan_offset)
  3844. {
  3845. const struct iwl_channel_info *ch_info;
  3846. ch_info = iwl_get_channel_info(priv, band, channel);
  3847. if (!is_channel_valid(ch_info))
  3848. return 0;
  3849. if (extension_chan_offset == IWL_EXT_CHANNEL_OFFSET_NONE)
  3850. return 0;
  3851. if ((ch_info->fat_extension_channel == extension_chan_offset) ||
  3852. (ch_info->fat_extension_channel == HT_IE_EXT_CHANNEL_MAX))
  3853. return 1;
  3854. return 0;
  3855. }
  3856. static u8 iwl4965_is_fat_tx_allowed(struct iwl_priv *priv,
  3857. struct ieee80211_ht_info *sta_ht_inf)
  3858. {
  3859. struct iwl_ht_info *iwl_ht_conf = &priv->current_ht_config;
  3860. if ((!iwl_ht_conf->is_ht) ||
  3861. (iwl_ht_conf->supported_chan_width != IWL_CHANNEL_WIDTH_40MHZ) ||
  3862. (iwl_ht_conf->extension_chan_offset == IWL_EXT_CHANNEL_OFFSET_NONE))
  3863. return 0;
  3864. if (sta_ht_inf) {
  3865. if ((!sta_ht_inf->ht_supported) ||
  3866. (!(sta_ht_inf->cap & IEEE80211_HT_CAP_SUP_WIDTH)))
  3867. return 0;
  3868. }
  3869. return (iwl4965_is_channel_extension(priv, priv->band,
  3870. iwl_ht_conf->control_channel,
  3871. iwl_ht_conf->extension_chan_offset));
  3872. }
  3873. void iwl4965_set_rxon_ht(struct iwl_priv *priv, struct iwl_ht_info *ht_info)
  3874. {
  3875. struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
  3876. u32 val;
  3877. if (!ht_info->is_ht)
  3878. return;
  3879. /* Set up channel bandwidth: 20 MHz only, or 20/40 mixed if fat ok */
  3880. if (iwl4965_is_fat_tx_allowed(priv, NULL))
  3881. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED_MSK;
  3882. else
  3883. rxon->flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  3884. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  3885. if (le16_to_cpu(rxon->channel) != ht_info->control_channel) {
  3886. IWL_DEBUG_ASSOC("control diff than current %d %d\n",
  3887. le16_to_cpu(rxon->channel),
  3888. ht_info->control_channel);
  3889. rxon->channel = cpu_to_le16(ht_info->control_channel);
  3890. return;
  3891. }
  3892. /* Note: control channel is opposite of extension channel */
  3893. switch (ht_info->extension_chan_offset) {
  3894. case IWL_EXT_CHANNEL_OFFSET_ABOVE:
  3895. rxon->flags &= ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  3896. break;
  3897. case IWL_EXT_CHANNEL_OFFSET_BELOW:
  3898. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  3899. break;
  3900. case IWL_EXT_CHANNEL_OFFSET_NONE:
  3901. default:
  3902. rxon->flags &= ~RXON_FLG_CHANNEL_MODE_MIXED_MSK;
  3903. break;
  3904. }
  3905. val = ht_info->ht_protection;
  3906. rxon->flags |= cpu_to_le32(val << RXON_FLG_HT_OPERATING_MODE_POS);
  3907. iwl4965_set_rxon_chain(priv);
  3908. IWL_DEBUG_ASSOC("supported HT rate 0x%X %X "
  3909. "rxon flags 0x%X operation mode :0x%X "
  3910. "extension channel offset 0x%x "
  3911. "control chan %d\n",
  3912. ht_info->supp_mcs_set[0], ht_info->supp_mcs_set[1],
  3913. le32_to_cpu(rxon->flags), ht_info->ht_protection,
  3914. ht_info->extension_chan_offset,
  3915. ht_info->control_channel);
  3916. return;
  3917. }
  3918. void iwl4965_set_ht_add_station(struct iwl_priv *priv, u8 index,
  3919. struct ieee80211_ht_info *sta_ht_inf)
  3920. {
  3921. __le32 sta_flags;
  3922. u8 mimo_ps_mode;
  3923. if (!sta_ht_inf || !sta_ht_inf->ht_supported)
  3924. goto done;
  3925. mimo_ps_mode = (sta_ht_inf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2;
  3926. sta_flags = priv->stations[index].sta.station_flags;
  3927. sta_flags &= ~(STA_FLG_RTS_MIMO_PROT_MSK | STA_FLG_MIMO_DIS_MSK);
  3928. switch (mimo_ps_mode) {
  3929. case WLAN_HT_CAP_MIMO_PS_STATIC:
  3930. sta_flags |= STA_FLG_MIMO_DIS_MSK;
  3931. break;
  3932. case WLAN_HT_CAP_MIMO_PS_DYNAMIC:
  3933. sta_flags |= STA_FLG_RTS_MIMO_PROT_MSK;
  3934. break;
  3935. case WLAN_HT_CAP_MIMO_PS_DISABLED:
  3936. break;
  3937. default:
  3938. IWL_WARNING("Invalid MIMO PS mode %d", mimo_ps_mode);
  3939. break;
  3940. }
  3941. sta_flags |= cpu_to_le32(
  3942. (u32)sta_ht_inf->ampdu_factor << STA_FLG_MAX_AGG_SIZE_POS);
  3943. sta_flags |= cpu_to_le32(
  3944. (u32)sta_ht_inf->ampdu_density << STA_FLG_AGG_MPDU_DENSITY_POS);
  3945. if (iwl4965_is_fat_tx_allowed(priv, sta_ht_inf))
  3946. sta_flags |= STA_FLG_FAT_EN_MSK;
  3947. else
  3948. sta_flags &= ~STA_FLG_FAT_EN_MSK;
  3949. priv->stations[index].sta.station_flags = sta_flags;
  3950. done:
  3951. return;
  3952. }
  3953. static void iwl4965_sta_modify_add_ba_tid(struct iwl_priv *priv,
  3954. int sta_id, int tid, u16 ssn)
  3955. {
  3956. unsigned long flags;
  3957. spin_lock_irqsave(&priv->sta_lock, flags);
  3958. priv->stations[sta_id].sta.station_flags_msk = 0;
  3959. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_ADDBA_TID_MSK;
  3960. priv->stations[sta_id].sta.add_immediate_ba_tid = (u8)tid;
  3961. priv->stations[sta_id].sta.add_immediate_ba_ssn = cpu_to_le16(ssn);
  3962. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  3963. spin_unlock_irqrestore(&priv->sta_lock, flags);
  3964. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  3965. }
  3966. static void iwl4965_sta_modify_del_ba_tid(struct iwl_priv *priv,
  3967. int sta_id, int tid)
  3968. {
  3969. unsigned long flags;
  3970. spin_lock_irqsave(&priv->sta_lock, flags);
  3971. priv->stations[sta_id].sta.station_flags_msk = 0;
  3972. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_DELBA_TID_MSK;
  3973. priv->stations[sta_id].sta.remove_immediate_ba_tid = (u8)tid;
  3974. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  3975. spin_unlock_irqrestore(&priv->sta_lock, flags);
  3976. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, CMD_ASYNC);
  3977. }
  3978. /*
  3979. * Find first available (lowest unused) Tx Queue, mark it "active".
  3980. * Called only when finding queue for aggregation.
  3981. * Should never return anything < 7, because they should already
  3982. * be in use as EDCA AC (0-3), Command (4), HCCA (5, 6).
  3983. */
  3984. static int iwl4965_txq_ctx_activate_free(struct iwl_priv *priv)
  3985. {
  3986. int txq_id;
  3987. for (txq_id = 0; txq_id < priv->hw_setting.max_txq_num; txq_id++)
  3988. if (!test_and_set_bit(txq_id, &priv->txq_ctx_active_msk))
  3989. return txq_id;
  3990. return -1;
  3991. }
  3992. static int iwl4965_mac_ht_tx_agg_start(struct ieee80211_hw *hw, const u8 *da,
  3993. u16 tid, u16 *start_seq_num)
  3994. {
  3995. struct iwl_priv *priv = hw->priv;
  3996. int sta_id;
  3997. int tx_fifo;
  3998. int txq_id;
  3999. int ssn = -1;
  4000. int ret = 0;
  4001. unsigned long flags;
  4002. struct iwl4965_tid_data *tid_data;
  4003. DECLARE_MAC_BUF(mac);
  4004. if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
  4005. tx_fifo = default_tid_to_tx_fifo[tid];
  4006. else
  4007. return -EINVAL;
  4008. IWL_WARNING("%s on da = %s tid = %d\n",
  4009. __func__, print_mac(mac, da), tid);
  4010. sta_id = iwl4965_hw_find_station(priv, da);
  4011. if (sta_id == IWL_INVALID_STATION)
  4012. return -ENXIO;
  4013. if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_OFF) {
  4014. IWL_ERROR("Start AGG when state is not IWL_AGG_OFF !\n");
  4015. return -ENXIO;
  4016. }
  4017. txq_id = iwl4965_txq_ctx_activate_free(priv);
  4018. if (txq_id == -1)
  4019. return -ENXIO;
  4020. spin_lock_irqsave(&priv->sta_lock, flags);
  4021. tid_data = &priv->stations[sta_id].tid[tid];
  4022. ssn = SEQ_TO_SN(tid_data->seq_number);
  4023. tid_data->agg.txq_id = txq_id;
  4024. spin_unlock_irqrestore(&priv->sta_lock, flags);
  4025. *start_seq_num = ssn;
  4026. ret = iwl4965_tx_queue_agg_enable(priv, txq_id, tx_fifo,
  4027. sta_id, tid, ssn);
  4028. if (ret)
  4029. return ret;
  4030. ret = 0;
  4031. if (tid_data->tfds_in_queue == 0) {
  4032. printk(KERN_ERR "HW queue is empty\n");
  4033. tid_data->agg.state = IWL_AGG_ON;
  4034. ieee80211_start_tx_ba_cb_irqsafe(hw, da, tid);
  4035. } else {
  4036. IWL_DEBUG_HT("HW queue is NOT empty: %d packets in HW queue\n",
  4037. tid_data->tfds_in_queue);
  4038. tid_data->agg.state = IWL_EMPTYING_HW_QUEUE_ADDBA;
  4039. }
  4040. return ret;
  4041. }
  4042. static int iwl4965_mac_ht_tx_agg_stop(struct ieee80211_hw *hw, const u8 *da,
  4043. u16 tid)
  4044. {
  4045. struct iwl_priv *priv = hw->priv;
  4046. int tx_fifo_id, txq_id, sta_id, ssn = -1;
  4047. struct iwl4965_tid_data *tid_data;
  4048. int ret, write_ptr, read_ptr;
  4049. unsigned long flags;
  4050. DECLARE_MAC_BUF(mac);
  4051. if (!da) {
  4052. IWL_ERROR("da = NULL\n");
  4053. return -EINVAL;
  4054. }
  4055. if (likely(tid < ARRAY_SIZE(default_tid_to_tx_fifo)))
  4056. tx_fifo_id = default_tid_to_tx_fifo[tid];
  4057. else
  4058. return -EINVAL;
  4059. sta_id = iwl4965_hw_find_station(priv, da);
  4060. if (sta_id == IWL_INVALID_STATION)
  4061. return -ENXIO;
  4062. if (priv->stations[sta_id].tid[tid].agg.state != IWL_AGG_ON)
  4063. IWL_WARNING("Stopping AGG while state not IWL_AGG_ON\n");
  4064. tid_data = &priv->stations[sta_id].tid[tid];
  4065. ssn = (tid_data->seq_number & IEEE80211_SCTL_SEQ) >> 4;
  4066. txq_id = tid_data->agg.txq_id;
  4067. write_ptr = priv->txq[txq_id].q.write_ptr;
  4068. read_ptr = priv->txq[txq_id].q.read_ptr;
  4069. /* The queue is not empty */
  4070. if (write_ptr != read_ptr) {
  4071. IWL_DEBUG_HT("Stopping a non empty AGG HW QUEUE\n");
  4072. priv->stations[sta_id].tid[tid].agg.state =
  4073. IWL_EMPTYING_HW_QUEUE_DELBA;
  4074. return 0;
  4075. }
  4076. IWL_DEBUG_HT("HW queue empty\n");;
  4077. priv->stations[sta_id].tid[tid].agg.state = IWL_AGG_OFF;
  4078. spin_lock_irqsave(&priv->lock, flags);
  4079. ret = iwl4965_tx_queue_agg_disable(priv, txq_id, ssn, tx_fifo_id);
  4080. spin_unlock_irqrestore(&priv->lock, flags);
  4081. if (ret)
  4082. return ret;
  4083. ieee80211_stop_tx_ba_cb_irqsafe(priv->hw, da, tid);
  4084. IWL_DEBUG_INFO("iwl4965_mac_ht_tx_agg_stop on da=%s tid=%d\n",
  4085. print_mac(mac, da), tid);
  4086. return 0;
  4087. }
  4088. int iwl4965_mac_ampdu_action(struct ieee80211_hw *hw,
  4089. enum ieee80211_ampdu_mlme_action action,
  4090. const u8 *addr, u16 tid, u16 *ssn)
  4091. {
  4092. struct iwl_priv *priv = hw->priv;
  4093. int sta_id;
  4094. DECLARE_MAC_BUF(mac);
  4095. IWL_DEBUG_HT("A-MPDU action on da=%s tid=%d ",
  4096. print_mac(mac, addr), tid);
  4097. sta_id = iwl4965_hw_find_station(priv, addr);
  4098. switch (action) {
  4099. case IEEE80211_AMPDU_RX_START:
  4100. IWL_DEBUG_HT("start Rx\n");
  4101. iwl4965_sta_modify_add_ba_tid(priv, sta_id, tid, *ssn);
  4102. break;
  4103. case IEEE80211_AMPDU_RX_STOP:
  4104. IWL_DEBUG_HT("stop Rx\n");
  4105. iwl4965_sta_modify_del_ba_tid(priv, sta_id, tid);
  4106. break;
  4107. case IEEE80211_AMPDU_TX_START:
  4108. IWL_DEBUG_HT("start Tx\n");
  4109. return iwl4965_mac_ht_tx_agg_start(hw, addr, tid, ssn);
  4110. case IEEE80211_AMPDU_TX_STOP:
  4111. IWL_DEBUG_HT("stop Tx\n");
  4112. return iwl4965_mac_ht_tx_agg_stop(hw, addr, tid);
  4113. default:
  4114. IWL_DEBUG_HT("unknown\n");
  4115. return -EINVAL;
  4116. break;
  4117. }
  4118. return 0;
  4119. }
  4120. #endif /* CONFIG_IWL4965_HT */
  4121. /* Set up 4965-specific Rx frame reply handlers */
  4122. void iwl4965_hw_rx_handler_setup(struct iwl_priv *priv)
  4123. {
  4124. /* Legacy Rx frames */
  4125. priv->rx_handlers[REPLY_RX] = iwl4965_rx_reply_rx;
  4126. /* High-throughput (HT) Rx frames */
  4127. priv->rx_handlers[REPLY_RX_PHY_CMD] = iwl4965_rx_reply_rx_phy;
  4128. priv->rx_handlers[REPLY_RX_MPDU_CMD] = iwl4965_rx_reply_rx;
  4129. priv->rx_handlers[MISSED_BEACONS_NOTIFICATION] =
  4130. iwl4965_rx_missed_beacon_notif;
  4131. #ifdef CONFIG_IWL4965_HT
  4132. priv->rx_handlers[REPLY_COMPRESSED_BA] = iwl4965_rx_reply_compressed_ba;
  4133. #endif /* CONFIG_IWL4965_HT */
  4134. }
  4135. void iwl4965_hw_setup_deferred_work(struct iwl_priv *priv)
  4136. {
  4137. INIT_WORK(&priv->txpower_work, iwl4965_bg_txpower_work);
  4138. INIT_WORK(&priv->statistics_work, iwl4965_bg_statistics_work);
  4139. #ifdef CONFIG_IWL4965_SENSITIVITY
  4140. INIT_WORK(&priv->sensitivity_work, iwl4965_bg_sensitivity_work);
  4141. #endif
  4142. init_timer(&priv->statistics_periodic);
  4143. priv->statistics_periodic.data = (unsigned long)priv;
  4144. priv->statistics_periodic.function = iwl4965_bg_statistics_periodic;
  4145. }
  4146. void iwl4965_hw_cancel_deferred_work(struct iwl_priv *priv)
  4147. {
  4148. del_timer_sync(&priv->statistics_periodic);
  4149. cancel_delayed_work(&priv->init_alive_start);
  4150. }
  4151. static struct iwl_hcmd_utils_ops iwl4965_hcmd_utils = {
  4152. .enqueue_hcmd = iwl4965_enqueue_hcmd,
  4153. };
  4154. static struct iwl_lib_ops iwl4965_lib = {
  4155. .init_drv = iwl4965_init_drv,
  4156. .eeprom_ops = {
  4157. .verify_signature = iwlcore_eeprom_verify_signature,
  4158. .acquire_semaphore = iwlcore_eeprom_acquire_semaphore,
  4159. .release_semaphore = iwlcore_eeprom_release_semaphore,
  4160. },
  4161. };
  4162. static struct iwl_ops iwl4965_ops = {
  4163. .lib = &iwl4965_lib,
  4164. .utils = &iwl4965_hcmd_utils,
  4165. };
  4166. static struct iwl_cfg iwl4965_agn_cfg = {
  4167. .name = "4965AGN",
  4168. .fw_name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode",
  4169. .sku = IWL_SKU_A|IWL_SKU_G|IWL_SKU_N,
  4170. .ops = &iwl4965_ops,
  4171. };
  4172. struct pci_device_id iwl4965_hw_card_ids[] = {
  4173. {IWL_PCI_DEVICE(0x4229, PCI_ANY_ID, iwl4965_agn_cfg)},
  4174. {IWL_PCI_DEVICE(0x4230, PCI_ANY_ID, iwl4965_agn_cfg)},
  4175. {0}
  4176. };
  4177. MODULE_DEVICE_TABLE(pci, iwl4965_hw_card_ids);