s5m8767.c 21 KB

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  1. /*
  2. * s5m8767.c
  3. *
  4. * Copyright (c) 2011 Samsung Electronics Co., Ltd
  5. * http://www.samsung.com
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License as published by the
  9. * Free Software Foundation; either version 2 of the License, or (at your
  10. * option) any later version.
  11. *
  12. */
  13. #include <linux/bug.h>
  14. #include <linux/err.h>
  15. #include <linux/gpio.h>
  16. #include <linux/slab.h>
  17. #include <linux/module.h>
  18. #include <linux/platform_device.h>
  19. #include <linux/regulator/driver.h>
  20. #include <linux/regulator/machine.h>
  21. #include <linux/mfd/samsung/core.h>
  22. #include <linux/mfd/samsung/s5m8767.h>
  23. struct s5m8767_info {
  24. struct device *dev;
  25. struct sec_pmic_dev *iodev;
  26. int num_regulators;
  27. struct regulator_dev **rdev;
  28. struct sec_opmode_data *opmode;
  29. int ramp_delay;
  30. bool buck2_ramp;
  31. bool buck3_ramp;
  32. bool buck4_ramp;
  33. bool buck2_gpiodvs;
  34. bool buck3_gpiodvs;
  35. bool buck4_gpiodvs;
  36. u8 buck2_vol[8];
  37. u8 buck3_vol[8];
  38. u8 buck4_vol[8];
  39. int buck_gpios[3];
  40. int buck_ds[3];
  41. int buck_gpioindex;
  42. };
  43. struct sec_voltage_desc {
  44. int max;
  45. int min;
  46. int step;
  47. };
  48. static const struct sec_voltage_desc buck_voltage_val1 = {
  49. .max = 2225000,
  50. .min = 650000,
  51. .step = 6250,
  52. };
  53. static const struct sec_voltage_desc buck_voltage_val2 = {
  54. .max = 1600000,
  55. .min = 600000,
  56. .step = 6250,
  57. };
  58. static const struct sec_voltage_desc buck_voltage_val3 = {
  59. .max = 3000000,
  60. .min = 750000,
  61. .step = 12500,
  62. };
  63. static const struct sec_voltage_desc ldo_voltage_val1 = {
  64. .max = 3950000,
  65. .min = 800000,
  66. .step = 50000,
  67. };
  68. static const struct sec_voltage_desc ldo_voltage_val2 = {
  69. .max = 2375000,
  70. .min = 800000,
  71. .step = 25000,
  72. };
  73. static const struct sec_voltage_desc *reg_voltage_map[] = {
  74. [S5M8767_LDO1] = &ldo_voltage_val2,
  75. [S5M8767_LDO2] = &ldo_voltage_val2,
  76. [S5M8767_LDO3] = &ldo_voltage_val1,
  77. [S5M8767_LDO4] = &ldo_voltage_val1,
  78. [S5M8767_LDO5] = &ldo_voltage_val1,
  79. [S5M8767_LDO6] = &ldo_voltage_val2,
  80. [S5M8767_LDO7] = &ldo_voltage_val2,
  81. [S5M8767_LDO8] = &ldo_voltage_val2,
  82. [S5M8767_LDO9] = &ldo_voltage_val1,
  83. [S5M8767_LDO10] = &ldo_voltage_val1,
  84. [S5M8767_LDO11] = &ldo_voltage_val1,
  85. [S5M8767_LDO12] = &ldo_voltage_val1,
  86. [S5M8767_LDO13] = &ldo_voltage_val1,
  87. [S5M8767_LDO14] = &ldo_voltage_val1,
  88. [S5M8767_LDO15] = &ldo_voltage_val2,
  89. [S5M8767_LDO16] = &ldo_voltage_val1,
  90. [S5M8767_LDO17] = &ldo_voltage_val1,
  91. [S5M8767_LDO18] = &ldo_voltage_val1,
  92. [S5M8767_LDO19] = &ldo_voltage_val1,
  93. [S5M8767_LDO20] = &ldo_voltage_val1,
  94. [S5M8767_LDO21] = &ldo_voltage_val1,
  95. [S5M8767_LDO22] = &ldo_voltage_val1,
  96. [S5M8767_LDO23] = &ldo_voltage_val1,
  97. [S5M8767_LDO24] = &ldo_voltage_val1,
  98. [S5M8767_LDO25] = &ldo_voltage_val1,
  99. [S5M8767_LDO26] = &ldo_voltage_val1,
  100. [S5M8767_LDO27] = &ldo_voltage_val1,
  101. [S5M8767_LDO28] = &ldo_voltage_val1,
  102. [S5M8767_BUCK1] = &buck_voltage_val1,
  103. [S5M8767_BUCK2] = &buck_voltage_val2,
  104. [S5M8767_BUCK3] = &buck_voltage_val2,
  105. [S5M8767_BUCK4] = &buck_voltage_val2,
  106. [S5M8767_BUCK5] = &buck_voltage_val1,
  107. [S5M8767_BUCK6] = &buck_voltage_val1,
  108. [S5M8767_BUCK7] = NULL,
  109. [S5M8767_BUCK8] = NULL,
  110. [S5M8767_BUCK9] = &buck_voltage_val3,
  111. };
  112. static unsigned int s5m8767_opmode_reg[][4] = {
  113. /* {OFF, ON, LOWPOWER, SUSPEND} */
  114. /* LDO1 ... LDO28 */
  115. {0x0, 0x3, 0x2, 0x1}, /* LDO1 */
  116. {0x0, 0x3, 0x2, 0x1},
  117. {0x0, 0x3, 0x2, 0x1},
  118. {0x0, 0x0, 0x0, 0x0},
  119. {0x0, 0x3, 0x2, 0x1}, /* LDO5 */
  120. {0x0, 0x3, 0x2, 0x1},
  121. {0x0, 0x3, 0x2, 0x1},
  122. {0x0, 0x3, 0x2, 0x1},
  123. {0x0, 0x3, 0x2, 0x1},
  124. {0x0, 0x3, 0x2, 0x1}, /* LDO10 */
  125. {0x0, 0x3, 0x2, 0x1},
  126. {0x0, 0x3, 0x2, 0x1},
  127. {0x0, 0x3, 0x2, 0x1},
  128. {0x0, 0x3, 0x2, 0x1},
  129. {0x0, 0x3, 0x2, 0x1}, /* LDO15 */
  130. {0x0, 0x3, 0x2, 0x1},
  131. {0x0, 0x3, 0x2, 0x1},
  132. {0x0, 0x0, 0x0, 0x0},
  133. {0x0, 0x3, 0x2, 0x1},
  134. {0x0, 0x3, 0x2, 0x1}, /* LDO20 */
  135. {0x0, 0x3, 0x2, 0x1},
  136. {0x0, 0x3, 0x2, 0x1},
  137. {0x0, 0x0, 0x0, 0x0},
  138. {0x0, 0x3, 0x2, 0x1},
  139. {0x0, 0x3, 0x2, 0x1}, /* LDO25 */
  140. {0x0, 0x3, 0x2, 0x1},
  141. {0x0, 0x3, 0x2, 0x1},
  142. {0x0, 0x3, 0x2, 0x1}, /* LDO28 */
  143. /* BUCK1 ... BUCK9 */
  144. {0x0, 0x3, 0x1, 0x1}, /* BUCK1 */
  145. {0x0, 0x3, 0x1, 0x1},
  146. {0x0, 0x3, 0x1, 0x1},
  147. {0x0, 0x3, 0x1, 0x1},
  148. {0x0, 0x3, 0x2, 0x1}, /* BUCK5 */
  149. {0x0, 0x3, 0x1, 0x1},
  150. {0x0, 0x3, 0x1, 0x1},
  151. {0x0, 0x3, 0x1, 0x1},
  152. {0x0, 0x3, 0x1, 0x1}, /* BUCK9 */
  153. };
  154. static int s5m8767_get_register(struct regulator_dev *rdev, int *reg,
  155. int *enable_ctrl)
  156. {
  157. int i, reg_id = rdev_get_id(rdev);
  158. unsigned int mode;
  159. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  160. switch (reg_id) {
  161. case S5M8767_LDO1 ... S5M8767_LDO2:
  162. *reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1);
  163. break;
  164. case S5M8767_LDO3 ... S5M8767_LDO28:
  165. *reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3);
  166. break;
  167. case S5M8767_BUCK1:
  168. *reg = S5M8767_REG_BUCK1CTRL1;
  169. break;
  170. case S5M8767_BUCK2 ... S5M8767_BUCK4:
  171. *reg = S5M8767_REG_BUCK2CTRL + (reg_id - S5M8767_BUCK2) * 9;
  172. break;
  173. case S5M8767_BUCK5:
  174. *reg = S5M8767_REG_BUCK5CTRL1;
  175. break;
  176. case S5M8767_BUCK6 ... S5M8767_BUCK9:
  177. *reg = S5M8767_REG_BUCK6CTRL1 + (reg_id - S5M8767_BUCK6) * 2;
  178. break;
  179. default:
  180. return -EINVAL;
  181. }
  182. for (i = 0; i < s5m8767->num_regulators; i++) {
  183. if (s5m8767->opmode[i].id == reg_id) {
  184. mode = s5m8767->opmode[i].mode;
  185. break;
  186. }
  187. }
  188. if (i < s5m8767->num_regulators)
  189. *enable_ctrl =
  190. s5m8767_opmode_reg[reg_id][mode] << S5M8767_ENCTRL_SHIFT;
  191. return 0;
  192. }
  193. static int s5m8767_reg_is_enabled(struct regulator_dev *rdev)
  194. {
  195. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  196. int ret, reg;
  197. int mask = 0xc0, enable_ctrl;
  198. unsigned int val;
  199. ret = s5m8767_get_register(rdev, &reg, &enable_ctrl);
  200. if (ret == -EINVAL)
  201. return 1;
  202. else if (ret)
  203. return ret;
  204. ret = sec_reg_read(s5m8767->iodev, reg, &val);
  205. if (ret)
  206. return ret;
  207. return (val & mask) == enable_ctrl;
  208. }
  209. static int s5m8767_reg_enable(struct regulator_dev *rdev)
  210. {
  211. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  212. int ret, reg;
  213. int mask = 0xc0, enable_ctrl;
  214. ret = s5m8767_get_register(rdev, &reg, &enable_ctrl);
  215. if (ret)
  216. return ret;
  217. return sec_reg_update(s5m8767->iodev, reg, enable_ctrl, mask);
  218. }
  219. static int s5m8767_reg_disable(struct regulator_dev *rdev)
  220. {
  221. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  222. int ret, reg;
  223. int mask = 0xc0, enable_ctrl;
  224. ret = s5m8767_get_register(rdev, &reg, &enable_ctrl);
  225. if (ret)
  226. return ret;
  227. return sec_reg_update(s5m8767->iodev, reg, ~mask, mask);
  228. }
  229. static int s5m8767_get_voltage_register(struct regulator_dev *rdev, int *_reg)
  230. {
  231. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  232. int reg_id = rdev_get_id(rdev);
  233. int reg;
  234. switch (reg_id) {
  235. case S5M8767_LDO1 ... S5M8767_LDO2:
  236. reg = S5M8767_REG_LDO1CTRL + (reg_id - S5M8767_LDO1);
  237. break;
  238. case S5M8767_LDO3 ... S5M8767_LDO28:
  239. reg = S5M8767_REG_LDO3CTRL + (reg_id - S5M8767_LDO3);
  240. break;
  241. case S5M8767_BUCK1:
  242. reg = S5M8767_REG_BUCK1CTRL2;
  243. break;
  244. case S5M8767_BUCK2:
  245. reg = S5M8767_REG_BUCK2DVS1;
  246. if (s5m8767->buck2_gpiodvs)
  247. reg += s5m8767->buck_gpioindex;
  248. break;
  249. case S5M8767_BUCK3:
  250. reg = S5M8767_REG_BUCK3DVS1;
  251. if (s5m8767->buck3_gpiodvs)
  252. reg += s5m8767->buck_gpioindex;
  253. break;
  254. case S5M8767_BUCK4:
  255. reg = S5M8767_REG_BUCK4DVS1;
  256. if (s5m8767->buck4_gpiodvs)
  257. reg += s5m8767->buck_gpioindex;
  258. break;
  259. case S5M8767_BUCK5:
  260. reg = S5M8767_REG_BUCK5CTRL2;
  261. break;
  262. case S5M8767_BUCK6 ... S5M8767_BUCK9:
  263. reg = S5M8767_REG_BUCK6CTRL2 + (reg_id - S5M8767_BUCK6) * 2;
  264. break;
  265. default:
  266. return -EINVAL;
  267. }
  268. *_reg = reg;
  269. return 0;
  270. }
  271. static int s5m8767_get_voltage_sel(struct regulator_dev *rdev)
  272. {
  273. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  274. int reg, mask, ret;
  275. int reg_id = rdev_get_id(rdev);
  276. unsigned int val;
  277. ret = s5m8767_get_voltage_register(rdev, &reg);
  278. if (ret)
  279. return ret;
  280. mask = (reg_id < S5M8767_BUCK1) ? 0x3f : 0xff;
  281. ret = sec_reg_read(s5m8767->iodev, reg, &val);
  282. if (ret)
  283. return ret;
  284. val &= mask;
  285. return val;
  286. }
  287. static int s5m8767_convert_voltage_to_sel(const struct sec_voltage_desc *desc,
  288. int min_vol)
  289. {
  290. int selector = 0;
  291. if (desc == NULL)
  292. return -EINVAL;
  293. if (min_vol > desc->max)
  294. return -EINVAL;
  295. if (min_vol < desc->min)
  296. min_vol = desc->min;
  297. selector = DIV_ROUND_UP(min_vol - desc->min, desc->step);
  298. if (desc->min + desc->step * selector > desc->max)
  299. return -EINVAL;
  300. return selector;
  301. }
  302. static inline int s5m8767_set_high(struct s5m8767_info *s5m8767)
  303. {
  304. int temp_index = s5m8767->buck_gpioindex;
  305. gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1);
  306. gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1);
  307. gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1);
  308. return 0;
  309. }
  310. static inline int s5m8767_set_low(struct s5m8767_info *s5m8767)
  311. {
  312. int temp_index = s5m8767->buck_gpioindex;
  313. gpio_set_value(s5m8767->buck_gpios[2], temp_index & 0x1);
  314. gpio_set_value(s5m8767->buck_gpios[1], (temp_index >> 1) & 0x1);
  315. gpio_set_value(s5m8767->buck_gpios[0], (temp_index >> 2) & 0x1);
  316. return 0;
  317. }
  318. static int s5m8767_set_voltage_sel(struct regulator_dev *rdev,
  319. unsigned selector)
  320. {
  321. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  322. int reg_id = rdev_get_id(rdev);
  323. int reg, mask, ret = 0, old_index, index = 0;
  324. u8 *buck234_vol = NULL;
  325. switch (reg_id) {
  326. case S5M8767_LDO1 ... S5M8767_LDO28:
  327. mask = 0x3f;
  328. break;
  329. case S5M8767_BUCK1 ... S5M8767_BUCK6:
  330. mask = 0xff;
  331. if (reg_id == S5M8767_BUCK2 && s5m8767->buck2_gpiodvs)
  332. buck234_vol = &s5m8767->buck2_vol[0];
  333. else if (reg_id == S5M8767_BUCK3 && s5m8767->buck3_gpiodvs)
  334. buck234_vol = &s5m8767->buck3_vol[0];
  335. else if (reg_id == S5M8767_BUCK4 && s5m8767->buck4_gpiodvs)
  336. buck234_vol = &s5m8767->buck4_vol[0];
  337. break;
  338. case S5M8767_BUCK7 ... S5M8767_BUCK8:
  339. return -EINVAL;
  340. case S5M8767_BUCK9:
  341. mask = 0xff;
  342. break;
  343. default:
  344. return -EINVAL;
  345. }
  346. /* buck234_vol != NULL means to control buck234 voltage via DVS GPIO */
  347. if (buck234_vol) {
  348. while (*buck234_vol != selector) {
  349. buck234_vol++;
  350. index++;
  351. }
  352. old_index = s5m8767->buck_gpioindex;
  353. s5m8767->buck_gpioindex = index;
  354. if (index > old_index)
  355. return s5m8767_set_high(s5m8767);
  356. else
  357. return s5m8767_set_low(s5m8767);
  358. } else {
  359. ret = s5m8767_get_voltage_register(rdev, &reg);
  360. if (ret)
  361. return ret;
  362. return sec_reg_update(s5m8767->iodev, reg, selector, mask);
  363. }
  364. }
  365. static int s5m8767_set_voltage_time_sel(struct regulator_dev *rdev,
  366. unsigned int old_sel,
  367. unsigned int new_sel)
  368. {
  369. struct s5m8767_info *s5m8767 = rdev_get_drvdata(rdev);
  370. const struct sec_voltage_desc *desc;
  371. int reg_id = rdev_get_id(rdev);
  372. desc = reg_voltage_map[reg_id];
  373. if ((old_sel < new_sel) && s5m8767->ramp_delay)
  374. return DIV_ROUND_UP(desc->step * (new_sel - old_sel),
  375. s5m8767->ramp_delay * 1000);
  376. return 0;
  377. }
  378. static struct regulator_ops s5m8767_ops = {
  379. .list_voltage = regulator_list_voltage_linear,
  380. .is_enabled = s5m8767_reg_is_enabled,
  381. .enable = s5m8767_reg_enable,
  382. .disable = s5m8767_reg_disable,
  383. .get_voltage_sel = s5m8767_get_voltage_sel,
  384. .set_voltage_sel = s5m8767_set_voltage_sel,
  385. .set_voltage_time_sel = s5m8767_set_voltage_time_sel,
  386. };
  387. static struct regulator_ops s5m8767_buck78_ops = {
  388. .is_enabled = s5m8767_reg_is_enabled,
  389. .enable = s5m8767_reg_enable,
  390. .disable = s5m8767_reg_disable,
  391. };
  392. #define s5m8767_regulator_desc(_name) { \
  393. .name = #_name, \
  394. .id = S5M8767_##_name, \
  395. .ops = &s5m8767_ops, \
  396. .type = REGULATOR_VOLTAGE, \
  397. .owner = THIS_MODULE, \
  398. }
  399. #define s5m8767_regulator_buck78_desc(_name) { \
  400. .name = #_name, \
  401. .id = S5M8767_##_name, \
  402. .ops = &s5m8767_buck78_ops, \
  403. .type = REGULATOR_VOLTAGE, \
  404. .owner = THIS_MODULE, \
  405. }
  406. static struct regulator_desc regulators[] = {
  407. s5m8767_regulator_desc(LDO1),
  408. s5m8767_regulator_desc(LDO2),
  409. s5m8767_regulator_desc(LDO3),
  410. s5m8767_regulator_desc(LDO4),
  411. s5m8767_regulator_desc(LDO5),
  412. s5m8767_regulator_desc(LDO6),
  413. s5m8767_regulator_desc(LDO7),
  414. s5m8767_regulator_desc(LDO8),
  415. s5m8767_regulator_desc(LDO9),
  416. s5m8767_regulator_desc(LDO10),
  417. s5m8767_regulator_desc(LDO11),
  418. s5m8767_regulator_desc(LDO12),
  419. s5m8767_regulator_desc(LDO13),
  420. s5m8767_regulator_desc(LDO14),
  421. s5m8767_regulator_desc(LDO15),
  422. s5m8767_regulator_desc(LDO16),
  423. s5m8767_regulator_desc(LDO17),
  424. s5m8767_regulator_desc(LDO18),
  425. s5m8767_regulator_desc(LDO19),
  426. s5m8767_regulator_desc(LDO20),
  427. s5m8767_regulator_desc(LDO21),
  428. s5m8767_regulator_desc(LDO22),
  429. s5m8767_regulator_desc(LDO23),
  430. s5m8767_regulator_desc(LDO24),
  431. s5m8767_regulator_desc(LDO25),
  432. s5m8767_regulator_desc(LDO26),
  433. s5m8767_regulator_desc(LDO27),
  434. s5m8767_regulator_desc(LDO28),
  435. s5m8767_regulator_desc(BUCK1),
  436. s5m8767_regulator_desc(BUCK2),
  437. s5m8767_regulator_desc(BUCK3),
  438. s5m8767_regulator_desc(BUCK4),
  439. s5m8767_regulator_desc(BUCK5),
  440. s5m8767_regulator_desc(BUCK6),
  441. s5m8767_regulator_buck78_desc(BUCK7),
  442. s5m8767_regulator_buck78_desc(BUCK8),
  443. s5m8767_regulator_desc(BUCK9),
  444. };
  445. static int s5m8767_pmic_probe(struct platform_device *pdev)
  446. {
  447. struct sec_pmic_dev *iodev = dev_get_drvdata(pdev->dev.parent);
  448. struct sec_platform_data *pdata = dev_get_platdata(iodev->dev);
  449. struct regulator_config config = { };
  450. struct regulator_dev **rdev;
  451. struct s5m8767_info *s5m8767;
  452. int i, ret, size, buck_init;
  453. if (!pdata) {
  454. dev_err(pdev->dev.parent, "Platform data not supplied\n");
  455. return -ENODEV;
  456. }
  457. if (pdata->buck2_gpiodvs) {
  458. if (pdata->buck3_gpiodvs || pdata->buck4_gpiodvs) {
  459. dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
  460. return -EINVAL;
  461. }
  462. }
  463. if (pdata->buck3_gpiodvs) {
  464. if (pdata->buck2_gpiodvs || pdata->buck4_gpiodvs) {
  465. dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
  466. return -EINVAL;
  467. }
  468. }
  469. if (pdata->buck4_gpiodvs) {
  470. if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs) {
  471. dev_err(&pdev->dev, "S5M8767 GPIO DVS NOT VALID\n");
  472. return -EINVAL;
  473. }
  474. }
  475. s5m8767 = devm_kzalloc(&pdev->dev, sizeof(struct s5m8767_info),
  476. GFP_KERNEL);
  477. if (!s5m8767)
  478. return -ENOMEM;
  479. size = sizeof(struct regulator_dev *) * (S5M8767_REG_MAX - 2);
  480. s5m8767->rdev = devm_kzalloc(&pdev->dev, size, GFP_KERNEL);
  481. if (!s5m8767->rdev)
  482. return -ENOMEM;
  483. rdev = s5m8767->rdev;
  484. s5m8767->dev = &pdev->dev;
  485. s5m8767->iodev = iodev;
  486. s5m8767->num_regulators = pdata->num_regulators;
  487. platform_set_drvdata(pdev, s5m8767);
  488. s5m8767->buck_gpioindex = pdata->buck_default_idx;
  489. s5m8767->buck2_gpiodvs = pdata->buck2_gpiodvs;
  490. s5m8767->buck3_gpiodvs = pdata->buck3_gpiodvs;
  491. s5m8767->buck4_gpiodvs = pdata->buck4_gpiodvs;
  492. s5m8767->buck_gpios[0] = pdata->buck_gpios[0];
  493. s5m8767->buck_gpios[1] = pdata->buck_gpios[1];
  494. s5m8767->buck_gpios[2] = pdata->buck_gpios[2];
  495. s5m8767->buck_ds[0] = pdata->buck_ds[0];
  496. s5m8767->buck_ds[1] = pdata->buck_ds[1];
  497. s5m8767->buck_ds[2] = pdata->buck_ds[2];
  498. s5m8767->ramp_delay = pdata->buck_ramp_delay;
  499. s5m8767->buck2_ramp = pdata->buck2_ramp_enable;
  500. s5m8767->buck3_ramp = pdata->buck3_ramp_enable;
  501. s5m8767->buck4_ramp = pdata->buck4_ramp_enable;
  502. s5m8767->opmode = pdata->opmode;
  503. buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
  504. pdata->buck2_init);
  505. sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK2DVS2, buck_init);
  506. buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
  507. pdata->buck3_init);
  508. sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK3DVS2, buck_init);
  509. buck_init = s5m8767_convert_voltage_to_sel(&buck_voltage_val2,
  510. pdata->buck4_init);
  511. sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK4DVS2, buck_init);
  512. for (i = 0; i < 8; i++) {
  513. if (s5m8767->buck2_gpiodvs) {
  514. s5m8767->buck2_vol[i] =
  515. s5m8767_convert_voltage_to_sel(
  516. &buck_voltage_val2,
  517. pdata->buck2_voltage[i]);
  518. }
  519. if (s5m8767->buck3_gpiodvs) {
  520. s5m8767->buck3_vol[i] =
  521. s5m8767_convert_voltage_to_sel(
  522. &buck_voltage_val2,
  523. pdata->buck3_voltage[i]);
  524. }
  525. if (s5m8767->buck4_gpiodvs) {
  526. s5m8767->buck4_vol[i] =
  527. s5m8767_convert_voltage_to_sel(
  528. &buck_voltage_val2,
  529. pdata->buck4_voltage[i]);
  530. }
  531. }
  532. if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
  533. pdata->buck4_gpiodvs) {
  534. if (!gpio_is_valid(pdata->buck_gpios[0]) ||
  535. !gpio_is_valid(pdata->buck_gpios[1]) ||
  536. !gpio_is_valid(pdata->buck_gpios[2])) {
  537. dev_err(&pdev->dev, "GPIO NOT VALID\n");
  538. return -EINVAL;
  539. }
  540. ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[0],
  541. "S5M8767 SET1");
  542. if (ret)
  543. return ret;
  544. ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[1],
  545. "S5M8767 SET2");
  546. if (ret)
  547. return ret;
  548. ret = devm_gpio_request(&pdev->dev, pdata->buck_gpios[2],
  549. "S5M8767 SET3");
  550. if (ret)
  551. return ret;
  552. /* SET1 GPIO */
  553. gpio_direction_output(pdata->buck_gpios[0],
  554. (s5m8767->buck_gpioindex >> 2) & 0x1);
  555. /* SET2 GPIO */
  556. gpio_direction_output(pdata->buck_gpios[1],
  557. (s5m8767->buck_gpioindex >> 1) & 0x1);
  558. /* SET3 GPIO */
  559. gpio_direction_output(pdata->buck_gpios[2],
  560. (s5m8767->buck_gpioindex >> 0) & 0x1);
  561. }
  562. ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[0], "S5M8767 DS2");
  563. if (ret)
  564. return ret;
  565. ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[1], "S5M8767 DS3");
  566. if (ret)
  567. return ret;
  568. ret = devm_gpio_request(&pdev->dev, pdata->buck_ds[2], "S5M8767 DS4");
  569. if (ret)
  570. return ret;
  571. /* DS2 GPIO */
  572. gpio_direction_output(pdata->buck_ds[0], 0x0);
  573. /* DS3 GPIO */
  574. gpio_direction_output(pdata->buck_ds[1], 0x0);
  575. /* DS4 GPIO */
  576. gpio_direction_output(pdata->buck_ds[2], 0x0);
  577. if (pdata->buck2_gpiodvs || pdata->buck3_gpiodvs ||
  578. pdata->buck4_gpiodvs) {
  579. sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK2CTRL,
  580. (pdata->buck2_gpiodvs) ? (1 << 1) : (0 << 1),
  581. 1 << 1);
  582. sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK3CTRL,
  583. (pdata->buck3_gpiodvs) ? (1 << 1) : (0 << 1),
  584. 1 << 1);
  585. sec_reg_update(s5m8767->iodev, S5M8767_REG_BUCK4CTRL,
  586. (pdata->buck4_gpiodvs) ? (1 << 1) : (0 << 1),
  587. 1 << 1);
  588. }
  589. /* Initialize GPIO DVS registers */
  590. for (i = 0; i < 8; i++) {
  591. if (s5m8767->buck2_gpiodvs) {
  592. sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK2DVS1 + i,
  593. s5m8767->buck2_vol[i]);
  594. }
  595. if (s5m8767->buck3_gpiodvs) {
  596. sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK3DVS1 + i,
  597. s5m8767->buck3_vol[i]);
  598. }
  599. if (s5m8767->buck4_gpiodvs) {
  600. sec_reg_write(s5m8767->iodev, S5M8767_REG_BUCK4DVS1 + i,
  601. s5m8767->buck4_vol[i]);
  602. }
  603. }
  604. if (s5m8767->buck2_ramp)
  605. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x08, 0x08);
  606. if (s5m8767->buck3_ramp)
  607. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x04, 0x04);
  608. if (s5m8767->buck4_ramp)
  609. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP, 0x02, 0x02);
  610. if (s5m8767->buck2_ramp || s5m8767->buck3_ramp
  611. || s5m8767->buck4_ramp) {
  612. switch (s5m8767->ramp_delay) {
  613. case 5:
  614. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
  615. 0x40, 0xf0);
  616. break;
  617. case 10:
  618. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
  619. 0x90, 0xf0);
  620. break;
  621. case 25:
  622. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
  623. 0xd0, 0xf0);
  624. break;
  625. case 50:
  626. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
  627. 0xe0, 0xf0);
  628. break;
  629. case 100:
  630. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
  631. 0xf0, 0xf0);
  632. break;
  633. default:
  634. sec_reg_update(s5m8767->iodev, S5M8767_REG_DVSRAMP,
  635. 0x90, 0xf0);
  636. }
  637. }
  638. for (i = 0; i < pdata->num_regulators; i++) {
  639. const struct sec_voltage_desc *desc;
  640. int id = pdata->regulators[i].id;
  641. desc = reg_voltage_map[id];
  642. if (desc) {
  643. regulators[id].n_voltages =
  644. (desc->max - desc->min) / desc->step + 1;
  645. regulators[id].min_uV = desc->min;
  646. regulators[id].uV_step = desc->step;
  647. }
  648. config.dev = s5m8767->dev;
  649. config.init_data = pdata->regulators[i].initdata;
  650. config.driver_data = s5m8767;
  651. rdev[i] = regulator_register(&regulators[id], &config);
  652. if (IS_ERR(rdev[i])) {
  653. ret = PTR_ERR(rdev[i]);
  654. dev_err(s5m8767->dev, "regulator init failed for %d\n",
  655. id);
  656. rdev[i] = NULL;
  657. goto err;
  658. }
  659. }
  660. return 0;
  661. err:
  662. for (i = 0; i < s5m8767->num_regulators; i++)
  663. if (rdev[i])
  664. regulator_unregister(rdev[i]);
  665. return ret;
  666. }
  667. static int s5m8767_pmic_remove(struct platform_device *pdev)
  668. {
  669. struct s5m8767_info *s5m8767 = platform_get_drvdata(pdev);
  670. struct regulator_dev **rdev = s5m8767->rdev;
  671. int i;
  672. for (i = 0; i < s5m8767->num_regulators; i++)
  673. if (rdev[i])
  674. regulator_unregister(rdev[i]);
  675. return 0;
  676. }
  677. static const struct platform_device_id s5m8767_pmic_id[] = {
  678. { "s5m8767-pmic", 0},
  679. { },
  680. };
  681. MODULE_DEVICE_TABLE(platform, s5m8767_pmic_id);
  682. static struct platform_driver s5m8767_pmic_driver = {
  683. .driver = {
  684. .name = "s5m8767-pmic",
  685. .owner = THIS_MODULE,
  686. },
  687. .probe = s5m8767_pmic_probe,
  688. .remove = s5m8767_pmic_remove,
  689. .id_table = s5m8767_pmic_id,
  690. };
  691. static int __init s5m8767_pmic_init(void)
  692. {
  693. return platform_driver_register(&s5m8767_pmic_driver);
  694. }
  695. subsys_initcall(s5m8767_pmic_init);
  696. static void __exit s5m8767_pmic_exit(void)
  697. {
  698. platform_driver_unregister(&s5m8767_pmic_driver);
  699. }
  700. module_exit(s5m8767_pmic_exit);
  701. /* Module information */
  702. MODULE_AUTHOR("Sangbeom Kim <sbkim73@samsung.com>");
  703. MODULE_DESCRIPTION("SAMSUNG S5M8767 Regulator Driver");
  704. MODULE_LICENSE("GPL");