io.c 4.6 KB

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  1. /* arch/arm/mach-msm/io.c
  2. *
  3. * MSM7K, QSD io support
  4. *
  5. * Copyright (C) 2007 Google, Inc.
  6. * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
  7. * Author: Brian Swetland <swetland@google.com>
  8. *
  9. * This software is licensed under the terms of the GNU General Public
  10. * License version 2, as published by the Free Software Foundation, and
  11. * may be copied, distributed, and modified under those terms.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/init.h>
  21. #include <linux/io.h>
  22. #include <mach/hardware.h>
  23. #include <asm/page.h>
  24. #include <mach/msm_iomap.h>
  25. #include <asm/mach/map.h>
  26. #include <mach/board.h>
  27. #define MSM_CHIP_DEVICE(name, chip) { \
  28. .virtual = (unsigned long) MSM_##name##_BASE, \
  29. .pfn = __phys_to_pfn(chip##_##name##_PHYS), \
  30. .length = chip##_##name##_SIZE, \
  31. .type = MT_DEVICE_NONSHARED, \
  32. }
  33. #define MSM_DEVICE(name) MSM_CHIP_DEVICE(name, MSM)
  34. #if defined(CONFIG_ARCH_MSM7X00A) || defined(CONFIG_ARCH_MSM7X27) \
  35. || defined(CONFIG_ARCH_MSM7X25)
  36. static struct map_desc msm_io_desc[] __initdata = {
  37. MSM_DEVICE(VIC),
  38. MSM_CHIP_DEVICE(CSR, MSM7X00),
  39. MSM_DEVICE(GPT),
  40. MSM_DEVICE(DMOV),
  41. MSM_DEVICE(GPIO1),
  42. MSM_DEVICE(GPIO2),
  43. MSM_DEVICE(CLK_CTL),
  44. #ifdef CONFIG_MSM_DEBUG_UART
  45. MSM_DEVICE(DEBUG_UART),
  46. #endif
  47. #ifdef CONFIG_ARCH_MSM7X30
  48. MSM_DEVICE(GCC),
  49. #endif
  50. {
  51. .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
  52. .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
  53. .length = MSM_SHARED_RAM_SIZE,
  54. .type = MT_DEVICE,
  55. },
  56. };
  57. void __init msm_map_common_io(void)
  58. {
  59. /* Make sure the peripheral register window is closed, since
  60. * we will use PTE flags (TEX[1]=1,B=0,C=1) to determine which
  61. * pages are peripheral interface or not.
  62. */
  63. asm("mcr p15, 0, %0, c15, c2, 4" : : "r" (0));
  64. iotable_init(msm_io_desc, ARRAY_SIZE(msm_io_desc));
  65. }
  66. #endif
  67. #ifdef CONFIG_ARCH_QSD8X50
  68. static struct map_desc qsd8x50_io_desc[] __initdata = {
  69. MSM_DEVICE(VIC),
  70. MSM_CHIP_DEVICE(CSR, QSD8X50),
  71. MSM_DEVICE(DMOV),
  72. MSM_DEVICE(GPIO1),
  73. MSM_DEVICE(GPIO2),
  74. MSM_DEVICE(CLK_CTL),
  75. MSM_DEVICE(SIRC),
  76. MSM_DEVICE(SCPLL),
  77. MSM_DEVICE(AD5),
  78. MSM_DEVICE(MDC),
  79. #ifdef CONFIG_MSM_DEBUG_UART
  80. MSM_DEVICE(DEBUG_UART),
  81. #endif
  82. {
  83. .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
  84. .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
  85. .length = MSM_SHARED_RAM_SIZE,
  86. .type = MT_DEVICE,
  87. },
  88. };
  89. void __init msm_map_qsd8x50_io(void)
  90. {
  91. iotable_init(qsd8x50_io_desc, ARRAY_SIZE(qsd8x50_io_desc));
  92. }
  93. #endif /* CONFIG_ARCH_QSD8X50 */
  94. #ifdef CONFIG_ARCH_MSM8X60
  95. static struct map_desc msm8x60_io_desc[] __initdata = {
  96. MSM_CHIP_DEVICE(QGIC_DIST, MSM8X60),
  97. MSM_CHIP_DEVICE(QGIC_CPU, MSM8X60),
  98. MSM_CHIP_DEVICE(TMR, MSM8X60),
  99. MSM_CHIP_DEVICE(TMR0, MSM8X60),
  100. MSM_DEVICE(ACC),
  101. MSM_DEVICE(GCC),
  102. };
  103. void __init msm_map_msm8x60_io(void)
  104. {
  105. iotable_init(msm8x60_io_desc, ARRAY_SIZE(msm8x60_io_desc));
  106. }
  107. #endif /* CONFIG_ARCH_MSM8X60 */
  108. #ifdef CONFIG_ARCH_MSM8960
  109. static struct map_desc msm8960_io_desc[] __initdata = {
  110. MSM_CHIP_DEVICE(QGIC_DIST, MSM8960),
  111. MSM_CHIP_DEVICE(QGIC_CPU, MSM8960),
  112. MSM_CHIP_DEVICE(TMR, MSM8960),
  113. MSM_CHIP_DEVICE(TMR0, MSM8960),
  114. };
  115. void __init msm_map_msm8960_io(void)
  116. {
  117. iotable_init(msm8960_io_desc, ARRAY_SIZE(msm8960_io_desc));
  118. }
  119. #endif /* CONFIG_ARCH_MSM8960 */
  120. #ifdef CONFIG_ARCH_MSM7X30
  121. static struct map_desc msm7x30_io_desc[] __initdata = {
  122. MSM_DEVICE(VIC),
  123. MSM_CHIP_DEVICE(CSR, MSM7X30),
  124. MSM_DEVICE(DMOV),
  125. MSM_DEVICE(GPIO1),
  126. MSM_DEVICE(GPIO2),
  127. MSM_DEVICE(CLK_CTL),
  128. MSM_DEVICE(CLK_CTL_SH2),
  129. MSM_DEVICE(AD5),
  130. MSM_DEVICE(MDC),
  131. MSM_DEVICE(ACC),
  132. MSM_DEVICE(SAW),
  133. MSM_DEVICE(GCC),
  134. MSM_DEVICE(TCSR),
  135. #ifdef CONFIG_MSM_DEBUG_UART
  136. MSM_DEVICE(DEBUG_UART),
  137. #endif
  138. {
  139. .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
  140. .pfn = __phys_to_pfn(MSM_SHARED_RAM_PHYS),
  141. .length = MSM_SHARED_RAM_SIZE,
  142. .type = MT_DEVICE,
  143. },
  144. };
  145. void __init msm_map_msm7x30_io(void)
  146. {
  147. iotable_init(msm7x30_io_desc, ARRAY_SIZE(msm7x30_io_desc));
  148. }
  149. #endif /* CONFIG_ARCH_MSM7X30 */
  150. void __iomem *
  151. __msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
  152. {
  153. if (mtype == MT_DEVICE) {
  154. /* The peripherals in the 88000000 - D0000000 range
  155. * are only accessible by type MT_DEVICE_NONSHARED.
  156. * Adjust mtype as necessary to make this "just work."
  157. */
  158. if ((phys_addr >= 0x88000000) && (phys_addr < 0xD0000000))
  159. mtype = MT_DEVICE_NONSHARED;
  160. }
  161. return __arm_ioremap_caller(phys_addr, size, mtype,
  162. __builtin_return_address(0));
  163. }
  164. EXPORT_SYMBOL(__msm_ioremap);