xonar_wm87x6.c 32 KB

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  1. /*
  2. * card driver for models with WM8776/WM8766 DACs (Xonar DS)
  3. *
  4. * Copyright (c) Clemens Ladisch <clemens@ladisch.de>
  5. *
  6. *
  7. * This driver is free software; you can redistribute it and/or modify
  8. * it under the terms of the GNU General Public License, version 2.
  9. *
  10. * This driver is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this driver; if not, see <http://www.gnu.org/licenses/>.
  17. */
  18. /*
  19. * Xonar DS
  20. * --------
  21. *
  22. * CMI8788:
  23. *
  24. * SPI 0 -> WM8766 (surround, center/LFE, back)
  25. * SPI 1 -> WM8776 (front, input)
  26. *
  27. * GPIO 4 <- headphone detect, 0 = plugged
  28. * GPIO 6 -> route input jack to mic-in (0) or line-in (1)
  29. * GPIO 7 -> enable output to front L/R speaker channels
  30. * GPIO 8 -> enable output to other speaker channels and front panel headphone
  31. *
  32. * WM8766:
  33. *
  34. * input 1 <- line
  35. * input 2 <- mic
  36. * input 3 <- front mic
  37. * input 4 <- aux
  38. */
  39. #include <linux/pci.h>
  40. #include <linux/delay.h>
  41. #include <sound/control.h>
  42. #include <sound/core.h>
  43. #include <sound/jack.h>
  44. #include <sound/pcm.h>
  45. #include <sound/pcm_params.h>
  46. #include <sound/tlv.h>
  47. #include "xonar.h"
  48. #include "wm8776.h"
  49. #include "wm8766.h"
  50. #define GPIO_DS_HP_DETECT 0x0010
  51. #define GPIO_DS_INPUT_ROUTE 0x0040
  52. #define GPIO_DS_OUTPUT_FRONTLR 0x0080
  53. #define GPIO_DS_OUTPUT_ENABLE 0x0100
  54. #define LC_CONTROL_LIMITER 0x40000000
  55. #define LC_CONTROL_ALC 0x20000000
  56. struct xonar_wm87x6 {
  57. struct xonar_generic generic;
  58. u16 wm8776_regs[0x17];
  59. u16 wm8766_regs[0x10];
  60. struct snd_kcontrol *line_adcmux_control;
  61. struct snd_kcontrol *mic_adcmux_control;
  62. struct snd_kcontrol *lc_controls[13];
  63. struct snd_jack *hp_jack;
  64. };
  65. static void wm8776_write(struct oxygen *chip,
  66. unsigned int reg, unsigned int value)
  67. {
  68. struct xonar_wm87x6 *data = chip->model_data;
  69. oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
  70. OXYGEN_SPI_DATA_LENGTH_2 |
  71. OXYGEN_SPI_CLOCK_160 |
  72. (1 << OXYGEN_SPI_CODEC_SHIFT) |
  73. OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
  74. (reg << 9) | value);
  75. if (reg < ARRAY_SIZE(data->wm8776_regs)) {
  76. if (reg >= WM8776_HPLVOL && reg <= WM8776_DACMASTER)
  77. value &= ~WM8776_UPDATE;
  78. data->wm8776_regs[reg] = value;
  79. }
  80. }
  81. static void wm8776_write_cached(struct oxygen *chip,
  82. unsigned int reg, unsigned int value)
  83. {
  84. struct xonar_wm87x6 *data = chip->model_data;
  85. if (reg >= ARRAY_SIZE(data->wm8776_regs) ||
  86. value != data->wm8776_regs[reg])
  87. wm8776_write(chip, reg, value);
  88. }
  89. static void wm8766_write(struct oxygen *chip,
  90. unsigned int reg, unsigned int value)
  91. {
  92. struct xonar_wm87x6 *data = chip->model_data;
  93. oxygen_write_spi(chip, OXYGEN_SPI_TRIGGER |
  94. OXYGEN_SPI_DATA_LENGTH_2 |
  95. OXYGEN_SPI_CLOCK_160 |
  96. (0 << OXYGEN_SPI_CODEC_SHIFT) |
  97. OXYGEN_SPI_CEN_LATCH_CLOCK_LO,
  98. (reg << 9) | value);
  99. if (reg < ARRAY_SIZE(data->wm8766_regs)) {
  100. if ((reg >= WM8766_LDA1 && reg <= WM8766_RDA1) ||
  101. (reg >= WM8766_LDA2 && reg <= WM8766_MASTDA))
  102. value &= ~WM8766_UPDATE;
  103. data->wm8766_regs[reg] = value;
  104. }
  105. }
  106. static void wm8766_write_cached(struct oxygen *chip,
  107. unsigned int reg, unsigned int value)
  108. {
  109. struct xonar_wm87x6 *data = chip->model_data;
  110. if (reg >= ARRAY_SIZE(data->wm8766_regs) ||
  111. value != data->wm8766_regs[reg])
  112. wm8766_write(chip, reg, value);
  113. }
  114. static void wm8776_registers_init(struct oxygen *chip)
  115. {
  116. struct xonar_wm87x6 *data = chip->model_data;
  117. wm8776_write(chip, WM8776_RESET, 0);
  118. wm8776_write(chip, WM8776_DACCTRL1, WM8776_DZCEN |
  119. WM8776_PL_LEFT_LEFT | WM8776_PL_RIGHT_RIGHT);
  120. wm8776_write(chip, WM8776_DACMUTE, chip->dac_mute ? WM8776_DMUTE : 0);
  121. wm8776_write(chip, WM8776_DACIFCTRL,
  122. WM8776_DACFMT_LJUST | WM8776_DACWL_24);
  123. wm8776_write(chip, WM8776_ADCIFCTRL,
  124. data->wm8776_regs[WM8776_ADCIFCTRL]);
  125. wm8776_write(chip, WM8776_MSTRCTRL, data->wm8776_regs[WM8776_MSTRCTRL]);
  126. wm8776_write(chip, WM8776_PWRDOWN, data->wm8776_regs[WM8776_PWRDOWN]);
  127. wm8776_write(chip, WM8776_HPLVOL, data->wm8776_regs[WM8776_HPLVOL]);
  128. wm8776_write(chip, WM8776_HPRVOL, data->wm8776_regs[WM8776_HPRVOL] |
  129. WM8776_UPDATE);
  130. wm8776_write(chip, WM8776_ADCLVOL, data->wm8776_regs[WM8776_ADCLVOL]);
  131. wm8776_write(chip, WM8776_ADCRVOL, data->wm8776_regs[WM8776_ADCRVOL]);
  132. wm8776_write(chip, WM8776_ADCMUX, data->wm8776_regs[WM8776_ADCMUX]);
  133. wm8776_write(chip, WM8776_DACLVOL, chip->dac_volume[0]);
  134. wm8776_write(chip, WM8776_DACRVOL, chip->dac_volume[1] | WM8776_UPDATE);
  135. }
  136. static void wm8766_registers_init(struct oxygen *chip)
  137. {
  138. struct xonar_wm87x6 *data = chip->model_data;
  139. wm8766_write(chip, WM8766_RESET, 0);
  140. wm8766_write(chip, WM8766_DAC_CTRL, data->wm8766_regs[WM8766_DAC_CTRL]);
  141. wm8766_write(chip, WM8766_INT_CTRL, WM8766_FMT_LJUST | WM8766_IWL_24);
  142. wm8766_write(chip, WM8766_DAC_CTRL2,
  143. WM8766_ZCD | (chip->dac_mute ? WM8766_DMUTE_MASK : 0));
  144. wm8766_write(chip, WM8766_LDA1, chip->dac_volume[2]);
  145. wm8766_write(chip, WM8766_RDA1, chip->dac_volume[3]);
  146. wm8766_write(chip, WM8766_LDA2, chip->dac_volume[4]);
  147. wm8766_write(chip, WM8766_RDA2, chip->dac_volume[5]);
  148. wm8766_write(chip, WM8766_LDA3, chip->dac_volume[6]);
  149. wm8766_write(chip, WM8766_RDA3, chip->dac_volume[7] | WM8766_UPDATE);
  150. }
  151. static void wm8776_init(struct oxygen *chip)
  152. {
  153. struct xonar_wm87x6 *data = chip->model_data;
  154. data->wm8776_regs[WM8776_HPLVOL] = (0x79 - 60) | WM8776_HPZCEN;
  155. data->wm8776_regs[WM8776_HPRVOL] = (0x79 - 60) | WM8776_HPZCEN;
  156. data->wm8776_regs[WM8776_ADCIFCTRL] =
  157. WM8776_ADCFMT_LJUST | WM8776_ADCWL_24 | WM8776_ADCMCLK;
  158. data->wm8776_regs[WM8776_MSTRCTRL] =
  159. WM8776_ADCRATE_256 | WM8776_DACRATE_256;
  160. data->wm8776_regs[WM8776_PWRDOWN] = WM8776_HPPD;
  161. data->wm8776_regs[WM8776_ADCLVOL] = 0xa5 | WM8776_ZCA;
  162. data->wm8776_regs[WM8776_ADCRVOL] = 0xa5 | WM8776_ZCA;
  163. data->wm8776_regs[WM8776_ADCMUX] = 0x001;
  164. wm8776_registers_init(chip);
  165. }
  166. static void wm8766_init(struct oxygen *chip)
  167. {
  168. struct xonar_wm87x6 *data = chip->model_data;
  169. data->wm8766_regs[WM8766_DAC_CTRL] =
  170. WM8766_PL_LEFT_LEFT | WM8766_PL_RIGHT_RIGHT;
  171. wm8766_registers_init(chip);
  172. }
  173. static void xonar_ds_handle_hp_jack(struct oxygen *chip)
  174. {
  175. struct xonar_wm87x6 *data = chip->model_data;
  176. bool hp_plugged;
  177. unsigned int reg;
  178. mutex_lock(&chip->mutex);
  179. hp_plugged = !(oxygen_read16(chip, OXYGEN_GPIO_DATA) &
  180. GPIO_DS_HP_DETECT);
  181. oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
  182. hp_plugged ? 0 : GPIO_DS_OUTPUT_FRONTLR,
  183. GPIO_DS_OUTPUT_FRONTLR);
  184. reg = data->wm8766_regs[WM8766_DAC_CTRL] & ~WM8766_MUTEALL;
  185. if (hp_plugged)
  186. reg |= WM8766_MUTEALL;
  187. wm8766_write_cached(chip, WM8766_DAC_CTRL, reg);
  188. snd_jack_report(data->hp_jack, hp_plugged ? SND_JACK_HEADPHONE : 0);
  189. mutex_unlock(&chip->mutex);
  190. }
  191. static void xonar_ds_init(struct oxygen *chip)
  192. {
  193. struct xonar_wm87x6 *data = chip->model_data;
  194. data->generic.anti_pop_delay = 300;
  195. data->generic.output_enable_bit = GPIO_DS_OUTPUT_ENABLE;
  196. wm8776_init(chip);
  197. wm8766_init(chip);
  198. oxygen_set_bits16(chip, OXYGEN_GPIO_CONTROL,
  199. GPIO_DS_INPUT_ROUTE | GPIO_DS_OUTPUT_FRONTLR);
  200. oxygen_clear_bits16(chip, OXYGEN_GPIO_CONTROL,
  201. GPIO_DS_HP_DETECT);
  202. oxygen_set_bits16(chip, OXYGEN_GPIO_DATA, GPIO_DS_INPUT_ROUTE);
  203. oxygen_set_bits16(chip, OXYGEN_GPIO_INTERRUPT_MASK, GPIO_DS_HP_DETECT);
  204. chip->interrupt_mask |= OXYGEN_INT_GPIO;
  205. xonar_enable_output(chip);
  206. snd_jack_new(chip->card, "Headphone",
  207. SND_JACK_HEADPHONE, &data->hp_jack);
  208. xonar_ds_handle_hp_jack(chip);
  209. snd_component_add(chip->card, "WM8776");
  210. snd_component_add(chip->card, "WM8766");
  211. }
  212. static void xonar_ds_cleanup(struct oxygen *chip)
  213. {
  214. xonar_disable_output(chip);
  215. wm8776_write(chip, WM8776_RESET, 0);
  216. }
  217. static void xonar_ds_suspend(struct oxygen *chip)
  218. {
  219. xonar_ds_cleanup(chip);
  220. }
  221. static void xonar_ds_resume(struct oxygen *chip)
  222. {
  223. wm8776_registers_init(chip);
  224. wm8766_registers_init(chip);
  225. xonar_enable_output(chip);
  226. xonar_ds_handle_hp_jack(chip);
  227. }
  228. static void wm8776_adc_hardware_filter(unsigned int channel,
  229. struct snd_pcm_hardware *hardware)
  230. {
  231. if (channel == PCM_A) {
  232. hardware->rates = SNDRV_PCM_RATE_32000 |
  233. SNDRV_PCM_RATE_44100 |
  234. SNDRV_PCM_RATE_48000 |
  235. SNDRV_PCM_RATE_64000 |
  236. SNDRV_PCM_RATE_88200 |
  237. SNDRV_PCM_RATE_96000;
  238. hardware->rate_max = 96000;
  239. }
  240. }
  241. static void set_wm87x6_dac_params(struct oxygen *chip,
  242. struct snd_pcm_hw_params *params)
  243. {
  244. }
  245. static void set_wm8776_adc_params(struct oxygen *chip,
  246. struct snd_pcm_hw_params *params)
  247. {
  248. u16 reg;
  249. reg = WM8776_ADCRATE_256 | WM8776_DACRATE_256;
  250. if (params_rate(params) > 48000)
  251. reg |= WM8776_ADCOSR;
  252. wm8776_write_cached(chip, WM8776_MSTRCTRL, reg);
  253. }
  254. static void update_wm8776_volume(struct oxygen *chip)
  255. {
  256. struct xonar_wm87x6 *data = chip->model_data;
  257. u8 to_change;
  258. if (chip->dac_volume[0] == chip->dac_volume[1]) {
  259. if (chip->dac_volume[0] != data->wm8776_regs[WM8776_DACLVOL] ||
  260. chip->dac_volume[1] != data->wm8776_regs[WM8776_DACRVOL]) {
  261. wm8776_write(chip, WM8776_DACMASTER,
  262. chip->dac_volume[0] | WM8776_UPDATE);
  263. data->wm8776_regs[WM8776_DACLVOL] = chip->dac_volume[0];
  264. data->wm8776_regs[WM8776_DACRVOL] = chip->dac_volume[0];
  265. }
  266. } else {
  267. to_change = (chip->dac_volume[0] !=
  268. data->wm8776_regs[WM8776_DACLVOL]) << 0;
  269. to_change |= (chip->dac_volume[1] !=
  270. data->wm8776_regs[WM8776_DACLVOL]) << 1;
  271. if (to_change & 1)
  272. wm8776_write(chip, WM8776_DACLVOL, chip->dac_volume[0] |
  273. ((to_change & 2) ? 0 : WM8776_UPDATE));
  274. if (to_change & 2)
  275. wm8776_write(chip, WM8776_DACRVOL,
  276. chip->dac_volume[1] | WM8776_UPDATE);
  277. }
  278. }
  279. static void update_wm87x6_volume(struct oxygen *chip)
  280. {
  281. static const u8 wm8766_regs[6] = {
  282. WM8766_LDA1, WM8766_RDA1,
  283. WM8766_LDA2, WM8766_RDA2,
  284. WM8766_LDA3, WM8766_RDA3,
  285. };
  286. struct xonar_wm87x6 *data = chip->model_data;
  287. unsigned int i;
  288. u8 to_change;
  289. update_wm8776_volume(chip);
  290. if (chip->dac_volume[2] == chip->dac_volume[3] &&
  291. chip->dac_volume[2] == chip->dac_volume[4] &&
  292. chip->dac_volume[2] == chip->dac_volume[5] &&
  293. chip->dac_volume[2] == chip->dac_volume[6] &&
  294. chip->dac_volume[2] == chip->dac_volume[7]) {
  295. to_change = 0;
  296. for (i = 0; i < 6; ++i)
  297. if (chip->dac_volume[2] !=
  298. data->wm8766_regs[wm8766_regs[i]])
  299. to_change = 1;
  300. if (to_change) {
  301. wm8766_write(chip, WM8766_MASTDA,
  302. chip->dac_volume[2] | WM8766_UPDATE);
  303. for (i = 0; i < 6; ++i)
  304. data->wm8766_regs[wm8766_regs[i]] =
  305. chip->dac_volume[2];
  306. }
  307. } else {
  308. to_change = 0;
  309. for (i = 0; i < 6; ++i)
  310. to_change |= (chip->dac_volume[2 + i] !=
  311. data->wm8766_regs[wm8766_regs[i]]) << i;
  312. for (i = 0; i < 6; ++i)
  313. if (to_change & (1 << i))
  314. wm8766_write(chip, wm8766_regs[i],
  315. chip->dac_volume[2 + i] |
  316. ((to_change & (0x3e << i))
  317. ? 0 : WM8766_UPDATE));
  318. }
  319. }
  320. static void update_wm8776_mute(struct oxygen *chip)
  321. {
  322. wm8776_write_cached(chip, WM8776_DACMUTE,
  323. chip->dac_mute ? WM8776_DMUTE : 0);
  324. }
  325. static void update_wm87x6_mute(struct oxygen *chip)
  326. {
  327. update_wm8776_mute(chip);
  328. wm8766_write_cached(chip, WM8766_DAC_CTRL2, WM8766_ZCD |
  329. (chip->dac_mute ? WM8766_DMUTE_MASK : 0));
  330. }
  331. static void xonar_ds_gpio_changed(struct oxygen *chip)
  332. {
  333. xonar_ds_handle_hp_jack(chip);
  334. }
  335. static int wm8776_bit_switch_get(struct snd_kcontrol *ctl,
  336. struct snd_ctl_elem_value *value)
  337. {
  338. struct oxygen *chip = ctl->private_data;
  339. struct xonar_wm87x6 *data = chip->model_data;
  340. u16 bit = ctl->private_value & 0xffff;
  341. unsigned int reg_index = (ctl->private_value >> 16) & 0xff;
  342. bool invert = (ctl->private_value >> 24) & 1;
  343. value->value.integer.value[0] =
  344. ((data->wm8776_regs[reg_index] & bit) != 0) ^ invert;
  345. return 0;
  346. }
  347. static int wm8776_bit_switch_put(struct snd_kcontrol *ctl,
  348. struct snd_ctl_elem_value *value)
  349. {
  350. struct oxygen *chip = ctl->private_data;
  351. struct xonar_wm87x6 *data = chip->model_data;
  352. u16 bit = ctl->private_value & 0xffff;
  353. u16 reg_value;
  354. unsigned int reg_index = (ctl->private_value >> 16) & 0xff;
  355. bool invert = (ctl->private_value >> 24) & 1;
  356. int changed;
  357. mutex_lock(&chip->mutex);
  358. reg_value = data->wm8776_regs[reg_index] & ~bit;
  359. if (value->value.integer.value[0] ^ invert)
  360. reg_value |= bit;
  361. changed = reg_value != data->wm8776_regs[reg_index];
  362. if (changed)
  363. wm8776_write(chip, reg_index, reg_value);
  364. mutex_unlock(&chip->mutex);
  365. return changed;
  366. }
  367. static int wm8776_field_enum_info(struct snd_kcontrol *ctl,
  368. struct snd_ctl_elem_info *info)
  369. {
  370. static const char *const hld[16] = {
  371. "0 ms", "2.67 ms", "5.33 ms", "10.6 ms",
  372. "21.3 ms", "42.7 ms", "85.3 ms", "171 ms",
  373. "341 ms", "683 ms", "1.37 s", "2.73 s",
  374. "5.46 s", "10.9 s", "21.8 s", "43.7 s",
  375. };
  376. static const char *const atk_lim[11] = {
  377. "0.25 ms", "0.5 ms", "1 ms", "2 ms",
  378. "4 ms", "8 ms", "16 ms", "32 ms",
  379. "64 ms", "128 ms", "256 ms",
  380. };
  381. static const char *const atk_alc[11] = {
  382. "8.40 ms", "16.8 ms", "33.6 ms", "67.2 ms",
  383. "134 ms", "269 ms", "538 ms", "1.08 s",
  384. "2.15 s", "4.3 s", "8.6 s",
  385. };
  386. static const char *const dcy_lim[11] = {
  387. "1.2 ms", "2.4 ms", "4.8 ms", "9.6 ms",
  388. "19.2 ms", "38.4 ms", "76.8 ms", "154 ms",
  389. "307 ms", "614 ms", "1.23 s",
  390. };
  391. static const char *const dcy_alc[11] = {
  392. "33.5 ms", "67.0 ms", "134 ms", "268 ms",
  393. "536 ms", "1.07 s", "2.14 s", "4.29 s",
  394. "8.58 s", "17.2 s", "34.3 s",
  395. };
  396. static const char *const tranwin[8] = {
  397. "0 us", "62.5 us", "125 us", "250 us",
  398. "500 us", "1 ms", "2 ms", "4 ms",
  399. };
  400. u8 max;
  401. const char *const *names;
  402. max = (ctl->private_value >> 12) & 0xf;
  403. info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  404. info->count = 1;
  405. info->value.enumerated.items = max + 1;
  406. if (info->value.enumerated.item > max)
  407. info->value.enumerated.item = max;
  408. switch ((ctl->private_value >> 24) & 0x1f) {
  409. case WM8776_ALCCTRL2:
  410. names = hld;
  411. break;
  412. case WM8776_ALCCTRL3:
  413. if (((ctl->private_value >> 20) & 0xf) == 0) {
  414. if (ctl->private_value & LC_CONTROL_LIMITER)
  415. names = atk_lim;
  416. else
  417. names = atk_alc;
  418. } else {
  419. if (ctl->private_value & LC_CONTROL_LIMITER)
  420. names = dcy_lim;
  421. else
  422. names = dcy_alc;
  423. }
  424. break;
  425. case WM8776_LIMITER:
  426. names = tranwin;
  427. break;
  428. default:
  429. return -ENXIO;
  430. }
  431. strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
  432. return 0;
  433. }
  434. static int wm8776_field_volume_info(struct snd_kcontrol *ctl,
  435. struct snd_ctl_elem_info *info)
  436. {
  437. info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  438. info->count = 1;
  439. info->value.integer.min = (ctl->private_value >> 8) & 0xf;
  440. info->value.integer.max = (ctl->private_value >> 12) & 0xf;
  441. return 0;
  442. }
  443. static void wm8776_field_set_from_ctl(struct snd_kcontrol *ctl)
  444. {
  445. struct oxygen *chip = ctl->private_data;
  446. struct xonar_wm87x6 *data = chip->model_data;
  447. unsigned int value, reg_index, mode;
  448. u8 min, max, shift;
  449. u16 mask, reg_value;
  450. bool invert;
  451. if ((data->wm8776_regs[WM8776_ALCCTRL1] & WM8776_LCSEL_MASK) ==
  452. WM8776_LCSEL_LIMITER)
  453. mode = LC_CONTROL_LIMITER;
  454. else
  455. mode = LC_CONTROL_ALC;
  456. if (!(ctl->private_value & mode))
  457. return;
  458. value = ctl->private_value & 0xf;
  459. min = (ctl->private_value >> 8) & 0xf;
  460. max = (ctl->private_value >> 12) & 0xf;
  461. mask = (ctl->private_value >> 16) & 0xf;
  462. shift = (ctl->private_value >> 20) & 0xf;
  463. reg_index = (ctl->private_value >> 24) & 0x1f;
  464. invert = (ctl->private_value >> 29) & 0x1;
  465. if (invert)
  466. value = max - (value - min);
  467. reg_value = data->wm8776_regs[reg_index];
  468. reg_value &= ~(mask << shift);
  469. reg_value |= value << shift;
  470. wm8776_write_cached(chip, reg_index, reg_value);
  471. }
  472. static int wm8776_field_set(struct snd_kcontrol *ctl, unsigned int value)
  473. {
  474. struct oxygen *chip = ctl->private_data;
  475. u8 min, max;
  476. int changed;
  477. min = (ctl->private_value >> 8) & 0xf;
  478. max = (ctl->private_value >> 12) & 0xf;
  479. if (value < min || value > max)
  480. return -EINVAL;
  481. mutex_lock(&chip->mutex);
  482. changed = value != (ctl->private_value & 0xf);
  483. if (changed) {
  484. ctl->private_value = (ctl->private_value & ~0xf) | value;
  485. wm8776_field_set_from_ctl(ctl);
  486. }
  487. mutex_unlock(&chip->mutex);
  488. return changed;
  489. }
  490. static int wm8776_field_enum_get(struct snd_kcontrol *ctl,
  491. struct snd_ctl_elem_value *value)
  492. {
  493. value->value.enumerated.item[0] = ctl->private_value & 0xf;
  494. return 0;
  495. }
  496. static int wm8776_field_volume_get(struct snd_kcontrol *ctl,
  497. struct snd_ctl_elem_value *value)
  498. {
  499. value->value.integer.value[0] = ctl->private_value & 0xf;
  500. return 0;
  501. }
  502. static int wm8776_field_enum_put(struct snd_kcontrol *ctl,
  503. struct snd_ctl_elem_value *value)
  504. {
  505. return wm8776_field_set(ctl, value->value.enumerated.item[0]);
  506. }
  507. static int wm8776_field_volume_put(struct snd_kcontrol *ctl,
  508. struct snd_ctl_elem_value *value)
  509. {
  510. return wm8776_field_set(ctl, value->value.integer.value[0]);
  511. }
  512. static int wm8776_hp_vol_info(struct snd_kcontrol *ctl,
  513. struct snd_ctl_elem_info *info)
  514. {
  515. info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  516. info->count = 2;
  517. info->value.integer.min = 0x79 - 60;
  518. info->value.integer.max = 0x7f;
  519. return 0;
  520. }
  521. static int wm8776_hp_vol_get(struct snd_kcontrol *ctl,
  522. struct snd_ctl_elem_value *value)
  523. {
  524. struct oxygen *chip = ctl->private_data;
  525. struct xonar_wm87x6 *data = chip->model_data;
  526. mutex_lock(&chip->mutex);
  527. value->value.integer.value[0] =
  528. data->wm8776_regs[WM8776_HPLVOL] & WM8776_HPATT_MASK;
  529. value->value.integer.value[1] =
  530. data->wm8776_regs[WM8776_HPRVOL] & WM8776_HPATT_MASK;
  531. mutex_unlock(&chip->mutex);
  532. return 0;
  533. }
  534. static int wm8776_hp_vol_put(struct snd_kcontrol *ctl,
  535. struct snd_ctl_elem_value *value)
  536. {
  537. struct oxygen *chip = ctl->private_data;
  538. struct xonar_wm87x6 *data = chip->model_data;
  539. u8 to_update;
  540. mutex_lock(&chip->mutex);
  541. to_update = (value->value.integer.value[0] !=
  542. (data->wm8776_regs[WM8776_HPLVOL] & WM8776_HPATT_MASK))
  543. << 0;
  544. to_update |= (value->value.integer.value[1] !=
  545. (data->wm8776_regs[WM8776_HPRVOL] & WM8776_HPATT_MASK))
  546. << 1;
  547. if (value->value.integer.value[0] == value->value.integer.value[1]) {
  548. if (to_update) {
  549. wm8776_write(chip, WM8776_HPMASTER,
  550. value->value.integer.value[0] |
  551. WM8776_HPZCEN | WM8776_UPDATE);
  552. data->wm8776_regs[WM8776_HPLVOL] =
  553. value->value.integer.value[0] | WM8776_HPZCEN;
  554. data->wm8776_regs[WM8776_HPRVOL] =
  555. value->value.integer.value[0] | WM8776_HPZCEN;
  556. }
  557. } else {
  558. if (to_update & 1)
  559. wm8776_write(chip, WM8776_HPLVOL,
  560. value->value.integer.value[0] |
  561. WM8776_HPZCEN |
  562. ((to_update & 2) ? 0 : WM8776_UPDATE));
  563. if (to_update & 2)
  564. wm8776_write(chip, WM8776_HPRVOL,
  565. value->value.integer.value[1] |
  566. WM8776_HPZCEN | WM8776_UPDATE);
  567. }
  568. mutex_unlock(&chip->mutex);
  569. return to_update != 0;
  570. }
  571. static int wm8776_input_mux_get(struct snd_kcontrol *ctl,
  572. struct snd_ctl_elem_value *value)
  573. {
  574. struct oxygen *chip = ctl->private_data;
  575. struct xonar_wm87x6 *data = chip->model_data;
  576. unsigned int mux_bit = ctl->private_value;
  577. value->value.integer.value[0] =
  578. !!(data->wm8776_regs[WM8776_ADCMUX] & mux_bit);
  579. return 0;
  580. }
  581. static int wm8776_input_mux_put(struct snd_kcontrol *ctl,
  582. struct snd_ctl_elem_value *value)
  583. {
  584. struct oxygen *chip = ctl->private_data;
  585. struct xonar_wm87x6 *data = chip->model_data;
  586. struct snd_kcontrol *other_ctl;
  587. unsigned int mux_bit = ctl->private_value;
  588. u16 reg;
  589. int changed;
  590. mutex_lock(&chip->mutex);
  591. reg = data->wm8776_regs[WM8776_ADCMUX];
  592. if (value->value.integer.value[0]) {
  593. reg |= mux_bit;
  594. /* line-in and mic-in are exclusive */
  595. mux_bit ^= 3;
  596. if (reg & mux_bit) {
  597. reg &= ~mux_bit;
  598. if (mux_bit == 1)
  599. other_ctl = data->line_adcmux_control;
  600. else
  601. other_ctl = data->mic_adcmux_control;
  602. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_VALUE,
  603. &other_ctl->id);
  604. }
  605. } else
  606. reg &= ~mux_bit;
  607. changed = reg != data->wm8776_regs[WM8776_ADCMUX];
  608. if (changed) {
  609. oxygen_write16_masked(chip, OXYGEN_GPIO_DATA,
  610. reg & 1 ? GPIO_DS_INPUT_ROUTE : 0,
  611. GPIO_DS_INPUT_ROUTE);
  612. wm8776_write(chip, WM8776_ADCMUX, reg);
  613. }
  614. mutex_unlock(&chip->mutex);
  615. return changed;
  616. }
  617. static int wm8776_input_vol_info(struct snd_kcontrol *ctl,
  618. struct snd_ctl_elem_info *info)
  619. {
  620. info->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  621. info->count = 2;
  622. info->value.integer.min = 0xa5;
  623. info->value.integer.max = 0xff;
  624. return 0;
  625. }
  626. static int wm8776_input_vol_get(struct snd_kcontrol *ctl,
  627. struct snd_ctl_elem_value *value)
  628. {
  629. struct oxygen *chip = ctl->private_data;
  630. struct xonar_wm87x6 *data = chip->model_data;
  631. mutex_lock(&chip->mutex);
  632. value->value.integer.value[0] =
  633. data->wm8776_regs[WM8776_ADCLVOL] & WM8776_AGMASK;
  634. value->value.integer.value[1] =
  635. data->wm8776_regs[WM8776_ADCRVOL] & WM8776_AGMASK;
  636. mutex_unlock(&chip->mutex);
  637. return 0;
  638. }
  639. static int wm8776_input_vol_put(struct snd_kcontrol *ctl,
  640. struct snd_ctl_elem_value *value)
  641. {
  642. struct oxygen *chip = ctl->private_data;
  643. struct xonar_wm87x6 *data = chip->model_data;
  644. int changed = 0;
  645. mutex_lock(&chip->mutex);
  646. changed = (value->value.integer.value[0] !=
  647. (data->wm8776_regs[WM8776_ADCLVOL] & WM8776_AGMASK)) ||
  648. (value->value.integer.value[1] !=
  649. (data->wm8776_regs[WM8776_ADCRVOL] & WM8776_AGMASK));
  650. wm8776_write_cached(chip, WM8776_ADCLVOL,
  651. value->value.integer.value[0] | WM8776_ZCA);
  652. wm8776_write_cached(chip, WM8776_ADCRVOL,
  653. value->value.integer.value[1] | WM8776_ZCA);
  654. mutex_unlock(&chip->mutex);
  655. return changed;
  656. }
  657. static int wm8776_level_control_info(struct snd_kcontrol *ctl,
  658. struct snd_ctl_elem_info *info)
  659. {
  660. static const char *const names[3] = {
  661. "None", "Peak Limiter", "Automatic Level Control"
  662. };
  663. info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  664. info->count = 1;
  665. info->value.enumerated.items = 3;
  666. if (info->value.enumerated.item >= 3)
  667. info->value.enumerated.item = 2;
  668. strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
  669. return 0;
  670. }
  671. static int wm8776_level_control_get(struct snd_kcontrol *ctl,
  672. struct snd_ctl_elem_value *value)
  673. {
  674. struct oxygen *chip = ctl->private_data;
  675. struct xonar_wm87x6 *data = chip->model_data;
  676. if (!(data->wm8776_regs[WM8776_ALCCTRL2] & WM8776_LCEN))
  677. value->value.enumerated.item[0] = 0;
  678. else if ((data->wm8776_regs[WM8776_ALCCTRL1] & WM8776_LCSEL_MASK) ==
  679. WM8776_LCSEL_LIMITER)
  680. value->value.enumerated.item[0] = 1;
  681. else
  682. value->value.enumerated.item[0] = 2;
  683. return 0;
  684. }
  685. static void activate_control(struct oxygen *chip,
  686. struct snd_kcontrol *ctl, unsigned int mode)
  687. {
  688. unsigned int access;
  689. if (ctl->private_value & mode)
  690. access = 0;
  691. else
  692. access = SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  693. if ((ctl->vd[0].access & SNDRV_CTL_ELEM_ACCESS_INACTIVE) != access) {
  694. ctl->vd[0].access ^= SNDRV_CTL_ELEM_ACCESS_INACTIVE;
  695. snd_ctl_notify(chip->card, SNDRV_CTL_EVENT_MASK_INFO, &ctl->id);
  696. }
  697. }
  698. static int wm8776_level_control_put(struct snd_kcontrol *ctl,
  699. struct snd_ctl_elem_value *value)
  700. {
  701. struct oxygen *chip = ctl->private_data;
  702. struct xonar_wm87x6 *data = chip->model_data;
  703. unsigned int mode = 0, i;
  704. u16 ctrl1, ctrl2;
  705. int changed;
  706. if (value->value.enumerated.item[0] >= 3)
  707. return -EINVAL;
  708. mutex_lock(&chip->mutex);
  709. changed = value->value.enumerated.item[0] != ctl->private_value;
  710. if (changed) {
  711. ctl->private_value = value->value.enumerated.item[0];
  712. ctrl1 = data->wm8776_regs[WM8776_ALCCTRL1];
  713. ctrl2 = data->wm8776_regs[WM8776_ALCCTRL2];
  714. switch (value->value.enumerated.item[0]) {
  715. default:
  716. wm8776_write_cached(chip, WM8776_ALCCTRL2,
  717. ctrl2 & ~WM8776_LCEN);
  718. break;
  719. case 1:
  720. wm8776_write_cached(chip, WM8776_ALCCTRL1,
  721. (ctrl1 & ~WM8776_LCSEL_MASK) |
  722. WM8776_LCSEL_LIMITER);
  723. wm8776_write_cached(chip, WM8776_ALCCTRL2,
  724. ctrl2 | WM8776_LCEN);
  725. mode = LC_CONTROL_LIMITER;
  726. break;
  727. case 2:
  728. wm8776_write_cached(chip, WM8776_ALCCTRL1,
  729. (ctrl1 & ~WM8776_LCSEL_MASK) |
  730. WM8776_LCSEL_ALC_STEREO);
  731. wm8776_write_cached(chip, WM8776_ALCCTRL2,
  732. ctrl2 | WM8776_LCEN);
  733. mode = LC_CONTROL_ALC;
  734. break;
  735. }
  736. for (i = 0; i < ARRAY_SIZE(data->lc_controls); ++i)
  737. activate_control(chip, data->lc_controls[i], mode);
  738. }
  739. mutex_unlock(&chip->mutex);
  740. return changed;
  741. }
  742. static int hpf_info(struct snd_kcontrol *ctl, struct snd_ctl_elem_info *info)
  743. {
  744. static const char *const names[2] = {
  745. "None", "High-pass Filter"
  746. };
  747. info->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
  748. info->count = 1;
  749. info->value.enumerated.items = 2;
  750. if (info->value.enumerated.item >= 2)
  751. info->value.enumerated.item = 1;
  752. strcpy(info->value.enumerated.name, names[info->value.enumerated.item]);
  753. return 0;
  754. }
  755. static int hpf_get(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
  756. {
  757. struct oxygen *chip = ctl->private_data;
  758. struct xonar_wm87x6 *data = chip->model_data;
  759. value->value.enumerated.item[0] =
  760. !(data->wm8776_regs[WM8776_ADCIFCTRL] & WM8776_ADCHPD);
  761. return 0;
  762. }
  763. static int hpf_put(struct snd_kcontrol *ctl, struct snd_ctl_elem_value *value)
  764. {
  765. struct oxygen *chip = ctl->private_data;
  766. struct xonar_wm87x6 *data = chip->model_data;
  767. unsigned int reg;
  768. int changed;
  769. mutex_lock(&chip->mutex);
  770. reg = data->wm8776_regs[WM8776_ADCIFCTRL] & ~WM8776_ADCHPD;
  771. if (!value->value.enumerated.item[0])
  772. reg |= WM8776_ADCHPD;
  773. changed = reg != data->wm8776_regs[WM8776_ADCIFCTRL];
  774. if (changed)
  775. wm8776_write(chip, WM8776_ADCIFCTRL, reg);
  776. mutex_unlock(&chip->mutex);
  777. return changed;
  778. }
  779. #define WM8776_BIT_SWITCH(xname, reg, bit, invert, flags) { \
  780. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  781. .name = xname, \
  782. .info = snd_ctl_boolean_mono_info, \
  783. .get = wm8776_bit_switch_get, \
  784. .put = wm8776_bit_switch_put, \
  785. .private_value = ((reg) << 16) | (bit) | ((invert) << 24) | (flags), \
  786. }
  787. #define _WM8776_FIELD_CTL(xname, reg, shift, initval, min, max, mask, flags) \
  788. .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
  789. .name = xname, \
  790. .private_value = (initval) | ((min) << 8) | ((max) << 12) | \
  791. ((mask) << 16) | ((shift) << 20) | ((reg) << 24) | (flags)
  792. #define WM8776_FIELD_CTL_ENUM(xname, reg, shift, init, min, max, mask, flags) {\
  793. _WM8776_FIELD_CTL(xname " Capture Enum", \
  794. reg, shift, init, min, max, mask, flags), \
  795. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
  796. SNDRV_CTL_ELEM_ACCESS_INACTIVE, \
  797. .info = wm8776_field_enum_info, \
  798. .get = wm8776_field_enum_get, \
  799. .put = wm8776_field_enum_put, \
  800. }
  801. #define WM8776_FIELD_CTL_VOLUME(a, b, c, d, e, f, g, h, tlv_p) { \
  802. _WM8776_FIELD_CTL(a " Capture Volume", b, c, d, e, f, g, h), \
  803. .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
  804. SNDRV_CTL_ELEM_ACCESS_INACTIVE | \
  805. SNDRV_CTL_ELEM_ACCESS_TLV_READ, \
  806. .info = wm8776_field_volume_info, \
  807. .get = wm8776_field_volume_get, \
  808. .put = wm8776_field_volume_put, \
  809. .tlv = { .p = tlv_p }, \
  810. }
  811. static const DECLARE_TLV_DB_SCALE(wm87x6_dac_db_scale, -6000, 50, 0);
  812. static const DECLARE_TLV_DB_SCALE(wm8776_adc_db_scale, -2100, 50, 0);
  813. static const DECLARE_TLV_DB_SCALE(wm8776_hp_db_scale, -6000, 100, 0);
  814. static const DECLARE_TLV_DB_SCALE(wm8776_lct_db_scale, -1600, 100, 0);
  815. static const DECLARE_TLV_DB_SCALE(wm8776_maxgain_db_scale, 0, 400, 0);
  816. static const DECLARE_TLV_DB_SCALE(wm8776_ngth_db_scale, -7800, 600, 0);
  817. static const DECLARE_TLV_DB_SCALE(wm8776_maxatten_lim_db_scale, -1200, 100, 0);
  818. static const DECLARE_TLV_DB_SCALE(wm8776_maxatten_alc_db_scale, -2100, 400, 0);
  819. static const struct snd_kcontrol_new ds_controls[] = {
  820. {
  821. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  822. .name = "Headphone Playback Volume",
  823. .info = wm8776_hp_vol_info,
  824. .get = wm8776_hp_vol_get,
  825. .put = wm8776_hp_vol_put,
  826. .tlv = { .p = wm8776_hp_db_scale },
  827. },
  828. WM8776_BIT_SWITCH("Headphone Playback Switch",
  829. WM8776_PWRDOWN, WM8776_HPPD, 1, 0),
  830. {
  831. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  832. .name = "Input Capture Volume",
  833. .info = wm8776_input_vol_info,
  834. .get = wm8776_input_vol_get,
  835. .put = wm8776_input_vol_put,
  836. .tlv = { .p = wm8776_adc_db_scale },
  837. },
  838. {
  839. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  840. .name = "Line Capture Switch",
  841. .info = snd_ctl_boolean_mono_info,
  842. .get = wm8776_input_mux_get,
  843. .put = wm8776_input_mux_put,
  844. .private_value = 1 << 0,
  845. },
  846. {
  847. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  848. .name = "Mic Capture Switch",
  849. .info = snd_ctl_boolean_mono_info,
  850. .get = wm8776_input_mux_get,
  851. .put = wm8776_input_mux_put,
  852. .private_value = 1 << 1,
  853. },
  854. WM8776_BIT_SWITCH("Front Mic Capture Switch",
  855. WM8776_ADCMUX, 1 << 2, 0, 0),
  856. WM8776_BIT_SWITCH("Aux Capture Switch",
  857. WM8776_ADCMUX, 1 << 3, 0, 0),
  858. {
  859. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  860. .name = "ADC Filter Capture Enum",
  861. .info = hpf_info,
  862. .get = hpf_get,
  863. .put = hpf_put,
  864. },
  865. {
  866. .iface = SNDRV_CTL_ELEM_IFACE_MIXER,
  867. .name = "Level Control Capture Enum",
  868. .info = wm8776_level_control_info,
  869. .get = wm8776_level_control_get,
  870. .put = wm8776_level_control_put,
  871. .private_value = 0,
  872. },
  873. };
  874. static const struct snd_kcontrol_new lc_controls[] = {
  875. WM8776_FIELD_CTL_VOLUME("Limiter Threshold",
  876. WM8776_ALCCTRL1, 0, 11, 0, 15, 0xf,
  877. LC_CONTROL_LIMITER, wm8776_lct_db_scale),
  878. WM8776_FIELD_CTL_ENUM("Limiter Attack Time",
  879. WM8776_ALCCTRL3, 0, 2, 0, 10, 0xf,
  880. LC_CONTROL_LIMITER),
  881. WM8776_FIELD_CTL_ENUM("Limiter Decay Time",
  882. WM8776_ALCCTRL3, 4, 3, 0, 10, 0xf,
  883. LC_CONTROL_LIMITER),
  884. WM8776_FIELD_CTL_ENUM("Limiter Transient Window",
  885. WM8776_LIMITER, 4, 2, 0, 7, 0x7,
  886. LC_CONTROL_LIMITER),
  887. WM8776_FIELD_CTL_VOLUME("Limiter Maximum Attenuation",
  888. WM8776_LIMITER, 0, 6, 3, 12, 0xf,
  889. LC_CONTROL_LIMITER,
  890. wm8776_maxatten_lim_db_scale),
  891. WM8776_FIELD_CTL_VOLUME("ALC Target Level",
  892. WM8776_ALCCTRL1, 0, 11, 0, 15, 0xf,
  893. LC_CONTROL_ALC, wm8776_lct_db_scale),
  894. WM8776_FIELD_CTL_ENUM("ALC Attack Time",
  895. WM8776_ALCCTRL3, 0, 2, 0, 10, 0xf,
  896. LC_CONTROL_ALC),
  897. WM8776_FIELD_CTL_ENUM("ALC Decay Time",
  898. WM8776_ALCCTRL3, 4, 3, 0, 10, 0xf,
  899. LC_CONTROL_ALC),
  900. WM8776_FIELD_CTL_VOLUME("ALC Maximum Gain",
  901. WM8776_ALCCTRL1, 4, 7, 1, 7, 0x7,
  902. LC_CONTROL_ALC, wm8776_maxgain_db_scale),
  903. WM8776_FIELD_CTL_VOLUME("ALC Maximum Attenuation",
  904. WM8776_LIMITER, 0, 10, 10, 15, 0xf,
  905. LC_CONTROL_ALC, wm8776_maxatten_alc_db_scale),
  906. WM8776_FIELD_CTL_ENUM("ALC Hold Time",
  907. WM8776_ALCCTRL2, 0, 0, 0, 15, 0xf,
  908. LC_CONTROL_ALC),
  909. WM8776_BIT_SWITCH("Noise Gate Capture Switch",
  910. WM8776_NOISEGATE, WM8776_NGAT, 0,
  911. LC_CONTROL_ALC),
  912. WM8776_FIELD_CTL_VOLUME("Noise Gate Threshold",
  913. WM8776_NOISEGATE, 2, 0, 0, 7, 0x7,
  914. LC_CONTROL_ALC, wm8776_ngth_db_scale),
  915. };
  916. static int xonar_ds_control_filter(struct snd_kcontrol_new *template)
  917. {
  918. if (!strncmp(template->name, "CD Capture ", 11))
  919. return 1; /* no CD input */
  920. return 0;
  921. }
  922. static int xonar_ds_mixer_init(struct oxygen *chip)
  923. {
  924. struct xonar_wm87x6 *data = chip->model_data;
  925. unsigned int i;
  926. struct snd_kcontrol *ctl;
  927. int err;
  928. for (i = 0; i < ARRAY_SIZE(ds_controls); ++i) {
  929. ctl = snd_ctl_new1(&ds_controls[i], chip);
  930. if (!ctl)
  931. return -ENOMEM;
  932. err = snd_ctl_add(chip->card, ctl);
  933. if (err < 0)
  934. return err;
  935. if (!strcmp(ctl->id.name, "Line Capture Switch"))
  936. data->line_adcmux_control = ctl;
  937. else if (!strcmp(ctl->id.name, "Mic Capture Switch"))
  938. data->mic_adcmux_control = ctl;
  939. }
  940. if (!data->line_adcmux_control || !data->mic_adcmux_control)
  941. return -ENXIO;
  942. BUILD_BUG_ON(ARRAY_SIZE(lc_controls) != ARRAY_SIZE(data->lc_controls));
  943. for (i = 0; i < ARRAY_SIZE(lc_controls); ++i) {
  944. ctl = snd_ctl_new1(&lc_controls[i], chip);
  945. if (!ctl)
  946. return -ENOMEM;
  947. err = snd_ctl_add(chip->card, ctl);
  948. if (err < 0)
  949. return err;
  950. data->lc_controls[i] = ctl;
  951. }
  952. return 0;
  953. }
  954. static const struct oxygen_model model_xonar_ds = {
  955. .shortname = "Xonar DS",
  956. .longname = "Asus Virtuoso 200",
  957. .chip = "AV200",
  958. .init = xonar_ds_init,
  959. .control_filter = xonar_ds_control_filter,
  960. .mixer_init = xonar_ds_mixer_init,
  961. .cleanup = xonar_ds_cleanup,
  962. .suspend = xonar_ds_suspend,
  963. .resume = xonar_ds_resume,
  964. .pcm_hardware_filter = wm8776_adc_hardware_filter,
  965. .get_i2s_mclk = oxygen_default_i2s_mclk,
  966. .set_dac_params = set_wm87x6_dac_params,
  967. .set_adc_params = set_wm8776_adc_params,
  968. .update_dac_volume = update_wm87x6_volume,
  969. .update_dac_mute = update_wm87x6_mute,
  970. .gpio_changed = xonar_ds_gpio_changed,
  971. .dac_tlv = wm87x6_dac_db_scale,
  972. .model_data_size = sizeof(struct xonar_wm87x6),
  973. .device_config = PLAYBACK_0_TO_I2S |
  974. PLAYBACK_1_TO_SPDIF |
  975. CAPTURE_0_FROM_I2S_1,
  976. .dac_channels = 8,
  977. .dac_volume_min = 255 - 2*60,
  978. .dac_volume_max = 255,
  979. .function_flags = OXYGEN_FUNCTION_SPI,
  980. .dac_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  981. .adc_i2s_format = OXYGEN_I2S_FORMAT_LJUST,
  982. };
  983. int __devinit get_xonar_wm87x6_model(struct oxygen *chip,
  984. const struct pci_device_id *id)
  985. {
  986. switch (id->subdevice) {
  987. case 0x838e:
  988. chip->model = model_xonar_ds;
  989. break;
  990. default:
  991. return -EINVAL;
  992. }
  993. return 0;
  994. }