htc_drv_txrx.c 22 KB

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  1. /*
  2. * Copyright (c) 2010 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include "htc.h"
  17. /******/
  18. /* TX */
  19. /******/
  20. static const int subtype_txq_to_hwq[] = {
  21. [WME_AC_BE] = ATH_TXQ_AC_BE,
  22. [WME_AC_BK] = ATH_TXQ_AC_BK,
  23. [WME_AC_VI] = ATH_TXQ_AC_VI,
  24. [WME_AC_VO] = ATH_TXQ_AC_VO,
  25. };
  26. #define ATH9K_HTC_INIT_TXQ(subtype) do { \
  27. qi.tqi_subtype = subtype_txq_to_hwq[subtype]; \
  28. qi.tqi_aifs = ATH9K_TXQ_USEDEFAULT; \
  29. qi.tqi_cwmin = ATH9K_TXQ_USEDEFAULT; \
  30. qi.tqi_cwmax = ATH9K_TXQ_USEDEFAULT; \
  31. qi.tqi_physCompBuf = 0; \
  32. qi.tqi_qflags = TXQ_FLAG_TXEOLINT_ENABLE | \
  33. TXQ_FLAG_TXDESCINT_ENABLE; \
  34. } while (0)
  35. int get_hw_qnum(u16 queue, int *hwq_map)
  36. {
  37. switch (queue) {
  38. case 0:
  39. return hwq_map[WME_AC_VO];
  40. case 1:
  41. return hwq_map[WME_AC_VI];
  42. case 2:
  43. return hwq_map[WME_AC_BE];
  44. case 3:
  45. return hwq_map[WME_AC_BK];
  46. default:
  47. return hwq_map[WME_AC_BE];
  48. }
  49. }
  50. void ath9k_htc_check_stop_queues(struct ath9k_htc_priv *priv)
  51. {
  52. spin_lock_bh(&priv->tx.tx_lock);
  53. priv->tx.queued_cnt++;
  54. if ((priv->tx.queued_cnt >= ATH9K_HTC_TX_THRESHOLD) &&
  55. !(priv->tx.flags & ATH9K_HTC_OP_TX_QUEUES_STOP)) {
  56. priv->tx.flags |= ATH9K_HTC_OP_TX_QUEUES_STOP;
  57. ieee80211_stop_queues(priv->hw);
  58. }
  59. spin_unlock_bh(&priv->tx.tx_lock);
  60. }
  61. void ath9k_htc_check_wake_queues(struct ath9k_htc_priv *priv)
  62. {
  63. spin_lock_bh(&priv->tx.tx_lock);
  64. if ((priv->tx.queued_cnt < ATH9K_HTC_TX_THRESHOLD) &&
  65. (priv->tx.flags & ATH9K_HTC_OP_TX_QUEUES_STOP)) {
  66. priv->tx.flags &= ~ATH9K_HTC_OP_TX_QUEUES_STOP;
  67. ieee80211_wake_queues(priv->hw);
  68. }
  69. spin_unlock_bh(&priv->tx.tx_lock);
  70. }
  71. int ath9k_htc_tx_get_slot(struct ath9k_htc_priv *priv)
  72. {
  73. int slot;
  74. spin_lock_bh(&priv->tx.tx_lock);
  75. slot = find_first_zero_bit(priv->tx.tx_slot, MAX_TX_BUF_NUM);
  76. if (slot >= MAX_TX_BUF_NUM) {
  77. spin_unlock_bh(&priv->tx.tx_lock);
  78. return -ENOBUFS;
  79. }
  80. __set_bit(slot, priv->tx.tx_slot);
  81. spin_unlock_bh(&priv->tx.tx_lock);
  82. return slot;
  83. }
  84. void ath9k_htc_tx_clear_slot(struct ath9k_htc_priv *priv, int slot)
  85. {
  86. spin_lock_bh(&priv->tx.tx_lock);
  87. __clear_bit(slot, priv->tx.tx_slot);
  88. spin_unlock_bh(&priv->tx.tx_lock);
  89. }
  90. static enum htc_endpoint_id get_htc_epid(struct ath9k_htc_priv *priv,
  91. u16 qnum)
  92. {
  93. enum htc_endpoint_id epid;
  94. switch (qnum) {
  95. case 0:
  96. TX_QSTAT_INC(WME_AC_VO);
  97. epid = priv->data_vo_ep;
  98. break;
  99. case 1:
  100. TX_QSTAT_INC(WME_AC_VI);
  101. epid = priv->data_vi_ep;
  102. break;
  103. case 2:
  104. TX_QSTAT_INC(WME_AC_BE);
  105. epid = priv->data_be_ep;
  106. break;
  107. case 3:
  108. default:
  109. TX_QSTAT_INC(WME_AC_BK);
  110. epid = priv->data_bk_ep;
  111. break;
  112. }
  113. return epid;
  114. }
  115. /*
  116. * Removes the driver header and returns the TX slot number
  117. */
  118. static inline int strip_drv_header(struct ath9k_htc_priv *priv,
  119. struct sk_buff *skb)
  120. {
  121. struct ath_common *common = ath9k_hw_common(priv->ah);
  122. struct ath9k_htc_tx_ctl *tx_ctl;
  123. int slot;
  124. tx_ctl = HTC_SKB_CB(skb);
  125. if (tx_ctl->epid == priv->mgmt_ep) {
  126. struct tx_mgmt_hdr *tx_mhdr =
  127. (struct tx_mgmt_hdr *)skb->data;
  128. slot = tx_mhdr->cookie;
  129. skb_pull(skb, sizeof(struct tx_mgmt_hdr));
  130. } else if ((tx_ctl->epid == priv->data_bk_ep) ||
  131. (tx_ctl->epid == priv->data_be_ep) ||
  132. (tx_ctl->epid == priv->data_vi_ep) ||
  133. (tx_ctl->epid == priv->data_vo_ep) ||
  134. (tx_ctl->epid == priv->cab_ep)) {
  135. struct tx_frame_hdr *tx_fhdr =
  136. (struct tx_frame_hdr *)skb->data;
  137. slot = tx_fhdr->cookie;
  138. skb_pull(skb, sizeof(struct tx_frame_hdr));
  139. } else {
  140. ath_err(common, "Unsupported EPID: %d\n", tx_ctl->epid);
  141. slot = -EINVAL;
  142. }
  143. return slot;
  144. }
  145. int ath_htc_txq_update(struct ath9k_htc_priv *priv, int qnum,
  146. struct ath9k_tx_queue_info *qinfo)
  147. {
  148. struct ath_hw *ah = priv->ah;
  149. int error = 0;
  150. struct ath9k_tx_queue_info qi;
  151. ath9k_hw_get_txq_props(ah, qnum, &qi);
  152. qi.tqi_aifs = qinfo->tqi_aifs;
  153. qi.tqi_cwmin = qinfo->tqi_cwmin / 2; /* XXX */
  154. qi.tqi_cwmax = qinfo->tqi_cwmax;
  155. qi.tqi_burstTime = qinfo->tqi_burstTime;
  156. qi.tqi_readyTime = qinfo->tqi_readyTime;
  157. if (!ath9k_hw_set_txq_props(ah, qnum, &qi)) {
  158. ath_err(ath9k_hw_common(ah),
  159. "Unable to update hardware queue %u!\n", qnum);
  160. error = -EIO;
  161. } else {
  162. ath9k_hw_resettxqueue(ah, qnum);
  163. }
  164. return error;
  165. }
  166. int ath9k_htc_tx_start(struct ath9k_htc_priv *priv,
  167. struct sk_buff *skb,
  168. u8 slot, bool is_cab)
  169. {
  170. struct ieee80211_hdr *hdr;
  171. struct ieee80211_mgmt *mgmt;
  172. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  173. struct ieee80211_sta *sta = tx_info->control.sta;
  174. struct ieee80211_vif *vif = tx_info->control.vif;
  175. struct ath9k_htc_sta *ista;
  176. struct ath9k_htc_vif *avp = NULL;
  177. struct ath9k_htc_tx_ctl *tx_ctl;
  178. u16 qnum;
  179. __le16 fc;
  180. u8 *tx_fhdr;
  181. u8 sta_idx, vif_idx;
  182. tx_ctl = HTC_SKB_CB(skb);
  183. memset(tx_ctl, 0, sizeof(*tx_ctl));
  184. hdr = (struct ieee80211_hdr *) skb->data;
  185. fc = hdr->frame_control;
  186. /*
  187. * Find out on which interface this packet has to be
  188. * sent out.
  189. */
  190. if (vif) {
  191. avp = (struct ath9k_htc_vif *) vif->drv_priv;
  192. vif_idx = avp->index;
  193. } else {
  194. if (!priv->ah->is_monitoring) {
  195. ath_dbg(ath9k_hw_common(priv->ah), ATH_DBG_XMIT,
  196. "VIF is null, but no monitor interface !\n");
  197. return -EINVAL;
  198. }
  199. vif_idx = priv->mon_vif_idx;
  200. }
  201. /*
  202. * Find out which station this packet is destined for.
  203. */
  204. if (sta) {
  205. ista = (struct ath9k_htc_sta *) sta->drv_priv;
  206. sta_idx = ista->index;
  207. } else {
  208. sta_idx = priv->vif_sta_pos[vif_idx];
  209. }
  210. if (ieee80211_is_data(fc)) {
  211. struct tx_frame_hdr tx_hdr;
  212. u32 flags = 0;
  213. u8 *qc;
  214. memset(&tx_hdr, 0, sizeof(struct tx_frame_hdr));
  215. tx_hdr.node_idx = sta_idx;
  216. tx_hdr.vif_idx = vif_idx;
  217. tx_hdr.cookie = slot;
  218. /*
  219. * This is a bit redundant but it helps to get
  220. * the per-packet index quickly when draining the
  221. * TX queue in the HIF layer. Otherwise we would
  222. * have to parse the packet contents ...
  223. */
  224. tx_ctl->sta_idx = sta_idx;
  225. if (tx_info->flags & IEEE80211_TX_CTL_AMPDU) {
  226. tx_ctl->type = ATH9K_HTC_AMPDU;
  227. tx_hdr.data_type = ATH9K_HTC_AMPDU;
  228. } else {
  229. tx_ctl->type = ATH9K_HTC_NORMAL;
  230. tx_hdr.data_type = ATH9K_HTC_NORMAL;
  231. }
  232. if (ieee80211_is_data_qos(fc)) {
  233. qc = ieee80211_get_qos_ctl(hdr);
  234. tx_hdr.tidno = qc[0] & IEEE80211_QOS_CTL_TID_MASK;
  235. }
  236. /* Check for RTS protection */
  237. if (priv->hw->wiphy->rts_threshold != (u32) -1)
  238. if (skb->len > priv->hw->wiphy->rts_threshold)
  239. flags |= ATH9K_HTC_TX_RTSCTS;
  240. /* CTS-to-self */
  241. if (!(flags & ATH9K_HTC_TX_RTSCTS) &&
  242. (vif && vif->bss_conf.use_cts_prot))
  243. flags |= ATH9K_HTC_TX_CTSONLY;
  244. tx_hdr.flags = cpu_to_be32(flags);
  245. tx_hdr.key_type = ath9k_cmn_get_hw_crypto_keytype(skb);
  246. if (tx_hdr.key_type == ATH9K_KEY_TYPE_CLEAR)
  247. tx_hdr.keyix = (u8) ATH9K_TXKEYIX_INVALID;
  248. else
  249. tx_hdr.keyix = tx_info->control.hw_key->hw_key_idx;
  250. tx_fhdr = skb_push(skb, sizeof(tx_hdr));
  251. memcpy(tx_fhdr, (u8 *) &tx_hdr, sizeof(tx_hdr));
  252. if (is_cab) {
  253. CAB_STAT_INC;
  254. tx_ctl->epid = priv->cab_ep;
  255. goto send;
  256. }
  257. qnum = skb_get_queue_mapping(skb);
  258. tx_ctl->epid = get_htc_epid(priv, qnum);
  259. } else {
  260. struct tx_mgmt_hdr mgmt_hdr;
  261. memset(&mgmt_hdr, 0, sizeof(struct tx_mgmt_hdr));
  262. /*
  263. * Set the TSF adjust value for probe response
  264. * frame also.
  265. */
  266. if (avp && unlikely(ieee80211_is_probe_resp(fc))) {
  267. mgmt = (struct ieee80211_mgmt *)skb->data;
  268. mgmt->u.probe_resp.timestamp = avp->tsfadjust;
  269. }
  270. tx_ctl->type = ATH9K_HTC_MGMT;
  271. mgmt_hdr.node_idx = sta_idx;
  272. mgmt_hdr.vif_idx = vif_idx;
  273. mgmt_hdr.tidno = 0;
  274. mgmt_hdr.flags = 0;
  275. mgmt_hdr.cookie = slot;
  276. mgmt_hdr.key_type = ath9k_cmn_get_hw_crypto_keytype(skb);
  277. if (mgmt_hdr.key_type == ATH9K_KEY_TYPE_CLEAR)
  278. mgmt_hdr.keyix = (u8) ATH9K_TXKEYIX_INVALID;
  279. else
  280. mgmt_hdr.keyix = tx_info->control.hw_key->hw_key_idx;
  281. tx_fhdr = skb_push(skb, sizeof(mgmt_hdr));
  282. memcpy(tx_fhdr, (u8 *) &mgmt_hdr, sizeof(mgmt_hdr));
  283. tx_ctl->epid = priv->mgmt_ep;
  284. }
  285. send:
  286. return htc_send(priv->htc, skb);
  287. }
  288. static inline bool __ath9k_htc_check_tx_aggr(struct ath9k_htc_priv *priv,
  289. struct ath9k_htc_sta *ista, u8 tid)
  290. {
  291. bool ret = false;
  292. spin_lock_bh(&priv->tx.tx_lock);
  293. if ((tid < ATH9K_HTC_MAX_TID) && (ista->tid_state[tid] == AGGR_STOP))
  294. ret = true;
  295. spin_unlock_bh(&priv->tx.tx_lock);
  296. return ret;
  297. }
  298. static void ath9k_htc_check_tx_aggr(struct ath9k_htc_priv *priv,
  299. struct ieee80211_vif *vif,
  300. struct sk_buff *skb)
  301. {
  302. struct ieee80211_sta *sta;
  303. struct ieee80211_hdr *hdr;
  304. __le16 fc;
  305. hdr = (struct ieee80211_hdr *) skb->data;
  306. fc = hdr->frame_control;
  307. rcu_read_lock();
  308. sta = ieee80211_find_sta(vif, hdr->addr1);
  309. if (!sta) {
  310. rcu_read_unlock();
  311. return;
  312. }
  313. if (sta && conf_is_ht(&priv->hw->conf) &&
  314. !(skb->protocol == cpu_to_be16(ETH_P_PAE))) {
  315. if (ieee80211_is_data_qos(fc)) {
  316. u8 *qc, tid;
  317. struct ath9k_htc_sta *ista;
  318. qc = ieee80211_get_qos_ctl(hdr);
  319. tid = qc[0] & 0xf;
  320. ista = (struct ath9k_htc_sta *)sta->drv_priv;
  321. if (__ath9k_htc_check_tx_aggr(priv, ista, tid)) {
  322. ieee80211_start_tx_ba_session(sta, tid, 0);
  323. spin_lock_bh(&priv->tx.tx_lock);
  324. ista->tid_state[tid] = AGGR_PROGRESS;
  325. spin_unlock_bh(&priv->tx.tx_lock);
  326. }
  327. }
  328. }
  329. rcu_read_unlock();
  330. }
  331. static void ath9k_htc_tx_process(struct ath9k_htc_priv *priv,
  332. struct sk_buff *skb)
  333. {
  334. struct ieee80211_vif *vif;
  335. struct ath9k_htc_tx_ctl *tx_ctl;
  336. struct ieee80211_tx_info *tx_info;
  337. bool txok;
  338. int slot;
  339. slot = strip_drv_header(priv, skb);
  340. if (slot < 0) {
  341. dev_kfree_skb_any(skb);
  342. return;
  343. }
  344. tx_ctl = HTC_SKB_CB(skb);
  345. txok = tx_ctl->txok;
  346. tx_info = IEEE80211_SKB_CB(skb);
  347. vif = tx_info->control.vif;
  348. memset(&tx_info->status, 0, sizeof(tx_info->status));
  349. /*
  350. * URB submission failed for this frame, it never reached
  351. * the target.
  352. */
  353. if (!txok || !vif)
  354. goto send_mac80211;
  355. tx_info->flags |= IEEE80211_TX_STAT_ACK;
  356. ath9k_htc_check_tx_aggr(priv, vif, skb);
  357. send_mac80211:
  358. spin_lock_bh(&priv->tx.tx_lock);
  359. if (WARN_ON(--priv->tx.queued_cnt < 0))
  360. priv->tx.queued_cnt = 0;
  361. spin_unlock_bh(&priv->tx.tx_lock);
  362. ath9k_htc_tx_clear_slot(priv, slot);
  363. /* Send status to mac80211 */
  364. ieee80211_tx_status(priv->hw, skb);
  365. }
  366. void ath9k_htc_tx_drain(struct ath9k_htc_priv *priv)
  367. {
  368. struct sk_buff *skb = NULL;
  369. /*
  370. * Ensure that all pending TX frames are flushed,
  371. * and that the TX completion tasklet is killed.
  372. */
  373. htc_stop(priv->htc);
  374. tasklet_kill(&priv->tx_tasklet);
  375. while ((skb = skb_dequeue(&priv->tx.tx_queue)) != NULL) {
  376. ath9k_htc_tx_process(priv, skb);
  377. }
  378. while ((skb = skb_dequeue(&priv->tx.tx_failed)) != NULL) {
  379. ath9k_htc_tx_process(priv, skb);
  380. }
  381. }
  382. void ath9k_tx_tasklet(unsigned long data)
  383. {
  384. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *)data;
  385. struct sk_buff *skb = NULL;
  386. while ((skb = skb_dequeue(&priv->tx.tx_queue)) != NULL) {
  387. ath9k_htc_tx_process(priv, skb);
  388. }
  389. while ((skb = skb_dequeue(&priv->tx.tx_failed)) != NULL) {
  390. ath9k_htc_tx_process(priv, skb);
  391. }
  392. /* Wake TX queues if needed */
  393. ath9k_htc_check_wake_queues(priv);
  394. }
  395. void ath9k_htc_txep(void *drv_priv, struct sk_buff *skb,
  396. enum htc_endpoint_id ep_id, bool txok)
  397. {
  398. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *) drv_priv;
  399. struct ath9k_htc_tx_ctl *tx_ctl;
  400. tx_ctl = HTC_SKB_CB(skb);
  401. tx_ctl->txok = txok;
  402. if (txok)
  403. skb_queue_tail(&priv->tx.tx_queue, skb);
  404. else
  405. skb_queue_tail(&priv->tx.tx_failed, skb);
  406. tasklet_schedule(&priv->tx_tasklet);
  407. }
  408. int ath9k_tx_init(struct ath9k_htc_priv *priv)
  409. {
  410. skb_queue_head_init(&priv->tx.tx_queue);
  411. skb_queue_head_init(&priv->tx.tx_failed);
  412. return 0;
  413. }
  414. void ath9k_tx_cleanup(struct ath9k_htc_priv *priv)
  415. {
  416. }
  417. bool ath9k_htc_txq_setup(struct ath9k_htc_priv *priv, int subtype)
  418. {
  419. struct ath_hw *ah = priv->ah;
  420. struct ath_common *common = ath9k_hw_common(ah);
  421. struct ath9k_tx_queue_info qi;
  422. int qnum;
  423. memset(&qi, 0, sizeof(qi));
  424. ATH9K_HTC_INIT_TXQ(subtype);
  425. qnum = ath9k_hw_setuptxqueue(priv->ah, ATH9K_TX_QUEUE_DATA, &qi);
  426. if (qnum == -1)
  427. return false;
  428. if (qnum >= ARRAY_SIZE(priv->hwq_map)) {
  429. ath_err(common, "qnum %u out of range, max %zu!\n",
  430. qnum, ARRAY_SIZE(priv->hwq_map));
  431. ath9k_hw_releasetxqueue(ah, qnum);
  432. return false;
  433. }
  434. priv->hwq_map[subtype] = qnum;
  435. return true;
  436. }
  437. int ath9k_htc_cabq_setup(struct ath9k_htc_priv *priv)
  438. {
  439. struct ath9k_tx_queue_info qi;
  440. memset(&qi, 0, sizeof(qi));
  441. ATH9K_HTC_INIT_TXQ(0);
  442. return ath9k_hw_setuptxqueue(priv->ah, ATH9K_TX_QUEUE_CAB, &qi);
  443. }
  444. /******/
  445. /* RX */
  446. /******/
  447. /*
  448. * Calculate the RX filter to be set in the HW.
  449. */
  450. u32 ath9k_htc_calcrxfilter(struct ath9k_htc_priv *priv)
  451. {
  452. #define RX_FILTER_PRESERVE (ATH9K_RX_FILTER_PHYERR | ATH9K_RX_FILTER_PHYRADAR)
  453. struct ath_hw *ah = priv->ah;
  454. u32 rfilt;
  455. rfilt = (ath9k_hw_getrxfilter(ah) & RX_FILTER_PRESERVE)
  456. | ATH9K_RX_FILTER_UCAST | ATH9K_RX_FILTER_BCAST
  457. | ATH9K_RX_FILTER_MCAST;
  458. if (priv->rxfilter & FIF_PROBE_REQ)
  459. rfilt |= ATH9K_RX_FILTER_PROBEREQ;
  460. /*
  461. * Set promiscuous mode when FIF_PROMISC_IN_BSS is enabled for station
  462. * mode interface or when in monitor mode. AP mode does not need this
  463. * since it receives all in-BSS frames anyway.
  464. */
  465. if (((ah->opmode != NL80211_IFTYPE_AP) &&
  466. (priv->rxfilter & FIF_PROMISC_IN_BSS)) ||
  467. ah->is_monitoring)
  468. rfilt |= ATH9K_RX_FILTER_PROM;
  469. if (priv->rxfilter & FIF_CONTROL)
  470. rfilt |= ATH9K_RX_FILTER_CONTROL;
  471. if ((ah->opmode == NL80211_IFTYPE_STATION) &&
  472. !(priv->rxfilter & FIF_BCN_PRBRESP_PROMISC))
  473. rfilt |= ATH9K_RX_FILTER_MYBEACON;
  474. else
  475. rfilt |= ATH9K_RX_FILTER_BEACON;
  476. if (conf_is_ht(&priv->hw->conf)) {
  477. rfilt |= ATH9K_RX_FILTER_COMP_BAR;
  478. rfilt |= ATH9K_RX_FILTER_UNCOMP_BA_BAR;
  479. }
  480. if (priv->rxfilter & FIF_PSPOLL)
  481. rfilt |= ATH9K_RX_FILTER_PSPOLL;
  482. return rfilt;
  483. #undef RX_FILTER_PRESERVE
  484. }
  485. /*
  486. * Recv initialization for opmode change.
  487. */
  488. static void ath9k_htc_opmode_init(struct ath9k_htc_priv *priv)
  489. {
  490. struct ath_hw *ah = priv->ah;
  491. u32 rfilt, mfilt[2];
  492. /* configure rx filter */
  493. rfilt = ath9k_htc_calcrxfilter(priv);
  494. ath9k_hw_setrxfilter(ah, rfilt);
  495. /* calculate and install multicast filter */
  496. mfilt[0] = mfilt[1] = ~0;
  497. ath9k_hw_setmcastfilter(ah, mfilt[0], mfilt[1]);
  498. }
  499. void ath9k_host_rx_init(struct ath9k_htc_priv *priv)
  500. {
  501. ath9k_hw_rxena(priv->ah);
  502. ath9k_htc_opmode_init(priv);
  503. ath9k_hw_startpcureceive(priv->ah, (priv->op_flags & OP_SCANNING));
  504. priv->rx.last_rssi = ATH_RSSI_DUMMY_MARKER;
  505. }
  506. static void ath9k_process_rate(struct ieee80211_hw *hw,
  507. struct ieee80211_rx_status *rxs,
  508. u8 rx_rate, u8 rs_flags)
  509. {
  510. struct ieee80211_supported_band *sband;
  511. enum ieee80211_band band;
  512. unsigned int i = 0;
  513. if (rx_rate & 0x80) {
  514. /* HT rate */
  515. rxs->flag |= RX_FLAG_HT;
  516. if (rs_flags & ATH9K_RX_2040)
  517. rxs->flag |= RX_FLAG_40MHZ;
  518. if (rs_flags & ATH9K_RX_GI)
  519. rxs->flag |= RX_FLAG_SHORT_GI;
  520. rxs->rate_idx = rx_rate & 0x7f;
  521. return;
  522. }
  523. band = hw->conf.channel->band;
  524. sband = hw->wiphy->bands[band];
  525. for (i = 0; i < sband->n_bitrates; i++) {
  526. if (sband->bitrates[i].hw_value == rx_rate) {
  527. rxs->rate_idx = i;
  528. return;
  529. }
  530. if (sband->bitrates[i].hw_value_short == rx_rate) {
  531. rxs->rate_idx = i;
  532. rxs->flag |= RX_FLAG_SHORTPRE;
  533. return;
  534. }
  535. }
  536. }
  537. static bool ath9k_rx_prepare(struct ath9k_htc_priv *priv,
  538. struct ath9k_htc_rxbuf *rxbuf,
  539. struct ieee80211_rx_status *rx_status)
  540. {
  541. struct ieee80211_hdr *hdr;
  542. struct ieee80211_hw *hw = priv->hw;
  543. struct sk_buff *skb = rxbuf->skb;
  544. struct ath_common *common = ath9k_hw_common(priv->ah);
  545. struct ath_htc_rx_status *rxstatus;
  546. int hdrlen, padpos, padsize;
  547. int last_rssi = ATH_RSSI_DUMMY_MARKER;
  548. __le16 fc;
  549. if (skb->len < HTC_RX_FRAME_HEADER_SIZE) {
  550. ath_err(common, "Corrupted RX frame, dropping (len: %d)\n",
  551. skb->len);
  552. goto rx_next;
  553. }
  554. rxstatus = (struct ath_htc_rx_status *)skb->data;
  555. if (be16_to_cpu(rxstatus->rs_datalen) -
  556. (skb->len - HTC_RX_FRAME_HEADER_SIZE) != 0) {
  557. ath_err(common,
  558. "Corrupted RX data len, dropping (dlen: %d, skblen: %d)\n",
  559. rxstatus->rs_datalen, skb->len);
  560. goto rx_next;
  561. }
  562. ath9k_htc_err_stat_rx(priv, rxstatus);
  563. /* Get the RX status information */
  564. memcpy(&rxbuf->rxstatus, rxstatus, HTC_RX_FRAME_HEADER_SIZE);
  565. skb_pull(skb, HTC_RX_FRAME_HEADER_SIZE);
  566. hdr = (struct ieee80211_hdr *)skb->data;
  567. fc = hdr->frame_control;
  568. hdrlen = ieee80211_get_hdrlen_from_skb(skb);
  569. padpos = ath9k_cmn_padpos(fc);
  570. padsize = padpos & 3;
  571. if (padsize && skb->len >= padpos+padsize+FCS_LEN) {
  572. memmove(skb->data + padsize, skb->data, padpos);
  573. skb_pull(skb, padsize);
  574. }
  575. memset(rx_status, 0, sizeof(struct ieee80211_rx_status));
  576. if (rxbuf->rxstatus.rs_status != 0) {
  577. if (rxbuf->rxstatus.rs_status & ATH9K_RXERR_CRC)
  578. rx_status->flag |= RX_FLAG_FAILED_FCS_CRC;
  579. if (rxbuf->rxstatus.rs_status & ATH9K_RXERR_PHY)
  580. goto rx_next;
  581. if (rxbuf->rxstatus.rs_status & ATH9K_RXERR_DECRYPT) {
  582. /* FIXME */
  583. } else if (rxbuf->rxstatus.rs_status & ATH9K_RXERR_MIC) {
  584. if (ieee80211_is_ctl(fc))
  585. /*
  586. * Sometimes, we get invalid
  587. * MIC failures on valid control frames.
  588. * Remove these mic errors.
  589. */
  590. rxbuf->rxstatus.rs_status &= ~ATH9K_RXERR_MIC;
  591. else
  592. rx_status->flag |= RX_FLAG_MMIC_ERROR;
  593. }
  594. /*
  595. * Reject error frames with the exception of
  596. * decryption and MIC failures. For monitor mode,
  597. * we also ignore the CRC error.
  598. */
  599. if (priv->ah->opmode == NL80211_IFTYPE_MONITOR) {
  600. if (rxbuf->rxstatus.rs_status &
  601. ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC |
  602. ATH9K_RXERR_CRC))
  603. goto rx_next;
  604. } else {
  605. if (rxbuf->rxstatus.rs_status &
  606. ~(ATH9K_RXERR_DECRYPT | ATH9K_RXERR_MIC)) {
  607. goto rx_next;
  608. }
  609. }
  610. }
  611. if (!(rxbuf->rxstatus.rs_status & ATH9K_RXERR_DECRYPT)) {
  612. u8 keyix;
  613. keyix = rxbuf->rxstatus.rs_keyix;
  614. if (keyix != ATH9K_RXKEYIX_INVALID) {
  615. rx_status->flag |= RX_FLAG_DECRYPTED;
  616. } else if (ieee80211_has_protected(fc) &&
  617. skb->len >= hdrlen + 4) {
  618. keyix = skb->data[hdrlen + 3] >> 6;
  619. if (test_bit(keyix, common->keymap))
  620. rx_status->flag |= RX_FLAG_DECRYPTED;
  621. }
  622. }
  623. ath9k_process_rate(hw, rx_status, rxbuf->rxstatus.rs_rate,
  624. rxbuf->rxstatus.rs_flags);
  625. if (rxbuf->rxstatus.rs_rssi != ATH9K_RSSI_BAD &&
  626. !rxbuf->rxstatus.rs_moreaggr)
  627. ATH_RSSI_LPF(priv->rx.last_rssi,
  628. rxbuf->rxstatus.rs_rssi);
  629. last_rssi = priv->rx.last_rssi;
  630. if (likely(last_rssi != ATH_RSSI_DUMMY_MARKER))
  631. rxbuf->rxstatus.rs_rssi = ATH_EP_RND(last_rssi,
  632. ATH_RSSI_EP_MULTIPLIER);
  633. if (rxbuf->rxstatus.rs_rssi < 0)
  634. rxbuf->rxstatus.rs_rssi = 0;
  635. if (ieee80211_is_beacon(fc))
  636. priv->ah->stats.avgbrssi = rxbuf->rxstatus.rs_rssi;
  637. rx_status->mactime = be64_to_cpu(rxbuf->rxstatus.rs_tstamp);
  638. rx_status->band = hw->conf.channel->band;
  639. rx_status->freq = hw->conf.channel->center_freq;
  640. rx_status->signal = rxbuf->rxstatus.rs_rssi + ATH_DEFAULT_NOISE_FLOOR;
  641. rx_status->antenna = rxbuf->rxstatus.rs_antenna;
  642. rx_status->flag |= RX_FLAG_MACTIME_MPDU;
  643. return true;
  644. rx_next:
  645. return false;
  646. }
  647. /*
  648. * FIXME: Handle FLUSH later on.
  649. */
  650. void ath9k_rx_tasklet(unsigned long data)
  651. {
  652. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *)data;
  653. struct ath9k_htc_rxbuf *rxbuf = NULL, *tmp_buf = NULL;
  654. struct ieee80211_rx_status rx_status;
  655. struct sk_buff *skb;
  656. unsigned long flags;
  657. struct ieee80211_hdr *hdr;
  658. do {
  659. spin_lock_irqsave(&priv->rx.rxbuflock, flags);
  660. list_for_each_entry(tmp_buf, &priv->rx.rxbuf, list) {
  661. if (tmp_buf->in_process) {
  662. rxbuf = tmp_buf;
  663. break;
  664. }
  665. }
  666. if (rxbuf == NULL) {
  667. spin_unlock_irqrestore(&priv->rx.rxbuflock, flags);
  668. break;
  669. }
  670. if (!rxbuf->skb)
  671. goto requeue;
  672. if (!ath9k_rx_prepare(priv, rxbuf, &rx_status)) {
  673. dev_kfree_skb_any(rxbuf->skb);
  674. goto requeue;
  675. }
  676. memcpy(IEEE80211_SKB_RXCB(rxbuf->skb), &rx_status,
  677. sizeof(struct ieee80211_rx_status));
  678. skb = rxbuf->skb;
  679. hdr = (struct ieee80211_hdr *) skb->data;
  680. if (ieee80211_is_beacon(hdr->frame_control) && priv->ps_enabled)
  681. ieee80211_queue_work(priv->hw, &priv->ps_work);
  682. spin_unlock_irqrestore(&priv->rx.rxbuflock, flags);
  683. ieee80211_rx(priv->hw, skb);
  684. spin_lock_irqsave(&priv->rx.rxbuflock, flags);
  685. requeue:
  686. rxbuf->in_process = false;
  687. rxbuf->skb = NULL;
  688. list_move_tail(&rxbuf->list, &priv->rx.rxbuf);
  689. rxbuf = NULL;
  690. spin_unlock_irqrestore(&priv->rx.rxbuflock, flags);
  691. } while (1);
  692. }
  693. void ath9k_htc_rxep(void *drv_priv, struct sk_buff *skb,
  694. enum htc_endpoint_id ep_id)
  695. {
  696. struct ath9k_htc_priv *priv = (struct ath9k_htc_priv *)drv_priv;
  697. struct ath_hw *ah = priv->ah;
  698. struct ath_common *common = ath9k_hw_common(ah);
  699. struct ath9k_htc_rxbuf *rxbuf = NULL, *tmp_buf = NULL;
  700. spin_lock(&priv->rx.rxbuflock);
  701. list_for_each_entry(tmp_buf, &priv->rx.rxbuf, list) {
  702. if (!tmp_buf->in_process) {
  703. rxbuf = tmp_buf;
  704. break;
  705. }
  706. }
  707. spin_unlock(&priv->rx.rxbuflock);
  708. if (rxbuf == NULL) {
  709. ath_dbg(common, ATH_DBG_ANY,
  710. "No free RX buffer\n");
  711. goto err;
  712. }
  713. spin_lock(&priv->rx.rxbuflock);
  714. rxbuf->skb = skb;
  715. rxbuf->in_process = true;
  716. spin_unlock(&priv->rx.rxbuflock);
  717. tasklet_schedule(&priv->rx_tasklet);
  718. return;
  719. err:
  720. dev_kfree_skb_any(skb);
  721. }
  722. /* FIXME: Locking for cleanup/init */
  723. void ath9k_rx_cleanup(struct ath9k_htc_priv *priv)
  724. {
  725. struct ath9k_htc_rxbuf *rxbuf, *tbuf;
  726. list_for_each_entry_safe(rxbuf, tbuf, &priv->rx.rxbuf, list) {
  727. list_del(&rxbuf->list);
  728. if (rxbuf->skb)
  729. dev_kfree_skb_any(rxbuf->skb);
  730. kfree(rxbuf);
  731. }
  732. }
  733. int ath9k_rx_init(struct ath9k_htc_priv *priv)
  734. {
  735. struct ath_hw *ah = priv->ah;
  736. struct ath_common *common = ath9k_hw_common(ah);
  737. struct ath9k_htc_rxbuf *rxbuf;
  738. int i = 0;
  739. INIT_LIST_HEAD(&priv->rx.rxbuf);
  740. spin_lock_init(&priv->rx.rxbuflock);
  741. for (i = 0; i < ATH9K_HTC_RXBUF; i++) {
  742. rxbuf = kzalloc(sizeof(struct ath9k_htc_rxbuf), GFP_KERNEL);
  743. if (rxbuf == NULL) {
  744. ath_err(common, "Unable to allocate RX buffers\n");
  745. goto err;
  746. }
  747. list_add_tail(&rxbuf->list, &priv->rx.rxbuf);
  748. }
  749. return 0;
  750. err:
  751. ath9k_rx_cleanup(priv);
  752. return -ENOMEM;
  753. }