main.c 60 KB

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  1. /*
  2. * Copyright (c) 2008-2011 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/nl80211.h>
  17. #include <linux/delay.h>
  18. #include "ath9k.h"
  19. #include "btcoex.h"
  20. static u8 parse_mpdudensity(u8 mpdudensity)
  21. {
  22. /*
  23. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  24. * 0 for no restriction
  25. * 1 for 1/4 us
  26. * 2 for 1/2 us
  27. * 3 for 1 us
  28. * 4 for 2 us
  29. * 5 for 4 us
  30. * 6 for 8 us
  31. * 7 for 16 us
  32. */
  33. switch (mpdudensity) {
  34. case 0:
  35. return 0;
  36. case 1:
  37. case 2:
  38. case 3:
  39. /* Our lower layer calculations limit our precision to
  40. 1 microsecond */
  41. return 1;
  42. case 4:
  43. return 2;
  44. case 5:
  45. return 4;
  46. case 6:
  47. return 8;
  48. case 7:
  49. return 16;
  50. default:
  51. return 0;
  52. }
  53. }
  54. static bool ath9k_has_pending_frames(struct ath_softc *sc, struct ath_txq *txq)
  55. {
  56. bool pending = false;
  57. spin_lock_bh(&txq->axq_lock);
  58. if (txq->axq_depth || !list_empty(&txq->axq_acq))
  59. pending = true;
  60. spin_unlock_bh(&txq->axq_lock);
  61. return pending;
  62. }
  63. static bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  64. {
  65. unsigned long flags;
  66. bool ret;
  67. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  68. ret = ath9k_hw_setpower(sc->sc_ah, mode);
  69. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  70. return ret;
  71. }
  72. void ath9k_ps_wakeup(struct ath_softc *sc)
  73. {
  74. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  75. unsigned long flags;
  76. enum ath9k_power_mode power_mode;
  77. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  78. if (++sc->ps_usecount != 1)
  79. goto unlock;
  80. power_mode = sc->sc_ah->power_mode;
  81. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  82. /*
  83. * While the hardware is asleep, the cycle counters contain no
  84. * useful data. Better clear them now so that they don't mess up
  85. * survey data results.
  86. */
  87. if (power_mode != ATH9K_PM_AWAKE) {
  88. spin_lock(&common->cc_lock);
  89. ath_hw_cycle_counters_update(common);
  90. memset(&common->cc_survey, 0, sizeof(common->cc_survey));
  91. spin_unlock(&common->cc_lock);
  92. }
  93. unlock:
  94. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  95. }
  96. void ath9k_ps_restore(struct ath_softc *sc)
  97. {
  98. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  99. unsigned long flags;
  100. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  101. if (--sc->ps_usecount != 0)
  102. goto unlock;
  103. spin_lock(&common->cc_lock);
  104. ath_hw_cycle_counters_update(common);
  105. spin_unlock(&common->cc_lock);
  106. if (sc->ps_idle)
  107. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
  108. else if (sc->ps_enabled &&
  109. !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
  110. PS_WAIT_FOR_CAB |
  111. PS_WAIT_FOR_PSPOLL_DATA |
  112. PS_WAIT_FOR_TX_ACK)))
  113. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
  114. unlock:
  115. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  116. }
  117. void ath_start_ani(struct ath_common *common)
  118. {
  119. struct ath_hw *ah = common->ah;
  120. unsigned long timestamp = jiffies_to_msecs(jiffies);
  121. struct ath_softc *sc = (struct ath_softc *) common->priv;
  122. if (!(sc->sc_flags & SC_OP_ANI_RUN))
  123. return;
  124. if (sc->sc_flags & SC_OP_OFFCHANNEL)
  125. return;
  126. common->ani.longcal_timer = timestamp;
  127. common->ani.shortcal_timer = timestamp;
  128. common->ani.checkani_timer = timestamp;
  129. mod_timer(&common->ani.timer,
  130. jiffies +
  131. msecs_to_jiffies((u32)ah->config.ani_poll_interval));
  132. }
  133. static void ath_update_survey_nf(struct ath_softc *sc, int channel)
  134. {
  135. struct ath_hw *ah = sc->sc_ah;
  136. struct ath9k_channel *chan = &ah->channels[channel];
  137. struct survey_info *survey = &sc->survey[channel];
  138. if (chan->noisefloor) {
  139. survey->filled |= SURVEY_INFO_NOISE_DBM;
  140. survey->noise = ath9k_hw_getchan_noise(ah, chan);
  141. }
  142. }
  143. /*
  144. * Updates the survey statistics and returns the busy time since last
  145. * update in %, if the measurement duration was long enough for the
  146. * result to be useful, -1 otherwise.
  147. */
  148. static int ath_update_survey_stats(struct ath_softc *sc)
  149. {
  150. struct ath_hw *ah = sc->sc_ah;
  151. struct ath_common *common = ath9k_hw_common(ah);
  152. int pos = ah->curchan - &ah->channels[0];
  153. struct survey_info *survey = &sc->survey[pos];
  154. struct ath_cycle_counters *cc = &common->cc_survey;
  155. unsigned int div = common->clockrate * 1000;
  156. int ret = 0;
  157. if (!ah->curchan)
  158. return -1;
  159. if (ah->power_mode == ATH9K_PM_AWAKE)
  160. ath_hw_cycle_counters_update(common);
  161. if (cc->cycles > 0) {
  162. survey->filled |= SURVEY_INFO_CHANNEL_TIME |
  163. SURVEY_INFO_CHANNEL_TIME_BUSY |
  164. SURVEY_INFO_CHANNEL_TIME_RX |
  165. SURVEY_INFO_CHANNEL_TIME_TX;
  166. survey->channel_time += cc->cycles / div;
  167. survey->channel_time_busy += cc->rx_busy / div;
  168. survey->channel_time_rx += cc->rx_frame / div;
  169. survey->channel_time_tx += cc->tx_frame / div;
  170. }
  171. if (cc->cycles < div)
  172. return -1;
  173. if (cc->cycles > 0)
  174. ret = cc->rx_busy * 100 / cc->cycles;
  175. memset(cc, 0, sizeof(*cc));
  176. ath_update_survey_nf(sc, pos);
  177. return ret;
  178. }
  179. /*
  180. * Set/change channels. If the channel is really being changed, it's done
  181. * by reseting the chip. To accomplish this we must first cleanup any pending
  182. * DMA, then restart stuff.
  183. */
  184. static int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  185. struct ath9k_channel *hchan)
  186. {
  187. struct ath_hw *ah = sc->sc_ah;
  188. struct ath_common *common = ath9k_hw_common(ah);
  189. struct ieee80211_conf *conf = &common->hw->conf;
  190. bool fastcc = true, stopped;
  191. struct ieee80211_channel *channel = hw->conf.channel;
  192. struct ath9k_hw_cal_data *caldata = NULL;
  193. int r;
  194. if (sc->sc_flags & SC_OP_INVALID)
  195. return -EIO;
  196. sc->hw_busy_count = 0;
  197. del_timer_sync(&common->ani.timer);
  198. cancel_work_sync(&sc->paprd_work);
  199. cancel_work_sync(&sc->hw_check_work);
  200. cancel_delayed_work_sync(&sc->tx_complete_work);
  201. cancel_delayed_work_sync(&sc->hw_pll_work);
  202. ath9k_ps_wakeup(sc);
  203. spin_lock_bh(&sc->sc_pcu_lock);
  204. /*
  205. * This is only performed if the channel settings have
  206. * actually changed.
  207. *
  208. * To switch channels clear any pending DMA operations;
  209. * wait long enough for the RX fifo to drain, reset the
  210. * hardware at the new frequency, and then re-enable
  211. * the relevant bits of the h/w.
  212. */
  213. ath9k_hw_disable_interrupts(ah);
  214. stopped = ath_drain_all_txq(sc, false);
  215. if (!ath_stoprecv(sc))
  216. stopped = false;
  217. if (!ath9k_hw_check_alive(ah))
  218. stopped = false;
  219. /* XXX: do not flush receive queue here. We don't want
  220. * to flush data frames already in queue because of
  221. * changing channel. */
  222. if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
  223. fastcc = false;
  224. if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
  225. caldata = &sc->caldata;
  226. ath_dbg(common, ATH_DBG_CONFIG,
  227. "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
  228. sc->sc_ah->curchan->channel,
  229. channel->center_freq, conf_is_ht40(conf),
  230. fastcc);
  231. r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  232. if (r) {
  233. ath_err(common,
  234. "Unable to reset channel (%u MHz), reset status %d\n",
  235. channel->center_freq, r);
  236. goto ps_restore;
  237. }
  238. if (ath_startrecv(sc) != 0) {
  239. ath_err(common, "Unable to restart recv logic\n");
  240. r = -EIO;
  241. goto ps_restore;
  242. }
  243. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  244. sc->config.txpowlimit, &sc->curtxpow);
  245. ath9k_hw_set_interrupts(ah, ah->imask);
  246. ath9k_hw_enable_interrupts(ah);
  247. if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
  248. if (sc->sc_flags & SC_OP_BEACONS)
  249. ath_set_beacon(sc);
  250. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  251. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/2);
  252. if (!common->disable_ani)
  253. ath_start_ani(common);
  254. }
  255. ps_restore:
  256. ieee80211_wake_queues(hw);
  257. spin_unlock_bh(&sc->sc_pcu_lock);
  258. ath9k_ps_restore(sc);
  259. return r;
  260. }
  261. static void ath_paprd_activate(struct ath_softc *sc)
  262. {
  263. struct ath_hw *ah = sc->sc_ah;
  264. struct ath9k_hw_cal_data *caldata = ah->caldata;
  265. struct ath_common *common = ath9k_hw_common(ah);
  266. int chain;
  267. if (!caldata || !caldata->paprd_done)
  268. return;
  269. ath9k_ps_wakeup(sc);
  270. ar9003_paprd_enable(ah, false);
  271. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  272. if (!(common->tx_chainmask & BIT(chain)))
  273. continue;
  274. ar9003_paprd_populate_single_table(ah, caldata, chain);
  275. }
  276. ar9003_paprd_enable(ah, true);
  277. ath9k_ps_restore(sc);
  278. }
  279. static bool ath_paprd_send_frame(struct ath_softc *sc, struct sk_buff *skb, int chain)
  280. {
  281. struct ieee80211_hw *hw = sc->hw;
  282. struct ieee80211_tx_info *tx_info = IEEE80211_SKB_CB(skb);
  283. struct ath_hw *ah = sc->sc_ah;
  284. struct ath_common *common = ath9k_hw_common(ah);
  285. struct ath_tx_control txctl;
  286. int time_left;
  287. memset(&txctl, 0, sizeof(txctl));
  288. txctl.txq = sc->tx.txq_map[WME_AC_BE];
  289. memset(tx_info, 0, sizeof(*tx_info));
  290. tx_info->band = hw->conf.channel->band;
  291. tx_info->flags |= IEEE80211_TX_CTL_NO_ACK;
  292. tx_info->control.rates[0].idx = 0;
  293. tx_info->control.rates[0].count = 1;
  294. tx_info->control.rates[0].flags = IEEE80211_TX_RC_MCS;
  295. tx_info->control.rates[1].idx = -1;
  296. init_completion(&sc->paprd_complete);
  297. txctl.paprd = BIT(chain);
  298. if (ath_tx_start(hw, skb, &txctl) != 0) {
  299. ath_dbg(common, ATH_DBG_CALIBRATE, "PAPRD TX failed\n");
  300. dev_kfree_skb_any(skb);
  301. return false;
  302. }
  303. time_left = wait_for_completion_timeout(&sc->paprd_complete,
  304. msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
  305. if (!time_left)
  306. ath_dbg(common, ATH_DBG_CALIBRATE,
  307. "Timeout waiting for paprd training on TX chain %d\n",
  308. chain);
  309. return !!time_left;
  310. }
  311. void ath_paprd_calibrate(struct work_struct *work)
  312. {
  313. struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
  314. struct ieee80211_hw *hw = sc->hw;
  315. struct ath_hw *ah = sc->sc_ah;
  316. struct ieee80211_hdr *hdr;
  317. struct sk_buff *skb = NULL;
  318. struct ath9k_hw_cal_data *caldata = ah->caldata;
  319. struct ath_common *common = ath9k_hw_common(ah);
  320. int ftype;
  321. int chain_ok = 0;
  322. int chain;
  323. int len = 1800;
  324. if (!caldata)
  325. return;
  326. ath9k_ps_wakeup(sc);
  327. if (ar9003_paprd_init_table(ah) < 0)
  328. goto fail_paprd;
  329. skb = alloc_skb(len, GFP_KERNEL);
  330. if (!skb)
  331. goto fail_paprd;
  332. skb_put(skb, len);
  333. memset(skb->data, 0, len);
  334. hdr = (struct ieee80211_hdr *)skb->data;
  335. ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
  336. hdr->frame_control = cpu_to_le16(ftype);
  337. hdr->duration_id = cpu_to_le16(10);
  338. memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
  339. memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
  340. memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
  341. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  342. if (!(common->tx_chainmask & BIT(chain)))
  343. continue;
  344. chain_ok = 0;
  345. ath_dbg(common, ATH_DBG_CALIBRATE,
  346. "Sending PAPRD frame for thermal measurement "
  347. "on chain %d\n", chain);
  348. if (!ath_paprd_send_frame(sc, skb, chain))
  349. goto fail_paprd;
  350. ar9003_paprd_setup_gain_table(ah, chain);
  351. ath_dbg(common, ATH_DBG_CALIBRATE,
  352. "Sending PAPRD training frame on chain %d\n", chain);
  353. if (!ath_paprd_send_frame(sc, skb, chain))
  354. goto fail_paprd;
  355. if (!ar9003_paprd_is_done(ah)) {
  356. ath_dbg(common, ATH_DBG_CALIBRATE,
  357. "PAPRD not yet done on chain %d\n", chain);
  358. break;
  359. }
  360. if (ar9003_paprd_create_curve(ah, caldata, chain)) {
  361. ath_dbg(common, ATH_DBG_CALIBRATE,
  362. "PAPRD create curve failed on chain %d\n",
  363. chain);
  364. break;
  365. }
  366. chain_ok = 1;
  367. }
  368. kfree_skb(skb);
  369. if (chain_ok) {
  370. caldata->paprd_done = true;
  371. ath_paprd_activate(sc);
  372. }
  373. fail_paprd:
  374. ath9k_ps_restore(sc);
  375. }
  376. /*
  377. * This routine performs the periodic noise floor calibration function
  378. * that is used to adjust and optimize the chip performance. This
  379. * takes environmental changes (location, temperature) into account.
  380. * When the task is complete, it reschedules itself depending on the
  381. * appropriate interval that was calculated.
  382. */
  383. void ath_ani_calibrate(unsigned long data)
  384. {
  385. struct ath_softc *sc = (struct ath_softc *)data;
  386. struct ath_hw *ah = sc->sc_ah;
  387. struct ath_common *common = ath9k_hw_common(ah);
  388. bool longcal = false;
  389. bool shortcal = false;
  390. bool aniflag = false;
  391. unsigned int timestamp = jiffies_to_msecs(jiffies);
  392. u32 cal_interval, short_cal_interval, long_cal_interval;
  393. unsigned long flags;
  394. if (ah->caldata && ah->caldata->nfcal_interference)
  395. long_cal_interval = ATH_LONG_CALINTERVAL_INT;
  396. else
  397. long_cal_interval = ATH_LONG_CALINTERVAL;
  398. short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
  399. ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
  400. /* Only calibrate if awake */
  401. if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
  402. goto set_timer;
  403. ath9k_ps_wakeup(sc);
  404. /* Long calibration runs independently of short calibration. */
  405. if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
  406. longcal = true;
  407. ath_dbg(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
  408. common->ani.longcal_timer = timestamp;
  409. }
  410. /* Short calibration applies only while caldone is false */
  411. if (!common->ani.caldone) {
  412. if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
  413. shortcal = true;
  414. ath_dbg(common, ATH_DBG_ANI,
  415. "shortcal @%lu\n", jiffies);
  416. common->ani.shortcal_timer = timestamp;
  417. common->ani.resetcal_timer = timestamp;
  418. }
  419. } else {
  420. if ((timestamp - common->ani.resetcal_timer) >=
  421. ATH_RESTART_CALINTERVAL) {
  422. common->ani.caldone = ath9k_hw_reset_calvalid(ah);
  423. if (common->ani.caldone)
  424. common->ani.resetcal_timer = timestamp;
  425. }
  426. }
  427. /* Verify whether we must check ANI */
  428. if ((timestamp - common->ani.checkani_timer) >=
  429. ah->config.ani_poll_interval) {
  430. aniflag = true;
  431. common->ani.checkani_timer = timestamp;
  432. }
  433. /* Call ANI routine if necessary */
  434. if (aniflag) {
  435. spin_lock_irqsave(&common->cc_lock, flags);
  436. ath9k_hw_ani_monitor(ah, ah->curchan);
  437. ath_update_survey_stats(sc);
  438. spin_unlock_irqrestore(&common->cc_lock, flags);
  439. }
  440. /* Perform calibration if necessary */
  441. if (longcal || shortcal) {
  442. common->ani.caldone =
  443. ath9k_hw_calibrate(ah, ah->curchan,
  444. common->rx_chainmask, longcal);
  445. }
  446. ath9k_ps_restore(sc);
  447. set_timer:
  448. /*
  449. * Set timer interval based on previous results.
  450. * The interval must be the shortest necessary to satisfy ANI,
  451. * short calibration and long calibration.
  452. */
  453. cal_interval = ATH_LONG_CALINTERVAL;
  454. if (sc->sc_ah->config.enable_ani)
  455. cal_interval = min(cal_interval,
  456. (u32)ah->config.ani_poll_interval);
  457. if (!common->ani.caldone)
  458. cal_interval = min(cal_interval, (u32)short_cal_interval);
  459. mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
  460. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
  461. if (!ah->caldata->paprd_done)
  462. ieee80211_queue_work(sc->hw, &sc->paprd_work);
  463. else if (!ah->paprd_table_write_done)
  464. ath_paprd_activate(sc);
  465. }
  466. }
  467. static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
  468. {
  469. struct ath_node *an;
  470. struct ath_hw *ah = sc->sc_ah;
  471. an = (struct ath_node *)sta->drv_priv;
  472. #ifdef CONFIG_ATH9K_DEBUGFS
  473. spin_lock(&sc->nodes_lock);
  474. list_add(&an->list, &sc->nodes);
  475. spin_unlock(&sc->nodes_lock);
  476. an->sta = sta;
  477. #endif
  478. if ((ah->caps.hw_caps) & ATH9K_HW_CAP_APM)
  479. sc->sc_flags |= SC_OP_ENABLE_APM;
  480. if (sc->sc_flags & SC_OP_TXAGGR) {
  481. ath_tx_node_init(sc, an);
  482. an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
  483. sta->ht_cap.ampdu_factor);
  484. an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
  485. }
  486. }
  487. static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
  488. {
  489. struct ath_node *an = (struct ath_node *)sta->drv_priv;
  490. #ifdef CONFIG_ATH9K_DEBUGFS
  491. spin_lock(&sc->nodes_lock);
  492. list_del(&an->list);
  493. spin_unlock(&sc->nodes_lock);
  494. an->sta = NULL;
  495. #endif
  496. if (sc->sc_flags & SC_OP_TXAGGR)
  497. ath_tx_node_cleanup(sc, an);
  498. }
  499. void ath_hw_check(struct work_struct *work)
  500. {
  501. struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
  502. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  503. unsigned long flags;
  504. int busy;
  505. ath9k_ps_wakeup(sc);
  506. if (ath9k_hw_check_alive(sc->sc_ah))
  507. goto out;
  508. spin_lock_irqsave(&common->cc_lock, flags);
  509. busy = ath_update_survey_stats(sc);
  510. spin_unlock_irqrestore(&common->cc_lock, flags);
  511. ath_dbg(common, ATH_DBG_RESET, "Possible baseband hang, "
  512. "busy=%d (try %d)\n", busy, sc->hw_busy_count + 1);
  513. if (busy >= 99) {
  514. if (++sc->hw_busy_count >= 3) {
  515. spin_lock_bh(&sc->sc_pcu_lock);
  516. ath_reset(sc, true);
  517. spin_unlock_bh(&sc->sc_pcu_lock);
  518. }
  519. } else if (busy >= 0)
  520. sc->hw_busy_count = 0;
  521. out:
  522. ath9k_ps_restore(sc);
  523. }
  524. static void ath_hw_pll_rx_hang_check(struct ath_softc *sc, u32 pll_sqsum)
  525. {
  526. static int count;
  527. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  528. if (pll_sqsum >= 0x40000) {
  529. count++;
  530. if (count == 3) {
  531. /* Rx is hung for more than 500ms. Reset it */
  532. ath_dbg(common, ATH_DBG_RESET,
  533. "Possible RX hang, resetting");
  534. spin_lock_bh(&sc->sc_pcu_lock);
  535. ath_reset(sc, true);
  536. spin_unlock_bh(&sc->sc_pcu_lock);
  537. count = 0;
  538. }
  539. } else
  540. count = 0;
  541. }
  542. void ath_hw_pll_work(struct work_struct *work)
  543. {
  544. struct ath_softc *sc = container_of(work, struct ath_softc,
  545. hw_pll_work.work);
  546. u32 pll_sqsum;
  547. if (AR_SREV_9485(sc->sc_ah)) {
  548. ath9k_ps_wakeup(sc);
  549. pll_sqsum = ar9003_get_pll_sqsum_dvc(sc->sc_ah);
  550. ath9k_ps_restore(sc);
  551. ath_hw_pll_rx_hang_check(sc, pll_sqsum);
  552. ieee80211_queue_delayed_work(sc->hw, &sc->hw_pll_work, HZ/5);
  553. }
  554. }
  555. void ath9k_tasklet(unsigned long data)
  556. {
  557. struct ath_softc *sc = (struct ath_softc *)data;
  558. struct ath_hw *ah = sc->sc_ah;
  559. struct ath_common *common = ath9k_hw_common(ah);
  560. u32 status = sc->intrstatus;
  561. u32 rxmask;
  562. if ((status & ATH9K_INT_FATAL) ||
  563. (status & ATH9K_INT_BB_WATCHDOG)) {
  564. spin_lock(&sc->sc_pcu_lock);
  565. ath_reset(sc, true);
  566. spin_unlock(&sc->sc_pcu_lock);
  567. return;
  568. }
  569. ath9k_ps_wakeup(sc);
  570. spin_lock(&sc->sc_pcu_lock);
  571. /*
  572. * Only run the baseband hang check if beacons stop working in AP or
  573. * IBSS mode, because it has a high false positive rate. For station
  574. * mode it should not be necessary, since the upper layers will detect
  575. * this through a beacon miss automatically and the following channel
  576. * change will trigger a hardware reset anyway
  577. */
  578. if (ath9k_hw_numtxpending(ah, sc->beacon.beaconq) != 0 &&
  579. !ath9k_hw_check_alive(ah))
  580. ieee80211_queue_work(sc->hw, &sc->hw_check_work);
  581. if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
  582. /*
  583. * TSF sync does not look correct; remain awake to sync with
  584. * the next Beacon.
  585. */
  586. ath_dbg(common, ATH_DBG_PS,
  587. "TSFOOR - Sync with next Beacon\n");
  588. sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
  589. }
  590. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  591. rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
  592. ATH9K_INT_RXORN);
  593. else
  594. rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  595. if (status & rxmask) {
  596. /* Check for high priority Rx first */
  597. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  598. (status & ATH9K_INT_RXHP))
  599. ath_rx_tasklet(sc, 0, true);
  600. ath_rx_tasklet(sc, 0, false);
  601. }
  602. if (status & ATH9K_INT_TX) {
  603. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  604. ath_tx_edma_tasklet(sc);
  605. else
  606. ath_tx_tasklet(sc);
  607. }
  608. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  609. if (status & ATH9K_INT_GENTIMER)
  610. ath_gen_timer_isr(sc->sc_ah);
  611. /* re-enable hardware interrupt */
  612. ath9k_hw_enable_interrupts(ah);
  613. spin_unlock(&sc->sc_pcu_lock);
  614. ath9k_ps_restore(sc);
  615. }
  616. irqreturn_t ath_isr(int irq, void *dev)
  617. {
  618. #define SCHED_INTR ( \
  619. ATH9K_INT_FATAL | \
  620. ATH9K_INT_BB_WATCHDOG | \
  621. ATH9K_INT_RXORN | \
  622. ATH9K_INT_RXEOL | \
  623. ATH9K_INT_RX | \
  624. ATH9K_INT_RXLP | \
  625. ATH9K_INT_RXHP | \
  626. ATH9K_INT_TX | \
  627. ATH9K_INT_BMISS | \
  628. ATH9K_INT_CST | \
  629. ATH9K_INT_TSFOOR | \
  630. ATH9K_INT_GENTIMER)
  631. struct ath_softc *sc = dev;
  632. struct ath_hw *ah = sc->sc_ah;
  633. struct ath_common *common = ath9k_hw_common(ah);
  634. enum ath9k_int status;
  635. bool sched = false;
  636. /*
  637. * The hardware is not ready/present, don't
  638. * touch anything. Note this can happen early
  639. * on if the IRQ is shared.
  640. */
  641. if (sc->sc_flags & SC_OP_INVALID)
  642. return IRQ_NONE;
  643. /* shared irq, not for us */
  644. if (!ath9k_hw_intrpend(ah))
  645. return IRQ_NONE;
  646. /*
  647. * Figure out the reason(s) for the interrupt. Note
  648. * that the hal returns a pseudo-ISR that may include
  649. * bits we haven't explicitly enabled so we mask the
  650. * value to insure we only process bits we requested.
  651. */
  652. ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
  653. status &= ah->imask; /* discard unasked-for bits */
  654. /*
  655. * If there are no status bits set, then this interrupt was not
  656. * for me (should have been caught above).
  657. */
  658. if (!status)
  659. return IRQ_NONE;
  660. /* Cache the status */
  661. sc->intrstatus = status;
  662. if (status & SCHED_INTR)
  663. sched = true;
  664. /*
  665. * If a FATAL or RXORN interrupt is received, we have to reset the
  666. * chip immediately.
  667. */
  668. if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
  669. !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
  670. goto chip_reset;
  671. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  672. (status & ATH9K_INT_BB_WATCHDOG)) {
  673. spin_lock(&common->cc_lock);
  674. ath_hw_cycle_counters_update(common);
  675. ar9003_hw_bb_watchdog_dbg_info(ah);
  676. spin_unlock(&common->cc_lock);
  677. goto chip_reset;
  678. }
  679. if (status & ATH9K_INT_SWBA)
  680. tasklet_schedule(&sc->bcon_tasklet);
  681. if (status & ATH9K_INT_TXURN)
  682. ath9k_hw_updatetxtriglevel(ah, true);
  683. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
  684. if (status & ATH9K_INT_RXEOL) {
  685. ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  686. ath9k_hw_set_interrupts(ah, ah->imask);
  687. }
  688. }
  689. if (status & ATH9K_INT_MIB) {
  690. /*
  691. * Disable interrupts until we service the MIB
  692. * interrupt; otherwise it will continue to
  693. * fire.
  694. */
  695. ath9k_hw_disable_interrupts(ah);
  696. /*
  697. * Let the hal handle the event. We assume
  698. * it will clear whatever condition caused
  699. * the interrupt.
  700. */
  701. spin_lock(&common->cc_lock);
  702. ath9k_hw_proc_mib_event(ah);
  703. spin_unlock(&common->cc_lock);
  704. ath9k_hw_enable_interrupts(ah);
  705. }
  706. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  707. if (status & ATH9K_INT_TIM_TIMER) {
  708. if (ATH_DBG_WARN_ON_ONCE(sc->ps_idle))
  709. goto chip_reset;
  710. /* Clear RxAbort bit so that we can
  711. * receive frames */
  712. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  713. ath9k_hw_setrxabort(sc->sc_ah, 0);
  714. sc->ps_flags |= PS_WAIT_FOR_BEACON;
  715. }
  716. chip_reset:
  717. ath_debug_stat_interrupt(sc, status);
  718. if (sched) {
  719. /* turn off every interrupt */
  720. ath9k_hw_disable_interrupts(ah);
  721. tasklet_schedule(&sc->intr_tq);
  722. }
  723. return IRQ_HANDLED;
  724. #undef SCHED_INTR
  725. }
  726. static void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
  727. {
  728. struct ath_hw *ah = sc->sc_ah;
  729. struct ath_common *common = ath9k_hw_common(ah);
  730. struct ieee80211_channel *channel = hw->conf.channel;
  731. int r;
  732. ath9k_ps_wakeup(sc);
  733. spin_lock_bh(&sc->sc_pcu_lock);
  734. atomic_set(&ah->intr_ref_cnt, -1);
  735. ath9k_hw_configpcipowersave(ah, false);
  736. if (!ah->curchan)
  737. ah->curchan = ath9k_cmn_get_curchannel(sc->hw, ah);
  738. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  739. if (r) {
  740. ath_err(common,
  741. "Unable to reset channel (%u MHz), reset status %d\n",
  742. channel->center_freq, r);
  743. }
  744. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  745. sc->config.txpowlimit, &sc->curtxpow);
  746. if (ath_startrecv(sc) != 0) {
  747. ath_err(common, "Unable to restart recv logic\n");
  748. goto out;
  749. }
  750. if (sc->sc_flags & SC_OP_BEACONS)
  751. ath_set_beacon(sc); /* restart beacons */
  752. /* Re-Enable interrupts */
  753. ath9k_hw_set_interrupts(ah, ah->imask);
  754. ath9k_hw_enable_interrupts(ah);
  755. /* Enable LED */
  756. ath9k_hw_cfg_output(ah, ah->led_pin,
  757. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  758. ath9k_hw_set_gpio(ah, ah->led_pin, 0);
  759. ieee80211_wake_queues(hw);
  760. ieee80211_queue_delayed_work(hw, &sc->hw_pll_work, HZ/2);
  761. out:
  762. spin_unlock_bh(&sc->sc_pcu_lock);
  763. ath9k_ps_restore(sc);
  764. }
  765. void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
  766. {
  767. struct ath_hw *ah = sc->sc_ah;
  768. struct ieee80211_channel *channel = hw->conf.channel;
  769. int r;
  770. ath9k_ps_wakeup(sc);
  771. cancel_delayed_work_sync(&sc->hw_pll_work);
  772. spin_lock_bh(&sc->sc_pcu_lock);
  773. ieee80211_stop_queues(hw);
  774. /*
  775. * Keep the LED on when the radio is disabled
  776. * during idle unassociated state.
  777. */
  778. if (!sc->ps_idle) {
  779. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  780. ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
  781. }
  782. /* Disable interrupts */
  783. ath9k_hw_disable_interrupts(ah);
  784. ath_drain_all_txq(sc, false); /* clear pending tx frames */
  785. ath_stoprecv(sc); /* turn off frame recv */
  786. ath_flushrecv(sc); /* flush recv queue */
  787. if (!ah->curchan)
  788. ah->curchan = ath9k_cmn_get_curchannel(hw, ah);
  789. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  790. if (r) {
  791. ath_err(ath9k_hw_common(sc->sc_ah),
  792. "Unable to reset channel (%u MHz), reset status %d\n",
  793. channel->center_freq, r);
  794. }
  795. ath9k_hw_phy_disable(ah);
  796. ath9k_hw_configpcipowersave(ah, true);
  797. spin_unlock_bh(&sc->sc_pcu_lock);
  798. ath9k_ps_restore(sc);
  799. }
  800. int ath_reset(struct ath_softc *sc, bool retry_tx)
  801. {
  802. struct ath_hw *ah = sc->sc_ah;
  803. struct ath_common *common = ath9k_hw_common(ah);
  804. struct ieee80211_hw *hw = sc->hw;
  805. int r;
  806. sc->hw_busy_count = 0;
  807. /* Stop ANI */
  808. del_timer_sync(&common->ani.timer);
  809. ath9k_ps_wakeup(sc);
  810. ieee80211_stop_queues(hw);
  811. ath9k_hw_disable_interrupts(ah);
  812. ath_drain_all_txq(sc, retry_tx);
  813. ath_stoprecv(sc);
  814. ath_flushrecv(sc);
  815. r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
  816. if (r)
  817. ath_err(common,
  818. "Unable to reset hardware; reset status %d\n", r);
  819. if (ath_startrecv(sc) != 0)
  820. ath_err(common, "Unable to start recv logic\n");
  821. /*
  822. * We may be doing a reset in response to a request
  823. * that changes the channel so update any state that
  824. * might change as a result.
  825. */
  826. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  827. sc->config.txpowlimit, &sc->curtxpow);
  828. if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
  829. ath_set_beacon(sc); /* restart beacons */
  830. ath9k_hw_set_interrupts(ah, ah->imask);
  831. ath9k_hw_enable_interrupts(ah);
  832. if (retry_tx) {
  833. int i;
  834. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  835. if (ATH_TXQ_SETUP(sc, i)) {
  836. spin_lock_bh(&sc->tx.txq[i].axq_lock);
  837. ath_txq_schedule(sc, &sc->tx.txq[i]);
  838. spin_unlock_bh(&sc->tx.txq[i].axq_lock);
  839. }
  840. }
  841. }
  842. ieee80211_wake_queues(hw);
  843. /* Start ANI */
  844. if (!common->disable_ani)
  845. ath_start_ani(common);
  846. ath9k_ps_restore(sc);
  847. return r;
  848. }
  849. /**********************/
  850. /* mac80211 callbacks */
  851. /**********************/
  852. static int ath9k_start(struct ieee80211_hw *hw)
  853. {
  854. struct ath_softc *sc = hw->priv;
  855. struct ath_hw *ah = sc->sc_ah;
  856. struct ath_common *common = ath9k_hw_common(ah);
  857. struct ieee80211_channel *curchan = hw->conf.channel;
  858. struct ath9k_channel *init_channel;
  859. int r;
  860. ath_dbg(common, ATH_DBG_CONFIG,
  861. "Starting driver with initial channel: %d MHz\n",
  862. curchan->center_freq);
  863. ath9k_ps_wakeup(sc);
  864. mutex_lock(&sc->mutex);
  865. /* setup initial channel */
  866. sc->chan_idx = curchan->hw_value;
  867. init_channel = ath9k_cmn_get_curchannel(hw, ah);
  868. /* Reset SERDES registers */
  869. ath9k_hw_configpcipowersave(ah, false);
  870. /*
  871. * The basic interface to setting the hardware in a good
  872. * state is ``reset''. On return the hardware is known to
  873. * be powered up and with interrupts disabled. This must
  874. * be followed by initialization of the appropriate bits
  875. * and then setup of the interrupt mask.
  876. */
  877. spin_lock_bh(&sc->sc_pcu_lock);
  878. r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
  879. if (r) {
  880. ath_err(common,
  881. "Unable to reset hardware; reset status %d (freq %u MHz)\n",
  882. r, curchan->center_freq);
  883. spin_unlock_bh(&sc->sc_pcu_lock);
  884. goto mutex_unlock;
  885. }
  886. /*
  887. * This is needed only to setup initial state
  888. * but it's best done after a reset.
  889. */
  890. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  891. sc->config.txpowlimit, &sc->curtxpow);
  892. /*
  893. * Setup the hardware after reset:
  894. * The receive engine is set going.
  895. * Frame transmit is handled entirely
  896. * in the frame output path; there's nothing to do
  897. * here except setup the interrupt mask.
  898. */
  899. if (ath_startrecv(sc) != 0) {
  900. ath_err(common, "Unable to start recv logic\n");
  901. r = -EIO;
  902. spin_unlock_bh(&sc->sc_pcu_lock);
  903. goto mutex_unlock;
  904. }
  905. spin_unlock_bh(&sc->sc_pcu_lock);
  906. /* Setup our intr mask. */
  907. ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
  908. ATH9K_INT_RXORN | ATH9K_INT_FATAL |
  909. ATH9K_INT_GLOBAL;
  910. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  911. ah->imask |= ATH9K_INT_RXHP |
  912. ATH9K_INT_RXLP |
  913. ATH9K_INT_BB_WATCHDOG;
  914. else
  915. ah->imask |= ATH9K_INT_RX;
  916. ah->imask |= ATH9K_INT_GTT;
  917. if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  918. ah->imask |= ATH9K_INT_CST;
  919. sc->sc_flags &= ~SC_OP_INVALID;
  920. sc->sc_ah->is_monitoring = false;
  921. /* Disable BMISS interrupt when we're not associated */
  922. ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
  923. ath9k_hw_set_interrupts(ah, ah->imask);
  924. ath9k_hw_enable_interrupts(ah);
  925. ieee80211_wake_queues(hw);
  926. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  927. if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
  928. !ah->btcoex_hw.enabled) {
  929. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  930. AR_STOMP_LOW_WLAN_WGHT);
  931. ath9k_hw_btcoex_enable(ah);
  932. if (common->bus_ops->bt_coex_prep)
  933. common->bus_ops->bt_coex_prep(common);
  934. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  935. ath9k_btcoex_timer_resume(sc);
  936. }
  937. if (ah->caps.pcie_lcr_extsync_en && common->bus_ops->extn_synch_en)
  938. common->bus_ops->extn_synch_en(common);
  939. mutex_unlock:
  940. mutex_unlock(&sc->mutex);
  941. ath9k_ps_restore(sc);
  942. return r;
  943. }
  944. static void ath9k_tx(struct ieee80211_hw *hw, struct sk_buff *skb)
  945. {
  946. struct ath_softc *sc = hw->priv;
  947. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  948. struct ath_tx_control txctl;
  949. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  950. if (sc->ps_enabled) {
  951. /*
  952. * mac80211 does not set PM field for normal data frames, so we
  953. * need to update that based on the current PS mode.
  954. */
  955. if (ieee80211_is_data(hdr->frame_control) &&
  956. !ieee80211_is_nullfunc(hdr->frame_control) &&
  957. !ieee80211_has_pm(hdr->frame_control)) {
  958. ath_dbg(common, ATH_DBG_PS,
  959. "Add PM=1 for a TX frame while in PS mode\n");
  960. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
  961. }
  962. }
  963. if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
  964. /*
  965. * We are using PS-Poll and mac80211 can request TX while in
  966. * power save mode. Need to wake up hardware for the TX to be
  967. * completed and if needed, also for RX of buffered frames.
  968. */
  969. ath9k_ps_wakeup(sc);
  970. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  971. ath9k_hw_setrxabort(sc->sc_ah, 0);
  972. if (ieee80211_is_pspoll(hdr->frame_control)) {
  973. ath_dbg(common, ATH_DBG_PS,
  974. "Sending PS-Poll to pick a buffered frame\n");
  975. sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
  976. } else {
  977. ath_dbg(common, ATH_DBG_PS,
  978. "Wake up to complete TX\n");
  979. sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
  980. }
  981. /*
  982. * The actual restore operation will happen only after
  983. * the sc_flags bit is cleared. We are just dropping
  984. * the ps_usecount here.
  985. */
  986. ath9k_ps_restore(sc);
  987. }
  988. memset(&txctl, 0, sizeof(struct ath_tx_control));
  989. txctl.txq = sc->tx.txq_map[skb_get_queue_mapping(skb)];
  990. ath_dbg(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
  991. if (ath_tx_start(hw, skb, &txctl) != 0) {
  992. ath_dbg(common, ATH_DBG_XMIT, "TX failed\n");
  993. goto exit;
  994. }
  995. return;
  996. exit:
  997. dev_kfree_skb_any(skb);
  998. }
  999. static void ath9k_stop(struct ieee80211_hw *hw)
  1000. {
  1001. struct ath_softc *sc = hw->priv;
  1002. struct ath_hw *ah = sc->sc_ah;
  1003. struct ath_common *common = ath9k_hw_common(ah);
  1004. mutex_lock(&sc->mutex);
  1005. cancel_delayed_work_sync(&sc->tx_complete_work);
  1006. cancel_delayed_work_sync(&sc->hw_pll_work);
  1007. cancel_work_sync(&sc->paprd_work);
  1008. cancel_work_sync(&sc->hw_check_work);
  1009. if (sc->sc_flags & SC_OP_INVALID) {
  1010. ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
  1011. mutex_unlock(&sc->mutex);
  1012. return;
  1013. }
  1014. /* Ensure HW is awake when we try to shut it down. */
  1015. ath9k_ps_wakeup(sc);
  1016. if (ah->btcoex_hw.enabled) {
  1017. ath9k_hw_btcoex_disable(ah);
  1018. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  1019. ath9k_btcoex_timer_pause(sc);
  1020. }
  1021. spin_lock_bh(&sc->sc_pcu_lock);
  1022. /* prevent tasklets to enable interrupts once we disable them */
  1023. ah->imask &= ~ATH9K_INT_GLOBAL;
  1024. /* make sure h/w will not generate any interrupt
  1025. * before setting the invalid flag. */
  1026. ath9k_hw_disable_interrupts(ah);
  1027. if (!(sc->sc_flags & SC_OP_INVALID)) {
  1028. ath_drain_all_txq(sc, false);
  1029. ath_stoprecv(sc);
  1030. ath9k_hw_phy_disable(ah);
  1031. } else
  1032. sc->rx.rxlink = NULL;
  1033. if (sc->rx.frag) {
  1034. dev_kfree_skb_any(sc->rx.frag);
  1035. sc->rx.frag = NULL;
  1036. }
  1037. /* disable HAL and put h/w to sleep */
  1038. ath9k_hw_disable(ah);
  1039. spin_unlock_bh(&sc->sc_pcu_lock);
  1040. /* we can now sync irq and kill any running tasklets, since we already
  1041. * disabled interrupts and not holding a spin lock */
  1042. synchronize_irq(sc->irq);
  1043. tasklet_kill(&sc->intr_tq);
  1044. tasklet_kill(&sc->bcon_tasklet);
  1045. ath9k_ps_restore(sc);
  1046. sc->ps_idle = true;
  1047. ath_radio_disable(sc, hw);
  1048. sc->sc_flags |= SC_OP_INVALID;
  1049. mutex_unlock(&sc->mutex);
  1050. ath_dbg(common, ATH_DBG_CONFIG, "Driver halt\n");
  1051. }
  1052. bool ath9k_uses_beacons(int type)
  1053. {
  1054. switch (type) {
  1055. case NL80211_IFTYPE_AP:
  1056. case NL80211_IFTYPE_ADHOC:
  1057. case NL80211_IFTYPE_MESH_POINT:
  1058. return true;
  1059. default:
  1060. return false;
  1061. }
  1062. }
  1063. static void ath9k_reclaim_beacon(struct ath_softc *sc,
  1064. struct ieee80211_vif *vif)
  1065. {
  1066. struct ath_vif *avp = (void *)vif->drv_priv;
  1067. ath9k_set_beaconing_status(sc, false);
  1068. ath_beacon_return(sc, avp);
  1069. ath9k_set_beaconing_status(sc, true);
  1070. sc->sc_flags &= ~SC_OP_BEACONS;
  1071. }
  1072. static void ath9k_vif_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1073. {
  1074. struct ath9k_vif_iter_data *iter_data = data;
  1075. int i;
  1076. if (iter_data->hw_macaddr)
  1077. for (i = 0; i < ETH_ALEN; i++)
  1078. iter_data->mask[i] &=
  1079. ~(iter_data->hw_macaddr[i] ^ mac[i]);
  1080. switch (vif->type) {
  1081. case NL80211_IFTYPE_AP:
  1082. iter_data->naps++;
  1083. break;
  1084. case NL80211_IFTYPE_STATION:
  1085. iter_data->nstations++;
  1086. break;
  1087. case NL80211_IFTYPE_ADHOC:
  1088. iter_data->nadhocs++;
  1089. break;
  1090. case NL80211_IFTYPE_MESH_POINT:
  1091. iter_data->nmeshes++;
  1092. break;
  1093. case NL80211_IFTYPE_WDS:
  1094. iter_data->nwds++;
  1095. break;
  1096. default:
  1097. iter_data->nothers++;
  1098. break;
  1099. }
  1100. }
  1101. /* Called with sc->mutex held. */
  1102. void ath9k_calculate_iter_data(struct ieee80211_hw *hw,
  1103. struct ieee80211_vif *vif,
  1104. struct ath9k_vif_iter_data *iter_data)
  1105. {
  1106. struct ath_softc *sc = hw->priv;
  1107. struct ath_hw *ah = sc->sc_ah;
  1108. struct ath_common *common = ath9k_hw_common(ah);
  1109. /*
  1110. * Use the hardware MAC address as reference, the hardware uses it
  1111. * together with the BSSID mask when matching addresses.
  1112. */
  1113. memset(iter_data, 0, sizeof(*iter_data));
  1114. iter_data->hw_macaddr = common->macaddr;
  1115. memset(&iter_data->mask, 0xff, ETH_ALEN);
  1116. if (vif)
  1117. ath9k_vif_iter(iter_data, vif->addr, vif);
  1118. /* Get list of all active MAC addresses */
  1119. ieee80211_iterate_active_interfaces_atomic(sc->hw, ath9k_vif_iter,
  1120. iter_data);
  1121. }
  1122. /* Called with sc->mutex held. */
  1123. static void ath9k_calculate_summary_state(struct ieee80211_hw *hw,
  1124. struct ieee80211_vif *vif)
  1125. {
  1126. struct ath_softc *sc = hw->priv;
  1127. struct ath_hw *ah = sc->sc_ah;
  1128. struct ath_common *common = ath9k_hw_common(ah);
  1129. struct ath9k_vif_iter_data iter_data;
  1130. ath9k_calculate_iter_data(hw, vif, &iter_data);
  1131. /* Set BSSID mask. */
  1132. memcpy(common->bssidmask, iter_data.mask, ETH_ALEN);
  1133. ath_hw_setbssidmask(common);
  1134. /* Set op-mode & TSF */
  1135. if (iter_data.naps > 0) {
  1136. ath9k_hw_set_tsfadjust(ah, 1);
  1137. sc->sc_flags |= SC_OP_TSF_RESET;
  1138. ah->opmode = NL80211_IFTYPE_AP;
  1139. } else {
  1140. ath9k_hw_set_tsfadjust(ah, 0);
  1141. sc->sc_flags &= ~SC_OP_TSF_RESET;
  1142. if (iter_data.nmeshes)
  1143. ah->opmode = NL80211_IFTYPE_MESH_POINT;
  1144. else if (iter_data.nwds)
  1145. ah->opmode = NL80211_IFTYPE_AP;
  1146. else if (iter_data.nadhocs)
  1147. ah->opmode = NL80211_IFTYPE_ADHOC;
  1148. else
  1149. ah->opmode = NL80211_IFTYPE_STATION;
  1150. }
  1151. /*
  1152. * Enable MIB interrupts when there are hardware phy counters.
  1153. */
  1154. if ((iter_data.nstations + iter_data.nadhocs + iter_data.nmeshes) > 0) {
  1155. if (ah->config.enable_ani)
  1156. ah->imask |= ATH9K_INT_MIB;
  1157. ah->imask |= ATH9K_INT_TSFOOR;
  1158. } else {
  1159. ah->imask &= ~ATH9K_INT_MIB;
  1160. ah->imask &= ~ATH9K_INT_TSFOOR;
  1161. }
  1162. ath9k_hw_set_interrupts(ah, ah->imask);
  1163. /* Set up ANI */
  1164. if (iter_data.naps > 0) {
  1165. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1166. if (!common->disable_ani) {
  1167. sc->sc_flags |= SC_OP_ANI_RUN;
  1168. ath_start_ani(common);
  1169. }
  1170. } else {
  1171. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1172. del_timer_sync(&common->ani.timer);
  1173. }
  1174. }
  1175. /* Called with sc->mutex held, vif counts set up properly. */
  1176. static void ath9k_do_vif_add_setup(struct ieee80211_hw *hw,
  1177. struct ieee80211_vif *vif)
  1178. {
  1179. struct ath_softc *sc = hw->priv;
  1180. ath9k_calculate_summary_state(hw, vif);
  1181. if (ath9k_uses_beacons(vif->type)) {
  1182. int error;
  1183. /* This may fail because upper levels do not have beacons
  1184. * properly configured yet. That's OK, we assume it
  1185. * will be properly configured and then we will be notified
  1186. * in the info_changed method and set up beacons properly
  1187. * there.
  1188. */
  1189. ath9k_set_beaconing_status(sc, false);
  1190. error = ath_beacon_alloc(sc, vif);
  1191. if (!error)
  1192. ath_beacon_config(sc, vif);
  1193. ath9k_set_beaconing_status(sc, true);
  1194. }
  1195. }
  1196. static int ath9k_add_interface(struct ieee80211_hw *hw,
  1197. struct ieee80211_vif *vif)
  1198. {
  1199. struct ath_softc *sc = hw->priv;
  1200. struct ath_hw *ah = sc->sc_ah;
  1201. struct ath_common *common = ath9k_hw_common(ah);
  1202. int ret = 0;
  1203. ath9k_ps_wakeup(sc);
  1204. mutex_lock(&sc->mutex);
  1205. switch (vif->type) {
  1206. case NL80211_IFTYPE_STATION:
  1207. case NL80211_IFTYPE_WDS:
  1208. case NL80211_IFTYPE_ADHOC:
  1209. case NL80211_IFTYPE_AP:
  1210. case NL80211_IFTYPE_MESH_POINT:
  1211. break;
  1212. default:
  1213. ath_err(common, "Interface type %d not yet supported\n",
  1214. vif->type);
  1215. ret = -EOPNOTSUPP;
  1216. goto out;
  1217. }
  1218. if (ath9k_uses_beacons(vif->type)) {
  1219. if (sc->nbcnvifs >= ATH_BCBUF) {
  1220. ath_err(common, "Not enough beacon buffers when adding"
  1221. " new interface of type: %i\n",
  1222. vif->type);
  1223. ret = -ENOBUFS;
  1224. goto out;
  1225. }
  1226. }
  1227. if ((ah->opmode == NL80211_IFTYPE_ADHOC) ||
  1228. ((vif->type == NL80211_IFTYPE_ADHOC) &&
  1229. sc->nvifs > 0)) {
  1230. ath_err(common, "Cannot create ADHOC interface when other"
  1231. " interfaces already exist.\n");
  1232. ret = -EINVAL;
  1233. goto out;
  1234. }
  1235. ath_dbg(common, ATH_DBG_CONFIG,
  1236. "Attach a VIF of type: %d\n", vif->type);
  1237. sc->nvifs++;
  1238. ath9k_do_vif_add_setup(hw, vif);
  1239. out:
  1240. mutex_unlock(&sc->mutex);
  1241. ath9k_ps_restore(sc);
  1242. return ret;
  1243. }
  1244. static int ath9k_change_interface(struct ieee80211_hw *hw,
  1245. struct ieee80211_vif *vif,
  1246. enum nl80211_iftype new_type,
  1247. bool p2p)
  1248. {
  1249. struct ath_softc *sc = hw->priv;
  1250. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1251. int ret = 0;
  1252. ath_dbg(common, ATH_DBG_CONFIG, "Change Interface\n");
  1253. mutex_lock(&sc->mutex);
  1254. ath9k_ps_wakeup(sc);
  1255. /* See if new interface type is valid. */
  1256. if ((new_type == NL80211_IFTYPE_ADHOC) &&
  1257. (sc->nvifs > 1)) {
  1258. ath_err(common, "When using ADHOC, it must be the only"
  1259. " interface.\n");
  1260. ret = -EINVAL;
  1261. goto out;
  1262. }
  1263. if (ath9k_uses_beacons(new_type) &&
  1264. !ath9k_uses_beacons(vif->type)) {
  1265. if (sc->nbcnvifs >= ATH_BCBUF) {
  1266. ath_err(common, "No beacon slot available\n");
  1267. ret = -ENOBUFS;
  1268. goto out;
  1269. }
  1270. }
  1271. /* Clean up old vif stuff */
  1272. if (ath9k_uses_beacons(vif->type))
  1273. ath9k_reclaim_beacon(sc, vif);
  1274. /* Add new settings */
  1275. vif->type = new_type;
  1276. vif->p2p = p2p;
  1277. ath9k_do_vif_add_setup(hw, vif);
  1278. out:
  1279. ath9k_ps_restore(sc);
  1280. mutex_unlock(&sc->mutex);
  1281. return ret;
  1282. }
  1283. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  1284. struct ieee80211_vif *vif)
  1285. {
  1286. struct ath_softc *sc = hw->priv;
  1287. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1288. ath_dbg(common, ATH_DBG_CONFIG, "Detach Interface\n");
  1289. ath9k_ps_wakeup(sc);
  1290. mutex_lock(&sc->mutex);
  1291. sc->nvifs--;
  1292. /* Reclaim beacon resources */
  1293. if (ath9k_uses_beacons(vif->type))
  1294. ath9k_reclaim_beacon(sc, vif);
  1295. ath9k_calculate_summary_state(hw, NULL);
  1296. mutex_unlock(&sc->mutex);
  1297. ath9k_ps_restore(sc);
  1298. }
  1299. static void ath9k_enable_ps(struct ath_softc *sc)
  1300. {
  1301. struct ath_hw *ah = sc->sc_ah;
  1302. sc->ps_enabled = true;
  1303. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1304. if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
  1305. ah->imask |= ATH9K_INT_TIM_TIMER;
  1306. ath9k_hw_set_interrupts(ah, ah->imask);
  1307. }
  1308. ath9k_hw_setrxabort(ah, 1);
  1309. }
  1310. }
  1311. static void ath9k_disable_ps(struct ath_softc *sc)
  1312. {
  1313. struct ath_hw *ah = sc->sc_ah;
  1314. sc->ps_enabled = false;
  1315. ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
  1316. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1317. ath9k_hw_setrxabort(ah, 0);
  1318. sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
  1319. PS_WAIT_FOR_CAB |
  1320. PS_WAIT_FOR_PSPOLL_DATA |
  1321. PS_WAIT_FOR_TX_ACK);
  1322. if (ah->imask & ATH9K_INT_TIM_TIMER) {
  1323. ah->imask &= ~ATH9K_INT_TIM_TIMER;
  1324. ath9k_hw_set_interrupts(ah, ah->imask);
  1325. }
  1326. }
  1327. }
  1328. static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
  1329. {
  1330. struct ath_softc *sc = hw->priv;
  1331. struct ath_hw *ah = sc->sc_ah;
  1332. struct ath_common *common = ath9k_hw_common(ah);
  1333. struct ieee80211_conf *conf = &hw->conf;
  1334. bool disable_radio = false;
  1335. mutex_lock(&sc->mutex);
  1336. /*
  1337. * Leave this as the first check because we need to turn on the
  1338. * radio if it was disabled before prior to processing the rest
  1339. * of the changes. Likewise we must only disable the radio towards
  1340. * the end.
  1341. */
  1342. if (changed & IEEE80211_CONF_CHANGE_IDLE) {
  1343. sc->ps_idle = !!(conf->flags & IEEE80211_CONF_IDLE);
  1344. if (!sc->ps_idle) {
  1345. ath_radio_enable(sc, hw);
  1346. ath_dbg(common, ATH_DBG_CONFIG,
  1347. "not-idle: enabling radio\n");
  1348. } else {
  1349. disable_radio = true;
  1350. }
  1351. }
  1352. /*
  1353. * We just prepare to enable PS. We have to wait until our AP has
  1354. * ACK'd our null data frame to disable RX otherwise we'll ignore
  1355. * those ACKs and end up retransmitting the same null data frames.
  1356. * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
  1357. */
  1358. if (changed & IEEE80211_CONF_CHANGE_PS) {
  1359. unsigned long flags;
  1360. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  1361. if (conf->flags & IEEE80211_CONF_PS)
  1362. ath9k_enable_ps(sc);
  1363. else
  1364. ath9k_disable_ps(sc);
  1365. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  1366. }
  1367. if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
  1368. if (conf->flags & IEEE80211_CONF_MONITOR) {
  1369. ath_dbg(common, ATH_DBG_CONFIG,
  1370. "Monitor mode is enabled\n");
  1371. sc->sc_ah->is_monitoring = true;
  1372. } else {
  1373. ath_dbg(common, ATH_DBG_CONFIG,
  1374. "Monitor mode is disabled\n");
  1375. sc->sc_ah->is_monitoring = false;
  1376. }
  1377. }
  1378. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  1379. struct ieee80211_channel *curchan = hw->conf.channel;
  1380. int pos = curchan->hw_value;
  1381. int old_pos = -1;
  1382. unsigned long flags;
  1383. if (ah->curchan)
  1384. old_pos = ah->curchan - &ah->channels[0];
  1385. if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
  1386. sc->sc_flags |= SC_OP_OFFCHANNEL;
  1387. else
  1388. sc->sc_flags &= ~SC_OP_OFFCHANNEL;
  1389. ath_dbg(common, ATH_DBG_CONFIG,
  1390. "Set channel: %d MHz type: %d\n",
  1391. curchan->center_freq, conf->channel_type);
  1392. ath9k_cmn_update_ichannel(&sc->sc_ah->channels[pos],
  1393. curchan, conf->channel_type);
  1394. /* update survey stats for the old channel before switching */
  1395. spin_lock_irqsave(&common->cc_lock, flags);
  1396. ath_update_survey_stats(sc);
  1397. spin_unlock_irqrestore(&common->cc_lock, flags);
  1398. /*
  1399. * If the operating channel changes, change the survey in-use flags
  1400. * along with it.
  1401. * Reset the survey data for the new channel, unless we're switching
  1402. * back to the operating channel from an off-channel operation.
  1403. */
  1404. if (!(hw->conf.flags & IEEE80211_CONF_OFFCHANNEL) &&
  1405. sc->cur_survey != &sc->survey[pos]) {
  1406. if (sc->cur_survey)
  1407. sc->cur_survey->filled &= ~SURVEY_INFO_IN_USE;
  1408. sc->cur_survey = &sc->survey[pos];
  1409. memset(sc->cur_survey, 0, sizeof(struct survey_info));
  1410. sc->cur_survey->filled |= SURVEY_INFO_IN_USE;
  1411. } else if (!(sc->survey[pos].filled & SURVEY_INFO_IN_USE)) {
  1412. memset(&sc->survey[pos], 0, sizeof(struct survey_info));
  1413. }
  1414. if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
  1415. ath_err(common, "Unable to set channel\n");
  1416. mutex_unlock(&sc->mutex);
  1417. return -EINVAL;
  1418. }
  1419. /*
  1420. * The most recent snapshot of channel->noisefloor for the old
  1421. * channel is only available after the hardware reset. Copy it to
  1422. * the survey stats now.
  1423. */
  1424. if (old_pos >= 0)
  1425. ath_update_survey_nf(sc, old_pos);
  1426. }
  1427. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1428. ath_dbg(common, ATH_DBG_CONFIG,
  1429. "Set power: %d\n", conf->power_level);
  1430. sc->config.txpowlimit = 2 * conf->power_level;
  1431. ath9k_ps_wakeup(sc);
  1432. ath9k_cmn_update_txpow(ah, sc->curtxpow,
  1433. sc->config.txpowlimit, &sc->curtxpow);
  1434. ath9k_ps_restore(sc);
  1435. }
  1436. if (disable_radio) {
  1437. ath_dbg(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
  1438. ath_radio_disable(sc, hw);
  1439. }
  1440. mutex_unlock(&sc->mutex);
  1441. return 0;
  1442. }
  1443. #define SUPPORTED_FILTERS \
  1444. (FIF_PROMISC_IN_BSS | \
  1445. FIF_ALLMULTI | \
  1446. FIF_CONTROL | \
  1447. FIF_PSPOLL | \
  1448. FIF_OTHER_BSS | \
  1449. FIF_BCN_PRBRESP_PROMISC | \
  1450. FIF_PROBE_REQ | \
  1451. FIF_FCSFAIL)
  1452. /* FIXME: sc->sc_full_reset ? */
  1453. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  1454. unsigned int changed_flags,
  1455. unsigned int *total_flags,
  1456. u64 multicast)
  1457. {
  1458. struct ath_softc *sc = hw->priv;
  1459. u32 rfilt;
  1460. changed_flags &= SUPPORTED_FILTERS;
  1461. *total_flags &= SUPPORTED_FILTERS;
  1462. sc->rx.rxfilter = *total_flags;
  1463. ath9k_ps_wakeup(sc);
  1464. rfilt = ath_calcrxfilter(sc);
  1465. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  1466. ath9k_ps_restore(sc);
  1467. ath_dbg(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
  1468. "Set HW RX filter: 0x%x\n", rfilt);
  1469. }
  1470. static int ath9k_sta_add(struct ieee80211_hw *hw,
  1471. struct ieee80211_vif *vif,
  1472. struct ieee80211_sta *sta)
  1473. {
  1474. struct ath_softc *sc = hw->priv;
  1475. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1476. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1477. struct ieee80211_key_conf ps_key = { };
  1478. ath_node_attach(sc, sta);
  1479. if (vif->type != NL80211_IFTYPE_AP &&
  1480. vif->type != NL80211_IFTYPE_AP_VLAN)
  1481. return 0;
  1482. an->ps_key = ath_key_config(common, vif, sta, &ps_key);
  1483. return 0;
  1484. }
  1485. static void ath9k_del_ps_key(struct ath_softc *sc,
  1486. struct ieee80211_vif *vif,
  1487. struct ieee80211_sta *sta)
  1488. {
  1489. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1490. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1491. struct ieee80211_key_conf ps_key = { .hw_key_idx = an->ps_key };
  1492. if (!an->ps_key)
  1493. return;
  1494. ath_key_delete(common, &ps_key);
  1495. }
  1496. static int ath9k_sta_remove(struct ieee80211_hw *hw,
  1497. struct ieee80211_vif *vif,
  1498. struct ieee80211_sta *sta)
  1499. {
  1500. struct ath_softc *sc = hw->priv;
  1501. ath9k_del_ps_key(sc, vif, sta);
  1502. ath_node_detach(sc, sta);
  1503. return 0;
  1504. }
  1505. static void ath9k_sta_notify(struct ieee80211_hw *hw,
  1506. struct ieee80211_vif *vif,
  1507. enum sta_notify_cmd cmd,
  1508. struct ieee80211_sta *sta)
  1509. {
  1510. struct ath_softc *sc = hw->priv;
  1511. struct ath_node *an = (struct ath_node *) sta->drv_priv;
  1512. switch (cmd) {
  1513. case STA_NOTIFY_SLEEP:
  1514. an->sleeping = true;
  1515. if (ath_tx_aggr_sleep(sc, an))
  1516. ieee80211_sta_set_tim(sta);
  1517. break;
  1518. case STA_NOTIFY_AWAKE:
  1519. an->sleeping = false;
  1520. ath_tx_aggr_wakeup(sc, an);
  1521. break;
  1522. }
  1523. }
  1524. static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1525. const struct ieee80211_tx_queue_params *params)
  1526. {
  1527. struct ath_softc *sc = hw->priv;
  1528. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1529. struct ath_txq *txq;
  1530. struct ath9k_tx_queue_info qi;
  1531. int ret = 0;
  1532. if (queue >= WME_NUM_AC)
  1533. return 0;
  1534. txq = sc->tx.txq_map[queue];
  1535. ath9k_ps_wakeup(sc);
  1536. mutex_lock(&sc->mutex);
  1537. memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
  1538. qi.tqi_aifs = params->aifs;
  1539. qi.tqi_cwmin = params->cw_min;
  1540. qi.tqi_cwmax = params->cw_max;
  1541. qi.tqi_burstTime = params->txop;
  1542. ath_dbg(common, ATH_DBG_CONFIG,
  1543. "Configure tx [queue/halq] [%d/%d], aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1544. queue, txq->axq_qnum, params->aifs, params->cw_min,
  1545. params->cw_max, params->txop);
  1546. ret = ath_txq_update(sc, txq->axq_qnum, &qi);
  1547. if (ret)
  1548. ath_err(common, "TXQ Update failed\n");
  1549. if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
  1550. if (queue == WME_AC_BE && !ret)
  1551. ath_beaconq_config(sc);
  1552. mutex_unlock(&sc->mutex);
  1553. ath9k_ps_restore(sc);
  1554. return ret;
  1555. }
  1556. static int ath9k_set_key(struct ieee80211_hw *hw,
  1557. enum set_key_cmd cmd,
  1558. struct ieee80211_vif *vif,
  1559. struct ieee80211_sta *sta,
  1560. struct ieee80211_key_conf *key)
  1561. {
  1562. struct ath_softc *sc = hw->priv;
  1563. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1564. int ret = 0;
  1565. if (ath9k_modparam_nohwcrypt)
  1566. return -ENOSPC;
  1567. if (vif->type == NL80211_IFTYPE_ADHOC &&
  1568. (key->cipher == WLAN_CIPHER_SUITE_TKIP ||
  1569. key->cipher == WLAN_CIPHER_SUITE_CCMP) &&
  1570. !(key->flags & IEEE80211_KEY_FLAG_PAIRWISE)) {
  1571. /*
  1572. * For now, disable hw crypto for the RSN IBSS group keys. This
  1573. * could be optimized in the future to use a modified key cache
  1574. * design to support per-STA RX GTK, but until that gets
  1575. * implemented, use of software crypto for group addressed
  1576. * frames is a acceptable to allow RSN IBSS to be used.
  1577. */
  1578. return -EOPNOTSUPP;
  1579. }
  1580. mutex_lock(&sc->mutex);
  1581. ath9k_ps_wakeup(sc);
  1582. ath_dbg(common, ATH_DBG_CONFIG, "Set HW Key\n");
  1583. switch (cmd) {
  1584. case SET_KEY:
  1585. if (sta)
  1586. ath9k_del_ps_key(sc, vif, sta);
  1587. ret = ath_key_config(common, vif, sta, key);
  1588. if (ret >= 0) {
  1589. key->hw_key_idx = ret;
  1590. /* push IV and Michael MIC generation to stack */
  1591. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1592. if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
  1593. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1594. if (sc->sc_ah->sw_mgmt_crypto &&
  1595. key->cipher == WLAN_CIPHER_SUITE_CCMP)
  1596. key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
  1597. ret = 0;
  1598. }
  1599. break;
  1600. case DISABLE_KEY:
  1601. ath_key_delete(common, key);
  1602. break;
  1603. default:
  1604. ret = -EINVAL;
  1605. }
  1606. ath9k_ps_restore(sc);
  1607. mutex_unlock(&sc->mutex);
  1608. return ret;
  1609. }
  1610. static void ath9k_bss_iter(void *data, u8 *mac, struct ieee80211_vif *vif)
  1611. {
  1612. struct ath_softc *sc = data;
  1613. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1614. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1615. struct ath_vif *avp = (void *)vif->drv_priv;
  1616. /*
  1617. * Skip iteration if primary station vif's bss info
  1618. * was not changed
  1619. */
  1620. if (sc->sc_flags & SC_OP_PRIM_STA_VIF)
  1621. return;
  1622. if (bss_conf->assoc) {
  1623. sc->sc_flags |= SC_OP_PRIM_STA_VIF;
  1624. avp->primary_sta_vif = true;
  1625. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1626. common->curaid = bss_conf->aid;
  1627. ath9k_hw_write_associd(sc->sc_ah);
  1628. ath_dbg(common, ATH_DBG_CONFIG,
  1629. "Bss Info ASSOC %d, bssid: %pM\n",
  1630. bss_conf->aid, common->curbssid);
  1631. ath_beacon_config(sc, vif);
  1632. /*
  1633. * Request a re-configuration of Beacon related timers
  1634. * on the receipt of the first Beacon frame (i.e.,
  1635. * after time sync with the AP).
  1636. */
  1637. sc->ps_flags |= PS_BEACON_SYNC | PS_WAIT_FOR_BEACON;
  1638. /* Reset rssi stats */
  1639. sc->last_rssi = ATH_RSSI_DUMMY_MARKER;
  1640. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1641. if (!common->disable_ani) {
  1642. sc->sc_flags |= SC_OP_ANI_RUN;
  1643. ath_start_ani(common);
  1644. }
  1645. }
  1646. }
  1647. static void ath9k_config_bss(struct ath_softc *sc, struct ieee80211_vif *vif)
  1648. {
  1649. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1650. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  1651. struct ath_vif *avp = (void *)vif->drv_priv;
  1652. if (sc->sc_ah->opmode != NL80211_IFTYPE_STATION)
  1653. return;
  1654. /* Reconfigure bss info */
  1655. if (avp->primary_sta_vif && !bss_conf->assoc) {
  1656. ath_dbg(common, ATH_DBG_CONFIG,
  1657. "Bss Info DISASSOC %d, bssid %pM\n",
  1658. common->curaid, common->curbssid);
  1659. sc->sc_flags &= ~(SC_OP_PRIM_STA_VIF | SC_OP_BEACONS);
  1660. avp->primary_sta_vif = false;
  1661. memset(common->curbssid, 0, ETH_ALEN);
  1662. common->curaid = 0;
  1663. }
  1664. ieee80211_iterate_active_interfaces_atomic(
  1665. sc->hw, ath9k_bss_iter, sc);
  1666. /*
  1667. * None of station vifs are associated.
  1668. * Clear bssid & aid
  1669. */
  1670. if (!(sc->sc_flags & SC_OP_PRIM_STA_VIF)) {
  1671. ath9k_hw_write_associd(sc->sc_ah);
  1672. /* Stop ANI */
  1673. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1674. del_timer_sync(&common->ani.timer);
  1675. }
  1676. }
  1677. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1678. struct ieee80211_vif *vif,
  1679. struct ieee80211_bss_conf *bss_conf,
  1680. u32 changed)
  1681. {
  1682. struct ath_softc *sc = hw->priv;
  1683. struct ath_hw *ah = sc->sc_ah;
  1684. struct ath_common *common = ath9k_hw_common(ah);
  1685. struct ath_vif *avp = (void *)vif->drv_priv;
  1686. int slottime;
  1687. int error;
  1688. ath9k_ps_wakeup(sc);
  1689. mutex_lock(&sc->mutex);
  1690. if (changed & BSS_CHANGED_BSSID) {
  1691. ath9k_config_bss(sc, vif);
  1692. ath_dbg(common, ATH_DBG_CONFIG, "BSSID: %pM aid: 0x%x\n",
  1693. common->curbssid, common->curaid);
  1694. }
  1695. if (changed & BSS_CHANGED_IBSS) {
  1696. /* There can be only one vif available */
  1697. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1698. common->curaid = bss_conf->aid;
  1699. ath9k_hw_write_associd(sc->sc_ah);
  1700. if (bss_conf->ibss_joined) {
  1701. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  1702. if (!common->disable_ani) {
  1703. sc->sc_flags |= SC_OP_ANI_RUN;
  1704. ath_start_ani(common);
  1705. }
  1706. } else {
  1707. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1708. del_timer_sync(&common->ani.timer);
  1709. }
  1710. }
  1711. /* Enable transmission of beacons (AP, IBSS, MESH) */
  1712. if ((changed & BSS_CHANGED_BEACON) ||
  1713. ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
  1714. ath9k_set_beaconing_status(sc, false);
  1715. error = ath_beacon_alloc(sc, vif);
  1716. if (!error)
  1717. ath_beacon_config(sc, vif);
  1718. ath9k_set_beaconing_status(sc, true);
  1719. }
  1720. if (changed & BSS_CHANGED_ERP_SLOT) {
  1721. if (bss_conf->use_short_slot)
  1722. slottime = 9;
  1723. else
  1724. slottime = 20;
  1725. if (vif->type == NL80211_IFTYPE_AP) {
  1726. /*
  1727. * Defer update, so that connected stations can adjust
  1728. * their settings at the same time.
  1729. * See beacon.c for more details
  1730. */
  1731. sc->beacon.slottime = slottime;
  1732. sc->beacon.updateslot = UPDATE;
  1733. } else {
  1734. ah->slottime = slottime;
  1735. ath9k_hw_init_global_settings(ah);
  1736. }
  1737. }
  1738. /* Disable transmission of beacons */
  1739. if ((changed & BSS_CHANGED_BEACON_ENABLED) &&
  1740. !bss_conf->enable_beacon) {
  1741. ath9k_set_beaconing_status(sc, false);
  1742. avp->is_bslot_active = false;
  1743. ath9k_set_beaconing_status(sc, true);
  1744. }
  1745. if (changed & BSS_CHANGED_BEACON_INT) {
  1746. /*
  1747. * In case of AP mode, the HW TSF has to be reset
  1748. * when the beacon interval changes.
  1749. */
  1750. if (vif->type == NL80211_IFTYPE_AP) {
  1751. sc->sc_flags |= SC_OP_TSF_RESET;
  1752. ath9k_set_beaconing_status(sc, false);
  1753. error = ath_beacon_alloc(sc, vif);
  1754. if (!error)
  1755. ath_beacon_config(sc, vif);
  1756. ath9k_set_beaconing_status(sc, true);
  1757. } else
  1758. ath_beacon_config(sc, vif);
  1759. }
  1760. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  1761. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
  1762. bss_conf->use_short_preamble);
  1763. if (bss_conf->use_short_preamble)
  1764. sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
  1765. else
  1766. sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
  1767. }
  1768. if (changed & BSS_CHANGED_ERP_CTS_PROT) {
  1769. ath_dbg(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
  1770. bss_conf->use_cts_prot);
  1771. if (bss_conf->use_cts_prot &&
  1772. hw->conf.channel->band != IEEE80211_BAND_5GHZ)
  1773. sc->sc_flags |= SC_OP_PROTECT_ENABLE;
  1774. else
  1775. sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
  1776. }
  1777. mutex_unlock(&sc->mutex);
  1778. ath9k_ps_restore(sc);
  1779. }
  1780. static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
  1781. {
  1782. struct ath_softc *sc = hw->priv;
  1783. u64 tsf;
  1784. mutex_lock(&sc->mutex);
  1785. ath9k_ps_wakeup(sc);
  1786. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  1787. ath9k_ps_restore(sc);
  1788. mutex_unlock(&sc->mutex);
  1789. return tsf;
  1790. }
  1791. static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
  1792. {
  1793. struct ath_softc *sc = hw->priv;
  1794. mutex_lock(&sc->mutex);
  1795. ath9k_ps_wakeup(sc);
  1796. ath9k_hw_settsf64(sc->sc_ah, tsf);
  1797. ath9k_ps_restore(sc);
  1798. mutex_unlock(&sc->mutex);
  1799. }
  1800. static void ath9k_reset_tsf(struct ieee80211_hw *hw)
  1801. {
  1802. struct ath_softc *sc = hw->priv;
  1803. mutex_lock(&sc->mutex);
  1804. ath9k_ps_wakeup(sc);
  1805. ath9k_hw_reset_tsf(sc->sc_ah);
  1806. ath9k_ps_restore(sc);
  1807. mutex_unlock(&sc->mutex);
  1808. }
  1809. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1810. struct ieee80211_vif *vif,
  1811. enum ieee80211_ampdu_mlme_action action,
  1812. struct ieee80211_sta *sta,
  1813. u16 tid, u16 *ssn, u8 buf_size)
  1814. {
  1815. struct ath_softc *sc = hw->priv;
  1816. int ret = 0;
  1817. local_bh_disable();
  1818. switch (action) {
  1819. case IEEE80211_AMPDU_RX_START:
  1820. if (!(sc->sc_flags & SC_OP_RXAGGR))
  1821. ret = -ENOTSUPP;
  1822. break;
  1823. case IEEE80211_AMPDU_RX_STOP:
  1824. break;
  1825. case IEEE80211_AMPDU_TX_START:
  1826. if (!(sc->sc_flags & SC_OP_TXAGGR))
  1827. return -EOPNOTSUPP;
  1828. ath9k_ps_wakeup(sc);
  1829. ret = ath_tx_aggr_start(sc, sta, tid, ssn);
  1830. if (!ret)
  1831. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1832. ath9k_ps_restore(sc);
  1833. break;
  1834. case IEEE80211_AMPDU_TX_STOP:
  1835. ath9k_ps_wakeup(sc);
  1836. ath_tx_aggr_stop(sc, sta, tid);
  1837. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1838. ath9k_ps_restore(sc);
  1839. break;
  1840. case IEEE80211_AMPDU_TX_OPERATIONAL:
  1841. ath9k_ps_wakeup(sc);
  1842. ath_tx_aggr_resume(sc, sta, tid);
  1843. ath9k_ps_restore(sc);
  1844. break;
  1845. default:
  1846. ath_err(ath9k_hw_common(sc->sc_ah), "Unknown AMPDU action\n");
  1847. }
  1848. local_bh_enable();
  1849. return ret;
  1850. }
  1851. static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
  1852. struct survey_info *survey)
  1853. {
  1854. struct ath_softc *sc = hw->priv;
  1855. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1856. struct ieee80211_supported_band *sband;
  1857. struct ieee80211_channel *chan;
  1858. unsigned long flags;
  1859. int pos;
  1860. spin_lock_irqsave(&common->cc_lock, flags);
  1861. if (idx == 0)
  1862. ath_update_survey_stats(sc);
  1863. sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
  1864. if (sband && idx >= sband->n_channels) {
  1865. idx -= sband->n_channels;
  1866. sband = NULL;
  1867. }
  1868. if (!sband)
  1869. sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
  1870. if (!sband || idx >= sband->n_channels) {
  1871. spin_unlock_irqrestore(&common->cc_lock, flags);
  1872. return -ENOENT;
  1873. }
  1874. chan = &sband->channels[idx];
  1875. pos = chan->hw_value;
  1876. memcpy(survey, &sc->survey[pos], sizeof(*survey));
  1877. survey->channel = chan;
  1878. spin_unlock_irqrestore(&common->cc_lock, flags);
  1879. return 0;
  1880. }
  1881. static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
  1882. {
  1883. struct ath_softc *sc = hw->priv;
  1884. struct ath_hw *ah = sc->sc_ah;
  1885. mutex_lock(&sc->mutex);
  1886. ah->coverage_class = coverage_class;
  1887. ath9k_hw_init_global_settings(ah);
  1888. mutex_unlock(&sc->mutex);
  1889. }
  1890. static void ath9k_flush(struct ieee80211_hw *hw, bool drop)
  1891. {
  1892. struct ath_softc *sc = hw->priv;
  1893. struct ath_hw *ah = sc->sc_ah;
  1894. struct ath_common *common = ath9k_hw_common(ah);
  1895. int timeout = 200; /* ms */
  1896. int i, j;
  1897. bool drain_txq;
  1898. mutex_lock(&sc->mutex);
  1899. cancel_delayed_work_sync(&sc->tx_complete_work);
  1900. if (sc->sc_flags & SC_OP_INVALID) {
  1901. ath_dbg(common, ATH_DBG_ANY, "Device not present\n");
  1902. mutex_unlock(&sc->mutex);
  1903. return;
  1904. }
  1905. if (drop)
  1906. timeout = 1;
  1907. for (j = 0; j < timeout; j++) {
  1908. bool npend = false;
  1909. if (j)
  1910. usleep_range(1000, 2000);
  1911. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1912. if (!ATH_TXQ_SETUP(sc, i))
  1913. continue;
  1914. npend = ath9k_has_pending_frames(sc, &sc->tx.txq[i]);
  1915. if (npend)
  1916. break;
  1917. }
  1918. if (!npend)
  1919. goto out;
  1920. }
  1921. ath9k_ps_wakeup(sc);
  1922. spin_lock_bh(&sc->sc_pcu_lock);
  1923. drain_txq = ath_drain_all_txq(sc, false);
  1924. if (!drain_txq)
  1925. ath_reset(sc, false);
  1926. spin_unlock_bh(&sc->sc_pcu_lock);
  1927. ath9k_ps_restore(sc);
  1928. ieee80211_wake_queues(hw);
  1929. out:
  1930. ieee80211_queue_delayed_work(hw, &sc->tx_complete_work, 0);
  1931. mutex_unlock(&sc->mutex);
  1932. }
  1933. static bool ath9k_tx_frames_pending(struct ieee80211_hw *hw)
  1934. {
  1935. struct ath_softc *sc = hw->priv;
  1936. int i;
  1937. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  1938. if (!ATH_TXQ_SETUP(sc, i))
  1939. continue;
  1940. if (ath9k_has_pending_frames(sc, &sc->tx.txq[i]))
  1941. return true;
  1942. }
  1943. return false;
  1944. }
  1945. static int ath9k_tx_last_beacon(struct ieee80211_hw *hw)
  1946. {
  1947. struct ath_softc *sc = hw->priv;
  1948. struct ath_hw *ah = sc->sc_ah;
  1949. struct ieee80211_vif *vif;
  1950. struct ath_vif *avp;
  1951. struct ath_buf *bf;
  1952. struct ath_tx_status ts;
  1953. int status;
  1954. vif = sc->beacon.bslot[0];
  1955. if (!vif)
  1956. return 0;
  1957. avp = (void *)vif->drv_priv;
  1958. if (!avp->is_bslot_active)
  1959. return 0;
  1960. if (!sc->beacon.tx_processed) {
  1961. tasklet_disable(&sc->bcon_tasklet);
  1962. bf = avp->av_bcbuf;
  1963. if (!bf || !bf->bf_mpdu)
  1964. goto skip;
  1965. status = ath9k_hw_txprocdesc(ah, bf->bf_desc, &ts);
  1966. if (status == -EINPROGRESS)
  1967. goto skip;
  1968. sc->beacon.tx_processed = true;
  1969. sc->beacon.tx_last = !(ts.ts_status & ATH9K_TXERR_MASK);
  1970. skip:
  1971. tasklet_enable(&sc->bcon_tasklet);
  1972. }
  1973. return sc->beacon.tx_last;
  1974. }
  1975. struct ieee80211_ops ath9k_ops = {
  1976. .tx = ath9k_tx,
  1977. .start = ath9k_start,
  1978. .stop = ath9k_stop,
  1979. .add_interface = ath9k_add_interface,
  1980. .change_interface = ath9k_change_interface,
  1981. .remove_interface = ath9k_remove_interface,
  1982. .config = ath9k_config,
  1983. .configure_filter = ath9k_configure_filter,
  1984. .sta_add = ath9k_sta_add,
  1985. .sta_remove = ath9k_sta_remove,
  1986. .sta_notify = ath9k_sta_notify,
  1987. .conf_tx = ath9k_conf_tx,
  1988. .bss_info_changed = ath9k_bss_info_changed,
  1989. .set_key = ath9k_set_key,
  1990. .get_tsf = ath9k_get_tsf,
  1991. .set_tsf = ath9k_set_tsf,
  1992. .reset_tsf = ath9k_reset_tsf,
  1993. .ampdu_action = ath9k_ampdu_action,
  1994. .get_survey = ath9k_get_survey,
  1995. .rfkill_poll = ath9k_rfkill_poll_state,
  1996. .set_coverage_class = ath9k_set_coverage_class,
  1997. .flush = ath9k_flush,
  1998. .tx_frames_pending = ath9k_tx_frames_pending,
  1999. .tx_last_beacon = ath9k_tx_last_beacon,
  2000. };