chip.c 17 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716
  1. /*
  2. * linux/kernel/irq/chip.c
  3. *
  4. * Copyright (C) 1992, 1998-2006 Linus Torvalds, Ingo Molnar
  5. * Copyright (C) 2005-2006, Thomas Gleixner, Russell King
  6. *
  7. * This file contains the core interrupt handling code, for irq-chip
  8. * based architectures.
  9. *
  10. * Detailed information is available in Documentation/DocBook/genericirq
  11. */
  12. #include <linux/irq.h>
  13. #include <linux/msi.h>
  14. #include <linux/module.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/kernel_stat.h>
  17. #include "internals.h"
  18. /**
  19. * irq_set_chip - set the irq chip for an irq
  20. * @irq: irq number
  21. * @chip: pointer to irq chip description structure
  22. */
  23. int irq_set_chip(unsigned int irq, struct irq_chip *chip)
  24. {
  25. struct irq_desc *desc = irq_to_desc(irq);
  26. unsigned long flags;
  27. if (!desc) {
  28. WARN(1, KERN_ERR "Trying to install chip for IRQ%d\n", irq);
  29. return -EINVAL;
  30. }
  31. if (!chip)
  32. chip = &no_irq_chip;
  33. raw_spin_lock_irqsave(&desc->lock, flags);
  34. irq_chip_set_defaults(chip);
  35. desc->irq_data.chip = chip;
  36. raw_spin_unlock_irqrestore(&desc->lock, flags);
  37. return 0;
  38. }
  39. EXPORT_SYMBOL(irq_set_chip);
  40. /**
  41. * irq_set_type - set the irq trigger type for an irq
  42. * @irq: irq number
  43. * @type: IRQ_TYPE_{LEVEL,EDGE}_* value - see include/linux/irq.h
  44. */
  45. int irq_set_irq_type(unsigned int irq, unsigned int type)
  46. {
  47. struct irq_desc *desc = irq_to_desc(irq);
  48. unsigned long flags;
  49. int ret = -ENXIO;
  50. if (!desc) {
  51. printk(KERN_ERR "Trying to set irq type for IRQ%d\n", irq);
  52. return -ENODEV;
  53. }
  54. type &= IRQ_TYPE_SENSE_MASK;
  55. if (type == IRQ_TYPE_NONE)
  56. return 0;
  57. chip_bus_lock(desc);
  58. raw_spin_lock_irqsave(&desc->lock, flags);
  59. ret = __irq_set_trigger(desc, irq, type);
  60. raw_spin_unlock_irqrestore(&desc->lock, flags);
  61. chip_bus_sync_unlock(desc);
  62. return ret;
  63. }
  64. EXPORT_SYMBOL(irq_set_irq_type);
  65. /**
  66. * irq_set_handler_data - set irq handler data for an irq
  67. * @irq: Interrupt number
  68. * @data: Pointer to interrupt specific data
  69. *
  70. * Set the hardware irq controller data for an irq
  71. */
  72. int irq_set_handler_data(unsigned int irq, void *data)
  73. {
  74. struct irq_desc *desc = irq_to_desc(irq);
  75. unsigned long flags;
  76. if (!desc) {
  77. printk(KERN_ERR
  78. "Trying to install controller data for IRQ%d\n", irq);
  79. return -EINVAL;
  80. }
  81. raw_spin_lock_irqsave(&desc->lock, flags);
  82. desc->irq_data.handler_data = data;
  83. raw_spin_unlock_irqrestore(&desc->lock, flags);
  84. return 0;
  85. }
  86. EXPORT_SYMBOL(irq_set_handler_data);
  87. /**
  88. * irq_set_msi_desc - set MSI descriptor data for an irq
  89. * @irq: Interrupt number
  90. * @entry: Pointer to MSI descriptor data
  91. *
  92. * Set the MSI descriptor entry for an irq
  93. */
  94. int irq_set_msi_desc(unsigned int irq, struct msi_desc *entry)
  95. {
  96. struct irq_desc *desc = irq_to_desc(irq);
  97. unsigned long flags;
  98. if (!desc) {
  99. printk(KERN_ERR
  100. "Trying to install msi data for IRQ%d\n", irq);
  101. return -EINVAL;
  102. }
  103. raw_spin_lock_irqsave(&desc->lock, flags);
  104. desc->irq_data.msi_desc = entry;
  105. if (entry)
  106. entry->irq = irq;
  107. raw_spin_unlock_irqrestore(&desc->lock, flags);
  108. return 0;
  109. }
  110. /**
  111. * irq_set_chip_data - set irq chip data for an irq
  112. * @irq: Interrupt number
  113. * @data: Pointer to chip specific data
  114. *
  115. * Set the hardware irq chip data for an irq
  116. */
  117. int irq_set_chip_data(unsigned int irq, void *data)
  118. {
  119. struct irq_desc *desc = irq_to_desc(irq);
  120. unsigned long flags;
  121. if (!desc) {
  122. printk(KERN_ERR
  123. "Trying to install chip data for IRQ%d\n", irq);
  124. return -EINVAL;
  125. }
  126. if (!desc->irq_data.chip) {
  127. printk(KERN_ERR "BUG: bad set_irq_chip_data(IRQ#%d)\n", irq);
  128. return -EINVAL;
  129. }
  130. raw_spin_lock_irqsave(&desc->lock, flags);
  131. desc->irq_data.chip_data = data;
  132. raw_spin_unlock_irqrestore(&desc->lock, flags);
  133. return 0;
  134. }
  135. EXPORT_SYMBOL(irq_set_chip_data);
  136. struct irq_data *irq_get_irq_data(unsigned int irq)
  137. {
  138. struct irq_desc *desc = irq_to_desc(irq);
  139. return desc ? &desc->irq_data : NULL;
  140. }
  141. EXPORT_SYMBOL_GPL(irq_get_irq_data);
  142. /**
  143. * set_irq_nested_thread - Set/Reset the IRQ_NESTED_THREAD flag of an irq
  144. *
  145. * @irq: Interrupt number
  146. * @nest: 0 to clear / 1 to set the IRQ_NESTED_THREAD flag
  147. *
  148. * The IRQ_NESTED_THREAD flag indicates that on
  149. * request_threaded_irq() no separate interrupt thread should be
  150. * created for the irq as the handler are called nested in the
  151. * context of a demultiplexing interrupt handler thread.
  152. */
  153. void set_irq_nested_thread(unsigned int irq, int nest)
  154. {
  155. struct irq_desc *desc = irq_to_desc(irq);
  156. unsigned long flags;
  157. if (!desc)
  158. return;
  159. raw_spin_lock_irqsave(&desc->lock, flags);
  160. if (nest)
  161. desc->status |= IRQ_NESTED_THREAD;
  162. else
  163. desc->status &= ~IRQ_NESTED_THREAD;
  164. raw_spin_unlock_irqrestore(&desc->lock, flags);
  165. }
  166. EXPORT_SYMBOL_GPL(set_irq_nested_thread);
  167. int irq_startup(struct irq_desc *desc)
  168. {
  169. desc->status &= ~IRQ_DISABLED;
  170. desc->depth = 0;
  171. if (desc->irq_data.chip->irq_startup) {
  172. int ret = desc->irq_data.chip->irq_startup(&desc->irq_data);
  173. desc->status &= ~IRQ_MASKED;
  174. return ret;
  175. }
  176. irq_enable(desc);
  177. return 0;
  178. }
  179. void irq_shutdown(struct irq_desc *desc)
  180. {
  181. desc->status |= IRQ_DISABLED;
  182. desc->depth = 1;
  183. if (desc->irq_data.chip->irq_shutdown)
  184. desc->irq_data.chip->irq_shutdown(&desc->irq_data);
  185. if (desc->irq_data.chip->irq_disable)
  186. desc->irq_data.chip->irq_disable(&desc->irq_data);
  187. else
  188. desc->irq_data.chip->irq_mask(&desc->irq_data);
  189. desc->status |= IRQ_MASKED;
  190. }
  191. void irq_enable(struct irq_desc *desc)
  192. {
  193. desc->status &= ~IRQ_DISABLED;
  194. if (desc->irq_data.chip->irq_enable)
  195. desc->irq_data.chip->irq_enable(&desc->irq_data);
  196. else
  197. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  198. desc->status &= ~IRQ_MASKED;
  199. }
  200. void irq_disable(struct irq_desc *desc)
  201. {
  202. desc->status |= IRQ_DISABLED;
  203. if (desc->irq_data.chip->irq_disable) {
  204. desc->irq_data.chip->irq_disable(&desc->irq_data);
  205. desc->status |= IRQ_MASKED;
  206. }
  207. }
  208. #ifndef CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED
  209. /* Temporary migration helpers */
  210. static void compat_irq_mask(struct irq_data *data)
  211. {
  212. data->chip->mask(data->irq);
  213. }
  214. static void compat_irq_unmask(struct irq_data *data)
  215. {
  216. data->chip->unmask(data->irq);
  217. }
  218. static void compat_irq_ack(struct irq_data *data)
  219. {
  220. data->chip->ack(data->irq);
  221. }
  222. static void compat_irq_mask_ack(struct irq_data *data)
  223. {
  224. data->chip->mask_ack(data->irq);
  225. }
  226. static void compat_irq_eoi(struct irq_data *data)
  227. {
  228. data->chip->eoi(data->irq);
  229. }
  230. static void compat_irq_enable(struct irq_data *data)
  231. {
  232. data->chip->enable(data->irq);
  233. }
  234. static void compat_irq_disable(struct irq_data *data)
  235. {
  236. data->chip->disable(data->irq);
  237. }
  238. static void compat_irq_shutdown(struct irq_data *data)
  239. {
  240. data->chip->shutdown(data->irq);
  241. }
  242. static unsigned int compat_irq_startup(struct irq_data *data)
  243. {
  244. return data->chip->startup(data->irq);
  245. }
  246. static int compat_irq_set_affinity(struct irq_data *data,
  247. const struct cpumask *dest, bool force)
  248. {
  249. return data->chip->set_affinity(data->irq, dest);
  250. }
  251. static int compat_irq_set_type(struct irq_data *data, unsigned int type)
  252. {
  253. return data->chip->set_type(data->irq, type);
  254. }
  255. static int compat_irq_set_wake(struct irq_data *data, unsigned int on)
  256. {
  257. return data->chip->set_wake(data->irq, on);
  258. }
  259. static int compat_irq_retrigger(struct irq_data *data)
  260. {
  261. return data->chip->retrigger(data->irq);
  262. }
  263. static void compat_bus_lock(struct irq_data *data)
  264. {
  265. data->chip->bus_lock(data->irq);
  266. }
  267. static void compat_bus_sync_unlock(struct irq_data *data)
  268. {
  269. data->chip->bus_sync_unlock(data->irq);
  270. }
  271. #endif
  272. /*
  273. * Fixup enable/disable function pointers
  274. */
  275. void irq_chip_set_defaults(struct irq_chip *chip)
  276. {
  277. #ifndef CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED
  278. if (chip->enable)
  279. chip->irq_enable = compat_irq_enable;
  280. if (chip->disable)
  281. chip->irq_disable = compat_irq_disable;
  282. if (chip->shutdown)
  283. chip->irq_shutdown = compat_irq_shutdown;
  284. if (chip->startup)
  285. chip->irq_startup = compat_irq_startup;
  286. if (!chip->end)
  287. chip->end = dummy_irq_chip.end;
  288. if (chip->bus_lock)
  289. chip->irq_bus_lock = compat_bus_lock;
  290. if (chip->bus_sync_unlock)
  291. chip->irq_bus_sync_unlock = compat_bus_sync_unlock;
  292. if (chip->mask)
  293. chip->irq_mask = compat_irq_mask;
  294. if (chip->unmask)
  295. chip->irq_unmask = compat_irq_unmask;
  296. if (chip->ack)
  297. chip->irq_ack = compat_irq_ack;
  298. if (chip->mask_ack)
  299. chip->irq_mask_ack = compat_irq_mask_ack;
  300. if (chip->eoi)
  301. chip->irq_eoi = compat_irq_eoi;
  302. if (chip->set_affinity)
  303. chip->irq_set_affinity = compat_irq_set_affinity;
  304. if (chip->set_type)
  305. chip->irq_set_type = compat_irq_set_type;
  306. if (chip->set_wake)
  307. chip->irq_set_wake = compat_irq_set_wake;
  308. if (chip->retrigger)
  309. chip->irq_retrigger = compat_irq_retrigger;
  310. #endif
  311. }
  312. static inline void mask_ack_irq(struct irq_desc *desc)
  313. {
  314. if (desc->irq_data.chip->irq_mask_ack)
  315. desc->irq_data.chip->irq_mask_ack(&desc->irq_data);
  316. else {
  317. desc->irq_data.chip->irq_mask(&desc->irq_data);
  318. if (desc->irq_data.chip->irq_ack)
  319. desc->irq_data.chip->irq_ack(&desc->irq_data);
  320. }
  321. desc->status |= IRQ_MASKED;
  322. }
  323. static inline void mask_irq(struct irq_desc *desc)
  324. {
  325. if (desc->irq_data.chip->irq_mask) {
  326. desc->irq_data.chip->irq_mask(&desc->irq_data);
  327. desc->status |= IRQ_MASKED;
  328. }
  329. }
  330. static inline void unmask_irq(struct irq_desc *desc)
  331. {
  332. if (desc->irq_data.chip->irq_unmask) {
  333. desc->irq_data.chip->irq_unmask(&desc->irq_data);
  334. desc->status &= ~IRQ_MASKED;
  335. }
  336. }
  337. /*
  338. * handle_nested_irq - Handle a nested irq from a irq thread
  339. * @irq: the interrupt number
  340. *
  341. * Handle interrupts which are nested into a threaded interrupt
  342. * handler. The handler function is called inside the calling
  343. * threads context.
  344. */
  345. void handle_nested_irq(unsigned int irq)
  346. {
  347. struct irq_desc *desc = irq_to_desc(irq);
  348. struct irqaction *action;
  349. irqreturn_t action_ret;
  350. might_sleep();
  351. raw_spin_lock_irq(&desc->lock);
  352. kstat_incr_irqs_this_cpu(irq, desc);
  353. action = desc->action;
  354. if (unlikely(!action || (desc->status & IRQ_DISABLED)))
  355. goto out_unlock;
  356. desc->status |= IRQ_INPROGRESS;
  357. raw_spin_unlock_irq(&desc->lock);
  358. action_ret = action->thread_fn(action->irq, action->dev_id);
  359. if (!noirqdebug)
  360. note_interrupt(irq, desc, action_ret);
  361. raw_spin_lock_irq(&desc->lock);
  362. desc->status &= ~IRQ_INPROGRESS;
  363. out_unlock:
  364. raw_spin_unlock_irq(&desc->lock);
  365. }
  366. EXPORT_SYMBOL_GPL(handle_nested_irq);
  367. static bool irq_check_poll(struct irq_desc *desc)
  368. {
  369. if (!(desc->status & IRQ_POLL_INPROGRESS))
  370. return false;
  371. return irq_wait_for_poll(desc);
  372. }
  373. /**
  374. * handle_simple_irq - Simple and software-decoded IRQs.
  375. * @irq: the interrupt number
  376. * @desc: the interrupt description structure for this irq
  377. *
  378. * Simple interrupts are either sent from a demultiplexing interrupt
  379. * handler or come from hardware, where no interrupt hardware control
  380. * is necessary.
  381. *
  382. * Note: The caller is expected to handle the ack, clear, mask and
  383. * unmask issues if necessary.
  384. */
  385. void
  386. handle_simple_irq(unsigned int irq, struct irq_desc *desc)
  387. {
  388. raw_spin_lock(&desc->lock);
  389. if (unlikely(desc->status & IRQ_INPROGRESS))
  390. if (!irq_check_poll(desc))
  391. goto out_unlock;
  392. desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
  393. kstat_incr_irqs_this_cpu(irq, desc);
  394. if (unlikely(!desc->action || (desc->status & IRQ_DISABLED)))
  395. goto out_unlock;
  396. handle_irq_event(desc);
  397. out_unlock:
  398. raw_spin_unlock(&desc->lock);
  399. }
  400. /**
  401. * handle_level_irq - Level type irq handler
  402. * @irq: the interrupt number
  403. * @desc: the interrupt description structure for this irq
  404. *
  405. * Level type interrupts are active as long as the hardware line has
  406. * the active level. This may require to mask the interrupt and unmask
  407. * it after the associated handler has acknowledged the device, so the
  408. * interrupt line is back to inactive.
  409. */
  410. void
  411. handle_level_irq(unsigned int irq, struct irq_desc *desc)
  412. {
  413. raw_spin_lock(&desc->lock);
  414. mask_ack_irq(desc);
  415. if (unlikely(desc->status & IRQ_INPROGRESS))
  416. if (!irq_check_poll(desc))
  417. goto out_unlock;
  418. desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
  419. kstat_incr_irqs_this_cpu(irq, desc);
  420. /*
  421. * If its disabled or no action available
  422. * keep it masked and get out of here
  423. */
  424. if (unlikely(!desc->action || (desc->status & IRQ_DISABLED)))
  425. goto out_unlock;
  426. handle_irq_event(desc);
  427. if (!(desc->status & (IRQ_DISABLED | IRQ_ONESHOT)))
  428. unmask_irq(desc);
  429. out_unlock:
  430. raw_spin_unlock(&desc->lock);
  431. }
  432. EXPORT_SYMBOL_GPL(handle_level_irq);
  433. /**
  434. * handle_fasteoi_irq - irq handler for transparent controllers
  435. * @irq: the interrupt number
  436. * @desc: the interrupt description structure for this irq
  437. *
  438. * Only a single callback will be issued to the chip: an ->eoi()
  439. * call when the interrupt has been serviced. This enables support
  440. * for modern forms of interrupt handlers, which handle the flow
  441. * details in hardware, transparently.
  442. */
  443. void
  444. handle_fasteoi_irq(unsigned int irq, struct irq_desc *desc)
  445. {
  446. raw_spin_lock(&desc->lock);
  447. if (unlikely(desc->status & IRQ_INPROGRESS))
  448. if (!irq_check_poll(desc))
  449. goto out;
  450. desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
  451. kstat_incr_irqs_this_cpu(irq, desc);
  452. /*
  453. * If its disabled or no action available
  454. * then mask it and get out of here:
  455. */
  456. if (unlikely(!desc->action || (desc->status & IRQ_DISABLED))) {
  457. desc->status |= IRQ_PENDING;
  458. mask_irq(desc);
  459. goto out;
  460. }
  461. handle_irq_event(desc);
  462. out:
  463. desc->irq_data.chip->irq_eoi(&desc->irq_data);
  464. raw_spin_unlock(&desc->lock);
  465. }
  466. /**
  467. * handle_edge_irq - edge type IRQ handler
  468. * @irq: the interrupt number
  469. * @desc: the interrupt description structure for this irq
  470. *
  471. * Interrupt occures on the falling and/or rising edge of a hardware
  472. * signal. The occurence is latched into the irq controller hardware
  473. * and must be acked in order to be reenabled. After the ack another
  474. * interrupt can happen on the same source even before the first one
  475. * is handled by the associated event handler. If this happens it
  476. * might be necessary to disable (mask) the interrupt depending on the
  477. * controller hardware. This requires to reenable the interrupt inside
  478. * of the loop which handles the interrupts which have arrived while
  479. * the handler was running. If all pending interrupts are handled, the
  480. * loop is left.
  481. */
  482. void
  483. handle_edge_irq(unsigned int irq, struct irq_desc *desc)
  484. {
  485. raw_spin_lock(&desc->lock);
  486. desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
  487. /*
  488. * If we're currently running this IRQ, or its disabled,
  489. * we shouldn't process the IRQ. Mark it pending, handle
  490. * the necessary masking and go out
  491. */
  492. if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) ||
  493. !desc->action)) {
  494. if (!irq_check_poll(desc)) {
  495. desc->status |= IRQ_PENDING;
  496. mask_ack_irq(desc);
  497. goto out_unlock;
  498. }
  499. }
  500. kstat_incr_irqs_this_cpu(irq, desc);
  501. /* Start handling the irq */
  502. desc->irq_data.chip->irq_ack(&desc->irq_data);
  503. do {
  504. if (unlikely(!desc->action)) {
  505. mask_irq(desc);
  506. goto out_unlock;
  507. }
  508. /*
  509. * When another irq arrived while we were handling
  510. * one, we could have masked the irq.
  511. * Renable it, if it was not disabled in meantime.
  512. */
  513. if (unlikely((desc->status &
  514. (IRQ_PENDING | IRQ_MASKED | IRQ_DISABLED)) ==
  515. (IRQ_PENDING | IRQ_MASKED))) {
  516. unmask_irq(desc);
  517. }
  518. handle_irq_event(desc);
  519. } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING);
  520. out_unlock:
  521. raw_spin_unlock(&desc->lock);
  522. }
  523. /**
  524. * handle_percpu_irq - Per CPU local irq handler
  525. * @irq: the interrupt number
  526. * @desc: the interrupt description structure for this irq
  527. *
  528. * Per CPU interrupts on SMP machines without locking requirements
  529. */
  530. void
  531. handle_percpu_irq(unsigned int irq, struct irq_desc *desc)
  532. {
  533. struct irq_chip *chip = get_irq_desc_chip(desc);
  534. kstat_incr_irqs_this_cpu(irq, desc);
  535. if (chip->irq_ack)
  536. chip->irq_ack(&desc->irq_data);
  537. handle_irq_event_percpu(desc, desc->action);
  538. if (chip->irq_eoi)
  539. chip->irq_eoi(&desc->irq_data);
  540. }
  541. void
  542. __set_irq_handler(unsigned int irq, irq_flow_handler_t handle, int is_chained,
  543. const char *name)
  544. {
  545. struct irq_desc *desc = irq_to_desc(irq);
  546. unsigned long flags;
  547. if (!desc) {
  548. printk(KERN_ERR
  549. "Trying to install type control for IRQ%d\n", irq);
  550. return;
  551. }
  552. if (!handle)
  553. handle = handle_bad_irq;
  554. else if (desc->irq_data.chip == &no_irq_chip) {
  555. printk(KERN_WARNING "Trying to install %sinterrupt handler "
  556. "for IRQ%d\n", is_chained ? "chained " : "", irq);
  557. /*
  558. * Some ARM implementations install a handler for really dumb
  559. * interrupt hardware without setting an irq_chip. This worked
  560. * with the ARM no_irq_chip but the check in setup_irq would
  561. * prevent us to setup the interrupt at all. Switch it to
  562. * dummy_irq_chip for easy transition.
  563. */
  564. desc->irq_data.chip = &dummy_irq_chip;
  565. }
  566. chip_bus_lock(desc);
  567. raw_spin_lock_irqsave(&desc->lock, flags);
  568. /* Uninstall? */
  569. if (handle == handle_bad_irq) {
  570. if (desc->irq_data.chip != &no_irq_chip)
  571. mask_ack_irq(desc);
  572. desc->status |= IRQ_DISABLED;
  573. desc->depth = 1;
  574. }
  575. desc->handle_irq = handle;
  576. desc->name = name;
  577. if (handle != handle_bad_irq && is_chained) {
  578. desc->status |= IRQ_NOREQUEST | IRQ_NOPROBE;
  579. irq_startup(desc);
  580. }
  581. raw_spin_unlock_irqrestore(&desc->lock, flags);
  582. chip_bus_sync_unlock(desc);
  583. }
  584. EXPORT_SYMBOL_GPL(__set_irq_handler);
  585. void
  586. set_irq_chip_and_handler(unsigned int irq, struct irq_chip *chip,
  587. irq_flow_handler_t handle)
  588. {
  589. set_irq_chip(irq, chip);
  590. __set_irq_handler(irq, handle, 0, NULL);
  591. }
  592. void
  593. set_irq_chip_and_handler_name(unsigned int irq, struct irq_chip *chip,
  594. irq_flow_handler_t handle, const char *name)
  595. {
  596. set_irq_chip(irq, chip);
  597. __set_irq_handler(irq, handle, 0, name);
  598. }
  599. void irq_modify_status(unsigned int irq, unsigned long clr, unsigned long set)
  600. {
  601. struct irq_desc *desc = irq_to_desc(irq);
  602. unsigned long flags;
  603. if (!desc)
  604. return;
  605. /* Sanitize flags */
  606. set &= IRQF_MODIFY_MASK;
  607. clr &= IRQF_MODIFY_MASK;
  608. raw_spin_lock_irqsave(&desc->lock, flags);
  609. desc->status &= ~clr;
  610. desc->status |= set;
  611. raw_spin_unlock_irqrestore(&desc->lock, flags);
  612. }