rx.c 13 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500
  1. /*
  2. * Adaptec AAC series RAID controller driver
  3. * (c) Copyright 2001 Red Hat Inc. <alan@redhat.com>
  4. *
  5. * based on the old aacraid driver that is..
  6. * Adaptec aacraid device driver for Linux.
  7. *
  8. * Copyright (c) 2000 Adaptec, Inc. (aacraid@adaptec.com)
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2, or (at your option)
  13. * any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. * GNU General Public License for more details.
  19. *
  20. * You should have received a copy of the GNU General Public License
  21. * along with this program; see the file COPYING. If not, write to
  22. * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
  23. *
  24. * Module Name:
  25. * rx.c
  26. *
  27. * Abstract: Hardware miniport for Drawbridge specific hardware functions.
  28. *
  29. */
  30. #include <linux/kernel.h>
  31. #include <linux/init.h>
  32. #include <linux/types.h>
  33. #include <linux/sched.h>
  34. #include <linux/pci.h>
  35. #include <linux/spinlock.h>
  36. #include <linux/slab.h>
  37. #include <linux/blkdev.h>
  38. #include <linux/delay.h>
  39. #include <linux/completion.h>
  40. #include <linux/time.h>
  41. #include <linux/interrupt.h>
  42. #include <asm/semaphore.h>
  43. #include <scsi/scsi_host.h>
  44. #include "aacraid.h"
  45. static irqreturn_t aac_rx_intr(int irq, void *dev_id, struct pt_regs *regs)
  46. {
  47. struct aac_dev *dev = dev_id;
  48. dprintk((KERN_DEBUG "aac_rx_intr(%d,%p,%p)\n", irq, dev_id, regs));
  49. if (dev->new_comm_interface) {
  50. u32 Index = rx_readl(dev, MUnit.OutboundQueue);
  51. if (Index == 0xFFFFFFFFL)
  52. Index = rx_readl(dev, MUnit.OutboundQueue);
  53. if (Index != 0xFFFFFFFFL) {
  54. do {
  55. if (aac_intr_normal(dev, Index)) {
  56. rx_writel(dev, MUnit.OutboundQueue, Index);
  57. rx_writel(dev, MUnit.ODR, DoorBellAdapterNormRespReady);
  58. }
  59. Index = rx_readl(dev, MUnit.OutboundQueue);
  60. } while (Index != 0xFFFFFFFFL);
  61. return IRQ_HANDLED;
  62. }
  63. } else {
  64. unsigned long bellbits;
  65. u8 intstat;
  66. intstat = rx_readb(dev, MUnit.OISR);
  67. /*
  68. * Read mask and invert because drawbridge is reversed.
  69. * This allows us to only service interrupts that have
  70. * been enabled.
  71. * Check to see if this is our interrupt. If it isn't just return
  72. */
  73. if (intstat & ~(dev->OIMR))
  74. {
  75. bellbits = rx_readl(dev, OutboundDoorbellReg);
  76. if (bellbits & DoorBellPrintfReady) {
  77. aac_printf(dev, rx_readl (dev, IndexRegs.Mailbox[5]));
  78. rx_writel(dev, MUnit.ODR,DoorBellPrintfReady);
  79. rx_writel(dev, InboundDoorbellReg,DoorBellPrintfDone);
  80. }
  81. else if (bellbits & DoorBellAdapterNormCmdReady) {
  82. rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdReady);
  83. aac_command_normal(&dev->queues->queue[HostNormCmdQueue]);
  84. }
  85. else if (bellbits & DoorBellAdapterNormRespReady) {
  86. rx_writel(dev, MUnit.ODR,DoorBellAdapterNormRespReady);
  87. aac_response_normal(&dev->queues->queue[HostNormRespQueue]);
  88. }
  89. else if (bellbits & DoorBellAdapterNormCmdNotFull) {
  90. rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdNotFull);
  91. }
  92. else if (bellbits & DoorBellAdapterNormRespNotFull) {
  93. rx_writel(dev, MUnit.ODR, DoorBellAdapterNormCmdNotFull);
  94. rx_writel(dev, MUnit.ODR, DoorBellAdapterNormRespNotFull);
  95. }
  96. return IRQ_HANDLED;
  97. }
  98. }
  99. return IRQ_NONE;
  100. }
  101. /**
  102. * aac_rx_disable_interrupt - Disable interrupts
  103. * @dev: Adapter
  104. */
  105. static void aac_rx_disable_interrupt(struct aac_dev *dev)
  106. {
  107. rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xff);
  108. }
  109. /**
  110. * rx_sync_cmd - send a command and wait
  111. * @dev: Adapter
  112. * @command: Command to execute
  113. * @p1: first parameter
  114. * @ret: adapter status
  115. *
  116. * This routine will send a synchronous command to the adapter and wait
  117. * for its completion.
  118. */
  119. static int rx_sync_cmd(struct aac_dev *dev, u32 command,
  120. u32 p1, u32 p2, u32 p3, u32 p4, u32 p5, u32 p6,
  121. u32 *status, u32 * r1, u32 * r2, u32 * r3, u32 * r4)
  122. {
  123. unsigned long start;
  124. int ok;
  125. /*
  126. * Write the command into Mailbox 0
  127. */
  128. rx_writel(dev, InboundMailbox0, command);
  129. /*
  130. * Write the parameters into Mailboxes 1 - 6
  131. */
  132. rx_writel(dev, InboundMailbox1, p1);
  133. rx_writel(dev, InboundMailbox2, p2);
  134. rx_writel(dev, InboundMailbox3, p3);
  135. rx_writel(dev, InboundMailbox4, p4);
  136. /*
  137. * Clear the synch command doorbell to start on a clean slate.
  138. */
  139. rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0);
  140. /*
  141. * Disable doorbell interrupts
  142. */
  143. rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xff);
  144. /*
  145. * Force the completion of the mask register write before issuing
  146. * the interrupt.
  147. */
  148. rx_readb (dev, MUnit.OIMR);
  149. /*
  150. * Signal that there is a new synch command
  151. */
  152. rx_writel(dev, InboundDoorbellReg, INBOUNDDOORBELL_0);
  153. ok = 0;
  154. start = jiffies;
  155. /*
  156. * Wait up to 30 seconds
  157. */
  158. while (time_before(jiffies, start+30*HZ))
  159. {
  160. udelay(5); /* Delay 5 microseconds to let Mon960 get info. */
  161. /*
  162. * Mon960 will set doorbell0 bit when it has completed the command.
  163. */
  164. if (rx_readl(dev, OutboundDoorbellReg) & OUTBOUNDDOORBELL_0) {
  165. /*
  166. * Clear the doorbell.
  167. */
  168. rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0);
  169. ok = 1;
  170. break;
  171. }
  172. /*
  173. * Yield the processor in case we are slow
  174. */
  175. set_current_state(TASK_UNINTERRUPTIBLE);
  176. schedule_timeout(1);
  177. }
  178. if (ok != 1) {
  179. /*
  180. * Restore interrupt mask even though we timed out
  181. */
  182. if (dev->new_comm_interface)
  183. rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xf7);
  184. else
  185. rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xfb);
  186. return -ETIMEDOUT;
  187. }
  188. /*
  189. * Pull the synch status from Mailbox 0.
  190. */
  191. if (status)
  192. *status = rx_readl(dev, IndexRegs.Mailbox[0]);
  193. if (r1)
  194. *r1 = rx_readl(dev, IndexRegs.Mailbox[1]);
  195. if (r2)
  196. *r2 = rx_readl(dev, IndexRegs.Mailbox[2]);
  197. if (r3)
  198. *r3 = rx_readl(dev, IndexRegs.Mailbox[3]);
  199. if (r4)
  200. *r4 = rx_readl(dev, IndexRegs.Mailbox[4]);
  201. /*
  202. * Clear the synch command doorbell.
  203. */
  204. rx_writel(dev, OutboundDoorbellReg, OUTBOUNDDOORBELL_0);
  205. /*
  206. * Restore interrupt mask
  207. */
  208. if (dev->new_comm_interface)
  209. rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xf7);
  210. else
  211. rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xfb);
  212. return 0;
  213. }
  214. /**
  215. * aac_rx_interrupt_adapter - interrupt adapter
  216. * @dev: Adapter
  217. *
  218. * Send an interrupt to the i960 and breakpoint it.
  219. */
  220. static void aac_rx_interrupt_adapter(struct aac_dev *dev)
  221. {
  222. rx_sync_cmd(dev, BREAKPOINT_REQUEST, 0, 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL);
  223. }
  224. /**
  225. * aac_rx_notify_adapter - send an event to the adapter
  226. * @dev: Adapter
  227. * @event: Event to send
  228. *
  229. * Notify the i960 that something it probably cares about has
  230. * happened.
  231. */
  232. static void aac_rx_notify_adapter(struct aac_dev *dev, u32 event)
  233. {
  234. switch (event) {
  235. case AdapNormCmdQue:
  236. rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_1);
  237. break;
  238. case HostNormRespNotFull:
  239. rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_4);
  240. break;
  241. case AdapNormRespQue:
  242. rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_2);
  243. break;
  244. case HostNormCmdNotFull:
  245. rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_3);
  246. break;
  247. case HostShutdown:
  248. // rx_sync_cmd(dev, HOST_CRASHING, 0, 0, 0, 0, 0, 0,
  249. // NULL, NULL, NULL, NULL, NULL);
  250. break;
  251. case FastIo:
  252. rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_6);
  253. break;
  254. case AdapPrintfDone:
  255. rx_writel(dev, MUnit.IDR,INBOUNDDOORBELL_5);
  256. break;
  257. default:
  258. BUG();
  259. break;
  260. }
  261. }
  262. /**
  263. * aac_rx_start_adapter - activate adapter
  264. * @dev: Adapter
  265. *
  266. * Start up processing on an i960 based AAC adapter
  267. */
  268. static void aac_rx_start_adapter(struct aac_dev *dev)
  269. {
  270. struct aac_init *init;
  271. init = dev->init;
  272. init->HostElapsedSeconds = cpu_to_le32(get_seconds());
  273. // We can only use a 32 bit address here
  274. rx_sync_cmd(dev, INIT_STRUCT_BASE_ADDRESS, (u32)(ulong)dev->init_pa,
  275. 0, 0, 0, 0, 0, NULL, NULL, NULL, NULL, NULL);
  276. }
  277. /**
  278. * aac_rx_check_health
  279. * @dev: device to check if healthy
  280. *
  281. * Will attempt to determine if the specified adapter is alive and
  282. * capable of handling requests, returning 0 if alive.
  283. */
  284. static int aac_rx_check_health(struct aac_dev *dev)
  285. {
  286. u32 status = rx_readl(dev, MUnit.OMRx[0]);
  287. /*
  288. * Check to see if the board failed any self tests.
  289. */
  290. if (status & SELF_TEST_FAILED)
  291. return -1;
  292. /*
  293. * Check to see if the board panic'd.
  294. */
  295. if (status & KERNEL_PANIC) {
  296. char * buffer;
  297. struct POSTSTATUS {
  298. __le32 Post_Command;
  299. __le32 Post_Address;
  300. } * post;
  301. dma_addr_t paddr, baddr;
  302. int ret;
  303. if ((status & 0xFF000000L) == 0xBC000000L)
  304. return (status >> 16) & 0xFF;
  305. buffer = pci_alloc_consistent(dev->pdev, 512, &baddr);
  306. ret = -2;
  307. if (buffer == NULL)
  308. return ret;
  309. post = pci_alloc_consistent(dev->pdev,
  310. sizeof(struct POSTSTATUS), &paddr);
  311. if (post == NULL) {
  312. pci_free_consistent(dev->pdev, 512, buffer, baddr);
  313. return ret;
  314. }
  315. memset(buffer, 0, 512);
  316. post->Post_Command = cpu_to_le32(COMMAND_POST_RESULTS);
  317. post->Post_Address = cpu_to_le32(baddr);
  318. rx_writel(dev, MUnit.IMRx[0], paddr);
  319. rx_sync_cmd(dev, COMMAND_POST_RESULTS, baddr, 0, 0, 0, 0, 0,
  320. NULL, NULL, NULL, NULL, NULL);
  321. pci_free_consistent(dev->pdev, sizeof(struct POSTSTATUS),
  322. post, paddr);
  323. if ((buffer[0] == '0') && (buffer[1] == 'x')) {
  324. ret = (buffer[2] <= '9') ? (buffer[2] - '0') : (buffer[2] - 'A' + 10);
  325. ret <<= 4;
  326. ret += (buffer[3] <= '9') ? (buffer[3] - '0') : (buffer[3] - 'A' + 10);
  327. }
  328. pci_free_consistent(dev->pdev, 512, buffer, baddr);
  329. return ret;
  330. }
  331. /*
  332. * Wait for the adapter to be up and running.
  333. */
  334. if (!(status & KERNEL_UP_AND_RUNNING))
  335. return -3;
  336. /*
  337. * Everything is OK
  338. */
  339. return 0;
  340. }
  341. /**
  342. * aac_rx_send
  343. * @fib: fib to issue
  344. *
  345. * Will send a fib, returning 0 if successful.
  346. */
  347. static int aac_rx_send(struct fib * fib)
  348. {
  349. u64 addr = fib->hw_fib_pa;
  350. struct aac_dev *dev = fib->dev;
  351. volatile void __iomem *device = dev->regs.rx;
  352. u32 Index;
  353. dprintk((KERN_DEBUG "%p->aac_rx_send(%p->%llx)\n", dev, fib, addr));
  354. Index = rx_readl(dev, MUnit.InboundQueue);
  355. if (Index == 0xFFFFFFFFL)
  356. Index = rx_readl(dev, MUnit.InboundQueue);
  357. dprintk((KERN_DEBUG "Index = 0x%x\n", Index));
  358. if (Index == 0xFFFFFFFFL)
  359. return Index;
  360. device += Index;
  361. dprintk((KERN_DEBUG "entry = %x %x %u\n", (u32)(addr & 0xffffffff),
  362. (u32)(addr >> 32), (u32)le16_to_cpu(fib->hw_fib->header.Size)));
  363. writel((u32)(addr & 0xffffffff), device);
  364. device += sizeof(u32);
  365. writel((u32)(addr >> 32), device);
  366. device += sizeof(u32);
  367. writel(le16_to_cpu(fib->hw_fib->header.Size), device);
  368. rx_writel(dev, MUnit.InboundQueue, Index);
  369. dprintk((KERN_DEBUG "aac_rx_send - return 0\n"));
  370. return 0;
  371. }
  372. /**
  373. * aac_rx_init - initialize an i960 based AAC card
  374. * @dev: device to configure
  375. *
  376. * Allocate and set up resources for the i960 based AAC variants. The
  377. * device_interface in the commregion will be allocated and linked
  378. * to the comm region.
  379. */
  380. int aac_rx_init(struct aac_dev *dev)
  381. {
  382. unsigned long start;
  383. unsigned long status;
  384. int instance;
  385. const char * name;
  386. instance = dev->id;
  387. name = dev->name;
  388. /*
  389. * Check to see if the board panic'd while booting.
  390. */
  391. /*
  392. * Check to see if the board failed any self tests.
  393. */
  394. if (rx_readl(dev, MUnit.OMRx[0]) & SELF_TEST_FAILED) {
  395. printk(KERN_ERR "%s%d: adapter self-test failed.\n", dev->name, instance);
  396. goto error_iounmap;
  397. }
  398. /*
  399. * Check to see if the board panic'd while booting.
  400. */
  401. if (rx_readl(dev, MUnit.OMRx[0]) & KERNEL_PANIC) {
  402. printk(KERN_ERR "%s%d: adapter kernel panic.\n", dev->name, instance);
  403. goto error_iounmap;
  404. }
  405. /*
  406. * Check to see if the monitor panic'd while booting.
  407. */
  408. if (rx_readl(dev, MUnit.OMRx[0]) & MONITOR_PANIC) {
  409. printk(KERN_ERR "%s%d: adapter monitor panic.\n", dev->name, instance);
  410. goto error_iounmap;
  411. }
  412. start = jiffies;
  413. /*
  414. * Wait for the adapter to be up and running. Wait up to 3 minutes
  415. */
  416. while ((!(rx_readl(dev, IndexRegs.Mailbox[7]) & KERNEL_UP_AND_RUNNING))
  417. || (!(rx_readl(dev, MUnit.OMRx[0]) & KERNEL_UP_AND_RUNNING)))
  418. {
  419. if(time_after(jiffies, start+180*HZ))
  420. {
  421. status = rx_readl(dev, IndexRegs.Mailbox[7]);
  422. printk(KERN_ERR "%s%d: adapter kernel failed to start, init status = %lx.\n",
  423. dev->name, instance, status);
  424. goto error_iounmap;
  425. }
  426. set_current_state(TASK_UNINTERRUPTIBLE);
  427. schedule_timeout(1);
  428. }
  429. if (request_irq(dev->scsi_host_ptr->irq, aac_rx_intr, SA_SHIRQ|SA_INTERRUPT, "aacraid", (void *)dev)<0)
  430. {
  431. printk(KERN_ERR "%s%d: Interrupt unavailable.\n", name, instance);
  432. goto error_iounmap;
  433. }
  434. /*
  435. * Fill in the function dispatch table.
  436. */
  437. dev->a_ops.adapter_interrupt = aac_rx_interrupt_adapter;
  438. dev->a_ops.adapter_disable_int = aac_rx_disable_interrupt;
  439. dev->a_ops.adapter_notify = aac_rx_notify_adapter;
  440. dev->a_ops.adapter_sync_cmd = rx_sync_cmd;
  441. dev->a_ops.adapter_check_health = aac_rx_check_health;
  442. dev->a_ops.adapter_send = aac_rx_send;
  443. /*
  444. * First clear out all interrupts. Then enable the one's that we
  445. * can handle.
  446. */
  447. rx_writeb(dev, MUnit.OIMR, 0xff);
  448. rx_writel(dev, MUnit.ODR, 0xffffffff);
  449. rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xfb);
  450. if (aac_init_adapter(dev) == NULL)
  451. goto error_irq;
  452. if (dev->new_comm_interface)
  453. rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xf7);
  454. /*
  455. * Tell the adapter that all is configured, and it can start
  456. * accepting requests
  457. */
  458. aac_rx_start_adapter(dev);
  459. return 0;
  460. error_irq:
  461. rx_writeb(dev, MUnit.OIMR, dev->OIMR = 0xff);
  462. free_irq(dev->scsi_host_ptr->irq, (void *)dev);
  463. error_iounmap:
  464. return -1;
  465. }