core.h 24 KB

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  1. /*
  2. * Copyright (c) 2010-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2012 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #ifndef CORE_H
  18. #define CORE_H
  19. #include <linux/etherdevice.h>
  20. #include <linux/rtnetlink.h>
  21. #include <linux/firmware.h>
  22. #include <linux/sched.h>
  23. #include <linux/circ_buf.h>
  24. #include <net/cfg80211.h>
  25. #include "htc.h"
  26. #include "wmi.h"
  27. #include "bmi.h"
  28. #include "target.h"
  29. #define MAX_ATH6KL 1
  30. #define ATH6KL_MAX_RX_BUFFERS 16
  31. #define ATH6KL_BUFFER_SIZE 1664
  32. #define ATH6KL_MAX_AMSDU_RX_BUFFERS 4
  33. #define ATH6KL_AMSDU_REFILL_THRESHOLD 3
  34. #define ATH6KL_AMSDU_BUFFER_SIZE (WMI_MAX_AMSDU_RX_DATA_FRAME_LENGTH + 128)
  35. #define MAX_MSDU_SUBFRAME_PAYLOAD_LEN 1508
  36. #define MIN_MSDU_SUBFRAME_PAYLOAD_LEN 46
  37. #define USER_SAVEDKEYS_STAT_INIT 0
  38. #define USER_SAVEDKEYS_STAT_RUN 1
  39. #define ATH6KL_TX_TIMEOUT 10
  40. #define ATH6KL_MAX_ENDPOINTS 4
  41. #define MAX_NODE_NUM 15
  42. #define ATH6KL_APSD_ALL_FRAME 0xFFFF
  43. #define ATH6KL_APSD_NUM_OF_AC 0x4
  44. #define ATH6KL_APSD_FRAME_MASK 0xF
  45. /* Extra bytes for htc header alignment */
  46. #define ATH6KL_HTC_ALIGN_BYTES 3
  47. /* MAX_HI_COOKIE_NUM are reserved for high priority traffic */
  48. #define MAX_DEF_COOKIE_NUM 180
  49. #define MAX_HI_COOKIE_NUM 18 /* 10% of MAX_COOKIE_NUM */
  50. #define MAX_COOKIE_NUM (MAX_DEF_COOKIE_NUM + MAX_HI_COOKIE_NUM)
  51. #define MAX_DEFAULT_SEND_QUEUE_DEPTH (MAX_DEF_COOKIE_NUM / WMM_NUM_AC)
  52. #define DISCON_TIMER_INTVAL 10000 /* in msec */
  53. /* Channel dwell time in fg scan */
  54. #define ATH6KL_FG_SCAN_INTERVAL 50 /* in ms */
  55. /* includes also the null byte */
  56. #define ATH6KL_FIRMWARE_MAGIC "QCA-ATH6KL"
  57. enum ath6kl_fw_ie_type {
  58. ATH6KL_FW_IE_FW_VERSION = 0,
  59. ATH6KL_FW_IE_TIMESTAMP = 1,
  60. ATH6KL_FW_IE_OTP_IMAGE = 2,
  61. ATH6KL_FW_IE_FW_IMAGE = 3,
  62. ATH6KL_FW_IE_PATCH_IMAGE = 4,
  63. ATH6KL_FW_IE_RESERVED_RAM_SIZE = 5,
  64. ATH6KL_FW_IE_CAPABILITIES = 6,
  65. ATH6KL_FW_IE_PATCH_ADDR = 7,
  66. ATH6KL_FW_IE_BOARD_ADDR = 8,
  67. ATH6KL_FW_IE_VIF_MAX = 9,
  68. };
  69. enum ath6kl_fw_capability {
  70. ATH6KL_FW_CAPABILITY_HOST_P2P = 0,
  71. ATH6KL_FW_CAPABILITY_SCHED_SCAN = 1,
  72. /*
  73. * Firmware is capable of supporting P2P mgmt operations on a
  74. * station interface. After group formation, the station
  75. * interface will become a P2P client/GO interface as the case may be
  76. */
  77. ATH6KL_FW_CAPABILITY_STA_P2PDEV_DUPLEX,
  78. /*
  79. * Firmware has support to cleanup inactive stations
  80. * in AP mode.
  81. */
  82. ATH6KL_FW_CAPABILITY_INACTIVITY_TIMEOUT,
  83. /* Firmware has support to override rsn cap of rsn ie */
  84. ATH6KL_FW_CAPABILITY_RSN_CAP_OVERRIDE,
  85. /*
  86. * Multicast support in WOW and host awake mode.
  87. * Allow all multicast in host awake mode.
  88. * Apply multicast filter in WOW mode.
  89. */
  90. ATH6KL_FW_CAPABILITY_WOW_MULTICAST_FILTER,
  91. /* Firmware supports enhanced bmiss detection */
  92. ATH6KL_FW_CAPABILITY_BMISS_ENHANCE,
  93. /*
  94. * FW supports matching of ssid in schedule scan
  95. */
  96. ATH6KL_FW_CAPABILITY_SCHED_SCAN_MATCH_LIST,
  97. /* Firmware supports filtering BSS results by RSSI */
  98. ATH6KL_FW_CAPABILITY_RSSI_SCAN_THOLD,
  99. /* FW sets mac_addr[4] ^= 0x80 for newly created interfaces */
  100. ATH6KL_FW_CAPABILITY_CUSTOM_MAC_ADDR,
  101. /* Firmware supports TX error rate notification */
  102. ATH6KL_FW_CAPABILITY_TX_ERR_NOTIFY,
  103. /* supports WMI_SET_REGDOMAIN_CMDID command */
  104. ATH6KL_FW_CAPABILITY_REGDOMAIN,
  105. /* this needs to be last */
  106. ATH6KL_FW_CAPABILITY_MAX,
  107. };
  108. #define ATH6KL_CAPABILITY_LEN (ALIGN(ATH6KL_FW_CAPABILITY_MAX, 32) / 32)
  109. struct ath6kl_fw_ie {
  110. __le32 id;
  111. __le32 len;
  112. u8 data[0];
  113. };
  114. enum ath6kl_hw_flags {
  115. ATH6KL_HW_FLAG_64BIT_RATES = BIT(0),
  116. };
  117. #define ATH6KL_FW_API2_FILE "fw-2.bin"
  118. #define ATH6KL_FW_API3_FILE "fw-3.bin"
  119. /* AR6003 1.0 definitions */
  120. #define AR6003_HW_1_0_VERSION 0x300002ba
  121. /* AR6003 2.0 definitions */
  122. #define AR6003_HW_2_0_VERSION 0x30000384
  123. #define AR6003_HW_2_0_PATCH_DOWNLOAD_ADDRESS 0x57e910
  124. #define AR6003_HW_2_0_FW_DIR "ath6k/AR6003/hw2.0"
  125. #define AR6003_HW_2_0_OTP_FILE "otp.bin.z77"
  126. #define AR6003_HW_2_0_FIRMWARE_FILE "athwlan.bin.z77"
  127. #define AR6003_HW_2_0_TCMD_FIRMWARE_FILE "athtcmd_ram.bin"
  128. #define AR6003_HW_2_0_PATCH_FILE "data.patch.bin"
  129. #define AR6003_HW_2_0_BOARD_DATA_FILE AR6003_HW_2_0_FW_DIR "/bdata.bin"
  130. #define AR6003_HW_2_0_DEFAULT_BOARD_DATA_FILE \
  131. AR6003_HW_2_0_FW_DIR "/bdata.SD31.bin"
  132. /* AR6003 3.0 definitions */
  133. #define AR6003_HW_2_1_1_VERSION 0x30000582
  134. #define AR6003_HW_2_1_1_FW_DIR "ath6k/AR6003/hw2.1.1"
  135. #define AR6003_HW_2_1_1_OTP_FILE "otp.bin"
  136. #define AR6003_HW_2_1_1_FIRMWARE_FILE "athwlan.bin"
  137. #define AR6003_HW_2_1_1_TCMD_FIRMWARE_FILE "athtcmd_ram.bin"
  138. #define AR6003_HW_2_1_1_UTF_FIRMWARE_FILE "utf.bin"
  139. #define AR6003_HW_2_1_1_TESTSCRIPT_FILE "nullTestFlow.bin"
  140. #define AR6003_HW_2_1_1_PATCH_FILE "data.patch.bin"
  141. #define AR6003_HW_2_1_1_BOARD_DATA_FILE AR6003_HW_2_1_1_FW_DIR "/bdata.bin"
  142. #define AR6003_HW_2_1_1_DEFAULT_BOARD_DATA_FILE \
  143. AR6003_HW_2_1_1_FW_DIR "/bdata.SD31.bin"
  144. /* AR6004 1.0 definitions */
  145. #define AR6004_HW_1_0_VERSION 0x30000623
  146. #define AR6004_HW_1_0_FW_DIR "ath6k/AR6004/hw1.0"
  147. #define AR6004_HW_1_0_FIRMWARE_FILE "fw.ram.bin"
  148. #define AR6004_HW_1_0_BOARD_DATA_FILE AR6004_HW_1_0_FW_DIR "/bdata.bin"
  149. #define AR6004_HW_1_0_DEFAULT_BOARD_DATA_FILE \
  150. AR6004_HW_1_0_FW_DIR "/bdata.DB132.bin"
  151. /* AR6004 1.1 definitions */
  152. #define AR6004_HW_1_1_VERSION 0x30000001
  153. #define AR6004_HW_1_1_FW_DIR "ath6k/AR6004/hw1.1"
  154. #define AR6004_HW_1_1_FIRMWARE_FILE "fw.ram.bin"
  155. #define AR6004_HW_1_1_BOARD_DATA_FILE AR6004_HW_1_1_FW_DIR "/bdata.bin"
  156. #define AR6004_HW_1_1_DEFAULT_BOARD_DATA_FILE \
  157. AR6004_HW_1_1_FW_DIR "/bdata.DB132.bin"
  158. /* AR6004 1.2 definitions */
  159. #define AR6004_HW_1_2_VERSION 0x300007e8
  160. #define AR6004_HW_1_2_FW_DIR "ath6k/AR6004/hw1.2"
  161. #define AR6004_HW_1_2_FIRMWARE_FILE "fw.ram.bin"
  162. #define AR6004_HW_1_2_BOARD_DATA_FILE AR6004_HW_1_2_FW_DIR "/bdata.bin"
  163. #define AR6004_HW_1_2_DEFAULT_BOARD_DATA_FILE \
  164. AR6004_HW_1_2_FW_DIR "/bdata.bin"
  165. /* AR6004 1.3 definitions */
  166. #define AR6004_HW_1_3_VERSION 0x31c8088a
  167. #define AR6004_HW_1_3_FW_DIR "ath6k/AR6004/hw1.3"
  168. #define AR6004_HW_1_3_FIRMWARE_FILE "fw.ram.bin"
  169. #define AR6004_HW_1_3_BOARD_DATA_FILE "ath6k/AR6004/hw1.3/bdata.bin"
  170. #define AR6004_HW_1_3_DEFAULT_BOARD_DATA_FILE "ath6k/AR6004/hw1.3/bdata.bin"
  171. /* Per STA data, used in AP mode */
  172. #define STA_PS_AWAKE BIT(0)
  173. #define STA_PS_SLEEP BIT(1)
  174. #define STA_PS_POLLED BIT(2)
  175. #define STA_PS_APSD_TRIGGER BIT(3)
  176. #define STA_PS_APSD_EOSP BIT(4)
  177. /* HTC TX packet tagging definitions */
  178. #define ATH6KL_CONTROL_PKT_TAG HTC_TX_PACKET_TAG_USER_DEFINED
  179. #define ATH6KL_DATA_PKT_TAG (ATH6KL_CONTROL_PKT_TAG + 1)
  180. #define AR6003_CUST_DATA_SIZE 16
  181. #define AGGR_WIN_IDX(x, y) ((x) % (y))
  182. #define AGGR_INCR_IDX(x, y) AGGR_WIN_IDX(((x) + 1), (y))
  183. #define AGGR_DCRM_IDX(x, y) AGGR_WIN_IDX(((x) - 1), (y))
  184. #define ATH6KL_MAX_SEQ_NO 0xFFF
  185. #define ATH6KL_NEXT_SEQ_NO(x) (((x) + 1) & ATH6KL_MAX_SEQ_NO)
  186. #define NUM_OF_TIDS 8
  187. #define AGGR_SZ_DEFAULT 8
  188. #define AGGR_WIN_SZ_MIN 2
  189. #define AGGR_WIN_SZ_MAX 8
  190. #define TID_WINDOW_SZ(_x) ((_x) << 1)
  191. #define AGGR_NUM_OF_FREE_NETBUFS 16
  192. #define AGGR_RX_TIMEOUT 100 /* in ms */
  193. #define WMI_TIMEOUT (2 * HZ)
  194. #define MBOX_YIELD_LIMIT 99
  195. #define ATH6KL_DEFAULT_LISTEN_INTVAL 100 /* in TUs */
  196. #define ATH6KL_DEFAULT_BMISS_TIME 1500
  197. #define ATH6KL_MAX_WOW_LISTEN_INTL 300 /* in TUs */
  198. #define ATH6KL_MAX_BMISS_TIME 5000
  199. /* configuration lags */
  200. /*
  201. * ATH6KL_CONF_IGNORE_ERP_BARKER: Ignore the barker premable in
  202. * ERP IE of beacon to determine the short premable support when
  203. * sending (Re)Assoc req.
  204. * ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN: Don't send the power
  205. * module state transition failure events which happen during
  206. * scan, to the host.
  207. */
  208. #define ATH6KL_CONF_IGNORE_ERP_BARKER BIT(0)
  209. #define ATH6KL_CONF_IGNORE_PS_FAIL_EVT_IN_SCAN BIT(1)
  210. #define ATH6KL_CONF_ENABLE_11N BIT(2)
  211. #define ATH6KL_CONF_ENABLE_TX_BURST BIT(3)
  212. #define ATH6KL_CONF_UART_DEBUG BIT(4)
  213. #define P2P_WILDCARD_SSID_LEN 7 /* DIRECT- */
  214. enum wlan_low_pwr_state {
  215. WLAN_POWER_STATE_ON,
  216. WLAN_POWER_STATE_CUT_PWR,
  217. WLAN_POWER_STATE_DEEP_SLEEP,
  218. WLAN_POWER_STATE_WOW
  219. };
  220. enum sme_state {
  221. SME_DISCONNECTED,
  222. SME_CONNECTING,
  223. SME_CONNECTED
  224. };
  225. struct skb_hold_q {
  226. struct sk_buff *skb;
  227. bool is_amsdu;
  228. u16 seq_no;
  229. };
  230. struct rxtid {
  231. bool aggr;
  232. bool timer_mon;
  233. u16 win_sz;
  234. u16 seq_next;
  235. u32 hold_q_sz;
  236. struct skb_hold_q *hold_q;
  237. struct sk_buff_head q;
  238. /*
  239. * lock mainly protects seq_next and hold_q. Movement of seq_next
  240. * needs to be protected between aggr_timeout() and
  241. * aggr_process_recv_frm(). hold_q will be holding the pending
  242. * reorder frames and it's access should also be protected.
  243. * Some of the other fields like hold_q_sz, win_sz and aggr are
  244. * initialized/reset when receiving addba/delba req, also while
  245. * deleting aggr state all the pending buffers are flushed before
  246. * resetting these fields, so there should not be any race in accessing
  247. * these fields.
  248. */
  249. spinlock_t lock;
  250. };
  251. struct rxtid_stats {
  252. u32 num_into_aggr;
  253. u32 num_dups;
  254. u32 num_oow;
  255. u32 num_mpdu;
  256. u32 num_amsdu;
  257. u32 num_delivered;
  258. u32 num_timeouts;
  259. u32 num_hole;
  260. u32 num_bar;
  261. };
  262. struct aggr_info_conn {
  263. u8 aggr_sz;
  264. u8 timer_scheduled;
  265. struct timer_list timer;
  266. struct net_device *dev;
  267. struct rxtid rx_tid[NUM_OF_TIDS];
  268. struct rxtid_stats stat[NUM_OF_TIDS];
  269. struct aggr_info *aggr_info;
  270. };
  271. struct aggr_info {
  272. struct aggr_info_conn *aggr_conn;
  273. struct sk_buff_head rx_amsdu_freeq;
  274. };
  275. struct ath6kl_wep_key {
  276. u8 key_index;
  277. u8 key_len;
  278. u8 key[64];
  279. };
  280. #define ATH6KL_KEY_SEQ_LEN 8
  281. struct ath6kl_key {
  282. u8 key[WLAN_MAX_KEY_LEN];
  283. u8 key_len;
  284. u8 seq[ATH6KL_KEY_SEQ_LEN];
  285. u8 seq_len;
  286. u32 cipher;
  287. };
  288. struct ath6kl_node_mapping {
  289. u8 mac_addr[ETH_ALEN];
  290. u8 ep_id;
  291. u8 tx_pend;
  292. };
  293. struct ath6kl_cookie {
  294. struct sk_buff *skb;
  295. u32 map_no;
  296. struct htc_packet htc_pkt;
  297. struct ath6kl_cookie *arc_list_next;
  298. };
  299. struct ath6kl_mgmt_buff {
  300. struct list_head list;
  301. u32 freq;
  302. u32 wait;
  303. u32 id;
  304. bool no_cck;
  305. size_t len;
  306. u8 buf[0];
  307. };
  308. struct ath6kl_sta {
  309. u16 sta_flags;
  310. u8 mac[ETH_ALEN];
  311. u8 aid;
  312. u8 keymgmt;
  313. u8 ucipher;
  314. u8 auth;
  315. u8 wpa_ie[ATH6KL_MAX_IE];
  316. struct sk_buff_head psq;
  317. /* protects psq, mgmt_psq, apsdq, and mgmt_psq_len fields */
  318. spinlock_t psq_lock;
  319. struct list_head mgmt_psq;
  320. size_t mgmt_psq_len;
  321. u8 apsd_info;
  322. struct sk_buff_head apsdq;
  323. struct aggr_info_conn *aggr_conn;
  324. };
  325. struct ath6kl_version {
  326. u32 target_ver;
  327. u32 wlan_ver;
  328. u32 abi_ver;
  329. };
  330. struct ath6kl_bmi {
  331. u32 cmd_credits;
  332. bool done_sent;
  333. u8 *cmd_buf;
  334. u32 max_data_size;
  335. u32 max_cmd_size;
  336. };
  337. struct target_stats {
  338. u64 tx_pkt;
  339. u64 tx_byte;
  340. u64 tx_ucast_pkt;
  341. u64 tx_ucast_byte;
  342. u64 tx_mcast_pkt;
  343. u64 tx_mcast_byte;
  344. u64 tx_bcast_pkt;
  345. u64 tx_bcast_byte;
  346. u64 tx_rts_success_cnt;
  347. u64 tx_pkt_per_ac[4];
  348. u64 tx_err;
  349. u64 tx_fail_cnt;
  350. u64 tx_retry_cnt;
  351. u64 tx_mult_retry_cnt;
  352. u64 tx_rts_fail_cnt;
  353. u64 rx_pkt;
  354. u64 rx_byte;
  355. u64 rx_ucast_pkt;
  356. u64 rx_ucast_byte;
  357. u64 rx_mcast_pkt;
  358. u64 rx_mcast_byte;
  359. u64 rx_bcast_pkt;
  360. u64 rx_bcast_byte;
  361. u64 rx_frgment_pkt;
  362. u64 rx_err;
  363. u64 rx_crc_err;
  364. u64 rx_key_cache_miss;
  365. u64 rx_decrypt_err;
  366. u64 rx_dupl_frame;
  367. u64 tkip_local_mic_fail;
  368. u64 tkip_cnter_measures_invoked;
  369. u64 tkip_replays;
  370. u64 tkip_fmt_err;
  371. u64 ccmp_fmt_err;
  372. u64 ccmp_replays;
  373. u64 pwr_save_fail_cnt;
  374. u64 cs_bmiss_cnt;
  375. u64 cs_low_rssi_cnt;
  376. u64 cs_connect_cnt;
  377. u64 cs_discon_cnt;
  378. s32 tx_ucast_rate;
  379. s32 rx_ucast_rate;
  380. u32 lq_val;
  381. u32 wow_pkt_dropped;
  382. u16 wow_evt_discarded;
  383. s16 noise_floor_calib;
  384. s16 cs_rssi;
  385. s16 cs_ave_beacon_rssi;
  386. u8 cs_ave_beacon_snr;
  387. u8 cs_last_roam_msec;
  388. u8 cs_snr;
  389. u8 wow_host_pkt_wakeups;
  390. u8 wow_host_evt_wakeups;
  391. u32 arp_received;
  392. u32 arp_matched;
  393. u32 arp_replied;
  394. };
  395. struct ath6kl_mbox_info {
  396. u32 htc_addr;
  397. u32 htc_ext_addr;
  398. u32 htc_ext_sz;
  399. u32 block_size;
  400. u32 gmbox_addr;
  401. u32 gmbox_sz;
  402. };
  403. /*
  404. * 802.11i defines an extended IV for use with non-WEP ciphers.
  405. * When the EXTIV bit is set in the key id byte an additional
  406. * 4 bytes immediately follow the IV for TKIP. For CCMP the
  407. * EXTIV bit is likewise set but the 8 bytes represent the
  408. * CCMP header rather than IV+extended-IV.
  409. */
  410. #define ATH6KL_KEYBUF_SIZE 16
  411. #define ATH6KL_MICBUF_SIZE (8+8) /* space for both tx and rx */
  412. #define ATH6KL_KEY_XMIT 0x01
  413. #define ATH6KL_KEY_RECV 0x02
  414. #define ATH6KL_KEY_DEFAULT 0x80 /* default xmit key */
  415. /* Initial group key for AP mode */
  416. struct ath6kl_req_key {
  417. bool valid;
  418. u8 key_index;
  419. int key_type;
  420. u8 key[WLAN_MAX_KEY_LEN];
  421. u8 key_len;
  422. };
  423. enum ath6kl_hif_type {
  424. ATH6KL_HIF_TYPE_SDIO,
  425. ATH6KL_HIF_TYPE_USB,
  426. };
  427. enum ath6kl_htc_type {
  428. ATH6KL_HTC_TYPE_MBOX,
  429. ATH6KL_HTC_TYPE_PIPE,
  430. };
  431. /* Max number of filters that hw supports */
  432. #define ATH6K_MAX_MC_FILTERS_PER_LIST 7
  433. struct ath6kl_mc_filter {
  434. struct list_head list;
  435. char hw_addr[ATH6KL_MCAST_FILTER_MAC_ADDR_SIZE];
  436. };
  437. struct ath6kl_htcap {
  438. bool ht_enable;
  439. u8 ampdu_factor;
  440. unsigned short cap_info;
  441. };
  442. /*
  443. * Driver's maximum limit, note that some firmwares support only one vif
  444. * and the runtime (current) limit must be checked from ar->vif_max.
  445. */
  446. #define ATH6KL_VIF_MAX 3
  447. /* vif flags info */
  448. enum ath6kl_vif_state {
  449. CONNECTED,
  450. CONNECT_PEND,
  451. WMM_ENABLED,
  452. NETQ_STOPPED,
  453. DTIM_EXPIRED,
  454. NETDEV_REGISTERED,
  455. CLEAR_BSSFILTER_ON_BEACON,
  456. DTIM_PERIOD_AVAIL,
  457. WLAN_ENABLED,
  458. STATS_UPDATE_PEND,
  459. HOST_SLEEP_MODE_CMD_PROCESSED,
  460. NETDEV_MCAST_ALL_ON,
  461. NETDEV_MCAST_ALL_OFF,
  462. };
  463. struct ath6kl_vif {
  464. struct list_head list;
  465. struct wireless_dev wdev;
  466. struct net_device *ndev;
  467. struct ath6kl *ar;
  468. /* Lock to protect vif specific net_stats and flags */
  469. spinlock_t if_lock;
  470. u8 fw_vif_idx;
  471. unsigned long flags;
  472. int ssid_len;
  473. u8 ssid[IEEE80211_MAX_SSID_LEN];
  474. u8 dot11_auth_mode;
  475. u8 auth_mode;
  476. u8 prwise_crypto;
  477. u8 prwise_crypto_len;
  478. u8 grp_crypto;
  479. u8 grp_crypto_len;
  480. u8 def_txkey_index;
  481. u8 next_mode;
  482. u8 nw_type;
  483. u8 bssid[ETH_ALEN];
  484. u8 req_bssid[ETH_ALEN];
  485. u16 ch_hint;
  486. u16 bss_ch;
  487. struct ath6kl_wep_key wep_key_list[WMI_MAX_KEY_INDEX + 1];
  488. struct ath6kl_key keys[WMI_MAX_KEY_INDEX + 1];
  489. struct aggr_info *aggr_cntxt;
  490. struct ath6kl_htcap htcap[IEEE80211_NUM_BANDS];
  491. struct timer_list disconnect_timer;
  492. struct timer_list sched_scan_timer;
  493. struct cfg80211_scan_request *scan_req;
  494. enum sme_state sme_state;
  495. int reconnect_flag;
  496. u32 last_roc_id;
  497. u32 last_cancel_roc_id;
  498. u32 send_action_id;
  499. bool probe_req_report;
  500. u16 assoc_bss_beacon_int;
  501. u16 listen_intvl_t;
  502. u16 bmiss_time_t;
  503. u32 txe_intvl;
  504. u16 bg_scan_period;
  505. u8 assoc_bss_dtim_period;
  506. struct net_device_stats net_stats;
  507. struct target_stats target_stats;
  508. struct wmi_connect_cmd profile;
  509. struct list_head mc_filter;
  510. };
  511. static inline struct ath6kl_vif *ath6kl_vif_from_wdev(struct wireless_dev *wdev)
  512. {
  513. return container_of(wdev, struct ath6kl_vif, wdev);
  514. }
  515. #define WOW_LIST_ID 0
  516. #define WOW_HOST_REQ_DELAY 500 /* ms */
  517. #define ATH6KL_SCHED_SCAN_RESULT_DELAY 5000 /* ms */
  518. /* Flag info */
  519. enum ath6kl_dev_state {
  520. WMI_ENABLED,
  521. WMI_READY,
  522. WMI_CTRL_EP_FULL,
  523. TESTMODE,
  524. DESTROY_IN_PROGRESS,
  525. SKIP_SCAN,
  526. ROAM_TBL_PEND,
  527. FIRST_BOOT,
  528. };
  529. enum ath6kl_state {
  530. ATH6KL_STATE_OFF,
  531. ATH6KL_STATE_ON,
  532. ATH6KL_STATE_SUSPENDING,
  533. ATH6KL_STATE_RESUMING,
  534. ATH6KL_STATE_DEEPSLEEP,
  535. ATH6KL_STATE_CUTPOWER,
  536. ATH6KL_STATE_WOW,
  537. ATH6KL_STATE_SCHED_SCAN,
  538. };
  539. struct ath6kl {
  540. struct device *dev;
  541. struct wiphy *wiphy;
  542. enum ath6kl_state state;
  543. unsigned int testmode;
  544. struct ath6kl_bmi bmi;
  545. const struct ath6kl_hif_ops *hif_ops;
  546. const struct ath6kl_htc_ops *htc_ops;
  547. struct wmi *wmi;
  548. int tx_pending[ENDPOINT_MAX];
  549. int total_tx_data_pend;
  550. struct htc_target *htc_target;
  551. enum ath6kl_hif_type hif_type;
  552. void *hif_priv;
  553. struct list_head vif_list;
  554. /* Lock to avoid race in vif_list entries among add/del/traverse */
  555. spinlock_t list_lock;
  556. u8 num_vif;
  557. unsigned int vif_max;
  558. u8 max_norm_iface;
  559. u8 avail_idx_map;
  560. /*
  561. * Protects at least amsdu_rx_buffer_queue, ath6kl_alloc_cookie()
  562. * calls, tx_pending and total_tx_data_pend.
  563. */
  564. spinlock_t lock;
  565. struct semaphore sem;
  566. u8 lrssi_roam_threshold;
  567. struct ath6kl_version version;
  568. u32 target_type;
  569. u8 tx_pwr;
  570. struct ath6kl_node_mapping node_map[MAX_NODE_NUM];
  571. u8 ibss_ps_enable;
  572. bool ibss_if_active;
  573. u8 node_num;
  574. u8 next_ep_id;
  575. struct ath6kl_cookie *cookie_list;
  576. u32 cookie_count;
  577. enum htc_endpoint_id ac2ep_map[WMM_NUM_AC];
  578. bool ac_stream_active[WMM_NUM_AC];
  579. u8 ac_stream_pri_map[WMM_NUM_AC];
  580. u8 hiac_stream_active_pri;
  581. u8 ep2ac_map[ENDPOINT_MAX];
  582. enum htc_endpoint_id ctrl_ep;
  583. struct ath6kl_htc_credit_info credit_state_info;
  584. u32 connect_ctrl_flags;
  585. u32 user_key_ctrl;
  586. u8 usr_bss_filter;
  587. struct ath6kl_sta sta_list[AP_MAX_NUM_STA];
  588. u8 sta_list_index;
  589. struct ath6kl_req_key ap_mode_bkey;
  590. struct sk_buff_head mcastpsq;
  591. u32 want_ch_switch;
  592. /*
  593. * FIXME: protects access to mcastpsq but is actually useless as
  594. * all skbe_queue_*() functions provide serialisation themselves
  595. */
  596. spinlock_t mcastpsq_lock;
  597. u8 intra_bss;
  598. struct wmi_ap_mode_stat ap_stats;
  599. u8 ap_country_code[3];
  600. struct list_head amsdu_rx_buffer_queue;
  601. u8 rx_meta_ver;
  602. enum wlan_low_pwr_state wlan_pwr_state;
  603. u8 mac_addr[ETH_ALEN];
  604. #define AR_MCAST_FILTER_MAC_ADDR_SIZE 4
  605. struct {
  606. void *rx_report;
  607. size_t rx_report_len;
  608. } tm;
  609. struct ath6kl_hw {
  610. u32 id;
  611. const char *name;
  612. u32 dataset_patch_addr;
  613. u32 app_load_addr;
  614. u32 app_start_override_addr;
  615. u32 board_ext_data_addr;
  616. u32 reserved_ram_size;
  617. u32 board_addr;
  618. u32 refclk_hz;
  619. u32 uarttx_pin;
  620. u32 testscript_addr;
  621. enum wmi_phy_cap cap;
  622. u32 flags;
  623. struct ath6kl_hw_fw {
  624. const char *dir;
  625. const char *otp;
  626. const char *fw;
  627. const char *tcmd;
  628. const char *patch;
  629. const char *utf;
  630. const char *testscript;
  631. } fw;
  632. const char *fw_board;
  633. const char *fw_default_board;
  634. } hw;
  635. u16 conf_flags;
  636. u16 suspend_mode;
  637. u16 wow_suspend_mode;
  638. wait_queue_head_t event_wq;
  639. struct ath6kl_mbox_info mbox_info;
  640. struct ath6kl_cookie cookie_mem[MAX_COOKIE_NUM];
  641. unsigned long flag;
  642. u8 *fw_board;
  643. size_t fw_board_len;
  644. u8 *fw_otp;
  645. size_t fw_otp_len;
  646. u8 *fw;
  647. size_t fw_len;
  648. u8 *fw_patch;
  649. size_t fw_patch_len;
  650. u8 *fw_testscript;
  651. size_t fw_testscript_len;
  652. unsigned int fw_api;
  653. unsigned long fw_capabilities[ATH6KL_CAPABILITY_LEN];
  654. struct workqueue_struct *ath6kl_wq;
  655. struct dentry *debugfs_phy;
  656. bool p2p;
  657. bool wiphy_registered;
  658. #ifdef CONFIG_ATH6KL_DEBUG
  659. struct {
  660. struct sk_buff_head fwlog_queue;
  661. struct completion fwlog_completion;
  662. bool fwlog_open;
  663. u32 fwlog_mask;
  664. unsigned int dbgfs_diag_reg;
  665. u32 diag_reg_addr_wr;
  666. u32 diag_reg_val_wr;
  667. struct {
  668. unsigned int invalid_rate;
  669. } war_stats;
  670. u8 *roam_tbl;
  671. unsigned int roam_tbl_len;
  672. u8 keepalive;
  673. u8 disc_timeout;
  674. } debug;
  675. #endif /* CONFIG_ATH6KL_DEBUG */
  676. };
  677. static inline struct ath6kl *ath6kl_priv(struct net_device *dev)
  678. {
  679. return ((struct ath6kl_vif *) netdev_priv(dev))->ar;
  680. }
  681. static inline u32 ath6kl_get_hi_item_addr(struct ath6kl *ar,
  682. u32 item_offset)
  683. {
  684. u32 addr = 0;
  685. if (ar->target_type == TARGET_TYPE_AR6003)
  686. addr = ATH6KL_AR6003_HI_START_ADDR + item_offset;
  687. else if (ar->target_type == TARGET_TYPE_AR6004)
  688. addr = ATH6KL_AR6004_HI_START_ADDR + item_offset;
  689. return addr;
  690. }
  691. int ath6kl_configure_target(struct ath6kl *ar);
  692. void ath6kl_detect_error(unsigned long ptr);
  693. void disconnect_timer_handler(unsigned long ptr);
  694. void init_netdev(struct net_device *dev);
  695. void ath6kl_cookie_init(struct ath6kl *ar);
  696. void ath6kl_cookie_cleanup(struct ath6kl *ar);
  697. void ath6kl_rx(struct htc_target *target, struct htc_packet *packet);
  698. void ath6kl_tx_complete(struct htc_target *context,
  699. struct list_head *packet_queue);
  700. enum htc_send_full_action ath6kl_tx_queue_full(struct htc_target *target,
  701. struct htc_packet *packet);
  702. void ath6kl_stop_txrx(struct ath6kl *ar);
  703. void ath6kl_cleanup_amsdu_rxbufs(struct ath6kl *ar);
  704. int ath6kl_diag_write32(struct ath6kl *ar, u32 address, __le32 value);
  705. int ath6kl_diag_write(struct ath6kl *ar, u32 address, void *data, u32 length);
  706. int ath6kl_diag_read32(struct ath6kl *ar, u32 address, u32 *value);
  707. int ath6kl_diag_read(struct ath6kl *ar, u32 address, void *data, u32 length);
  708. int ath6kl_read_fwlogs(struct ath6kl *ar);
  709. void ath6kl_init_profile_info(struct ath6kl_vif *vif);
  710. void ath6kl_tx_data_cleanup(struct ath6kl *ar);
  711. struct ath6kl_cookie *ath6kl_alloc_cookie(struct ath6kl *ar);
  712. void ath6kl_free_cookie(struct ath6kl *ar, struct ath6kl_cookie *cookie);
  713. int ath6kl_data_tx(struct sk_buff *skb, struct net_device *dev);
  714. struct aggr_info *aggr_init(struct ath6kl_vif *vif);
  715. void aggr_conn_init(struct ath6kl_vif *vif, struct aggr_info *aggr_info,
  716. struct aggr_info_conn *aggr_conn);
  717. void ath6kl_rx_refill(struct htc_target *target,
  718. enum htc_endpoint_id endpoint);
  719. void ath6kl_refill_amsdu_rxbufs(struct ath6kl *ar, int count);
  720. struct htc_packet *ath6kl_alloc_amsdu_rxbuf(struct htc_target *target,
  721. enum htc_endpoint_id endpoint,
  722. int len);
  723. void aggr_module_destroy(struct aggr_info *aggr_info);
  724. void aggr_reset_state(struct aggr_info_conn *aggr_conn);
  725. struct ath6kl_sta *ath6kl_find_sta(struct ath6kl_vif *vif, u8 *node_addr);
  726. struct ath6kl_sta *ath6kl_find_sta_by_aid(struct ath6kl *ar, u8 aid);
  727. void ath6kl_ready_event(void *devt, u8 *datap, u32 sw_ver, u32 abi_ver,
  728. enum wmi_phy_cap cap);
  729. int ath6kl_control_tx(void *devt, struct sk_buff *skb,
  730. enum htc_endpoint_id eid);
  731. void ath6kl_connect_event(struct ath6kl_vif *vif, u16 channel,
  732. u8 *bssid, u16 listen_int,
  733. u16 beacon_int, enum network_type net_type,
  734. u8 beacon_ie_len, u8 assoc_req_len,
  735. u8 assoc_resp_len, u8 *assoc_info);
  736. void ath6kl_connect_ap_mode_bss(struct ath6kl_vif *vif, u16 channel);
  737. void ath6kl_connect_ap_mode_sta(struct ath6kl_vif *vif, u16 aid, u8 *mac_addr,
  738. u8 keymgmt, u8 ucipher, u8 auth,
  739. u8 assoc_req_len, u8 *assoc_info, u8 apsd_info);
  740. void ath6kl_disconnect_event(struct ath6kl_vif *vif, u8 reason,
  741. u8 *bssid, u8 assoc_resp_len,
  742. u8 *assoc_info, u16 prot_reason_status);
  743. void ath6kl_tkip_micerr_event(struct ath6kl_vif *vif, u8 keyid, bool ismcast);
  744. void ath6kl_txpwr_rx_evt(void *devt, u8 tx_pwr);
  745. void ath6kl_scan_complete_evt(struct ath6kl_vif *vif, int status);
  746. void ath6kl_tgt_stats_event(struct ath6kl_vif *vif, u8 *ptr, u32 len);
  747. void ath6kl_indicate_tx_activity(void *devt, u8 traffic_class, bool active);
  748. enum htc_endpoint_id ath6kl_ac2_endpoint_id(void *devt, u8 ac);
  749. void ath6kl_pspoll_event(struct ath6kl_vif *vif, u8 aid);
  750. void ath6kl_dtimexpiry_event(struct ath6kl_vif *vif);
  751. void ath6kl_disconnect(struct ath6kl_vif *vif);
  752. void aggr_recv_delba_req_evt(struct ath6kl_vif *vif, u8 tid);
  753. void aggr_recv_addba_req_evt(struct ath6kl_vif *vif, u8 tid, u16 seq_no,
  754. u8 win_sz);
  755. void ath6kl_wakeup_event(void *dev);
  756. void ath6kl_reset_device(struct ath6kl *ar, u32 target_type,
  757. bool wait_fot_compltn, bool cold_reset);
  758. void ath6kl_init_control_info(struct ath6kl_vif *vif);
  759. struct ath6kl_vif *ath6kl_vif_first(struct ath6kl *ar);
  760. void ath6kl_cleanup_vif(struct ath6kl_vif *vif, bool wmi_ready);
  761. int ath6kl_init_hw_start(struct ath6kl *ar);
  762. int ath6kl_init_hw_stop(struct ath6kl *ar);
  763. int ath6kl_init_fetch_firmwares(struct ath6kl *ar);
  764. int ath6kl_init_hw_params(struct ath6kl *ar);
  765. void ath6kl_check_wow_status(struct ath6kl *ar);
  766. void ath6kl_core_tx_complete(struct ath6kl *ar, struct sk_buff *skb);
  767. void ath6kl_core_rx_complete(struct ath6kl *ar, struct sk_buff *skb, u8 pipe);
  768. struct ath6kl *ath6kl_core_create(struct device *dev);
  769. int ath6kl_core_init(struct ath6kl *ar, enum ath6kl_htc_type htc_type);
  770. void ath6kl_core_cleanup(struct ath6kl *ar);
  771. void ath6kl_core_destroy(struct ath6kl *ar);
  772. #endif /* CORE_H */