budget-ci.c 31 KB

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  1. /*
  2. * budget-ci.c: driver for the SAA7146 based Budget DVB cards
  3. *
  4. * Compiled from various sources by Michael Hunold <michael@mihu.de>
  5. *
  6. * msp430 IR support contributed by Jack Thomasson <jkt@Helius.COM>
  7. * partially based on the Siemens DVB driver by Ralph+Marcus Metzler
  8. *
  9. * CI interface support (c) 2004 Andrew de Quincey <adq_dvb@lidskialf.net>
  10. *
  11. * This program is free software; you can redistribute it and/or
  12. * modify it under the terms of the GNU General Public License
  13. * as published by the Free Software Foundation; either version 2
  14. * of the License, or (at your option) any later version.
  15. *
  16. *
  17. * This program is distributed in the hope that it will be useful,
  18. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  19. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  20. * GNU General Public License for more details.
  21. *
  22. *
  23. * You should have received a copy of the GNU General Public License
  24. * along with this program; if not, write to the Free Software
  25. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  26. * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
  27. *
  28. *
  29. * the project's page is at http://www.linuxtv.org/dvb/
  30. */
  31. #include "budget.h"
  32. #include <linux/module.h>
  33. #include <linux/errno.h>
  34. #include <linux/slab.h>
  35. #include <linux/interrupt.h>
  36. #include <linux/input.h>
  37. #include <linux/spinlock.h>
  38. #include "dvb_ca_en50221.h"
  39. #include "stv0299.h"
  40. #include "stv0297.h"
  41. #include "tda1004x.h"
  42. #include "lnbp21.h"
  43. #include "bsbe1.h"
  44. #include "bsru6.h"
  45. /*
  46. * Regarding DEBIADDR_IR:
  47. * Some CI modules hang if random addresses are read.
  48. * Using address 0x4000 for the IR read means that we
  49. * use the same address as for CI version, which should
  50. * be a safe default.
  51. */
  52. #define DEBIADDR_IR 0x4000
  53. #define DEBIADDR_CICONTROL 0x0000
  54. #define DEBIADDR_CIVERSION 0x4000
  55. #define DEBIADDR_IO 0x1000
  56. #define DEBIADDR_ATTR 0x3000
  57. #define CICONTROL_RESET 0x01
  58. #define CICONTROL_ENABLETS 0x02
  59. #define CICONTROL_CAMDETECT 0x08
  60. #define DEBICICTL 0x00420000
  61. #define DEBICICAM 0x02420000
  62. #define SLOTSTATUS_NONE 1
  63. #define SLOTSTATUS_PRESENT 2
  64. #define SLOTSTATUS_RESET 4
  65. #define SLOTSTATUS_READY 8
  66. #define SLOTSTATUS_OCCUPIED (SLOTSTATUS_PRESENT|SLOTSTATUS_RESET|SLOTSTATUS_READY)
  67. struct budget_ci {
  68. struct budget budget;
  69. struct input_dev *input_dev;
  70. struct tasklet_struct msp430_irq_tasklet;
  71. struct tasklet_struct ciintf_irq_tasklet;
  72. int slot_status;
  73. int ci_irq;
  74. struct dvb_ca_en50221 ca;
  75. char ir_dev_name[50];
  76. u8 tuner_pll_address; /* used for philips_tdm1316l configs */
  77. };
  78. /* from reading the following remotes:
  79. Zenith Universal 7 / TV Mode 807 / VCR Mode 837
  80. Hauppauge (from NOVA-CI-s box product)
  81. i've taken a "middle of the road" approach and note the differences
  82. */
  83. static u16 key_map[64] = {
  84. /* 0x0X */
  85. KEY_0, KEY_1, KEY_2, KEY_3, KEY_4, KEY_5, KEY_6, KEY_7, KEY_8,
  86. KEY_9,
  87. KEY_ENTER,
  88. KEY_RED,
  89. KEY_POWER, /* RADIO on Hauppauge */
  90. KEY_MUTE,
  91. 0,
  92. KEY_A, /* TV on Hauppauge */
  93. /* 0x1X */
  94. KEY_VOLUMEUP, KEY_VOLUMEDOWN,
  95. 0, 0,
  96. KEY_B,
  97. 0, 0, 0, 0, 0, 0, 0,
  98. KEY_UP, KEY_DOWN,
  99. KEY_OPTION, /* RESERVED on Hauppauge */
  100. KEY_BREAK,
  101. /* 0x2X */
  102. KEY_CHANNELUP, KEY_CHANNELDOWN,
  103. KEY_PREVIOUS, /* Prev. Ch on Zenith, SOURCE on Hauppauge */
  104. 0, KEY_RESTART, KEY_OK,
  105. KEY_CYCLEWINDOWS, /* MINIMIZE on Hauppauge */
  106. 0,
  107. KEY_ENTER, /* VCR mode on Zenith */
  108. KEY_PAUSE,
  109. 0,
  110. KEY_RIGHT, KEY_LEFT,
  111. 0,
  112. KEY_MENU, /* FULL SCREEN on Hauppauge */
  113. 0,
  114. /* 0x3X */
  115. KEY_SLOW,
  116. KEY_PREVIOUS, /* VCR mode on Zenith */
  117. KEY_REWIND,
  118. 0,
  119. KEY_FASTFORWARD,
  120. KEY_PLAY, KEY_STOP,
  121. KEY_RECORD,
  122. KEY_TUNER, /* TV/VCR on Zenith */
  123. 0,
  124. KEY_C,
  125. 0,
  126. KEY_EXIT,
  127. KEY_POWER2,
  128. KEY_TUNER, /* VCR mode on Zenith */
  129. 0,
  130. };
  131. static void msp430_ir_debounce(unsigned long data)
  132. {
  133. struct input_dev *dev = (struct input_dev *) data;
  134. if (dev->rep[0] == 0 || dev->rep[0] == ~0) {
  135. input_event(dev, EV_KEY, key_map[dev->repeat_key], !!0);
  136. return;
  137. }
  138. dev->rep[0] = 0;
  139. dev->timer.expires = jiffies + HZ * 350 / 1000;
  140. add_timer(&dev->timer);
  141. input_event(dev, EV_KEY, key_map[dev->repeat_key], 2); /* REPEAT */
  142. }
  143. static void msp430_ir_interrupt(unsigned long data)
  144. {
  145. struct budget_ci *budget_ci = (struct budget_ci *) data;
  146. struct input_dev *dev = budget_ci->input_dev;
  147. unsigned int code =
  148. ttpci_budget_debiread(&budget_ci->budget, DEBINOSWAP, DEBIADDR_IR, 2, 1, 0) >> 8;
  149. if (code & 0x40) {
  150. code &= 0x3f;
  151. if (timer_pending(&dev->timer)) {
  152. if (code == dev->repeat_key) {
  153. ++dev->rep[0];
  154. return;
  155. }
  156. del_timer(&dev->timer);
  157. input_event(dev, EV_KEY, key_map[dev->repeat_key], !!0);
  158. }
  159. if (!key_map[code]) {
  160. printk("DVB (%s): no key for %02x!\n", __FUNCTION__, code);
  161. return;
  162. }
  163. /* initialize debounce and repeat */
  164. dev->repeat_key = code;
  165. /* Zenith remote _always_ sends 2 sequences */
  166. dev->rep[0] = ~0;
  167. /* 350 milliseconds */
  168. dev->timer.expires = jiffies + HZ * 350 / 1000;
  169. /* MAKE */
  170. input_event(dev, EV_KEY, key_map[code], !0);
  171. add_timer(&dev->timer);
  172. }
  173. }
  174. static int msp430_ir_init(struct budget_ci *budget_ci)
  175. {
  176. struct saa7146_dev *saa = budget_ci->budget.dev;
  177. struct input_dev *input_dev;
  178. int i;
  179. budget_ci->input_dev = input_dev = input_allocate_device();
  180. if (!input_dev)
  181. return -ENOMEM;
  182. sprintf(budget_ci->ir_dev_name, "Budget-CI dvb ir receiver %s", saa->name);
  183. input_dev->name = budget_ci->ir_dev_name;
  184. set_bit(EV_KEY, input_dev->evbit);
  185. for (i = 0; i < ARRAY_SIZE(key_map); i++)
  186. if (key_map[i])
  187. set_bit(key_map[i], input_dev->keybit);
  188. input_register_device(budget_ci->input_dev);
  189. input_dev->timer.function = msp430_ir_debounce;
  190. saa7146_write(saa, IER, saa7146_read(saa, IER) | MASK_06);
  191. saa7146_setgpio(saa, 3, SAA7146_GPIO_IRQHI);
  192. return 0;
  193. }
  194. static void msp430_ir_deinit(struct budget_ci *budget_ci)
  195. {
  196. struct saa7146_dev *saa = budget_ci->budget.dev;
  197. struct input_dev *dev = budget_ci->input_dev;
  198. saa7146_write(saa, IER, saa7146_read(saa, IER) & ~MASK_06);
  199. saa7146_setgpio(saa, 3, SAA7146_GPIO_INPUT);
  200. if (del_timer(&dev->timer))
  201. input_event(dev, EV_KEY, key_map[dev->repeat_key], !!0);
  202. input_unregister_device(dev);
  203. }
  204. static int ciintf_read_attribute_mem(struct dvb_ca_en50221 *ca, int slot, int address)
  205. {
  206. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  207. if (slot != 0)
  208. return -EINVAL;
  209. return ttpci_budget_debiread(&budget_ci->budget, DEBICICAM,
  210. DEBIADDR_ATTR | (address & 0xfff), 1, 1, 0);
  211. }
  212. static int ciintf_write_attribute_mem(struct dvb_ca_en50221 *ca, int slot, int address, u8 value)
  213. {
  214. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  215. if (slot != 0)
  216. return -EINVAL;
  217. return ttpci_budget_debiwrite(&budget_ci->budget, DEBICICAM,
  218. DEBIADDR_ATTR | (address & 0xfff), 1, value, 1, 0);
  219. }
  220. static int ciintf_read_cam_control(struct dvb_ca_en50221 *ca, int slot, u8 address)
  221. {
  222. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  223. if (slot != 0)
  224. return -EINVAL;
  225. return ttpci_budget_debiread(&budget_ci->budget, DEBICICAM,
  226. DEBIADDR_IO | (address & 3), 1, 1, 0);
  227. }
  228. static int ciintf_write_cam_control(struct dvb_ca_en50221 *ca, int slot, u8 address, u8 value)
  229. {
  230. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  231. if (slot != 0)
  232. return -EINVAL;
  233. return ttpci_budget_debiwrite(&budget_ci->budget, DEBICICAM,
  234. DEBIADDR_IO | (address & 3), 1, value, 1, 0);
  235. }
  236. static int ciintf_slot_reset(struct dvb_ca_en50221 *ca, int slot)
  237. {
  238. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  239. struct saa7146_dev *saa = budget_ci->budget.dev;
  240. if (slot != 0)
  241. return -EINVAL;
  242. if (budget_ci->ci_irq) {
  243. // trigger on RISING edge during reset so we know when READY is re-asserted
  244. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI);
  245. }
  246. budget_ci->slot_status = SLOTSTATUS_RESET;
  247. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 0, 1, 0);
  248. msleep(1);
  249. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  250. CICONTROL_RESET, 1, 0);
  251. saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTHI);
  252. ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTB);
  253. return 0;
  254. }
  255. static int ciintf_slot_shutdown(struct dvb_ca_en50221 *ca, int slot)
  256. {
  257. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  258. struct saa7146_dev *saa = budget_ci->budget.dev;
  259. if (slot != 0)
  260. return -EINVAL;
  261. saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTHI);
  262. ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTB);
  263. return 0;
  264. }
  265. static int ciintf_slot_ts_enable(struct dvb_ca_en50221 *ca, int slot)
  266. {
  267. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  268. struct saa7146_dev *saa = budget_ci->budget.dev;
  269. int tmp;
  270. if (slot != 0)
  271. return -EINVAL;
  272. saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTLO);
  273. tmp = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  274. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  275. tmp | CICONTROL_ENABLETS, 1, 0);
  276. ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTA);
  277. return 0;
  278. }
  279. static void ciintf_interrupt(unsigned long data)
  280. {
  281. struct budget_ci *budget_ci = (struct budget_ci *) data;
  282. struct saa7146_dev *saa = budget_ci->budget.dev;
  283. unsigned int flags;
  284. // ensure we don't get spurious IRQs during initialisation
  285. if (!budget_ci->budget.ci_present)
  286. return;
  287. // read the CAM status
  288. flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  289. if (flags & CICONTROL_CAMDETECT) {
  290. // GPIO should be set to trigger on falling edge if a CAM is present
  291. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQLO);
  292. if (budget_ci->slot_status & SLOTSTATUS_NONE) {
  293. // CAM insertion IRQ
  294. budget_ci->slot_status = SLOTSTATUS_PRESENT;
  295. dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0,
  296. DVB_CA_EN50221_CAMCHANGE_INSERTED);
  297. } else if (budget_ci->slot_status & SLOTSTATUS_RESET) {
  298. // CAM ready (reset completed)
  299. budget_ci->slot_status = SLOTSTATUS_READY;
  300. dvb_ca_en50221_camready_irq(&budget_ci->ca, 0);
  301. } else if (budget_ci->slot_status & SLOTSTATUS_READY) {
  302. // FR/DA IRQ
  303. dvb_ca_en50221_frda_irq(&budget_ci->ca, 0);
  304. }
  305. } else {
  306. // trigger on rising edge if a CAM is not present - when a CAM is inserted, we
  307. // only want to get the IRQ when it sets READY. If we trigger on the falling edge,
  308. // the CAM might not actually be ready yet.
  309. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI);
  310. // generate a CAM removal IRQ if we haven't already
  311. if (budget_ci->slot_status & SLOTSTATUS_OCCUPIED) {
  312. // CAM removal IRQ
  313. budget_ci->slot_status = SLOTSTATUS_NONE;
  314. dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0,
  315. DVB_CA_EN50221_CAMCHANGE_REMOVED);
  316. }
  317. }
  318. }
  319. static int ciintf_poll_slot_status(struct dvb_ca_en50221 *ca, int slot, int open)
  320. {
  321. struct budget_ci *budget_ci = (struct budget_ci *) ca->data;
  322. unsigned int flags;
  323. // ensure we don't get spurious IRQs during initialisation
  324. if (!budget_ci->budget.ci_present)
  325. return -EINVAL;
  326. // read the CAM status
  327. flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  328. if (flags & CICONTROL_CAMDETECT) {
  329. // mark it as present if it wasn't before
  330. if (budget_ci->slot_status & SLOTSTATUS_NONE) {
  331. budget_ci->slot_status = SLOTSTATUS_PRESENT;
  332. }
  333. // during a RESET, we check if we can read from IO memory to see when CAM is ready
  334. if (budget_ci->slot_status & SLOTSTATUS_RESET) {
  335. if (ciintf_read_attribute_mem(ca, slot, 0) == 0x1d) {
  336. budget_ci->slot_status = SLOTSTATUS_READY;
  337. }
  338. }
  339. } else {
  340. budget_ci->slot_status = SLOTSTATUS_NONE;
  341. }
  342. if (budget_ci->slot_status != SLOTSTATUS_NONE) {
  343. if (budget_ci->slot_status & SLOTSTATUS_READY) {
  344. return DVB_CA_EN50221_POLL_CAM_PRESENT | DVB_CA_EN50221_POLL_CAM_READY;
  345. }
  346. return DVB_CA_EN50221_POLL_CAM_PRESENT;
  347. }
  348. return 0;
  349. }
  350. static int ciintf_init(struct budget_ci *budget_ci)
  351. {
  352. struct saa7146_dev *saa = budget_ci->budget.dev;
  353. int flags;
  354. int result;
  355. int ci_version;
  356. int ca_flags;
  357. memset(&budget_ci->ca, 0, sizeof(struct dvb_ca_en50221));
  358. // enable DEBI pins
  359. saa7146_write(saa, MC1, saa7146_read(saa, MC1) | (0x800 << 16) | 0x800);
  360. // test if it is there
  361. ci_version = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CIVERSION, 1, 1, 0);
  362. if ((ci_version & 0xa0) != 0xa0) {
  363. result = -ENODEV;
  364. goto error;
  365. }
  366. // determine whether a CAM is present or not
  367. flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0);
  368. budget_ci->slot_status = SLOTSTATUS_NONE;
  369. if (flags & CICONTROL_CAMDETECT)
  370. budget_ci->slot_status = SLOTSTATUS_PRESENT;
  371. // version 0xa2 of the CI firmware doesn't generate interrupts
  372. if (ci_version == 0xa2) {
  373. ca_flags = 0;
  374. budget_ci->ci_irq = 0;
  375. } else {
  376. ca_flags = DVB_CA_EN50221_FLAG_IRQ_CAMCHANGE |
  377. DVB_CA_EN50221_FLAG_IRQ_FR |
  378. DVB_CA_EN50221_FLAG_IRQ_DA;
  379. budget_ci->ci_irq = 1;
  380. }
  381. // register CI interface
  382. budget_ci->ca.owner = THIS_MODULE;
  383. budget_ci->ca.read_attribute_mem = ciintf_read_attribute_mem;
  384. budget_ci->ca.write_attribute_mem = ciintf_write_attribute_mem;
  385. budget_ci->ca.read_cam_control = ciintf_read_cam_control;
  386. budget_ci->ca.write_cam_control = ciintf_write_cam_control;
  387. budget_ci->ca.slot_reset = ciintf_slot_reset;
  388. budget_ci->ca.slot_shutdown = ciintf_slot_shutdown;
  389. budget_ci->ca.slot_ts_enable = ciintf_slot_ts_enable;
  390. budget_ci->ca.poll_slot_status = ciintf_poll_slot_status;
  391. budget_ci->ca.data = budget_ci;
  392. if ((result = dvb_ca_en50221_init(&budget_ci->budget.dvb_adapter,
  393. &budget_ci->ca,
  394. ca_flags, 1)) != 0) {
  395. printk("budget_ci: CI interface detected, but initialisation failed.\n");
  396. goto error;
  397. }
  398. // Setup CI slot IRQ
  399. if (budget_ci->ci_irq) {
  400. tasklet_init(&budget_ci->ciintf_irq_tasklet, ciintf_interrupt, (unsigned long) budget_ci);
  401. if (budget_ci->slot_status != SLOTSTATUS_NONE) {
  402. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQLO);
  403. } else {
  404. saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI);
  405. }
  406. saa7146_write(saa, IER, saa7146_read(saa, IER) | MASK_03);
  407. }
  408. // enable interface
  409. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  410. CICONTROL_RESET, 1, 0);
  411. // success!
  412. printk("budget_ci: CI interface initialised\n");
  413. budget_ci->budget.ci_present = 1;
  414. // forge a fake CI IRQ so the CAM state is setup correctly
  415. if (budget_ci->ci_irq) {
  416. flags = DVB_CA_EN50221_CAMCHANGE_REMOVED;
  417. if (budget_ci->slot_status != SLOTSTATUS_NONE)
  418. flags = DVB_CA_EN50221_CAMCHANGE_INSERTED;
  419. dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0, flags);
  420. }
  421. return 0;
  422. error:
  423. saa7146_write(saa, MC1, saa7146_read(saa, MC1) | (0x800 << 16));
  424. return result;
  425. }
  426. static void ciintf_deinit(struct budget_ci *budget_ci)
  427. {
  428. struct saa7146_dev *saa = budget_ci->budget.dev;
  429. // disable CI interrupts
  430. if (budget_ci->ci_irq) {
  431. saa7146_write(saa, IER, saa7146_read(saa, IER) & ~MASK_03);
  432. saa7146_setgpio(saa, 0, SAA7146_GPIO_INPUT);
  433. tasklet_kill(&budget_ci->ciintf_irq_tasklet);
  434. }
  435. // reset interface
  436. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 0, 1, 0);
  437. msleep(1);
  438. ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1,
  439. CICONTROL_RESET, 1, 0);
  440. // disable TS data stream to CI interface
  441. saa7146_setgpio(saa, 1, SAA7146_GPIO_INPUT);
  442. // release the CA device
  443. dvb_ca_en50221_release(&budget_ci->ca);
  444. // disable DEBI pins
  445. saa7146_write(saa, MC1, saa7146_read(saa, MC1) | (0x800 << 16));
  446. }
  447. static void budget_ci_irq(struct saa7146_dev *dev, u32 * isr)
  448. {
  449. struct budget_ci *budget_ci = (struct budget_ci *) dev->ext_priv;
  450. dprintk(8, "dev: %p, budget_ci: %p\n", dev, budget_ci);
  451. if (*isr & MASK_06)
  452. tasklet_schedule(&budget_ci->msp430_irq_tasklet);
  453. if (*isr & MASK_10)
  454. ttpci_budget_irq10_handler(dev, isr);
  455. if ((*isr & MASK_03) && (budget_ci->budget.ci_present) && (budget_ci->ci_irq))
  456. tasklet_schedule(&budget_ci->ciintf_irq_tasklet);
  457. }
  458. static u8 philips_su1278_tt_inittab[] = {
  459. 0x01, 0x0f,
  460. 0x02, 0x30,
  461. 0x03, 0x00,
  462. 0x04, 0x5b,
  463. 0x05, 0x85,
  464. 0x06, 0x02,
  465. 0x07, 0x00,
  466. 0x08, 0x02,
  467. 0x09, 0x00,
  468. 0x0C, 0x01,
  469. 0x0D, 0x81,
  470. 0x0E, 0x44,
  471. 0x0f, 0x14,
  472. 0x10, 0x3c,
  473. 0x11, 0x84,
  474. 0x12, 0xda,
  475. 0x13, 0x97,
  476. 0x14, 0x95,
  477. 0x15, 0xc9,
  478. 0x16, 0x19,
  479. 0x17, 0x8c,
  480. 0x18, 0x59,
  481. 0x19, 0xf8,
  482. 0x1a, 0xfe,
  483. 0x1c, 0x7f,
  484. 0x1d, 0x00,
  485. 0x1e, 0x00,
  486. 0x1f, 0x50,
  487. 0x20, 0x00,
  488. 0x21, 0x00,
  489. 0x22, 0x00,
  490. 0x23, 0x00,
  491. 0x28, 0x00,
  492. 0x29, 0x28,
  493. 0x2a, 0x14,
  494. 0x2b, 0x0f,
  495. 0x2c, 0x09,
  496. 0x2d, 0x09,
  497. 0x31, 0x1f,
  498. 0x32, 0x19,
  499. 0x33, 0xfc,
  500. 0x34, 0x93,
  501. 0xff, 0xff
  502. };
  503. static int philips_su1278_tt_set_symbol_rate(struct dvb_frontend *fe, u32 srate, u32 ratio)
  504. {
  505. stv0299_writereg(fe, 0x0e, 0x44);
  506. if (srate >= 10000000) {
  507. stv0299_writereg(fe, 0x13, 0x97);
  508. stv0299_writereg(fe, 0x14, 0x95);
  509. stv0299_writereg(fe, 0x15, 0xc9);
  510. stv0299_writereg(fe, 0x17, 0x8c);
  511. stv0299_writereg(fe, 0x1a, 0xfe);
  512. stv0299_writereg(fe, 0x1c, 0x7f);
  513. stv0299_writereg(fe, 0x2d, 0x09);
  514. } else {
  515. stv0299_writereg(fe, 0x13, 0x99);
  516. stv0299_writereg(fe, 0x14, 0x8d);
  517. stv0299_writereg(fe, 0x15, 0xce);
  518. stv0299_writereg(fe, 0x17, 0x43);
  519. stv0299_writereg(fe, 0x1a, 0x1d);
  520. stv0299_writereg(fe, 0x1c, 0x12);
  521. stv0299_writereg(fe, 0x2d, 0x05);
  522. }
  523. stv0299_writereg(fe, 0x0e, 0x23);
  524. stv0299_writereg(fe, 0x0f, 0x94);
  525. stv0299_writereg(fe, 0x10, 0x39);
  526. stv0299_writereg(fe, 0x15, 0xc9);
  527. stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff);
  528. stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff);
  529. stv0299_writereg(fe, 0x21, (ratio) & 0xf0);
  530. return 0;
  531. }
  532. static int philips_su1278_tt_tuner_set_params(struct dvb_frontend *fe,
  533. struct dvb_frontend_parameters *params)
  534. {
  535. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  536. u32 div;
  537. u8 buf[4];
  538. struct i2c_msg msg = {.addr = 0x60,.flags = 0,.buf = buf,.len = sizeof(buf) };
  539. if ((params->frequency < 950000) || (params->frequency > 2150000))
  540. return -EINVAL;
  541. div = (params->frequency + (500 - 1)) / 500; // round correctly
  542. buf[0] = (div >> 8) & 0x7f;
  543. buf[1] = div & 0xff;
  544. buf[2] = 0x80 | ((div & 0x18000) >> 10) | 2;
  545. buf[3] = 0x20;
  546. if (params->u.qpsk.symbol_rate < 4000000)
  547. buf[3] |= 1;
  548. if (params->frequency < 1250000)
  549. buf[3] |= 0;
  550. else if (params->frequency < 1550000)
  551. buf[3] |= 0x40;
  552. else if (params->frequency < 2050000)
  553. buf[3] |= 0x80;
  554. else if (params->frequency < 2150000)
  555. buf[3] |= 0xC0;
  556. if (fe->ops.i2c_gate_ctrl)
  557. fe->ops.i2c_gate_ctrl(fe, 1);
  558. if (i2c_transfer(&budget_ci->budget.i2c_adap, &msg, 1) != 1)
  559. return -EIO;
  560. return 0;
  561. }
  562. static struct stv0299_config philips_su1278_tt_config = {
  563. .demod_address = 0x68,
  564. .inittab = philips_su1278_tt_inittab,
  565. .mclk = 64000000UL,
  566. .invert = 0,
  567. .skip_reinit = 1,
  568. .lock_output = STV0229_LOCKOUTPUT_1,
  569. .volt13_op0_op1 = STV0299_VOLT13_OP1,
  570. .min_delay_ms = 50,
  571. .set_symbol_rate = philips_su1278_tt_set_symbol_rate,
  572. };
  573. static int philips_tdm1316l_tuner_init(struct dvb_frontend *fe)
  574. {
  575. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  576. static u8 td1316_init[] = { 0x0b, 0xf5, 0x85, 0xab };
  577. static u8 disable_mc44BC374c[] = { 0x1d, 0x74, 0xa0, 0x68 };
  578. struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,.flags = 0,.buf = td1316_init,.len =
  579. sizeof(td1316_init) };
  580. // setup PLL configuration
  581. if (fe->ops.i2c_gate_ctrl)
  582. fe->ops.i2c_gate_ctrl(fe, 1);
  583. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  584. return -EIO;
  585. msleep(1);
  586. // disable the mc44BC374c (do not check for errors)
  587. tuner_msg.addr = 0x65;
  588. tuner_msg.buf = disable_mc44BC374c;
  589. tuner_msg.len = sizeof(disable_mc44BC374c);
  590. if (fe->ops.i2c_gate_ctrl)
  591. fe->ops.i2c_gate_ctrl(fe, 1);
  592. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1) {
  593. if (fe->ops.i2c_gate_ctrl)
  594. fe->ops.i2c_gate_ctrl(fe, 1);
  595. i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1);
  596. }
  597. return 0;
  598. }
  599. static int philips_tdm1316l_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  600. {
  601. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  602. u8 tuner_buf[4];
  603. struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,.flags = 0,.buf = tuner_buf,.len = sizeof(tuner_buf) };
  604. int tuner_frequency = 0;
  605. u8 band, cp, filter;
  606. // determine charge pump
  607. tuner_frequency = params->frequency + 36130000;
  608. if (tuner_frequency < 87000000)
  609. return -EINVAL;
  610. else if (tuner_frequency < 130000000)
  611. cp = 3;
  612. else if (tuner_frequency < 160000000)
  613. cp = 5;
  614. else if (tuner_frequency < 200000000)
  615. cp = 6;
  616. else if (tuner_frequency < 290000000)
  617. cp = 3;
  618. else if (tuner_frequency < 420000000)
  619. cp = 5;
  620. else if (tuner_frequency < 480000000)
  621. cp = 6;
  622. else if (tuner_frequency < 620000000)
  623. cp = 3;
  624. else if (tuner_frequency < 830000000)
  625. cp = 5;
  626. else if (tuner_frequency < 895000000)
  627. cp = 7;
  628. else
  629. return -EINVAL;
  630. // determine band
  631. if (params->frequency < 49000000)
  632. return -EINVAL;
  633. else if (params->frequency < 159000000)
  634. band = 1;
  635. else if (params->frequency < 444000000)
  636. band = 2;
  637. else if (params->frequency < 861000000)
  638. band = 4;
  639. else
  640. return -EINVAL;
  641. // setup PLL filter and TDA9889
  642. switch (params->u.ofdm.bandwidth) {
  643. case BANDWIDTH_6_MHZ:
  644. tda1004x_writereg(fe, 0x0C, 0x14);
  645. filter = 0;
  646. break;
  647. case BANDWIDTH_7_MHZ:
  648. tda1004x_writereg(fe, 0x0C, 0x80);
  649. filter = 0;
  650. break;
  651. case BANDWIDTH_8_MHZ:
  652. tda1004x_writereg(fe, 0x0C, 0x14);
  653. filter = 1;
  654. break;
  655. default:
  656. return -EINVAL;
  657. }
  658. // calculate divisor
  659. // ((36130000+((1000000/6)/2)) + Finput)/(1000000/6)
  660. tuner_frequency = (((params->frequency / 1000) * 6) + 217280) / 1000;
  661. // setup tuner buffer
  662. tuner_buf[0] = tuner_frequency >> 8;
  663. tuner_buf[1] = tuner_frequency & 0xff;
  664. tuner_buf[2] = 0xca;
  665. tuner_buf[3] = (cp << 5) | (filter << 3) | band;
  666. if (fe->ops.i2c_gate_ctrl)
  667. fe->ops.i2c_gate_ctrl(fe, 1);
  668. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  669. return -EIO;
  670. msleep(1);
  671. return 0;
  672. }
  673. static int philips_tdm1316l_request_firmware(struct dvb_frontend *fe,
  674. const struct firmware **fw, char *name)
  675. {
  676. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  677. return request_firmware(fw, name, &budget_ci->budget.dev->pci->dev);
  678. }
  679. static struct tda1004x_config philips_tdm1316l_config = {
  680. .demod_address = 0x8,
  681. .invert = 0,
  682. .invert_oclk = 0,
  683. .xtal_freq = TDA10046_XTAL_4M,
  684. .agc_config = TDA10046_AGC_DEFAULT,
  685. .if_freq = TDA10046_FREQ_3617,
  686. .request_firmware = philips_tdm1316l_request_firmware,
  687. };
  688. static int dvbc_philips_tdm1316l_tuner_set_params(struct dvb_frontend *fe, struct dvb_frontend_parameters *params)
  689. {
  690. struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv;
  691. u8 tuner_buf[5];
  692. struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,
  693. .flags = 0,
  694. .buf = tuner_buf,
  695. .len = sizeof(tuner_buf) };
  696. int tuner_frequency = 0;
  697. u8 band, cp, filter;
  698. // determine charge pump
  699. tuner_frequency = params->frequency + 36125000;
  700. if (tuner_frequency < 87000000)
  701. return -EINVAL;
  702. else if (tuner_frequency < 130000000) {
  703. cp = 3;
  704. band = 1;
  705. } else if (tuner_frequency < 160000000) {
  706. cp = 5;
  707. band = 1;
  708. } else if (tuner_frequency < 200000000) {
  709. cp = 6;
  710. band = 1;
  711. } else if (tuner_frequency < 290000000) {
  712. cp = 3;
  713. band = 2;
  714. } else if (tuner_frequency < 420000000) {
  715. cp = 5;
  716. band = 2;
  717. } else if (tuner_frequency < 480000000) {
  718. cp = 6;
  719. band = 2;
  720. } else if (tuner_frequency < 620000000) {
  721. cp = 3;
  722. band = 4;
  723. } else if (tuner_frequency < 830000000) {
  724. cp = 5;
  725. band = 4;
  726. } else if (tuner_frequency < 895000000) {
  727. cp = 7;
  728. band = 4;
  729. } else
  730. return -EINVAL;
  731. // assume PLL filter should always be 8MHz for the moment.
  732. filter = 1;
  733. // calculate divisor
  734. tuner_frequency = (params->frequency + 36125000 + (62500/2)) / 62500;
  735. // setup tuner buffer
  736. tuner_buf[0] = tuner_frequency >> 8;
  737. tuner_buf[1] = tuner_frequency & 0xff;
  738. tuner_buf[2] = 0xc8;
  739. tuner_buf[3] = (cp << 5) | (filter << 3) | band;
  740. tuner_buf[4] = 0x80;
  741. if (fe->ops.i2c_gate_ctrl)
  742. fe->ops.i2c_gate_ctrl(fe, 1);
  743. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  744. return -EIO;
  745. msleep(50);
  746. if (fe->ops.i2c_gate_ctrl)
  747. fe->ops.i2c_gate_ctrl(fe, 1);
  748. if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1)
  749. return -EIO;
  750. msleep(1);
  751. return 0;
  752. }
  753. static u8 dvbc_philips_tdm1316l_inittab[] = {
  754. 0x80, 0x01,
  755. 0x80, 0x00,
  756. 0x81, 0x01,
  757. 0x81, 0x00,
  758. 0x00, 0x09,
  759. 0x01, 0x69,
  760. 0x03, 0x00,
  761. 0x04, 0x00,
  762. 0x07, 0x00,
  763. 0x08, 0x00,
  764. 0x20, 0x00,
  765. 0x21, 0x40,
  766. 0x22, 0x00,
  767. 0x23, 0x00,
  768. 0x24, 0x40,
  769. 0x25, 0x88,
  770. 0x30, 0xff,
  771. 0x31, 0x00,
  772. 0x32, 0xff,
  773. 0x33, 0x00,
  774. 0x34, 0x50,
  775. 0x35, 0x7f,
  776. 0x36, 0x00,
  777. 0x37, 0x20,
  778. 0x38, 0x00,
  779. 0x40, 0x1c,
  780. 0x41, 0xff,
  781. 0x42, 0x29,
  782. 0x43, 0x20,
  783. 0x44, 0xff,
  784. 0x45, 0x00,
  785. 0x46, 0x00,
  786. 0x49, 0x04,
  787. 0x4a, 0x00,
  788. 0x4b, 0x7b,
  789. 0x52, 0x30,
  790. 0x55, 0xae,
  791. 0x56, 0x47,
  792. 0x57, 0xe1,
  793. 0x58, 0x3a,
  794. 0x5a, 0x1e,
  795. 0x5b, 0x34,
  796. 0x60, 0x00,
  797. 0x63, 0x00,
  798. 0x64, 0x00,
  799. 0x65, 0x00,
  800. 0x66, 0x00,
  801. 0x67, 0x00,
  802. 0x68, 0x00,
  803. 0x69, 0x00,
  804. 0x6a, 0x02,
  805. 0x6b, 0x00,
  806. 0x70, 0xff,
  807. 0x71, 0x00,
  808. 0x72, 0x00,
  809. 0x73, 0x00,
  810. 0x74, 0x0c,
  811. 0x80, 0x00,
  812. 0x81, 0x00,
  813. 0x82, 0x00,
  814. 0x83, 0x00,
  815. 0x84, 0x04,
  816. 0x85, 0x80,
  817. 0x86, 0x24,
  818. 0x87, 0x78,
  819. 0x88, 0x10,
  820. 0x89, 0x00,
  821. 0x90, 0x01,
  822. 0x91, 0x01,
  823. 0xa0, 0x04,
  824. 0xa1, 0x00,
  825. 0xa2, 0x00,
  826. 0xb0, 0x91,
  827. 0xb1, 0x0b,
  828. 0xc0, 0x53,
  829. 0xc1, 0x70,
  830. 0xc2, 0x12,
  831. 0xd0, 0x00,
  832. 0xd1, 0x00,
  833. 0xd2, 0x00,
  834. 0xd3, 0x00,
  835. 0xd4, 0x00,
  836. 0xd5, 0x00,
  837. 0xde, 0x00,
  838. 0xdf, 0x00,
  839. 0x61, 0x38,
  840. 0x62, 0x0a,
  841. 0x53, 0x13,
  842. 0x59, 0x08,
  843. 0xff, 0xff,
  844. };
  845. static struct stv0297_config dvbc_philips_tdm1316l_config = {
  846. .demod_address = 0x1c,
  847. .inittab = dvbc_philips_tdm1316l_inittab,
  848. .invert = 0,
  849. .stop_during_read = 1,
  850. };
  851. static void frontend_init(struct budget_ci *budget_ci)
  852. {
  853. switch (budget_ci->budget.dev->pci->subsystem_device) {
  854. case 0x100c: // Hauppauge/TT Nova-CI budget (stv0299/ALPS BSRU6(tsa5059))
  855. budget_ci->budget.dvb_frontend =
  856. dvb_attach(stv0299_attach, &alps_bsru6_config, &budget_ci->budget.i2c_adap);
  857. if (budget_ci->budget.dvb_frontend) {
  858. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = alps_bsru6_tuner_set_params;
  859. budget_ci->budget.dvb_frontend->tuner_priv = &budget_ci->budget.i2c_adap;
  860. break;
  861. }
  862. break;
  863. case 0x100f: // Hauppauge/TT Nova-CI budget (stv0299b/Philips su1278(tsa5059))
  864. budget_ci->budget.dvb_frontend =
  865. dvb_attach(stv0299_attach, &philips_su1278_tt_config, &budget_ci->budget.i2c_adap);
  866. if (budget_ci->budget.dvb_frontend) {
  867. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = philips_su1278_tt_tuner_set_params;
  868. break;
  869. }
  870. break;
  871. case 0x1010: // TT DVB-C CI budget (stv0297/Philips tdm1316l(tda6651tt))
  872. budget_ci->tuner_pll_address = 0x61;
  873. budget_ci->budget.dvb_frontend =
  874. dvb_attach(stv0297_attach, &dvbc_philips_tdm1316l_config, &budget_ci->budget.i2c_adap);
  875. if (budget_ci->budget.dvb_frontend) {
  876. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = dvbc_philips_tdm1316l_tuner_set_params;
  877. break;
  878. }
  879. break;
  880. case 0x1011: // Hauppauge/TT Nova-T budget (tda10045/Philips tdm1316l(tda6651tt) + TDA9889)
  881. budget_ci->tuner_pll_address = 0x63;
  882. budget_ci->budget.dvb_frontend =
  883. dvb_attach(tda10045_attach, &philips_tdm1316l_config, &budget_ci->budget.i2c_adap);
  884. if (budget_ci->budget.dvb_frontend) {
  885. budget_ci->budget.dvb_frontend->ops.tuner_ops.init = philips_tdm1316l_tuner_init;
  886. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = philips_tdm1316l_tuner_set_params;
  887. break;
  888. }
  889. break;
  890. case 0x1012: // TT DVB-T CI budget (tda10046/Philips tdm1316l(tda6651tt))
  891. budget_ci->tuner_pll_address = 0x60;
  892. philips_tdm1316l_config.invert = 1;
  893. budget_ci->budget.dvb_frontend =
  894. dvb_attach(tda10046_attach, &philips_tdm1316l_config, &budget_ci->budget.i2c_adap);
  895. if (budget_ci->budget.dvb_frontend) {
  896. budget_ci->budget.dvb_frontend->ops.tuner_ops.init = philips_tdm1316l_tuner_init;
  897. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = philips_tdm1316l_tuner_set_params;
  898. break;
  899. }
  900. break;
  901. case 0x1017: // TT S-1500 PCI
  902. budget_ci->budget.dvb_frontend = dvb_attach(stv0299_attach, &alps_bsbe1_config, &budget_ci->budget.i2c_adap);
  903. if (budget_ci->budget.dvb_frontend) {
  904. budget_ci->budget.dvb_frontend->ops.tuner_ops.set_params = alps_bsbe1_tuner_set_params;
  905. budget_ci->budget.dvb_frontend->tuner_priv = &budget_ci->budget.i2c_adap;
  906. budget_ci->budget.dvb_frontend->ops.dishnetwork_send_legacy_command = NULL;
  907. if (dvb_attach(lnbp21_attach, budget_ci->budget.dvb_frontend, &budget_ci->budget.i2c_adap, LNBP21_LLC, 0) == NULL) {
  908. printk("%s: No LNBP21 found!\n", __FUNCTION__);
  909. dvb_frontend_detach(budget_ci->budget.dvb_frontend);
  910. budget_ci->budget.dvb_frontend = NULL;
  911. }
  912. }
  913. break;
  914. }
  915. if (budget_ci->budget.dvb_frontend == NULL) {
  916. printk("budget-ci: A frontend driver was not found for device %04x/%04x subsystem %04x/%04x\n",
  917. budget_ci->budget.dev->pci->vendor,
  918. budget_ci->budget.dev->pci->device,
  919. budget_ci->budget.dev->pci->subsystem_vendor,
  920. budget_ci->budget.dev->pci->subsystem_device);
  921. } else {
  922. if (dvb_register_frontend
  923. (&budget_ci->budget.dvb_adapter, budget_ci->budget.dvb_frontend)) {
  924. printk("budget-ci: Frontend registration failed!\n");
  925. dvb_frontend_detach(budget_ci->budget.dvb_frontend);
  926. budget_ci->budget.dvb_frontend = NULL;
  927. }
  928. }
  929. }
  930. static int budget_ci_attach(struct saa7146_dev *dev, struct saa7146_pci_extension_data *info)
  931. {
  932. struct budget_ci *budget_ci;
  933. int err;
  934. if (!(budget_ci = kmalloc(sizeof(struct budget_ci), GFP_KERNEL)))
  935. return -ENOMEM;
  936. dprintk(2, "budget_ci: %p\n", budget_ci);
  937. budget_ci->budget.ci_present = 0;
  938. dev->ext_priv = budget_ci;
  939. if ((err = ttpci_budget_init(&budget_ci->budget, dev, info, THIS_MODULE))) {
  940. kfree(budget_ci);
  941. return err;
  942. }
  943. tasklet_init(&budget_ci->msp430_irq_tasklet, msp430_ir_interrupt,
  944. (unsigned long) budget_ci);
  945. msp430_ir_init(budget_ci);
  946. ciintf_init(budget_ci);
  947. budget_ci->budget.dvb_adapter.priv = budget_ci;
  948. frontend_init(budget_ci);
  949. ttpci_budget_init_hooks(&budget_ci->budget);
  950. return 0;
  951. }
  952. static int budget_ci_detach(struct saa7146_dev *dev)
  953. {
  954. struct budget_ci *budget_ci = (struct budget_ci *) dev->ext_priv;
  955. struct saa7146_dev *saa = budget_ci->budget.dev;
  956. int err;
  957. if (budget_ci->budget.ci_present)
  958. ciintf_deinit(budget_ci);
  959. if (budget_ci->budget.dvb_frontend) {
  960. dvb_unregister_frontend(budget_ci->budget.dvb_frontend);
  961. dvb_frontend_detach(budget_ci->budget.dvb_frontend);
  962. }
  963. err = ttpci_budget_deinit(&budget_ci->budget);
  964. tasklet_kill(&budget_ci->msp430_irq_tasklet);
  965. msp430_ir_deinit(budget_ci);
  966. // disable frontend and CI interface
  967. saa7146_setgpio(saa, 2, SAA7146_GPIO_INPUT);
  968. kfree(budget_ci);
  969. return err;
  970. }
  971. static struct saa7146_extension budget_extension;
  972. MAKE_BUDGET_INFO(ttbs2, "TT-Budget/S-1500 PCI", BUDGET_TT);
  973. MAKE_BUDGET_INFO(ttbci, "TT-Budget/WinTV-NOVA-CI PCI", BUDGET_TT_HW_DISEQC);
  974. MAKE_BUDGET_INFO(ttbt2, "TT-Budget/WinTV-NOVA-T PCI", BUDGET_TT);
  975. MAKE_BUDGET_INFO(ttbtci, "TT-Budget-T-CI PCI", BUDGET_TT);
  976. MAKE_BUDGET_INFO(ttbcci, "TT-Budget-C-CI PCI", BUDGET_TT);
  977. static struct pci_device_id pci_tbl[] = {
  978. MAKE_EXTENSION_PCI(ttbci, 0x13c2, 0x100c),
  979. MAKE_EXTENSION_PCI(ttbci, 0x13c2, 0x100f),
  980. MAKE_EXTENSION_PCI(ttbcci, 0x13c2, 0x1010),
  981. MAKE_EXTENSION_PCI(ttbt2, 0x13c2, 0x1011),
  982. MAKE_EXTENSION_PCI(ttbtci, 0x13c2, 0x1012),
  983. MAKE_EXTENSION_PCI(ttbs2, 0x13c2, 0x1017),
  984. {
  985. .vendor = 0,
  986. }
  987. };
  988. MODULE_DEVICE_TABLE(pci, pci_tbl);
  989. static struct saa7146_extension budget_extension = {
  990. .name = "budget_ci dvb",
  991. .flags = SAA7146_I2C_SHORT_DELAY,
  992. .module = THIS_MODULE,
  993. .pci_tbl = &pci_tbl[0],
  994. .attach = budget_ci_attach,
  995. .detach = budget_ci_detach,
  996. .irq_mask = MASK_03 | MASK_06 | MASK_10,
  997. .irq_func = budget_ci_irq,
  998. };
  999. static int __init budget_ci_init(void)
  1000. {
  1001. return saa7146_register_extension(&budget_extension);
  1002. }
  1003. static void __exit budget_ci_exit(void)
  1004. {
  1005. saa7146_unregister_extension(&budget_extension);
  1006. }
  1007. module_init(budget_ci_init);
  1008. module_exit(budget_ci_exit);
  1009. MODULE_LICENSE("GPL");
  1010. MODULE_AUTHOR("Michael Hunold, Jack Thomasson, Andrew de Quincey, others");
  1011. MODULE_DESCRIPTION("driver for the SAA7146 based so-called "
  1012. "budget PCI DVB cards w/ CI-module produced by "
  1013. "Siemens, Technotrend, Hauppauge");