main.c 52 KB

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  1. /*
  2. * Copyright (c) 2008-2009 Atheros Communications Inc.
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  11. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  13. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  14. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #include <linux/nl80211.h>
  17. #include "ath9k.h"
  18. #include "btcoex.h"
  19. static void ath_cache_conf_rate(struct ath_softc *sc,
  20. struct ieee80211_conf *conf)
  21. {
  22. switch (conf->channel->band) {
  23. case IEEE80211_BAND_2GHZ:
  24. if (conf_is_ht20(conf))
  25. sc->cur_rate_mode = ATH9K_MODE_11NG_HT20;
  26. else if (conf_is_ht40_minus(conf))
  27. sc->cur_rate_mode = ATH9K_MODE_11NG_HT40MINUS;
  28. else if (conf_is_ht40_plus(conf))
  29. sc->cur_rate_mode = ATH9K_MODE_11NG_HT40PLUS;
  30. else
  31. sc->cur_rate_mode = ATH9K_MODE_11G;
  32. break;
  33. case IEEE80211_BAND_5GHZ:
  34. if (conf_is_ht20(conf))
  35. sc->cur_rate_mode = ATH9K_MODE_11NA_HT20;
  36. else if (conf_is_ht40_minus(conf))
  37. sc->cur_rate_mode = ATH9K_MODE_11NA_HT40MINUS;
  38. else if (conf_is_ht40_plus(conf))
  39. sc->cur_rate_mode = ATH9K_MODE_11NA_HT40PLUS;
  40. else
  41. sc->cur_rate_mode = ATH9K_MODE_11A;
  42. break;
  43. default:
  44. BUG_ON(1);
  45. break;
  46. }
  47. }
  48. static void ath_update_txpow(struct ath_softc *sc)
  49. {
  50. struct ath_hw *ah = sc->sc_ah;
  51. if (sc->curtxpow != sc->config.txpowlimit) {
  52. ath9k_hw_set_txpowerlimit(ah, sc->config.txpowlimit);
  53. /* read back in case value is clamped */
  54. sc->curtxpow = ath9k_hw_regulatory(ah)->power_limit;
  55. }
  56. }
  57. static u8 parse_mpdudensity(u8 mpdudensity)
  58. {
  59. /*
  60. * 802.11n D2.0 defined values for "Minimum MPDU Start Spacing":
  61. * 0 for no restriction
  62. * 1 for 1/4 us
  63. * 2 for 1/2 us
  64. * 3 for 1 us
  65. * 4 for 2 us
  66. * 5 for 4 us
  67. * 6 for 8 us
  68. * 7 for 16 us
  69. */
  70. switch (mpdudensity) {
  71. case 0:
  72. return 0;
  73. case 1:
  74. case 2:
  75. case 3:
  76. /* Our lower layer calculations limit our precision to
  77. 1 microsecond */
  78. return 1;
  79. case 4:
  80. return 2;
  81. case 5:
  82. return 4;
  83. case 6:
  84. return 8;
  85. case 7:
  86. return 16;
  87. default:
  88. return 0;
  89. }
  90. }
  91. static struct ath9k_channel *ath_get_curchannel(struct ath_softc *sc,
  92. struct ieee80211_hw *hw)
  93. {
  94. struct ieee80211_channel *curchan = hw->conf.channel;
  95. struct ath9k_channel *channel;
  96. u8 chan_idx;
  97. chan_idx = curchan->hw_value;
  98. channel = &sc->sc_ah->channels[chan_idx];
  99. ath9k_update_ichannel(sc, hw, channel);
  100. return channel;
  101. }
  102. bool ath9k_setpower(struct ath_softc *sc, enum ath9k_power_mode mode)
  103. {
  104. unsigned long flags;
  105. bool ret;
  106. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  107. ret = ath9k_hw_setpower(sc->sc_ah, mode);
  108. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  109. return ret;
  110. }
  111. void ath9k_ps_wakeup(struct ath_softc *sc)
  112. {
  113. unsigned long flags;
  114. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  115. if (++sc->ps_usecount != 1)
  116. goto unlock;
  117. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_AWAKE);
  118. unlock:
  119. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  120. }
  121. void ath9k_ps_restore(struct ath_softc *sc)
  122. {
  123. unsigned long flags;
  124. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  125. if (--sc->ps_usecount != 0)
  126. goto unlock;
  127. if (sc->ps_idle)
  128. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_FULL_SLEEP);
  129. else if (sc->ps_enabled &&
  130. !(sc->ps_flags & (PS_WAIT_FOR_BEACON |
  131. PS_WAIT_FOR_CAB |
  132. PS_WAIT_FOR_PSPOLL_DATA |
  133. PS_WAIT_FOR_TX_ACK)))
  134. ath9k_hw_setpower(sc->sc_ah, ATH9K_PM_NETWORK_SLEEP);
  135. unlock:
  136. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  137. }
  138. static void ath_start_ani(struct ath_common *common)
  139. {
  140. struct ath_hw *ah = common->ah;
  141. unsigned long timestamp = jiffies_to_msecs(jiffies);
  142. struct ath_softc *sc = (struct ath_softc *) common->priv;
  143. if (!(sc->sc_flags & SC_OP_ANI_RUN))
  144. return;
  145. if (sc->sc_flags & SC_OP_OFFCHANNEL)
  146. return;
  147. common->ani.longcal_timer = timestamp;
  148. common->ani.shortcal_timer = timestamp;
  149. common->ani.checkani_timer = timestamp;
  150. mod_timer(&common->ani.timer,
  151. jiffies +
  152. msecs_to_jiffies((u32)ah->config.ani_poll_interval));
  153. }
  154. /*
  155. * Set/change channels. If the channel is really being changed, it's done
  156. * by reseting the chip. To accomplish this we must first cleanup any pending
  157. * DMA, then restart stuff.
  158. */
  159. int ath_set_channel(struct ath_softc *sc, struct ieee80211_hw *hw,
  160. struct ath9k_channel *hchan)
  161. {
  162. struct ath_wiphy *aphy = hw->priv;
  163. struct ath_hw *ah = sc->sc_ah;
  164. struct ath_common *common = ath9k_hw_common(ah);
  165. struct ieee80211_conf *conf = &common->hw->conf;
  166. bool fastcc = true, stopped;
  167. struct ieee80211_channel *channel = hw->conf.channel;
  168. struct ath9k_hw_cal_data *caldata = NULL;
  169. int r;
  170. if (sc->sc_flags & SC_OP_INVALID)
  171. return -EIO;
  172. del_timer_sync(&common->ani.timer);
  173. cancel_work_sync(&sc->paprd_work);
  174. cancel_work_sync(&sc->hw_check_work);
  175. cancel_delayed_work_sync(&sc->tx_complete_work);
  176. ath9k_ps_wakeup(sc);
  177. /*
  178. * This is only performed if the channel settings have
  179. * actually changed.
  180. *
  181. * To switch channels clear any pending DMA operations;
  182. * wait long enough for the RX fifo to drain, reset the
  183. * hardware at the new frequency, and then re-enable
  184. * the relevant bits of the h/w.
  185. */
  186. ath9k_hw_set_interrupts(ah, 0);
  187. ath_drain_all_txq(sc, false);
  188. stopped = ath_stoprecv(sc);
  189. /* XXX: do not flush receive queue here. We don't want
  190. * to flush data frames already in queue because of
  191. * changing channel. */
  192. if (!stopped || !(sc->sc_flags & SC_OP_OFFCHANNEL))
  193. fastcc = false;
  194. if (!(sc->sc_flags & SC_OP_OFFCHANNEL))
  195. caldata = &aphy->caldata;
  196. ath_print(common, ATH_DBG_CONFIG,
  197. "(%u MHz) -> (%u MHz), conf_is_ht40: %d fastcc: %d\n",
  198. sc->sc_ah->curchan->channel,
  199. channel->center_freq, conf_is_ht40(conf),
  200. fastcc);
  201. spin_lock_bh(&sc->sc_resetlock);
  202. r = ath9k_hw_reset(ah, hchan, caldata, fastcc);
  203. if (r) {
  204. ath_print(common, ATH_DBG_FATAL,
  205. "Unable to reset channel (%u MHz), "
  206. "reset status %d\n",
  207. channel->center_freq, r);
  208. spin_unlock_bh(&sc->sc_resetlock);
  209. goto ps_restore;
  210. }
  211. spin_unlock_bh(&sc->sc_resetlock);
  212. if (ath_startrecv(sc) != 0) {
  213. ath_print(common, ATH_DBG_FATAL,
  214. "Unable to restart recv logic\n");
  215. r = -EIO;
  216. goto ps_restore;
  217. }
  218. ath_cache_conf_rate(sc, &hw->conf);
  219. ath_update_txpow(sc);
  220. ath9k_hw_set_interrupts(ah, ah->imask);
  221. if (!(sc->sc_flags & (SC_OP_OFFCHANNEL))) {
  222. ath_beacon_config(sc, NULL);
  223. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  224. ath_start_ani(common);
  225. }
  226. ps_restore:
  227. ath9k_ps_restore(sc);
  228. return r;
  229. }
  230. static void ath_paprd_activate(struct ath_softc *sc)
  231. {
  232. struct ath_hw *ah = sc->sc_ah;
  233. struct ath9k_hw_cal_data *caldata = ah->caldata;
  234. struct ath_common *common = ath9k_hw_common(ah);
  235. int chain;
  236. if (!caldata || !caldata->paprd_done)
  237. return;
  238. ath9k_ps_wakeup(sc);
  239. ar9003_paprd_enable(ah, false);
  240. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  241. if (!(common->tx_chainmask & BIT(chain)))
  242. continue;
  243. ar9003_paprd_populate_single_table(ah, caldata, chain);
  244. }
  245. ar9003_paprd_enable(ah, true);
  246. ath9k_ps_restore(sc);
  247. }
  248. void ath_paprd_calibrate(struct work_struct *work)
  249. {
  250. struct ath_softc *sc = container_of(work, struct ath_softc, paprd_work);
  251. struct ieee80211_hw *hw = sc->hw;
  252. struct ath_hw *ah = sc->sc_ah;
  253. struct ieee80211_hdr *hdr;
  254. struct sk_buff *skb = NULL;
  255. struct ieee80211_tx_info *tx_info;
  256. int band = hw->conf.channel->band;
  257. struct ieee80211_supported_band *sband = &sc->sbands[band];
  258. struct ath_tx_control txctl;
  259. struct ath9k_hw_cal_data *caldata = ah->caldata;
  260. struct ath_common *common = ath9k_hw_common(ah);
  261. int qnum, ftype;
  262. int chain_ok = 0;
  263. int chain;
  264. int len = 1800;
  265. int time_left;
  266. int i;
  267. if (!caldata)
  268. return;
  269. skb = alloc_skb(len, GFP_KERNEL);
  270. if (!skb)
  271. return;
  272. tx_info = IEEE80211_SKB_CB(skb);
  273. skb_put(skb, len);
  274. memset(skb->data, 0, len);
  275. hdr = (struct ieee80211_hdr *)skb->data;
  276. ftype = IEEE80211_FTYPE_DATA | IEEE80211_STYPE_NULLFUNC;
  277. hdr->frame_control = cpu_to_le16(ftype);
  278. hdr->duration_id = cpu_to_le16(10);
  279. memcpy(hdr->addr1, hw->wiphy->perm_addr, ETH_ALEN);
  280. memcpy(hdr->addr2, hw->wiphy->perm_addr, ETH_ALEN);
  281. memcpy(hdr->addr3, hw->wiphy->perm_addr, ETH_ALEN);
  282. memset(&txctl, 0, sizeof(txctl));
  283. qnum = sc->tx.hwq_map[WME_AC_BE];
  284. txctl.txq = &sc->tx.txq[qnum];
  285. ath9k_ps_wakeup(sc);
  286. ar9003_paprd_init_table(ah);
  287. for (chain = 0; chain < AR9300_MAX_CHAINS; chain++) {
  288. if (!(common->tx_chainmask & BIT(chain)))
  289. continue;
  290. chain_ok = 0;
  291. memset(tx_info, 0, sizeof(*tx_info));
  292. tx_info->band = band;
  293. for (i = 0; i < 4; i++) {
  294. tx_info->control.rates[i].idx = sband->n_bitrates - 1;
  295. tx_info->control.rates[i].count = 6;
  296. }
  297. init_completion(&sc->paprd_complete);
  298. ar9003_paprd_setup_gain_table(ah, chain);
  299. txctl.paprd = BIT(chain);
  300. if (ath_tx_start(hw, skb, &txctl) != 0)
  301. break;
  302. time_left = wait_for_completion_timeout(&sc->paprd_complete,
  303. msecs_to_jiffies(ATH_PAPRD_TIMEOUT));
  304. if (!time_left) {
  305. ath_print(ath9k_hw_common(ah), ATH_DBG_CALIBRATE,
  306. "Timeout waiting for paprd training on "
  307. "TX chain %d\n",
  308. chain);
  309. goto fail_paprd;
  310. }
  311. if (!ar9003_paprd_is_done(ah))
  312. break;
  313. if (ar9003_paprd_create_curve(ah, caldata, chain) != 0)
  314. break;
  315. chain_ok = 1;
  316. }
  317. kfree_skb(skb);
  318. if (chain_ok) {
  319. caldata->paprd_done = true;
  320. ath_paprd_activate(sc);
  321. }
  322. fail_paprd:
  323. ath9k_ps_restore(sc);
  324. }
  325. /*
  326. * This routine performs the periodic noise floor calibration function
  327. * that is used to adjust and optimize the chip performance. This
  328. * takes environmental changes (location, temperature) into account.
  329. * When the task is complete, it reschedules itself depending on the
  330. * appropriate interval that was calculated.
  331. */
  332. void ath_ani_calibrate(unsigned long data)
  333. {
  334. struct ath_softc *sc = (struct ath_softc *)data;
  335. struct ath_hw *ah = sc->sc_ah;
  336. struct ath_common *common = ath9k_hw_common(ah);
  337. bool longcal = false;
  338. bool shortcal = false;
  339. bool aniflag = false;
  340. unsigned int timestamp = jiffies_to_msecs(jiffies);
  341. u32 cal_interval, short_cal_interval, long_cal_interval;
  342. if (ah->caldata && ah->caldata->nfcal_interference)
  343. long_cal_interval = ATH_LONG_CALINTERVAL_INT;
  344. else
  345. long_cal_interval = ATH_LONG_CALINTERVAL;
  346. short_cal_interval = (ah->opmode == NL80211_IFTYPE_AP) ?
  347. ATH_AP_SHORT_CALINTERVAL : ATH_STA_SHORT_CALINTERVAL;
  348. /* Only calibrate if awake */
  349. if (sc->sc_ah->power_mode != ATH9K_PM_AWAKE)
  350. goto set_timer;
  351. ath9k_ps_wakeup(sc);
  352. /* Long calibration runs independently of short calibration. */
  353. if ((timestamp - common->ani.longcal_timer) >= long_cal_interval) {
  354. longcal = true;
  355. ath_print(common, ATH_DBG_ANI, "longcal @%lu\n", jiffies);
  356. common->ani.longcal_timer = timestamp;
  357. }
  358. /* Short calibration applies only while caldone is false */
  359. if (!common->ani.caldone) {
  360. if ((timestamp - common->ani.shortcal_timer) >= short_cal_interval) {
  361. shortcal = true;
  362. ath_print(common, ATH_DBG_ANI,
  363. "shortcal @%lu\n", jiffies);
  364. common->ani.shortcal_timer = timestamp;
  365. common->ani.resetcal_timer = timestamp;
  366. }
  367. } else {
  368. if ((timestamp - common->ani.resetcal_timer) >=
  369. ATH_RESTART_CALINTERVAL) {
  370. common->ani.caldone = ath9k_hw_reset_calvalid(ah);
  371. if (common->ani.caldone)
  372. common->ani.resetcal_timer = timestamp;
  373. }
  374. }
  375. /* Verify whether we must check ANI */
  376. if ((timestamp - common->ani.checkani_timer) >=
  377. ah->config.ani_poll_interval) {
  378. aniflag = true;
  379. common->ani.checkani_timer = timestamp;
  380. }
  381. /* Skip all processing if there's nothing to do. */
  382. if (longcal || shortcal || aniflag) {
  383. /* Call ANI routine if necessary */
  384. if (aniflag)
  385. ath9k_hw_ani_monitor(ah, ah->curchan);
  386. /* Perform calibration if necessary */
  387. if (longcal || shortcal) {
  388. common->ani.caldone =
  389. ath9k_hw_calibrate(ah,
  390. ah->curchan,
  391. common->rx_chainmask,
  392. longcal);
  393. }
  394. }
  395. ath9k_ps_restore(sc);
  396. set_timer:
  397. /*
  398. * Set timer interval based on previous results.
  399. * The interval must be the shortest necessary to satisfy ANI,
  400. * short calibration and long calibration.
  401. */
  402. cal_interval = ATH_LONG_CALINTERVAL;
  403. if (sc->sc_ah->config.enable_ani)
  404. cal_interval = min(cal_interval,
  405. (u32)ah->config.ani_poll_interval);
  406. if (!common->ani.caldone)
  407. cal_interval = min(cal_interval, (u32)short_cal_interval);
  408. mod_timer(&common->ani.timer, jiffies + msecs_to_jiffies(cal_interval));
  409. if ((sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_PAPRD) && ah->caldata) {
  410. if (!ah->caldata->paprd_done)
  411. ieee80211_queue_work(sc->hw, &sc->paprd_work);
  412. else
  413. ath_paprd_activate(sc);
  414. }
  415. }
  416. /*
  417. * Update tx/rx chainmask. For legacy association,
  418. * hard code chainmask to 1x1, for 11n association, use
  419. * the chainmask configuration, for bt coexistence, use
  420. * the chainmask configuration even in legacy mode.
  421. */
  422. void ath_update_chainmask(struct ath_softc *sc, int is_ht)
  423. {
  424. struct ath_hw *ah = sc->sc_ah;
  425. struct ath_common *common = ath9k_hw_common(ah);
  426. if ((sc->sc_flags & SC_OP_OFFCHANNEL) || is_ht ||
  427. (ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE)) {
  428. common->tx_chainmask = ah->caps.tx_chainmask;
  429. common->rx_chainmask = ah->caps.rx_chainmask;
  430. } else {
  431. common->tx_chainmask = 1;
  432. common->rx_chainmask = 1;
  433. }
  434. ath_print(common, ATH_DBG_CONFIG,
  435. "tx chmask: %d, rx chmask: %d\n",
  436. common->tx_chainmask,
  437. common->rx_chainmask);
  438. }
  439. static void ath_node_attach(struct ath_softc *sc, struct ieee80211_sta *sta)
  440. {
  441. struct ath_node *an;
  442. an = (struct ath_node *)sta->drv_priv;
  443. if (sc->sc_flags & SC_OP_TXAGGR) {
  444. ath_tx_node_init(sc, an);
  445. an->maxampdu = 1 << (IEEE80211_HT_MAX_AMPDU_FACTOR +
  446. sta->ht_cap.ampdu_factor);
  447. an->mpdudensity = parse_mpdudensity(sta->ht_cap.ampdu_density);
  448. an->last_rssi = ATH_RSSI_DUMMY_MARKER;
  449. }
  450. }
  451. static void ath_node_detach(struct ath_softc *sc, struct ieee80211_sta *sta)
  452. {
  453. struct ath_node *an = (struct ath_node *)sta->drv_priv;
  454. if (sc->sc_flags & SC_OP_TXAGGR)
  455. ath_tx_node_cleanup(sc, an);
  456. }
  457. void ath_hw_check(struct work_struct *work)
  458. {
  459. struct ath_softc *sc = container_of(work, struct ath_softc, hw_check_work);
  460. int i;
  461. ath9k_ps_wakeup(sc);
  462. for (i = 0; i < 3; i++) {
  463. if (ath9k_hw_check_alive(sc->sc_ah))
  464. goto out;
  465. msleep(1);
  466. }
  467. ath_reset(sc, false);
  468. out:
  469. ath9k_ps_restore(sc);
  470. }
  471. void ath9k_tasklet(unsigned long data)
  472. {
  473. struct ath_softc *sc = (struct ath_softc *)data;
  474. struct ath_hw *ah = sc->sc_ah;
  475. struct ath_common *common = ath9k_hw_common(ah);
  476. u32 status = sc->intrstatus;
  477. u32 rxmask;
  478. ath9k_ps_wakeup(sc);
  479. if (status & ATH9K_INT_FATAL) {
  480. ath_reset(sc, false);
  481. ath9k_ps_restore(sc);
  482. return;
  483. }
  484. if (!ath9k_hw_check_alive(ah))
  485. ieee80211_queue_work(sc->hw, &sc->hw_check_work);
  486. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  487. rxmask = (ATH9K_INT_RXHP | ATH9K_INT_RXLP | ATH9K_INT_RXEOL |
  488. ATH9K_INT_RXORN);
  489. else
  490. rxmask = (ATH9K_INT_RX | ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  491. if (status & rxmask) {
  492. spin_lock_bh(&sc->rx.rxflushlock);
  493. /* Check for high priority Rx first */
  494. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  495. (status & ATH9K_INT_RXHP))
  496. ath_rx_tasklet(sc, 0, true);
  497. ath_rx_tasklet(sc, 0, false);
  498. spin_unlock_bh(&sc->rx.rxflushlock);
  499. }
  500. if (status & ATH9K_INT_TX) {
  501. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  502. ath_tx_edma_tasklet(sc);
  503. else
  504. ath_tx_tasklet(sc);
  505. }
  506. if ((status & ATH9K_INT_TSFOOR) && sc->ps_enabled) {
  507. /*
  508. * TSF sync does not look correct; remain awake to sync with
  509. * the next Beacon.
  510. */
  511. ath_print(common, ATH_DBG_PS,
  512. "TSFOOR - Sync with next Beacon\n");
  513. sc->ps_flags |= PS_WAIT_FOR_BEACON | PS_BEACON_SYNC;
  514. }
  515. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  516. if (status & ATH9K_INT_GENTIMER)
  517. ath_gen_timer_isr(sc->sc_ah);
  518. /* re-enable hardware interrupt */
  519. ath9k_hw_set_interrupts(ah, ah->imask);
  520. ath9k_ps_restore(sc);
  521. }
  522. irqreturn_t ath_isr(int irq, void *dev)
  523. {
  524. #define SCHED_INTR ( \
  525. ATH9K_INT_FATAL | \
  526. ATH9K_INT_RXORN | \
  527. ATH9K_INT_RXEOL | \
  528. ATH9K_INT_RX | \
  529. ATH9K_INT_RXLP | \
  530. ATH9K_INT_RXHP | \
  531. ATH9K_INT_TX | \
  532. ATH9K_INT_BMISS | \
  533. ATH9K_INT_CST | \
  534. ATH9K_INT_TSFOOR | \
  535. ATH9K_INT_GENTIMER)
  536. struct ath_softc *sc = dev;
  537. struct ath_hw *ah = sc->sc_ah;
  538. enum ath9k_int status;
  539. bool sched = false;
  540. /*
  541. * The hardware is not ready/present, don't
  542. * touch anything. Note this can happen early
  543. * on if the IRQ is shared.
  544. */
  545. if (sc->sc_flags & SC_OP_INVALID)
  546. return IRQ_NONE;
  547. /* shared irq, not for us */
  548. if (!ath9k_hw_intrpend(ah))
  549. return IRQ_NONE;
  550. /*
  551. * Figure out the reason(s) for the interrupt. Note
  552. * that the hal returns a pseudo-ISR that may include
  553. * bits we haven't explicitly enabled so we mask the
  554. * value to insure we only process bits we requested.
  555. */
  556. ath9k_hw_getisr(ah, &status); /* NB: clears ISR too */
  557. status &= ah->imask; /* discard unasked-for bits */
  558. /*
  559. * If there are no status bits set, then this interrupt was not
  560. * for me (should have been caught above).
  561. */
  562. if (!status)
  563. return IRQ_NONE;
  564. /* Cache the status */
  565. sc->intrstatus = status;
  566. if (status & SCHED_INTR)
  567. sched = true;
  568. /*
  569. * If a FATAL or RXORN interrupt is received, we have to reset the
  570. * chip immediately.
  571. */
  572. if ((status & ATH9K_INT_FATAL) || ((status & ATH9K_INT_RXORN) &&
  573. !(ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)))
  574. goto chip_reset;
  575. if ((ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) &&
  576. (status & ATH9K_INT_BB_WATCHDOG)) {
  577. ar9003_hw_bb_watchdog_dbg_info(ah);
  578. goto chip_reset;
  579. }
  580. if (status & ATH9K_INT_SWBA)
  581. tasklet_schedule(&sc->bcon_tasklet);
  582. if (status & ATH9K_INT_TXURN)
  583. ath9k_hw_updatetxtriglevel(ah, true);
  584. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA) {
  585. if (status & ATH9K_INT_RXEOL) {
  586. ah->imask &= ~(ATH9K_INT_RXEOL | ATH9K_INT_RXORN);
  587. ath9k_hw_set_interrupts(ah, ah->imask);
  588. }
  589. }
  590. if (status & ATH9K_INT_MIB) {
  591. /*
  592. * Disable interrupts until we service the MIB
  593. * interrupt; otherwise it will continue to
  594. * fire.
  595. */
  596. ath9k_hw_set_interrupts(ah, 0);
  597. /*
  598. * Let the hal handle the event. We assume
  599. * it will clear whatever condition caused
  600. * the interrupt.
  601. */
  602. ath9k_hw_proc_mib_event(ah);
  603. ath9k_hw_set_interrupts(ah, ah->imask);
  604. }
  605. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  606. if (status & ATH9K_INT_TIM_TIMER) {
  607. /* Clear RxAbort bit so that we can
  608. * receive frames */
  609. ath9k_setpower(sc, ATH9K_PM_AWAKE);
  610. ath9k_hw_setrxabort(sc->sc_ah, 0);
  611. sc->ps_flags |= PS_WAIT_FOR_BEACON;
  612. }
  613. chip_reset:
  614. ath_debug_stat_interrupt(sc, status);
  615. if (sched) {
  616. /* turn off every interrupt except SWBA */
  617. ath9k_hw_set_interrupts(ah, (ah->imask & ATH9K_INT_SWBA));
  618. tasklet_schedule(&sc->intr_tq);
  619. }
  620. return IRQ_HANDLED;
  621. #undef SCHED_INTR
  622. }
  623. static u32 ath_get_extchanmode(struct ath_softc *sc,
  624. struct ieee80211_channel *chan,
  625. enum nl80211_channel_type channel_type)
  626. {
  627. u32 chanmode = 0;
  628. switch (chan->band) {
  629. case IEEE80211_BAND_2GHZ:
  630. switch(channel_type) {
  631. case NL80211_CHAN_NO_HT:
  632. case NL80211_CHAN_HT20:
  633. chanmode = CHANNEL_G_HT20;
  634. break;
  635. case NL80211_CHAN_HT40PLUS:
  636. chanmode = CHANNEL_G_HT40PLUS;
  637. break;
  638. case NL80211_CHAN_HT40MINUS:
  639. chanmode = CHANNEL_G_HT40MINUS;
  640. break;
  641. }
  642. break;
  643. case IEEE80211_BAND_5GHZ:
  644. switch(channel_type) {
  645. case NL80211_CHAN_NO_HT:
  646. case NL80211_CHAN_HT20:
  647. chanmode = CHANNEL_A_HT20;
  648. break;
  649. case NL80211_CHAN_HT40PLUS:
  650. chanmode = CHANNEL_A_HT40PLUS;
  651. break;
  652. case NL80211_CHAN_HT40MINUS:
  653. chanmode = CHANNEL_A_HT40MINUS;
  654. break;
  655. }
  656. break;
  657. default:
  658. break;
  659. }
  660. return chanmode;
  661. }
  662. static void ath9k_bss_assoc_info(struct ath_softc *sc,
  663. struct ieee80211_vif *vif,
  664. struct ieee80211_bss_conf *bss_conf)
  665. {
  666. struct ath_hw *ah = sc->sc_ah;
  667. struct ath_common *common = ath9k_hw_common(ah);
  668. if (bss_conf->assoc) {
  669. ath_print(common, ATH_DBG_CONFIG,
  670. "Bss Info ASSOC %d, bssid: %pM\n",
  671. bss_conf->aid, common->curbssid);
  672. /* New association, store aid */
  673. common->curaid = bss_conf->aid;
  674. ath9k_hw_write_associd(ah);
  675. /*
  676. * Request a re-configuration of Beacon related timers
  677. * on the receipt of the first Beacon frame (i.e.,
  678. * after time sync with the AP).
  679. */
  680. sc->ps_flags |= PS_BEACON_SYNC;
  681. /* Configure the beacon */
  682. ath_beacon_config(sc, vif);
  683. /* Reset rssi stats */
  684. sc->sc_ah->stats.avgbrssi = ATH_RSSI_DUMMY_MARKER;
  685. sc->sc_flags |= SC_OP_ANI_RUN;
  686. ath_start_ani(common);
  687. } else {
  688. ath_print(common, ATH_DBG_CONFIG, "Bss Info DISASSOC\n");
  689. common->curaid = 0;
  690. /* Stop ANI */
  691. sc->sc_flags &= ~SC_OP_ANI_RUN;
  692. del_timer_sync(&common->ani.timer);
  693. }
  694. }
  695. void ath_radio_enable(struct ath_softc *sc, struct ieee80211_hw *hw)
  696. {
  697. struct ath_hw *ah = sc->sc_ah;
  698. struct ath_common *common = ath9k_hw_common(ah);
  699. struct ieee80211_channel *channel = hw->conf.channel;
  700. int r;
  701. ath9k_ps_wakeup(sc);
  702. ath9k_hw_configpcipowersave(ah, 0, 0);
  703. if (!ah->curchan)
  704. ah->curchan = ath_get_curchannel(sc, sc->hw);
  705. spin_lock_bh(&sc->sc_resetlock);
  706. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  707. if (r) {
  708. ath_print(common, ATH_DBG_FATAL,
  709. "Unable to reset channel (%u MHz), "
  710. "reset status %d\n",
  711. channel->center_freq, r);
  712. }
  713. spin_unlock_bh(&sc->sc_resetlock);
  714. ath_update_txpow(sc);
  715. if (ath_startrecv(sc) != 0) {
  716. ath_print(common, ATH_DBG_FATAL,
  717. "Unable to restart recv logic\n");
  718. return;
  719. }
  720. if (sc->sc_flags & SC_OP_BEACONS)
  721. ath_beacon_config(sc, NULL); /* restart beacons */
  722. /* Re-Enable interrupts */
  723. ath9k_hw_set_interrupts(ah, ah->imask);
  724. /* Enable LED */
  725. ath9k_hw_cfg_output(ah, ah->led_pin,
  726. AR_GPIO_OUTPUT_MUX_AS_OUTPUT);
  727. ath9k_hw_set_gpio(ah, ah->led_pin, 0);
  728. ieee80211_wake_queues(hw);
  729. ath9k_ps_restore(sc);
  730. }
  731. void ath_radio_disable(struct ath_softc *sc, struct ieee80211_hw *hw)
  732. {
  733. struct ath_hw *ah = sc->sc_ah;
  734. struct ieee80211_channel *channel = hw->conf.channel;
  735. int r;
  736. ath9k_ps_wakeup(sc);
  737. ieee80211_stop_queues(hw);
  738. /*
  739. * Keep the LED on when the radio is disabled
  740. * during idle unassociated state.
  741. */
  742. if (!sc->ps_idle) {
  743. ath9k_hw_set_gpio(ah, ah->led_pin, 1);
  744. ath9k_hw_cfg_gpio_input(ah, ah->led_pin);
  745. }
  746. /* Disable interrupts */
  747. ath9k_hw_set_interrupts(ah, 0);
  748. ath_drain_all_txq(sc, false); /* clear pending tx frames */
  749. ath_stoprecv(sc); /* turn off frame recv */
  750. ath_flushrecv(sc); /* flush recv queue */
  751. if (!ah->curchan)
  752. ah->curchan = ath_get_curchannel(sc, hw);
  753. spin_lock_bh(&sc->sc_resetlock);
  754. r = ath9k_hw_reset(ah, ah->curchan, ah->caldata, false);
  755. if (r) {
  756. ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
  757. "Unable to reset channel (%u MHz), "
  758. "reset status %d\n",
  759. channel->center_freq, r);
  760. }
  761. spin_unlock_bh(&sc->sc_resetlock);
  762. ath9k_hw_phy_disable(ah);
  763. ath9k_hw_configpcipowersave(ah, 1, 1);
  764. ath9k_ps_restore(sc);
  765. ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
  766. }
  767. int ath_reset(struct ath_softc *sc, bool retry_tx)
  768. {
  769. struct ath_hw *ah = sc->sc_ah;
  770. struct ath_common *common = ath9k_hw_common(ah);
  771. struct ieee80211_hw *hw = sc->hw;
  772. int r;
  773. /* Stop ANI */
  774. del_timer_sync(&common->ani.timer);
  775. ieee80211_stop_queues(hw);
  776. ath9k_hw_set_interrupts(ah, 0);
  777. ath_drain_all_txq(sc, retry_tx);
  778. ath_stoprecv(sc);
  779. ath_flushrecv(sc);
  780. spin_lock_bh(&sc->sc_resetlock);
  781. r = ath9k_hw_reset(ah, sc->sc_ah->curchan, ah->caldata, false);
  782. if (r)
  783. ath_print(common, ATH_DBG_FATAL,
  784. "Unable to reset hardware; reset status %d\n", r);
  785. spin_unlock_bh(&sc->sc_resetlock);
  786. if (ath_startrecv(sc) != 0)
  787. ath_print(common, ATH_DBG_FATAL,
  788. "Unable to start recv logic\n");
  789. /*
  790. * We may be doing a reset in response to a request
  791. * that changes the channel so update any state that
  792. * might change as a result.
  793. */
  794. ath_cache_conf_rate(sc, &hw->conf);
  795. ath_update_txpow(sc);
  796. if ((sc->sc_flags & SC_OP_BEACONS) || !(sc->sc_flags & (SC_OP_OFFCHANNEL)))
  797. ath_beacon_config(sc, NULL); /* restart beacons */
  798. ath9k_hw_set_interrupts(ah, ah->imask);
  799. if (retry_tx) {
  800. int i;
  801. for (i = 0; i < ATH9K_NUM_TX_QUEUES; i++) {
  802. if (ATH_TXQ_SETUP(sc, i)) {
  803. spin_lock_bh(&sc->tx.txq[i].axq_lock);
  804. ath_txq_schedule(sc, &sc->tx.txq[i]);
  805. spin_unlock_bh(&sc->tx.txq[i].axq_lock);
  806. }
  807. }
  808. }
  809. ieee80211_wake_queues(hw);
  810. /* Start ANI */
  811. ath_start_ani(common);
  812. return r;
  813. }
  814. static int ath_get_hal_qnum(u16 queue, struct ath_softc *sc)
  815. {
  816. int qnum;
  817. switch (queue) {
  818. case 0:
  819. qnum = sc->tx.hwq_map[WME_AC_VO];
  820. break;
  821. case 1:
  822. qnum = sc->tx.hwq_map[WME_AC_VI];
  823. break;
  824. case 2:
  825. qnum = sc->tx.hwq_map[WME_AC_BE];
  826. break;
  827. case 3:
  828. qnum = sc->tx.hwq_map[WME_AC_BK];
  829. break;
  830. default:
  831. qnum = sc->tx.hwq_map[WME_AC_BE];
  832. break;
  833. }
  834. return qnum;
  835. }
  836. int ath_get_mac80211_qnum(u32 queue, struct ath_softc *sc)
  837. {
  838. int qnum;
  839. switch (queue) {
  840. case WME_AC_VO:
  841. qnum = 0;
  842. break;
  843. case WME_AC_VI:
  844. qnum = 1;
  845. break;
  846. case WME_AC_BE:
  847. qnum = 2;
  848. break;
  849. case WME_AC_BK:
  850. qnum = 3;
  851. break;
  852. default:
  853. qnum = -1;
  854. break;
  855. }
  856. return qnum;
  857. }
  858. /* XXX: Remove me once we don't depend on ath9k_channel for all
  859. * this redundant data */
  860. void ath9k_update_ichannel(struct ath_softc *sc, struct ieee80211_hw *hw,
  861. struct ath9k_channel *ichan)
  862. {
  863. struct ieee80211_channel *chan = hw->conf.channel;
  864. struct ieee80211_conf *conf = &hw->conf;
  865. ichan->channel = chan->center_freq;
  866. ichan->chan = chan;
  867. if (chan->band == IEEE80211_BAND_2GHZ) {
  868. ichan->chanmode = CHANNEL_G;
  869. ichan->channelFlags = CHANNEL_2GHZ | CHANNEL_OFDM | CHANNEL_G;
  870. } else {
  871. ichan->chanmode = CHANNEL_A;
  872. ichan->channelFlags = CHANNEL_5GHZ | CHANNEL_OFDM;
  873. }
  874. if (conf_is_ht(conf))
  875. ichan->chanmode = ath_get_extchanmode(sc, chan,
  876. conf->channel_type);
  877. }
  878. /**********************/
  879. /* mac80211 callbacks */
  880. /**********************/
  881. static int ath9k_start(struct ieee80211_hw *hw)
  882. {
  883. struct ath_wiphy *aphy = hw->priv;
  884. struct ath_softc *sc = aphy->sc;
  885. struct ath_hw *ah = sc->sc_ah;
  886. struct ath_common *common = ath9k_hw_common(ah);
  887. struct ieee80211_channel *curchan = hw->conf.channel;
  888. struct ath9k_channel *init_channel;
  889. int r;
  890. ath_print(common, ATH_DBG_CONFIG,
  891. "Starting driver with initial channel: %d MHz\n",
  892. curchan->center_freq);
  893. mutex_lock(&sc->mutex);
  894. if (ath9k_wiphy_started(sc)) {
  895. if (sc->chan_idx == curchan->hw_value) {
  896. /*
  897. * Already on the operational channel, the new wiphy
  898. * can be marked active.
  899. */
  900. aphy->state = ATH_WIPHY_ACTIVE;
  901. ieee80211_wake_queues(hw);
  902. } else {
  903. /*
  904. * Another wiphy is on another channel, start the new
  905. * wiphy in paused state.
  906. */
  907. aphy->state = ATH_WIPHY_PAUSED;
  908. ieee80211_stop_queues(hw);
  909. }
  910. mutex_unlock(&sc->mutex);
  911. return 0;
  912. }
  913. aphy->state = ATH_WIPHY_ACTIVE;
  914. /* setup initial channel */
  915. sc->chan_idx = curchan->hw_value;
  916. init_channel = ath_get_curchannel(sc, hw);
  917. /* Reset SERDES registers */
  918. ath9k_hw_configpcipowersave(ah, 0, 0);
  919. /*
  920. * The basic interface to setting the hardware in a good
  921. * state is ``reset''. On return the hardware is known to
  922. * be powered up and with interrupts disabled. This must
  923. * be followed by initialization of the appropriate bits
  924. * and then setup of the interrupt mask.
  925. */
  926. spin_lock_bh(&sc->sc_resetlock);
  927. r = ath9k_hw_reset(ah, init_channel, ah->caldata, false);
  928. if (r) {
  929. ath_print(common, ATH_DBG_FATAL,
  930. "Unable to reset hardware; reset status %d "
  931. "(freq %u MHz)\n", r,
  932. curchan->center_freq);
  933. spin_unlock_bh(&sc->sc_resetlock);
  934. goto mutex_unlock;
  935. }
  936. spin_unlock_bh(&sc->sc_resetlock);
  937. /*
  938. * This is needed only to setup initial state
  939. * but it's best done after a reset.
  940. */
  941. ath_update_txpow(sc);
  942. /*
  943. * Setup the hardware after reset:
  944. * The receive engine is set going.
  945. * Frame transmit is handled entirely
  946. * in the frame output path; there's nothing to do
  947. * here except setup the interrupt mask.
  948. */
  949. if (ath_startrecv(sc) != 0) {
  950. ath_print(common, ATH_DBG_FATAL,
  951. "Unable to start recv logic\n");
  952. r = -EIO;
  953. goto mutex_unlock;
  954. }
  955. /* Setup our intr mask. */
  956. ah->imask = ATH9K_INT_TX | ATH9K_INT_RXEOL |
  957. ATH9K_INT_RXORN | ATH9K_INT_FATAL |
  958. ATH9K_INT_GLOBAL;
  959. if (ah->caps.hw_caps & ATH9K_HW_CAP_EDMA)
  960. ah->imask |= ATH9K_INT_RXHP |
  961. ATH9K_INT_RXLP |
  962. ATH9K_INT_BB_WATCHDOG;
  963. else
  964. ah->imask |= ATH9K_INT_RX;
  965. ah->imask |= ATH9K_INT_GTT;
  966. if (ah->caps.hw_caps & ATH9K_HW_CAP_HT)
  967. ah->imask |= ATH9K_INT_CST;
  968. ath_cache_conf_rate(sc, &hw->conf);
  969. sc->sc_flags &= ~SC_OP_INVALID;
  970. /* Disable BMISS interrupt when we're not associated */
  971. ah->imask &= ~(ATH9K_INT_SWBA | ATH9K_INT_BMISS);
  972. ath9k_hw_set_interrupts(ah, ah->imask);
  973. ieee80211_wake_queues(hw);
  974. ieee80211_queue_delayed_work(sc->hw, &sc->tx_complete_work, 0);
  975. if ((ah->btcoex_hw.scheme != ATH_BTCOEX_CFG_NONE) &&
  976. !ah->btcoex_hw.enabled) {
  977. ath9k_hw_btcoex_set_weight(ah, AR_BT_COEX_WGHT,
  978. AR_STOMP_LOW_WLAN_WGHT);
  979. ath9k_hw_btcoex_enable(ah);
  980. if (common->bus_ops->bt_coex_prep)
  981. common->bus_ops->bt_coex_prep(common);
  982. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  983. ath9k_btcoex_timer_resume(sc);
  984. }
  985. mutex_unlock:
  986. mutex_unlock(&sc->mutex);
  987. return r;
  988. }
  989. static int ath9k_tx(struct ieee80211_hw *hw,
  990. struct sk_buff *skb)
  991. {
  992. struct ieee80211_tx_info *info = IEEE80211_SKB_CB(skb);
  993. struct ath_wiphy *aphy = hw->priv;
  994. struct ath_softc *sc = aphy->sc;
  995. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  996. struct ath_tx_control txctl;
  997. int padpos, padsize;
  998. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *) skb->data;
  999. int qnum;
  1000. if (aphy->state != ATH_WIPHY_ACTIVE && aphy->state != ATH_WIPHY_SCAN) {
  1001. ath_print(common, ATH_DBG_XMIT,
  1002. "ath9k: %s: TX in unexpected wiphy state "
  1003. "%d\n", wiphy_name(hw->wiphy), aphy->state);
  1004. goto exit;
  1005. }
  1006. if (sc->ps_enabled) {
  1007. /*
  1008. * mac80211 does not set PM field for normal data frames, so we
  1009. * need to update that based on the current PS mode.
  1010. */
  1011. if (ieee80211_is_data(hdr->frame_control) &&
  1012. !ieee80211_is_nullfunc(hdr->frame_control) &&
  1013. !ieee80211_has_pm(hdr->frame_control)) {
  1014. ath_print(common, ATH_DBG_PS, "Add PM=1 for a TX frame "
  1015. "while in PS mode\n");
  1016. hdr->frame_control |= cpu_to_le16(IEEE80211_FCTL_PM);
  1017. }
  1018. }
  1019. if (unlikely(sc->sc_ah->power_mode != ATH9K_PM_AWAKE)) {
  1020. /*
  1021. * We are using PS-Poll and mac80211 can request TX while in
  1022. * power save mode. Need to wake up hardware for the TX to be
  1023. * completed and if needed, also for RX of buffered frames.
  1024. */
  1025. ath9k_ps_wakeup(sc);
  1026. if (!(sc->sc_ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP))
  1027. ath9k_hw_setrxabort(sc->sc_ah, 0);
  1028. if (ieee80211_is_pspoll(hdr->frame_control)) {
  1029. ath_print(common, ATH_DBG_PS,
  1030. "Sending PS-Poll to pick a buffered frame\n");
  1031. sc->ps_flags |= PS_WAIT_FOR_PSPOLL_DATA;
  1032. } else {
  1033. ath_print(common, ATH_DBG_PS,
  1034. "Wake up to complete TX\n");
  1035. sc->ps_flags |= PS_WAIT_FOR_TX_ACK;
  1036. }
  1037. /*
  1038. * The actual restore operation will happen only after
  1039. * the sc_flags bit is cleared. We are just dropping
  1040. * the ps_usecount here.
  1041. */
  1042. ath9k_ps_restore(sc);
  1043. }
  1044. memset(&txctl, 0, sizeof(struct ath_tx_control));
  1045. /*
  1046. * As a temporary workaround, assign seq# here; this will likely need
  1047. * to be cleaned up to work better with Beacon transmission and virtual
  1048. * BSSes.
  1049. */
  1050. if (info->flags & IEEE80211_TX_CTL_ASSIGN_SEQ) {
  1051. if (info->flags & IEEE80211_TX_CTL_FIRST_FRAGMENT)
  1052. sc->tx.seq_no += 0x10;
  1053. hdr->seq_ctrl &= cpu_to_le16(IEEE80211_SCTL_FRAG);
  1054. hdr->seq_ctrl |= cpu_to_le16(sc->tx.seq_no);
  1055. }
  1056. /* Add the padding after the header if this is not already done */
  1057. padpos = ath9k_cmn_padpos(hdr->frame_control);
  1058. padsize = padpos & 3;
  1059. if (padsize && skb->len>padpos) {
  1060. if (skb_headroom(skb) < padsize)
  1061. return -1;
  1062. skb_push(skb, padsize);
  1063. memmove(skb->data, skb->data + padsize, padpos);
  1064. }
  1065. qnum = ath_get_hal_qnum(skb_get_queue_mapping(skb), sc);
  1066. txctl.txq = &sc->tx.txq[qnum];
  1067. ath_print(common, ATH_DBG_XMIT, "transmitting packet, skb: %p\n", skb);
  1068. if (ath_tx_start(hw, skb, &txctl) != 0) {
  1069. ath_print(common, ATH_DBG_XMIT, "TX failed\n");
  1070. goto exit;
  1071. }
  1072. return 0;
  1073. exit:
  1074. dev_kfree_skb_any(skb);
  1075. return 0;
  1076. }
  1077. static void ath9k_stop(struct ieee80211_hw *hw)
  1078. {
  1079. struct ath_wiphy *aphy = hw->priv;
  1080. struct ath_softc *sc = aphy->sc;
  1081. struct ath_hw *ah = sc->sc_ah;
  1082. struct ath_common *common = ath9k_hw_common(ah);
  1083. int i;
  1084. mutex_lock(&sc->mutex);
  1085. aphy->state = ATH_WIPHY_INACTIVE;
  1086. if (led_blink)
  1087. cancel_delayed_work_sync(&sc->ath_led_blink_work);
  1088. cancel_delayed_work_sync(&sc->tx_complete_work);
  1089. cancel_work_sync(&sc->paprd_work);
  1090. cancel_work_sync(&sc->hw_check_work);
  1091. for (i = 0; i < sc->num_sec_wiphy; i++) {
  1092. if (sc->sec_wiphy[i])
  1093. break;
  1094. }
  1095. if (i == sc->num_sec_wiphy) {
  1096. cancel_delayed_work_sync(&sc->wiphy_work);
  1097. cancel_work_sync(&sc->chan_work);
  1098. }
  1099. if (sc->sc_flags & SC_OP_INVALID) {
  1100. ath_print(common, ATH_DBG_ANY, "Device not present\n");
  1101. mutex_unlock(&sc->mutex);
  1102. return;
  1103. }
  1104. if (ath9k_wiphy_started(sc)) {
  1105. mutex_unlock(&sc->mutex);
  1106. return; /* another wiphy still in use */
  1107. }
  1108. /* Ensure HW is awake when we try to shut it down. */
  1109. ath9k_ps_wakeup(sc);
  1110. if (ah->btcoex_hw.enabled) {
  1111. ath9k_hw_btcoex_disable(ah);
  1112. if (ah->btcoex_hw.scheme == ATH_BTCOEX_CFG_3WIRE)
  1113. ath9k_btcoex_timer_pause(sc);
  1114. }
  1115. /* make sure h/w will not generate any interrupt
  1116. * before setting the invalid flag. */
  1117. ath9k_hw_set_interrupts(ah, 0);
  1118. if (!(sc->sc_flags & SC_OP_INVALID)) {
  1119. ath_drain_all_txq(sc, false);
  1120. ath_stoprecv(sc);
  1121. ath9k_hw_phy_disable(ah);
  1122. } else
  1123. sc->rx.rxlink = NULL;
  1124. /* disable HAL and put h/w to sleep */
  1125. ath9k_hw_disable(ah);
  1126. ath9k_hw_configpcipowersave(ah, 1, 1);
  1127. ath9k_ps_restore(sc);
  1128. /* Finally, put the chip in FULL SLEEP mode */
  1129. ath9k_setpower(sc, ATH9K_PM_FULL_SLEEP);
  1130. sc->sc_flags |= SC_OP_INVALID;
  1131. mutex_unlock(&sc->mutex);
  1132. ath_print(common, ATH_DBG_CONFIG, "Driver halt\n");
  1133. }
  1134. static int ath9k_add_interface(struct ieee80211_hw *hw,
  1135. struct ieee80211_vif *vif)
  1136. {
  1137. struct ath_wiphy *aphy = hw->priv;
  1138. struct ath_softc *sc = aphy->sc;
  1139. struct ath_hw *ah = sc->sc_ah;
  1140. struct ath_common *common = ath9k_hw_common(ah);
  1141. struct ath_vif *avp = (void *)vif->drv_priv;
  1142. enum nl80211_iftype ic_opmode = NL80211_IFTYPE_UNSPECIFIED;
  1143. int ret = 0;
  1144. mutex_lock(&sc->mutex);
  1145. switch (vif->type) {
  1146. case NL80211_IFTYPE_STATION:
  1147. ic_opmode = NL80211_IFTYPE_STATION;
  1148. break;
  1149. case NL80211_IFTYPE_WDS:
  1150. ic_opmode = NL80211_IFTYPE_WDS;
  1151. break;
  1152. case NL80211_IFTYPE_ADHOC:
  1153. case NL80211_IFTYPE_AP:
  1154. case NL80211_IFTYPE_MESH_POINT:
  1155. if (sc->nbcnvifs >= ATH_BCBUF) {
  1156. ret = -ENOBUFS;
  1157. goto out;
  1158. }
  1159. ic_opmode = vif->type;
  1160. break;
  1161. default:
  1162. ath_print(common, ATH_DBG_FATAL,
  1163. "Interface type %d not yet supported\n", vif->type);
  1164. ret = -EOPNOTSUPP;
  1165. goto out;
  1166. }
  1167. ath_print(common, ATH_DBG_CONFIG,
  1168. "Attach a VIF of type: %d\n", ic_opmode);
  1169. /* Set the VIF opmode */
  1170. avp->av_opmode = ic_opmode;
  1171. avp->av_bslot = -1;
  1172. sc->nvifs++;
  1173. ath9k_set_bssid_mask(hw, vif);
  1174. if (sc->nvifs > 1)
  1175. goto out; /* skip global settings for secondary vif */
  1176. if (ic_opmode == NL80211_IFTYPE_AP) {
  1177. ath9k_hw_set_tsfadjust(ah, 1);
  1178. sc->sc_flags |= SC_OP_TSF_RESET;
  1179. }
  1180. /* Set the device opmode */
  1181. ah->opmode = ic_opmode;
  1182. /*
  1183. * Enable MIB interrupts when there are hardware phy counters.
  1184. * Note we only do this (at the moment) for station mode.
  1185. */
  1186. if ((vif->type == NL80211_IFTYPE_STATION) ||
  1187. (vif->type == NL80211_IFTYPE_ADHOC) ||
  1188. (vif->type == NL80211_IFTYPE_MESH_POINT)) {
  1189. if (ah->config.enable_ani)
  1190. ah->imask |= ATH9K_INT_MIB;
  1191. ah->imask |= ATH9K_INT_TSFOOR;
  1192. }
  1193. ath9k_hw_set_interrupts(ah, ah->imask);
  1194. if (vif->type == NL80211_IFTYPE_AP ||
  1195. vif->type == NL80211_IFTYPE_ADHOC ||
  1196. vif->type == NL80211_IFTYPE_MONITOR) {
  1197. sc->sc_flags |= SC_OP_ANI_RUN;
  1198. ath_start_ani(common);
  1199. }
  1200. out:
  1201. mutex_unlock(&sc->mutex);
  1202. return ret;
  1203. }
  1204. static void ath9k_remove_interface(struct ieee80211_hw *hw,
  1205. struct ieee80211_vif *vif)
  1206. {
  1207. struct ath_wiphy *aphy = hw->priv;
  1208. struct ath_softc *sc = aphy->sc;
  1209. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1210. struct ath_vif *avp = (void *)vif->drv_priv;
  1211. int i;
  1212. ath_print(common, ATH_DBG_CONFIG, "Detach Interface\n");
  1213. mutex_lock(&sc->mutex);
  1214. /* Stop ANI */
  1215. sc->sc_flags &= ~SC_OP_ANI_RUN;
  1216. del_timer_sync(&common->ani.timer);
  1217. /* Reclaim beacon resources */
  1218. if ((sc->sc_ah->opmode == NL80211_IFTYPE_AP) ||
  1219. (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC) ||
  1220. (sc->sc_ah->opmode == NL80211_IFTYPE_MESH_POINT)) {
  1221. ath9k_ps_wakeup(sc);
  1222. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1223. ath9k_ps_restore(sc);
  1224. }
  1225. ath_beacon_return(sc, avp);
  1226. sc->sc_flags &= ~SC_OP_BEACONS;
  1227. for (i = 0; i < ARRAY_SIZE(sc->beacon.bslot); i++) {
  1228. if (sc->beacon.bslot[i] == vif) {
  1229. printk(KERN_DEBUG "%s: vif had allocated beacon "
  1230. "slot\n", __func__);
  1231. sc->beacon.bslot[i] = NULL;
  1232. sc->beacon.bslot_aphy[i] = NULL;
  1233. }
  1234. }
  1235. sc->nvifs--;
  1236. mutex_unlock(&sc->mutex);
  1237. }
  1238. static void ath9k_enable_ps(struct ath_softc *sc)
  1239. {
  1240. struct ath_hw *ah = sc->sc_ah;
  1241. sc->ps_enabled = true;
  1242. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1243. if ((ah->imask & ATH9K_INT_TIM_TIMER) == 0) {
  1244. ah->imask |= ATH9K_INT_TIM_TIMER;
  1245. ath9k_hw_set_interrupts(ah, ah->imask);
  1246. }
  1247. ath9k_hw_setrxabort(ah, 1);
  1248. }
  1249. }
  1250. static void ath9k_disable_ps(struct ath_softc *sc)
  1251. {
  1252. struct ath_hw *ah = sc->sc_ah;
  1253. sc->ps_enabled = false;
  1254. ath9k_hw_setpower(ah, ATH9K_PM_AWAKE);
  1255. if (!(ah->caps.hw_caps & ATH9K_HW_CAP_AUTOSLEEP)) {
  1256. ath9k_hw_setrxabort(ah, 0);
  1257. sc->ps_flags &= ~(PS_WAIT_FOR_BEACON |
  1258. PS_WAIT_FOR_CAB |
  1259. PS_WAIT_FOR_PSPOLL_DATA |
  1260. PS_WAIT_FOR_TX_ACK);
  1261. if (ah->imask & ATH9K_INT_TIM_TIMER) {
  1262. ah->imask &= ~ATH9K_INT_TIM_TIMER;
  1263. ath9k_hw_set_interrupts(ah, ah->imask);
  1264. }
  1265. }
  1266. }
  1267. static int ath9k_config(struct ieee80211_hw *hw, u32 changed)
  1268. {
  1269. struct ath_wiphy *aphy = hw->priv;
  1270. struct ath_softc *sc = aphy->sc;
  1271. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1272. struct ieee80211_conf *conf = &hw->conf;
  1273. bool disable_radio;
  1274. mutex_lock(&sc->mutex);
  1275. /*
  1276. * Leave this as the first check because we need to turn on the
  1277. * radio if it was disabled before prior to processing the rest
  1278. * of the changes. Likewise we must only disable the radio towards
  1279. * the end.
  1280. */
  1281. if (changed & IEEE80211_CONF_CHANGE_IDLE) {
  1282. bool enable_radio;
  1283. bool all_wiphys_idle;
  1284. bool idle = !!(conf->flags & IEEE80211_CONF_IDLE);
  1285. spin_lock_bh(&sc->wiphy_lock);
  1286. all_wiphys_idle = ath9k_all_wiphys_idle(sc);
  1287. ath9k_set_wiphy_idle(aphy, idle);
  1288. enable_radio = (!idle && all_wiphys_idle);
  1289. /*
  1290. * After we unlock here its possible another wiphy
  1291. * can be re-renabled so to account for that we will
  1292. * only disable the radio toward the end of this routine
  1293. * if by then all wiphys are still idle.
  1294. */
  1295. spin_unlock_bh(&sc->wiphy_lock);
  1296. if (enable_radio) {
  1297. sc->ps_idle = false;
  1298. ath_radio_enable(sc, hw);
  1299. ath_print(common, ATH_DBG_CONFIG,
  1300. "not-idle: enabling radio\n");
  1301. }
  1302. }
  1303. /*
  1304. * We just prepare to enable PS. We have to wait until our AP has
  1305. * ACK'd our null data frame to disable RX otherwise we'll ignore
  1306. * those ACKs and end up retransmitting the same null data frames.
  1307. * IEEE80211_CONF_CHANGE_PS is only passed by mac80211 for STA mode.
  1308. */
  1309. if (changed & IEEE80211_CONF_CHANGE_PS) {
  1310. unsigned long flags;
  1311. spin_lock_irqsave(&sc->sc_pm_lock, flags);
  1312. if (conf->flags & IEEE80211_CONF_PS)
  1313. ath9k_enable_ps(sc);
  1314. else
  1315. ath9k_disable_ps(sc);
  1316. spin_unlock_irqrestore(&sc->sc_pm_lock, flags);
  1317. }
  1318. if (changed & IEEE80211_CONF_CHANGE_MONITOR) {
  1319. if (conf->flags & IEEE80211_CONF_MONITOR) {
  1320. ath_print(common, ATH_DBG_CONFIG,
  1321. "HW opmode set to Monitor mode\n");
  1322. sc->sc_ah->opmode = NL80211_IFTYPE_MONITOR;
  1323. }
  1324. }
  1325. if (changed & IEEE80211_CONF_CHANGE_CHANNEL) {
  1326. struct ieee80211_channel *curchan = hw->conf.channel;
  1327. int pos = curchan->hw_value;
  1328. aphy->chan_idx = pos;
  1329. aphy->chan_is_ht = conf_is_ht(conf);
  1330. if (hw->conf.flags & IEEE80211_CONF_OFFCHANNEL)
  1331. sc->sc_flags |= SC_OP_OFFCHANNEL;
  1332. else
  1333. sc->sc_flags &= ~SC_OP_OFFCHANNEL;
  1334. if (aphy->state == ATH_WIPHY_SCAN ||
  1335. aphy->state == ATH_WIPHY_ACTIVE)
  1336. ath9k_wiphy_pause_all_forced(sc, aphy);
  1337. else {
  1338. /*
  1339. * Do not change operational channel based on a paused
  1340. * wiphy changes.
  1341. */
  1342. goto skip_chan_change;
  1343. }
  1344. ath_print(common, ATH_DBG_CONFIG, "Set channel: %d MHz\n",
  1345. curchan->center_freq);
  1346. /* XXX: remove me eventualy */
  1347. ath9k_update_ichannel(sc, hw, &sc->sc_ah->channels[pos]);
  1348. ath_update_chainmask(sc, conf_is_ht(conf));
  1349. if (ath_set_channel(sc, hw, &sc->sc_ah->channels[pos]) < 0) {
  1350. ath_print(common, ATH_DBG_FATAL,
  1351. "Unable to set channel\n");
  1352. mutex_unlock(&sc->mutex);
  1353. return -EINVAL;
  1354. }
  1355. }
  1356. skip_chan_change:
  1357. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  1358. sc->config.txpowlimit = 2 * conf->power_level;
  1359. ath_update_txpow(sc);
  1360. }
  1361. spin_lock_bh(&sc->wiphy_lock);
  1362. disable_radio = ath9k_all_wiphys_idle(sc);
  1363. spin_unlock_bh(&sc->wiphy_lock);
  1364. if (disable_radio) {
  1365. ath_print(common, ATH_DBG_CONFIG, "idle: disabling radio\n");
  1366. sc->ps_idle = true;
  1367. ath_radio_disable(sc, hw);
  1368. }
  1369. mutex_unlock(&sc->mutex);
  1370. return 0;
  1371. }
  1372. #define SUPPORTED_FILTERS \
  1373. (FIF_PROMISC_IN_BSS | \
  1374. FIF_ALLMULTI | \
  1375. FIF_CONTROL | \
  1376. FIF_PSPOLL | \
  1377. FIF_OTHER_BSS | \
  1378. FIF_BCN_PRBRESP_PROMISC | \
  1379. FIF_FCSFAIL)
  1380. /* FIXME: sc->sc_full_reset ? */
  1381. static void ath9k_configure_filter(struct ieee80211_hw *hw,
  1382. unsigned int changed_flags,
  1383. unsigned int *total_flags,
  1384. u64 multicast)
  1385. {
  1386. struct ath_wiphy *aphy = hw->priv;
  1387. struct ath_softc *sc = aphy->sc;
  1388. u32 rfilt;
  1389. changed_flags &= SUPPORTED_FILTERS;
  1390. *total_flags &= SUPPORTED_FILTERS;
  1391. sc->rx.rxfilter = *total_flags;
  1392. ath9k_ps_wakeup(sc);
  1393. rfilt = ath_calcrxfilter(sc);
  1394. ath9k_hw_setrxfilter(sc->sc_ah, rfilt);
  1395. ath9k_ps_restore(sc);
  1396. ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_CONFIG,
  1397. "Set HW RX filter: 0x%x\n", rfilt);
  1398. }
  1399. static int ath9k_sta_add(struct ieee80211_hw *hw,
  1400. struct ieee80211_vif *vif,
  1401. struct ieee80211_sta *sta)
  1402. {
  1403. struct ath_wiphy *aphy = hw->priv;
  1404. struct ath_softc *sc = aphy->sc;
  1405. ath_node_attach(sc, sta);
  1406. return 0;
  1407. }
  1408. static int ath9k_sta_remove(struct ieee80211_hw *hw,
  1409. struct ieee80211_vif *vif,
  1410. struct ieee80211_sta *sta)
  1411. {
  1412. struct ath_wiphy *aphy = hw->priv;
  1413. struct ath_softc *sc = aphy->sc;
  1414. ath_node_detach(sc, sta);
  1415. return 0;
  1416. }
  1417. static int ath9k_conf_tx(struct ieee80211_hw *hw, u16 queue,
  1418. const struct ieee80211_tx_queue_params *params)
  1419. {
  1420. struct ath_wiphy *aphy = hw->priv;
  1421. struct ath_softc *sc = aphy->sc;
  1422. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1423. struct ath9k_tx_queue_info qi;
  1424. int ret = 0, qnum;
  1425. if (queue >= WME_NUM_AC)
  1426. return 0;
  1427. mutex_lock(&sc->mutex);
  1428. memset(&qi, 0, sizeof(struct ath9k_tx_queue_info));
  1429. qi.tqi_aifs = params->aifs;
  1430. qi.tqi_cwmin = params->cw_min;
  1431. qi.tqi_cwmax = params->cw_max;
  1432. qi.tqi_burstTime = params->txop;
  1433. qnum = ath_get_hal_qnum(queue, sc);
  1434. ath_print(common, ATH_DBG_CONFIG,
  1435. "Configure tx [queue/halq] [%d/%d], "
  1436. "aifs: %d, cw_min: %d, cw_max: %d, txop: %d\n",
  1437. queue, qnum, params->aifs, params->cw_min,
  1438. params->cw_max, params->txop);
  1439. ret = ath_txq_update(sc, qnum, &qi);
  1440. if (ret)
  1441. ath_print(common, ATH_DBG_FATAL, "TXQ Update failed\n");
  1442. if (sc->sc_ah->opmode == NL80211_IFTYPE_ADHOC)
  1443. if ((qnum == sc->tx.hwq_map[WME_AC_BE]) && !ret)
  1444. ath_beaconq_config(sc);
  1445. mutex_unlock(&sc->mutex);
  1446. return ret;
  1447. }
  1448. static int ath9k_set_key(struct ieee80211_hw *hw,
  1449. enum set_key_cmd cmd,
  1450. struct ieee80211_vif *vif,
  1451. struct ieee80211_sta *sta,
  1452. struct ieee80211_key_conf *key)
  1453. {
  1454. struct ath_wiphy *aphy = hw->priv;
  1455. struct ath_softc *sc = aphy->sc;
  1456. struct ath_common *common = ath9k_hw_common(sc->sc_ah);
  1457. int ret = 0;
  1458. if (modparam_nohwcrypt)
  1459. return -ENOSPC;
  1460. mutex_lock(&sc->mutex);
  1461. ath9k_ps_wakeup(sc);
  1462. ath_print(common, ATH_DBG_CONFIG, "Set HW Key\n");
  1463. switch (cmd) {
  1464. case SET_KEY:
  1465. ret = ath_key_config(common, vif, sta, key);
  1466. if (ret >= 0) {
  1467. key->hw_key_idx = ret;
  1468. /* push IV and Michael MIC generation to stack */
  1469. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  1470. if (key->cipher == WLAN_CIPHER_SUITE_TKIP)
  1471. key->flags |= IEEE80211_KEY_FLAG_GENERATE_MMIC;
  1472. if (sc->sc_ah->sw_mgmt_crypto &&
  1473. key->cipher == WLAN_CIPHER_SUITE_CCMP)
  1474. key->flags |= IEEE80211_KEY_FLAG_SW_MGMT;
  1475. ret = 0;
  1476. }
  1477. break;
  1478. case DISABLE_KEY:
  1479. ath_key_delete(common, key);
  1480. break;
  1481. default:
  1482. ret = -EINVAL;
  1483. }
  1484. ath9k_ps_restore(sc);
  1485. mutex_unlock(&sc->mutex);
  1486. return ret;
  1487. }
  1488. static void ath9k_bss_info_changed(struct ieee80211_hw *hw,
  1489. struct ieee80211_vif *vif,
  1490. struct ieee80211_bss_conf *bss_conf,
  1491. u32 changed)
  1492. {
  1493. struct ath_wiphy *aphy = hw->priv;
  1494. struct ath_softc *sc = aphy->sc;
  1495. struct ath_hw *ah = sc->sc_ah;
  1496. struct ath_common *common = ath9k_hw_common(ah);
  1497. struct ath_vif *avp = (void *)vif->drv_priv;
  1498. int slottime;
  1499. int error;
  1500. mutex_lock(&sc->mutex);
  1501. if (changed & BSS_CHANGED_BSSID) {
  1502. /* Set BSSID */
  1503. memcpy(common->curbssid, bss_conf->bssid, ETH_ALEN);
  1504. memcpy(avp->bssid, bss_conf->bssid, ETH_ALEN);
  1505. common->curaid = 0;
  1506. ath9k_hw_write_associd(ah);
  1507. /* Set aggregation protection mode parameters */
  1508. sc->config.ath_aggr_prot = 0;
  1509. /* Only legacy IBSS for now */
  1510. if (vif->type == NL80211_IFTYPE_ADHOC)
  1511. ath_update_chainmask(sc, 0);
  1512. ath_print(common, ATH_DBG_CONFIG,
  1513. "BSSID: %pM aid: 0x%x\n",
  1514. common->curbssid, common->curaid);
  1515. /* need to reconfigure the beacon */
  1516. sc->sc_flags &= ~SC_OP_BEACONS ;
  1517. }
  1518. /* Enable transmission of beacons (AP, IBSS, MESH) */
  1519. if ((changed & BSS_CHANGED_BEACON) ||
  1520. ((changed & BSS_CHANGED_BEACON_ENABLED) && bss_conf->enable_beacon)) {
  1521. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1522. error = ath_beacon_alloc(aphy, vif);
  1523. if (!error)
  1524. ath_beacon_config(sc, vif);
  1525. }
  1526. if (changed & BSS_CHANGED_ERP_SLOT) {
  1527. if (bss_conf->use_short_slot)
  1528. slottime = 9;
  1529. else
  1530. slottime = 20;
  1531. if (vif->type == NL80211_IFTYPE_AP) {
  1532. /*
  1533. * Defer update, so that connected stations can adjust
  1534. * their settings at the same time.
  1535. * See beacon.c for more details
  1536. */
  1537. sc->beacon.slottime = slottime;
  1538. sc->beacon.updateslot = UPDATE;
  1539. } else {
  1540. ah->slottime = slottime;
  1541. ath9k_hw_init_global_settings(ah);
  1542. }
  1543. }
  1544. /* Disable transmission of beacons */
  1545. if ((changed & BSS_CHANGED_BEACON_ENABLED) && !bss_conf->enable_beacon)
  1546. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1547. if (changed & BSS_CHANGED_BEACON_INT) {
  1548. sc->beacon_interval = bss_conf->beacon_int;
  1549. /*
  1550. * In case of AP mode, the HW TSF has to be reset
  1551. * when the beacon interval changes.
  1552. */
  1553. if (vif->type == NL80211_IFTYPE_AP) {
  1554. sc->sc_flags |= SC_OP_TSF_RESET;
  1555. ath9k_hw_stoptxdma(sc->sc_ah, sc->beacon.beaconq);
  1556. error = ath_beacon_alloc(aphy, vif);
  1557. if (!error)
  1558. ath_beacon_config(sc, vif);
  1559. } else {
  1560. ath_beacon_config(sc, vif);
  1561. }
  1562. }
  1563. if (changed & BSS_CHANGED_ERP_PREAMBLE) {
  1564. ath_print(common, ATH_DBG_CONFIG, "BSS Changed PREAMBLE %d\n",
  1565. bss_conf->use_short_preamble);
  1566. if (bss_conf->use_short_preamble)
  1567. sc->sc_flags |= SC_OP_PREAMBLE_SHORT;
  1568. else
  1569. sc->sc_flags &= ~SC_OP_PREAMBLE_SHORT;
  1570. }
  1571. if (changed & BSS_CHANGED_ERP_CTS_PROT) {
  1572. ath_print(common, ATH_DBG_CONFIG, "BSS Changed CTS PROT %d\n",
  1573. bss_conf->use_cts_prot);
  1574. if (bss_conf->use_cts_prot &&
  1575. hw->conf.channel->band != IEEE80211_BAND_5GHZ)
  1576. sc->sc_flags |= SC_OP_PROTECT_ENABLE;
  1577. else
  1578. sc->sc_flags &= ~SC_OP_PROTECT_ENABLE;
  1579. }
  1580. if (changed & BSS_CHANGED_ASSOC) {
  1581. ath_print(common, ATH_DBG_CONFIG, "BSS Changed ASSOC %d\n",
  1582. bss_conf->assoc);
  1583. ath9k_bss_assoc_info(sc, vif, bss_conf);
  1584. }
  1585. mutex_unlock(&sc->mutex);
  1586. }
  1587. static u64 ath9k_get_tsf(struct ieee80211_hw *hw)
  1588. {
  1589. u64 tsf;
  1590. struct ath_wiphy *aphy = hw->priv;
  1591. struct ath_softc *sc = aphy->sc;
  1592. mutex_lock(&sc->mutex);
  1593. tsf = ath9k_hw_gettsf64(sc->sc_ah);
  1594. mutex_unlock(&sc->mutex);
  1595. return tsf;
  1596. }
  1597. static void ath9k_set_tsf(struct ieee80211_hw *hw, u64 tsf)
  1598. {
  1599. struct ath_wiphy *aphy = hw->priv;
  1600. struct ath_softc *sc = aphy->sc;
  1601. mutex_lock(&sc->mutex);
  1602. ath9k_hw_settsf64(sc->sc_ah, tsf);
  1603. mutex_unlock(&sc->mutex);
  1604. }
  1605. static void ath9k_reset_tsf(struct ieee80211_hw *hw)
  1606. {
  1607. struct ath_wiphy *aphy = hw->priv;
  1608. struct ath_softc *sc = aphy->sc;
  1609. mutex_lock(&sc->mutex);
  1610. ath9k_ps_wakeup(sc);
  1611. ath9k_hw_reset_tsf(sc->sc_ah);
  1612. ath9k_ps_restore(sc);
  1613. mutex_unlock(&sc->mutex);
  1614. }
  1615. static int ath9k_ampdu_action(struct ieee80211_hw *hw,
  1616. struct ieee80211_vif *vif,
  1617. enum ieee80211_ampdu_mlme_action action,
  1618. struct ieee80211_sta *sta,
  1619. u16 tid, u16 *ssn)
  1620. {
  1621. struct ath_wiphy *aphy = hw->priv;
  1622. struct ath_softc *sc = aphy->sc;
  1623. int ret = 0;
  1624. local_bh_disable();
  1625. switch (action) {
  1626. case IEEE80211_AMPDU_RX_START:
  1627. if (!(sc->sc_flags & SC_OP_RXAGGR))
  1628. ret = -ENOTSUPP;
  1629. break;
  1630. case IEEE80211_AMPDU_RX_STOP:
  1631. break;
  1632. case IEEE80211_AMPDU_TX_START:
  1633. ath9k_ps_wakeup(sc);
  1634. ret = ath_tx_aggr_start(sc, sta, tid, ssn);
  1635. if (!ret)
  1636. ieee80211_start_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1637. ath9k_ps_restore(sc);
  1638. break;
  1639. case IEEE80211_AMPDU_TX_STOP:
  1640. ath9k_ps_wakeup(sc);
  1641. ath_tx_aggr_stop(sc, sta, tid);
  1642. ieee80211_stop_tx_ba_cb_irqsafe(vif, sta->addr, tid);
  1643. ath9k_ps_restore(sc);
  1644. break;
  1645. case IEEE80211_AMPDU_TX_OPERATIONAL:
  1646. ath9k_ps_wakeup(sc);
  1647. ath_tx_aggr_resume(sc, sta, tid);
  1648. ath9k_ps_restore(sc);
  1649. break;
  1650. default:
  1651. ath_print(ath9k_hw_common(sc->sc_ah), ATH_DBG_FATAL,
  1652. "Unknown AMPDU action\n");
  1653. }
  1654. local_bh_enable();
  1655. return ret;
  1656. }
  1657. static int ath9k_get_survey(struct ieee80211_hw *hw, int idx,
  1658. struct survey_info *survey)
  1659. {
  1660. struct ath_wiphy *aphy = hw->priv;
  1661. struct ath_softc *sc = aphy->sc;
  1662. struct ath_hw *ah = sc->sc_ah;
  1663. struct ieee80211_supported_band *sband;
  1664. struct ath9k_channel *chan;
  1665. sband = hw->wiphy->bands[IEEE80211_BAND_2GHZ];
  1666. if (sband && idx >= sband->n_channels) {
  1667. idx -= sband->n_channels;
  1668. sband = NULL;
  1669. }
  1670. if (!sband)
  1671. sband = hw->wiphy->bands[IEEE80211_BAND_5GHZ];
  1672. if (!sband || idx >= sband->n_channels)
  1673. return -ENOENT;
  1674. survey->channel = &sband->channels[idx];
  1675. chan = &ah->channels[survey->channel->hw_value];
  1676. survey->filled = 0;
  1677. if (chan == ah->curchan)
  1678. survey->filled |= SURVEY_INFO_IN_USE;
  1679. if (chan->noisefloor) {
  1680. survey->filled |= SURVEY_INFO_NOISE_DBM;
  1681. survey->noise = chan->noisefloor;
  1682. }
  1683. return 0;
  1684. }
  1685. static void ath9k_sw_scan_start(struct ieee80211_hw *hw)
  1686. {
  1687. struct ath_wiphy *aphy = hw->priv;
  1688. struct ath_softc *sc = aphy->sc;
  1689. mutex_lock(&sc->mutex);
  1690. if (ath9k_wiphy_scanning(sc)) {
  1691. /*
  1692. * There is a race here in mac80211 but fixing it requires
  1693. * we revisit how we handle the scan complete callback.
  1694. * After mac80211 fixes we will not have configured hardware
  1695. * to the home channel nor would we have configured the RX
  1696. * filter yet.
  1697. */
  1698. mutex_unlock(&sc->mutex);
  1699. return;
  1700. }
  1701. aphy->state = ATH_WIPHY_SCAN;
  1702. ath9k_wiphy_pause_all_forced(sc, aphy);
  1703. mutex_unlock(&sc->mutex);
  1704. }
  1705. /*
  1706. * XXX: this requires a revisit after the driver
  1707. * scan_complete gets moved to another place/removed in mac80211.
  1708. */
  1709. static void ath9k_sw_scan_complete(struct ieee80211_hw *hw)
  1710. {
  1711. struct ath_wiphy *aphy = hw->priv;
  1712. struct ath_softc *sc = aphy->sc;
  1713. mutex_lock(&sc->mutex);
  1714. aphy->state = ATH_WIPHY_ACTIVE;
  1715. mutex_unlock(&sc->mutex);
  1716. }
  1717. static void ath9k_set_coverage_class(struct ieee80211_hw *hw, u8 coverage_class)
  1718. {
  1719. struct ath_wiphy *aphy = hw->priv;
  1720. struct ath_softc *sc = aphy->sc;
  1721. struct ath_hw *ah = sc->sc_ah;
  1722. mutex_lock(&sc->mutex);
  1723. ah->coverage_class = coverage_class;
  1724. ath9k_hw_init_global_settings(ah);
  1725. mutex_unlock(&sc->mutex);
  1726. }
  1727. struct ieee80211_ops ath9k_ops = {
  1728. .tx = ath9k_tx,
  1729. .start = ath9k_start,
  1730. .stop = ath9k_stop,
  1731. .add_interface = ath9k_add_interface,
  1732. .remove_interface = ath9k_remove_interface,
  1733. .config = ath9k_config,
  1734. .configure_filter = ath9k_configure_filter,
  1735. .sta_add = ath9k_sta_add,
  1736. .sta_remove = ath9k_sta_remove,
  1737. .conf_tx = ath9k_conf_tx,
  1738. .bss_info_changed = ath9k_bss_info_changed,
  1739. .set_key = ath9k_set_key,
  1740. .get_tsf = ath9k_get_tsf,
  1741. .set_tsf = ath9k_set_tsf,
  1742. .reset_tsf = ath9k_reset_tsf,
  1743. .ampdu_action = ath9k_ampdu_action,
  1744. .get_survey = ath9k_get_survey,
  1745. .sw_scan_start = ath9k_sw_scan_start,
  1746. .sw_scan_complete = ath9k_sw_scan_complete,
  1747. .rfkill_poll = ath9k_rfkill_poll_state,
  1748. .set_coverage_class = ath9k_set_coverage_class,
  1749. };