apply.c 30 KB

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  1. /*
  2. * Copyright (C) 2011 Texas Instruments
  3. * Author: Tomi Valkeinen <tomi.valkeinen@ti.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published by
  7. * the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #define DSS_SUBSYS_NAME "APPLY"
  18. #include <linux/kernel.h>
  19. #include <linux/slab.h>
  20. #include <linux/spinlock.h>
  21. #include <linux/jiffies.h>
  22. #include <video/omapdss.h>
  23. #include "dss.h"
  24. #include "dss_features.h"
  25. /*
  26. * We have 4 levels of cache for the dispc settings. First two are in SW and
  27. * the latter two in HW.
  28. *
  29. * set_info()
  30. * v
  31. * +--------------------+
  32. * | user_info |
  33. * +--------------------+
  34. * v
  35. * apply()
  36. * v
  37. * +--------------------+
  38. * | info |
  39. * +--------------------+
  40. * v
  41. * write_regs()
  42. * v
  43. * +--------------------+
  44. * | shadow registers |
  45. * +--------------------+
  46. * v
  47. * VFP or lcd/digit_enable
  48. * v
  49. * +--------------------+
  50. * | registers |
  51. * +--------------------+
  52. */
  53. struct ovl_priv_data {
  54. bool user_info_dirty;
  55. struct omap_overlay_info user_info;
  56. bool info_dirty;
  57. struct omap_overlay_info info;
  58. bool shadow_info_dirty;
  59. bool extra_info_dirty;
  60. bool shadow_extra_info_dirty;
  61. bool enabled;
  62. enum omap_channel channel;
  63. u32 fifo_low, fifo_high;
  64. /*
  65. * True if overlay is to be enabled. Used to check and calculate configs
  66. * for the overlay before it is enabled in the HW.
  67. */
  68. bool enabling;
  69. };
  70. struct mgr_priv_data {
  71. bool user_info_dirty;
  72. struct omap_overlay_manager_info user_info;
  73. bool info_dirty;
  74. struct omap_overlay_manager_info info;
  75. bool shadow_info_dirty;
  76. /* If true, GO bit is up and shadow registers cannot be written.
  77. * Never true for manual update displays */
  78. bool busy;
  79. /* If true, dispc output is enabled */
  80. bool updating;
  81. /* If true, a display is enabled using this manager */
  82. bool enabled;
  83. };
  84. static struct {
  85. struct ovl_priv_data ovl_priv_data_array[MAX_DSS_OVERLAYS];
  86. struct mgr_priv_data mgr_priv_data_array[MAX_DSS_MANAGERS];
  87. bool fifo_merge_dirty;
  88. bool fifo_merge;
  89. bool irq_enabled;
  90. } dss_data;
  91. /* protects dss_data */
  92. static spinlock_t data_lock;
  93. /* lock for blocking functions */
  94. static DEFINE_MUTEX(apply_lock);
  95. static DECLARE_COMPLETION(extra_updated_completion);
  96. static void dss_register_vsync_isr(void);
  97. static struct ovl_priv_data *get_ovl_priv(struct omap_overlay *ovl)
  98. {
  99. return &dss_data.ovl_priv_data_array[ovl->id];
  100. }
  101. static struct mgr_priv_data *get_mgr_priv(struct omap_overlay_manager *mgr)
  102. {
  103. return &dss_data.mgr_priv_data_array[mgr->id];
  104. }
  105. void dss_apply_init(void)
  106. {
  107. const int num_ovls = dss_feat_get_num_ovls();
  108. int i;
  109. spin_lock_init(&data_lock);
  110. for (i = 0; i < num_ovls; ++i) {
  111. struct ovl_priv_data *op;
  112. op = &dss_data.ovl_priv_data_array[i];
  113. op->info.global_alpha = 255;
  114. switch (i) {
  115. case 0:
  116. op->info.zorder = 0;
  117. break;
  118. case 1:
  119. op->info.zorder =
  120. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 3 : 0;
  121. break;
  122. case 2:
  123. op->info.zorder =
  124. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 2 : 0;
  125. break;
  126. case 3:
  127. op->info.zorder =
  128. dss_has_feature(FEAT_ALPHA_FREE_ZORDER) ? 1 : 0;
  129. break;
  130. }
  131. op->user_info = op->info;
  132. }
  133. }
  134. static bool ovl_manual_update(struct omap_overlay *ovl)
  135. {
  136. return ovl->manager->device->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE;
  137. }
  138. static bool mgr_manual_update(struct omap_overlay_manager *mgr)
  139. {
  140. return mgr->device->caps & OMAP_DSS_DISPLAY_CAP_MANUAL_UPDATE;
  141. }
  142. static int dss_check_settings_low(struct omap_overlay_manager *mgr,
  143. struct omap_dss_device *dssdev, bool applying)
  144. {
  145. struct omap_overlay_info *oi;
  146. struct omap_overlay_manager_info *mi;
  147. struct omap_overlay *ovl;
  148. struct omap_overlay_info *ois[MAX_DSS_OVERLAYS];
  149. struct ovl_priv_data *op;
  150. struct mgr_priv_data *mp;
  151. mp = get_mgr_priv(mgr);
  152. if (applying && mp->user_info_dirty)
  153. mi = &mp->user_info;
  154. else
  155. mi = &mp->info;
  156. /* collect the infos to be tested into the array */
  157. list_for_each_entry(ovl, &mgr->overlays, list) {
  158. op = get_ovl_priv(ovl);
  159. if (!op->enabled && !op->enabling)
  160. oi = NULL;
  161. else if (applying && op->user_info_dirty)
  162. oi = &op->user_info;
  163. else
  164. oi = &op->info;
  165. ois[ovl->id] = oi;
  166. }
  167. return dss_mgr_check(mgr, dssdev, mi, ois);
  168. }
  169. /*
  170. * check manager and overlay settings using overlay_info from data->info
  171. */
  172. static int dss_check_settings(struct omap_overlay_manager *mgr,
  173. struct omap_dss_device *dssdev)
  174. {
  175. return dss_check_settings_low(mgr, dssdev, false);
  176. }
  177. /*
  178. * check manager and overlay settings using overlay_info from ovl->info if
  179. * dirty and from data->info otherwise
  180. */
  181. static int dss_check_settings_apply(struct omap_overlay_manager *mgr,
  182. struct omap_dss_device *dssdev)
  183. {
  184. return dss_check_settings_low(mgr, dssdev, true);
  185. }
  186. static bool need_isr(void)
  187. {
  188. const int num_mgrs = dss_feat_get_num_mgrs();
  189. int i;
  190. for (i = 0; i < num_mgrs; ++i) {
  191. struct omap_overlay_manager *mgr;
  192. struct mgr_priv_data *mp;
  193. struct omap_overlay *ovl;
  194. mgr = omap_dss_get_overlay_manager(i);
  195. mp = get_mgr_priv(mgr);
  196. if (!mp->enabled)
  197. continue;
  198. if (mgr_manual_update(mgr)) {
  199. /* to catch FRAMEDONE */
  200. if (mp->updating)
  201. return true;
  202. } else {
  203. /* to catch GO bit going down */
  204. if (mp->busy)
  205. return true;
  206. /* to write new values to registers */
  207. if (mp->info_dirty)
  208. return true;
  209. /* to set GO bit */
  210. if (mp->shadow_info_dirty)
  211. return true;
  212. list_for_each_entry(ovl, &mgr->overlays, list) {
  213. struct ovl_priv_data *op;
  214. op = get_ovl_priv(ovl);
  215. /*
  216. * NOTE: we check extra_info flags even for
  217. * disabled overlays, as extra_infos need to be
  218. * always written.
  219. */
  220. /* to write new values to registers */
  221. if (op->extra_info_dirty)
  222. return true;
  223. /* to set GO bit */
  224. if (op->shadow_extra_info_dirty)
  225. return true;
  226. if (!op->enabled)
  227. continue;
  228. /* to write new values to registers */
  229. if (op->info_dirty)
  230. return true;
  231. /* to set GO bit */
  232. if (op->shadow_info_dirty)
  233. return true;
  234. }
  235. }
  236. }
  237. return false;
  238. }
  239. static bool need_go(struct omap_overlay_manager *mgr)
  240. {
  241. struct omap_overlay *ovl;
  242. struct mgr_priv_data *mp;
  243. struct ovl_priv_data *op;
  244. mp = get_mgr_priv(mgr);
  245. if (mp->shadow_info_dirty)
  246. return true;
  247. list_for_each_entry(ovl, &mgr->overlays, list) {
  248. op = get_ovl_priv(ovl);
  249. if (op->shadow_info_dirty || op->shadow_extra_info_dirty)
  250. return true;
  251. }
  252. return false;
  253. }
  254. /* returns true if an extra_info field is currently being updated */
  255. static bool extra_info_update_ongoing(void)
  256. {
  257. const int num_ovls = omap_dss_get_num_overlays();
  258. struct ovl_priv_data *op;
  259. struct omap_overlay *ovl;
  260. struct mgr_priv_data *mp;
  261. int i;
  262. for (i = 0; i < num_ovls; ++i) {
  263. ovl = omap_dss_get_overlay(i);
  264. op = get_ovl_priv(ovl);
  265. if (!ovl->manager)
  266. continue;
  267. mp = get_mgr_priv(ovl->manager);
  268. if (!mp->enabled)
  269. continue;
  270. if (!mp->updating)
  271. continue;
  272. if (op->extra_info_dirty || op->shadow_extra_info_dirty)
  273. return true;
  274. }
  275. return false;
  276. }
  277. /* wait until no extra_info updates are pending */
  278. static void wait_pending_extra_info_updates(void)
  279. {
  280. bool updating;
  281. unsigned long flags;
  282. unsigned long t;
  283. spin_lock_irqsave(&data_lock, flags);
  284. updating = extra_info_update_ongoing();
  285. if (!updating) {
  286. spin_unlock_irqrestore(&data_lock, flags);
  287. return;
  288. }
  289. init_completion(&extra_updated_completion);
  290. spin_unlock_irqrestore(&data_lock, flags);
  291. t = msecs_to_jiffies(500);
  292. wait_for_completion_timeout(&extra_updated_completion, t);
  293. updating = extra_info_update_ongoing();
  294. WARN_ON(updating);
  295. }
  296. int dss_mgr_wait_for_go(struct omap_overlay_manager *mgr)
  297. {
  298. unsigned long timeout = msecs_to_jiffies(500);
  299. struct mgr_priv_data *mp;
  300. u32 irq;
  301. int r;
  302. int i;
  303. struct omap_dss_device *dssdev = mgr->device;
  304. if (!dssdev || dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
  305. return 0;
  306. if (mgr_manual_update(mgr))
  307. return 0;
  308. irq = dispc_mgr_get_vsync_irq(mgr->id);
  309. mp = get_mgr_priv(mgr);
  310. i = 0;
  311. while (1) {
  312. unsigned long flags;
  313. bool shadow_dirty, dirty;
  314. spin_lock_irqsave(&data_lock, flags);
  315. dirty = mp->info_dirty;
  316. shadow_dirty = mp->shadow_info_dirty;
  317. spin_unlock_irqrestore(&data_lock, flags);
  318. if (!dirty && !shadow_dirty) {
  319. r = 0;
  320. break;
  321. }
  322. /* 4 iterations is the worst case:
  323. * 1 - initial iteration, dirty = true (between VFP and VSYNC)
  324. * 2 - first VSYNC, dirty = true
  325. * 3 - dirty = false, shadow_dirty = true
  326. * 4 - shadow_dirty = false */
  327. if (i++ == 3) {
  328. DSSERR("mgr(%d)->wait_for_go() not finishing\n",
  329. mgr->id);
  330. r = 0;
  331. break;
  332. }
  333. r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
  334. if (r == -ERESTARTSYS)
  335. break;
  336. if (r) {
  337. DSSERR("mgr(%d)->wait_for_go() timeout\n", mgr->id);
  338. break;
  339. }
  340. }
  341. return r;
  342. }
  343. int dss_mgr_wait_for_go_ovl(struct omap_overlay *ovl)
  344. {
  345. unsigned long timeout = msecs_to_jiffies(500);
  346. struct ovl_priv_data *op;
  347. struct omap_dss_device *dssdev;
  348. u32 irq;
  349. int r;
  350. int i;
  351. if (!ovl->manager)
  352. return 0;
  353. dssdev = ovl->manager->device;
  354. if (!dssdev || dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
  355. return 0;
  356. if (ovl_manual_update(ovl))
  357. return 0;
  358. irq = dispc_mgr_get_vsync_irq(ovl->manager->id);
  359. op = get_ovl_priv(ovl);
  360. i = 0;
  361. while (1) {
  362. unsigned long flags;
  363. bool shadow_dirty, dirty;
  364. spin_lock_irqsave(&data_lock, flags);
  365. dirty = op->info_dirty;
  366. shadow_dirty = op->shadow_info_dirty;
  367. spin_unlock_irqrestore(&data_lock, flags);
  368. if (!dirty && !shadow_dirty) {
  369. r = 0;
  370. break;
  371. }
  372. /* 4 iterations is the worst case:
  373. * 1 - initial iteration, dirty = true (between VFP and VSYNC)
  374. * 2 - first VSYNC, dirty = true
  375. * 3 - dirty = false, shadow_dirty = true
  376. * 4 - shadow_dirty = false */
  377. if (i++ == 3) {
  378. DSSERR("ovl(%d)->wait_for_go() not finishing\n",
  379. ovl->id);
  380. r = 0;
  381. break;
  382. }
  383. r = omap_dispc_wait_for_irq_interruptible_timeout(irq, timeout);
  384. if (r == -ERESTARTSYS)
  385. break;
  386. if (r) {
  387. DSSERR("ovl(%d)->wait_for_go() timeout\n", ovl->id);
  388. break;
  389. }
  390. }
  391. return r;
  392. }
  393. static void dss_ovl_write_regs(struct omap_overlay *ovl)
  394. {
  395. struct ovl_priv_data *op = get_ovl_priv(ovl);
  396. struct omap_overlay_info *oi;
  397. bool ilace, replication;
  398. struct mgr_priv_data *mp;
  399. int r;
  400. DSSDBGF("%d", ovl->id);
  401. if (!op->enabled || !op->info_dirty)
  402. return;
  403. oi = &op->info;
  404. replication = dss_use_replication(ovl->manager->device, oi->color_mode);
  405. ilace = ovl->manager->device->type == OMAP_DISPLAY_TYPE_VENC;
  406. r = dispc_ovl_setup(ovl->id, oi, ilace, replication);
  407. if (r) {
  408. /*
  409. * We can't do much here, as this function can be called from
  410. * vsync interrupt.
  411. */
  412. DSSERR("dispc_ovl_setup failed for ovl %d\n", ovl->id);
  413. /* This will leave fifo configurations in a nonoptimal state */
  414. op->enabled = false;
  415. dispc_ovl_enable(ovl->id, false);
  416. return;
  417. }
  418. mp = get_mgr_priv(ovl->manager);
  419. op->info_dirty = false;
  420. if (mp->updating)
  421. op->shadow_info_dirty = true;
  422. }
  423. static void dss_ovl_write_regs_extra(struct omap_overlay *ovl)
  424. {
  425. struct ovl_priv_data *op = get_ovl_priv(ovl);
  426. struct mgr_priv_data *mp;
  427. DSSDBGF("%d", ovl->id);
  428. if (!op->extra_info_dirty)
  429. return;
  430. /* note: write also when op->enabled == false, so that the ovl gets
  431. * disabled */
  432. dispc_ovl_enable(ovl->id, op->enabled);
  433. dispc_ovl_set_channel_out(ovl->id, op->channel);
  434. dispc_ovl_set_fifo_threshold(ovl->id, op->fifo_low, op->fifo_high);
  435. mp = get_mgr_priv(ovl->manager);
  436. op->extra_info_dirty = false;
  437. if (mp->updating)
  438. op->shadow_extra_info_dirty = true;
  439. }
  440. static void dss_mgr_write_regs(struct omap_overlay_manager *mgr)
  441. {
  442. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  443. struct omap_overlay *ovl;
  444. DSSDBGF("%d", mgr->id);
  445. if (!mp->enabled)
  446. return;
  447. WARN_ON(mp->busy);
  448. /* Commit overlay settings */
  449. list_for_each_entry(ovl, &mgr->overlays, list) {
  450. dss_ovl_write_regs(ovl);
  451. dss_ovl_write_regs_extra(ovl);
  452. }
  453. if (mp->info_dirty) {
  454. dispc_mgr_setup(mgr->id, &mp->info);
  455. mp->info_dirty = false;
  456. if (mp->updating)
  457. mp->shadow_info_dirty = true;
  458. }
  459. }
  460. static void dss_write_regs_common(void)
  461. {
  462. const int num_mgrs = omap_dss_get_num_overlay_managers();
  463. int i;
  464. if (!dss_data.fifo_merge_dirty)
  465. return;
  466. for (i = 0; i < num_mgrs; ++i) {
  467. struct omap_overlay_manager *mgr;
  468. struct mgr_priv_data *mp;
  469. mgr = omap_dss_get_overlay_manager(i);
  470. mp = get_mgr_priv(mgr);
  471. if (mp->enabled) {
  472. if (dss_data.fifo_merge_dirty) {
  473. dispc_enable_fifomerge(dss_data.fifo_merge);
  474. dss_data.fifo_merge_dirty = false;
  475. }
  476. if (mp->updating)
  477. mp->shadow_info_dirty = true;
  478. }
  479. }
  480. }
  481. static void dss_write_regs(void)
  482. {
  483. const int num_mgrs = omap_dss_get_num_overlay_managers();
  484. int i;
  485. dss_write_regs_common();
  486. for (i = 0; i < num_mgrs; ++i) {
  487. struct omap_overlay_manager *mgr;
  488. struct mgr_priv_data *mp;
  489. int r;
  490. mgr = omap_dss_get_overlay_manager(i);
  491. mp = get_mgr_priv(mgr);
  492. if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
  493. continue;
  494. r = dss_check_settings(mgr, mgr->device);
  495. if (r) {
  496. DSSERR("cannot write registers for manager %s: "
  497. "illegal configuration\n", mgr->name);
  498. continue;
  499. }
  500. dss_mgr_write_regs(mgr);
  501. }
  502. }
  503. static void dss_set_go_bits(void)
  504. {
  505. const int num_mgrs = omap_dss_get_num_overlay_managers();
  506. int i;
  507. for (i = 0; i < num_mgrs; ++i) {
  508. struct omap_overlay_manager *mgr;
  509. struct mgr_priv_data *mp;
  510. mgr = omap_dss_get_overlay_manager(i);
  511. mp = get_mgr_priv(mgr);
  512. if (!mp->enabled || mgr_manual_update(mgr) || mp->busy)
  513. continue;
  514. if (!need_go(mgr))
  515. continue;
  516. mp->busy = true;
  517. if (!dss_data.irq_enabled && need_isr())
  518. dss_register_vsync_isr();
  519. dispc_mgr_go(mgr->id);
  520. }
  521. }
  522. void dss_mgr_start_update(struct omap_overlay_manager *mgr)
  523. {
  524. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  525. unsigned long flags;
  526. int r;
  527. spin_lock_irqsave(&data_lock, flags);
  528. WARN_ON(mp->updating);
  529. r = dss_check_settings(mgr, mgr->device);
  530. if (r) {
  531. DSSERR("cannot start manual update: illegal configuration\n");
  532. spin_unlock_irqrestore(&data_lock, flags);
  533. return;
  534. }
  535. dss_mgr_write_regs(mgr);
  536. dss_write_regs_common();
  537. mp->updating = true;
  538. if (!dss_data.irq_enabled && need_isr())
  539. dss_register_vsync_isr();
  540. dispc_mgr_enable(mgr->id, true);
  541. spin_unlock_irqrestore(&data_lock, flags);
  542. }
  543. static void dss_apply_irq_handler(void *data, u32 mask);
  544. static void dss_register_vsync_isr(void)
  545. {
  546. const int num_mgrs = dss_feat_get_num_mgrs();
  547. u32 mask;
  548. int r, i;
  549. mask = 0;
  550. for (i = 0; i < num_mgrs; ++i)
  551. mask |= dispc_mgr_get_vsync_irq(i);
  552. for (i = 0; i < num_mgrs; ++i)
  553. mask |= dispc_mgr_get_framedone_irq(i);
  554. r = omap_dispc_register_isr(dss_apply_irq_handler, NULL, mask);
  555. WARN_ON(r);
  556. dss_data.irq_enabled = true;
  557. }
  558. static void dss_unregister_vsync_isr(void)
  559. {
  560. const int num_mgrs = dss_feat_get_num_mgrs();
  561. u32 mask;
  562. int r, i;
  563. mask = 0;
  564. for (i = 0; i < num_mgrs; ++i)
  565. mask |= dispc_mgr_get_vsync_irq(i);
  566. for (i = 0; i < num_mgrs; ++i)
  567. mask |= dispc_mgr_get_framedone_irq(i);
  568. r = omap_dispc_unregister_isr(dss_apply_irq_handler, NULL, mask);
  569. WARN_ON(r);
  570. dss_data.irq_enabled = false;
  571. }
  572. static void mgr_clear_shadow_dirty(struct omap_overlay_manager *mgr)
  573. {
  574. struct omap_overlay *ovl;
  575. struct mgr_priv_data *mp;
  576. struct ovl_priv_data *op;
  577. mp = get_mgr_priv(mgr);
  578. mp->shadow_info_dirty = false;
  579. list_for_each_entry(ovl, &mgr->overlays, list) {
  580. op = get_ovl_priv(ovl);
  581. op->shadow_info_dirty = false;
  582. op->shadow_extra_info_dirty = false;
  583. }
  584. }
  585. static void dss_apply_irq_handler(void *data, u32 mask)
  586. {
  587. const int num_mgrs = dss_feat_get_num_mgrs();
  588. int i;
  589. bool extra_updating;
  590. spin_lock(&data_lock);
  591. /* clear busy, updating flags, shadow_dirty flags */
  592. for (i = 0; i < num_mgrs; i++) {
  593. struct omap_overlay_manager *mgr;
  594. struct mgr_priv_data *mp;
  595. bool was_updating;
  596. mgr = omap_dss_get_overlay_manager(i);
  597. mp = get_mgr_priv(mgr);
  598. if (!mp->enabled)
  599. continue;
  600. was_updating = mp->updating;
  601. mp->updating = dispc_mgr_is_enabled(i);
  602. if (!mgr_manual_update(mgr)) {
  603. bool was_busy = mp->busy;
  604. mp->busy = dispc_mgr_go_busy(i);
  605. if (was_busy && !mp->busy)
  606. mgr_clear_shadow_dirty(mgr);
  607. } else {
  608. if (was_updating && !mp->updating)
  609. mgr_clear_shadow_dirty(mgr);
  610. }
  611. }
  612. dss_write_regs();
  613. dss_set_go_bits();
  614. extra_updating = extra_info_update_ongoing();
  615. if (!extra_updating)
  616. complete_all(&extra_updated_completion);
  617. if (!need_isr())
  618. dss_unregister_vsync_isr();
  619. spin_unlock(&data_lock);
  620. }
  621. static void omap_dss_mgr_apply_ovl(struct omap_overlay *ovl)
  622. {
  623. struct ovl_priv_data *op;
  624. op = get_ovl_priv(ovl);
  625. if (!op->user_info_dirty)
  626. return;
  627. op->user_info_dirty = false;
  628. op->info_dirty = true;
  629. op->info = op->user_info;
  630. }
  631. static void omap_dss_mgr_apply_mgr(struct omap_overlay_manager *mgr)
  632. {
  633. struct mgr_priv_data *mp;
  634. mp = get_mgr_priv(mgr);
  635. if (!mp->user_info_dirty)
  636. return;
  637. mp->user_info_dirty = false;
  638. mp->info_dirty = true;
  639. mp->info = mp->user_info;
  640. }
  641. int omap_dss_mgr_apply(struct omap_overlay_manager *mgr)
  642. {
  643. unsigned long flags;
  644. struct omap_overlay *ovl;
  645. int r;
  646. DSSDBG("omap_dss_mgr_apply(%s)\n", mgr->name);
  647. spin_lock_irqsave(&data_lock, flags);
  648. r = dss_check_settings_apply(mgr, mgr->device);
  649. if (r) {
  650. spin_unlock_irqrestore(&data_lock, flags);
  651. DSSERR("failed to apply settings: illegal configuration.\n");
  652. return r;
  653. }
  654. /* Configure overlays */
  655. list_for_each_entry(ovl, &mgr->overlays, list)
  656. omap_dss_mgr_apply_ovl(ovl);
  657. /* Configure manager */
  658. omap_dss_mgr_apply_mgr(mgr);
  659. dss_write_regs();
  660. dss_set_go_bits();
  661. spin_unlock_irqrestore(&data_lock, flags);
  662. return 0;
  663. }
  664. static void dss_apply_ovl_enable(struct omap_overlay *ovl, bool enable)
  665. {
  666. struct ovl_priv_data *op;
  667. op = get_ovl_priv(ovl);
  668. if (op->enabled == enable)
  669. return;
  670. op->enabled = enable;
  671. op->extra_info_dirty = true;
  672. }
  673. static void dss_apply_ovl_fifo_thresholds(struct omap_overlay *ovl,
  674. u32 fifo_low, u32 fifo_high)
  675. {
  676. struct ovl_priv_data *op = get_ovl_priv(ovl);
  677. if (op->fifo_low == fifo_low && op->fifo_high == fifo_high)
  678. return;
  679. op->fifo_low = fifo_low;
  680. op->fifo_high = fifo_high;
  681. op->extra_info_dirty = true;
  682. }
  683. static void dss_apply_fifo_merge(bool use_fifo_merge)
  684. {
  685. if (dss_data.fifo_merge == use_fifo_merge)
  686. return;
  687. dss_data.fifo_merge = use_fifo_merge;
  688. dss_data.fifo_merge_dirty = true;
  689. }
  690. static void dss_ovl_setup_fifo(struct omap_overlay *ovl,
  691. bool use_fifo_merge)
  692. {
  693. struct ovl_priv_data *op = get_ovl_priv(ovl);
  694. struct omap_dss_device *dssdev;
  695. u32 fifo_low, fifo_high;
  696. if (!op->enabled && !op->enabling)
  697. return;
  698. dssdev = ovl->manager->device;
  699. dispc_ovl_compute_fifo_thresholds(ovl->id, &fifo_low, &fifo_high,
  700. use_fifo_merge);
  701. dss_apply_ovl_fifo_thresholds(ovl, fifo_low, fifo_high);
  702. }
  703. static void dss_mgr_setup_fifos(struct omap_overlay_manager *mgr,
  704. bool use_fifo_merge)
  705. {
  706. struct omap_overlay *ovl;
  707. struct mgr_priv_data *mp;
  708. mp = get_mgr_priv(mgr);
  709. if (!mp->enabled)
  710. return;
  711. list_for_each_entry(ovl, &mgr->overlays, list)
  712. dss_ovl_setup_fifo(ovl, use_fifo_merge);
  713. }
  714. static void dss_setup_fifos(bool use_fifo_merge)
  715. {
  716. const int num_mgrs = omap_dss_get_num_overlay_managers();
  717. struct omap_overlay_manager *mgr;
  718. int i;
  719. for (i = 0; i < num_mgrs; ++i) {
  720. mgr = omap_dss_get_overlay_manager(i);
  721. dss_mgr_setup_fifos(mgr, use_fifo_merge);
  722. }
  723. }
  724. static int get_num_used_managers(void)
  725. {
  726. const int num_mgrs = omap_dss_get_num_overlay_managers();
  727. struct omap_overlay_manager *mgr;
  728. struct mgr_priv_data *mp;
  729. int i;
  730. int enabled_mgrs;
  731. enabled_mgrs = 0;
  732. for (i = 0; i < num_mgrs; ++i) {
  733. mgr = omap_dss_get_overlay_manager(i);
  734. mp = get_mgr_priv(mgr);
  735. if (!mp->enabled)
  736. continue;
  737. enabled_mgrs++;
  738. }
  739. return enabled_mgrs;
  740. }
  741. static int get_num_used_overlays(void)
  742. {
  743. const int num_ovls = omap_dss_get_num_overlays();
  744. struct omap_overlay *ovl;
  745. struct ovl_priv_data *op;
  746. struct mgr_priv_data *mp;
  747. int i;
  748. int enabled_ovls;
  749. enabled_ovls = 0;
  750. for (i = 0; i < num_ovls; ++i) {
  751. ovl = omap_dss_get_overlay(i);
  752. op = get_ovl_priv(ovl);
  753. if (!op->enabled && !op->enabling)
  754. continue;
  755. mp = get_mgr_priv(ovl->manager);
  756. if (!mp->enabled)
  757. continue;
  758. enabled_ovls++;
  759. }
  760. return enabled_ovls;
  761. }
  762. static bool get_use_fifo_merge(void)
  763. {
  764. int enabled_mgrs = get_num_used_managers();
  765. int enabled_ovls = get_num_used_overlays();
  766. if (!dss_has_feature(FEAT_FIFO_MERGE))
  767. return false;
  768. /*
  769. * In theory the only requirement for fifomerge is enabled_ovls <= 1.
  770. * However, if we have two managers enabled and set/unset the fifomerge,
  771. * we need to set the GO bits in particular sequence for the managers,
  772. * and wait in between.
  773. *
  774. * This is rather difficult as new apply calls can happen at any time,
  775. * so we simplify the problem by requiring also that enabled_mgrs <= 1.
  776. * In practice this shouldn't matter, because when only one overlay is
  777. * enabled, most likely only one output is enabled.
  778. */
  779. return enabled_mgrs <= 1 && enabled_ovls <= 1;
  780. }
  781. int dss_mgr_enable(struct omap_overlay_manager *mgr)
  782. {
  783. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  784. unsigned long flags;
  785. int r;
  786. bool fifo_merge;
  787. mutex_lock(&apply_lock);
  788. if (mp->enabled)
  789. goto out;
  790. spin_lock_irqsave(&data_lock, flags);
  791. mp->enabled = true;
  792. r = dss_check_settings(mgr, mgr->device);
  793. if (r) {
  794. DSSERR("failed to enable manager %d: check_settings failed\n",
  795. mgr->id);
  796. goto err;
  797. }
  798. /* step 1: setup fifos/fifomerge before enabling the manager */
  799. fifo_merge = get_use_fifo_merge();
  800. dss_setup_fifos(fifo_merge);
  801. dss_apply_fifo_merge(fifo_merge);
  802. dss_write_regs();
  803. dss_set_go_bits();
  804. spin_unlock_irqrestore(&data_lock, flags);
  805. /* wait until fifo config is in */
  806. wait_pending_extra_info_updates();
  807. /* step 2: enable the manager */
  808. spin_lock_irqsave(&data_lock, flags);
  809. if (!mgr_manual_update(mgr))
  810. mp->updating = true;
  811. spin_unlock_irqrestore(&data_lock, flags);
  812. if (!mgr_manual_update(mgr))
  813. dispc_mgr_enable(mgr->id, true);
  814. out:
  815. mutex_unlock(&apply_lock);
  816. return 0;
  817. err:
  818. mp->enabled = false;
  819. spin_unlock_irqrestore(&data_lock, flags);
  820. mutex_unlock(&apply_lock);
  821. return r;
  822. }
  823. void dss_mgr_disable(struct omap_overlay_manager *mgr)
  824. {
  825. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  826. unsigned long flags;
  827. bool fifo_merge;
  828. mutex_lock(&apply_lock);
  829. if (!mp->enabled)
  830. goto out;
  831. if (!mgr_manual_update(mgr))
  832. dispc_mgr_enable(mgr->id, false);
  833. spin_lock_irqsave(&data_lock, flags);
  834. mp->updating = false;
  835. mp->enabled = false;
  836. fifo_merge = get_use_fifo_merge();
  837. dss_setup_fifos(fifo_merge);
  838. dss_apply_fifo_merge(fifo_merge);
  839. dss_write_regs();
  840. dss_set_go_bits();
  841. spin_unlock_irqrestore(&data_lock, flags);
  842. wait_pending_extra_info_updates();
  843. out:
  844. mutex_unlock(&apply_lock);
  845. }
  846. int dss_mgr_set_info(struct omap_overlay_manager *mgr,
  847. struct omap_overlay_manager_info *info)
  848. {
  849. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  850. unsigned long flags;
  851. int r;
  852. r = dss_mgr_simple_check(mgr, info);
  853. if (r)
  854. return r;
  855. spin_lock_irqsave(&data_lock, flags);
  856. mp->user_info = *info;
  857. mp->user_info_dirty = true;
  858. spin_unlock_irqrestore(&data_lock, flags);
  859. return 0;
  860. }
  861. void dss_mgr_get_info(struct omap_overlay_manager *mgr,
  862. struct omap_overlay_manager_info *info)
  863. {
  864. struct mgr_priv_data *mp = get_mgr_priv(mgr);
  865. unsigned long flags;
  866. spin_lock_irqsave(&data_lock, flags);
  867. *info = mp->user_info;
  868. spin_unlock_irqrestore(&data_lock, flags);
  869. }
  870. int dss_mgr_set_device(struct omap_overlay_manager *mgr,
  871. struct omap_dss_device *dssdev)
  872. {
  873. int r;
  874. mutex_lock(&apply_lock);
  875. if (dssdev->manager) {
  876. DSSERR("display '%s' already has a manager '%s'\n",
  877. dssdev->name, dssdev->manager->name);
  878. r = -EINVAL;
  879. goto err;
  880. }
  881. if ((mgr->supported_displays & dssdev->type) == 0) {
  882. DSSERR("display '%s' does not support manager '%s'\n",
  883. dssdev->name, mgr->name);
  884. r = -EINVAL;
  885. goto err;
  886. }
  887. dssdev->manager = mgr;
  888. mgr->device = dssdev;
  889. mutex_unlock(&apply_lock);
  890. return 0;
  891. err:
  892. mutex_unlock(&apply_lock);
  893. return r;
  894. }
  895. int dss_mgr_unset_device(struct omap_overlay_manager *mgr)
  896. {
  897. int r;
  898. mutex_lock(&apply_lock);
  899. if (!mgr->device) {
  900. DSSERR("failed to unset display, display not set.\n");
  901. r = -EINVAL;
  902. goto err;
  903. }
  904. /*
  905. * Don't allow currently enabled displays to have the overlay manager
  906. * pulled out from underneath them
  907. */
  908. if (mgr->device->state != OMAP_DSS_DISPLAY_DISABLED) {
  909. r = -EINVAL;
  910. goto err;
  911. }
  912. mgr->device->manager = NULL;
  913. mgr->device = NULL;
  914. mutex_unlock(&apply_lock);
  915. return 0;
  916. err:
  917. mutex_unlock(&apply_lock);
  918. return r;
  919. }
  920. int dss_ovl_set_info(struct omap_overlay *ovl,
  921. struct omap_overlay_info *info)
  922. {
  923. struct ovl_priv_data *op = get_ovl_priv(ovl);
  924. unsigned long flags;
  925. int r;
  926. r = dss_ovl_simple_check(ovl, info);
  927. if (r)
  928. return r;
  929. spin_lock_irqsave(&data_lock, flags);
  930. op->user_info = *info;
  931. op->user_info_dirty = true;
  932. spin_unlock_irqrestore(&data_lock, flags);
  933. return 0;
  934. }
  935. void dss_ovl_get_info(struct omap_overlay *ovl,
  936. struct omap_overlay_info *info)
  937. {
  938. struct ovl_priv_data *op = get_ovl_priv(ovl);
  939. unsigned long flags;
  940. spin_lock_irqsave(&data_lock, flags);
  941. *info = op->user_info;
  942. spin_unlock_irqrestore(&data_lock, flags);
  943. }
  944. int dss_ovl_set_manager(struct omap_overlay *ovl,
  945. struct omap_overlay_manager *mgr)
  946. {
  947. struct ovl_priv_data *op = get_ovl_priv(ovl);
  948. unsigned long flags;
  949. int r;
  950. if (!mgr)
  951. return -EINVAL;
  952. mutex_lock(&apply_lock);
  953. if (ovl->manager) {
  954. DSSERR("overlay '%s' already has a manager '%s'\n",
  955. ovl->name, ovl->manager->name);
  956. r = -EINVAL;
  957. goto err;
  958. }
  959. spin_lock_irqsave(&data_lock, flags);
  960. if (op->enabled) {
  961. spin_unlock_irqrestore(&data_lock, flags);
  962. DSSERR("overlay has to be disabled to change the manager\n");
  963. r = -EINVAL;
  964. goto err;
  965. }
  966. op->channel = mgr->id;
  967. op->extra_info_dirty = true;
  968. ovl->manager = mgr;
  969. list_add_tail(&ovl->list, &mgr->overlays);
  970. spin_unlock_irqrestore(&data_lock, flags);
  971. /* XXX: When there is an overlay on a DSI manual update display, and
  972. * the overlay is first disabled, then moved to tv, and enabled, we
  973. * seem to get SYNC_LOST_DIGIT error.
  974. *
  975. * Waiting doesn't seem to help, but updating the manual update display
  976. * after disabling the overlay seems to fix this. This hints that the
  977. * overlay is perhaps somehow tied to the LCD output until the output
  978. * is updated.
  979. *
  980. * Userspace workaround for this is to update the LCD after disabling
  981. * the overlay, but before moving the overlay to TV.
  982. */
  983. mutex_unlock(&apply_lock);
  984. return 0;
  985. err:
  986. mutex_unlock(&apply_lock);
  987. return r;
  988. }
  989. int dss_ovl_unset_manager(struct omap_overlay *ovl)
  990. {
  991. struct ovl_priv_data *op = get_ovl_priv(ovl);
  992. unsigned long flags;
  993. int r;
  994. mutex_lock(&apply_lock);
  995. if (!ovl->manager) {
  996. DSSERR("failed to detach overlay: manager not set\n");
  997. r = -EINVAL;
  998. goto err;
  999. }
  1000. spin_lock_irqsave(&data_lock, flags);
  1001. if (op->enabled) {
  1002. spin_unlock_irqrestore(&data_lock, flags);
  1003. DSSERR("overlay has to be disabled to unset the manager\n");
  1004. r = -EINVAL;
  1005. goto err;
  1006. }
  1007. op->channel = -1;
  1008. ovl->manager = NULL;
  1009. list_del(&ovl->list);
  1010. spin_unlock_irqrestore(&data_lock, flags);
  1011. mutex_unlock(&apply_lock);
  1012. return 0;
  1013. err:
  1014. mutex_unlock(&apply_lock);
  1015. return r;
  1016. }
  1017. bool dss_ovl_is_enabled(struct omap_overlay *ovl)
  1018. {
  1019. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1020. unsigned long flags;
  1021. bool e;
  1022. spin_lock_irqsave(&data_lock, flags);
  1023. e = op->enabled;
  1024. spin_unlock_irqrestore(&data_lock, flags);
  1025. return e;
  1026. }
  1027. int dss_ovl_enable(struct omap_overlay *ovl)
  1028. {
  1029. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1030. unsigned long flags;
  1031. bool fifo_merge;
  1032. int r;
  1033. mutex_lock(&apply_lock);
  1034. if (op->enabled) {
  1035. r = 0;
  1036. goto err1;
  1037. }
  1038. if (ovl->manager == NULL || ovl->manager->device == NULL) {
  1039. r = -EINVAL;
  1040. goto err1;
  1041. }
  1042. spin_lock_irqsave(&data_lock, flags);
  1043. op->enabling = true;
  1044. r = dss_check_settings(ovl->manager, ovl->manager->device);
  1045. if (r) {
  1046. DSSERR("failed to enable overlay %d: check_settings failed\n",
  1047. ovl->id);
  1048. goto err2;
  1049. }
  1050. /* step 1: configure fifos/fifomerge for currently enabled ovls */
  1051. fifo_merge = get_use_fifo_merge();
  1052. dss_setup_fifos(fifo_merge);
  1053. dss_apply_fifo_merge(fifo_merge);
  1054. dss_write_regs();
  1055. dss_set_go_bits();
  1056. spin_unlock_irqrestore(&data_lock, flags);
  1057. /* wait for fifo configs to go in */
  1058. wait_pending_extra_info_updates();
  1059. /* step 2: enable the overlay */
  1060. spin_lock_irqsave(&data_lock, flags);
  1061. op->enabling = false;
  1062. dss_apply_ovl_enable(ovl, true);
  1063. dss_write_regs();
  1064. dss_set_go_bits();
  1065. spin_unlock_irqrestore(&data_lock, flags);
  1066. /* wait for overlay to be enabled */
  1067. wait_pending_extra_info_updates();
  1068. mutex_unlock(&apply_lock);
  1069. return 0;
  1070. err2:
  1071. op->enabling = false;
  1072. spin_unlock_irqrestore(&data_lock, flags);
  1073. err1:
  1074. mutex_unlock(&apply_lock);
  1075. return r;
  1076. }
  1077. int dss_ovl_disable(struct omap_overlay *ovl)
  1078. {
  1079. struct ovl_priv_data *op = get_ovl_priv(ovl);
  1080. unsigned long flags;
  1081. bool fifo_merge;
  1082. int r;
  1083. mutex_lock(&apply_lock);
  1084. if (!op->enabled) {
  1085. r = 0;
  1086. goto err;
  1087. }
  1088. if (ovl->manager == NULL || ovl->manager->device == NULL) {
  1089. r = -EINVAL;
  1090. goto err;
  1091. }
  1092. /* step 1: disable the overlay */
  1093. spin_lock_irqsave(&data_lock, flags);
  1094. dss_apply_ovl_enable(ovl, false);
  1095. dss_write_regs();
  1096. dss_set_go_bits();
  1097. spin_unlock_irqrestore(&data_lock, flags);
  1098. /* wait for the overlay to be disabled */
  1099. wait_pending_extra_info_updates();
  1100. /* step 2: configure fifos/fifomerge */
  1101. spin_lock_irqsave(&data_lock, flags);
  1102. fifo_merge = get_use_fifo_merge();
  1103. dss_setup_fifos(fifo_merge);
  1104. dss_apply_fifo_merge(fifo_merge);
  1105. dss_write_regs();
  1106. dss_set_go_bits();
  1107. spin_unlock_irqrestore(&data_lock, flags);
  1108. /* wait for fifo config to go in */
  1109. wait_pending_extra_info_updates();
  1110. mutex_unlock(&apply_lock);
  1111. return 0;
  1112. err:
  1113. mutex_unlock(&apply_lock);
  1114. return r;
  1115. }