bnx2x_sriov.c 80 KB

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  1. /* bnx2x_sriov.c: Broadcom Everest network driver.
  2. *
  3. * Copyright 2009-2012 Broadcom Corporation
  4. *
  5. * Unless you and Broadcom execute a separate written software license
  6. * agreement governing use of this software, this software is licensed to you
  7. * under the terms of the GNU General Public License version 2, available
  8. * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
  9. *
  10. * Notwithstanding the above, under no circumstances may you combine this
  11. * software in any way with any other Broadcom software provided under a
  12. * license other than the GPL, without Broadcom's express prior written
  13. * consent.
  14. *
  15. * Maintained by: Eilon Greenstein <eilong@broadcom.com>
  16. * Written by: Shmulik Ravid <shmulikr@broadcom.com>
  17. * Ariel Elior <ariele@broadcom.com>
  18. *
  19. */
  20. #include "bnx2x.h"
  21. #include "bnx2x_init.h"
  22. #include "bnx2x_cmn.h"
  23. #include "bnx2x_sriov.h"
  24. /* General service functions */
  25. static void storm_memset_vf_to_pf(struct bnx2x *bp, u16 abs_fid,
  26. u16 pf_id)
  27. {
  28. REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_VF_TO_PF_OFFSET(abs_fid),
  29. pf_id);
  30. REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_VF_TO_PF_OFFSET(abs_fid),
  31. pf_id);
  32. REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_VF_TO_PF_OFFSET(abs_fid),
  33. pf_id);
  34. REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_VF_TO_PF_OFFSET(abs_fid),
  35. pf_id);
  36. }
  37. static void storm_memset_func_en(struct bnx2x *bp, u16 abs_fid,
  38. u8 enable)
  39. {
  40. REG_WR8(bp, BAR_XSTRORM_INTMEM + XSTORM_FUNC_EN_OFFSET(abs_fid),
  41. enable);
  42. REG_WR8(bp, BAR_CSTRORM_INTMEM + CSTORM_FUNC_EN_OFFSET(abs_fid),
  43. enable);
  44. REG_WR8(bp, BAR_TSTRORM_INTMEM + TSTORM_FUNC_EN_OFFSET(abs_fid),
  45. enable);
  46. REG_WR8(bp, BAR_USTRORM_INTMEM + USTORM_FUNC_EN_OFFSET(abs_fid),
  47. enable);
  48. }
  49. int bnx2x_vf_idx_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)
  50. {
  51. int idx;
  52. for_each_vf(bp, idx)
  53. if (bnx2x_vf(bp, idx, abs_vfid) == abs_vfid)
  54. break;
  55. return idx;
  56. }
  57. static
  58. struct bnx2x_virtf *bnx2x_vf_by_abs_fid(struct bnx2x *bp, u16 abs_vfid)
  59. {
  60. u16 idx = (u16)bnx2x_vf_idx_by_abs_fid(bp, abs_vfid);
  61. return (idx < BNX2X_NR_VIRTFN(bp)) ? BP_VF(bp, idx) : NULL;
  62. }
  63. static void bnx2x_vf_igu_ack_sb(struct bnx2x *bp, struct bnx2x_virtf *vf,
  64. u8 igu_sb_id, u8 segment, u16 index, u8 op,
  65. u8 update)
  66. {
  67. /* acking a VF sb through the PF - use the GRC */
  68. u32 ctl;
  69. u32 igu_addr_data = IGU_REG_COMMAND_REG_32LSB_DATA;
  70. u32 igu_addr_ctl = IGU_REG_COMMAND_REG_CTRL;
  71. u32 func_encode = vf->abs_vfid;
  72. u32 addr_encode = IGU_CMD_E2_PROD_UPD_BASE + igu_sb_id;
  73. struct igu_regular cmd_data = {0};
  74. cmd_data.sb_id_and_flags =
  75. ((index << IGU_REGULAR_SB_INDEX_SHIFT) |
  76. (segment << IGU_REGULAR_SEGMENT_ACCESS_SHIFT) |
  77. (update << IGU_REGULAR_BUPDATE_SHIFT) |
  78. (op << IGU_REGULAR_ENABLE_INT_SHIFT));
  79. ctl = addr_encode << IGU_CTRL_REG_ADDRESS_SHIFT |
  80. func_encode << IGU_CTRL_REG_FID_SHIFT |
  81. IGU_CTRL_CMD_TYPE_WR << IGU_CTRL_REG_TYPE_SHIFT;
  82. DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",
  83. cmd_data.sb_id_and_flags, igu_addr_data);
  84. REG_WR(bp, igu_addr_data, cmd_data.sb_id_and_flags);
  85. mmiowb();
  86. barrier();
  87. DP(NETIF_MSG_HW, "write 0x%08x to IGU(via GRC) addr 0x%x\n",
  88. ctl, igu_addr_ctl);
  89. REG_WR(bp, igu_addr_ctl, ctl);
  90. mmiowb();
  91. barrier();
  92. }
  93. /* VFOP - VF slow-path operation support */
  94. #define BNX2X_VFOP_FILTER_ADD_CNT_MAX 0x10000
  95. /* VFOP operations states */
  96. enum bnx2x_vfop_qctor_state {
  97. BNX2X_VFOP_QCTOR_INIT,
  98. BNX2X_VFOP_QCTOR_SETUP,
  99. BNX2X_VFOP_QCTOR_INT_EN
  100. };
  101. enum bnx2x_vfop_qdtor_state {
  102. BNX2X_VFOP_QDTOR_HALT,
  103. BNX2X_VFOP_QDTOR_TERMINATE,
  104. BNX2X_VFOP_QDTOR_CFCDEL,
  105. BNX2X_VFOP_QDTOR_DONE
  106. };
  107. enum bnx2x_vfop_vlan_mac_state {
  108. BNX2X_VFOP_VLAN_MAC_CONFIG_SINGLE,
  109. BNX2X_VFOP_VLAN_MAC_CLEAR,
  110. BNX2X_VFOP_VLAN_MAC_CHK_DONE,
  111. BNX2X_VFOP_MAC_CONFIG_LIST,
  112. BNX2X_VFOP_VLAN_CONFIG_LIST,
  113. BNX2X_VFOP_VLAN_CONFIG_LIST_0
  114. };
  115. enum bnx2x_vfop_qsetup_state {
  116. BNX2X_VFOP_QSETUP_CTOR,
  117. BNX2X_VFOP_QSETUP_VLAN0,
  118. BNX2X_VFOP_QSETUP_DONE
  119. };
  120. enum bnx2x_vfop_mcast_state {
  121. BNX2X_VFOP_MCAST_DEL,
  122. BNX2X_VFOP_MCAST_ADD,
  123. BNX2X_VFOP_MCAST_CHK_DONE
  124. };
  125. enum bnx2x_vfop_qflr_state {
  126. BNX2X_VFOP_QFLR_CLR_VLAN,
  127. BNX2X_VFOP_QFLR_CLR_MAC,
  128. BNX2X_VFOP_QFLR_TERMINATE,
  129. BNX2X_VFOP_QFLR_DONE
  130. };
  131. enum bnx2x_vfop_flr_state {
  132. BNX2X_VFOP_FLR_QUEUES,
  133. BNX2X_VFOP_FLR_HW
  134. };
  135. enum bnx2x_vfop_close_state {
  136. BNX2X_VFOP_CLOSE_QUEUES,
  137. BNX2X_VFOP_CLOSE_HW
  138. };
  139. enum bnx2x_vfop_rxmode_state {
  140. BNX2X_VFOP_RXMODE_CONFIG,
  141. BNX2X_VFOP_RXMODE_DONE
  142. };
  143. enum bnx2x_vfop_qteardown_state {
  144. BNX2X_VFOP_QTEARDOWN_RXMODE,
  145. BNX2X_VFOP_QTEARDOWN_CLR_VLAN,
  146. BNX2X_VFOP_QTEARDOWN_CLR_MAC,
  147. BNX2X_VFOP_QTEARDOWN_QDTOR,
  148. BNX2X_VFOP_QTEARDOWN_DONE
  149. };
  150. #define bnx2x_vfop_reset_wq(vf) atomic_set(&vf->op_in_progress, 0)
  151. void bnx2x_vfop_qctor_dump_tx(struct bnx2x *bp, struct bnx2x_virtf *vf,
  152. struct bnx2x_queue_init_params *init_params,
  153. struct bnx2x_queue_setup_params *setup_params,
  154. u16 q_idx, u16 sb_idx)
  155. {
  156. DP(BNX2X_MSG_IOV,
  157. "VF[%d] Q_SETUP: txq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, flags=0x%lx, traffic-type=%d",
  158. vf->abs_vfid,
  159. q_idx,
  160. sb_idx,
  161. init_params->tx.sb_cq_index,
  162. init_params->tx.hc_rate,
  163. setup_params->flags,
  164. setup_params->txq_params.traffic_type);
  165. }
  166. void bnx2x_vfop_qctor_dump_rx(struct bnx2x *bp, struct bnx2x_virtf *vf,
  167. struct bnx2x_queue_init_params *init_params,
  168. struct bnx2x_queue_setup_params *setup_params,
  169. u16 q_idx, u16 sb_idx)
  170. {
  171. struct bnx2x_rxq_setup_params *rxq_params = &setup_params->rxq_params;
  172. DP(BNX2X_MSG_IOV, "VF[%d] Q_SETUP: rxq[%d]-- vfsb=%d, sb-index=%d, hc-rate=%d, mtu=%d, buf-size=%d\n"
  173. "sge-size=%d, max_sge_pkt=%d, tpa-agg-size=%d, flags=0x%lx, drop-flags=0x%x, cache-log=%d\n",
  174. vf->abs_vfid,
  175. q_idx,
  176. sb_idx,
  177. init_params->rx.sb_cq_index,
  178. init_params->rx.hc_rate,
  179. setup_params->gen_params.mtu,
  180. rxq_params->buf_sz,
  181. rxq_params->sge_buf_sz,
  182. rxq_params->max_sges_pkt,
  183. rxq_params->tpa_agg_sz,
  184. setup_params->flags,
  185. rxq_params->drop_flags,
  186. rxq_params->cache_line_log);
  187. }
  188. void bnx2x_vfop_qctor_prep(struct bnx2x *bp,
  189. struct bnx2x_virtf *vf,
  190. struct bnx2x_vf_queue *q,
  191. struct bnx2x_vfop_qctor_params *p,
  192. unsigned long q_type)
  193. {
  194. struct bnx2x_queue_init_params *init_p = &p->qstate.params.init;
  195. struct bnx2x_queue_setup_params *setup_p = &p->prep_qsetup;
  196. /* INIT */
  197. /* Enable host coalescing in the transition to INIT state */
  198. if (test_bit(BNX2X_Q_FLG_HC, &init_p->rx.flags))
  199. __set_bit(BNX2X_Q_FLG_HC_EN, &init_p->rx.flags);
  200. if (test_bit(BNX2X_Q_FLG_HC, &init_p->tx.flags))
  201. __set_bit(BNX2X_Q_FLG_HC_EN, &init_p->tx.flags);
  202. /* FW SB ID */
  203. init_p->rx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
  204. init_p->tx.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
  205. /* context */
  206. init_p->cxts[0] = q->cxt;
  207. /* SETUP */
  208. /* Setup-op general parameters */
  209. setup_p->gen_params.spcl_id = vf->sp_cl_id;
  210. setup_p->gen_params.stat_id = vfq_stat_id(vf, q);
  211. /* Setup-op pause params:
  212. * Nothing to do, the pause thresholds are set by default to 0 which
  213. * effectively turns off the feature for this queue. We don't want
  214. * one queue (VF) to interfering with another queue (another VF)
  215. */
  216. if (vf->cfg_flags & VF_CFG_FW_FC)
  217. BNX2X_ERR("No support for pause to VFs (abs_vfid: %d)\n",
  218. vf->abs_vfid);
  219. /* Setup-op flags:
  220. * collect statistics, zero statistics, local-switching, security,
  221. * OV for Flex10, RSS and MCAST for leading
  222. */
  223. if (test_bit(BNX2X_Q_FLG_STATS, &setup_p->flags))
  224. __set_bit(BNX2X_Q_FLG_ZERO_STATS, &setup_p->flags);
  225. /* for VFs, enable tx switching, bd coherency, and mac address
  226. * anti-spoofing
  227. */
  228. __set_bit(BNX2X_Q_FLG_TX_SWITCH, &setup_p->flags);
  229. __set_bit(BNX2X_Q_FLG_TX_SEC, &setup_p->flags);
  230. __set_bit(BNX2X_Q_FLG_ANTI_SPOOF, &setup_p->flags);
  231. if (vfq_is_leading(q)) {
  232. __set_bit(BNX2X_Q_FLG_LEADING_RSS, &setup_p->flags);
  233. __set_bit(BNX2X_Q_FLG_MCAST, &setup_p->flags);
  234. }
  235. /* Setup-op rx parameters */
  236. if (test_bit(BNX2X_Q_TYPE_HAS_RX, &q_type)) {
  237. struct bnx2x_rxq_setup_params *rxq_p = &setup_p->rxq_params;
  238. rxq_p->cl_qzone_id = vfq_qzone_id(vf, q);
  239. rxq_p->fw_sb_id = vf_igu_sb(vf, q->sb_idx);
  240. rxq_p->rss_engine_id = FW_VF_HANDLE(vf->abs_vfid);
  241. if (test_bit(BNX2X_Q_FLG_TPA, &setup_p->flags))
  242. rxq_p->max_tpa_queues = BNX2X_VF_MAX_TPA_AGG_QUEUES;
  243. }
  244. /* Setup-op tx parameters */
  245. if (test_bit(BNX2X_Q_TYPE_HAS_TX, &q_type)) {
  246. setup_p->txq_params.tss_leading_cl_id = vf->leading_rss;
  247. setup_p->txq_params.fw_sb_id = vf_igu_sb(vf, q->sb_idx);
  248. }
  249. }
  250. /* VFOP queue construction */
  251. static void bnx2x_vfop_qctor(struct bnx2x *bp, struct bnx2x_virtf *vf)
  252. {
  253. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  254. struct bnx2x_vfop_args_qctor *args = &vfop->args.qctor;
  255. struct bnx2x_queue_state_params *q_params = &vfop->op_p->qctor.qstate;
  256. enum bnx2x_vfop_qctor_state state = vfop->state;
  257. bnx2x_vfop_reset_wq(vf);
  258. if (vfop->rc < 0)
  259. goto op_err;
  260. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  261. switch (state) {
  262. case BNX2X_VFOP_QCTOR_INIT:
  263. /* has this queue already been opened? */
  264. if (bnx2x_get_q_logical_state(bp, q_params->q_obj) ==
  265. BNX2X_Q_LOGICAL_STATE_ACTIVE) {
  266. DP(BNX2X_MSG_IOV,
  267. "Entered qctor but queue was already up. Aborting gracefully\n");
  268. goto op_done;
  269. }
  270. /* next state */
  271. vfop->state = BNX2X_VFOP_QCTOR_SETUP;
  272. q_params->cmd = BNX2X_Q_CMD_INIT;
  273. vfop->rc = bnx2x_queue_state_change(bp, q_params);
  274. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
  275. case BNX2X_VFOP_QCTOR_SETUP:
  276. /* next state */
  277. vfop->state = BNX2X_VFOP_QCTOR_INT_EN;
  278. /* copy pre-prepared setup params to the queue-state params */
  279. vfop->op_p->qctor.qstate.params.setup =
  280. vfop->op_p->qctor.prep_qsetup;
  281. q_params->cmd = BNX2X_Q_CMD_SETUP;
  282. vfop->rc = bnx2x_queue_state_change(bp, q_params);
  283. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
  284. case BNX2X_VFOP_QCTOR_INT_EN:
  285. /* enable interrupts */
  286. bnx2x_vf_igu_ack_sb(bp, vf, vf_igu_sb(vf, args->sb_idx),
  287. USTORM_ID, 0, IGU_INT_ENABLE, 0);
  288. goto op_done;
  289. default:
  290. bnx2x_vfop_default(state);
  291. }
  292. op_err:
  293. BNX2X_ERR("QCTOR[%d:%d] error: cmd %d, rc %d\n",
  294. vf->abs_vfid, args->qid, q_params->cmd, vfop->rc);
  295. op_done:
  296. bnx2x_vfop_end(bp, vf, vfop);
  297. op_pending:
  298. return;
  299. }
  300. static int bnx2x_vfop_qctor_cmd(struct bnx2x *bp,
  301. struct bnx2x_virtf *vf,
  302. struct bnx2x_vfop_cmd *cmd,
  303. int qid)
  304. {
  305. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  306. if (vfop) {
  307. vf->op_params.qctor.qstate.q_obj = &bnx2x_vfq(vf, qid, sp_obj);
  308. vfop->args.qctor.qid = qid;
  309. vfop->args.qctor.sb_idx = bnx2x_vfq(vf, qid, sb_idx);
  310. bnx2x_vfop_opset(BNX2X_VFOP_QCTOR_INIT,
  311. bnx2x_vfop_qctor, cmd->done);
  312. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qctor,
  313. cmd->block);
  314. }
  315. return -ENOMEM;
  316. }
  317. /* VFOP queue destruction */
  318. static void bnx2x_vfop_qdtor(struct bnx2x *bp, struct bnx2x_virtf *vf)
  319. {
  320. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  321. struct bnx2x_vfop_args_qdtor *qdtor = &vfop->args.qdtor;
  322. struct bnx2x_queue_state_params *q_params = &vfop->op_p->qctor.qstate;
  323. enum bnx2x_vfop_qdtor_state state = vfop->state;
  324. bnx2x_vfop_reset_wq(vf);
  325. if (vfop->rc < 0)
  326. goto op_err;
  327. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  328. switch (state) {
  329. case BNX2X_VFOP_QDTOR_HALT:
  330. /* has this queue already been stopped? */
  331. if (bnx2x_get_q_logical_state(bp, q_params->q_obj) ==
  332. BNX2X_Q_LOGICAL_STATE_STOPPED) {
  333. DP(BNX2X_MSG_IOV,
  334. "Entered qdtor but queue was already stopped. Aborting gracefully\n");
  335. goto op_done;
  336. }
  337. /* next state */
  338. vfop->state = BNX2X_VFOP_QDTOR_TERMINATE;
  339. q_params->cmd = BNX2X_Q_CMD_HALT;
  340. vfop->rc = bnx2x_queue_state_change(bp, q_params);
  341. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
  342. case BNX2X_VFOP_QDTOR_TERMINATE:
  343. /* next state */
  344. vfop->state = BNX2X_VFOP_QDTOR_CFCDEL;
  345. q_params->cmd = BNX2X_Q_CMD_TERMINATE;
  346. vfop->rc = bnx2x_queue_state_change(bp, q_params);
  347. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
  348. case BNX2X_VFOP_QDTOR_CFCDEL:
  349. /* next state */
  350. vfop->state = BNX2X_VFOP_QDTOR_DONE;
  351. q_params->cmd = BNX2X_Q_CMD_CFC_DEL;
  352. vfop->rc = bnx2x_queue_state_change(bp, q_params);
  353. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  354. op_err:
  355. BNX2X_ERR("QDTOR[%d:%d] error: cmd %d, rc %d\n",
  356. vf->abs_vfid, qdtor->qid, q_params->cmd, vfop->rc);
  357. op_done:
  358. case BNX2X_VFOP_QDTOR_DONE:
  359. /* invalidate the context */
  360. qdtor->cxt->ustorm_ag_context.cdu_usage = 0;
  361. qdtor->cxt->xstorm_ag_context.cdu_reserved = 0;
  362. bnx2x_vfop_end(bp, vf, vfop);
  363. return;
  364. default:
  365. bnx2x_vfop_default(state);
  366. }
  367. op_pending:
  368. return;
  369. }
  370. static int bnx2x_vfop_qdtor_cmd(struct bnx2x *bp,
  371. struct bnx2x_virtf *vf,
  372. struct bnx2x_vfop_cmd *cmd,
  373. int qid)
  374. {
  375. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  376. if (vfop) {
  377. struct bnx2x_queue_state_params *qstate =
  378. &vf->op_params.qctor.qstate;
  379. memset(qstate, 0, sizeof(*qstate));
  380. qstate->q_obj = &bnx2x_vfq(vf, qid, sp_obj);
  381. vfop->args.qdtor.qid = qid;
  382. vfop->args.qdtor.cxt = bnx2x_vfq(vf, qid, cxt);
  383. bnx2x_vfop_opset(BNX2X_VFOP_QDTOR_HALT,
  384. bnx2x_vfop_qdtor, cmd->done);
  385. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qdtor,
  386. cmd->block);
  387. }
  388. DP(BNX2X_MSG_IOV, "VF[%d] failed to add a vfop. rc %d\n",
  389. vf->abs_vfid, vfop->rc);
  390. return -ENOMEM;
  391. }
  392. static void
  393. bnx2x_vf_set_igu_info(struct bnx2x *bp, u8 igu_sb_id, u8 abs_vfid)
  394. {
  395. struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
  396. if (vf) {
  397. if (!vf_sb_count(vf))
  398. vf->igu_base_id = igu_sb_id;
  399. ++vf_sb_count(vf);
  400. }
  401. }
  402. /* VFOP MAC/VLAN helpers */
  403. static inline void bnx2x_vfop_credit(struct bnx2x *bp,
  404. struct bnx2x_vfop *vfop,
  405. struct bnx2x_vlan_mac_obj *obj)
  406. {
  407. struct bnx2x_vfop_args_filters *args = &vfop->args.filters;
  408. /* update credit only if there is no error
  409. * and a valid credit counter
  410. */
  411. if (!vfop->rc && args->credit) {
  412. int cnt = 0;
  413. struct list_head *pos;
  414. list_for_each(pos, &obj->head)
  415. cnt++;
  416. atomic_set(args->credit, cnt);
  417. }
  418. }
  419. static int bnx2x_vfop_set_user_req(struct bnx2x *bp,
  420. struct bnx2x_vfop_filter *pos,
  421. struct bnx2x_vlan_mac_data *user_req)
  422. {
  423. user_req->cmd = pos->add ? BNX2X_VLAN_MAC_ADD :
  424. BNX2X_VLAN_MAC_DEL;
  425. switch (pos->type) {
  426. case BNX2X_VFOP_FILTER_MAC:
  427. memcpy(user_req->u.mac.mac, pos->mac, ETH_ALEN);
  428. break;
  429. case BNX2X_VFOP_FILTER_VLAN:
  430. user_req->u.vlan.vlan = pos->vid;
  431. break;
  432. default:
  433. BNX2X_ERR("Invalid filter type, skipping\n");
  434. return 1;
  435. }
  436. return 0;
  437. }
  438. static int
  439. bnx2x_vfop_config_vlan0(struct bnx2x *bp,
  440. struct bnx2x_vlan_mac_ramrod_params *vlan_mac,
  441. bool add)
  442. {
  443. int rc;
  444. vlan_mac->user_req.cmd = add ? BNX2X_VLAN_MAC_ADD :
  445. BNX2X_VLAN_MAC_DEL;
  446. vlan_mac->user_req.u.vlan.vlan = 0;
  447. rc = bnx2x_config_vlan_mac(bp, vlan_mac);
  448. if (rc == -EEXIST)
  449. rc = 0;
  450. return rc;
  451. }
  452. static int bnx2x_vfop_config_list(struct bnx2x *bp,
  453. struct bnx2x_vfop_filters *filters,
  454. struct bnx2x_vlan_mac_ramrod_params *vlan_mac)
  455. {
  456. struct bnx2x_vfop_filter *pos, *tmp;
  457. struct list_head rollback_list, *filters_list = &filters->head;
  458. struct bnx2x_vlan_mac_data *user_req = &vlan_mac->user_req;
  459. int rc = 0, cnt = 0;
  460. INIT_LIST_HEAD(&rollback_list);
  461. list_for_each_entry_safe(pos, tmp, filters_list, link) {
  462. if (bnx2x_vfop_set_user_req(bp, pos, user_req))
  463. continue;
  464. rc = bnx2x_config_vlan_mac(bp, vlan_mac);
  465. if (rc >= 0) {
  466. cnt += pos->add ? 1 : -1;
  467. list_del(&pos->link);
  468. list_add(&pos->link, &rollback_list);
  469. rc = 0;
  470. } else if (rc == -EEXIST) {
  471. rc = 0;
  472. } else {
  473. BNX2X_ERR("Failed to add a new vlan_mac command\n");
  474. break;
  475. }
  476. }
  477. /* rollback if error or too many rules added */
  478. if (rc || cnt > filters->add_cnt) {
  479. BNX2X_ERR("error or too many rules added. Performing rollback\n");
  480. list_for_each_entry_safe(pos, tmp, &rollback_list, link) {
  481. pos->add = !pos->add; /* reverse op */
  482. bnx2x_vfop_set_user_req(bp, pos, user_req);
  483. bnx2x_config_vlan_mac(bp, vlan_mac);
  484. list_del(&pos->link);
  485. }
  486. cnt = 0;
  487. if (!rc)
  488. rc = -EINVAL;
  489. }
  490. filters->add_cnt = cnt;
  491. return rc;
  492. }
  493. /* VFOP set VLAN/MAC */
  494. static void bnx2x_vfop_vlan_mac(struct bnx2x *bp, struct bnx2x_virtf *vf)
  495. {
  496. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  497. struct bnx2x_vlan_mac_ramrod_params *vlan_mac = &vfop->op_p->vlan_mac;
  498. struct bnx2x_vlan_mac_obj *obj = vlan_mac->vlan_mac_obj;
  499. struct bnx2x_vfop_filters *filters = vfop->args.filters.multi_filter;
  500. enum bnx2x_vfop_vlan_mac_state state = vfop->state;
  501. if (vfop->rc < 0)
  502. goto op_err;
  503. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  504. bnx2x_vfop_reset_wq(vf);
  505. switch (state) {
  506. case BNX2X_VFOP_VLAN_MAC_CLEAR:
  507. /* next state */
  508. vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE;
  509. /* do delete */
  510. vfop->rc = obj->delete_all(bp, obj,
  511. &vlan_mac->user_req.vlan_mac_flags,
  512. &vlan_mac->ramrod_flags);
  513. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  514. case BNX2X_VFOP_VLAN_MAC_CONFIG_SINGLE:
  515. /* next state */
  516. vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE;
  517. /* do config */
  518. vfop->rc = bnx2x_config_vlan_mac(bp, vlan_mac);
  519. if (vfop->rc == -EEXIST)
  520. vfop->rc = 0;
  521. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  522. case BNX2X_VFOP_VLAN_MAC_CHK_DONE:
  523. vfop->rc = !!obj->raw.check_pending(&obj->raw);
  524. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  525. case BNX2X_VFOP_MAC_CONFIG_LIST:
  526. /* next state */
  527. vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE;
  528. /* do list config */
  529. vfop->rc = bnx2x_vfop_config_list(bp, filters, vlan_mac);
  530. if (vfop->rc)
  531. goto op_err;
  532. set_bit(RAMROD_CONT, &vlan_mac->ramrod_flags);
  533. vfop->rc = bnx2x_config_vlan_mac(bp, vlan_mac);
  534. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  535. case BNX2X_VFOP_VLAN_CONFIG_LIST:
  536. /* next state */
  537. vfop->state = BNX2X_VFOP_VLAN_CONFIG_LIST_0;
  538. /* remove vlan0 - could be no-op */
  539. vfop->rc = bnx2x_vfop_config_vlan0(bp, vlan_mac, false);
  540. if (vfop->rc)
  541. goto op_err;
  542. /* Do vlan list config. if this operation fails we try to
  543. * restore vlan0 to keep the queue is working order
  544. */
  545. vfop->rc = bnx2x_vfop_config_list(bp, filters, vlan_mac);
  546. if (!vfop->rc) {
  547. set_bit(RAMROD_CONT, &vlan_mac->ramrod_flags);
  548. vfop->rc = bnx2x_config_vlan_mac(bp, vlan_mac);
  549. }
  550. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT); /* fall-through */
  551. case BNX2X_VFOP_VLAN_CONFIG_LIST_0:
  552. /* next state */
  553. vfop->state = BNX2X_VFOP_VLAN_MAC_CHK_DONE;
  554. if (list_empty(&obj->head))
  555. /* add vlan0 */
  556. vfop->rc = bnx2x_vfop_config_vlan0(bp, vlan_mac, true);
  557. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  558. default:
  559. bnx2x_vfop_default(state);
  560. }
  561. op_err:
  562. BNX2X_ERR("VLAN-MAC error: rc %d\n", vfop->rc);
  563. op_done:
  564. kfree(filters);
  565. bnx2x_vfop_credit(bp, vfop, obj);
  566. bnx2x_vfop_end(bp, vf, vfop);
  567. op_pending:
  568. return;
  569. }
  570. struct bnx2x_vfop_vlan_mac_flags {
  571. bool drv_only;
  572. bool dont_consume;
  573. bool single_cmd;
  574. bool add;
  575. };
  576. static void
  577. bnx2x_vfop_vlan_mac_prep_ramrod(struct bnx2x_vlan_mac_ramrod_params *ramrod,
  578. struct bnx2x_vfop_vlan_mac_flags *flags)
  579. {
  580. struct bnx2x_vlan_mac_data *ureq = &ramrod->user_req;
  581. memset(ramrod, 0, sizeof(*ramrod));
  582. /* ramrod flags */
  583. if (flags->drv_only)
  584. set_bit(RAMROD_DRV_CLR_ONLY, &ramrod->ramrod_flags);
  585. if (flags->single_cmd)
  586. set_bit(RAMROD_EXEC, &ramrod->ramrod_flags);
  587. /* mac_vlan flags */
  588. if (flags->dont_consume)
  589. set_bit(BNX2X_DONT_CONSUME_CAM_CREDIT, &ureq->vlan_mac_flags);
  590. /* cmd */
  591. ureq->cmd = flags->add ? BNX2X_VLAN_MAC_ADD : BNX2X_VLAN_MAC_DEL;
  592. }
  593. static inline void
  594. bnx2x_vfop_mac_prep_ramrod(struct bnx2x_vlan_mac_ramrod_params *ramrod,
  595. struct bnx2x_vfop_vlan_mac_flags *flags)
  596. {
  597. bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, flags);
  598. set_bit(BNX2X_ETH_MAC, &ramrod->user_req.vlan_mac_flags);
  599. }
  600. static int bnx2x_vfop_mac_delall_cmd(struct bnx2x *bp,
  601. struct bnx2x_virtf *vf,
  602. struct bnx2x_vfop_cmd *cmd,
  603. int qid, bool drv_only)
  604. {
  605. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  606. if (vfop) {
  607. struct bnx2x_vfop_args_filters filters = {
  608. .multi_filter = NULL, /* single */
  609. .credit = NULL, /* consume credit */
  610. };
  611. struct bnx2x_vfop_vlan_mac_flags flags = {
  612. .drv_only = drv_only,
  613. .dont_consume = (filters.credit != NULL),
  614. .single_cmd = true,
  615. .add = false /* don't care */,
  616. };
  617. struct bnx2x_vlan_mac_ramrod_params *ramrod =
  618. &vf->op_params.vlan_mac;
  619. /* set ramrod params */
  620. bnx2x_vfop_mac_prep_ramrod(ramrod, &flags);
  621. /* set object */
  622. ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);
  623. /* set extra args */
  624. vfop->args.filters = filters;
  625. bnx2x_vfop_opset(BNX2X_VFOP_VLAN_MAC_CLEAR,
  626. bnx2x_vfop_vlan_mac, cmd->done);
  627. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
  628. cmd->block);
  629. }
  630. return -ENOMEM;
  631. }
  632. int bnx2x_vfop_mac_list_cmd(struct bnx2x *bp,
  633. struct bnx2x_virtf *vf,
  634. struct bnx2x_vfop_cmd *cmd,
  635. struct bnx2x_vfop_filters *macs,
  636. int qid, bool drv_only)
  637. {
  638. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  639. if (vfop) {
  640. struct bnx2x_vfop_args_filters filters = {
  641. .multi_filter = macs,
  642. .credit = NULL, /* consume credit */
  643. };
  644. struct bnx2x_vfop_vlan_mac_flags flags = {
  645. .drv_only = drv_only,
  646. .dont_consume = (filters.credit != NULL),
  647. .single_cmd = false,
  648. .add = false, /* don't care since only the items in the
  649. * filters list affect the sp operation,
  650. * not the list itself
  651. */
  652. };
  653. struct bnx2x_vlan_mac_ramrod_params *ramrod =
  654. &vf->op_params.vlan_mac;
  655. /* set ramrod params */
  656. bnx2x_vfop_mac_prep_ramrod(ramrod, &flags);
  657. /* set object */
  658. ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, mac_obj);
  659. /* set extra args */
  660. filters.multi_filter->add_cnt = BNX2X_VFOP_FILTER_ADD_CNT_MAX;
  661. vfop->args.filters = filters;
  662. bnx2x_vfop_opset(BNX2X_VFOP_MAC_CONFIG_LIST,
  663. bnx2x_vfop_vlan_mac, cmd->done);
  664. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
  665. cmd->block);
  666. }
  667. return -ENOMEM;
  668. }
  669. int bnx2x_vfop_vlan_set_cmd(struct bnx2x *bp,
  670. struct bnx2x_virtf *vf,
  671. struct bnx2x_vfop_cmd *cmd,
  672. int qid, u16 vid, bool add)
  673. {
  674. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  675. if (vfop) {
  676. struct bnx2x_vfop_args_filters filters = {
  677. .multi_filter = NULL, /* single command */
  678. .credit = &bnx2x_vfq(vf, qid, vlan_count),
  679. };
  680. struct bnx2x_vfop_vlan_mac_flags flags = {
  681. .drv_only = false,
  682. .dont_consume = (filters.credit != NULL),
  683. .single_cmd = true,
  684. .add = add,
  685. };
  686. struct bnx2x_vlan_mac_ramrod_params *ramrod =
  687. &vf->op_params.vlan_mac;
  688. /* set ramrod params */
  689. bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, &flags);
  690. ramrod->user_req.u.vlan.vlan = vid;
  691. /* set object */
  692. ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
  693. /* set extra args */
  694. vfop->args.filters = filters;
  695. bnx2x_vfop_opset(BNX2X_VFOP_VLAN_MAC_CONFIG_SINGLE,
  696. bnx2x_vfop_vlan_mac, cmd->done);
  697. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
  698. cmd->block);
  699. }
  700. return -ENOMEM;
  701. }
  702. static int bnx2x_vfop_vlan_delall_cmd(struct bnx2x *bp,
  703. struct bnx2x_virtf *vf,
  704. struct bnx2x_vfop_cmd *cmd,
  705. int qid, bool drv_only)
  706. {
  707. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  708. if (vfop) {
  709. struct bnx2x_vfop_args_filters filters = {
  710. .multi_filter = NULL, /* single command */
  711. .credit = &bnx2x_vfq(vf, qid, vlan_count),
  712. };
  713. struct bnx2x_vfop_vlan_mac_flags flags = {
  714. .drv_only = drv_only,
  715. .dont_consume = (filters.credit != NULL),
  716. .single_cmd = true,
  717. .add = false, /* don't care */
  718. };
  719. struct bnx2x_vlan_mac_ramrod_params *ramrod =
  720. &vf->op_params.vlan_mac;
  721. /* set ramrod params */
  722. bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, &flags);
  723. /* set object */
  724. ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
  725. /* set extra args */
  726. vfop->args.filters = filters;
  727. bnx2x_vfop_opset(BNX2X_VFOP_VLAN_MAC_CLEAR,
  728. bnx2x_vfop_vlan_mac, cmd->done);
  729. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
  730. cmd->block);
  731. }
  732. return -ENOMEM;
  733. }
  734. int bnx2x_vfop_vlan_list_cmd(struct bnx2x *bp,
  735. struct bnx2x_virtf *vf,
  736. struct bnx2x_vfop_cmd *cmd,
  737. struct bnx2x_vfop_filters *vlans,
  738. int qid, bool drv_only)
  739. {
  740. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  741. if (vfop) {
  742. struct bnx2x_vfop_args_filters filters = {
  743. .multi_filter = vlans,
  744. .credit = &bnx2x_vfq(vf, qid, vlan_count),
  745. };
  746. struct bnx2x_vfop_vlan_mac_flags flags = {
  747. .drv_only = drv_only,
  748. .dont_consume = (filters.credit != NULL),
  749. .single_cmd = false,
  750. .add = false, /* don't care */
  751. };
  752. struct bnx2x_vlan_mac_ramrod_params *ramrod =
  753. &vf->op_params.vlan_mac;
  754. /* set ramrod params */
  755. bnx2x_vfop_vlan_mac_prep_ramrod(ramrod, &flags);
  756. /* set object */
  757. ramrod->vlan_mac_obj = &bnx2x_vfq(vf, qid, vlan_obj);
  758. /* set extra args */
  759. filters.multi_filter->add_cnt = vf_vlan_rules_cnt(vf) -
  760. atomic_read(filters.credit);
  761. vfop->args.filters = filters;
  762. bnx2x_vfop_opset(BNX2X_VFOP_VLAN_CONFIG_LIST,
  763. bnx2x_vfop_vlan_mac, cmd->done);
  764. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_vlan_mac,
  765. cmd->block);
  766. }
  767. return -ENOMEM;
  768. }
  769. /* VFOP queue setup (queue constructor + set vlan 0) */
  770. static void bnx2x_vfop_qsetup(struct bnx2x *bp, struct bnx2x_virtf *vf)
  771. {
  772. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  773. int qid = vfop->args.qctor.qid;
  774. enum bnx2x_vfop_qsetup_state state = vfop->state;
  775. struct bnx2x_vfop_cmd cmd = {
  776. .done = bnx2x_vfop_qsetup,
  777. .block = false,
  778. };
  779. if (vfop->rc < 0)
  780. goto op_err;
  781. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  782. switch (state) {
  783. case BNX2X_VFOP_QSETUP_CTOR:
  784. /* init the queue ctor command */
  785. vfop->state = BNX2X_VFOP_QSETUP_VLAN0;
  786. vfop->rc = bnx2x_vfop_qctor_cmd(bp, vf, &cmd, qid);
  787. if (vfop->rc)
  788. goto op_err;
  789. return;
  790. case BNX2X_VFOP_QSETUP_VLAN0:
  791. /* skip if non-leading or FPGA/EMU*/
  792. if (qid)
  793. goto op_done;
  794. /* init the queue set-vlan command (for vlan 0) */
  795. vfop->state = BNX2X_VFOP_QSETUP_DONE;
  796. vfop->rc = bnx2x_vfop_vlan_set_cmd(bp, vf, &cmd, qid, 0, true);
  797. if (vfop->rc)
  798. goto op_err;
  799. return;
  800. op_err:
  801. BNX2X_ERR("QSETUP[%d:%d] error: rc %d\n", vf->abs_vfid, qid, vfop->rc);
  802. op_done:
  803. case BNX2X_VFOP_QSETUP_DONE:
  804. bnx2x_vfop_end(bp, vf, vfop);
  805. return;
  806. default:
  807. bnx2x_vfop_default(state);
  808. }
  809. }
  810. int bnx2x_vfop_qsetup_cmd(struct bnx2x *bp,
  811. struct bnx2x_virtf *vf,
  812. struct bnx2x_vfop_cmd *cmd,
  813. int qid)
  814. {
  815. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  816. if (vfop) {
  817. vfop->args.qctor.qid = qid;
  818. bnx2x_vfop_opset(BNX2X_VFOP_QSETUP_CTOR,
  819. bnx2x_vfop_qsetup, cmd->done);
  820. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qsetup,
  821. cmd->block);
  822. }
  823. return -ENOMEM;
  824. }
  825. /* VFOP queue FLR handling (clear vlans, clear macs, queue destructor) */
  826. static void bnx2x_vfop_qflr(struct bnx2x *bp, struct bnx2x_virtf *vf)
  827. {
  828. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  829. int qid = vfop->args.qx.qid;
  830. enum bnx2x_vfop_qflr_state state = vfop->state;
  831. struct bnx2x_queue_state_params *qstate;
  832. struct bnx2x_vfop_cmd cmd;
  833. bnx2x_vfop_reset_wq(vf);
  834. if (vfop->rc < 0)
  835. goto op_err;
  836. DP(BNX2X_MSG_IOV, "VF[%d] STATE: %d\n", vf->abs_vfid, state);
  837. cmd.done = bnx2x_vfop_qflr;
  838. cmd.block = false;
  839. switch (state) {
  840. case BNX2X_VFOP_QFLR_CLR_VLAN:
  841. /* vlan-clear-all: driver-only, don't consume credit */
  842. vfop->state = BNX2X_VFOP_QFLR_CLR_MAC;
  843. vfop->rc = bnx2x_vfop_vlan_delall_cmd(bp, vf, &cmd, qid, true);
  844. if (vfop->rc)
  845. goto op_err;
  846. return;
  847. case BNX2X_VFOP_QFLR_CLR_MAC:
  848. /* mac-clear-all: driver only consume credit */
  849. vfop->state = BNX2X_VFOP_QFLR_TERMINATE;
  850. vfop->rc = bnx2x_vfop_mac_delall_cmd(bp, vf, &cmd, qid, true);
  851. DP(BNX2X_MSG_IOV,
  852. "VF[%d] vfop->rc after bnx2x_vfop_mac_delall_cmd was %d",
  853. vf->abs_vfid, vfop->rc);
  854. if (vfop->rc)
  855. goto op_err;
  856. return;
  857. case BNX2X_VFOP_QFLR_TERMINATE:
  858. qstate = &vfop->op_p->qctor.qstate;
  859. memset(qstate , 0, sizeof(*qstate));
  860. qstate->q_obj = &bnx2x_vfq(vf, qid, sp_obj);
  861. vfop->state = BNX2X_VFOP_QFLR_DONE;
  862. DP(BNX2X_MSG_IOV, "VF[%d] qstate during flr was %d\n",
  863. vf->abs_vfid, qstate->q_obj->state);
  864. if (qstate->q_obj->state != BNX2X_Q_STATE_RESET) {
  865. qstate->q_obj->state = BNX2X_Q_STATE_STOPPED;
  866. qstate->cmd = BNX2X_Q_CMD_TERMINATE;
  867. vfop->rc = bnx2x_queue_state_change(bp, qstate);
  868. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_VERIFY_PEND);
  869. } else {
  870. goto op_done;
  871. }
  872. op_err:
  873. BNX2X_ERR("QFLR[%d:%d] error: rc %d\n",
  874. vf->abs_vfid, qid, vfop->rc);
  875. op_done:
  876. case BNX2X_VFOP_QFLR_DONE:
  877. bnx2x_vfop_end(bp, vf, vfop);
  878. return;
  879. default:
  880. bnx2x_vfop_default(state);
  881. }
  882. op_pending:
  883. return;
  884. }
  885. static int bnx2x_vfop_qflr_cmd(struct bnx2x *bp,
  886. struct bnx2x_virtf *vf,
  887. struct bnx2x_vfop_cmd *cmd,
  888. int qid)
  889. {
  890. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  891. if (vfop) {
  892. vfop->args.qx.qid = qid;
  893. bnx2x_vfop_opset(BNX2X_VFOP_QFLR_CLR_VLAN,
  894. bnx2x_vfop_qflr, cmd->done);
  895. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qflr,
  896. cmd->block);
  897. }
  898. return -ENOMEM;
  899. }
  900. /* VFOP multi-casts */
  901. static void bnx2x_vfop_mcast(struct bnx2x *bp, struct bnx2x_virtf *vf)
  902. {
  903. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  904. struct bnx2x_mcast_ramrod_params *mcast = &vfop->op_p->mcast;
  905. struct bnx2x_raw_obj *raw = &mcast->mcast_obj->raw;
  906. struct bnx2x_vfop_args_mcast *args = &vfop->args.mc_list;
  907. enum bnx2x_vfop_mcast_state state = vfop->state;
  908. int i;
  909. bnx2x_vfop_reset_wq(vf);
  910. if (vfop->rc < 0)
  911. goto op_err;
  912. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  913. switch (state) {
  914. case BNX2X_VFOP_MCAST_DEL:
  915. /* clear existing mcasts */
  916. vfop->state = BNX2X_VFOP_MCAST_ADD;
  917. vfop->rc = bnx2x_config_mcast(bp, mcast, BNX2X_MCAST_CMD_DEL);
  918. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_CONT);
  919. case BNX2X_VFOP_MCAST_ADD:
  920. if (raw->check_pending(raw))
  921. goto op_pending;
  922. if (args->mc_num) {
  923. /* update mcast list on the ramrod params */
  924. INIT_LIST_HEAD(&mcast->mcast_list);
  925. for (i = 0; i < args->mc_num; i++)
  926. list_add_tail(&(args->mc[i].link),
  927. &mcast->mcast_list);
  928. /* add new mcasts */
  929. vfop->state = BNX2X_VFOP_MCAST_CHK_DONE;
  930. vfop->rc = bnx2x_config_mcast(bp, mcast,
  931. BNX2X_MCAST_CMD_ADD);
  932. }
  933. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  934. case BNX2X_VFOP_MCAST_CHK_DONE:
  935. vfop->rc = raw->check_pending(raw) ? 1 : 0;
  936. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  937. default:
  938. bnx2x_vfop_default(state);
  939. }
  940. op_err:
  941. BNX2X_ERR("MCAST CONFIG error: rc %d\n", vfop->rc);
  942. op_done:
  943. kfree(args->mc);
  944. bnx2x_vfop_end(bp, vf, vfop);
  945. op_pending:
  946. return;
  947. }
  948. int bnx2x_vfop_mcast_cmd(struct bnx2x *bp,
  949. struct bnx2x_virtf *vf,
  950. struct bnx2x_vfop_cmd *cmd,
  951. bnx2x_mac_addr_t *mcasts,
  952. int mcast_num, bool drv_only)
  953. {
  954. struct bnx2x_vfop *vfop = NULL;
  955. size_t mc_sz = mcast_num * sizeof(struct bnx2x_mcast_list_elem);
  956. struct bnx2x_mcast_list_elem *mc = mc_sz ? kzalloc(mc_sz, GFP_KERNEL) :
  957. NULL;
  958. if (!mc_sz || mc) {
  959. vfop = bnx2x_vfop_add(bp, vf);
  960. if (vfop) {
  961. int i;
  962. struct bnx2x_mcast_ramrod_params *ramrod =
  963. &vf->op_params.mcast;
  964. /* set ramrod params */
  965. memset(ramrod, 0, sizeof(*ramrod));
  966. ramrod->mcast_obj = &vf->mcast_obj;
  967. if (drv_only)
  968. set_bit(RAMROD_DRV_CLR_ONLY,
  969. &ramrod->ramrod_flags);
  970. /* copy mcasts pointers */
  971. vfop->args.mc_list.mc_num = mcast_num;
  972. vfop->args.mc_list.mc = mc;
  973. for (i = 0; i < mcast_num; i++)
  974. mc[i].mac = mcasts[i];
  975. bnx2x_vfop_opset(BNX2X_VFOP_MCAST_DEL,
  976. bnx2x_vfop_mcast, cmd->done);
  977. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_mcast,
  978. cmd->block);
  979. } else {
  980. kfree(mc);
  981. }
  982. }
  983. return -ENOMEM;
  984. }
  985. /* VFOP rx-mode */
  986. static void bnx2x_vfop_rxmode(struct bnx2x *bp, struct bnx2x_virtf *vf)
  987. {
  988. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  989. struct bnx2x_rx_mode_ramrod_params *ramrod = &vfop->op_p->rx_mode;
  990. enum bnx2x_vfop_rxmode_state state = vfop->state;
  991. bnx2x_vfop_reset_wq(vf);
  992. if (vfop->rc < 0)
  993. goto op_err;
  994. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  995. switch (state) {
  996. case BNX2X_VFOP_RXMODE_CONFIG:
  997. /* next state */
  998. vfop->state = BNX2X_VFOP_RXMODE_DONE;
  999. vfop->rc = bnx2x_config_rx_mode(bp, ramrod);
  1000. bnx2x_vfop_finalize(vf, vfop->rc, VFOP_DONE);
  1001. op_err:
  1002. BNX2X_ERR("RXMODE error: rc %d\n", vfop->rc);
  1003. op_done:
  1004. case BNX2X_VFOP_RXMODE_DONE:
  1005. bnx2x_vfop_end(bp, vf, vfop);
  1006. return;
  1007. default:
  1008. bnx2x_vfop_default(state);
  1009. }
  1010. op_pending:
  1011. return;
  1012. }
  1013. int bnx2x_vfop_rxmode_cmd(struct bnx2x *bp,
  1014. struct bnx2x_virtf *vf,
  1015. struct bnx2x_vfop_cmd *cmd,
  1016. int qid, unsigned long accept_flags)
  1017. {
  1018. struct bnx2x_vf_queue *vfq = vfq_get(vf, qid);
  1019. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  1020. if (vfop) {
  1021. struct bnx2x_rx_mode_ramrod_params *ramrod =
  1022. &vf->op_params.rx_mode;
  1023. memset(ramrod, 0, sizeof(*ramrod));
  1024. /* Prepare ramrod parameters */
  1025. ramrod->cid = vfq->cid;
  1026. ramrod->cl_id = vfq_cl_id(vf, vfq);
  1027. ramrod->rx_mode_obj = &bp->rx_mode_obj;
  1028. ramrod->func_id = FW_VF_HANDLE(vf->abs_vfid);
  1029. ramrod->rx_accept_flags = accept_flags;
  1030. ramrod->tx_accept_flags = accept_flags;
  1031. ramrod->pstate = &vf->filter_state;
  1032. ramrod->state = BNX2X_FILTER_RX_MODE_PENDING;
  1033. set_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);
  1034. set_bit(RAMROD_RX, &ramrod->ramrod_flags);
  1035. set_bit(RAMROD_TX, &ramrod->ramrod_flags);
  1036. ramrod->rdata =
  1037. bnx2x_vf_sp(bp, vf, rx_mode_rdata.e2);
  1038. ramrod->rdata_mapping =
  1039. bnx2x_vf_sp_map(bp, vf, rx_mode_rdata.e2);
  1040. bnx2x_vfop_opset(BNX2X_VFOP_RXMODE_CONFIG,
  1041. bnx2x_vfop_rxmode, cmd->done);
  1042. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_rxmode,
  1043. cmd->block);
  1044. }
  1045. return -ENOMEM;
  1046. }
  1047. /* VFOP queue tear-down ('drop all' rx-mode, clear vlans, clear macs,
  1048. * queue destructor)
  1049. */
  1050. static void bnx2x_vfop_qdown(struct bnx2x *bp, struct bnx2x_virtf *vf)
  1051. {
  1052. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  1053. int qid = vfop->args.qx.qid;
  1054. enum bnx2x_vfop_qteardown_state state = vfop->state;
  1055. struct bnx2x_vfop_cmd cmd;
  1056. if (vfop->rc < 0)
  1057. goto op_err;
  1058. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  1059. cmd.done = bnx2x_vfop_qdown;
  1060. cmd.block = false;
  1061. switch (state) {
  1062. case BNX2X_VFOP_QTEARDOWN_RXMODE:
  1063. /* Drop all */
  1064. vfop->state = BNX2X_VFOP_QTEARDOWN_CLR_VLAN;
  1065. vfop->rc = bnx2x_vfop_rxmode_cmd(bp, vf, &cmd, qid, 0);
  1066. if (vfop->rc)
  1067. goto op_err;
  1068. return;
  1069. case BNX2X_VFOP_QTEARDOWN_CLR_VLAN:
  1070. /* vlan-clear-all: don't consume credit */
  1071. vfop->state = BNX2X_VFOP_QTEARDOWN_CLR_MAC;
  1072. vfop->rc = bnx2x_vfop_vlan_delall_cmd(bp, vf, &cmd, qid, false);
  1073. if (vfop->rc)
  1074. goto op_err;
  1075. return;
  1076. case BNX2X_VFOP_QTEARDOWN_CLR_MAC:
  1077. /* mac-clear-all: consume credit */
  1078. vfop->state = BNX2X_VFOP_QTEARDOWN_QDTOR;
  1079. vfop->rc = bnx2x_vfop_mac_delall_cmd(bp, vf, &cmd, qid, false);
  1080. if (vfop->rc)
  1081. goto op_err;
  1082. return;
  1083. case BNX2X_VFOP_QTEARDOWN_QDTOR:
  1084. /* run the queue destruction flow */
  1085. DP(BNX2X_MSG_IOV, "case: BNX2X_VFOP_QTEARDOWN_QDTOR\n");
  1086. vfop->state = BNX2X_VFOP_QTEARDOWN_DONE;
  1087. DP(BNX2X_MSG_IOV, "new state: BNX2X_VFOP_QTEARDOWN_DONE\n");
  1088. vfop->rc = bnx2x_vfop_qdtor_cmd(bp, vf, &cmd, qid);
  1089. DP(BNX2X_MSG_IOV, "returned from cmd\n");
  1090. if (vfop->rc)
  1091. goto op_err;
  1092. return;
  1093. op_err:
  1094. BNX2X_ERR("QTEARDOWN[%d:%d] error: rc %d\n",
  1095. vf->abs_vfid, qid, vfop->rc);
  1096. case BNX2X_VFOP_QTEARDOWN_DONE:
  1097. bnx2x_vfop_end(bp, vf, vfop);
  1098. return;
  1099. default:
  1100. bnx2x_vfop_default(state);
  1101. }
  1102. }
  1103. int bnx2x_vfop_qdown_cmd(struct bnx2x *bp,
  1104. struct bnx2x_virtf *vf,
  1105. struct bnx2x_vfop_cmd *cmd,
  1106. int qid)
  1107. {
  1108. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  1109. if (vfop) {
  1110. vfop->args.qx.qid = qid;
  1111. bnx2x_vfop_opset(BNX2X_VFOP_QTEARDOWN_RXMODE,
  1112. bnx2x_vfop_qdown, cmd->done);
  1113. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_qdown,
  1114. cmd->block);
  1115. }
  1116. return -ENOMEM;
  1117. }
  1118. /* VF enable primitives
  1119. * when pretend is required the caller is responsible
  1120. * for calling pretend prior to calling these routines
  1121. */
  1122. /* called only on E1H or E2.
  1123. * When pretending to be PF, the pretend value is the function number 0...7
  1124. * When pretending to be VF, the pretend val is the PF-num:VF-valid:ABS-VFID
  1125. * combination
  1126. */
  1127. int bnx2x_pretend_func(struct bnx2x *bp, u16 pretend_func_val)
  1128. {
  1129. u32 pretend_reg;
  1130. if (CHIP_IS_E1H(bp) && pretend_func_val > E1H_FUNC_MAX)
  1131. return -1;
  1132. /* get my own pretend register */
  1133. pretend_reg = bnx2x_get_pretend_reg(bp);
  1134. REG_WR(bp, pretend_reg, pretend_func_val);
  1135. REG_RD(bp, pretend_reg);
  1136. return 0;
  1137. }
  1138. /* internal vf enable - until vf is enabled internally all transactions
  1139. * are blocked. this routine should always be called last with pretend.
  1140. */
  1141. static void bnx2x_vf_enable_internal(struct bnx2x *bp, u8 enable)
  1142. {
  1143. REG_WR(bp, PGLUE_B_REG_INTERNAL_VFID_ENABLE, enable ? 1 : 0);
  1144. }
  1145. /* clears vf error in all semi blocks */
  1146. static void bnx2x_vf_semi_clear_err(struct bnx2x *bp, u8 abs_vfid)
  1147. {
  1148. REG_WR(bp, TSEM_REG_VFPF_ERR_NUM, abs_vfid);
  1149. REG_WR(bp, USEM_REG_VFPF_ERR_NUM, abs_vfid);
  1150. REG_WR(bp, CSEM_REG_VFPF_ERR_NUM, abs_vfid);
  1151. REG_WR(bp, XSEM_REG_VFPF_ERR_NUM, abs_vfid);
  1152. }
  1153. static void bnx2x_vf_pglue_clear_err(struct bnx2x *bp, u8 abs_vfid)
  1154. {
  1155. u32 was_err_group = (2 * BP_PATH(bp) + abs_vfid) >> 5;
  1156. u32 was_err_reg = 0;
  1157. switch (was_err_group) {
  1158. case 0:
  1159. was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR;
  1160. break;
  1161. case 1:
  1162. was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_63_32_CLR;
  1163. break;
  1164. case 2:
  1165. was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_95_64_CLR;
  1166. break;
  1167. case 3:
  1168. was_err_reg = PGLUE_B_REG_WAS_ERROR_VF_127_96_CLR;
  1169. break;
  1170. }
  1171. REG_WR(bp, was_err_reg, 1 << (abs_vfid & 0x1f));
  1172. }
  1173. static void bnx2x_vf_igu_reset(struct bnx2x *bp, struct bnx2x_virtf *vf)
  1174. {
  1175. int i;
  1176. u32 val;
  1177. /* Set VF masks and configuration - pretend */
  1178. bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
  1179. REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_LSB, 0);
  1180. REG_WR(bp, IGU_REG_SB_INT_BEFORE_MASK_MSB, 0);
  1181. REG_WR(bp, IGU_REG_SB_MASK_LSB, 0);
  1182. REG_WR(bp, IGU_REG_SB_MASK_MSB, 0);
  1183. REG_WR(bp, IGU_REG_PBA_STATUS_LSB, 0);
  1184. REG_WR(bp, IGU_REG_PBA_STATUS_MSB, 0);
  1185. val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);
  1186. val |= (IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_MSI_MSIX_EN);
  1187. if (vf->cfg_flags & VF_CFG_INT_SIMD)
  1188. val |= IGU_VF_CONF_SINGLE_ISR_EN;
  1189. val &= ~IGU_VF_CONF_PARENT_MASK;
  1190. val |= BP_FUNC(bp) << IGU_VF_CONF_PARENT_SHIFT; /* parent PF */
  1191. REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);
  1192. DP(BNX2X_MSG_IOV,
  1193. "value in IGU_REG_VF_CONFIGURATION of vf %d after write %x\n",
  1194. vf->abs_vfid, REG_RD(bp, IGU_REG_VF_CONFIGURATION));
  1195. bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
  1196. /* iterate over all queues, clear sb consumer */
  1197. for (i = 0; i < vf_sb_count(vf); i++) {
  1198. u8 igu_sb_id = vf_igu_sb(vf, i);
  1199. /* zero prod memory */
  1200. REG_WR(bp, IGU_REG_PROD_CONS_MEMORY + igu_sb_id * 4, 0);
  1201. /* clear sb state machine */
  1202. bnx2x_igu_clear_sb_gen(bp, vf->abs_vfid, igu_sb_id,
  1203. false /* VF */);
  1204. /* disable + update */
  1205. bnx2x_vf_igu_ack_sb(bp, vf, igu_sb_id, USTORM_ID, 0,
  1206. IGU_INT_DISABLE, 1);
  1207. }
  1208. }
  1209. void bnx2x_vf_enable_access(struct bnx2x *bp, u8 abs_vfid)
  1210. {
  1211. /* set the VF-PF association in the FW */
  1212. storm_memset_vf_to_pf(bp, FW_VF_HANDLE(abs_vfid), BP_FUNC(bp));
  1213. storm_memset_func_en(bp, FW_VF_HANDLE(abs_vfid), 1);
  1214. /* clear vf errors*/
  1215. bnx2x_vf_semi_clear_err(bp, abs_vfid);
  1216. bnx2x_vf_pglue_clear_err(bp, abs_vfid);
  1217. /* internal vf-enable - pretend */
  1218. bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, abs_vfid));
  1219. DP(BNX2X_MSG_IOV, "enabling internal access for vf %x\n", abs_vfid);
  1220. bnx2x_vf_enable_internal(bp, true);
  1221. bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
  1222. }
  1223. static void bnx2x_vf_enable_traffic(struct bnx2x *bp, struct bnx2x_virtf *vf)
  1224. {
  1225. /* Reset vf in IGU interrupts are still disabled */
  1226. bnx2x_vf_igu_reset(bp, vf);
  1227. /* pretend to enable the vf with the PBF */
  1228. bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
  1229. REG_WR(bp, PBF_REG_DISABLE_VF, 0);
  1230. bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
  1231. }
  1232. static u8 bnx2x_vf_is_pcie_pending(struct bnx2x *bp, u8 abs_vfid)
  1233. {
  1234. struct pci_dev *dev;
  1235. struct bnx2x_virtf *vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
  1236. if (!vf)
  1237. goto unknown_dev;
  1238. dev = pci_get_bus_and_slot(vf->bus, vf->devfn);
  1239. if (dev)
  1240. return bnx2x_is_pcie_pending(dev);
  1241. unknown_dev:
  1242. BNX2X_ERR("Unknown device\n");
  1243. return false;
  1244. }
  1245. int bnx2x_vf_flr_clnup_epilog(struct bnx2x *bp, u8 abs_vfid)
  1246. {
  1247. /* Wait 100ms */
  1248. msleep(100);
  1249. /* Verify no pending pci transactions */
  1250. if (bnx2x_vf_is_pcie_pending(bp, abs_vfid))
  1251. BNX2X_ERR("PCIE Transactions still pending\n");
  1252. return 0;
  1253. }
  1254. /* must be called after the number of PF queues and the number of VFs are
  1255. * both known
  1256. */
  1257. static void
  1258. bnx2x_iov_static_resc(struct bnx2x *bp, struct vf_pf_resc_request *resc)
  1259. {
  1260. u16 vlan_count = 0;
  1261. /* will be set only during VF-ACQUIRE */
  1262. resc->num_rxqs = 0;
  1263. resc->num_txqs = 0;
  1264. /* no credit calculcis for macs (just yet) */
  1265. resc->num_mac_filters = 1;
  1266. /* divvy up vlan rules */
  1267. vlan_count = bp->vlans_pool.check(&bp->vlans_pool);
  1268. vlan_count = 1 << ilog2(vlan_count);
  1269. resc->num_vlan_filters = vlan_count / BNX2X_NR_VIRTFN(bp);
  1270. /* no real limitation */
  1271. resc->num_mc_filters = 0;
  1272. /* num_sbs already set */
  1273. }
  1274. /* FLR routines: */
  1275. static void bnx2x_vf_free_resc(struct bnx2x *bp, struct bnx2x_virtf *vf)
  1276. {
  1277. /* reset the state variables */
  1278. bnx2x_iov_static_resc(bp, &vf->alloc_resc);
  1279. vf->state = VF_FREE;
  1280. }
  1281. static void bnx2x_vf_flr_clnup_hw(struct bnx2x *bp, struct bnx2x_virtf *vf)
  1282. {
  1283. u32 poll_cnt = bnx2x_flr_clnup_poll_count(bp);
  1284. /* DQ usage counter */
  1285. bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
  1286. bnx2x_flr_clnup_poll_hw_counter(bp, DORQ_REG_VF_USAGE_CNT,
  1287. "DQ VF usage counter timed out",
  1288. poll_cnt);
  1289. bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
  1290. /* FW cleanup command - poll for the results */
  1291. if (bnx2x_send_final_clnup(bp, (u8)FW_VF_HANDLE(vf->abs_vfid),
  1292. poll_cnt))
  1293. BNX2X_ERR("VF[%d] Final cleanup timed-out\n", vf->abs_vfid);
  1294. /* verify TX hw is flushed */
  1295. bnx2x_tx_hw_flushed(bp, poll_cnt);
  1296. }
  1297. static void bnx2x_vfop_flr(struct bnx2x *bp, struct bnx2x_virtf *vf)
  1298. {
  1299. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  1300. struct bnx2x_vfop_args_qx *qx = &vfop->args.qx;
  1301. enum bnx2x_vfop_flr_state state = vfop->state;
  1302. struct bnx2x_vfop_cmd cmd = {
  1303. .done = bnx2x_vfop_flr,
  1304. .block = false,
  1305. };
  1306. if (vfop->rc < 0)
  1307. goto op_err;
  1308. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  1309. switch (state) {
  1310. case BNX2X_VFOP_FLR_QUEUES:
  1311. /* the cleanup operations are valid if and only if the VF
  1312. * was first acquired.
  1313. */
  1314. if (++(qx->qid) < vf_rxq_count(vf)) {
  1315. vfop->rc = bnx2x_vfop_qflr_cmd(bp, vf, &cmd,
  1316. qx->qid);
  1317. if (vfop->rc)
  1318. goto op_err;
  1319. return;
  1320. }
  1321. /* remove multicasts */
  1322. vfop->state = BNX2X_VFOP_FLR_HW;
  1323. vfop->rc = bnx2x_vfop_mcast_cmd(bp, vf, &cmd, NULL,
  1324. 0, true);
  1325. if (vfop->rc)
  1326. goto op_err;
  1327. return;
  1328. case BNX2X_VFOP_FLR_HW:
  1329. /* dispatch final cleanup and wait for HW queues to flush */
  1330. bnx2x_vf_flr_clnup_hw(bp, vf);
  1331. /* release VF resources */
  1332. bnx2x_vf_free_resc(bp, vf);
  1333. /* re-open the mailbox */
  1334. bnx2x_vf_enable_mbx(bp, vf->abs_vfid);
  1335. goto op_done;
  1336. default:
  1337. bnx2x_vfop_default(state);
  1338. }
  1339. op_err:
  1340. BNX2X_ERR("VF[%d] FLR error: rc %d\n", vf->abs_vfid, vfop->rc);
  1341. op_done:
  1342. vf->flr_clnup_stage = VF_FLR_ACK;
  1343. bnx2x_vfop_end(bp, vf, vfop);
  1344. bnx2x_unlock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);
  1345. }
  1346. static int bnx2x_vfop_flr_cmd(struct bnx2x *bp,
  1347. struct bnx2x_virtf *vf,
  1348. vfop_handler_t done)
  1349. {
  1350. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  1351. if (vfop) {
  1352. vfop->args.qx.qid = -1; /* loop */
  1353. bnx2x_vfop_opset(BNX2X_VFOP_FLR_QUEUES,
  1354. bnx2x_vfop_flr, done);
  1355. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_flr, false);
  1356. }
  1357. return -ENOMEM;
  1358. }
  1359. static void bnx2x_vf_flr_clnup(struct bnx2x *bp, struct bnx2x_virtf *prev_vf)
  1360. {
  1361. int i = prev_vf ? prev_vf->index + 1 : 0;
  1362. struct bnx2x_virtf *vf;
  1363. /* find next VF to cleanup */
  1364. next_vf_to_clean:
  1365. for (;
  1366. i < BNX2X_NR_VIRTFN(bp) &&
  1367. (bnx2x_vf(bp, i, state) != VF_RESET ||
  1368. bnx2x_vf(bp, i, flr_clnup_stage) != VF_FLR_CLN);
  1369. i++)
  1370. ;
  1371. DP(BNX2X_MSG_IOV, "next vf to cleanup: %d. num of vfs: %d\n", i,
  1372. BNX2X_NR_VIRTFN(bp));
  1373. if (i < BNX2X_NR_VIRTFN(bp)) {
  1374. vf = BP_VF(bp, i);
  1375. /* lock the vf pf channel */
  1376. bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_FLR);
  1377. /* invoke the VF FLR SM */
  1378. if (bnx2x_vfop_flr_cmd(bp, vf, bnx2x_vf_flr_clnup)) {
  1379. BNX2X_ERR("VF[%d]: FLR cleanup failed -ENOMEM\n",
  1380. vf->abs_vfid);
  1381. /* mark the VF to be ACKED and continue */
  1382. vf->flr_clnup_stage = VF_FLR_ACK;
  1383. goto next_vf_to_clean;
  1384. }
  1385. return;
  1386. }
  1387. /* we are done, update vf records */
  1388. for_each_vf(bp, i) {
  1389. vf = BP_VF(bp, i);
  1390. if (vf->flr_clnup_stage != VF_FLR_ACK)
  1391. continue;
  1392. vf->flr_clnup_stage = VF_FLR_EPILOG;
  1393. }
  1394. /* Acknowledge the handled VFs.
  1395. * we are acknowledge all the vfs which an flr was requested for, even
  1396. * if amongst them there are such that we never opened, since the mcp
  1397. * will interrupt us immediately again if we only ack some of the bits,
  1398. * resulting in an endless loop. This can happen for example in KVM
  1399. * where an 'all ones' flr request is sometimes given by hyper visor
  1400. */
  1401. DP(BNX2X_MSG_MCP, "DRV_STATUS_VF_DISABLED ACK for vfs 0x%x 0x%x\n",
  1402. bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);
  1403. for (i = 0; i < FLRD_VFS_DWORDS; i++)
  1404. SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i],
  1405. bp->vfdb->flrd_vfs[i]);
  1406. bnx2x_fw_command(bp, DRV_MSG_CODE_VF_DISABLED_DONE, 0);
  1407. /* clear the acked bits - better yet if the MCP implemented
  1408. * write to clear semantics
  1409. */
  1410. for (i = 0; i < FLRD_VFS_DWORDS; i++)
  1411. SHMEM2_WR(bp, drv_ack_vf_disabled[BP_FW_MB_IDX(bp)][i], 0);
  1412. }
  1413. void bnx2x_vf_handle_flr_event(struct bnx2x *bp)
  1414. {
  1415. int i;
  1416. /* Read FLR'd VFs */
  1417. for (i = 0; i < FLRD_VFS_DWORDS; i++)
  1418. bp->vfdb->flrd_vfs[i] = SHMEM2_RD(bp, mcp_vf_disabled[i]);
  1419. DP(BNX2X_MSG_MCP,
  1420. "DRV_STATUS_VF_DISABLED received for vfs 0x%x 0x%x\n",
  1421. bp->vfdb->flrd_vfs[0], bp->vfdb->flrd_vfs[1]);
  1422. for_each_vf(bp, i) {
  1423. struct bnx2x_virtf *vf = BP_VF(bp, i);
  1424. u32 reset = 0;
  1425. if (vf->abs_vfid < 32)
  1426. reset = bp->vfdb->flrd_vfs[0] & (1 << vf->abs_vfid);
  1427. else
  1428. reset = bp->vfdb->flrd_vfs[1] &
  1429. (1 << (vf->abs_vfid - 32));
  1430. if (reset) {
  1431. /* set as reset and ready for cleanup */
  1432. vf->state = VF_RESET;
  1433. vf->flr_clnup_stage = VF_FLR_CLN;
  1434. DP(BNX2X_MSG_IOV,
  1435. "Initiating Final cleanup for VF %d\n",
  1436. vf->abs_vfid);
  1437. }
  1438. }
  1439. /* do the FLR cleanup for all marked VFs*/
  1440. bnx2x_vf_flr_clnup(bp, NULL);
  1441. }
  1442. /* IOV global initialization routines */
  1443. void bnx2x_iov_init_dq(struct bnx2x *bp)
  1444. {
  1445. if (!IS_SRIOV(bp))
  1446. return;
  1447. /* Set the DQ such that the CID reflect the abs_vfid */
  1448. REG_WR(bp, DORQ_REG_VF_NORM_VF_BASE, 0);
  1449. REG_WR(bp, DORQ_REG_MAX_RVFID_SIZE, ilog2(BNX2X_MAX_NUM_OF_VFS));
  1450. /* Set VFs starting CID. If its > 0 the preceding CIDs are belong to
  1451. * the PF L2 queues
  1452. */
  1453. REG_WR(bp, DORQ_REG_VF_NORM_CID_BASE, BNX2X_FIRST_VF_CID);
  1454. /* The VF window size is the log2 of the max number of CIDs per VF */
  1455. REG_WR(bp, DORQ_REG_VF_NORM_CID_WND_SIZE, BNX2X_VF_CID_WND);
  1456. /* The VF doorbell size 0 - *B, 4 - 128B. We set it here to match
  1457. * the Pf doorbell size although the 2 are independent.
  1458. */
  1459. REG_WR(bp, DORQ_REG_VF_NORM_CID_OFST,
  1460. BNX2X_DB_SHIFT - BNX2X_DB_MIN_SHIFT);
  1461. /* No security checks for now -
  1462. * configure single rule (out of 16) mask = 0x1, value = 0x0,
  1463. * CID range 0 - 0x1ffff
  1464. */
  1465. REG_WR(bp, DORQ_REG_VF_TYPE_MASK_0, 1);
  1466. REG_WR(bp, DORQ_REG_VF_TYPE_VALUE_0, 0);
  1467. REG_WR(bp, DORQ_REG_VF_TYPE_MIN_MCID_0, 0);
  1468. REG_WR(bp, DORQ_REG_VF_TYPE_MAX_MCID_0, 0x1ffff);
  1469. /* set the number of VF alllowed doorbells to the full DQ range */
  1470. REG_WR(bp, DORQ_REG_VF_NORM_MAX_CID_COUNT, 0x20000);
  1471. /* set the VF doorbell threshold */
  1472. REG_WR(bp, DORQ_REG_VF_USAGE_CT_LIMIT, 4);
  1473. }
  1474. void bnx2x_iov_init_dmae(struct bnx2x *bp)
  1475. {
  1476. DP(BNX2X_MSG_IOV, "SRIOV is %s\n", IS_SRIOV(bp) ? "ON" : "OFF");
  1477. if (!IS_SRIOV(bp))
  1478. return;
  1479. REG_WR(bp, DMAE_REG_BACKWARD_COMP_EN, 0);
  1480. }
  1481. static int bnx2x_vf_bus(struct bnx2x *bp, int vfid)
  1482. {
  1483. struct pci_dev *dev = bp->pdev;
  1484. struct bnx2x_sriov *iov = &bp->vfdb->sriov;
  1485. return dev->bus->number + ((dev->devfn + iov->offset +
  1486. iov->stride * vfid) >> 8);
  1487. }
  1488. static int bnx2x_vf_devfn(struct bnx2x *bp, int vfid)
  1489. {
  1490. struct pci_dev *dev = bp->pdev;
  1491. struct bnx2x_sriov *iov = &bp->vfdb->sriov;
  1492. return (dev->devfn + iov->offset + iov->stride * vfid) & 0xff;
  1493. }
  1494. static void bnx2x_vf_set_bars(struct bnx2x *bp, struct bnx2x_virtf *vf)
  1495. {
  1496. int i, n;
  1497. struct pci_dev *dev = bp->pdev;
  1498. struct bnx2x_sriov *iov = &bp->vfdb->sriov;
  1499. for (i = 0, n = 0; i < PCI_SRIOV_NUM_BARS; i += 2, n++) {
  1500. u64 start = pci_resource_start(dev, PCI_IOV_RESOURCES + i);
  1501. u32 size = pci_resource_len(dev, PCI_IOV_RESOURCES + i);
  1502. do_div(size, iov->total);
  1503. vf->bars[n].bar = start + size * vf->abs_vfid;
  1504. vf->bars[n].size = size;
  1505. }
  1506. }
  1507. static int bnx2x_ari_enabled(struct pci_dev *dev)
  1508. {
  1509. return dev->bus->self && dev->bus->self->ari_enabled;
  1510. }
  1511. static void
  1512. bnx2x_get_vf_igu_cam_info(struct bnx2x *bp)
  1513. {
  1514. int sb_id;
  1515. u32 val;
  1516. u8 fid;
  1517. /* IGU in normal mode - read CAM */
  1518. for (sb_id = 0; sb_id < IGU_REG_MAPPING_MEMORY_SIZE; sb_id++) {
  1519. val = REG_RD(bp, IGU_REG_MAPPING_MEMORY + sb_id * 4);
  1520. if (!(val & IGU_REG_MAPPING_MEMORY_VALID))
  1521. continue;
  1522. fid = GET_FIELD((val), IGU_REG_MAPPING_MEMORY_FID);
  1523. if (!(fid & IGU_FID_ENCODE_IS_PF))
  1524. bnx2x_vf_set_igu_info(bp, sb_id,
  1525. (fid & IGU_FID_VF_NUM_MASK));
  1526. DP(BNX2X_MSG_IOV, "%s[%d], igu_sb_id=%d, msix=%d\n",
  1527. ((fid & IGU_FID_ENCODE_IS_PF) ? "PF" : "VF"),
  1528. ((fid & IGU_FID_ENCODE_IS_PF) ? (fid & IGU_FID_PF_NUM_MASK) :
  1529. (fid & IGU_FID_VF_NUM_MASK)), sb_id,
  1530. GET_FIELD((val), IGU_REG_MAPPING_MEMORY_VECTOR));
  1531. }
  1532. }
  1533. static void __bnx2x_iov_free_vfdb(struct bnx2x *bp)
  1534. {
  1535. if (bp->vfdb) {
  1536. kfree(bp->vfdb->vfqs);
  1537. kfree(bp->vfdb->vfs);
  1538. kfree(bp->vfdb);
  1539. }
  1540. bp->vfdb = NULL;
  1541. }
  1542. static int bnx2x_sriov_pci_cfg_info(struct bnx2x *bp, struct bnx2x_sriov *iov)
  1543. {
  1544. int pos;
  1545. struct pci_dev *dev = bp->pdev;
  1546. pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV);
  1547. if (!pos) {
  1548. BNX2X_ERR("failed to find SRIOV capability in device\n");
  1549. return -ENODEV;
  1550. }
  1551. iov->pos = pos;
  1552. DP(BNX2X_MSG_IOV, "sriov ext pos %d\n", pos);
  1553. pci_read_config_word(dev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
  1554. pci_read_config_word(dev, pos + PCI_SRIOV_TOTAL_VF, &iov->total);
  1555. pci_read_config_word(dev, pos + PCI_SRIOV_INITIAL_VF, &iov->initial);
  1556. pci_read_config_word(dev, pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
  1557. pci_read_config_word(dev, pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
  1558. pci_read_config_dword(dev, pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
  1559. pci_read_config_dword(dev, pos + PCI_SRIOV_CAP, &iov->cap);
  1560. pci_read_config_byte(dev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
  1561. return 0;
  1562. }
  1563. static int bnx2x_sriov_info(struct bnx2x *bp, struct bnx2x_sriov *iov)
  1564. {
  1565. u32 val;
  1566. /* read the SRIOV capability structure
  1567. * The fields can be read via configuration read or
  1568. * directly from the device (starting at offset PCICFG_OFFSET)
  1569. */
  1570. if (bnx2x_sriov_pci_cfg_info(bp, iov))
  1571. return -ENODEV;
  1572. /* get the number of SRIOV bars */
  1573. iov->nres = 0;
  1574. /* read the first_vfid */
  1575. val = REG_RD(bp, PCICFG_OFFSET + GRC_CONFIG_REG_PF_INIT_VF);
  1576. iov->first_vf_in_pf = ((val & GRC_CR_PF_INIT_VF_PF_FIRST_VF_NUM_MASK)
  1577. * 8) - (BNX2X_MAX_NUM_OF_VFS * BP_PATH(bp));
  1578. DP(BNX2X_MSG_IOV,
  1579. "IOV info[%d]: first vf %d, nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n",
  1580. BP_FUNC(bp),
  1581. iov->first_vf_in_pf, iov->nres, iov->cap, iov->ctrl, iov->total,
  1582. iov->initial, iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz);
  1583. return 0;
  1584. }
  1585. static u8 bnx2x_iov_get_max_queue_count(struct bnx2x *bp)
  1586. {
  1587. int i;
  1588. u8 queue_count = 0;
  1589. if (IS_SRIOV(bp))
  1590. for_each_vf(bp, i)
  1591. queue_count += bnx2x_vf(bp, i, alloc_resc.num_sbs);
  1592. return queue_count;
  1593. }
  1594. /* must be called after PF bars are mapped */
  1595. int bnx2x_iov_init_one(struct bnx2x *bp, int int_mode_param,
  1596. int num_vfs_param)
  1597. {
  1598. int err, i, qcount;
  1599. struct bnx2x_sriov *iov;
  1600. struct pci_dev *dev = bp->pdev;
  1601. bp->vfdb = NULL;
  1602. /* verify is pf */
  1603. if (IS_VF(bp))
  1604. return 0;
  1605. /* verify sriov capability is present in configuration space */
  1606. if (!pci_find_ext_capability(dev, PCI_EXT_CAP_ID_SRIOV))
  1607. return 0;
  1608. /* verify chip revision */
  1609. if (CHIP_IS_E1x(bp))
  1610. return 0;
  1611. /* check if SRIOV support is turned off */
  1612. if (!num_vfs_param)
  1613. return 0;
  1614. /* SRIOV assumes that num of PF CIDs < BNX2X_FIRST_VF_CID */
  1615. if (BNX2X_L2_MAX_CID(bp) >= BNX2X_FIRST_VF_CID) {
  1616. BNX2X_ERR("PF cids %d are overspilling into vf space (starts at %d). Abort SRIOV\n",
  1617. BNX2X_L2_MAX_CID(bp), BNX2X_FIRST_VF_CID);
  1618. return 0;
  1619. }
  1620. /* SRIOV can be enabled only with MSIX */
  1621. if (int_mode_param == BNX2X_INT_MODE_MSI ||
  1622. int_mode_param == BNX2X_INT_MODE_INTX)
  1623. BNX2X_ERR("Forced MSI/INTx mode is incompatible with SRIOV\n");
  1624. err = -EIO;
  1625. /* verify ari is enabled */
  1626. if (!bnx2x_ari_enabled(bp->pdev)) {
  1627. BNX2X_ERR("ARI not supported, SRIOV can not be enabled\n");
  1628. return err;
  1629. }
  1630. /* verify igu is in normal mode */
  1631. if (CHIP_INT_MODE_IS_BC(bp)) {
  1632. BNX2X_ERR("IGU not normal mode, SRIOV can not be enabled\n");
  1633. return err;
  1634. }
  1635. /* allocate the vfs database */
  1636. bp->vfdb = kzalloc(sizeof(*(bp->vfdb)), GFP_KERNEL);
  1637. if (!bp->vfdb) {
  1638. BNX2X_ERR("failed to allocate vf database\n");
  1639. err = -ENOMEM;
  1640. goto failed;
  1641. }
  1642. /* get the sriov info - Linux already collected all the pertinent
  1643. * information, however the sriov structure is for the private use
  1644. * of the pci module. Also we want this information regardless
  1645. * of the hyper-visor.
  1646. */
  1647. iov = &(bp->vfdb->sriov);
  1648. err = bnx2x_sriov_info(bp, iov);
  1649. if (err)
  1650. goto failed;
  1651. /* SR-IOV capability was enabled but there are no VFs*/
  1652. if (iov->total == 0)
  1653. goto failed;
  1654. /* calculate the actual number of VFs */
  1655. iov->nr_virtfn = min_t(u16, iov->total, (u16)num_vfs_param);
  1656. /* allocate the vf array */
  1657. bp->vfdb->vfs = kzalloc(sizeof(struct bnx2x_virtf) *
  1658. BNX2X_NR_VIRTFN(bp), GFP_KERNEL);
  1659. if (!bp->vfdb->vfs) {
  1660. BNX2X_ERR("failed to allocate vf array\n");
  1661. err = -ENOMEM;
  1662. goto failed;
  1663. }
  1664. /* Initial VF init - index and abs_vfid - nr_virtfn must be set */
  1665. for_each_vf(bp, i) {
  1666. bnx2x_vf(bp, i, index) = i;
  1667. bnx2x_vf(bp, i, abs_vfid) = iov->first_vf_in_pf + i;
  1668. bnx2x_vf(bp, i, state) = VF_FREE;
  1669. INIT_LIST_HEAD(&bnx2x_vf(bp, i, op_list_head));
  1670. mutex_init(&bnx2x_vf(bp, i, op_mutex));
  1671. bnx2x_vf(bp, i, op_current) = CHANNEL_TLV_NONE;
  1672. }
  1673. /* re-read the IGU CAM for VFs - index and abs_vfid must be set */
  1674. bnx2x_get_vf_igu_cam_info(bp);
  1675. /* get the total queue count and allocate the global queue arrays */
  1676. qcount = bnx2x_iov_get_max_queue_count(bp);
  1677. /* allocate the queue arrays for all VFs */
  1678. bp->vfdb->vfqs = kzalloc(qcount * sizeof(struct bnx2x_vf_queue),
  1679. GFP_KERNEL);
  1680. if (!bp->vfdb->vfqs) {
  1681. BNX2X_ERR("failed to allocate vf queue array\n");
  1682. err = -ENOMEM;
  1683. goto failed;
  1684. }
  1685. return 0;
  1686. failed:
  1687. DP(BNX2X_MSG_IOV, "Failed err=%d\n", err);
  1688. __bnx2x_iov_free_vfdb(bp);
  1689. return err;
  1690. }
  1691. void bnx2x_iov_remove_one(struct bnx2x *bp)
  1692. {
  1693. /* if SRIOV is not enabled there's nothing to do */
  1694. if (!IS_SRIOV(bp))
  1695. return;
  1696. DP(BNX2X_MSG_IOV, "about to call disable sriov\n");
  1697. pci_disable_sriov(bp->pdev);
  1698. DP(BNX2X_MSG_IOV, "sriov disabled\n");
  1699. /* free vf database */
  1700. __bnx2x_iov_free_vfdb(bp);
  1701. }
  1702. void bnx2x_iov_free_mem(struct bnx2x *bp)
  1703. {
  1704. int i;
  1705. if (!IS_SRIOV(bp))
  1706. return;
  1707. /* free vfs hw contexts */
  1708. for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
  1709. struct hw_dma *cxt = &bp->vfdb->context[i];
  1710. BNX2X_PCI_FREE(cxt->addr, cxt->mapping, cxt->size);
  1711. }
  1712. BNX2X_PCI_FREE(BP_VFDB(bp)->sp_dma.addr,
  1713. BP_VFDB(bp)->sp_dma.mapping,
  1714. BP_VFDB(bp)->sp_dma.size);
  1715. BNX2X_PCI_FREE(BP_VF_MBX_DMA(bp)->addr,
  1716. BP_VF_MBX_DMA(bp)->mapping,
  1717. BP_VF_MBX_DMA(bp)->size);
  1718. BNX2X_PCI_FREE(BP_VF_BULLETIN_DMA(bp)->addr,
  1719. BP_VF_BULLETIN_DMA(bp)->mapping,
  1720. BP_VF_BULLETIN_DMA(bp)->size);
  1721. }
  1722. int bnx2x_iov_alloc_mem(struct bnx2x *bp)
  1723. {
  1724. size_t tot_size;
  1725. int i, rc = 0;
  1726. if (!IS_SRIOV(bp))
  1727. return rc;
  1728. /* allocate vfs hw contexts */
  1729. tot_size = (BP_VFDB(bp)->sriov.first_vf_in_pf + BNX2X_NR_VIRTFN(bp)) *
  1730. BNX2X_CIDS_PER_VF * sizeof(union cdu_context);
  1731. for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
  1732. struct hw_dma *cxt = BP_VF_CXT_PAGE(bp, i);
  1733. cxt->size = min_t(size_t, tot_size, CDU_ILT_PAGE_SZ);
  1734. if (cxt->size) {
  1735. BNX2X_PCI_ALLOC(cxt->addr, &cxt->mapping, cxt->size);
  1736. } else {
  1737. cxt->addr = NULL;
  1738. cxt->mapping = 0;
  1739. }
  1740. tot_size -= cxt->size;
  1741. }
  1742. /* allocate vfs ramrods dma memory - client_init and set_mac */
  1743. tot_size = BNX2X_NR_VIRTFN(bp) * sizeof(struct bnx2x_vf_sp);
  1744. BNX2X_PCI_ALLOC(BP_VFDB(bp)->sp_dma.addr, &BP_VFDB(bp)->sp_dma.mapping,
  1745. tot_size);
  1746. BP_VFDB(bp)->sp_dma.size = tot_size;
  1747. /* allocate mailboxes */
  1748. tot_size = BNX2X_NR_VIRTFN(bp) * MBX_MSG_ALIGNED_SIZE;
  1749. BNX2X_PCI_ALLOC(BP_VF_MBX_DMA(bp)->addr, &BP_VF_MBX_DMA(bp)->mapping,
  1750. tot_size);
  1751. BP_VF_MBX_DMA(bp)->size = tot_size;
  1752. /* allocate local bulletin boards */
  1753. tot_size = BNX2X_NR_VIRTFN(bp) * BULLETIN_CONTENT_SIZE;
  1754. BNX2X_PCI_ALLOC(BP_VF_BULLETIN_DMA(bp)->addr,
  1755. &BP_VF_BULLETIN_DMA(bp)->mapping, tot_size);
  1756. BP_VF_BULLETIN_DMA(bp)->size = tot_size;
  1757. return 0;
  1758. alloc_mem_err:
  1759. return -ENOMEM;
  1760. }
  1761. static void bnx2x_vfq_init(struct bnx2x *bp, struct bnx2x_virtf *vf,
  1762. struct bnx2x_vf_queue *q)
  1763. {
  1764. u8 cl_id = vfq_cl_id(vf, q);
  1765. u8 func_id = FW_VF_HANDLE(vf->abs_vfid);
  1766. unsigned long q_type = 0;
  1767. set_bit(BNX2X_Q_TYPE_HAS_TX, &q_type);
  1768. set_bit(BNX2X_Q_TYPE_HAS_RX, &q_type);
  1769. /* Queue State object */
  1770. bnx2x_init_queue_obj(bp, &q->sp_obj,
  1771. cl_id, &q->cid, 1, func_id,
  1772. bnx2x_vf_sp(bp, vf, q_data),
  1773. bnx2x_vf_sp_map(bp, vf, q_data),
  1774. q_type);
  1775. DP(BNX2X_MSG_IOV,
  1776. "initialized vf %d's queue object. func id set to %d\n",
  1777. vf->abs_vfid, q->sp_obj.func_id);
  1778. /* mac/vlan objects are per queue, but only those
  1779. * that belong to the leading queue are initialized
  1780. */
  1781. if (vfq_is_leading(q)) {
  1782. /* mac */
  1783. bnx2x_init_mac_obj(bp, &q->mac_obj,
  1784. cl_id, q->cid, func_id,
  1785. bnx2x_vf_sp(bp, vf, mac_rdata),
  1786. bnx2x_vf_sp_map(bp, vf, mac_rdata),
  1787. BNX2X_FILTER_MAC_PENDING,
  1788. &vf->filter_state,
  1789. BNX2X_OBJ_TYPE_RX_TX,
  1790. &bp->macs_pool);
  1791. /* vlan */
  1792. bnx2x_init_vlan_obj(bp, &q->vlan_obj,
  1793. cl_id, q->cid, func_id,
  1794. bnx2x_vf_sp(bp, vf, vlan_rdata),
  1795. bnx2x_vf_sp_map(bp, vf, vlan_rdata),
  1796. BNX2X_FILTER_VLAN_PENDING,
  1797. &vf->filter_state,
  1798. BNX2X_OBJ_TYPE_RX_TX,
  1799. &bp->vlans_pool);
  1800. /* mcast */
  1801. bnx2x_init_mcast_obj(bp, &vf->mcast_obj, cl_id,
  1802. q->cid, func_id, func_id,
  1803. bnx2x_vf_sp(bp, vf, mcast_rdata),
  1804. bnx2x_vf_sp_map(bp, vf, mcast_rdata),
  1805. BNX2X_FILTER_MCAST_PENDING,
  1806. &vf->filter_state,
  1807. BNX2X_OBJ_TYPE_RX_TX);
  1808. vf->leading_rss = cl_id;
  1809. }
  1810. }
  1811. /* called by bnx2x_nic_load */
  1812. int bnx2x_iov_nic_init(struct bnx2x *bp)
  1813. {
  1814. int vfid, qcount, i;
  1815. if (!IS_SRIOV(bp)) {
  1816. DP(BNX2X_MSG_IOV, "vfdb was not allocated\n");
  1817. return 0;
  1818. }
  1819. DP(BNX2X_MSG_IOV, "num of vfs: %d\n", (bp)->vfdb->sriov.nr_virtfn);
  1820. /* initialize vf database */
  1821. for_each_vf(bp, vfid) {
  1822. struct bnx2x_virtf *vf = BP_VF(bp, vfid);
  1823. int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vfid) *
  1824. BNX2X_CIDS_PER_VF;
  1825. union cdu_context *base_cxt = (union cdu_context *)
  1826. BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +
  1827. (base_vf_cid & (ILT_PAGE_CIDS-1));
  1828. DP(BNX2X_MSG_IOV,
  1829. "VF[%d] Max IGU SBs: %d, base vf cid 0x%x, base cid 0x%x, base cxt %p\n",
  1830. vf->abs_vfid, vf_sb_count(vf), base_vf_cid,
  1831. BNX2X_FIRST_VF_CID + base_vf_cid, base_cxt);
  1832. /* init statically provisioned resources */
  1833. bnx2x_iov_static_resc(bp, &vf->alloc_resc);
  1834. /* queues are initialized during VF-ACQUIRE */
  1835. /* reserve the vf vlan credit */
  1836. bp->vlans_pool.get(&bp->vlans_pool, vf_vlan_rules_cnt(vf));
  1837. vf->filter_state = 0;
  1838. vf->sp_cl_id = bnx2x_fp(bp, 0, cl_id);
  1839. /* init mcast object - This object will be re-initialized
  1840. * during VF-ACQUIRE with the proper cl_id and cid.
  1841. * It needs to be initialized here so that it can be safely
  1842. * handled by a subsequent FLR flow.
  1843. */
  1844. bnx2x_init_mcast_obj(bp, &vf->mcast_obj, 0xFF,
  1845. 0xFF, 0xFF, 0xFF,
  1846. bnx2x_vf_sp(bp, vf, mcast_rdata),
  1847. bnx2x_vf_sp_map(bp, vf, mcast_rdata),
  1848. BNX2X_FILTER_MCAST_PENDING,
  1849. &vf->filter_state,
  1850. BNX2X_OBJ_TYPE_RX_TX);
  1851. /* set the mailbox message addresses */
  1852. BP_VF_MBX(bp, vfid)->msg = (struct bnx2x_vf_mbx_msg *)
  1853. (((u8 *)BP_VF_MBX_DMA(bp)->addr) + vfid *
  1854. MBX_MSG_ALIGNED_SIZE);
  1855. BP_VF_MBX(bp, vfid)->msg_mapping = BP_VF_MBX_DMA(bp)->mapping +
  1856. vfid * MBX_MSG_ALIGNED_SIZE;
  1857. /* Enable vf mailbox */
  1858. bnx2x_vf_enable_mbx(bp, vf->abs_vfid);
  1859. }
  1860. /* Final VF init */
  1861. qcount = 0;
  1862. for_each_vf(bp, i) {
  1863. struct bnx2x_virtf *vf = BP_VF(bp, i);
  1864. /* fill in the BDF and bars */
  1865. vf->bus = bnx2x_vf_bus(bp, i);
  1866. vf->devfn = bnx2x_vf_devfn(bp, i);
  1867. bnx2x_vf_set_bars(bp, vf);
  1868. DP(BNX2X_MSG_IOV,
  1869. "VF info[%d]: bus 0x%x, devfn 0x%x, bar0 [0x%x, %d], bar1 [0x%x, %d], bar2 [0x%x, %d]\n",
  1870. vf->abs_vfid, vf->bus, vf->devfn,
  1871. (unsigned)vf->bars[0].bar, vf->bars[0].size,
  1872. (unsigned)vf->bars[1].bar, vf->bars[1].size,
  1873. (unsigned)vf->bars[2].bar, vf->bars[2].size);
  1874. /* set local queue arrays */
  1875. vf->vfqs = &bp->vfdb->vfqs[qcount];
  1876. qcount += bnx2x_vf(bp, i, alloc_resc.num_sbs);
  1877. }
  1878. return 0;
  1879. }
  1880. /* called by bnx2x_chip_cleanup */
  1881. int bnx2x_iov_chip_cleanup(struct bnx2x *bp)
  1882. {
  1883. int i;
  1884. if (!IS_SRIOV(bp))
  1885. return 0;
  1886. /* release all the VFs */
  1887. for_each_vf(bp, i)
  1888. bnx2x_vf_release(bp, BP_VF(bp, i), true); /* blocking */
  1889. return 0;
  1890. }
  1891. /* called by bnx2x_init_hw_func, returns the next ilt line */
  1892. int bnx2x_iov_init_ilt(struct bnx2x *bp, u16 line)
  1893. {
  1894. int i;
  1895. struct bnx2x_ilt *ilt = BP_ILT(bp);
  1896. if (!IS_SRIOV(bp))
  1897. return line;
  1898. /* set vfs ilt lines */
  1899. for (i = 0; i < BNX2X_VF_CIDS/ILT_PAGE_CIDS; i++) {
  1900. struct hw_dma *hw_cxt = BP_VF_CXT_PAGE(bp, i);
  1901. ilt->lines[line+i].page = hw_cxt->addr;
  1902. ilt->lines[line+i].page_mapping = hw_cxt->mapping;
  1903. ilt->lines[line+i].size = hw_cxt->size; /* doesn't matter */
  1904. }
  1905. return line + i;
  1906. }
  1907. static u8 bnx2x_iov_is_vf_cid(struct bnx2x *bp, u16 cid)
  1908. {
  1909. return ((cid >= BNX2X_FIRST_VF_CID) &&
  1910. ((cid - BNX2X_FIRST_VF_CID) < BNX2X_VF_CIDS));
  1911. }
  1912. static
  1913. void bnx2x_vf_handle_classification_eqe(struct bnx2x *bp,
  1914. struct bnx2x_vf_queue *vfq,
  1915. union event_ring_elem *elem)
  1916. {
  1917. unsigned long ramrod_flags = 0;
  1918. int rc = 0;
  1919. /* Always push next commands out, don't wait here */
  1920. set_bit(RAMROD_CONT, &ramrod_flags);
  1921. switch (elem->message.data.eth_event.echo >> BNX2X_SWCID_SHIFT) {
  1922. case BNX2X_FILTER_MAC_PENDING:
  1923. rc = vfq->mac_obj.complete(bp, &vfq->mac_obj, elem,
  1924. &ramrod_flags);
  1925. break;
  1926. case BNX2X_FILTER_VLAN_PENDING:
  1927. rc = vfq->vlan_obj.complete(bp, &vfq->vlan_obj, elem,
  1928. &ramrod_flags);
  1929. break;
  1930. default:
  1931. BNX2X_ERR("Unsupported classification command: %d\n",
  1932. elem->message.data.eth_event.echo);
  1933. return;
  1934. }
  1935. if (rc < 0)
  1936. BNX2X_ERR("Failed to schedule new commands: %d\n", rc);
  1937. else if (rc > 0)
  1938. DP(BNX2X_MSG_IOV, "Scheduled next pending commands...\n");
  1939. }
  1940. static
  1941. void bnx2x_vf_handle_mcast_eqe(struct bnx2x *bp,
  1942. struct bnx2x_virtf *vf)
  1943. {
  1944. struct bnx2x_mcast_ramrod_params rparam = {NULL};
  1945. int rc;
  1946. rparam.mcast_obj = &vf->mcast_obj;
  1947. vf->mcast_obj.raw.clear_pending(&vf->mcast_obj.raw);
  1948. /* If there are pending mcast commands - send them */
  1949. if (vf->mcast_obj.check_pending(&vf->mcast_obj)) {
  1950. rc = bnx2x_config_mcast(bp, &rparam, BNX2X_MCAST_CMD_CONT);
  1951. if (rc < 0)
  1952. BNX2X_ERR("Failed to send pending mcast commands: %d\n",
  1953. rc);
  1954. }
  1955. }
  1956. static
  1957. void bnx2x_vf_handle_filters_eqe(struct bnx2x *bp,
  1958. struct bnx2x_virtf *vf)
  1959. {
  1960. smp_mb__before_clear_bit();
  1961. clear_bit(BNX2X_FILTER_RX_MODE_PENDING, &vf->filter_state);
  1962. smp_mb__after_clear_bit();
  1963. }
  1964. int bnx2x_iov_eq_sp_event(struct bnx2x *bp, union event_ring_elem *elem)
  1965. {
  1966. struct bnx2x_virtf *vf;
  1967. int qidx = 0, abs_vfid;
  1968. u8 opcode;
  1969. u16 cid = 0xffff;
  1970. if (!IS_SRIOV(bp))
  1971. return 1;
  1972. /* first get the cid - the only events we handle here are cfc-delete
  1973. * and set-mac completion
  1974. */
  1975. opcode = elem->message.opcode;
  1976. switch (opcode) {
  1977. case EVENT_RING_OPCODE_CFC_DEL:
  1978. cid = SW_CID((__force __le32)
  1979. elem->message.data.cfc_del_event.cid);
  1980. DP(BNX2X_MSG_IOV, "checking cfc-del comp cid=%d\n", cid);
  1981. break;
  1982. case EVENT_RING_OPCODE_CLASSIFICATION_RULES:
  1983. case EVENT_RING_OPCODE_MULTICAST_RULES:
  1984. case EVENT_RING_OPCODE_FILTERS_RULES:
  1985. cid = (elem->message.data.eth_event.echo &
  1986. BNX2X_SWCID_MASK);
  1987. DP(BNX2X_MSG_IOV, "checking filtering comp cid=%d\n", cid);
  1988. break;
  1989. case EVENT_RING_OPCODE_VF_FLR:
  1990. abs_vfid = elem->message.data.vf_flr_event.vf_id;
  1991. DP(BNX2X_MSG_IOV, "Got VF FLR notification abs_vfid=%d\n",
  1992. abs_vfid);
  1993. goto get_vf;
  1994. case EVENT_RING_OPCODE_MALICIOUS_VF:
  1995. abs_vfid = elem->message.data.malicious_vf_event.vf_id;
  1996. DP(BNX2X_MSG_IOV, "Got VF MALICIOUS notification abs_vfid=%d\n",
  1997. abs_vfid);
  1998. goto get_vf;
  1999. default:
  2000. return 1;
  2001. }
  2002. /* check if the cid is the VF range */
  2003. if (!bnx2x_iov_is_vf_cid(bp, cid)) {
  2004. DP(BNX2X_MSG_IOV, "cid is outside vf range: %d\n", cid);
  2005. return 1;
  2006. }
  2007. /* extract vf and rxq index from vf_cid - relies on the following:
  2008. * 1. vfid on cid reflects the true abs_vfid
  2009. * 2. the max number of VFs (per path) is 64
  2010. */
  2011. qidx = cid & ((1 << BNX2X_VF_CID_WND)-1);
  2012. abs_vfid = (cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);
  2013. get_vf:
  2014. vf = bnx2x_vf_by_abs_fid(bp, abs_vfid);
  2015. if (!vf) {
  2016. BNX2X_ERR("EQ completion for unknown VF, cid %d, abs_vfid %d\n",
  2017. cid, abs_vfid);
  2018. return 0;
  2019. }
  2020. switch (opcode) {
  2021. case EVENT_RING_OPCODE_CFC_DEL:
  2022. DP(BNX2X_MSG_IOV, "got VF [%d:%d] cfc delete ramrod\n",
  2023. vf->abs_vfid, qidx);
  2024. vfq_get(vf, qidx)->sp_obj.complete_cmd(bp,
  2025. &vfq_get(vf,
  2026. qidx)->sp_obj,
  2027. BNX2X_Q_CMD_CFC_DEL);
  2028. break;
  2029. case EVENT_RING_OPCODE_CLASSIFICATION_RULES:
  2030. DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mac/vlan ramrod\n",
  2031. vf->abs_vfid, qidx);
  2032. bnx2x_vf_handle_classification_eqe(bp, vfq_get(vf, qidx), elem);
  2033. break;
  2034. case EVENT_RING_OPCODE_MULTICAST_RULES:
  2035. DP(BNX2X_MSG_IOV, "got VF [%d:%d] set mcast ramrod\n",
  2036. vf->abs_vfid, qidx);
  2037. bnx2x_vf_handle_mcast_eqe(bp, vf);
  2038. break;
  2039. case EVENT_RING_OPCODE_FILTERS_RULES:
  2040. DP(BNX2X_MSG_IOV, "got VF [%d:%d] set rx-mode ramrod\n",
  2041. vf->abs_vfid, qidx);
  2042. bnx2x_vf_handle_filters_eqe(bp, vf);
  2043. break;
  2044. case EVENT_RING_OPCODE_VF_FLR:
  2045. DP(BNX2X_MSG_IOV, "got VF [%d] FLR notification\n",
  2046. vf->abs_vfid);
  2047. /* Do nothing for now */
  2048. break;
  2049. case EVENT_RING_OPCODE_MALICIOUS_VF:
  2050. DP(BNX2X_MSG_IOV, "got VF [%d] MALICIOUS notification\n",
  2051. vf->abs_vfid);
  2052. /* Do nothing for now */
  2053. break;
  2054. }
  2055. /* SRIOV: reschedule any 'in_progress' operations */
  2056. bnx2x_iov_sp_event(bp, cid, false);
  2057. return 0;
  2058. }
  2059. static struct bnx2x_virtf *bnx2x_vf_by_cid(struct bnx2x *bp, int vf_cid)
  2060. {
  2061. /* extract the vf from vf_cid - relies on the following:
  2062. * 1. vfid on cid reflects the true abs_vfid
  2063. * 2. the max number of VFs (per path) is 64
  2064. */
  2065. int abs_vfid = (vf_cid >> BNX2X_VF_CID_WND) & (BNX2X_MAX_NUM_OF_VFS-1);
  2066. return bnx2x_vf_by_abs_fid(bp, abs_vfid);
  2067. }
  2068. void bnx2x_iov_set_queue_sp_obj(struct bnx2x *bp, int vf_cid,
  2069. struct bnx2x_queue_sp_obj **q_obj)
  2070. {
  2071. struct bnx2x_virtf *vf;
  2072. if (!IS_SRIOV(bp))
  2073. return;
  2074. vf = bnx2x_vf_by_cid(bp, vf_cid);
  2075. if (vf) {
  2076. /* extract queue index from vf_cid - relies on the following:
  2077. * 1. vfid on cid reflects the true abs_vfid
  2078. * 2. the max number of VFs (per path) is 64
  2079. */
  2080. int q_index = vf_cid & ((1 << BNX2X_VF_CID_WND)-1);
  2081. *q_obj = &bnx2x_vfq(vf, q_index, sp_obj);
  2082. } else {
  2083. BNX2X_ERR("No vf matching cid %d\n", vf_cid);
  2084. }
  2085. }
  2086. void bnx2x_iov_sp_event(struct bnx2x *bp, int vf_cid, bool queue_work)
  2087. {
  2088. struct bnx2x_virtf *vf;
  2089. /* check if the cid is the VF range */
  2090. if (!IS_SRIOV(bp) || !bnx2x_iov_is_vf_cid(bp, vf_cid))
  2091. return;
  2092. vf = bnx2x_vf_by_cid(bp, vf_cid);
  2093. if (vf) {
  2094. /* set in_progress flag */
  2095. atomic_set(&vf->op_in_progress, 1);
  2096. if (queue_work)
  2097. queue_delayed_work(bnx2x_wq, &bp->sp_task, 0);
  2098. }
  2099. }
  2100. void bnx2x_iov_adjust_stats_req(struct bnx2x *bp)
  2101. {
  2102. int i;
  2103. int first_queue_query_index, num_queues_req;
  2104. dma_addr_t cur_data_offset;
  2105. struct stats_query_entry *cur_query_entry;
  2106. u8 stats_count = 0;
  2107. bool is_fcoe = false;
  2108. if (!IS_SRIOV(bp))
  2109. return;
  2110. if (!NO_FCOE(bp))
  2111. is_fcoe = true;
  2112. /* fcoe adds one global request and one queue request */
  2113. num_queues_req = BNX2X_NUM_ETH_QUEUES(bp) + is_fcoe;
  2114. first_queue_query_index = BNX2X_FIRST_QUEUE_QUERY_IDX -
  2115. (is_fcoe ? 0 : 1);
  2116. DP(BNX2X_MSG_IOV,
  2117. "BNX2X_NUM_ETH_QUEUES %d, is_fcoe %d, first_queue_query_index %d => determined the last non virtual statistics query index is %d. Will add queries on top of that\n",
  2118. BNX2X_NUM_ETH_QUEUES(bp), is_fcoe, first_queue_query_index,
  2119. first_queue_query_index + num_queues_req);
  2120. cur_data_offset = bp->fw_stats_data_mapping +
  2121. offsetof(struct bnx2x_fw_stats_data, queue_stats) +
  2122. num_queues_req * sizeof(struct per_queue_stats);
  2123. cur_query_entry = &bp->fw_stats_req->
  2124. query[first_queue_query_index + num_queues_req];
  2125. for_each_vf(bp, i) {
  2126. int j;
  2127. struct bnx2x_virtf *vf = BP_VF(bp, i);
  2128. if (vf->state != VF_ENABLED) {
  2129. DP(BNX2X_MSG_IOV,
  2130. "vf %d not enabled so no stats for it\n",
  2131. vf->abs_vfid);
  2132. continue;
  2133. }
  2134. DP(BNX2X_MSG_IOV, "add addresses for vf %d\n", vf->abs_vfid);
  2135. for_each_vfq(vf, j) {
  2136. struct bnx2x_vf_queue *rxq = vfq_get(vf, j);
  2137. /* collect stats fro active queues only */
  2138. if (bnx2x_get_q_logical_state(bp, &rxq->sp_obj) ==
  2139. BNX2X_Q_LOGICAL_STATE_STOPPED)
  2140. continue;
  2141. /* create stats query entry for this queue */
  2142. cur_query_entry->kind = STATS_TYPE_QUEUE;
  2143. cur_query_entry->index = vfq_cl_id(vf, rxq);
  2144. cur_query_entry->funcID =
  2145. cpu_to_le16(FW_VF_HANDLE(vf->abs_vfid));
  2146. cur_query_entry->address.hi =
  2147. cpu_to_le32(U64_HI(vf->fw_stat_map));
  2148. cur_query_entry->address.lo =
  2149. cpu_to_le32(U64_LO(vf->fw_stat_map));
  2150. DP(BNX2X_MSG_IOV,
  2151. "added address %x %x for vf %d queue %d client %d\n",
  2152. cur_query_entry->address.hi,
  2153. cur_query_entry->address.lo, cur_query_entry->funcID,
  2154. j, cur_query_entry->index);
  2155. cur_query_entry++;
  2156. cur_data_offset += sizeof(struct per_queue_stats);
  2157. stats_count++;
  2158. }
  2159. }
  2160. bp->fw_stats_req->hdr.cmd_num = bp->fw_stats_num + stats_count;
  2161. }
  2162. void bnx2x_iov_sp_task(struct bnx2x *bp)
  2163. {
  2164. int i;
  2165. if (!IS_SRIOV(bp))
  2166. return;
  2167. /* Iterate over all VFs and invoke state transition for VFs with
  2168. * 'in-progress' slow-path operations
  2169. */
  2170. DP(BNX2X_MSG_IOV, "searching for pending vf operations\n");
  2171. for_each_vf(bp, i) {
  2172. struct bnx2x_virtf *vf = BP_VF(bp, i);
  2173. if (!list_empty(&vf->op_list_head) &&
  2174. atomic_read(&vf->op_in_progress)) {
  2175. DP(BNX2X_MSG_IOV, "running pending op for vf %d\n", i);
  2176. bnx2x_vfop_cur(bp, vf)->transition(bp, vf);
  2177. }
  2178. }
  2179. }
  2180. static inline
  2181. struct bnx2x_virtf *__vf_from_stat_id(struct bnx2x *bp, u8 stat_id)
  2182. {
  2183. int i;
  2184. struct bnx2x_virtf *vf = NULL;
  2185. for_each_vf(bp, i) {
  2186. vf = BP_VF(bp, i);
  2187. if (stat_id >= vf->igu_base_id &&
  2188. stat_id < vf->igu_base_id + vf_sb_count(vf))
  2189. break;
  2190. }
  2191. return vf;
  2192. }
  2193. /* VF API helpers */
  2194. static void bnx2x_vf_qtbl_set_q(struct bnx2x *bp, u8 abs_vfid, u8 qid,
  2195. u8 enable)
  2196. {
  2197. u32 reg = PXP_REG_HST_ZONE_PERMISSION_TABLE + qid * 4;
  2198. u32 val = enable ? (abs_vfid | (1 << 6)) : 0;
  2199. REG_WR(bp, reg, val);
  2200. }
  2201. static void bnx2x_vf_clr_qtbl(struct bnx2x *bp, struct bnx2x_virtf *vf)
  2202. {
  2203. int i;
  2204. for_each_vfq(vf, i)
  2205. bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,
  2206. vfq_qzone_id(vf, vfq_get(vf, i)), false);
  2207. }
  2208. static void bnx2x_vf_igu_disable(struct bnx2x *bp, struct bnx2x_virtf *vf)
  2209. {
  2210. u32 val;
  2211. /* clear the VF configuration - pretend */
  2212. bnx2x_pretend_func(bp, HW_VF_HANDLE(bp, vf->abs_vfid));
  2213. val = REG_RD(bp, IGU_REG_VF_CONFIGURATION);
  2214. val &= ~(IGU_VF_CONF_MSI_MSIX_EN | IGU_VF_CONF_SINGLE_ISR_EN |
  2215. IGU_VF_CONF_FUNC_EN | IGU_VF_CONF_PARENT_MASK);
  2216. REG_WR(bp, IGU_REG_VF_CONFIGURATION, val);
  2217. bnx2x_pretend_func(bp, BP_ABS_FUNC(bp));
  2218. }
  2219. u8 bnx2x_vf_max_queue_cnt(struct bnx2x *bp, struct bnx2x_virtf *vf)
  2220. {
  2221. return min_t(u8, min_t(u8, vf_sb_count(vf), BNX2X_CIDS_PER_VF),
  2222. BNX2X_VF_MAX_QUEUES);
  2223. }
  2224. static
  2225. int bnx2x_vf_chk_avail_resc(struct bnx2x *bp, struct bnx2x_virtf *vf,
  2226. struct vf_pf_resc_request *req_resc)
  2227. {
  2228. u8 rxq_cnt = vf_rxq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
  2229. u8 txq_cnt = vf_txq_count(vf) ? : bnx2x_vf_max_queue_cnt(bp, vf);
  2230. return ((req_resc->num_rxqs <= rxq_cnt) &&
  2231. (req_resc->num_txqs <= txq_cnt) &&
  2232. (req_resc->num_sbs <= vf_sb_count(vf)) &&
  2233. (req_resc->num_mac_filters <= vf_mac_rules_cnt(vf)) &&
  2234. (req_resc->num_vlan_filters <= vf_vlan_rules_cnt(vf)));
  2235. }
  2236. /* CORE VF API */
  2237. int bnx2x_vf_acquire(struct bnx2x *bp, struct bnx2x_virtf *vf,
  2238. struct vf_pf_resc_request *resc)
  2239. {
  2240. int base_vf_cid = (BP_VFDB(bp)->sriov.first_vf_in_pf + vf->index) *
  2241. BNX2X_CIDS_PER_VF;
  2242. union cdu_context *base_cxt = (union cdu_context *)
  2243. BP_VF_CXT_PAGE(bp, base_vf_cid/ILT_PAGE_CIDS)->addr +
  2244. (base_vf_cid & (ILT_PAGE_CIDS-1));
  2245. int i;
  2246. /* if state is 'acquired' the VF was not released or FLR'd, in
  2247. * this case the returned resources match the acquired already
  2248. * acquired resources. Verify that the requested numbers do
  2249. * not exceed the already acquired numbers.
  2250. */
  2251. if (vf->state == VF_ACQUIRED) {
  2252. DP(BNX2X_MSG_IOV, "VF[%d] Trying to re-acquire resources (VF was not released or FLR'd)\n",
  2253. vf->abs_vfid);
  2254. if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {
  2255. BNX2X_ERR("VF[%d] When re-acquiring resources, requested numbers must be <= then previously acquired numbers\n",
  2256. vf->abs_vfid);
  2257. return -EINVAL;
  2258. }
  2259. return 0;
  2260. }
  2261. /* Otherwise vf state must be 'free' or 'reset' */
  2262. if (vf->state != VF_FREE && vf->state != VF_RESET) {
  2263. BNX2X_ERR("VF[%d] Can not acquire a VF with state %d\n",
  2264. vf->abs_vfid, vf->state);
  2265. return -EINVAL;
  2266. }
  2267. /* static allocation:
  2268. * the global maximum number are fixed per VF. fail the request if
  2269. * requested number exceed these globals
  2270. */
  2271. if (!bnx2x_vf_chk_avail_resc(bp, vf, resc)) {
  2272. DP(BNX2X_MSG_IOV,
  2273. "cannot fulfill vf resource request. Placing maximal available values in response\n");
  2274. /* set the max resource in the vf */
  2275. return -ENOMEM;
  2276. }
  2277. /* Set resources counters - 0 request means max available */
  2278. vf_sb_count(vf) = resc->num_sbs;
  2279. vf_rxq_count(vf) = resc->num_rxqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
  2280. vf_txq_count(vf) = resc->num_txqs ? : bnx2x_vf_max_queue_cnt(bp, vf);
  2281. if (resc->num_mac_filters)
  2282. vf_mac_rules_cnt(vf) = resc->num_mac_filters;
  2283. if (resc->num_vlan_filters)
  2284. vf_vlan_rules_cnt(vf) = resc->num_vlan_filters;
  2285. DP(BNX2X_MSG_IOV,
  2286. "Fulfilling vf request: sb count %d, tx_count %d, rx_count %d, mac_rules_count %d, vlan_rules_count %d\n",
  2287. vf_sb_count(vf), vf_rxq_count(vf),
  2288. vf_txq_count(vf), vf_mac_rules_cnt(vf),
  2289. vf_vlan_rules_cnt(vf));
  2290. /* Initialize the queues */
  2291. if (!vf->vfqs) {
  2292. DP(BNX2X_MSG_IOV, "vf->vfqs was not allocated\n");
  2293. return -EINVAL;
  2294. }
  2295. for_each_vfq(vf, i) {
  2296. struct bnx2x_vf_queue *q = vfq_get(vf, i);
  2297. if (!q) {
  2298. DP(BNX2X_MSG_IOV, "q number %d was not allocated\n", i);
  2299. return -EINVAL;
  2300. }
  2301. q->index = i;
  2302. q->cxt = &((base_cxt + i)->eth);
  2303. q->cid = BNX2X_FIRST_VF_CID + base_vf_cid + i;
  2304. DP(BNX2X_MSG_IOV, "VFQ[%d:%d]: index %d, cid 0x%x, cxt %p\n",
  2305. vf->abs_vfid, i, q->index, q->cid, q->cxt);
  2306. /* init SP objects */
  2307. bnx2x_vfq_init(bp, vf, q);
  2308. }
  2309. vf->state = VF_ACQUIRED;
  2310. return 0;
  2311. }
  2312. int bnx2x_vf_init(struct bnx2x *bp, struct bnx2x_virtf *vf, dma_addr_t *sb_map)
  2313. {
  2314. struct bnx2x_func_init_params func_init = {0};
  2315. u16 flags = 0;
  2316. int i;
  2317. /* the sb resources are initialized at this point, do the
  2318. * FW/HW initializations
  2319. */
  2320. for_each_vf_sb(vf, i)
  2321. bnx2x_init_sb(bp, (dma_addr_t)sb_map[i], vf->abs_vfid, true,
  2322. vf_igu_sb(vf, i), vf_igu_sb(vf, i));
  2323. /* Sanity checks */
  2324. if (vf->state != VF_ACQUIRED) {
  2325. DP(BNX2X_MSG_IOV, "VF[%d] is not in VF_ACQUIRED, but %d\n",
  2326. vf->abs_vfid, vf->state);
  2327. return -EINVAL;
  2328. }
  2329. /* FLR cleanup epilogue */
  2330. if (bnx2x_vf_flr_clnup_epilog(bp, vf->abs_vfid))
  2331. return -EBUSY;
  2332. /* reset IGU VF statistics: MSIX */
  2333. REG_WR(bp, IGU_REG_STATISTIC_NUM_MESSAGE_SENT + vf->abs_vfid * 4 , 0);
  2334. /* vf init */
  2335. if (vf->cfg_flags & VF_CFG_STATS)
  2336. flags |= (FUNC_FLG_STATS | FUNC_FLG_SPQ);
  2337. if (vf->cfg_flags & VF_CFG_TPA)
  2338. flags |= FUNC_FLG_TPA;
  2339. if (is_vf_multi(vf))
  2340. flags |= FUNC_FLG_RSS;
  2341. /* function setup */
  2342. func_init.func_flgs = flags;
  2343. func_init.pf_id = BP_FUNC(bp);
  2344. func_init.func_id = FW_VF_HANDLE(vf->abs_vfid);
  2345. func_init.fw_stat_map = vf->fw_stat_map;
  2346. func_init.spq_map = vf->spq_map;
  2347. func_init.spq_prod = 0;
  2348. bnx2x_func_init(bp, &func_init);
  2349. /* Enable the vf */
  2350. bnx2x_vf_enable_access(bp, vf->abs_vfid);
  2351. bnx2x_vf_enable_traffic(bp, vf);
  2352. /* queue protection table */
  2353. for_each_vfq(vf, i)
  2354. bnx2x_vf_qtbl_set_q(bp, vf->abs_vfid,
  2355. vfq_qzone_id(vf, vfq_get(vf, i)), true);
  2356. vf->state = VF_ENABLED;
  2357. /* update vf bulletin board */
  2358. bnx2x_post_vf_bulletin(bp, vf->index);
  2359. return 0;
  2360. }
  2361. /* VFOP close (teardown the queues, delete mcasts and close HW) */
  2362. static void bnx2x_vfop_close(struct bnx2x *bp, struct bnx2x_virtf *vf)
  2363. {
  2364. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  2365. struct bnx2x_vfop_args_qx *qx = &vfop->args.qx;
  2366. enum bnx2x_vfop_close_state state = vfop->state;
  2367. struct bnx2x_vfop_cmd cmd = {
  2368. .done = bnx2x_vfop_close,
  2369. .block = false,
  2370. };
  2371. if (vfop->rc < 0)
  2372. goto op_err;
  2373. DP(BNX2X_MSG_IOV, "vf[%d] STATE: %d\n", vf->abs_vfid, state);
  2374. switch (state) {
  2375. case BNX2X_VFOP_CLOSE_QUEUES:
  2376. if (++(qx->qid) < vf_rxq_count(vf)) {
  2377. vfop->rc = bnx2x_vfop_qdown_cmd(bp, vf, &cmd, qx->qid);
  2378. if (vfop->rc)
  2379. goto op_err;
  2380. return;
  2381. }
  2382. /* remove multicasts */
  2383. vfop->state = BNX2X_VFOP_CLOSE_HW;
  2384. vfop->rc = bnx2x_vfop_mcast_cmd(bp, vf, &cmd, NULL, 0, false);
  2385. if (vfop->rc)
  2386. goto op_err;
  2387. return;
  2388. case BNX2X_VFOP_CLOSE_HW:
  2389. /* disable the interrupts */
  2390. DP(BNX2X_MSG_IOV, "disabling igu\n");
  2391. bnx2x_vf_igu_disable(bp, vf);
  2392. /* disable the VF */
  2393. DP(BNX2X_MSG_IOV, "clearing qtbl\n");
  2394. bnx2x_vf_clr_qtbl(bp, vf);
  2395. goto op_done;
  2396. default:
  2397. bnx2x_vfop_default(state);
  2398. }
  2399. op_err:
  2400. BNX2X_ERR("VF[%d] CLOSE error: rc %d\n", vf->abs_vfid, vfop->rc);
  2401. op_done:
  2402. vf->state = VF_ACQUIRED;
  2403. DP(BNX2X_MSG_IOV, "set state to acquired\n");
  2404. bnx2x_vfop_end(bp, vf, vfop);
  2405. }
  2406. int bnx2x_vfop_close_cmd(struct bnx2x *bp,
  2407. struct bnx2x_virtf *vf,
  2408. struct bnx2x_vfop_cmd *cmd)
  2409. {
  2410. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  2411. if (vfop) {
  2412. vfop->args.qx.qid = -1; /* loop */
  2413. bnx2x_vfop_opset(BNX2X_VFOP_CLOSE_QUEUES,
  2414. bnx2x_vfop_close, cmd->done);
  2415. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_close,
  2416. cmd->block);
  2417. }
  2418. return -ENOMEM;
  2419. }
  2420. /* VF release can be called either: 1. the VF was acquired but
  2421. * not enabled 2. the vf was enabled or in the process of being
  2422. * enabled
  2423. */
  2424. static void bnx2x_vfop_release(struct bnx2x *bp, struct bnx2x_virtf *vf)
  2425. {
  2426. struct bnx2x_vfop *vfop = bnx2x_vfop_cur(bp, vf);
  2427. struct bnx2x_vfop_cmd cmd = {
  2428. .done = bnx2x_vfop_release,
  2429. .block = false,
  2430. };
  2431. DP(BNX2X_MSG_IOV, "vfop->rc %d\n", vfop->rc);
  2432. if (vfop->rc < 0)
  2433. goto op_err;
  2434. DP(BNX2X_MSG_IOV, "VF[%d] STATE: %s\n", vf->abs_vfid,
  2435. vf->state == VF_FREE ? "Free" :
  2436. vf->state == VF_ACQUIRED ? "Acquired" :
  2437. vf->state == VF_ENABLED ? "Enabled" :
  2438. vf->state == VF_RESET ? "Reset" :
  2439. "Unknown");
  2440. switch (vf->state) {
  2441. case VF_ENABLED:
  2442. vfop->rc = bnx2x_vfop_close_cmd(bp, vf, &cmd);
  2443. if (vfop->rc)
  2444. goto op_err;
  2445. return;
  2446. case VF_ACQUIRED:
  2447. DP(BNX2X_MSG_IOV, "about to free resources\n");
  2448. bnx2x_vf_free_resc(bp, vf);
  2449. DP(BNX2X_MSG_IOV, "vfop->rc %d\n", vfop->rc);
  2450. goto op_done;
  2451. case VF_FREE:
  2452. case VF_RESET:
  2453. /* do nothing */
  2454. goto op_done;
  2455. default:
  2456. bnx2x_vfop_default(vf->state);
  2457. }
  2458. op_err:
  2459. BNX2X_ERR("VF[%d] RELEASE error: rc %d\n", vf->abs_vfid, vfop->rc);
  2460. op_done:
  2461. bnx2x_vfop_end(bp, vf, vfop);
  2462. }
  2463. int bnx2x_vfop_release_cmd(struct bnx2x *bp,
  2464. struct bnx2x_virtf *vf,
  2465. struct bnx2x_vfop_cmd *cmd)
  2466. {
  2467. struct bnx2x_vfop *vfop = bnx2x_vfop_add(bp, vf);
  2468. if (vfop) {
  2469. bnx2x_vfop_opset(-1, /* use vf->state */
  2470. bnx2x_vfop_release, cmd->done);
  2471. return bnx2x_vfop_transition(bp, vf, bnx2x_vfop_release,
  2472. cmd->block);
  2473. }
  2474. return -ENOMEM;
  2475. }
  2476. /* VF release ~ VF close + VF release-resources
  2477. * Release is the ultimate SW shutdown and is called whenever an
  2478. * irrecoverable error is encountered.
  2479. */
  2480. void bnx2x_vf_release(struct bnx2x *bp, struct bnx2x_virtf *vf, bool block)
  2481. {
  2482. struct bnx2x_vfop_cmd cmd = {
  2483. .done = NULL,
  2484. .block = block,
  2485. };
  2486. int rc;
  2487. bnx2x_lock_vf_pf_channel(bp, vf, CHANNEL_TLV_PF_RELEASE_VF);
  2488. rc = bnx2x_vfop_release_cmd(bp, vf, &cmd);
  2489. if (rc)
  2490. WARN(rc,
  2491. "VF[%d] Failed to allocate resources for release op- rc=%d\n",
  2492. vf->abs_vfid, rc);
  2493. }
  2494. static inline void bnx2x_vf_get_sbdf(struct bnx2x *bp,
  2495. struct bnx2x_virtf *vf, u32 *sbdf)
  2496. {
  2497. *sbdf = vf->devfn | (vf->bus << 8);
  2498. }
  2499. static inline void bnx2x_vf_get_bars(struct bnx2x *bp, struct bnx2x_virtf *vf,
  2500. struct bnx2x_vf_bar_info *bar_info)
  2501. {
  2502. int n;
  2503. bar_info->nr_bars = bp->vfdb->sriov.nres;
  2504. for (n = 0; n < bar_info->nr_bars; n++)
  2505. bar_info->bars[n] = vf->bars[n];
  2506. }
  2507. void bnx2x_lock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,
  2508. enum channel_tlvs tlv)
  2509. {
  2510. /* lock the channel */
  2511. mutex_lock(&vf->op_mutex);
  2512. /* record the locking op */
  2513. vf->op_current = tlv;
  2514. /* log the lock */
  2515. DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel locked by %d\n",
  2516. vf->abs_vfid, tlv);
  2517. }
  2518. void bnx2x_unlock_vf_pf_channel(struct bnx2x *bp, struct bnx2x_virtf *vf,
  2519. enum channel_tlvs expected_tlv)
  2520. {
  2521. WARN(expected_tlv != vf->op_current,
  2522. "lock mismatch: expected %d found %d", expected_tlv,
  2523. vf->op_current);
  2524. /* lock the channel */
  2525. mutex_unlock(&vf->op_mutex);
  2526. /* log the unlock */
  2527. DP(BNX2X_MSG_IOV, "VF[%d]: vf pf channel unlocked by %d\n",
  2528. vf->abs_vfid, vf->op_current);
  2529. /* record the locking op */
  2530. vf->op_current = CHANNEL_TLV_NONE;
  2531. }