amba-pl010.c 19 KB

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  1. /*
  2. * linux/drivers/char/amba.c
  3. *
  4. * Driver for AMBA serial ports
  5. *
  6. * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
  7. *
  8. * Copyright 1999 ARM Limited
  9. * Copyright (C) 2000 Deep Blue Solutions Ltd.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
  24. *
  25. * $Id: amba.c,v 1.41 2002/07/28 10:03:27 rmk Exp $
  26. *
  27. * This is a generic driver for ARM AMBA-type serial ports. They
  28. * have a lot of 16550-like features, but are not register compatible.
  29. * Note that although they do have CTS, DCD and DSR inputs, they do
  30. * not have an RI input, nor do they have DTR or RTS outputs. If
  31. * required, these have to be supplied via some other means (eg, GPIO)
  32. * and hooked into this driver.
  33. */
  34. #include <linux/config.h>
  35. #if defined(CONFIG_SERIAL_AMBA_PL010_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
  36. #define SUPPORT_SYSRQ
  37. #endif
  38. #include <linux/module.h>
  39. #include <linux/ioport.h>
  40. #include <linux/init.h>
  41. #include <linux/console.h>
  42. #include <linux/sysrq.h>
  43. #include <linux/device.h>
  44. #include <linux/tty.h>
  45. #include <linux/tty_flip.h>
  46. #include <linux/serial_core.h>
  47. #include <linux/serial.h>
  48. #include <asm/io.h>
  49. #include <asm/irq.h>
  50. #include <asm/hardware.h>
  51. #include <asm/hardware/amba.h>
  52. #include <asm/hardware/amba_serial.h>
  53. #define UART_NR 2
  54. #define SERIAL_AMBA_MAJOR 204
  55. #define SERIAL_AMBA_MINOR 16
  56. #define SERIAL_AMBA_NR UART_NR
  57. #define AMBA_ISR_PASS_LIMIT 256
  58. /*
  59. * Access macros for the AMBA UARTs
  60. */
  61. #define UART_GET_INT_STATUS(p) readb((p)->membase + UART010_IIR)
  62. #define UART_PUT_ICR(p, c) writel((c), (p)->membase + UART010_ICR)
  63. #define UART_GET_FR(p) readb((p)->membase + UART01x_FR)
  64. #define UART_GET_CHAR(p) readb((p)->membase + UART01x_DR)
  65. #define UART_PUT_CHAR(p, c) writel((c), (p)->membase + UART01x_DR)
  66. #define UART_GET_RSR(p) readb((p)->membase + UART01x_RSR)
  67. #define UART_GET_CR(p) readb((p)->membase + UART010_CR)
  68. #define UART_PUT_CR(p,c) writel((c), (p)->membase + UART010_CR)
  69. #define UART_GET_LCRL(p) readb((p)->membase + UART010_LCRL)
  70. #define UART_PUT_LCRL(p,c) writel((c), (p)->membase + UART010_LCRL)
  71. #define UART_GET_LCRM(p) readb((p)->membase + UART010_LCRM)
  72. #define UART_PUT_LCRM(p,c) writel((c), (p)->membase + UART010_LCRM)
  73. #define UART_GET_LCRH(p) readb((p)->membase + UART010_LCRH)
  74. #define UART_PUT_LCRH(p,c) writel((c), (p)->membase + UART010_LCRH)
  75. #define UART_RX_DATA(s) (((s) & UART01x_FR_RXFE) == 0)
  76. #define UART_TX_READY(s) (((s) & UART01x_FR_TXFF) == 0)
  77. #define UART_TX_EMPTY(p) ((UART_GET_FR(p) & UART01x_FR_TMSK) == 0)
  78. #define UART_DUMMY_RSR_RX /*256*/0
  79. #define UART_PORT_SIZE 64
  80. /*
  81. * On the Integrator platform, the port RTS and DTR are provided by
  82. * bits in the following SC_CTRLS register bits:
  83. * RTS DTR
  84. * UART0 7 6
  85. * UART1 5 4
  86. */
  87. #define SC_CTRLC (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLC_OFFSET)
  88. #define SC_CTRLS (IO_ADDRESS(INTEGRATOR_SC_BASE) + INTEGRATOR_SC_CTRLS_OFFSET)
  89. /*
  90. * We wrap our port structure around the generic uart_port.
  91. */
  92. struct uart_amba_port {
  93. struct uart_port port;
  94. unsigned int dtr_mask;
  95. unsigned int rts_mask;
  96. unsigned int old_status;
  97. };
  98. static void pl010_stop_tx(struct uart_port *port)
  99. {
  100. unsigned int cr;
  101. cr = UART_GET_CR(port);
  102. cr &= ~UART010_CR_TIE;
  103. UART_PUT_CR(port, cr);
  104. }
  105. static void pl010_start_tx(struct uart_port *port)
  106. {
  107. unsigned int cr;
  108. cr = UART_GET_CR(port);
  109. cr |= UART010_CR_TIE;
  110. UART_PUT_CR(port, cr);
  111. }
  112. static void pl010_stop_rx(struct uart_port *port)
  113. {
  114. unsigned int cr;
  115. cr = UART_GET_CR(port);
  116. cr &= ~(UART010_CR_RIE | UART010_CR_RTIE);
  117. UART_PUT_CR(port, cr);
  118. }
  119. static void pl010_enable_ms(struct uart_port *port)
  120. {
  121. unsigned int cr;
  122. cr = UART_GET_CR(port);
  123. cr |= UART010_CR_MSIE;
  124. UART_PUT_CR(port, cr);
  125. }
  126. static void
  127. #ifdef SUPPORT_SYSRQ
  128. pl010_rx_chars(struct uart_port *port, struct pt_regs *regs)
  129. #else
  130. pl010_rx_chars(struct uart_port *port)
  131. #endif
  132. {
  133. struct tty_struct *tty = port->info->tty;
  134. unsigned int status, ch, flag, rsr, max_count = 256;
  135. status = UART_GET_FR(port);
  136. while (UART_RX_DATA(status) && max_count--) {
  137. if (tty->flip.count >= TTY_FLIPBUF_SIZE) {
  138. if (tty->low_latency)
  139. tty_flip_buffer_push(tty);
  140. /*
  141. * If this failed then we will throw away the
  142. * bytes but must do so to clear interrupts.
  143. */
  144. }
  145. ch = UART_GET_CHAR(port);
  146. flag = TTY_NORMAL;
  147. port->icount.rx++;
  148. /*
  149. * Note that the error handling code is
  150. * out of the main execution path
  151. */
  152. rsr = UART_GET_RSR(port) | UART_DUMMY_RSR_RX;
  153. if (unlikely(rsr & UART01x_RSR_ANY)) {
  154. if (rsr & UART01x_RSR_BE) {
  155. rsr &= ~(UART01x_RSR_FE | UART01x_RSR_PE);
  156. port->icount.brk++;
  157. if (uart_handle_break(port))
  158. goto ignore_char;
  159. } else if (rsr & UART01x_RSR_PE)
  160. port->icount.parity++;
  161. else if (rsr & UART01x_RSR_FE)
  162. port->icount.frame++;
  163. if (rsr & UART01x_RSR_OE)
  164. port->icount.overrun++;
  165. rsr &= port->read_status_mask;
  166. if (rsr & UART01x_RSR_BE)
  167. flag = TTY_BREAK;
  168. else if (rsr & UART01x_RSR_PE)
  169. flag = TTY_PARITY;
  170. else if (rsr & UART01x_RSR_FE)
  171. flag = TTY_FRAME;
  172. }
  173. if (uart_handle_sysrq_char(port, ch, regs))
  174. goto ignore_char;
  175. uart_insert_char(port, rsr, UART01x_RSR_OE, ch, flag);
  176. ignore_char:
  177. status = UART_GET_FR(port);
  178. }
  179. tty_flip_buffer_push(tty);
  180. return;
  181. }
  182. static void pl010_tx_chars(struct uart_port *port)
  183. {
  184. struct circ_buf *xmit = &port->info->xmit;
  185. int count;
  186. if (port->x_char) {
  187. UART_PUT_CHAR(port, port->x_char);
  188. port->icount.tx++;
  189. port->x_char = 0;
  190. return;
  191. }
  192. if (uart_circ_empty(xmit) || uart_tx_stopped(port)) {
  193. pl010_stop_tx(port);
  194. return;
  195. }
  196. count = port->fifosize >> 1;
  197. do {
  198. UART_PUT_CHAR(port, xmit->buf[xmit->tail]);
  199. xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
  200. port->icount.tx++;
  201. if (uart_circ_empty(xmit))
  202. break;
  203. } while (--count > 0);
  204. if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
  205. uart_write_wakeup(port);
  206. if (uart_circ_empty(xmit))
  207. pl010_stop_tx(port);
  208. }
  209. static void pl010_modem_status(struct uart_port *port)
  210. {
  211. struct uart_amba_port *uap = (struct uart_amba_port *)port;
  212. unsigned int status, delta;
  213. UART_PUT_ICR(&uap->port, 0);
  214. status = UART_GET_FR(&uap->port) & UART01x_FR_MODEM_ANY;
  215. delta = status ^ uap->old_status;
  216. uap->old_status = status;
  217. if (!delta)
  218. return;
  219. if (delta & UART01x_FR_DCD)
  220. uart_handle_dcd_change(&uap->port, status & UART01x_FR_DCD);
  221. if (delta & UART01x_FR_DSR)
  222. uap->port.icount.dsr++;
  223. if (delta & UART01x_FR_CTS)
  224. uart_handle_cts_change(&uap->port, status & UART01x_FR_CTS);
  225. wake_up_interruptible(&uap->port.info->delta_msr_wait);
  226. }
  227. static irqreturn_t pl010_int(int irq, void *dev_id, struct pt_regs *regs)
  228. {
  229. struct uart_port *port = dev_id;
  230. unsigned int status, pass_counter = AMBA_ISR_PASS_LIMIT;
  231. int handled = 0;
  232. spin_lock(&port->lock);
  233. status = UART_GET_INT_STATUS(port);
  234. if (status) {
  235. do {
  236. if (status & (UART010_IIR_RTIS | UART010_IIR_RIS))
  237. #ifdef SUPPORT_SYSRQ
  238. pl010_rx_chars(port, regs);
  239. #else
  240. pl010_rx_chars(port);
  241. #endif
  242. if (status & UART010_IIR_MIS)
  243. pl010_modem_status(port);
  244. if (status & UART010_IIR_TIS)
  245. pl010_tx_chars(port);
  246. if (pass_counter-- == 0)
  247. break;
  248. status = UART_GET_INT_STATUS(port);
  249. } while (status & (UART010_IIR_RTIS | UART010_IIR_RIS |
  250. UART010_IIR_TIS));
  251. handled = 1;
  252. }
  253. spin_unlock(&port->lock);
  254. return IRQ_RETVAL(handled);
  255. }
  256. static unsigned int pl010_tx_empty(struct uart_port *port)
  257. {
  258. return UART_GET_FR(port) & UART01x_FR_BUSY ? 0 : TIOCSER_TEMT;
  259. }
  260. static unsigned int pl010_get_mctrl(struct uart_port *port)
  261. {
  262. unsigned int result = 0;
  263. unsigned int status;
  264. status = UART_GET_FR(port);
  265. if (status & UART01x_FR_DCD)
  266. result |= TIOCM_CAR;
  267. if (status & UART01x_FR_DSR)
  268. result |= TIOCM_DSR;
  269. if (status & UART01x_FR_CTS)
  270. result |= TIOCM_CTS;
  271. return result;
  272. }
  273. static void pl010_set_mctrl(struct uart_port *port, unsigned int mctrl)
  274. {
  275. struct uart_amba_port *uap = (struct uart_amba_port *)port;
  276. unsigned int ctrls = 0, ctrlc = 0;
  277. if (mctrl & TIOCM_RTS)
  278. ctrlc |= uap->rts_mask;
  279. else
  280. ctrls |= uap->rts_mask;
  281. if (mctrl & TIOCM_DTR)
  282. ctrlc |= uap->dtr_mask;
  283. else
  284. ctrls |= uap->dtr_mask;
  285. __raw_writel(ctrls, SC_CTRLS);
  286. __raw_writel(ctrlc, SC_CTRLC);
  287. }
  288. static void pl010_break_ctl(struct uart_port *port, int break_state)
  289. {
  290. unsigned long flags;
  291. unsigned int lcr_h;
  292. spin_lock_irqsave(&port->lock, flags);
  293. lcr_h = UART_GET_LCRH(port);
  294. if (break_state == -1)
  295. lcr_h |= UART01x_LCRH_BRK;
  296. else
  297. lcr_h &= ~UART01x_LCRH_BRK;
  298. UART_PUT_LCRH(port, lcr_h);
  299. spin_unlock_irqrestore(&port->lock, flags);
  300. }
  301. static int pl010_startup(struct uart_port *port)
  302. {
  303. struct uart_amba_port *uap = (struct uart_amba_port *)port;
  304. int retval;
  305. /*
  306. * Allocate the IRQ
  307. */
  308. retval = request_irq(port->irq, pl010_int, 0, "uart-pl010", port);
  309. if (retval)
  310. return retval;
  311. /*
  312. * initialise the old status of the modem signals
  313. */
  314. uap->old_status = UART_GET_FR(port) & UART01x_FR_MODEM_ANY;
  315. /*
  316. * Finally, enable interrupts
  317. */
  318. UART_PUT_CR(port, UART01x_CR_UARTEN | UART010_CR_RIE |
  319. UART010_CR_RTIE);
  320. return 0;
  321. }
  322. static void pl010_shutdown(struct uart_port *port)
  323. {
  324. /*
  325. * Free the interrupt
  326. */
  327. free_irq(port->irq, port);
  328. /*
  329. * disable all interrupts, disable the port
  330. */
  331. UART_PUT_CR(port, 0);
  332. /* disable break condition and fifos */
  333. UART_PUT_LCRH(port, UART_GET_LCRH(port) &
  334. ~(UART01x_LCRH_BRK | UART01x_LCRH_FEN));
  335. }
  336. static void
  337. pl010_set_termios(struct uart_port *port, struct termios *termios,
  338. struct termios *old)
  339. {
  340. unsigned int lcr_h, old_cr;
  341. unsigned long flags;
  342. unsigned int baud, quot;
  343. /*
  344. * Ask the core to calculate the divisor for us.
  345. */
  346. baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
  347. quot = uart_get_divisor(port, baud);
  348. switch (termios->c_cflag & CSIZE) {
  349. case CS5:
  350. lcr_h = UART01x_LCRH_WLEN_5;
  351. break;
  352. case CS6:
  353. lcr_h = UART01x_LCRH_WLEN_6;
  354. break;
  355. case CS7:
  356. lcr_h = UART01x_LCRH_WLEN_7;
  357. break;
  358. default: // CS8
  359. lcr_h = UART01x_LCRH_WLEN_8;
  360. break;
  361. }
  362. if (termios->c_cflag & CSTOPB)
  363. lcr_h |= UART01x_LCRH_STP2;
  364. if (termios->c_cflag & PARENB) {
  365. lcr_h |= UART01x_LCRH_PEN;
  366. if (!(termios->c_cflag & PARODD))
  367. lcr_h |= UART01x_LCRH_EPS;
  368. }
  369. if (port->fifosize > 1)
  370. lcr_h |= UART01x_LCRH_FEN;
  371. spin_lock_irqsave(&port->lock, flags);
  372. /*
  373. * Update the per-port timeout.
  374. */
  375. uart_update_timeout(port, termios->c_cflag, baud);
  376. port->read_status_mask = UART01x_RSR_OE;
  377. if (termios->c_iflag & INPCK)
  378. port->read_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
  379. if (termios->c_iflag & (BRKINT | PARMRK))
  380. port->read_status_mask |= UART01x_RSR_BE;
  381. /*
  382. * Characters to ignore
  383. */
  384. port->ignore_status_mask = 0;
  385. if (termios->c_iflag & IGNPAR)
  386. port->ignore_status_mask |= UART01x_RSR_FE | UART01x_RSR_PE;
  387. if (termios->c_iflag & IGNBRK) {
  388. port->ignore_status_mask |= UART01x_RSR_BE;
  389. /*
  390. * If we're ignoring parity and break indicators,
  391. * ignore overruns too (for real raw support).
  392. */
  393. if (termios->c_iflag & IGNPAR)
  394. port->ignore_status_mask |= UART01x_RSR_OE;
  395. }
  396. /*
  397. * Ignore all characters if CREAD is not set.
  398. */
  399. if ((termios->c_cflag & CREAD) == 0)
  400. port->ignore_status_mask |= UART_DUMMY_RSR_RX;
  401. /* first, disable everything */
  402. old_cr = UART_GET_CR(port) & ~UART010_CR_MSIE;
  403. if (UART_ENABLE_MS(port, termios->c_cflag))
  404. old_cr |= UART010_CR_MSIE;
  405. UART_PUT_CR(port, 0);
  406. /* Set baud rate */
  407. quot -= 1;
  408. UART_PUT_LCRM(port, ((quot & 0xf00) >> 8));
  409. UART_PUT_LCRL(port, (quot & 0xff));
  410. /*
  411. * ----------v----------v----------v----------v-----
  412. * NOTE: MUST BE WRITTEN AFTER UARTLCR_M & UARTLCR_L
  413. * ----------^----------^----------^----------^-----
  414. */
  415. UART_PUT_LCRH(port, lcr_h);
  416. UART_PUT_CR(port, old_cr);
  417. spin_unlock_irqrestore(&port->lock, flags);
  418. }
  419. static const char *pl010_type(struct uart_port *port)
  420. {
  421. return port->type == PORT_AMBA ? "AMBA" : NULL;
  422. }
  423. /*
  424. * Release the memory region(s) being used by 'port'
  425. */
  426. static void pl010_release_port(struct uart_port *port)
  427. {
  428. release_mem_region(port->mapbase, UART_PORT_SIZE);
  429. }
  430. /*
  431. * Request the memory region(s) being used by 'port'
  432. */
  433. static int pl010_request_port(struct uart_port *port)
  434. {
  435. return request_mem_region(port->mapbase, UART_PORT_SIZE, "uart-pl010")
  436. != NULL ? 0 : -EBUSY;
  437. }
  438. /*
  439. * Configure/autoconfigure the port.
  440. */
  441. static void pl010_config_port(struct uart_port *port, int flags)
  442. {
  443. if (flags & UART_CONFIG_TYPE) {
  444. port->type = PORT_AMBA;
  445. pl010_request_port(port);
  446. }
  447. }
  448. /*
  449. * verify the new serial_struct (for TIOCSSERIAL).
  450. */
  451. static int pl010_verify_port(struct uart_port *port, struct serial_struct *ser)
  452. {
  453. int ret = 0;
  454. if (ser->type != PORT_UNKNOWN && ser->type != PORT_AMBA)
  455. ret = -EINVAL;
  456. if (ser->irq < 0 || ser->irq >= NR_IRQS)
  457. ret = -EINVAL;
  458. if (ser->baud_base < 9600)
  459. ret = -EINVAL;
  460. return ret;
  461. }
  462. static struct uart_ops amba_pl010_pops = {
  463. .tx_empty = pl010_tx_empty,
  464. .set_mctrl = pl010_set_mctrl,
  465. .get_mctrl = pl010_get_mctrl,
  466. .stop_tx = pl010_stop_tx,
  467. .start_tx = pl010_start_tx,
  468. .stop_rx = pl010_stop_rx,
  469. .enable_ms = pl010_enable_ms,
  470. .break_ctl = pl010_break_ctl,
  471. .startup = pl010_startup,
  472. .shutdown = pl010_shutdown,
  473. .set_termios = pl010_set_termios,
  474. .type = pl010_type,
  475. .release_port = pl010_release_port,
  476. .request_port = pl010_request_port,
  477. .config_port = pl010_config_port,
  478. .verify_port = pl010_verify_port,
  479. };
  480. static struct uart_amba_port amba_ports[UART_NR] = {
  481. {
  482. .port = {
  483. .membase = (void *)IO_ADDRESS(INTEGRATOR_UART0_BASE),
  484. .mapbase = INTEGRATOR_UART0_BASE,
  485. .iotype = SERIAL_IO_MEM,
  486. .irq = IRQ_UARTINT0,
  487. .uartclk = 14745600,
  488. .fifosize = 16,
  489. .ops = &amba_pl010_pops,
  490. .flags = ASYNC_BOOT_AUTOCONF,
  491. .line = 0,
  492. },
  493. .dtr_mask = 1 << 5,
  494. .rts_mask = 1 << 4,
  495. },
  496. {
  497. .port = {
  498. .membase = (void *)IO_ADDRESS(INTEGRATOR_UART1_BASE),
  499. .mapbase = INTEGRATOR_UART1_BASE,
  500. .iotype = SERIAL_IO_MEM,
  501. .irq = IRQ_UARTINT1,
  502. .uartclk = 14745600,
  503. .fifosize = 16,
  504. .ops = &amba_pl010_pops,
  505. .flags = ASYNC_BOOT_AUTOCONF,
  506. .line = 1,
  507. },
  508. .dtr_mask = 1 << 7,
  509. .rts_mask = 1 << 6,
  510. }
  511. };
  512. #ifdef CONFIG_SERIAL_AMBA_PL010_CONSOLE
  513. static void
  514. pl010_console_write(struct console *co, const char *s, unsigned int count)
  515. {
  516. struct uart_port *port = &amba_ports[co->index].port;
  517. unsigned int status, old_cr;
  518. int i;
  519. /*
  520. * First save the CR then disable the interrupts
  521. */
  522. old_cr = UART_GET_CR(port);
  523. UART_PUT_CR(port, UART01x_CR_UARTEN);
  524. /*
  525. * Now, do each character
  526. */
  527. for (i = 0; i < count; i++) {
  528. do {
  529. status = UART_GET_FR(port);
  530. } while (!UART_TX_READY(status));
  531. UART_PUT_CHAR(port, s[i]);
  532. if (s[i] == '\n') {
  533. do {
  534. status = UART_GET_FR(port);
  535. } while (!UART_TX_READY(status));
  536. UART_PUT_CHAR(port, '\r');
  537. }
  538. }
  539. /*
  540. * Finally, wait for transmitter to become empty
  541. * and restore the TCR
  542. */
  543. do {
  544. status = UART_GET_FR(port);
  545. } while (status & UART01x_FR_BUSY);
  546. UART_PUT_CR(port, old_cr);
  547. }
  548. static void __init
  549. pl010_console_get_options(struct uart_port *port, int *baud,
  550. int *parity, int *bits)
  551. {
  552. if (UART_GET_CR(port) & UART01x_CR_UARTEN) {
  553. unsigned int lcr_h, quot;
  554. lcr_h = UART_GET_LCRH(port);
  555. *parity = 'n';
  556. if (lcr_h & UART01x_LCRH_PEN) {
  557. if (lcr_h & UART01x_LCRH_EPS)
  558. *parity = 'e';
  559. else
  560. *parity = 'o';
  561. }
  562. if ((lcr_h & 0x60) == UART01x_LCRH_WLEN_7)
  563. *bits = 7;
  564. else
  565. *bits = 8;
  566. quot = UART_GET_LCRL(port) | UART_GET_LCRM(port) << 8;
  567. *baud = port->uartclk / (16 * (quot + 1));
  568. }
  569. }
  570. static int __init pl010_console_setup(struct console *co, char *options)
  571. {
  572. struct uart_port *port;
  573. int baud = 38400;
  574. int bits = 8;
  575. int parity = 'n';
  576. int flow = 'n';
  577. /*
  578. * Check whether an invalid uart number has been specified, and
  579. * if so, search for the first available port that does have
  580. * console support.
  581. */
  582. if (co->index >= UART_NR)
  583. co->index = 0;
  584. port = &amba_ports[co->index].port;
  585. if (options)
  586. uart_parse_options(options, &baud, &parity, &bits, &flow);
  587. else
  588. pl010_console_get_options(port, &baud, &parity, &bits);
  589. return uart_set_options(port, co, baud, parity, bits, flow);
  590. }
  591. static struct uart_driver amba_reg;
  592. static struct console amba_console = {
  593. .name = "ttyAM",
  594. .write = pl010_console_write,
  595. .device = uart_console_device,
  596. .setup = pl010_console_setup,
  597. .flags = CON_PRINTBUFFER,
  598. .index = -1,
  599. .data = &amba_reg,
  600. };
  601. static int __init amba_console_init(void)
  602. {
  603. /*
  604. * All port initializations are done statically
  605. */
  606. register_console(&amba_console);
  607. return 0;
  608. }
  609. console_initcall(amba_console_init);
  610. static int __init amba_late_console_init(void)
  611. {
  612. if (!(amba_console.flags & CON_ENABLED))
  613. register_console(&amba_console);
  614. return 0;
  615. }
  616. late_initcall(amba_late_console_init);
  617. #define AMBA_CONSOLE &amba_console
  618. #else
  619. #define AMBA_CONSOLE NULL
  620. #endif
  621. static struct uart_driver amba_reg = {
  622. .owner = THIS_MODULE,
  623. .driver_name = "ttyAM",
  624. .dev_name = "ttyAM",
  625. .major = SERIAL_AMBA_MAJOR,
  626. .minor = SERIAL_AMBA_MINOR,
  627. .nr = UART_NR,
  628. .cons = AMBA_CONSOLE,
  629. };
  630. static int pl010_probe(struct amba_device *dev, void *id)
  631. {
  632. int i;
  633. for (i = 0; i < UART_NR; i++) {
  634. if (amba_ports[i].port.mapbase != dev->res.start)
  635. continue;
  636. amba_ports[i].port.dev = &dev->dev;
  637. uart_add_one_port(&amba_reg, &amba_ports[i].port);
  638. amba_set_drvdata(dev, &amba_ports[i]);
  639. break;
  640. }
  641. return 0;
  642. }
  643. static int pl010_remove(struct amba_device *dev)
  644. {
  645. struct uart_amba_port *uap = amba_get_drvdata(dev);
  646. if (uap)
  647. uart_remove_one_port(&amba_reg, &uap->port);
  648. amba_set_drvdata(dev, NULL);
  649. return 0;
  650. }
  651. static int pl010_suspend(struct amba_device *dev, pm_message_t state)
  652. {
  653. struct uart_amba_port *uap = amba_get_drvdata(dev);
  654. if (uap)
  655. uart_suspend_port(&amba_reg, &uap->port);
  656. return 0;
  657. }
  658. static int pl010_resume(struct amba_device *dev)
  659. {
  660. struct uart_amba_port *uap = amba_get_drvdata(dev);
  661. if (uap)
  662. uart_resume_port(&amba_reg, &uap->port);
  663. return 0;
  664. }
  665. static struct amba_id pl010_ids[] __initdata = {
  666. {
  667. .id = 0x00041010,
  668. .mask = 0x000fffff,
  669. },
  670. { 0, 0 },
  671. };
  672. static struct amba_driver pl010_driver = {
  673. .drv = {
  674. .name = "uart-pl010",
  675. },
  676. .id_table = pl010_ids,
  677. .probe = pl010_probe,
  678. .remove = pl010_remove,
  679. .suspend = pl010_suspend,
  680. .resume = pl010_resume,
  681. };
  682. static int __init pl010_init(void)
  683. {
  684. int ret;
  685. printk(KERN_INFO "Serial: AMBA driver $Revision: 1.41 $\n");
  686. ret = uart_register_driver(&amba_reg);
  687. if (ret == 0) {
  688. ret = amba_driver_register(&pl010_driver);
  689. if (ret)
  690. uart_unregister_driver(&amba_reg);
  691. }
  692. return ret;
  693. }
  694. static void __exit pl010_exit(void)
  695. {
  696. amba_driver_unregister(&pl010_driver);
  697. uart_unregister_driver(&amba_reg);
  698. }
  699. module_init(pl010_init);
  700. module_exit(pl010_exit);
  701. MODULE_AUTHOR("ARM Ltd/Deep Blue Solutions Ltd");
  702. MODULE_DESCRIPTION("ARM AMBA serial port driver $Revision: 1.41 $");
  703. MODULE_LICENSE("GPL");