cimax2.c 11 KB

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  1. /*
  2. * cimax2.c
  3. *
  4. * CIMax2(R) SP2 driver in conjunction with NetUp Dual DVB-S2 CI card
  5. *
  6. * Copyright (C) 2009 NetUP Inc.
  7. * Copyright (C) 2009 Igor M. Liplianin <liplianin@netup.ru>
  8. * Copyright (C) 2009 Abylay Ospan <aospan@netup.ru>
  9. *
  10. * This program is free software; you can redistribute it and/or modify
  11. * it under the terms of the GNU General Public License as published by
  12. * the Free Software Foundation; either version 2 of the License, or
  13. * (at your option) any later version.
  14. *
  15. * This program is distributed in the hope that it will be useful,
  16. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  17. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  18. *
  19. * GNU General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  24. */
  25. #include "cx23885.h"
  26. #include "dvb_ca_en50221.h"
  27. /**** Bit definitions for MC417_RWD and MC417_OEN registers ***
  28. bits 31-16
  29. +-----------+
  30. | Reserved |
  31. +-----------+
  32. bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8
  33. +-------+-------+-------+-------+-------+-------+-------+-------+
  34. | WR# | RD# | | ACK# | ADHI | ADLO | CS1# | CS0# |
  35. +-------+-------+-------+-------+-------+-------+-------+-------+
  36. bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
  37. +-------+-------+-------+-------+-------+-------+-------+-------+
  38. | DATA7| DATA6| DATA5| DATA4| DATA3| DATA2| DATA1| DATA0|
  39. +-------+-------+-------+-------+-------+-------+-------+-------+
  40. ***/
  41. /* MC417 */
  42. #define NETUP_DATA 0x000000ff
  43. #define NETUP_WR 0x00008000
  44. #define NETUP_RD 0x00004000
  45. #define NETUP_ACK 0x00001000
  46. #define NETUP_ADHI 0x00000800
  47. #define NETUP_ADLO 0x00000400
  48. #define NETUP_CS1 0x00000200
  49. #define NETUP_CS0 0x00000100
  50. #define NETUP_EN_ALL 0x00001000
  51. #define NETUP_CTRL_OFF (NETUP_CS1 | NETUP_CS0 | NETUP_WR | NETUP_RD)
  52. #define NETUP_CI_CTL 0x04
  53. #define NETUP_CI_RD 1
  54. static unsigned int ci_dbg;
  55. module_param(ci_dbg, int, 0644);
  56. MODULE_PARM_DESC(ci_dbg, "Enable CI debugging");
  57. #define ci_dbg_print(args...) \
  58. do { \
  59. if (ci_dbg) \
  60. printk(KERN_DEBUG args); \
  61. } while (0)
  62. /* stores all private variables for communication with CI */
  63. struct netup_ci_state {
  64. struct dvb_ca_en50221 ca;
  65. struct mutex ca_mutex;
  66. struct i2c_adapter *i2c_adap;
  67. u8 ci_i2c_addr;
  68. int status;
  69. struct work_struct work;
  70. void *priv;
  71. };
  72. int netup_read_i2c(struct i2c_adapter *i2c_adap, u8 addr, u8 reg,
  73. u8 *buf, int len)
  74. {
  75. int ret;
  76. struct i2c_msg msg[] = {
  77. {
  78. .addr = addr,
  79. .flags = 0,
  80. .buf = &reg,
  81. .len = 1
  82. }, {
  83. .addr = addr,
  84. .flags = I2C_M_RD,
  85. .buf = buf,
  86. .len = len
  87. }
  88. };
  89. ret = i2c_transfer(i2c_adap, msg, 2);
  90. if (ret != 2) {
  91. ci_dbg_print("%s: i2c read error, Reg = 0x%02x, Status = %d\n",
  92. __func__, reg, ret);
  93. return -1;
  94. }
  95. ci_dbg_print("%s: i2c read Addr=0x%04x, Reg = 0x%02x, data = %02x\n",
  96. __func__, addr, reg, buf[0]);
  97. return 0;
  98. }
  99. int netup_write_i2c(struct i2c_adapter *i2c_adap, u8 addr, u8 reg,
  100. u8 *buf, int len)
  101. {
  102. int ret;
  103. u8 buffer[len + 1];
  104. struct i2c_msg msg = {
  105. .addr = addr,
  106. .flags = 0,
  107. .buf = &buffer[0],
  108. .len = len + 1
  109. };
  110. buffer[0] = reg;
  111. memcpy(&buffer[1], buf, len);
  112. ret = i2c_transfer(i2c_adap, &msg, 1);
  113. if (ret != 1) {
  114. ci_dbg_print("%s: i2c write error, Reg=[0x%02x], Status=%d\n",
  115. __func__, reg, ret);
  116. return -1;
  117. }
  118. return 0;
  119. }
  120. int netup_ci_get_mem(struct cx23885_dev *dev)
  121. {
  122. int mem;
  123. unsigned long timeout = jiffies + msecs_to_jiffies(1);
  124. for (;;) {
  125. mem = cx_read(MC417_RWD);
  126. if ((mem & NETUP_ACK) == 0)
  127. break;
  128. if (time_after(jiffies, timeout))
  129. break;
  130. udelay(1);
  131. }
  132. cx_set(MC417_RWD, NETUP_CTRL_OFF);
  133. return mem & 0xff;
  134. }
  135. int netup_ci_op_cam(struct dvb_ca_en50221 *en50221, int slot,
  136. u8 flag, u8 read, int addr, u8 data)
  137. {
  138. struct netup_ci_state *state = en50221->data;
  139. struct cx23885_tsport *port = state->priv;
  140. struct cx23885_dev *dev = port->dev;
  141. u8 store;
  142. int mem;
  143. int ret;
  144. if (0 != slot)
  145. return -EINVAL;
  146. ret = netup_read_i2c(state->i2c_adap, state->ci_i2c_addr,
  147. 0, &store, 1);
  148. if (ret != 0)
  149. return ret;
  150. store &= ~0x0c;
  151. store |= flag;
  152. ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
  153. 0, &store, 1);
  154. if (ret != 0)
  155. return ret;
  156. mutex_lock(&dev->gpio_lock);
  157. /* write addr */
  158. cx_write(MC417_OEN, NETUP_EN_ALL);
  159. msleep(2);
  160. cx_write(MC417_RWD, NETUP_CTRL_OFF |
  161. NETUP_ADLO | (0xff & addr));
  162. cx_clear(MC417_RWD, NETUP_ADLO);
  163. cx_write(MC417_RWD, NETUP_CTRL_OFF |
  164. NETUP_ADHI | (0xff & (addr >> 8)));
  165. cx_clear(MC417_RWD, NETUP_ADHI);
  166. if (read) { /* data in */
  167. cx_write(MC417_OEN, NETUP_EN_ALL | NETUP_DATA);
  168. msleep(2);
  169. } else /* data out */
  170. cx_write(MC417_RWD, NETUP_CTRL_OFF | data);
  171. /* choose chip */
  172. cx_clear(MC417_RWD,
  173. (state->ci_i2c_addr == 0x40) ? NETUP_CS0 : NETUP_CS1);
  174. /* read/write */
  175. cx_clear(MC417_RWD, (read) ? NETUP_RD : NETUP_WR);
  176. mem = netup_ci_get_mem(dev);
  177. mutex_unlock(&dev->gpio_lock);
  178. if (!read)
  179. if (mem < 0)
  180. return -EREMOTEIO;
  181. ci_dbg_print("%s: %s: addr=[0x%02x], %s=%x\n", __func__,
  182. (read) ? "read" : "write", addr,
  183. (flag == NETUP_CI_CTL) ? "ctl" : "mem",
  184. (read) ? mem : data);
  185. if (read)
  186. return mem;
  187. return 0;
  188. }
  189. int netup_ci_read_attribute_mem(struct dvb_ca_en50221 *en50221,
  190. int slot, int addr)
  191. {
  192. return netup_ci_op_cam(en50221, slot, 0, NETUP_CI_RD, addr, 0);
  193. }
  194. int netup_ci_write_attribute_mem(struct dvb_ca_en50221 *en50221,
  195. int slot, int addr, u8 data)
  196. {
  197. return netup_ci_op_cam(en50221, slot, 0, 0, addr, data);
  198. }
  199. int netup_ci_read_cam_ctl(struct dvb_ca_en50221 *en50221, int slot, u8 addr)
  200. {
  201. return netup_ci_op_cam(en50221, slot, NETUP_CI_CTL,
  202. NETUP_CI_RD, addr, 0);
  203. }
  204. int netup_ci_write_cam_ctl(struct dvb_ca_en50221 *en50221, int slot,
  205. u8 addr, u8 data)
  206. {
  207. return netup_ci_op_cam(en50221, slot, NETUP_CI_CTL, 0, addr, data);
  208. }
  209. int netup_ci_slot_reset(struct dvb_ca_en50221 *en50221, int slot)
  210. {
  211. struct netup_ci_state *state = en50221->data;
  212. u8 buf = 0x80;
  213. int ret;
  214. if (0 != slot)
  215. return -EINVAL;
  216. udelay(500);
  217. ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
  218. 0, &buf, 1);
  219. if (ret != 0)
  220. return ret;
  221. udelay(500);
  222. buf = 0x00;
  223. ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
  224. 0, &buf, 1);
  225. msleep(1000);
  226. dvb_ca_en50221_camready_irq(&state->ca, 0);
  227. return 0;
  228. }
  229. int netup_ci_slot_shutdown(struct dvb_ca_en50221 *en50221, int slot)
  230. {
  231. /* not implemented */
  232. return 0;
  233. }
  234. int netup_ci_slot_ts_ctl(struct dvb_ca_en50221 *en50221, int slot)
  235. {
  236. struct netup_ci_state *state = en50221->data;
  237. u8 buf = 0x60;
  238. if (0 != slot)
  239. return -EINVAL;
  240. return netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
  241. 0, &buf, 1);
  242. }
  243. /* work handler */
  244. static void netup_read_ci_status(struct work_struct *work)
  245. {
  246. struct netup_ci_state *state =
  247. container_of(work, struct netup_ci_state, work);
  248. u8 buf[33];
  249. int ret;
  250. ret = netup_read_i2c(state->i2c_adap, state->ci_i2c_addr,
  251. 0, &buf[0], 33);
  252. if (ret != 0)
  253. return;
  254. ci_dbg_print("%s: Slot Status Addr=[0x%04x], Reg=[0x%02x], data=%02x, "
  255. "TS config = %02x\n", __func__, state->ci_i2c_addr, 0, buf[0],
  256. buf[32]);
  257. if (buf[0] & 1)
  258. state->status = DVB_CA_EN50221_POLL_CAM_PRESENT |
  259. DVB_CA_EN50221_POLL_CAM_READY;
  260. else
  261. state->status = 0;
  262. }
  263. /* CI irq handler */
  264. int netup_ci_slot_status(struct cx23885_dev *dev, u32 pci_status)
  265. {
  266. struct cx23885_tsport *port = NULL;
  267. struct netup_ci_state *state = NULL;
  268. if (pci_status & PCI_MSK_GPIO0)
  269. port = &dev->ts1;
  270. else if (pci_status & PCI_MSK_GPIO1)
  271. port = &dev->ts2;
  272. else /* who calls ? */
  273. return 0;
  274. state = port->port_priv;
  275. schedule_work(&state->work);
  276. return 1;
  277. }
  278. int netup_poll_ci_slot_status(struct dvb_ca_en50221 *en50221, int slot, int open)
  279. {
  280. struct netup_ci_state *state = en50221->data;
  281. if (0 != slot)
  282. return -EINVAL;
  283. return state->status;
  284. }
  285. int netup_ci_init(struct cx23885_tsport *port)
  286. {
  287. struct netup_ci_state *state;
  288. u8 cimax_init[34] = {
  289. 0x00, /* module A control*/
  290. 0x00, /* auto select mask high A */
  291. 0x00, /* auto select mask low A */
  292. 0x00, /* auto select pattern high A */
  293. 0x00, /* auto select pattern low A */
  294. 0x44, /* memory access time A */
  295. 0x00, /* invert input A */
  296. 0x00, /* RFU */
  297. 0x00, /* RFU */
  298. 0x00, /* module B control*/
  299. 0x00, /* auto select mask high B */
  300. 0x00, /* auto select mask low B */
  301. 0x00, /* auto select pattern high B */
  302. 0x00, /* auto select pattern low B */
  303. 0x44, /* memory access time B */
  304. 0x00, /* invert input B */
  305. 0x00, /* RFU */
  306. 0x00, /* RFU */
  307. 0x00, /* auto select mask high Ext */
  308. 0x00, /* auto select mask low Ext */
  309. 0x00, /* auto select pattern high Ext */
  310. 0x00, /* auto select pattern low Ext */
  311. 0x00, /* RFU */
  312. 0x02, /* destination - module A */
  313. 0x01, /* power on (use it like store place) */
  314. 0x00, /* RFU */
  315. 0x00, /* int status read only */
  316. 0x01, /* all int unmasked */
  317. 0x04, /* int config */
  318. 0x00, /* USCG1 */
  319. 0x04, /* ack active low */
  320. 0x00, /* LOCK = 0 */
  321. 0x33, /* serial mode, rising in, rising out, MSB first*/
  322. 0x31, /* syncronization */
  323. };
  324. int ret;
  325. ci_dbg_print("%s\n", __func__);
  326. state = kzalloc(sizeof(struct netup_ci_state), GFP_KERNEL);
  327. if (!state) {
  328. ci_dbg_print("%s: Unable create CI structure!\n", __func__);
  329. ret = -ENOMEM;
  330. goto err;
  331. }
  332. port->port_priv = state;
  333. switch (port->nr) {
  334. case 1:
  335. state->ci_i2c_addr = 0x40;
  336. break;
  337. case 2:
  338. state->ci_i2c_addr = 0x41;
  339. break;
  340. }
  341. state->i2c_adap = &port->dev->i2c_bus[0].i2c_adap;
  342. state->ca.owner = THIS_MODULE;
  343. state->ca.read_attribute_mem = netup_ci_read_attribute_mem;
  344. state->ca.write_attribute_mem = netup_ci_write_attribute_mem;
  345. state->ca.read_cam_control = netup_ci_read_cam_ctl;
  346. state->ca.write_cam_control = netup_ci_write_cam_ctl;
  347. state->ca.slot_reset = netup_ci_slot_reset;
  348. state->ca.slot_shutdown = netup_ci_slot_shutdown;
  349. state->ca.slot_ts_enable = netup_ci_slot_ts_ctl;
  350. state->ca.poll_slot_status = netup_poll_ci_slot_status;
  351. state->ca.data = state;
  352. state->priv = port;
  353. ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
  354. 0, &cimax_init[0], 34);
  355. /* lock registers */
  356. ret |= netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
  357. 0x1f, &cimax_init[0x18], 1);
  358. /* power on slots */
  359. ret |= netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
  360. 0x18, &cimax_init[0x18], 1);
  361. if (0 != ret)
  362. goto err;
  363. ret = dvb_ca_en50221_init(&port->frontends.adapter,
  364. &state->ca,
  365. /* flags */ 0,
  366. /* n_slots */ 1);
  367. if (0 != ret)
  368. goto err;
  369. INIT_WORK(&state->work, netup_read_ci_status);
  370. schedule_work(&state->work);
  371. ci_dbg_print("%s: CI initialized!\n", __func__);
  372. return 0;
  373. err:
  374. ci_dbg_print("%s: Cannot initialize CI: Error %d.\n", __func__, ret);
  375. kfree(state);
  376. return ret;
  377. }
  378. void netup_ci_exit(struct cx23885_tsport *port)
  379. {
  380. struct netup_ci_state *state;
  381. if (NULL == port)
  382. return;
  383. state = (struct netup_ci_state *)port->port_priv;
  384. if (NULL == state)
  385. return;
  386. if (NULL == state->ca.data)
  387. return;
  388. dvb_ca_en50221_release(&state->ca);
  389. kfree(state);
  390. }