iwl4965-base.c 259 KB

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  1. /******************************************************************************
  2. *
  3. * Copyright(c) 2003 - 2007 Intel Corporation. All rights reserved.
  4. *
  5. * Portions of this file are derived from the ipw3945 project, as well
  6. * as portions of the ieee80211 subsystem header files.
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of version 2 of the GNU General Public License as
  10. * published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program; if not, write to the Free Software Foundation, Inc.,
  19. * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
  20. *
  21. * The full GNU General Public License is included in this distribution in the
  22. * file called LICENSE.
  23. *
  24. * Contact Information:
  25. * James P. Ketrenos <ipw2100-admin@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *
  28. *****************************************************************************/
  29. #include <linux/kernel.h>
  30. #include <linux/module.h>
  31. #include <linux/version.h>
  32. #include <linux/init.h>
  33. #include <linux/pci.h>
  34. #include <linux/dma-mapping.h>
  35. #include <linux/delay.h>
  36. #include <linux/skbuff.h>
  37. #include <linux/netdevice.h>
  38. #include <linux/wireless.h>
  39. #include <linux/firmware.h>
  40. #include <linux/etherdevice.h>
  41. #include <linux/if_arp.h>
  42. #include <net/mac80211.h>
  43. #include <asm/div64.h>
  44. #include "iwl-4965.h"
  45. #include "iwl-helpers.h"
  46. #ifdef CONFIG_IWL4965_DEBUG
  47. u32 iwl4965_debug_level;
  48. #endif
  49. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  50. struct iwl4965_tx_queue *txq);
  51. /******************************************************************************
  52. *
  53. * module boiler plate
  54. *
  55. ******************************************************************************/
  56. /* module parameters */
  57. static int iwl4965_param_disable_hw_scan; /* def: 0 = use 4965's h/w scan */
  58. static int iwl4965_param_debug; /* def: 0 = minimal debug log messages */
  59. static int iwl4965_param_disable; /* def: enable radio */
  60. static int iwl4965_param_antenna; /* def: 0 = both antennas (use diversity) */
  61. int iwl4965_param_hwcrypto; /* def: using software encryption */
  62. static int iwl4965_param_qos_enable = 1; /* def: 1 = use quality of service */
  63. int iwl4965_param_queues_num = IWL_MAX_NUM_QUEUES; /* def: 16 Tx queues */
  64. int iwl4965_param_amsdu_size_8K; /* def: enable 8K amsdu size */
  65. /*
  66. * module name, copyright, version, etc.
  67. * NOTE: DRV_NAME is defined in iwlwifi.h for use by iwl-debug.h and printk
  68. */
  69. #define DRV_DESCRIPTION "Intel(R) Wireless WiFi Link 4965AGN driver for Linux"
  70. #ifdef CONFIG_IWL4965_DEBUG
  71. #define VD "d"
  72. #else
  73. #define VD
  74. #endif
  75. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  76. #define VS "s"
  77. #else
  78. #define VS
  79. #endif
  80. #define IWLWIFI_VERSION "1.2.23k" VD VS
  81. #define DRV_COPYRIGHT "Copyright(c) 2003-2007 Intel Corporation"
  82. #define DRV_VERSION IWLWIFI_VERSION
  83. /* Change firmware file name, using "-" and incrementing number,
  84. * *only* when uCode interface or architecture changes so that it
  85. * is not compatible with earlier drivers.
  86. * This number will also appear in << 8 position of 1st dword of uCode file */
  87. #define IWL4965_UCODE_API "-1"
  88. MODULE_DESCRIPTION(DRV_DESCRIPTION);
  89. MODULE_VERSION(DRV_VERSION);
  90. MODULE_AUTHOR(DRV_COPYRIGHT);
  91. MODULE_LICENSE("GPL");
  92. __le16 *ieee80211_get_qos_ctrl(struct ieee80211_hdr *hdr)
  93. {
  94. u16 fc = le16_to_cpu(hdr->frame_control);
  95. int hdr_len = ieee80211_get_hdrlen(fc);
  96. if ((fc & 0x00cc) == (IEEE80211_STYPE_QOS_DATA | IEEE80211_FTYPE_DATA))
  97. return (__le16 *) ((u8 *) hdr + hdr_len - QOS_CONTROL_LEN);
  98. return NULL;
  99. }
  100. static const struct ieee80211_supported_band *iwl4965_get_hw_mode(
  101. struct iwl4965_priv *priv, enum ieee80211_band band)
  102. {
  103. return priv->hw->wiphy->bands[band];
  104. }
  105. static int iwl4965_is_empty_essid(const char *essid, int essid_len)
  106. {
  107. /* Single white space is for Linksys APs */
  108. if (essid_len == 1 && essid[0] == ' ')
  109. return 1;
  110. /* Otherwise, if the entire essid is 0, we assume it is hidden */
  111. while (essid_len) {
  112. essid_len--;
  113. if (essid[essid_len] != '\0')
  114. return 0;
  115. }
  116. return 1;
  117. }
  118. static const char *iwl4965_escape_essid(const char *essid, u8 essid_len)
  119. {
  120. static char escaped[IW_ESSID_MAX_SIZE * 2 + 1];
  121. const char *s = essid;
  122. char *d = escaped;
  123. if (iwl4965_is_empty_essid(essid, essid_len)) {
  124. memcpy(escaped, "<hidden>", sizeof("<hidden>"));
  125. return escaped;
  126. }
  127. essid_len = min(essid_len, (u8) IW_ESSID_MAX_SIZE);
  128. while (essid_len--) {
  129. if (*s == '\0') {
  130. *d++ = '\\';
  131. *d++ = '0';
  132. s++;
  133. } else
  134. *d++ = *s++;
  135. }
  136. *d = '\0';
  137. return escaped;
  138. }
  139. static void iwl4965_print_hex_dump(int level, void *p, u32 len)
  140. {
  141. #ifdef CONFIG_IWL4965_DEBUG
  142. if (!(iwl4965_debug_level & level))
  143. return;
  144. print_hex_dump(KERN_DEBUG, "iwl data: ", DUMP_PREFIX_OFFSET, 16, 1,
  145. p, len, 1);
  146. #endif
  147. }
  148. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  149. * DMA services
  150. *
  151. * Theory of operation
  152. *
  153. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  154. * of buffer descriptors, each of which points to one or more data buffers for
  155. * the device to read from or fill. Driver and device exchange status of each
  156. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  157. * entries in each circular buffer, to protect against confusing empty and full
  158. * queue states.
  159. *
  160. * The device reads or writes the data in the queues via the device's several
  161. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  162. *
  163. * For Tx queue, there are low mark and high mark limits. If, after queuing
  164. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  165. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  166. * Tx queue resumed.
  167. *
  168. * The 4965 operates with up to 17 queues: One receive queue, one transmit
  169. * queue (#4) for sending commands to the device firmware, and 15 other
  170. * Tx queues that may be mapped to prioritized Tx DMA/FIFO channels.
  171. *
  172. * See more detailed info in iwl-4965-hw.h.
  173. ***************************************************/
  174. int iwl4965_queue_space(const struct iwl4965_queue *q)
  175. {
  176. int s = q->read_ptr - q->write_ptr;
  177. if (q->read_ptr > q->write_ptr)
  178. s -= q->n_bd;
  179. if (s <= 0)
  180. s += q->n_window;
  181. /* keep some reserve to not confuse empty and full situations */
  182. s -= 2;
  183. if (s < 0)
  184. s = 0;
  185. return s;
  186. }
  187. /**
  188. * iwl4965_queue_inc_wrap - increment queue index, wrap back to beginning
  189. * @index -- current index
  190. * @n_bd -- total number of entries in queue (must be power of 2)
  191. */
  192. static inline int iwl4965_queue_inc_wrap(int index, int n_bd)
  193. {
  194. return ++index & (n_bd - 1);
  195. }
  196. /**
  197. * iwl4965_queue_dec_wrap - decrement queue index, wrap back to end
  198. * @index -- current index
  199. * @n_bd -- total number of entries in queue (must be power of 2)
  200. */
  201. static inline int iwl4965_queue_dec_wrap(int index, int n_bd)
  202. {
  203. return --index & (n_bd - 1);
  204. }
  205. static inline int x2_queue_used(const struct iwl4965_queue *q, int i)
  206. {
  207. return q->write_ptr > q->read_ptr ?
  208. (i >= q->read_ptr && i < q->write_ptr) :
  209. !(i < q->read_ptr && i >= q->write_ptr);
  210. }
  211. static inline u8 get_cmd_index(struct iwl4965_queue *q, u32 index, int is_huge)
  212. {
  213. /* This is for scan command, the big buffer at end of command array */
  214. if (is_huge)
  215. return q->n_window; /* must be power of 2 */
  216. /* Otherwise, use normal size buffers */
  217. return index & (q->n_window - 1);
  218. }
  219. /**
  220. * iwl4965_queue_init - Initialize queue's high/low-water and read/write indexes
  221. */
  222. static int iwl4965_queue_init(struct iwl4965_priv *priv, struct iwl4965_queue *q,
  223. int count, int slots_num, u32 id)
  224. {
  225. q->n_bd = count;
  226. q->n_window = slots_num;
  227. q->id = id;
  228. /* count must be power-of-two size, otherwise iwl4965_queue_inc_wrap
  229. * and iwl4965_queue_dec_wrap are broken. */
  230. BUG_ON(!is_power_of_2(count));
  231. /* slots_num must be power-of-two size, otherwise
  232. * get_cmd_index is broken. */
  233. BUG_ON(!is_power_of_2(slots_num));
  234. q->low_mark = q->n_window / 4;
  235. if (q->low_mark < 4)
  236. q->low_mark = 4;
  237. q->high_mark = q->n_window / 8;
  238. if (q->high_mark < 2)
  239. q->high_mark = 2;
  240. q->write_ptr = q->read_ptr = 0;
  241. return 0;
  242. }
  243. /**
  244. * iwl4965_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  245. */
  246. static int iwl4965_tx_queue_alloc(struct iwl4965_priv *priv,
  247. struct iwl4965_tx_queue *txq, u32 id)
  248. {
  249. struct pci_dev *dev = priv->pci_dev;
  250. /* Driver private data, only for Tx (not command) queues,
  251. * not shared with device. */
  252. if (id != IWL_CMD_QUEUE_NUM) {
  253. txq->txb = kmalloc(sizeof(txq->txb[0]) *
  254. TFD_QUEUE_SIZE_MAX, GFP_KERNEL);
  255. if (!txq->txb) {
  256. IWL_ERROR("kmalloc for auxiliary BD "
  257. "structures failed\n");
  258. goto error;
  259. }
  260. } else
  261. txq->txb = NULL;
  262. /* Circular buffer of transmit frame descriptors (TFDs),
  263. * shared with device */
  264. txq->bd = pci_alloc_consistent(dev,
  265. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX,
  266. &txq->q.dma_addr);
  267. if (!txq->bd) {
  268. IWL_ERROR("pci_alloc_consistent(%zd) failed\n",
  269. sizeof(txq->bd[0]) * TFD_QUEUE_SIZE_MAX);
  270. goto error;
  271. }
  272. txq->q.id = id;
  273. return 0;
  274. error:
  275. if (txq->txb) {
  276. kfree(txq->txb);
  277. txq->txb = NULL;
  278. }
  279. return -ENOMEM;
  280. }
  281. /**
  282. * iwl4965_tx_queue_init - Allocate and initialize one tx/cmd queue
  283. */
  284. int iwl4965_tx_queue_init(struct iwl4965_priv *priv,
  285. struct iwl4965_tx_queue *txq, int slots_num, u32 txq_id)
  286. {
  287. struct pci_dev *dev = priv->pci_dev;
  288. int len;
  289. int rc = 0;
  290. /*
  291. * Alloc buffer array for commands (Tx or other types of commands).
  292. * For the command queue (#4), allocate command space + one big
  293. * command for scan, since scan command is very huge; the system will
  294. * not have two scans at the same time, so only one is needed.
  295. * For normal Tx queues (all other queues), no super-size command
  296. * space is needed.
  297. */
  298. len = sizeof(struct iwl4965_cmd) * slots_num;
  299. if (txq_id == IWL_CMD_QUEUE_NUM)
  300. len += IWL_MAX_SCAN_SIZE;
  301. txq->cmd = pci_alloc_consistent(dev, len, &txq->dma_addr_cmd);
  302. if (!txq->cmd)
  303. return -ENOMEM;
  304. /* Alloc driver data array and TFD circular buffer */
  305. rc = iwl4965_tx_queue_alloc(priv, txq, txq_id);
  306. if (rc) {
  307. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  308. return -ENOMEM;
  309. }
  310. txq->need_update = 0;
  311. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  312. * iwl4965_queue_inc_wrap and iwl4965_queue_dec_wrap are broken. */
  313. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  314. /* Initialize queue's high/low-water marks, and head/tail indexes */
  315. iwl4965_queue_init(priv, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  316. /* Tell device where to find queue */
  317. iwl4965_hw_tx_queue_init(priv, txq);
  318. return 0;
  319. }
  320. /**
  321. * iwl4965_tx_queue_free - Deallocate DMA queue.
  322. * @txq: Transmit queue to deallocate.
  323. *
  324. * Empty queue by removing and destroying all BD's.
  325. * Free all buffers.
  326. * 0-fill, but do not free "txq" descriptor structure.
  327. */
  328. void iwl4965_tx_queue_free(struct iwl4965_priv *priv, struct iwl4965_tx_queue *txq)
  329. {
  330. struct iwl4965_queue *q = &txq->q;
  331. struct pci_dev *dev = priv->pci_dev;
  332. int len;
  333. if (q->n_bd == 0)
  334. return;
  335. /* first, empty all BD's */
  336. for (; q->write_ptr != q->read_ptr;
  337. q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd))
  338. iwl4965_hw_txq_free_tfd(priv, txq);
  339. len = sizeof(struct iwl4965_cmd) * q->n_window;
  340. if (q->id == IWL_CMD_QUEUE_NUM)
  341. len += IWL_MAX_SCAN_SIZE;
  342. /* De-alloc array of command/tx buffers */
  343. pci_free_consistent(dev, len, txq->cmd, txq->dma_addr_cmd);
  344. /* De-alloc circular buffer of TFDs */
  345. if (txq->q.n_bd)
  346. pci_free_consistent(dev, sizeof(struct iwl4965_tfd_frame) *
  347. txq->q.n_bd, txq->bd, txq->q.dma_addr);
  348. /* De-alloc array of per-TFD driver data */
  349. if (txq->txb) {
  350. kfree(txq->txb);
  351. txq->txb = NULL;
  352. }
  353. /* 0-fill queue descriptor structure */
  354. memset(txq, 0, sizeof(*txq));
  355. }
  356. const u8 iwl4965_broadcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  357. /*************** STATION TABLE MANAGEMENT ****
  358. * mac80211 should be examined to determine if sta_info is duplicating
  359. * the functionality provided here
  360. */
  361. /**************************************************************/
  362. #if 0 /* temporary disable till we add real remove station */
  363. /**
  364. * iwl4965_remove_station - Remove driver's knowledge of station.
  365. *
  366. * NOTE: This does not remove station from device's station table.
  367. */
  368. static u8 iwl4965_remove_station(struct iwl4965_priv *priv, const u8 *addr, int is_ap)
  369. {
  370. int index = IWL_INVALID_STATION;
  371. int i;
  372. unsigned long flags;
  373. spin_lock_irqsave(&priv->sta_lock, flags);
  374. if (is_ap)
  375. index = IWL_AP_ID;
  376. else if (is_broadcast_ether_addr(addr))
  377. index = priv->hw_setting.bcast_sta_id;
  378. else
  379. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++)
  380. if (priv->stations[i].used &&
  381. !compare_ether_addr(priv->stations[i].sta.sta.addr,
  382. addr)) {
  383. index = i;
  384. break;
  385. }
  386. if (unlikely(index == IWL_INVALID_STATION))
  387. goto out;
  388. if (priv->stations[index].used) {
  389. priv->stations[index].used = 0;
  390. priv->num_stations--;
  391. }
  392. BUG_ON(priv->num_stations < 0);
  393. out:
  394. spin_unlock_irqrestore(&priv->sta_lock, flags);
  395. return 0;
  396. }
  397. #endif
  398. /**
  399. * iwl4965_clear_stations_table - Clear the driver's station table
  400. *
  401. * NOTE: This does not clear or otherwise alter the device's station table.
  402. */
  403. static void iwl4965_clear_stations_table(struct iwl4965_priv *priv)
  404. {
  405. unsigned long flags;
  406. spin_lock_irqsave(&priv->sta_lock, flags);
  407. priv->num_stations = 0;
  408. memset(priv->stations, 0, sizeof(priv->stations));
  409. spin_unlock_irqrestore(&priv->sta_lock, flags);
  410. }
  411. /**
  412. * iwl4965_add_station_flags - Add station to tables in driver and device
  413. */
  414. u8 iwl4965_add_station_flags(struct iwl4965_priv *priv, const u8 *addr,
  415. int is_ap, u8 flags, void *ht_data)
  416. {
  417. int i;
  418. int index = IWL_INVALID_STATION;
  419. struct iwl4965_station_entry *station;
  420. unsigned long flags_spin;
  421. DECLARE_MAC_BUF(mac);
  422. spin_lock_irqsave(&priv->sta_lock, flags_spin);
  423. if (is_ap)
  424. index = IWL_AP_ID;
  425. else if (is_broadcast_ether_addr(addr))
  426. index = priv->hw_setting.bcast_sta_id;
  427. else
  428. for (i = IWL_STA_ID; i < priv->hw_setting.max_stations; i++) {
  429. if (!compare_ether_addr(priv->stations[i].sta.sta.addr,
  430. addr)) {
  431. index = i;
  432. break;
  433. }
  434. if (!priv->stations[i].used &&
  435. index == IWL_INVALID_STATION)
  436. index = i;
  437. }
  438. /* These two conditions have the same outcome, but keep them separate
  439. since they have different meanings */
  440. if (unlikely(index == IWL_INVALID_STATION)) {
  441. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  442. return index;
  443. }
  444. if (priv->stations[index].used &&
  445. !compare_ether_addr(priv->stations[index].sta.sta.addr, addr)) {
  446. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  447. return index;
  448. }
  449. IWL_DEBUG_ASSOC("Add STA ID %d: %s\n", index, print_mac(mac, addr));
  450. station = &priv->stations[index];
  451. station->used = 1;
  452. priv->num_stations++;
  453. /* Set up the REPLY_ADD_STA command to send to device */
  454. memset(&station->sta, 0, sizeof(struct iwl4965_addsta_cmd));
  455. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  456. station->sta.mode = 0;
  457. station->sta.sta.sta_id = index;
  458. station->sta.station_flags = 0;
  459. #ifdef CONFIG_IWL4965_HT
  460. /* BCAST station and IBSS stations do not work in HT mode */
  461. if (index != priv->hw_setting.bcast_sta_id &&
  462. priv->iw_mode != IEEE80211_IF_TYPE_IBSS)
  463. iwl4965_set_ht_add_station(priv, index,
  464. (struct ieee80211_ht_info *) ht_data);
  465. #endif /*CONFIG_IWL4965_HT*/
  466. spin_unlock_irqrestore(&priv->sta_lock, flags_spin);
  467. /* Add station to device's station table */
  468. iwl4965_send_add_station(priv, &station->sta, flags);
  469. return index;
  470. }
  471. /*************** DRIVER STATUS FUNCTIONS *****/
  472. static inline int iwl4965_is_ready(struct iwl4965_priv *priv)
  473. {
  474. /* The adapter is 'ready' if READY and GEO_CONFIGURED bits are
  475. * set but EXIT_PENDING is not */
  476. return test_bit(STATUS_READY, &priv->status) &&
  477. test_bit(STATUS_GEO_CONFIGURED, &priv->status) &&
  478. !test_bit(STATUS_EXIT_PENDING, &priv->status);
  479. }
  480. static inline int iwl4965_is_alive(struct iwl4965_priv *priv)
  481. {
  482. return test_bit(STATUS_ALIVE, &priv->status);
  483. }
  484. static inline int iwl4965_is_init(struct iwl4965_priv *priv)
  485. {
  486. return test_bit(STATUS_INIT, &priv->status);
  487. }
  488. static inline int iwl4965_is_rfkill(struct iwl4965_priv *priv)
  489. {
  490. return test_bit(STATUS_RF_KILL_HW, &priv->status) ||
  491. test_bit(STATUS_RF_KILL_SW, &priv->status);
  492. }
  493. static inline int iwl4965_is_ready_rf(struct iwl4965_priv *priv)
  494. {
  495. if (iwl4965_is_rfkill(priv))
  496. return 0;
  497. return iwl4965_is_ready(priv);
  498. }
  499. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  500. #define IWL_CMD(x) case x : return #x
  501. static const char *get_cmd_string(u8 cmd)
  502. {
  503. switch (cmd) {
  504. IWL_CMD(REPLY_ALIVE);
  505. IWL_CMD(REPLY_ERROR);
  506. IWL_CMD(REPLY_RXON);
  507. IWL_CMD(REPLY_RXON_ASSOC);
  508. IWL_CMD(REPLY_QOS_PARAM);
  509. IWL_CMD(REPLY_RXON_TIMING);
  510. IWL_CMD(REPLY_ADD_STA);
  511. IWL_CMD(REPLY_REMOVE_STA);
  512. IWL_CMD(REPLY_REMOVE_ALL_STA);
  513. IWL_CMD(REPLY_TX);
  514. IWL_CMD(REPLY_RATE_SCALE);
  515. IWL_CMD(REPLY_LEDS_CMD);
  516. IWL_CMD(REPLY_TX_LINK_QUALITY_CMD);
  517. IWL_CMD(RADAR_NOTIFICATION);
  518. IWL_CMD(REPLY_QUIET_CMD);
  519. IWL_CMD(REPLY_CHANNEL_SWITCH);
  520. IWL_CMD(CHANNEL_SWITCH_NOTIFICATION);
  521. IWL_CMD(REPLY_SPECTRUM_MEASUREMENT_CMD);
  522. IWL_CMD(SPECTRUM_MEASURE_NOTIFICATION);
  523. IWL_CMD(POWER_TABLE_CMD);
  524. IWL_CMD(PM_SLEEP_NOTIFICATION);
  525. IWL_CMD(PM_DEBUG_STATISTIC_NOTIFIC);
  526. IWL_CMD(REPLY_SCAN_CMD);
  527. IWL_CMD(REPLY_SCAN_ABORT_CMD);
  528. IWL_CMD(SCAN_START_NOTIFICATION);
  529. IWL_CMD(SCAN_RESULTS_NOTIFICATION);
  530. IWL_CMD(SCAN_COMPLETE_NOTIFICATION);
  531. IWL_CMD(BEACON_NOTIFICATION);
  532. IWL_CMD(REPLY_TX_BEACON);
  533. IWL_CMD(WHO_IS_AWAKE_NOTIFICATION);
  534. IWL_CMD(QUIET_NOTIFICATION);
  535. IWL_CMD(REPLY_TX_PWR_TABLE_CMD);
  536. IWL_CMD(MEASURE_ABORT_NOTIFICATION);
  537. IWL_CMD(REPLY_BT_CONFIG);
  538. IWL_CMD(REPLY_STATISTICS_CMD);
  539. IWL_CMD(STATISTICS_NOTIFICATION);
  540. IWL_CMD(REPLY_CARD_STATE_CMD);
  541. IWL_CMD(CARD_STATE_NOTIFICATION);
  542. IWL_CMD(MISSED_BEACONS_NOTIFICATION);
  543. IWL_CMD(REPLY_CT_KILL_CONFIG_CMD);
  544. IWL_CMD(SENSITIVITY_CMD);
  545. IWL_CMD(REPLY_PHY_CALIBRATION_CMD);
  546. IWL_CMD(REPLY_RX_PHY_CMD);
  547. IWL_CMD(REPLY_RX_MPDU_CMD);
  548. IWL_CMD(REPLY_4965_RX);
  549. IWL_CMD(REPLY_COMPRESSED_BA);
  550. default:
  551. return "UNKNOWN";
  552. }
  553. }
  554. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  555. /**
  556. * iwl4965_enqueue_hcmd - enqueue a uCode command
  557. * @priv: device private data point
  558. * @cmd: a point to the ucode command structure
  559. *
  560. * The function returns < 0 values to indicate the operation is
  561. * failed. On success, it turns the index (> 0) of command in the
  562. * command queue.
  563. */
  564. static int iwl4965_enqueue_hcmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  565. {
  566. struct iwl4965_tx_queue *txq = &priv->txq[IWL_CMD_QUEUE_NUM];
  567. struct iwl4965_queue *q = &txq->q;
  568. struct iwl4965_tfd_frame *tfd;
  569. u32 *control_flags;
  570. struct iwl4965_cmd *out_cmd;
  571. u32 idx;
  572. u16 fix_size = (u16)(cmd->len + sizeof(out_cmd->hdr));
  573. dma_addr_t phys_addr;
  574. int ret;
  575. unsigned long flags;
  576. /* If any of the command structures end up being larger than
  577. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  578. * we will need to increase the size of the TFD entries */
  579. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  580. !(cmd->meta.flags & CMD_SIZE_HUGE));
  581. if (iwl4965_is_rfkill(priv)) {
  582. IWL_DEBUG_INFO("Not sending command - RF KILL");
  583. return -EIO;
  584. }
  585. if (iwl4965_queue_space(q) < ((cmd->meta.flags & CMD_ASYNC) ? 2 : 1)) {
  586. IWL_ERROR("No space for Tx\n");
  587. return -ENOSPC;
  588. }
  589. spin_lock_irqsave(&priv->hcmd_lock, flags);
  590. tfd = &txq->bd[q->write_ptr];
  591. memset(tfd, 0, sizeof(*tfd));
  592. control_flags = (u32 *) tfd;
  593. idx = get_cmd_index(q, q->write_ptr, cmd->meta.flags & CMD_SIZE_HUGE);
  594. out_cmd = &txq->cmd[idx];
  595. out_cmd->hdr.cmd = cmd->id;
  596. memcpy(&out_cmd->meta, &cmd->meta, sizeof(cmd->meta));
  597. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  598. /* At this point, the out_cmd now has all of the incoming cmd
  599. * information */
  600. out_cmd->hdr.flags = 0;
  601. out_cmd->hdr.sequence = cpu_to_le16(QUEUE_TO_SEQ(IWL_CMD_QUEUE_NUM) |
  602. INDEX_TO_SEQ(q->write_ptr));
  603. if (out_cmd->meta.flags & CMD_SIZE_HUGE)
  604. out_cmd->hdr.sequence |= cpu_to_le16(SEQ_HUGE_FRAME);
  605. phys_addr = txq->dma_addr_cmd + sizeof(txq->cmd[0]) * idx +
  606. offsetof(struct iwl4965_cmd, hdr);
  607. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, fix_size);
  608. IWL_DEBUG_HC("Sending command %s (#%x), seq: 0x%04X, "
  609. "%d bytes at %d[%d]:%d\n",
  610. get_cmd_string(out_cmd->hdr.cmd),
  611. out_cmd->hdr.cmd, le16_to_cpu(out_cmd->hdr.sequence),
  612. fix_size, q->write_ptr, idx, IWL_CMD_QUEUE_NUM);
  613. txq->need_update = 1;
  614. /* Set up entry in queue's byte count circular buffer */
  615. ret = iwl4965_tx_queue_update_wr_ptr(priv, txq, 0);
  616. /* Increment and update queue's write index */
  617. q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
  618. iwl4965_tx_queue_update_write_ptr(priv, txq);
  619. spin_unlock_irqrestore(&priv->hcmd_lock, flags);
  620. return ret ? ret : idx;
  621. }
  622. static int iwl4965_send_cmd_async(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  623. {
  624. int ret;
  625. BUG_ON(!(cmd->meta.flags & CMD_ASYNC));
  626. /* An asynchronous command can not expect an SKB to be set. */
  627. BUG_ON(cmd->meta.flags & CMD_WANT_SKB);
  628. /* An asynchronous command MUST have a callback. */
  629. BUG_ON(!cmd->meta.u.callback);
  630. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  631. return -EBUSY;
  632. ret = iwl4965_enqueue_hcmd(priv, cmd);
  633. if (ret < 0) {
  634. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  635. get_cmd_string(cmd->id), ret);
  636. return ret;
  637. }
  638. return 0;
  639. }
  640. static int iwl4965_send_cmd_sync(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  641. {
  642. int cmd_idx;
  643. int ret;
  644. static atomic_t entry = ATOMIC_INIT(0); /* reentrance protection */
  645. BUG_ON(cmd->meta.flags & CMD_ASYNC);
  646. /* A synchronous command can not have a callback set. */
  647. BUG_ON(cmd->meta.u.callback != NULL);
  648. if (atomic_xchg(&entry, 1)) {
  649. IWL_ERROR("Error sending %s: Already sending a host command\n",
  650. get_cmd_string(cmd->id));
  651. return -EBUSY;
  652. }
  653. set_bit(STATUS_HCMD_ACTIVE, &priv->status);
  654. if (cmd->meta.flags & CMD_WANT_SKB)
  655. cmd->meta.source = &cmd->meta;
  656. cmd_idx = iwl4965_enqueue_hcmd(priv, cmd);
  657. if (cmd_idx < 0) {
  658. ret = cmd_idx;
  659. IWL_ERROR("Error sending %s: iwl4965_enqueue_hcmd failed: %d\n",
  660. get_cmd_string(cmd->id), ret);
  661. goto out;
  662. }
  663. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  664. !test_bit(STATUS_HCMD_ACTIVE, &priv->status),
  665. HOST_COMPLETE_TIMEOUT);
  666. if (!ret) {
  667. if (test_bit(STATUS_HCMD_ACTIVE, &priv->status)) {
  668. IWL_ERROR("Error sending %s: time out after %dms.\n",
  669. get_cmd_string(cmd->id),
  670. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  671. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  672. ret = -ETIMEDOUT;
  673. goto cancel;
  674. }
  675. }
  676. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  677. IWL_DEBUG_INFO("Command %s aborted: RF KILL Switch\n",
  678. get_cmd_string(cmd->id));
  679. ret = -ECANCELED;
  680. goto fail;
  681. }
  682. if (test_bit(STATUS_FW_ERROR, &priv->status)) {
  683. IWL_DEBUG_INFO("Command %s failed: FW Error\n",
  684. get_cmd_string(cmd->id));
  685. ret = -EIO;
  686. goto fail;
  687. }
  688. if ((cmd->meta.flags & CMD_WANT_SKB) && !cmd->meta.u.skb) {
  689. IWL_ERROR("Error: Response NULL in '%s'\n",
  690. get_cmd_string(cmd->id));
  691. ret = -EIO;
  692. goto out;
  693. }
  694. ret = 0;
  695. goto out;
  696. cancel:
  697. if (cmd->meta.flags & CMD_WANT_SKB) {
  698. struct iwl4965_cmd *qcmd;
  699. /* Cancel the CMD_WANT_SKB flag for the cmd in the
  700. * TX cmd queue. Otherwise in case the cmd comes
  701. * in later, it will possibly set an invalid
  702. * address (cmd->meta.source). */
  703. qcmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_idx];
  704. qcmd->meta.flags &= ~CMD_WANT_SKB;
  705. }
  706. fail:
  707. if (cmd->meta.u.skb) {
  708. dev_kfree_skb_any(cmd->meta.u.skb);
  709. cmd->meta.u.skb = NULL;
  710. }
  711. out:
  712. atomic_set(&entry, 0);
  713. return ret;
  714. }
  715. int iwl4965_send_cmd(struct iwl4965_priv *priv, struct iwl4965_host_cmd *cmd)
  716. {
  717. if (cmd->meta.flags & CMD_ASYNC)
  718. return iwl4965_send_cmd_async(priv, cmd);
  719. return iwl4965_send_cmd_sync(priv, cmd);
  720. }
  721. int iwl4965_send_cmd_pdu(struct iwl4965_priv *priv, u8 id, u16 len, const void *data)
  722. {
  723. struct iwl4965_host_cmd cmd = {
  724. .id = id,
  725. .len = len,
  726. .data = data,
  727. };
  728. return iwl4965_send_cmd_sync(priv, &cmd);
  729. }
  730. static int __must_check iwl4965_send_cmd_u32(struct iwl4965_priv *priv, u8 id, u32 val)
  731. {
  732. struct iwl4965_host_cmd cmd = {
  733. .id = id,
  734. .len = sizeof(val),
  735. .data = &val,
  736. };
  737. return iwl4965_send_cmd_sync(priv, &cmd);
  738. }
  739. int iwl4965_send_statistics_request(struct iwl4965_priv *priv)
  740. {
  741. return iwl4965_send_cmd_u32(priv, REPLY_STATISTICS_CMD, 0);
  742. }
  743. /**
  744. * iwl4965_rxon_add_station - add station into station table.
  745. *
  746. * there is only one AP station with id= IWL_AP_ID
  747. * NOTE: mutex must be held before calling this fnction
  748. */
  749. static int iwl4965_rxon_add_station(struct iwl4965_priv *priv,
  750. const u8 *addr, int is_ap)
  751. {
  752. u8 sta_id;
  753. /* Add station to device's station table */
  754. #ifdef CONFIG_IWL4965_HT
  755. struct ieee80211_conf *conf = &priv->hw->conf;
  756. struct ieee80211_ht_info *cur_ht_config = &conf->ht_conf;
  757. if ((is_ap) &&
  758. (conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE) &&
  759. (priv->iw_mode == IEEE80211_IF_TYPE_STA))
  760. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  761. 0, cur_ht_config);
  762. else
  763. #endif /* CONFIG_IWL4965_HT */
  764. sta_id = iwl4965_add_station_flags(priv, addr, is_ap,
  765. 0, NULL);
  766. /* Set up default rate scaling table in device's station table */
  767. iwl4965_add_station(priv, addr, is_ap);
  768. return sta_id;
  769. }
  770. /**
  771. * iwl4965_set_rxon_channel - Set the phymode and channel values in staging RXON
  772. * @phymode: MODE_IEEE80211A sets to 5.2GHz; all else set to 2.4GHz
  773. * @channel: Any channel valid for the requested phymode
  774. * In addition to setting the staging RXON, priv->phymode is also set.
  775. *
  776. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  777. * in the staging RXON flag structure based on the phymode
  778. */
  779. static int iwl4965_set_rxon_channel(struct iwl4965_priv *priv,
  780. enum ieee80211_band band,
  781. u16 channel)
  782. {
  783. if (!iwl4965_get_channel_info(priv, band, channel)) {
  784. IWL_DEBUG_INFO("Could not set channel to %d [%d]\n",
  785. channel, band);
  786. return -EINVAL;
  787. }
  788. if ((le16_to_cpu(priv->staging_rxon.channel) == channel) &&
  789. (priv->band == band))
  790. return 0;
  791. priv->staging_rxon.channel = cpu_to_le16(channel);
  792. if (band == IEEE80211_BAND_5GHZ)
  793. priv->staging_rxon.flags &= ~RXON_FLG_BAND_24G_MSK;
  794. else
  795. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  796. priv->band = band;
  797. IWL_DEBUG_INFO("Staging channel set to %d [%d]\n", channel, band);
  798. return 0;
  799. }
  800. /**
  801. * iwl4965_check_rxon_cmd - validate RXON structure is valid
  802. *
  803. * NOTE: This is really only useful during development and can eventually
  804. * be #ifdef'd out once the driver is stable and folks aren't actively
  805. * making changes
  806. */
  807. static int iwl4965_check_rxon_cmd(struct iwl4965_rxon_cmd *rxon)
  808. {
  809. int error = 0;
  810. int counter = 1;
  811. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  812. error |= le32_to_cpu(rxon->flags &
  813. (RXON_FLG_TGJ_NARROW_BAND_MSK |
  814. RXON_FLG_RADAR_DETECT_MSK));
  815. if (error)
  816. IWL_WARNING("check 24G fields %d | %d\n",
  817. counter++, error);
  818. } else {
  819. error |= (rxon->flags & RXON_FLG_SHORT_SLOT_MSK) ?
  820. 0 : le32_to_cpu(RXON_FLG_SHORT_SLOT_MSK);
  821. if (error)
  822. IWL_WARNING("check 52 fields %d | %d\n",
  823. counter++, error);
  824. error |= le32_to_cpu(rxon->flags & RXON_FLG_CCK_MSK);
  825. if (error)
  826. IWL_WARNING("check 52 CCK %d | %d\n",
  827. counter++, error);
  828. }
  829. error |= (rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1;
  830. if (error)
  831. IWL_WARNING("check mac addr %d | %d\n", counter++, error);
  832. /* make sure basic rates 6Mbps and 1Mbps are supported */
  833. error |= (((rxon->ofdm_basic_rates & IWL_RATE_6M_MASK) == 0) &&
  834. ((rxon->cck_basic_rates & IWL_RATE_1M_MASK) == 0));
  835. if (error)
  836. IWL_WARNING("check basic rate %d | %d\n", counter++, error);
  837. error |= (le16_to_cpu(rxon->assoc_id) > 2007);
  838. if (error)
  839. IWL_WARNING("check assoc id %d | %d\n", counter++, error);
  840. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK))
  841. == (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK));
  842. if (error)
  843. IWL_WARNING("check CCK and short slot %d | %d\n",
  844. counter++, error);
  845. error |= ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK))
  846. == (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK));
  847. if (error)
  848. IWL_WARNING("check CCK & auto detect %d | %d\n",
  849. counter++, error);
  850. error |= ((rxon->flags & (RXON_FLG_AUTO_DETECT_MSK |
  851. RXON_FLG_TGG_PROTECT_MSK)) == RXON_FLG_TGG_PROTECT_MSK);
  852. if (error)
  853. IWL_WARNING("check TGG and auto detect %d | %d\n",
  854. counter++, error);
  855. if (error)
  856. IWL_WARNING("Tuning to channel %d\n",
  857. le16_to_cpu(rxon->channel));
  858. if (error) {
  859. IWL_ERROR("Not a valid iwl4965_rxon_assoc_cmd field values\n");
  860. return -1;
  861. }
  862. return 0;
  863. }
  864. /**
  865. * iwl4965_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  866. * @priv: staging_rxon is compared to active_rxon
  867. *
  868. * If the RXON structure is changing enough to require a new tune,
  869. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  870. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  871. */
  872. static int iwl4965_full_rxon_required(struct iwl4965_priv *priv)
  873. {
  874. /* These items are only settable from the full RXON command */
  875. if (!(priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) ||
  876. compare_ether_addr(priv->staging_rxon.bssid_addr,
  877. priv->active_rxon.bssid_addr) ||
  878. compare_ether_addr(priv->staging_rxon.node_addr,
  879. priv->active_rxon.node_addr) ||
  880. compare_ether_addr(priv->staging_rxon.wlap_bssid_addr,
  881. priv->active_rxon.wlap_bssid_addr) ||
  882. (priv->staging_rxon.dev_type != priv->active_rxon.dev_type) ||
  883. (priv->staging_rxon.channel != priv->active_rxon.channel) ||
  884. (priv->staging_rxon.air_propagation !=
  885. priv->active_rxon.air_propagation) ||
  886. (priv->staging_rxon.ofdm_ht_single_stream_basic_rates !=
  887. priv->active_rxon.ofdm_ht_single_stream_basic_rates) ||
  888. (priv->staging_rxon.ofdm_ht_dual_stream_basic_rates !=
  889. priv->active_rxon.ofdm_ht_dual_stream_basic_rates) ||
  890. (priv->staging_rxon.rx_chain != priv->active_rxon.rx_chain) ||
  891. (priv->staging_rxon.assoc_id != priv->active_rxon.assoc_id))
  892. return 1;
  893. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  894. * be updated with the RXON_ASSOC command -- however only some
  895. * flag transitions are allowed using RXON_ASSOC */
  896. /* Check if we are not switching bands */
  897. if ((priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) !=
  898. (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK))
  899. return 1;
  900. /* Check if we are switching association toggle */
  901. if ((priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) !=
  902. (priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK))
  903. return 1;
  904. return 0;
  905. }
  906. static int iwl4965_send_rxon_assoc(struct iwl4965_priv *priv)
  907. {
  908. int rc = 0;
  909. struct iwl4965_rx_packet *res = NULL;
  910. struct iwl4965_rxon_assoc_cmd rxon_assoc;
  911. struct iwl4965_host_cmd cmd = {
  912. .id = REPLY_RXON_ASSOC,
  913. .len = sizeof(rxon_assoc),
  914. .meta.flags = CMD_WANT_SKB,
  915. .data = &rxon_assoc,
  916. };
  917. const struct iwl4965_rxon_cmd *rxon1 = &priv->staging_rxon;
  918. const struct iwl4965_rxon_cmd *rxon2 = &priv->active_rxon;
  919. if ((rxon1->flags == rxon2->flags) &&
  920. (rxon1->filter_flags == rxon2->filter_flags) &&
  921. (rxon1->cck_basic_rates == rxon2->cck_basic_rates) &&
  922. (rxon1->ofdm_ht_single_stream_basic_rates ==
  923. rxon2->ofdm_ht_single_stream_basic_rates) &&
  924. (rxon1->ofdm_ht_dual_stream_basic_rates ==
  925. rxon2->ofdm_ht_dual_stream_basic_rates) &&
  926. (rxon1->rx_chain == rxon2->rx_chain) &&
  927. (rxon1->ofdm_basic_rates == rxon2->ofdm_basic_rates)) {
  928. IWL_DEBUG_INFO("Using current RXON_ASSOC. Not resending.\n");
  929. return 0;
  930. }
  931. rxon_assoc.flags = priv->staging_rxon.flags;
  932. rxon_assoc.filter_flags = priv->staging_rxon.filter_flags;
  933. rxon_assoc.ofdm_basic_rates = priv->staging_rxon.ofdm_basic_rates;
  934. rxon_assoc.cck_basic_rates = priv->staging_rxon.cck_basic_rates;
  935. rxon_assoc.reserved = 0;
  936. rxon_assoc.ofdm_ht_single_stream_basic_rates =
  937. priv->staging_rxon.ofdm_ht_single_stream_basic_rates;
  938. rxon_assoc.ofdm_ht_dual_stream_basic_rates =
  939. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates;
  940. rxon_assoc.rx_chain_select_flags = priv->staging_rxon.rx_chain;
  941. rc = iwl4965_send_cmd_sync(priv, &cmd);
  942. if (rc)
  943. return rc;
  944. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  945. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  946. IWL_ERROR("Bad return from REPLY_RXON_ASSOC command\n");
  947. rc = -EIO;
  948. }
  949. priv->alloc_rxb_skb--;
  950. dev_kfree_skb_any(cmd.meta.u.skb);
  951. return rc;
  952. }
  953. /**
  954. * iwl4965_commit_rxon - commit staging_rxon to hardware
  955. *
  956. * The RXON command in staging_rxon is committed to the hardware and
  957. * the active_rxon structure is updated with the new data. This
  958. * function correctly transitions out of the RXON_ASSOC_MSK state if
  959. * a HW tune is required based on the RXON structure changes.
  960. */
  961. static int iwl4965_commit_rxon(struct iwl4965_priv *priv)
  962. {
  963. /* cast away the const for active_rxon in this function */
  964. struct iwl4965_rxon_cmd *active_rxon = (void *)&priv->active_rxon;
  965. DECLARE_MAC_BUF(mac);
  966. int rc = 0;
  967. if (!iwl4965_is_alive(priv))
  968. return -1;
  969. /* always get timestamp with Rx frame */
  970. priv->staging_rxon.flags |= RXON_FLG_TSF2HOST_MSK;
  971. rc = iwl4965_check_rxon_cmd(&priv->staging_rxon);
  972. if (rc) {
  973. IWL_ERROR("Invalid RXON configuration. Not committing.\n");
  974. return -EINVAL;
  975. }
  976. /* If we don't need to send a full RXON, we can use
  977. * iwl4965_rxon_assoc_cmd which is used to reconfigure filter
  978. * and other flags for the current radio configuration. */
  979. if (!iwl4965_full_rxon_required(priv)) {
  980. rc = iwl4965_send_rxon_assoc(priv);
  981. if (rc) {
  982. IWL_ERROR("Error setting RXON_ASSOC "
  983. "configuration (%d).\n", rc);
  984. return rc;
  985. }
  986. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  987. return 0;
  988. }
  989. /* station table will be cleared */
  990. priv->assoc_station_added = 0;
  991. #ifdef CONFIG_IWL4965_SENSITIVITY
  992. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  993. if (!priv->error_recovering)
  994. priv->start_calib = 0;
  995. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  996. #endif /* CONFIG_IWL4965_SENSITIVITY */
  997. /* If we are currently associated and the new config requires
  998. * an RXON_ASSOC and the new config wants the associated mask enabled,
  999. * we must clear the associated from the active configuration
  1000. * before we apply the new config */
  1001. if (iwl4965_is_associated(priv) &&
  1002. (priv->staging_rxon.filter_flags & RXON_FILTER_ASSOC_MSK)) {
  1003. IWL_DEBUG_INFO("Toggling associated bit on current RXON\n");
  1004. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  1005. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  1006. sizeof(struct iwl4965_rxon_cmd),
  1007. &priv->active_rxon);
  1008. /* If the mask clearing failed then we set
  1009. * active_rxon back to what it was previously */
  1010. if (rc) {
  1011. active_rxon->filter_flags |= RXON_FILTER_ASSOC_MSK;
  1012. IWL_ERROR("Error clearing ASSOC_MSK on current "
  1013. "configuration (%d).\n", rc);
  1014. return rc;
  1015. }
  1016. }
  1017. IWL_DEBUG_INFO("Sending RXON\n"
  1018. "* with%s RXON_FILTER_ASSOC_MSK\n"
  1019. "* channel = %d\n"
  1020. "* bssid = %s\n",
  1021. ((priv->staging_rxon.filter_flags &
  1022. RXON_FILTER_ASSOC_MSK) ? "" : "out"),
  1023. le16_to_cpu(priv->staging_rxon.channel),
  1024. print_mac(mac, priv->staging_rxon.bssid_addr));
  1025. /* Apply the new configuration */
  1026. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON,
  1027. sizeof(struct iwl4965_rxon_cmd), &priv->staging_rxon);
  1028. if (rc) {
  1029. IWL_ERROR("Error setting new configuration (%d).\n", rc);
  1030. return rc;
  1031. }
  1032. iwl4965_clear_stations_table(priv);
  1033. #ifdef CONFIG_IWL4965_SENSITIVITY
  1034. if (!priv->error_recovering)
  1035. priv->start_calib = 0;
  1036. priv->sensitivity_data.state = IWL_SENS_CALIB_NEED_REINIT;
  1037. iwl4965_init_sensitivity(priv, CMD_ASYNC, 1);
  1038. #endif /* CONFIG_IWL4965_SENSITIVITY */
  1039. memcpy(active_rxon, &priv->staging_rxon, sizeof(*active_rxon));
  1040. /* If we issue a new RXON command which required a tune then we must
  1041. * send a new TXPOWER command or we won't be able to Tx any frames */
  1042. rc = iwl4965_hw_reg_send_txpower(priv);
  1043. if (rc) {
  1044. IWL_ERROR("Error setting Tx power (%d).\n", rc);
  1045. return rc;
  1046. }
  1047. /* Add the broadcast address so we can send broadcast frames */
  1048. if (iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0) ==
  1049. IWL_INVALID_STATION) {
  1050. IWL_ERROR("Error adding BROADCAST address for transmit.\n");
  1051. return -EIO;
  1052. }
  1053. /* If we have set the ASSOC_MSK and we are in BSS mode then
  1054. * add the IWL_AP_ID to the station rate table */
  1055. if (iwl4965_is_associated(priv) &&
  1056. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  1057. if (iwl4965_rxon_add_station(priv, priv->active_rxon.bssid_addr, 1)
  1058. == IWL_INVALID_STATION) {
  1059. IWL_ERROR("Error adding AP address for transmit.\n");
  1060. return -EIO;
  1061. }
  1062. priv->assoc_station_added = 1;
  1063. }
  1064. return 0;
  1065. }
  1066. static int iwl4965_send_bt_config(struct iwl4965_priv *priv)
  1067. {
  1068. struct iwl4965_bt_cmd bt_cmd = {
  1069. .flags = 3,
  1070. .lead_time = 0xAA,
  1071. .max_kill = 1,
  1072. .kill_ack_mask = 0,
  1073. .kill_cts_mask = 0,
  1074. };
  1075. return iwl4965_send_cmd_pdu(priv, REPLY_BT_CONFIG,
  1076. sizeof(struct iwl4965_bt_cmd), &bt_cmd);
  1077. }
  1078. static int iwl4965_send_scan_abort(struct iwl4965_priv *priv)
  1079. {
  1080. int rc = 0;
  1081. struct iwl4965_rx_packet *res;
  1082. struct iwl4965_host_cmd cmd = {
  1083. .id = REPLY_SCAN_ABORT_CMD,
  1084. .meta.flags = CMD_WANT_SKB,
  1085. };
  1086. /* If there isn't a scan actively going on in the hardware
  1087. * then we are in between scan bands and not actually
  1088. * actively scanning, so don't send the abort command */
  1089. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  1090. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1091. return 0;
  1092. }
  1093. rc = iwl4965_send_cmd_sync(priv, &cmd);
  1094. if (rc) {
  1095. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1096. return rc;
  1097. }
  1098. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1099. if (res->u.status != CAN_ABORT_STATUS) {
  1100. /* The scan abort will return 1 for success or
  1101. * 2 for "failure". A failure condition can be
  1102. * due to simply not being in an active scan which
  1103. * can occur if we send the scan abort before we
  1104. * the microcode has notified us that a scan is
  1105. * completed. */
  1106. IWL_DEBUG_INFO("SCAN_ABORT returned %d.\n", res->u.status);
  1107. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  1108. clear_bit(STATUS_SCAN_HW, &priv->status);
  1109. }
  1110. dev_kfree_skb_any(cmd.meta.u.skb);
  1111. return rc;
  1112. }
  1113. static int iwl4965_card_state_sync_callback(struct iwl4965_priv *priv,
  1114. struct iwl4965_cmd *cmd,
  1115. struct sk_buff *skb)
  1116. {
  1117. return 1;
  1118. }
  1119. /*
  1120. * CARD_STATE_CMD
  1121. *
  1122. * Use: Sets the device's internal card state to enable, disable, or halt
  1123. *
  1124. * When in the 'enable' state the card operates as normal.
  1125. * When in the 'disable' state, the card enters into a low power mode.
  1126. * When in the 'halt' state, the card is shut down and must be fully
  1127. * restarted to come back on.
  1128. */
  1129. static int iwl4965_send_card_state(struct iwl4965_priv *priv, u32 flags, u8 meta_flag)
  1130. {
  1131. struct iwl4965_host_cmd cmd = {
  1132. .id = REPLY_CARD_STATE_CMD,
  1133. .len = sizeof(u32),
  1134. .data = &flags,
  1135. .meta.flags = meta_flag,
  1136. };
  1137. if (meta_flag & CMD_ASYNC)
  1138. cmd.meta.u.callback = iwl4965_card_state_sync_callback;
  1139. return iwl4965_send_cmd(priv, &cmd);
  1140. }
  1141. static int iwl4965_add_sta_sync_callback(struct iwl4965_priv *priv,
  1142. struct iwl4965_cmd *cmd, struct sk_buff *skb)
  1143. {
  1144. struct iwl4965_rx_packet *res = NULL;
  1145. if (!skb) {
  1146. IWL_ERROR("Error: Response NULL in REPLY_ADD_STA.\n");
  1147. return 1;
  1148. }
  1149. res = (struct iwl4965_rx_packet *)skb->data;
  1150. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1151. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1152. res->hdr.flags);
  1153. return 1;
  1154. }
  1155. switch (res->u.add_sta.status) {
  1156. case ADD_STA_SUCCESS_MSK:
  1157. break;
  1158. default:
  1159. break;
  1160. }
  1161. /* We didn't cache the SKB; let the caller free it */
  1162. return 1;
  1163. }
  1164. int iwl4965_send_add_station(struct iwl4965_priv *priv,
  1165. struct iwl4965_addsta_cmd *sta, u8 flags)
  1166. {
  1167. struct iwl4965_rx_packet *res = NULL;
  1168. int rc = 0;
  1169. struct iwl4965_host_cmd cmd = {
  1170. .id = REPLY_ADD_STA,
  1171. .len = sizeof(struct iwl4965_addsta_cmd),
  1172. .meta.flags = flags,
  1173. .data = sta,
  1174. };
  1175. if (flags & CMD_ASYNC)
  1176. cmd.meta.u.callback = iwl4965_add_sta_sync_callback;
  1177. else
  1178. cmd.meta.flags |= CMD_WANT_SKB;
  1179. rc = iwl4965_send_cmd(priv, &cmd);
  1180. if (rc || (flags & CMD_ASYNC))
  1181. return rc;
  1182. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  1183. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  1184. IWL_ERROR("Bad return from REPLY_ADD_STA (0x%08X)\n",
  1185. res->hdr.flags);
  1186. rc = -EIO;
  1187. }
  1188. if (rc == 0) {
  1189. switch (res->u.add_sta.status) {
  1190. case ADD_STA_SUCCESS_MSK:
  1191. IWL_DEBUG_INFO("REPLY_ADD_STA PASSED\n");
  1192. break;
  1193. default:
  1194. rc = -EIO;
  1195. IWL_WARNING("REPLY_ADD_STA failed\n");
  1196. break;
  1197. }
  1198. }
  1199. priv->alloc_rxb_skb--;
  1200. dev_kfree_skb_any(cmd.meta.u.skb);
  1201. return rc;
  1202. }
  1203. static int iwl4965_update_sta_key_info(struct iwl4965_priv *priv,
  1204. struct ieee80211_key_conf *keyconf,
  1205. u8 sta_id)
  1206. {
  1207. unsigned long flags;
  1208. __le16 key_flags = 0;
  1209. switch (keyconf->alg) {
  1210. case ALG_CCMP:
  1211. key_flags |= STA_KEY_FLG_CCMP;
  1212. key_flags |= cpu_to_le16(
  1213. keyconf->keyidx << STA_KEY_FLG_KEYID_POS);
  1214. key_flags &= ~STA_KEY_FLG_INVALID;
  1215. break;
  1216. case ALG_TKIP:
  1217. case ALG_WEP:
  1218. default:
  1219. return -EINVAL;
  1220. }
  1221. spin_lock_irqsave(&priv->sta_lock, flags);
  1222. priv->stations[sta_id].keyinfo.alg = keyconf->alg;
  1223. priv->stations[sta_id].keyinfo.keylen = keyconf->keylen;
  1224. memcpy(priv->stations[sta_id].keyinfo.key, keyconf->key,
  1225. keyconf->keylen);
  1226. memcpy(priv->stations[sta_id].sta.key.key, keyconf->key,
  1227. keyconf->keylen);
  1228. priv->stations[sta_id].sta.key.key_flags = key_flags;
  1229. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1230. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1231. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1232. IWL_DEBUG_INFO("hwcrypto: modify ucode station key info\n");
  1233. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1234. return 0;
  1235. }
  1236. static int iwl4965_clear_sta_key_info(struct iwl4965_priv *priv, u8 sta_id)
  1237. {
  1238. unsigned long flags;
  1239. spin_lock_irqsave(&priv->sta_lock, flags);
  1240. memset(&priv->stations[sta_id].keyinfo, 0, sizeof(struct iwl4965_hw_key));
  1241. memset(&priv->stations[sta_id].sta.key, 0, sizeof(struct iwl4965_keyinfo));
  1242. priv->stations[sta_id].sta.key.key_flags = STA_KEY_FLG_NO_ENC;
  1243. priv->stations[sta_id].sta.sta.modify_mask = STA_MODIFY_KEY_MASK;
  1244. priv->stations[sta_id].sta.mode = STA_CONTROL_MODIFY_MSK;
  1245. spin_unlock_irqrestore(&priv->sta_lock, flags);
  1246. IWL_DEBUG_INFO("hwcrypto: clear ucode station key info\n");
  1247. iwl4965_send_add_station(priv, &priv->stations[sta_id].sta, 0);
  1248. return 0;
  1249. }
  1250. static void iwl4965_clear_free_frames(struct iwl4965_priv *priv)
  1251. {
  1252. struct list_head *element;
  1253. IWL_DEBUG_INFO("%d frames on pre-allocated heap on clear.\n",
  1254. priv->frames_count);
  1255. while (!list_empty(&priv->free_frames)) {
  1256. element = priv->free_frames.next;
  1257. list_del(element);
  1258. kfree(list_entry(element, struct iwl4965_frame, list));
  1259. priv->frames_count--;
  1260. }
  1261. if (priv->frames_count) {
  1262. IWL_WARNING("%d frames still in use. Did we lose one?\n",
  1263. priv->frames_count);
  1264. priv->frames_count = 0;
  1265. }
  1266. }
  1267. static struct iwl4965_frame *iwl4965_get_free_frame(struct iwl4965_priv *priv)
  1268. {
  1269. struct iwl4965_frame *frame;
  1270. struct list_head *element;
  1271. if (list_empty(&priv->free_frames)) {
  1272. frame = kzalloc(sizeof(*frame), GFP_KERNEL);
  1273. if (!frame) {
  1274. IWL_ERROR("Could not allocate frame!\n");
  1275. return NULL;
  1276. }
  1277. priv->frames_count++;
  1278. return frame;
  1279. }
  1280. element = priv->free_frames.next;
  1281. list_del(element);
  1282. return list_entry(element, struct iwl4965_frame, list);
  1283. }
  1284. static void iwl4965_free_frame(struct iwl4965_priv *priv, struct iwl4965_frame *frame)
  1285. {
  1286. memset(frame, 0, sizeof(*frame));
  1287. list_add(&frame->list, &priv->free_frames);
  1288. }
  1289. unsigned int iwl4965_fill_beacon_frame(struct iwl4965_priv *priv,
  1290. struct ieee80211_hdr *hdr,
  1291. const u8 *dest, int left)
  1292. {
  1293. if (!iwl4965_is_associated(priv) || !priv->ibss_beacon ||
  1294. ((priv->iw_mode != IEEE80211_IF_TYPE_IBSS) &&
  1295. (priv->iw_mode != IEEE80211_IF_TYPE_AP)))
  1296. return 0;
  1297. if (priv->ibss_beacon->len > left)
  1298. return 0;
  1299. memcpy(hdr, priv->ibss_beacon->data, priv->ibss_beacon->len);
  1300. return priv->ibss_beacon->len;
  1301. }
  1302. int iwl4965_rate_index_from_plcp(int plcp)
  1303. {
  1304. int i = 0;
  1305. /* 4965 HT rate format */
  1306. if (plcp & RATE_MCS_HT_MSK) {
  1307. i = (plcp & 0xff);
  1308. if (i >= IWL_RATE_MIMO_6M_PLCP)
  1309. i = i - IWL_RATE_MIMO_6M_PLCP;
  1310. i += IWL_FIRST_OFDM_RATE;
  1311. /* skip 9M not supported in ht*/
  1312. if (i >= IWL_RATE_9M_INDEX)
  1313. i += 1;
  1314. if ((i >= IWL_FIRST_OFDM_RATE) &&
  1315. (i <= IWL_LAST_OFDM_RATE))
  1316. return i;
  1317. /* 4965 legacy rate format, search for match in table */
  1318. } else {
  1319. for (i = 0; i < ARRAY_SIZE(iwl4965_rates); i++)
  1320. if (iwl4965_rates[i].plcp == (plcp &0xFF))
  1321. return i;
  1322. }
  1323. return -1;
  1324. }
  1325. static u8 iwl4965_rate_get_lowest_plcp(int rate_mask)
  1326. {
  1327. u8 i;
  1328. for (i = IWL_RATE_1M_INDEX; i != IWL_RATE_INVALID;
  1329. i = iwl4965_rates[i].next_ieee) {
  1330. if (rate_mask & (1 << i))
  1331. return iwl4965_rates[i].plcp;
  1332. }
  1333. return IWL_RATE_INVALID;
  1334. }
  1335. static int iwl4965_send_beacon_cmd(struct iwl4965_priv *priv)
  1336. {
  1337. struct iwl4965_frame *frame;
  1338. unsigned int frame_size;
  1339. int rc;
  1340. u8 rate;
  1341. frame = iwl4965_get_free_frame(priv);
  1342. if (!frame) {
  1343. IWL_ERROR("Could not obtain free frame buffer for beacon "
  1344. "command.\n");
  1345. return -ENOMEM;
  1346. }
  1347. if (!(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK)) {
  1348. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic &
  1349. 0xFF0);
  1350. if (rate == IWL_INVALID_RATE)
  1351. rate = IWL_RATE_6M_PLCP;
  1352. } else {
  1353. rate = iwl4965_rate_get_lowest_plcp(priv->active_rate_basic & 0xF);
  1354. if (rate == IWL_INVALID_RATE)
  1355. rate = IWL_RATE_1M_PLCP;
  1356. }
  1357. frame_size = iwl4965_hw_get_beacon_cmd(priv, frame, rate);
  1358. rc = iwl4965_send_cmd_pdu(priv, REPLY_TX_BEACON, frame_size,
  1359. &frame->u.cmd[0]);
  1360. iwl4965_free_frame(priv, frame);
  1361. return rc;
  1362. }
  1363. /******************************************************************************
  1364. *
  1365. * EEPROM related functions
  1366. *
  1367. ******************************************************************************/
  1368. static void get_eeprom_mac(struct iwl4965_priv *priv, u8 *mac)
  1369. {
  1370. memcpy(mac, priv->eeprom.mac_address, 6);
  1371. }
  1372. static inline void iwl4965_eeprom_release_semaphore(struct iwl4965_priv *priv)
  1373. {
  1374. iwl4965_clear_bit(priv, CSR_HW_IF_CONFIG_REG,
  1375. CSR_HW_IF_CONFIG_REG_BIT_EEPROM_OWN_SEM);
  1376. }
  1377. /**
  1378. * iwl4965_eeprom_init - read EEPROM contents
  1379. *
  1380. * Load the EEPROM contents from adapter into priv->eeprom
  1381. *
  1382. * NOTE: This routine uses the non-debug IO access functions.
  1383. */
  1384. int iwl4965_eeprom_init(struct iwl4965_priv *priv)
  1385. {
  1386. u16 *e = (u16 *)&priv->eeprom;
  1387. u32 gp = iwl4965_read32(priv, CSR_EEPROM_GP);
  1388. u32 r;
  1389. int sz = sizeof(priv->eeprom);
  1390. int rc;
  1391. int i;
  1392. u16 addr;
  1393. /* The EEPROM structure has several padding buffers within it
  1394. * and when adding new EEPROM maps is subject to programmer errors
  1395. * which may be very difficult to identify without explicitly
  1396. * checking the resulting size of the eeprom map. */
  1397. BUILD_BUG_ON(sizeof(priv->eeprom) != IWL_EEPROM_IMAGE_SIZE);
  1398. if ((gp & CSR_EEPROM_GP_VALID_MSK) == CSR_EEPROM_GP_BAD_SIGNATURE) {
  1399. IWL_ERROR("EEPROM not found, EEPROM_GP=0x%08x", gp);
  1400. return -ENOENT;
  1401. }
  1402. /* Make sure driver (instead of uCode) is allowed to read EEPROM */
  1403. rc = iwl4965_eeprom_acquire_semaphore(priv);
  1404. if (rc < 0) {
  1405. IWL_ERROR("Failed to acquire EEPROM semaphore.\n");
  1406. return -ENOENT;
  1407. }
  1408. /* eeprom is an array of 16bit values */
  1409. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  1410. _iwl4965_write32(priv, CSR_EEPROM_REG, addr << 1);
  1411. _iwl4965_clear_bit(priv, CSR_EEPROM_REG, CSR_EEPROM_REG_BIT_CMD);
  1412. for (i = 0; i < IWL_EEPROM_ACCESS_TIMEOUT;
  1413. i += IWL_EEPROM_ACCESS_DELAY) {
  1414. r = _iwl4965_read_direct32(priv, CSR_EEPROM_REG);
  1415. if (r & CSR_EEPROM_REG_READ_VALID_MSK)
  1416. break;
  1417. udelay(IWL_EEPROM_ACCESS_DELAY);
  1418. }
  1419. if (!(r & CSR_EEPROM_REG_READ_VALID_MSK)) {
  1420. IWL_ERROR("Time out reading EEPROM[%d]", addr);
  1421. rc = -ETIMEDOUT;
  1422. goto done;
  1423. }
  1424. e[addr / 2] = le16_to_cpu((__force __le16)(r >> 16));
  1425. }
  1426. rc = 0;
  1427. done:
  1428. iwl4965_eeprom_release_semaphore(priv);
  1429. return rc;
  1430. }
  1431. /******************************************************************************
  1432. *
  1433. * Misc. internal state and helper functions
  1434. *
  1435. ******************************************************************************/
  1436. #ifdef CONFIG_IWL4965_DEBUG
  1437. /**
  1438. * iwl4965_report_frame - dump frame to syslog during debug sessions
  1439. *
  1440. * You may hack this function to show different aspects of received frames,
  1441. * including selective frame dumps.
  1442. * group100 parameter selects whether to show 1 out of 100 good frames.
  1443. *
  1444. * TODO: This was originally written for 3945, need to audit for
  1445. * proper operation with 4965.
  1446. */
  1447. void iwl4965_report_frame(struct iwl4965_priv *priv,
  1448. struct iwl4965_rx_packet *pkt,
  1449. struct ieee80211_hdr *header, int group100)
  1450. {
  1451. u32 to_us;
  1452. u32 print_summary = 0;
  1453. u32 print_dump = 0; /* set to 1 to dump all frames' contents */
  1454. u32 hundred = 0;
  1455. u32 dataframe = 0;
  1456. u16 fc;
  1457. u16 seq_ctl;
  1458. u16 channel;
  1459. u16 phy_flags;
  1460. int rate_sym;
  1461. u16 length;
  1462. u16 status;
  1463. u16 bcn_tmr;
  1464. u32 tsf_low;
  1465. u64 tsf;
  1466. u8 rssi;
  1467. u8 agc;
  1468. u16 sig_avg;
  1469. u16 noise_diff;
  1470. struct iwl4965_rx_frame_stats *rx_stats = IWL_RX_STATS(pkt);
  1471. struct iwl4965_rx_frame_hdr *rx_hdr = IWL_RX_HDR(pkt);
  1472. struct iwl4965_rx_frame_end *rx_end = IWL_RX_END(pkt);
  1473. u8 *data = IWL_RX_DATA(pkt);
  1474. /* MAC header */
  1475. fc = le16_to_cpu(header->frame_control);
  1476. seq_ctl = le16_to_cpu(header->seq_ctrl);
  1477. /* metadata */
  1478. channel = le16_to_cpu(rx_hdr->channel);
  1479. phy_flags = le16_to_cpu(rx_hdr->phy_flags);
  1480. rate_sym = rx_hdr->rate;
  1481. length = le16_to_cpu(rx_hdr->len);
  1482. /* end-of-frame status and timestamp */
  1483. status = le32_to_cpu(rx_end->status);
  1484. bcn_tmr = le32_to_cpu(rx_end->beacon_timestamp);
  1485. tsf_low = le64_to_cpu(rx_end->timestamp) & 0x0ffffffff;
  1486. tsf = le64_to_cpu(rx_end->timestamp);
  1487. /* signal statistics */
  1488. rssi = rx_stats->rssi;
  1489. agc = rx_stats->agc;
  1490. sig_avg = le16_to_cpu(rx_stats->sig_avg);
  1491. noise_diff = le16_to_cpu(rx_stats->noise_diff);
  1492. to_us = !compare_ether_addr(header->addr1, priv->mac_addr);
  1493. /* if data frame is to us and all is good,
  1494. * (optionally) print summary for only 1 out of every 100 */
  1495. if (to_us && (fc & ~IEEE80211_FCTL_PROTECTED) ==
  1496. (IEEE80211_FCTL_FROMDS | IEEE80211_FTYPE_DATA)) {
  1497. dataframe = 1;
  1498. if (!group100)
  1499. print_summary = 1; /* print each frame */
  1500. else if (priv->framecnt_to_us < 100) {
  1501. priv->framecnt_to_us++;
  1502. print_summary = 0;
  1503. } else {
  1504. priv->framecnt_to_us = 0;
  1505. print_summary = 1;
  1506. hundred = 1;
  1507. }
  1508. } else {
  1509. /* print summary for all other frames */
  1510. print_summary = 1;
  1511. }
  1512. if (print_summary) {
  1513. char *title;
  1514. u32 rate;
  1515. if (hundred)
  1516. title = "100Frames";
  1517. else if (fc & IEEE80211_FCTL_RETRY)
  1518. title = "Retry";
  1519. else if (ieee80211_is_assoc_response(fc))
  1520. title = "AscRsp";
  1521. else if (ieee80211_is_reassoc_response(fc))
  1522. title = "RasRsp";
  1523. else if (ieee80211_is_probe_response(fc)) {
  1524. title = "PrbRsp";
  1525. print_dump = 1; /* dump frame contents */
  1526. } else if (ieee80211_is_beacon(fc)) {
  1527. title = "Beacon";
  1528. print_dump = 1; /* dump frame contents */
  1529. } else if (ieee80211_is_atim(fc))
  1530. title = "ATIM";
  1531. else if (ieee80211_is_auth(fc))
  1532. title = "Auth";
  1533. else if (ieee80211_is_deauth(fc))
  1534. title = "DeAuth";
  1535. else if (ieee80211_is_disassoc(fc))
  1536. title = "DisAssoc";
  1537. else
  1538. title = "Frame";
  1539. rate = iwl4965_rate_index_from_plcp(rate_sym);
  1540. if (rate == -1)
  1541. rate = 0;
  1542. else
  1543. rate = iwl4965_rates[rate].ieee / 2;
  1544. /* print frame summary.
  1545. * MAC addresses show just the last byte (for brevity),
  1546. * but you can hack it to show more, if you'd like to. */
  1547. if (dataframe)
  1548. IWL_DEBUG_RX("%s: mhd=0x%04x, dst=0x%02x, "
  1549. "len=%u, rssi=%d, chnl=%d, rate=%u, \n",
  1550. title, fc, header->addr1[5],
  1551. length, rssi, channel, rate);
  1552. else {
  1553. /* src/dst addresses assume managed mode */
  1554. IWL_DEBUG_RX("%s: 0x%04x, dst=0x%02x, "
  1555. "src=0x%02x, rssi=%u, tim=%lu usec, "
  1556. "phy=0x%02x, chnl=%d\n",
  1557. title, fc, header->addr1[5],
  1558. header->addr3[5], rssi,
  1559. tsf_low - priv->scan_start_tsf,
  1560. phy_flags, channel);
  1561. }
  1562. }
  1563. if (print_dump)
  1564. iwl4965_print_hex_dump(IWL_DL_RX, data, length);
  1565. }
  1566. #endif
  1567. static void iwl4965_unset_hw_setting(struct iwl4965_priv *priv)
  1568. {
  1569. if (priv->hw_setting.shared_virt)
  1570. pci_free_consistent(priv->pci_dev,
  1571. sizeof(struct iwl4965_shared),
  1572. priv->hw_setting.shared_virt,
  1573. priv->hw_setting.shared_phys);
  1574. }
  1575. /**
  1576. * iwl4965_supported_rate_to_ie - fill in the supported rate in IE field
  1577. *
  1578. * return : set the bit for each supported rate insert in ie
  1579. */
  1580. static u16 iwl4965_supported_rate_to_ie(u8 *ie, u16 supported_rate,
  1581. u16 basic_rate, int *left)
  1582. {
  1583. u16 ret_rates = 0, bit;
  1584. int i;
  1585. u8 *cnt = ie;
  1586. u8 *rates = ie + 1;
  1587. for (bit = 1, i = 0; i < IWL_RATE_COUNT; i++, bit <<= 1) {
  1588. if (bit & supported_rate) {
  1589. ret_rates |= bit;
  1590. rates[*cnt] = iwl4965_rates[i].ieee |
  1591. ((bit & basic_rate) ? 0x80 : 0x00);
  1592. (*cnt)++;
  1593. (*left)--;
  1594. if ((*left <= 0) ||
  1595. (*cnt >= IWL_SUPPORTED_RATES_IE_LEN))
  1596. break;
  1597. }
  1598. }
  1599. return ret_rates;
  1600. }
  1601. #ifdef CONFIG_IWL4965_HT
  1602. void static iwl4965_set_ht_capab(struct ieee80211_hw *hw,
  1603. struct ieee80211_ht_cap *ht_cap,
  1604. u8 use_current_config);
  1605. #endif
  1606. /**
  1607. * iwl4965_fill_probe_req - fill in all required fields and IE for probe request
  1608. */
  1609. static u16 iwl4965_fill_probe_req(struct iwl4965_priv *priv,
  1610. struct ieee80211_mgmt *frame,
  1611. int left, int is_direct)
  1612. {
  1613. int len = 0;
  1614. u8 *pos = NULL;
  1615. u16 active_rates, ret_rates, cck_rates, active_rate_basic;
  1616. #ifdef CONFIG_IWL4965_HT
  1617. struct ieee80211_hw_mode *mode;
  1618. #endif /* CONFIG_IWL4965_HT */
  1619. /* Make sure there is enough space for the probe request,
  1620. * two mandatory IEs and the data */
  1621. left -= 24;
  1622. if (left < 0)
  1623. return 0;
  1624. len += 24;
  1625. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1626. memcpy(frame->da, iwl4965_broadcast_addr, ETH_ALEN);
  1627. memcpy(frame->sa, priv->mac_addr, ETH_ALEN);
  1628. memcpy(frame->bssid, iwl4965_broadcast_addr, ETH_ALEN);
  1629. frame->seq_ctrl = 0;
  1630. /* fill in our indirect SSID IE */
  1631. /* ...next IE... */
  1632. left -= 2;
  1633. if (left < 0)
  1634. return 0;
  1635. len += 2;
  1636. pos = &(frame->u.probe_req.variable[0]);
  1637. *pos++ = WLAN_EID_SSID;
  1638. *pos++ = 0;
  1639. /* fill in our direct SSID IE... */
  1640. if (is_direct) {
  1641. /* ...next IE... */
  1642. left -= 2 + priv->essid_len;
  1643. if (left < 0)
  1644. return 0;
  1645. /* ... fill it in... */
  1646. *pos++ = WLAN_EID_SSID;
  1647. *pos++ = priv->essid_len;
  1648. memcpy(pos, priv->essid, priv->essid_len);
  1649. pos += priv->essid_len;
  1650. len += 2 + priv->essid_len;
  1651. }
  1652. /* fill in supported rate */
  1653. /* ...next IE... */
  1654. left -= 2;
  1655. if (left < 0)
  1656. return 0;
  1657. /* ... fill it in... */
  1658. *pos++ = WLAN_EID_SUPP_RATES;
  1659. *pos = 0;
  1660. /* exclude 60M rate */
  1661. active_rates = priv->rates_mask;
  1662. active_rates &= ~IWL_RATE_60M_MASK;
  1663. active_rate_basic = active_rates & IWL_BASIC_RATES_MASK;
  1664. cck_rates = IWL_CCK_RATES_MASK & active_rates;
  1665. ret_rates = iwl4965_supported_rate_to_ie(pos, cck_rates,
  1666. active_rate_basic, &left);
  1667. active_rates &= ~ret_rates;
  1668. ret_rates = iwl4965_supported_rate_to_ie(pos, active_rates,
  1669. active_rate_basic, &left);
  1670. active_rates &= ~ret_rates;
  1671. len += 2 + *pos;
  1672. pos += (*pos) + 1;
  1673. if (active_rates == 0)
  1674. goto fill_end;
  1675. /* fill in supported extended rate */
  1676. /* ...next IE... */
  1677. left -= 2;
  1678. if (left < 0)
  1679. return 0;
  1680. /* ... fill it in... */
  1681. *pos++ = WLAN_EID_EXT_SUPP_RATES;
  1682. *pos = 0;
  1683. iwl4965_supported_rate_to_ie(pos, active_rates,
  1684. active_rate_basic, &left);
  1685. if (*pos > 0)
  1686. len += 2 + *pos;
  1687. #ifdef CONFIG_IWL4965_HT
  1688. mode = priv->hw->conf.mode;
  1689. if (mode->ht_info.ht_supported) {
  1690. pos += (*pos) + 1;
  1691. *pos++ = WLAN_EID_HT_CAPABILITY;
  1692. *pos++ = sizeof(struct ieee80211_ht_cap);
  1693. iwl4965_set_ht_capab(priv->hw,
  1694. (struct ieee80211_ht_cap *)pos, 0);
  1695. len += 2 + sizeof(struct ieee80211_ht_cap);
  1696. }
  1697. #endif /*CONFIG_IWL4965_HT */
  1698. fill_end:
  1699. return (u16)len;
  1700. }
  1701. /*
  1702. * QoS support
  1703. */
  1704. #ifdef CONFIG_IWL4965_QOS
  1705. static int iwl4965_send_qos_params_command(struct iwl4965_priv *priv,
  1706. struct iwl4965_qosparam_cmd *qos)
  1707. {
  1708. return iwl4965_send_cmd_pdu(priv, REPLY_QOS_PARAM,
  1709. sizeof(struct iwl4965_qosparam_cmd), qos);
  1710. }
  1711. static void iwl4965_reset_qos(struct iwl4965_priv *priv)
  1712. {
  1713. u16 cw_min = 15;
  1714. u16 cw_max = 1023;
  1715. u8 aifs = 2;
  1716. u8 is_legacy = 0;
  1717. unsigned long flags;
  1718. int i;
  1719. spin_lock_irqsave(&priv->lock, flags);
  1720. priv->qos_data.qos_active = 0;
  1721. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS) {
  1722. if (priv->qos_data.qos_enable)
  1723. priv->qos_data.qos_active = 1;
  1724. if (!(priv->active_rate & 0xfff0)) {
  1725. cw_min = 31;
  1726. is_legacy = 1;
  1727. }
  1728. } else if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  1729. if (priv->qos_data.qos_enable)
  1730. priv->qos_data.qos_active = 1;
  1731. } else if (!(priv->staging_rxon.flags & RXON_FLG_SHORT_SLOT_MSK)) {
  1732. cw_min = 31;
  1733. is_legacy = 1;
  1734. }
  1735. if (priv->qos_data.qos_active)
  1736. aifs = 3;
  1737. priv->qos_data.def_qos_parm.ac[0].cw_min = cpu_to_le16(cw_min);
  1738. priv->qos_data.def_qos_parm.ac[0].cw_max = cpu_to_le16(cw_max);
  1739. priv->qos_data.def_qos_parm.ac[0].aifsn = aifs;
  1740. priv->qos_data.def_qos_parm.ac[0].edca_txop = 0;
  1741. priv->qos_data.def_qos_parm.ac[0].reserved1 = 0;
  1742. if (priv->qos_data.qos_active) {
  1743. i = 1;
  1744. priv->qos_data.def_qos_parm.ac[i].cw_min = cpu_to_le16(cw_min);
  1745. priv->qos_data.def_qos_parm.ac[i].cw_max = cpu_to_le16(cw_max);
  1746. priv->qos_data.def_qos_parm.ac[i].aifsn = 7;
  1747. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1748. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1749. i = 2;
  1750. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1751. cpu_to_le16((cw_min + 1) / 2 - 1);
  1752. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1753. cpu_to_le16(cw_max);
  1754. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1755. if (is_legacy)
  1756. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1757. cpu_to_le16(6016);
  1758. else
  1759. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1760. cpu_to_le16(3008);
  1761. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1762. i = 3;
  1763. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1764. cpu_to_le16((cw_min + 1) / 4 - 1);
  1765. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1766. cpu_to_le16((cw_max + 1) / 2 - 1);
  1767. priv->qos_data.def_qos_parm.ac[i].aifsn = 2;
  1768. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1769. if (is_legacy)
  1770. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1771. cpu_to_le16(3264);
  1772. else
  1773. priv->qos_data.def_qos_parm.ac[i].edca_txop =
  1774. cpu_to_le16(1504);
  1775. } else {
  1776. for (i = 1; i < 4; i++) {
  1777. priv->qos_data.def_qos_parm.ac[i].cw_min =
  1778. cpu_to_le16(cw_min);
  1779. priv->qos_data.def_qos_parm.ac[i].cw_max =
  1780. cpu_to_le16(cw_max);
  1781. priv->qos_data.def_qos_parm.ac[i].aifsn = aifs;
  1782. priv->qos_data.def_qos_parm.ac[i].edca_txop = 0;
  1783. priv->qos_data.def_qos_parm.ac[i].reserved1 = 0;
  1784. }
  1785. }
  1786. IWL_DEBUG_QOS("set QoS to default \n");
  1787. spin_unlock_irqrestore(&priv->lock, flags);
  1788. }
  1789. static void iwl4965_activate_qos(struct iwl4965_priv *priv, u8 force)
  1790. {
  1791. unsigned long flags;
  1792. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  1793. return;
  1794. if (!priv->qos_data.qos_enable)
  1795. return;
  1796. spin_lock_irqsave(&priv->lock, flags);
  1797. priv->qos_data.def_qos_parm.qos_flags = 0;
  1798. if (priv->qos_data.qos_cap.q_AP.queue_request &&
  1799. !priv->qos_data.qos_cap.q_AP.txop_request)
  1800. priv->qos_data.def_qos_parm.qos_flags |=
  1801. QOS_PARAM_FLG_TXOP_TYPE_MSK;
  1802. if (priv->qos_data.qos_active)
  1803. priv->qos_data.def_qos_parm.qos_flags |=
  1804. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  1805. #ifdef CONFIG_IWL4965_HT
  1806. if (priv->current_ht_config.is_ht)
  1807. priv->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  1808. #endif /* CONFIG_IWL4965_HT */
  1809. spin_unlock_irqrestore(&priv->lock, flags);
  1810. if (force || iwl4965_is_associated(priv)) {
  1811. IWL_DEBUG_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  1812. priv->qos_data.qos_active,
  1813. priv->qos_data.def_qos_parm.qos_flags);
  1814. iwl4965_send_qos_params_command(priv,
  1815. &(priv->qos_data.def_qos_parm));
  1816. }
  1817. }
  1818. #endif /* CONFIG_IWL4965_QOS */
  1819. /*
  1820. * Power management (not Tx power!) functions
  1821. */
  1822. #define MSEC_TO_USEC 1024
  1823. #define NOSLP __constant_cpu_to_le16(0), 0, 0
  1824. #define SLP IWL_POWER_DRIVER_ALLOW_SLEEP_MSK, 0, 0
  1825. #define SLP_TIMEOUT(T) __constant_cpu_to_le32((T) * MSEC_TO_USEC)
  1826. #define SLP_VEC(X0, X1, X2, X3, X4) {__constant_cpu_to_le32(X0), \
  1827. __constant_cpu_to_le32(X1), \
  1828. __constant_cpu_to_le32(X2), \
  1829. __constant_cpu_to_le32(X3), \
  1830. __constant_cpu_to_le32(X4)}
  1831. /* default power management (not Tx power) table values */
  1832. /* for tim 0-10 */
  1833. static struct iwl4965_power_vec_entry range_0[IWL_POWER_AC] = {
  1834. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1835. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500), SLP_VEC(1, 2, 3, 4, 4)}, 0},
  1836. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300), SLP_VEC(2, 4, 6, 7, 7)}, 0},
  1837. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100), SLP_VEC(2, 6, 9, 9, 10)}, 0},
  1838. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 10)}, 1},
  1839. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25), SLP_VEC(4, 7, 10, 10, 10)}, 1}
  1840. };
  1841. /* for tim > 10 */
  1842. static struct iwl4965_power_vec_entry range_1[IWL_POWER_AC] = {
  1843. {{NOSLP, SLP_TIMEOUT(0), SLP_TIMEOUT(0), SLP_VEC(0, 0, 0, 0, 0)}, 0},
  1844. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(500),
  1845. SLP_VEC(1, 2, 3, 4, 0xFF)}, 0},
  1846. {{SLP, SLP_TIMEOUT(200), SLP_TIMEOUT(300),
  1847. SLP_VEC(2, 4, 6, 7, 0xFF)}, 0},
  1848. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(100),
  1849. SLP_VEC(2, 6, 9, 9, 0xFF)}, 0},
  1850. {{SLP, SLP_TIMEOUT(50), SLP_TIMEOUT(25), SLP_VEC(2, 7, 9, 9, 0xFF)}, 0},
  1851. {{SLP, SLP_TIMEOUT(25), SLP_TIMEOUT(25),
  1852. SLP_VEC(4, 7, 10, 10, 0xFF)}, 0}
  1853. };
  1854. int iwl4965_power_init_handle(struct iwl4965_priv *priv)
  1855. {
  1856. int rc = 0, i;
  1857. struct iwl4965_power_mgr *pow_data;
  1858. int size = sizeof(struct iwl4965_power_vec_entry) * IWL_POWER_AC;
  1859. u16 pci_pm;
  1860. IWL_DEBUG_POWER("Initialize power \n");
  1861. pow_data = &(priv->power_data);
  1862. memset(pow_data, 0, sizeof(*pow_data));
  1863. pow_data->active_index = IWL_POWER_RANGE_0;
  1864. pow_data->dtim_val = 0xffff;
  1865. memcpy(&pow_data->pwr_range_0[0], &range_0[0], size);
  1866. memcpy(&pow_data->pwr_range_1[0], &range_1[0], size);
  1867. rc = pci_read_config_word(priv->pci_dev, PCI_LINK_CTRL, &pci_pm);
  1868. if (rc != 0)
  1869. return 0;
  1870. else {
  1871. struct iwl4965_powertable_cmd *cmd;
  1872. IWL_DEBUG_POWER("adjust power command flags\n");
  1873. for (i = 0; i < IWL_POWER_AC; i++) {
  1874. cmd = &pow_data->pwr_range_0[i].cmd;
  1875. if (pci_pm & 0x1)
  1876. cmd->flags &= ~IWL_POWER_PCI_PM_MSK;
  1877. else
  1878. cmd->flags |= IWL_POWER_PCI_PM_MSK;
  1879. }
  1880. }
  1881. return rc;
  1882. }
  1883. static int iwl4965_update_power_cmd(struct iwl4965_priv *priv,
  1884. struct iwl4965_powertable_cmd *cmd, u32 mode)
  1885. {
  1886. int rc = 0, i;
  1887. u8 skip;
  1888. u32 max_sleep = 0;
  1889. struct iwl4965_power_vec_entry *range;
  1890. u8 period = 0;
  1891. struct iwl4965_power_mgr *pow_data;
  1892. if (mode > IWL_POWER_INDEX_5) {
  1893. IWL_DEBUG_POWER("Error invalid power mode \n");
  1894. return -1;
  1895. }
  1896. pow_data = &(priv->power_data);
  1897. if (pow_data->active_index == IWL_POWER_RANGE_0)
  1898. range = &pow_data->pwr_range_0[0];
  1899. else
  1900. range = &pow_data->pwr_range_1[1];
  1901. memcpy(cmd, &range[mode].cmd, sizeof(struct iwl4965_powertable_cmd));
  1902. #ifdef IWL_MAC80211_DISABLE
  1903. if (priv->assoc_network != NULL) {
  1904. unsigned long flags;
  1905. period = priv->assoc_network->tim.tim_period;
  1906. }
  1907. #endif /*IWL_MAC80211_DISABLE */
  1908. skip = range[mode].no_dtim;
  1909. if (period == 0) {
  1910. period = 1;
  1911. skip = 0;
  1912. }
  1913. if (skip == 0) {
  1914. max_sleep = period;
  1915. cmd->flags &= ~IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1916. } else {
  1917. __le32 slp_itrvl = cmd->sleep_interval[IWL_POWER_VEC_SIZE - 1];
  1918. max_sleep = (le32_to_cpu(slp_itrvl) / period) * period;
  1919. cmd->flags |= IWL_POWER_SLEEP_OVER_DTIM_MSK;
  1920. }
  1921. for (i = 0; i < IWL_POWER_VEC_SIZE; i++) {
  1922. if (le32_to_cpu(cmd->sleep_interval[i]) > max_sleep)
  1923. cmd->sleep_interval[i] = cpu_to_le32(max_sleep);
  1924. }
  1925. IWL_DEBUG_POWER("Flags value = 0x%08X\n", cmd->flags);
  1926. IWL_DEBUG_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  1927. IWL_DEBUG_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  1928. IWL_DEBUG_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  1929. le32_to_cpu(cmd->sleep_interval[0]),
  1930. le32_to_cpu(cmd->sleep_interval[1]),
  1931. le32_to_cpu(cmd->sleep_interval[2]),
  1932. le32_to_cpu(cmd->sleep_interval[3]),
  1933. le32_to_cpu(cmd->sleep_interval[4]));
  1934. return rc;
  1935. }
  1936. static int iwl4965_send_power_mode(struct iwl4965_priv *priv, u32 mode)
  1937. {
  1938. u32 uninitialized_var(final_mode);
  1939. int rc;
  1940. struct iwl4965_powertable_cmd cmd;
  1941. /* If on battery, set to 3,
  1942. * if plugged into AC power, set to CAM ("continuously aware mode"),
  1943. * else user level */
  1944. switch (mode) {
  1945. case IWL_POWER_BATTERY:
  1946. final_mode = IWL_POWER_INDEX_3;
  1947. break;
  1948. case IWL_POWER_AC:
  1949. final_mode = IWL_POWER_MODE_CAM;
  1950. break;
  1951. default:
  1952. final_mode = mode;
  1953. break;
  1954. }
  1955. cmd.keep_alive_beacons = 0;
  1956. iwl4965_update_power_cmd(priv, &cmd, final_mode);
  1957. rc = iwl4965_send_cmd_pdu(priv, POWER_TABLE_CMD, sizeof(cmd), &cmd);
  1958. if (final_mode == IWL_POWER_MODE_CAM)
  1959. clear_bit(STATUS_POWER_PMI, &priv->status);
  1960. else
  1961. set_bit(STATUS_POWER_PMI, &priv->status);
  1962. return rc;
  1963. }
  1964. int iwl4965_is_network_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  1965. {
  1966. /* Filter incoming packets to determine if they are targeted toward
  1967. * this network, discarding packets coming from ourselves */
  1968. switch (priv->iw_mode) {
  1969. case IEEE80211_IF_TYPE_IBSS: /* Header: Dest. | Source | BSSID */
  1970. /* packets from our adapter are dropped (echo) */
  1971. if (!compare_ether_addr(header->addr2, priv->mac_addr))
  1972. return 0;
  1973. /* {broad,multi}cast packets to our IBSS go through */
  1974. if (is_multicast_ether_addr(header->addr1))
  1975. return !compare_ether_addr(header->addr3, priv->bssid);
  1976. /* packets to our adapter go through */
  1977. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1978. case IEEE80211_IF_TYPE_STA: /* Header: Dest. | AP{BSSID} | Source */
  1979. /* packets from our adapter are dropped (echo) */
  1980. if (!compare_ether_addr(header->addr3, priv->mac_addr))
  1981. return 0;
  1982. /* {broad,multi}cast packets to our BSS go through */
  1983. if (is_multicast_ether_addr(header->addr1))
  1984. return !compare_ether_addr(header->addr2, priv->bssid);
  1985. /* packets to our adapter go through */
  1986. return !compare_ether_addr(header->addr1, priv->mac_addr);
  1987. }
  1988. return 1;
  1989. }
  1990. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  1991. static const char *iwl4965_get_tx_fail_reason(u32 status)
  1992. {
  1993. switch (status & TX_STATUS_MSK) {
  1994. case TX_STATUS_SUCCESS:
  1995. return "SUCCESS";
  1996. TX_STATUS_ENTRY(SHORT_LIMIT);
  1997. TX_STATUS_ENTRY(LONG_LIMIT);
  1998. TX_STATUS_ENTRY(FIFO_UNDERRUN);
  1999. TX_STATUS_ENTRY(MGMNT_ABORT);
  2000. TX_STATUS_ENTRY(NEXT_FRAG);
  2001. TX_STATUS_ENTRY(LIFE_EXPIRE);
  2002. TX_STATUS_ENTRY(DEST_PS);
  2003. TX_STATUS_ENTRY(ABORTED);
  2004. TX_STATUS_ENTRY(BT_RETRY);
  2005. TX_STATUS_ENTRY(STA_INVALID);
  2006. TX_STATUS_ENTRY(FRAG_DROPPED);
  2007. TX_STATUS_ENTRY(TID_DISABLE);
  2008. TX_STATUS_ENTRY(FRAME_FLUSHED);
  2009. TX_STATUS_ENTRY(INSUFFICIENT_CF_POLL);
  2010. TX_STATUS_ENTRY(TX_LOCKED);
  2011. TX_STATUS_ENTRY(NO_BEACON_ON_RADAR);
  2012. }
  2013. return "UNKNOWN";
  2014. }
  2015. /**
  2016. * iwl4965_scan_cancel - Cancel any currently executing HW scan
  2017. *
  2018. * NOTE: priv->mutex is not required before calling this function
  2019. */
  2020. static int iwl4965_scan_cancel(struct iwl4965_priv *priv)
  2021. {
  2022. if (!test_bit(STATUS_SCAN_HW, &priv->status)) {
  2023. clear_bit(STATUS_SCANNING, &priv->status);
  2024. return 0;
  2025. }
  2026. if (test_bit(STATUS_SCANNING, &priv->status)) {
  2027. if (!test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2028. IWL_DEBUG_SCAN("Queuing scan abort.\n");
  2029. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  2030. queue_work(priv->workqueue, &priv->abort_scan);
  2031. } else
  2032. IWL_DEBUG_SCAN("Scan abort already in progress.\n");
  2033. return test_bit(STATUS_SCANNING, &priv->status);
  2034. }
  2035. return 0;
  2036. }
  2037. /**
  2038. * iwl4965_scan_cancel_timeout - Cancel any currently executing HW scan
  2039. * @ms: amount of time to wait (in milliseconds) for scan to abort
  2040. *
  2041. * NOTE: priv->mutex must be held before calling this function
  2042. */
  2043. static int iwl4965_scan_cancel_timeout(struct iwl4965_priv *priv, unsigned long ms)
  2044. {
  2045. unsigned long now = jiffies;
  2046. int ret;
  2047. ret = iwl4965_scan_cancel(priv);
  2048. if (ret && ms) {
  2049. mutex_unlock(&priv->mutex);
  2050. while (!time_after(jiffies, now + msecs_to_jiffies(ms)) &&
  2051. test_bit(STATUS_SCANNING, &priv->status))
  2052. msleep(1);
  2053. mutex_lock(&priv->mutex);
  2054. return test_bit(STATUS_SCANNING, &priv->status);
  2055. }
  2056. return ret;
  2057. }
  2058. static void iwl4965_sequence_reset(struct iwl4965_priv *priv)
  2059. {
  2060. /* Reset ieee stats */
  2061. /* We don't reset the net_device_stats (ieee->stats) on
  2062. * re-association */
  2063. priv->last_seq_num = -1;
  2064. priv->last_frag_num = -1;
  2065. priv->last_packet_time = 0;
  2066. iwl4965_scan_cancel(priv);
  2067. }
  2068. #define MAX_UCODE_BEACON_INTERVAL 4096
  2069. #define INTEL_CONN_LISTEN_INTERVAL __constant_cpu_to_le16(0xA)
  2070. static __le16 iwl4965_adjust_beacon_interval(u16 beacon_val)
  2071. {
  2072. u16 new_val = 0;
  2073. u16 beacon_factor = 0;
  2074. beacon_factor =
  2075. (beacon_val + MAX_UCODE_BEACON_INTERVAL)
  2076. / MAX_UCODE_BEACON_INTERVAL;
  2077. new_val = beacon_val / beacon_factor;
  2078. return cpu_to_le16(new_val);
  2079. }
  2080. static void iwl4965_setup_rxon_timing(struct iwl4965_priv *priv)
  2081. {
  2082. u64 interval_tm_unit;
  2083. u64 tsf, result;
  2084. unsigned long flags;
  2085. struct ieee80211_conf *conf = NULL;
  2086. u16 beacon_int = 0;
  2087. conf = ieee80211_get_hw_conf(priv->hw);
  2088. spin_lock_irqsave(&priv->lock, flags);
  2089. priv->rxon_timing.timestamp.dw[1] = cpu_to_le32(priv->timestamp1);
  2090. priv->rxon_timing.timestamp.dw[0] = cpu_to_le32(priv->timestamp0);
  2091. priv->rxon_timing.listen_interval = INTEL_CONN_LISTEN_INTERVAL;
  2092. tsf = priv->timestamp1;
  2093. tsf = ((tsf << 32) | priv->timestamp0);
  2094. beacon_int = priv->beacon_int;
  2095. spin_unlock_irqrestore(&priv->lock, flags);
  2096. if (priv->iw_mode == IEEE80211_IF_TYPE_STA) {
  2097. if (beacon_int == 0) {
  2098. priv->rxon_timing.beacon_interval = cpu_to_le16(100);
  2099. priv->rxon_timing.beacon_init_val = cpu_to_le32(102400);
  2100. } else {
  2101. priv->rxon_timing.beacon_interval =
  2102. cpu_to_le16(beacon_int);
  2103. priv->rxon_timing.beacon_interval =
  2104. iwl4965_adjust_beacon_interval(
  2105. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2106. }
  2107. priv->rxon_timing.atim_window = 0;
  2108. } else {
  2109. priv->rxon_timing.beacon_interval =
  2110. iwl4965_adjust_beacon_interval(conf->beacon_int);
  2111. /* TODO: we need to get atim_window from upper stack
  2112. * for now we set to 0 */
  2113. priv->rxon_timing.atim_window = 0;
  2114. }
  2115. interval_tm_unit =
  2116. (le16_to_cpu(priv->rxon_timing.beacon_interval) * 1024);
  2117. result = do_div(tsf, interval_tm_unit);
  2118. priv->rxon_timing.beacon_init_val =
  2119. cpu_to_le32((u32) ((u64) interval_tm_unit - result));
  2120. IWL_DEBUG_ASSOC
  2121. ("beacon interval %d beacon timer %d beacon tim %d\n",
  2122. le16_to_cpu(priv->rxon_timing.beacon_interval),
  2123. le32_to_cpu(priv->rxon_timing.beacon_init_val),
  2124. le16_to_cpu(priv->rxon_timing.atim_window));
  2125. }
  2126. static int iwl4965_scan_initiate(struct iwl4965_priv *priv)
  2127. {
  2128. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  2129. IWL_ERROR("APs don't scan.\n");
  2130. return 0;
  2131. }
  2132. if (!iwl4965_is_ready_rf(priv)) {
  2133. IWL_DEBUG_SCAN("Aborting scan due to not ready.\n");
  2134. return -EIO;
  2135. }
  2136. if (test_bit(STATUS_SCANNING, &priv->status)) {
  2137. IWL_DEBUG_SCAN("Scan already in progress.\n");
  2138. return -EAGAIN;
  2139. }
  2140. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  2141. IWL_DEBUG_SCAN("Scan request while abort pending. "
  2142. "Queuing.\n");
  2143. return -EAGAIN;
  2144. }
  2145. IWL_DEBUG_INFO("Starting scan...\n");
  2146. priv->scan_bands = 2;
  2147. set_bit(STATUS_SCANNING, &priv->status);
  2148. priv->scan_start = jiffies;
  2149. priv->scan_pass_start = priv->scan_start;
  2150. queue_work(priv->workqueue, &priv->request_scan);
  2151. return 0;
  2152. }
  2153. static int iwl4965_set_rxon_hwcrypto(struct iwl4965_priv *priv, int hw_decrypt)
  2154. {
  2155. struct iwl4965_rxon_cmd *rxon = &priv->staging_rxon;
  2156. if (hw_decrypt)
  2157. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  2158. else
  2159. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  2160. return 0;
  2161. }
  2162. static void iwl4965_set_flags_for_phymode(struct iwl4965_priv *priv,
  2163. enum ieee80211_band band)
  2164. {
  2165. if (band == IEEE80211_BAND_5GHZ) {
  2166. priv->staging_rxon.flags &=
  2167. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK
  2168. | RXON_FLG_CCK_MSK);
  2169. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2170. } else {
  2171. /* Copied from iwl4965_bg_post_associate() */
  2172. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  2173. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  2174. else
  2175. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2176. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  2177. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  2178. priv->staging_rxon.flags |= RXON_FLG_BAND_24G_MSK;
  2179. priv->staging_rxon.flags |= RXON_FLG_AUTO_DETECT_MSK;
  2180. priv->staging_rxon.flags &= ~RXON_FLG_CCK_MSK;
  2181. }
  2182. }
  2183. /*
  2184. * initialize rxon structure with default values from eeprom
  2185. */
  2186. static void iwl4965_connection_init_rx_config(struct iwl4965_priv *priv)
  2187. {
  2188. const struct iwl4965_channel_info *ch_info;
  2189. memset(&priv->staging_rxon, 0, sizeof(priv->staging_rxon));
  2190. switch (priv->iw_mode) {
  2191. case IEEE80211_IF_TYPE_AP:
  2192. priv->staging_rxon.dev_type = RXON_DEV_TYPE_AP;
  2193. break;
  2194. case IEEE80211_IF_TYPE_STA:
  2195. priv->staging_rxon.dev_type = RXON_DEV_TYPE_ESS;
  2196. priv->staging_rxon.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  2197. break;
  2198. case IEEE80211_IF_TYPE_IBSS:
  2199. priv->staging_rxon.dev_type = RXON_DEV_TYPE_IBSS;
  2200. priv->staging_rxon.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  2201. priv->staging_rxon.filter_flags = RXON_FILTER_BCON_AWARE_MSK |
  2202. RXON_FILTER_ACCEPT_GRP_MSK;
  2203. break;
  2204. case IEEE80211_IF_TYPE_MNTR:
  2205. priv->staging_rxon.dev_type = RXON_DEV_TYPE_SNIFFER;
  2206. priv->staging_rxon.filter_flags = RXON_FILTER_PROMISC_MSK |
  2207. RXON_FILTER_CTL2HOST_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  2208. break;
  2209. }
  2210. #if 0
  2211. /* TODO: Figure out when short_preamble would be set and cache from
  2212. * that */
  2213. if (!hw_to_local(priv->hw)->short_preamble)
  2214. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  2215. else
  2216. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  2217. #endif
  2218. ch_info = iwl4965_get_channel_info(priv, priv->band,
  2219. le16_to_cpu(priv->staging_rxon.channel));
  2220. if (!ch_info)
  2221. ch_info = &priv->channel_info[0];
  2222. /*
  2223. * in some case A channels are all non IBSS
  2224. * in this case force B/G channel
  2225. */
  2226. if ((priv->iw_mode == IEEE80211_IF_TYPE_IBSS) &&
  2227. !(is_channel_ibss(ch_info)))
  2228. ch_info = &priv->channel_info[0];
  2229. priv->staging_rxon.channel = cpu_to_le16(ch_info->channel);
  2230. priv->band = ch_info->band;
  2231. iwl4965_set_flags_for_phymode(priv, priv->band);
  2232. priv->staging_rxon.ofdm_basic_rates =
  2233. (IWL_OFDM_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2234. priv->staging_rxon.cck_basic_rates =
  2235. (IWL_CCK_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2236. priv->staging_rxon.flags &= ~(RXON_FLG_CHANNEL_MODE_MIXED_MSK |
  2237. RXON_FLG_CHANNEL_MODE_PURE_40_MSK);
  2238. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2239. memcpy(priv->staging_rxon.wlap_bssid_addr, priv->mac_addr, ETH_ALEN);
  2240. priv->staging_rxon.ofdm_ht_single_stream_basic_rates = 0xff;
  2241. priv->staging_rxon.ofdm_ht_dual_stream_basic_rates = 0xff;
  2242. iwl4965_set_rxon_chain(priv);
  2243. }
  2244. static int iwl4965_set_mode(struct iwl4965_priv *priv, int mode)
  2245. {
  2246. if (mode == IEEE80211_IF_TYPE_IBSS) {
  2247. const struct iwl4965_channel_info *ch_info;
  2248. ch_info = iwl4965_get_channel_info(priv,
  2249. priv->band,
  2250. le16_to_cpu(priv->staging_rxon.channel));
  2251. if (!ch_info || !is_channel_ibss(ch_info)) {
  2252. IWL_ERROR("channel %d not IBSS channel\n",
  2253. le16_to_cpu(priv->staging_rxon.channel));
  2254. return -EINVAL;
  2255. }
  2256. }
  2257. priv->iw_mode = mode;
  2258. iwl4965_connection_init_rx_config(priv);
  2259. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  2260. iwl4965_clear_stations_table(priv);
  2261. /* dont commit rxon if rf-kill is on*/
  2262. if (!iwl4965_is_ready_rf(priv))
  2263. return -EAGAIN;
  2264. cancel_delayed_work(&priv->scan_check);
  2265. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  2266. IWL_WARNING("Aborted scan still in progress after 100ms\n");
  2267. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  2268. return -EAGAIN;
  2269. }
  2270. iwl4965_commit_rxon(priv);
  2271. return 0;
  2272. }
  2273. static void iwl4965_build_tx_cmd_hwcrypto(struct iwl4965_priv *priv,
  2274. struct ieee80211_tx_control *ctl,
  2275. struct iwl4965_cmd *cmd,
  2276. struct sk_buff *skb_frag,
  2277. int last_frag)
  2278. {
  2279. struct iwl4965_hw_key *keyinfo = &priv->stations[ctl->key_idx].keyinfo;
  2280. switch (keyinfo->alg) {
  2281. case ALG_CCMP:
  2282. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_CCM;
  2283. memcpy(cmd->cmd.tx.key, keyinfo->key, keyinfo->keylen);
  2284. IWL_DEBUG_TX("tx_cmd with aes hwcrypto\n");
  2285. break;
  2286. case ALG_TKIP:
  2287. #if 0
  2288. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_TKIP;
  2289. if (last_frag)
  2290. memcpy(cmd->cmd.tx.tkip_mic.byte, skb_frag->tail - 8,
  2291. 8);
  2292. else
  2293. memset(cmd->cmd.tx.tkip_mic.byte, 0, 8);
  2294. #endif
  2295. break;
  2296. case ALG_WEP:
  2297. cmd->cmd.tx.sec_ctl = TX_CMD_SEC_WEP |
  2298. (ctl->key_idx & TX_CMD_SEC_MSK) << TX_CMD_SEC_SHIFT;
  2299. if (keyinfo->keylen == 13)
  2300. cmd->cmd.tx.sec_ctl |= TX_CMD_SEC_KEY128;
  2301. memcpy(&cmd->cmd.tx.key[3], keyinfo->key, keyinfo->keylen);
  2302. IWL_DEBUG_TX("Configuring packet for WEP encryption "
  2303. "with key %d\n", ctl->key_idx);
  2304. break;
  2305. default:
  2306. printk(KERN_ERR "Unknown encode alg %d\n", keyinfo->alg);
  2307. break;
  2308. }
  2309. }
  2310. /*
  2311. * handle build REPLY_TX command notification.
  2312. */
  2313. static void iwl4965_build_tx_cmd_basic(struct iwl4965_priv *priv,
  2314. struct iwl4965_cmd *cmd,
  2315. struct ieee80211_tx_control *ctrl,
  2316. struct ieee80211_hdr *hdr,
  2317. int is_unicast, u8 std_id)
  2318. {
  2319. __le16 *qc;
  2320. u16 fc = le16_to_cpu(hdr->frame_control);
  2321. __le32 tx_flags = cmd->cmd.tx.tx_flags;
  2322. cmd->cmd.tx.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  2323. if (!(ctrl->flags & IEEE80211_TXCTL_NO_ACK)) {
  2324. tx_flags |= TX_CMD_FLG_ACK_MSK;
  2325. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT)
  2326. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2327. if (ieee80211_is_probe_response(fc) &&
  2328. !(le16_to_cpu(hdr->seq_ctrl) & 0xf))
  2329. tx_flags |= TX_CMD_FLG_TSF_MSK;
  2330. } else {
  2331. tx_flags &= (~TX_CMD_FLG_ACK_MSK);
  2332. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2333. }
  2334. if (ieee80211_is_back_request(fc))
  2335. tx_flags |= TX_CMD_FLG_ACK_MSK | TX_CMD_FLG_IMM_BA_RSP_MASK;
  2336. cmd->cmd.tx.sta_id = std_id;
  2337. if (ieee80211_get_morefrag(hdr))
  2338. tx_flags |= TX_CMD_FLG_MORE_FRAG_MSK;
  2339. qc = ieee80211_get_qos_ctrl(hdr);
  2340. if (qc) {
  2341. cmd->cmd.tx.tid_tspec = (u8) (le16_to_cpu(*qc) & 0xf);
  2342. tx_flags &= ~TX_CMD_FLG_SEQ_CTL_MSK;
  2343. } else
  2344. tx_flags |= TX_CMD_FLG_SEQ_CTL_MSK;
  2345. if (ctrl->flags & IEEE80211_TXCTL_USE_RTS_CTS) {
  2346. tx_flags |= TX_CMD_FLG_RTS_MSK;
  2347. tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  2348. } else if (ctrl->flags & IEEE80211_TXCTL_USE_CTS_PROTECT) {
  2349. tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  2350. tx_flags |= TX_CMD_FLG_CTS_MSK;
  2351. }
  2352. if ((tx_flags & TX_CMD_FLG_RTS_MSK) || (tx_flags & TX_CMD_FLG_CTS_MSK))
  2353. tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  2354. tx_flags &= ~(TX_CMD_FLG_ANT_SEL_MSK);
  2355. if ((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_MGMT) {
  2356. if ((fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_ASSOC_REQ ||
  2357. (fc & IEEE80211_FCTL_STYPE) == IEEE80211_STYPE_REASSOC_REQ)
  2358. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(3);
  2359. else
  2360. cmd->cmd.tx.timeout.pm_frame_timeout = cpu_to_le16(2);
  2361. } else
  2362. cmd->cmd.tx.timeout.pm_frame_timeout = 0;
  2363. cmd->cmd.tx.driver_txop = 0;
  2364. cmd->cmd.tx.tx_flags = tx_flags;
  2365. cmd->cmd.tx.next_frame_len = 0;
  2366. }
  2367. /**
  2368. * iwl4965_get_sta_id - Find station's index within station table
  2369. *
  2370. * If new IBSS station, create new entry in station table
  2371. */
  2372. static int iwl4965_get_sta_id(struct iwl4965_priv *priv,
  2373. struct ieee80211_hdr *hdr)
  2374. {
  2375. int sta_id;
  2376. u16 fc = le16_to_cpu(hdr->frame_control);
  2377. DECLARE_MAC_BUF(mac);
  2378. /* If this frame is broadcast or management, use broadcast station id */
  2379. if (((fc & IEEE80211_FCTL_FTYPE) != IEEE80211_FTYPE_DATA) ||
  2380. is_multicast_ether_addr(hdr->addr1))
  2381. return priv->hw_setting.bcast_sta_id;
  2382. switch (priv->iw_mode) {
  2383. /* If we are a client station in a BSS network, use the special
  2384. * AP station entry (that's the only station we communicate with) */
  2385. case IEEE80211_IF_TYPE_STA:
  2386. return IWL_AP_ID;
  2387. /* If we are an AP, then find the station, or use BCAST */
  2388. case IEEE80211_IF_TYPE_AP:
  2389. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2390. if (sta_id != IWL_INVALID_STATION)
  2391. return sta_id;
  2392. return priv->hw_setting.bcast_sta_id;
  2393. /* If this frame is going out to an IBSS network, find the station,
  2394. * or create a new station table entry */
  2395. case IEEE80211_IF_TYPE_IBSS:
  2396. sta_id = iwl4965_hw_find_station(priv, hdr->addr1);
  2397. if (sta_id != IWL_INVALID_STATION)
  2398. return sta_id;
  2399. /* Create new station table entry */
  2400. sta_id = iwl4965_add_station_flags(priv, hdr->addr1,
  2401. 0, CMD_ASYNC, NULL);
  2402. if (sta_id != IWL_INVALID_STATION)
  2403. return sta_id;
  2404. IWL_DEBUG_DROP("Station %s not in station map. "
  2405. "Defaulting to broadcast...\n",
  2406. print_mac(mac, hdr->addr1));
  2407. iwl4965_print_hex_dump(IWL_DL_DROP, (u8 *) hdr, sizeof(*hdr));
  2408. return priv->hw_setting.bcast_sta_id;
  2409. default:
  2410. IWL_WARNING("Unknown mode of operation: %d", priv->iw_mode);
  2411. return priv->hw_setting.bcast_sta_id;
  2412. }
  2413. }
  2414. /*
  2415. * start REPLY_TX command process
  2416. */
  2417. static int iwl4965_tx_skb(struct iwl4965_priv *priv,
  2418. struct sk_buff *skb, struct ieee80211_tx_control *ctl)
  2419. {
  2420. struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
  2421. struct iwl4965_tfd_frame *tfd;
  2422. u32 *control_flags;
  2423. int txq_id = ctl->queue;
  2424. struct iwl4965_tx_queue *txq = NULL;
  2425. struct iwl4965_queue *q = NULL;
  2426. dma_addr_t phys_addr;
  2427. dma_addr_t txcmd_phys;
  2428. dma_addr_t scratch_phys;
  2429. struct iwl4965_cmd *out_cmd = NULL;
  2430. u16 len, idx, len_org;
  2431. u8 id, hdr_len, unicast;
  2432. u8 sta_id;
  2433. u16 seq_number = 0;
  2434. u16 fc;
  2435. __le16 *qc;
  2436. u8 wait_write_ptr = 0;
  2437. unsigned long flags;
  2438. int rc;
  2439. spin_lock_irqsave(&priv->lock, flags);
  2440. if (iwl4965_is_rfkill(priv)) {
  2441. IWL_DEBUG_DROP("Dropping - RF KILL\n");
  2442. goto drop_unlock;
  2443. }
  2444. if (!priv->vif) {
  2445. IWL_DEBUG_DROP("Dropping - !priv->vif\n");
  2446. goto drop_unlock;
  2447. }
  2448. if ((ctl->tx_rate->hw_value & 0xFF) == IWL_INVALID_RATE) {
  2449. IWL_ERROR("ERROR: No TX rate available.\n");
  2450. goto drop_unlock;
  2451. }
  2452. unicast = !is_multicast_ether_addr(hdr->addr1);
  2453. id = 0;
  2454. fc = le16_to_cpu(hdr->frame_control);
  2455. #ifdef CONFIG_IWL4965_DEBUG
  2456. if (ieee80211_is_auth(fc))
  2457. IWL_DEBUG_TX("Sending AUTH frame\n");
  2458. else if (ieee80211_is_assoc_request(fc))
  2459. IWL_DEBUG_TX("Sending ASSOC frame\n");
  2460. else if (ieee80211_is_reassoc_request(fc))
  2461. IWL_DEBUG_TX("Sending REASSOC frame\n");
  2462. #endif
  2463. /* drop all data frame if we are not associated */
  2464. if (((fc & IEEE80211_FCTL_FTYPE) == IEEE80211_FTYPE_DATA) &&
  2465. (!iwl4965_is_associated(priv) ||
  2466. ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && !priv->assoc_id) ||
  2467. !priv->assoc_station_added)) {
  2468. IWL_DEBUG_DROP("Dropping - !iwl4965_is_associated\n");
  2469. goto drop_unlock;
  2470. }
  2471. spin_unlock_irqrestore(&priv->lock, flags);
  2472. hdr_len = ieee80211_get_hdrlen(fc);
  2473. /* Find (or create) index into station table for destination station */
  2474. sta_id = iwl4965_get_sta_id(priv, hdr);
  2475. if (sta_id == IWL_INVALID_STATION) {
  2476. DECLARE_MAC_BUF(mac);
  2477. IWL_DEBUG_DROP("Dropping - INVALID STATION: %s\n",
  2478. print_mac(mac, hdr->addr1));
  2479. goto drop;
  2480. }
  2481. IWL_DEBUG_RATE("station Id %d\n", sta_id);
  2482. qc = ieee80211_get_qos_ctrl(hdr);
  2483. if (qc) {
  2484. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2485. seq_number = priv->stations[sta_id].tid[tid].seq_number &
  2486. IEEE80211_SCTL_SEQ;
  2487. hdr->seq_ctrl = cpu_to_le16(seq_number) |
  2488. (hdr->seq_ctrl &
  2489. __constant_cpu_to_le16(IEEE80211_SCTL_FRAG));
  2490. seq_number += 0x10;
  2491. #ifdef CONFIG_IWL4965_HT
  2492. /* aggregation is on for this <sta,tid> */
  2493. if (ctl->flags & IEEE80211_TXCTL_AMPDU)
  2494. txq_id = priv->stations[sta_id].tid[tid].agg.txq_id;
  2495. priv->stations[sta_id].tid[tid].tfds_in_queue++;
  2496. #endif /* CONFIG_IWL4965_HT */
  2497. }
  2498. /* Descriptor for chosen Tx queue */
  2499. txq = &priv->txq[txq_id];
  2500. q = &txq->q;
  2501. spin_lock_irqsave(&priv->lock, flags);
  2502. /* Set up first empty TFD within this queue's circular TFD buffer */
  2503. tfd = &txq->bd[q->write_ptr];
  2504. memset(tfd, 0, sizeof(*tfd));
  2505. control_flags = (u32 *) tfd;
  2506. idx = get_cmd_index(q, q->write_ptr, 0);
  2507. /* Set up driver data for this TFD */
  2508. memset(&(txq->txb[q->write_ptr]), 0, sizeof(struct iwl4965_tx_info));
  2509. txq->txb[q->write_ptr].skb[0] = skb;
  2510. memcpy(&(txq->txb[q->write_ptr].status.control),
  2511. ctl, sizeof(struct ieee80211_tx_control));
  2512. /* Set up first empty entry in queue's array of Tx/cmd buffers */
  2513. out_cmd = &txq->cmd[idx];
  2514. memset(&out_cmd->hdr, 0, sizeof(out_cmd->hdr));
  2515. memset(&out_cmd->cmd.tx, 0, sizeof(out_cmd->cmd.tx));
  2516. /*
  2517. * Set up the Tx-command (not MAC!) header.
  2518. * Store the chosen Tx queue and TFD index within the sequence field;
  2519. * after Tx, uCode's Tx response will return this value so driver can
  2520. * locate the frame within the tx queue and do post-tx processing.
  2521. */
  2522. out_cmd->hdr.cmd = REPLY_TX;
  2523. out_cmd->hdr.sequence = cpu_to_le16((u16)(QUEUE_TO_SEQ(txq_id) |
  2524. INDEX_TO_SEQ(q->write_ptr)));
  2525. /* Copy MAC header from skb into command buffer */
  2526. memcpy(out_cmd->cmd.tx.hdr, hdr, hdr_len);
  2527. /*
  2528. * Use the first empty entry in this queue's command buffer array
  2529. * to contain the Tx command and MAC header concatenated together
  2530. * (payload data will be in another buffer).
  2531. * Size of this varies, due to varying MAC header length.
  2532. * If end is not dword aligned, we'll have 2 extra bytes at the end
  2533. * of the MAC header (device reads on dword boundaries).
  2534. * We'll tell device about this padding later.
  2535. */
  2536. len = priv->hw_setting.tx_cmd_len +
  2537. sizeof(struct iwl4965_cmd_header) + hdr_len;
  2538. len_org = len;
  2539. len = (len + 3) & ~3;
  2540. if (len_org != len)
  2541. len_org = 1;
  2542. else
  2543. len_org = 0;
  2544. /* Physical address of this Tx command's header (not MAC header!),
  2545. * within command buffer array. */
  2546. txcmd_phys = txq->dma_addr_cmd + sizeof(struct iwl4965_cmd) * idx +
  2547. offsetof(struct iwl4965_cmd, hdr);
  2548. /* Add buffer containing Tx command and MAC(!) header to TFD's
  2549. * first entry */
  2550. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, txcmd_phys, len);
  2551. if (!(ctl->flags & IEEE80211_TXCTL_DO_NOT_ENCRYPT))
  2552. iwl4965_build_tx_cmd_hwcrypto(priv, ctl, out_cmd, skb, 0);
  2553. /* Set up TFD's 2nd entry to point directly to remainder of skb,
  2554. * if any (802.11 null frames have no payload). */
  2555. len = skb->len - hdr_len;
  2556. if (len) {
  2557. phys_addr = pci_map_single(priv->pci_dev, skb->data + hdr_len,
  2558. len, PCI_DMA_TODEVICE);
  2559. iwl4965_hw_txq_attach_buf_to_tfd(priv, tfd, phys_addr, len);
  2560. }
  2561. /* Tell 4965 about any 2-byte padding after MAC header */
  2562. if (len_org)
  2563. out_cmd->cmd.tx.tx_flags |= TX_CMD_FLG_MH_PAD_MSK;
  2564. /* Total # bytes to be transmitted */
  2565. len = (u16)skb->len;
  2566. out_cmd->cmd.tx.len = cpu_to_le16(len);
  2567. /* TODO need this for burst mode later on */
  2568. iwl4965_build_tx_cmd_basic(priv, out_cmd, ctl, hdr, unicast, sta_id);
  2569. /* set is_hcca to 0; it probably will never be implemented */
  2570. iwl4965_hw_build_tx_cmd_rate(priv, out_cmd, ctl, hdr, sta_id, 0);
  2571. scratch_phys = txcmd_phys + sizeof(struct iwl4965_cmd_header) +
  2572. offsetof(struct iwl4965_tx_cmd, scratch);
  2573. out_cmd->cmd.tx.dram_lsb_ptr = cpu_to_le32(scratch_phys);
  2574. out_cmd->cmd.tx.dram_msb_ptr = iwl_get_dma_hi_address(scratch_phys);
  2575. if (!ieee80211_get_morefrag(hdr)) {
  2576. txq->need_update = 1;
  2577. if (qc) {
  2578. u8 tid = (u8)(le16_to_cpu(*qc) & 0xf);
  2579. priv->stations[sta_id].tid[tid].seq_number = seq_number;
  2580. }
  2581. } else {
  2582. wait_write_ptr = 1;
  2583. txq->need_update = 0;
  2584. }
  2585. iwl4965_print_hex_dump(IWL_DL_TX, out_cmd->cmd.payload,
  2586. sizeof(out_cmd->cmd.tx));
  2587. iwl4965_print_hex_dump(IWL_DL_TX, (u8 *)out_cmd->cmd.tx.hdr,
  2588. ieee80211_get_hdrlen(fc));
  2589. /* Set up entry for this TFD in Tx byte-count array */
  2590. iwl4965_tx_queue_update_wr_ptr(priv, txq, len);
  2591. /* Tell device the write index *just past* this latest filled TFD */
  2592. q->write_ptr = iwl4965_queue_inc_wrap(q->write_ptr, q->n_bd);
  2593. rc = iwl4965_tx_queue_update_write_ptr(priv, txq);
  2594. spin_unlock_irqrestore(&priv->lock, flags);
  2595. if (rc)
  2596. return rc;
  2597. if ((iwl4965_queue_space(q) < q->high_mark)
  2598. && priv->mac80211_registered) {
  2599. if (wait_write_ptr) {
  2600. spin_lock_irqsave(&priv->lock, flags);
  2601. txq->need_update = 1;
  2602. iwl4965_tx_queue_update_write_ptr(priv, txq);
  2603. spin_unlock_irqrestore(&priv->lock, flags);
  2604. }
  2605. ieee80211_stop_queue(priv->hw, ctl->queue);
  2606. }
  2607. return 0;
  2608. drop_unlock:
  2609. spin_unlock_irqrestore(&priv->lock, flags);
  2610. drop:
  2611. return -1;
  2612. }
  2613. static void iwl4965_set_rate(struct iwl4965_priv *priv)
  2614. {
  2615. const struct ieee80211_supported_band *hw = NULL;
  2616. struct ieee80211_rate *rate;
  2617. int i;
  2618. hw = iwl4965_get_hw_mode(priv, priv->band);
  2619. if (!hw) {
  2620. IWL_ERROR("Failed to set rate: unable to get hw mode\n");
  2621. return;
  2622. }
  2623. priv->active_rate = 0;
  2624. priv->active_rate_basic = 0;
  2625. for (i = 0; i < hw->n_bitrates; i++) {
  2626. rate = &(hw->bitrates[i]);
  2627. if (rate->hw_value < IWL_RATE_COUNT)
  2628. priv->active_rate |= (1 << rate->hw_value);
  2629. }
  2630. IWL_DEBUG_RATE("Set active_rate = %0x, active_rate_basic = %0x\n",
  2631. priv->active_rate, priv->active_rate_basic);
  2632. /*
  2633. * If a basic rate is configured, then use it (adding IWL_RATE_1M_MASK)
  2634. * otherwise set it to the default of all CCK rates and 6, 12, 24 for
  2635. * OFDM
  2636. */
  2637. if (priv->active_rate_basic & IWL_CCK_BASIC_RATES_MASK)
  2638. priv->staging_rxon.cck_basic_rates =
  2639. ((priv->active_rate_basic &
  2640. IWL_CCK_RATES_MASK) >> IWL_FIRST_CCK_RATE) & 0xF;
  2641. else
  2642. priv->staging_rxon.cck_basic_rates =
  2643. (IWL_CCK_BASIC_RATES_MASK >> IWL_FIRST_CCK_RATE) & 0xF;
  2644. if (priv->active_rate_basic & IWL_OFDM_BASIC_RATES_MASK)
  2645. priv->staging_rxon.ofdm_basic_rates =
  2646. ((priv->active_rate_basic &
  2647. (IWL_OFDM_BASIC_RATES_MASK | IWL_RATE_6M_MASK)) >>
  2648. IWL_FIRST_OFDM_RATE) & 0xFF;
  2649. else
  2650. priv->staging_rxon.ofdm_basic_rates =
  2651. (IWL_OFDM_BASIC_RATES_MASK >> IWL_FIRST_OFDM_RATE) & 0xFF;
  2652. }
  2653. static void iwl4965_radio_kill_sw(struct iwl4965_priv *priv, int disable_radio)
  2654. {
  2655. unsigned long flags;
  2656. if (!!disable_radio == test_bit(STATUS_RF_KILL_SW, &priv->status))
  2657. return;
  2658. IWL_DEBUG_RF_KILL("Manual SW RF KILL set to: RADIO %s\n",
  2659. disable_radio ? "OFF" : "ON");
  2660. if (disable_radio) {
  2661. iwl4965_scan_cancel(priv);
  2662. /* FIXME: This is a workaround for AP */
  2663. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  2664. spin_lock_irqsave(&priv->lock, flags);
  2665. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  2666. CSR_UCODE_SW_BIT_RFKILL);
  2667. spin_unlock_irqrestore(&priv->lock, flags);
  2668. iwl4965_send_card_state(priv, CARD_STATE_CMD_DISABLE, 0);
  2669. set_bit(STATUS_RF_KILL_SW, &priv->status);
  2670. }
  2671. return;
  2672. }
  2673. spin_lock_irqsave(&priv->lock, flags);
  2674. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  2675. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  2676. spin_unlock_irqrestore(&priv->lock, flags);
  2677. /* wake up ucode */
  2678. msleep(10);
  2679. spin_lock_irqsave(&priv->lock, flags);
  2680. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  2681. if (!iwl4965_grab_nic_access(priv))
  2682. iwl4965_release_nic_access(priv);
  2683. spin_unlock_irqrestore(&priv->lock, flags);
  2684. if (test_bit(STATUS_RF_KILL_HW, &priv->status)) {
  2685. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  2686. "disabled by HW switch\n");
  2687. return;
  2688. }
  2689. queue_work(priv->workqueue, &priv->restart);
  2690. return;
  2691. }
  2692. void iwl4965_set_decrypted_flag(struct iwl4965_priv *priv, struct sk_buff *skb,
  2693. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2694. {
  2695. u16 fc =
  2696. le16_to_cpu(((struct ieee80211_hdr *)skb->data)->frame_control);
  2697. if (priv->active_rxon.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2698. return;
  2699. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2700. return;
  2701. IWL_DEBUG_RX("decrypt_res:0x%x\n", decrypt_res);
  2702. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2703. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2704. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2705. RX_RES_STATUS_BAD_ICV_MIC)
  2706. stats->flag |= RX_FLAG_MMIC_ERROR;
  2707. case RX_RES_STATUS_SEC_TYPE_WEP:
  2708. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2709. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2710. RX_RES_STATUS_DECRYPT_OK) {
  2711. IWL_DEBUG_RX("hw decrypt successfully!!!\n");
  2712. stats->flag |= RX_FLAG_DECRYPTED;
  2713. }
  2714. break;
  2715. default:
  2716. break;
  2717. }
  2718. }
  2719. #define IWL_PACKET_RETRY_TIME HZ
  2720. int iwl4965_is_duplicate_packet(struct iwl4965_priv *priv, struct ieee80211_hdr *header)
  2721. {
  2722. u16 sc = le16_to_cpu(header->seq_ctrl);
  2723. u16 seq = (sc & IEEE80211_SCTL_SEQ) >> 4;
  2724. u16 frag = sc & IEEE80211_SCTL_FRAG;
  2725. u16 *last_seq, *last_frag;
  2726. unsigned long *last_time;
  2727. switch (priv->iw_mode) {
  2728. case IEEE80211_IF_TYPE_IBSS:{
  2729. struct list_head *p;
  2730. struct iwl4965_ibss_seq *entry = NULL;
  2731. u8 *mac = header->addr2;
  2732. int index = mac[5] & (IWL_IBSS_MAC_HASH_SIZE - 1);
  2733. __list_for_each(p, &priv->ibss_mac_hash[index]) {
  2734. entry = list_entry(p, struct iwl4965_ibss_seq, list);
  2735. if (!compare_ether_addr(entry->mac, mac))
  2736. break;
  2737. }
  2738. if (p == &priv->ibss_mac_hash[index]) {
  2739. entry = kzalloc(sizeof(*entry), GFP_ATOMIC);
  2740. if (!entry) {
  2741. IWL_ERROR("Cannot malloc new mac entry\n");
  2742. return 0;
  2743. }
  2744. memcpy(entry->mac, mac, ETH_ALEN);
  2745. entry->seq_num = seq;
  2746. entry->frag_num = frag;
  2747. entry->packet_time = jiffies;
  2748. list_add(&entry->list, &priv->ibss_mac_hash[index]);
  2749. return 0;
  2750. }
  2751. last_seq = &entry->seq_num;
  2752. last_frag = &entry->frag_num;
  2753. last_time = &entry->packet_time;
  2754. break;
  2755. }
  2756. case IEEE80211_IF_TYPE_STA:
  2757. last_seq = &priv->last_seq_num;
  2758. last_frag = &priv->last_frag_num;
  2759. last_time = &priv->last_packet_time;
  2760. break;
  2761. default:
  2762. return 0;
  2763. }
  2764. if ((*last_seq == seq) &&
  2765. time_after(*last_time + IWL_PACKET_RETRY_TIME, jiffies)) {
  2766. if (*last_frag == frag)
  2767. goto drop;
  2768. if (*last_frag + 1 != frag)
  2769. /* out-of-order fragment */
  2770. goto drop;
  2771. } else
  2772. *last_seq = seq;
  2773. *last_frag = frag;
  2774. *last_time = jiffies;
  2775. return 0;
  2776. drop:
  2777. return 1;
  2778. }
  2779. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  2780. #include "iwl-spectrum.h"
  2781. #define BEACON_TIME_MASK_LOW 0x00FFFFFF
  2782. #define BEACON_TIME_MASK_HIGH 0xFF000000
  2783. #define TIME_UNIT 1024
  2784. /*
  2785. * extended beacon time format
  2786. * time in usec will be changed into a 32-bit value in 8:24 format
  2787. * the high 1 byte is the beacon counts
  2788. * the lower 3 bytes is the time in usec within one beacon interval
  2789. */
  2790. static u32 iwl4965_usecs_to_beacons(u32 usec, u32 beacon_interval)
  2791. {
  2792. u32 quot;
  2793. u32 rem;
  2794. u32 interval = beacon_interval * 1024;
  2795. if (!interval || !usec)
  2796. return 0;
  2797. quot = (usec / interval) & (BEACON_TIME_MASK_HIGH >> 24);
  2798. rem = (usec % interval) & BEACON_TIME_MASK_LOW;
  2799. return (quot << 24) + rem;
  2800. }
  2801. /* base is usually what we get from ucode with each received frame,
  2802. * the same as HW timer counter counting down
  2803. */
  2804. static __le32 iwl4965_add_beacon_time(u32 base, u32 addon, u32 beacon_interval)
  2805. {
  2806. u32 base_low = base & BEACON_TIME_MASK_LOW;
  2807. u32 addon_low = addon & BEACON_TIME_MASK_LOW;
  2808. u32 interval = beacon_interval * TIME_UNIT;
  2809. u32 res = (base & BEACON_TIME_MASK_HIGH) +
  2810. (addon & BEACON_TIME_MASK_HIGH);
  2811. if (base_low > addon_low)
  2812. res += base_low - addon_low;
  2813. else if (base_low < addon_low) {
  2814. res += interval + base_low - addon_low;
  2815. res += (1 << 24);
  2816. } else
  2817. res += (1 << 24);
  2818. return cpu_to_le32(res);
  2819. }
  2820. static int iwl4965_get_measurement(struct iwl4965_priv *priv,
  2821. struct ieee80211_measurement_params *params,
  2822. u8 type)
  2823. {
  2824. struct iwl4965_spectrum_cmd spectrum;
  2825. struct iwl4965_rx_packet *res;
  2826. struct iwl4965_host_cmd cmd = {
  2827. .id = REPLY_SPECTRUM_MEASUREMENT_CMD,
  2828. .data = (void *)&spectrum,
  2829. .meta.flags = CMD_WANT_SKB,
  2830. };
  2831. u32 add_time = le64_to_cpu(params->start_time);
  2832. int rc;
  2833. int spectrum_resp_status;
  2834. int duration = le16_to_cpu(params->duration);
  2835. if (iwl4965_is_associated(priv))
  2836. add_time =
  2837. iwl4965_usecs_to_beacons(
  2838. le64_to_cpu(params->start_time) - priv->last_tsf,
  2839. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2840. memset(&spectrum, 0, sizeof(spectrum));
  2841. spectrum.channel_count = cpu_to_le16(1);
  2842. spectrum.flags =
  2843. RXON_FLG_TSF2HOST_MSK | RXON_FLG_ANT_A_MSK | RXON_FLG_DIS_DIV_MSK;
  2844. spectrum.filter_flags = MEASUREMENT_FILTER_FLAG;
  2845. cmd.len = sizeof(spectrum);
  2846. spectrum.len = cpu_to_le16(cmd.len - sizeof(spectrum.len));
  2847. if (iwl4965_is_associated(priv))
  2848. spectrum.start_time =
  2849. iwl4965_add_beacon_time(priv->last_beacon_time,
  2850. add_time,
  2851. le16_to_cpu(priv->rxon_timing.beacon_interval));
  2852. else
  2853. spectrum.start_time = 0;
  2854. spectrum.channels[0].duration = cpu_to_le32(duration * TIME_UNIT);
  2855. spectrum.channels[0].channel = params->channel;
  2856. spectrum.channels[0].type = type;
  2857. if (priv->active_rxon.flags & RXON_FLG_BAND_24G_MSK)
  2858. spectrum.flags |= RXON_FLG_BAND_24G_MSK |
  2859. RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK;
  2860. rc = iwl4965_send_cmd_sync(priv, &cmd);
  2861. if (rc)
  2862. return rc;
  2863. res = (struct iwl4965_rx_packet *)cmd.meta.u.skb->data;
  2864. if (res->hdr.flags & IWL_CMD_FAILED_MSK) {
  2865. IWL_ERROR("Bad return from REPLY_RX_ON_ASSOC command\n");
  2866. rc = -EIO;
  2867. }
  2868. spectrum_resp_status = le16_to_cpu(res->u.spectrum.status);
  2869. switch (spectrum_resp_status) {
  2870. case 0: /* Command will be handled */
  2871. if (res->u.spectrum.id != 0xff) {
  2872. IWL_DEBUG_INFO
  2873. ("Replaced existing measurement: %d\n",
  2874. res->u.spectrum.id);
  2875. priv->measurement_status &= ~MEASUREMENT_READY;
  2876. }
  2877. priv->measurement_status |= MEASUREMENT_ACTIVE;
  2878. rc = 0;
  2879. break;
  2880. case 1: /* Command will not be handled */
  2881. rc = -EAGAIN;
  2882. break;
  2883. }
  2884. dev_kfree_skb_any(cmd.meta.u.skb);
  2885. return rc;
  2886. }
  2887. #endif
  2888. static void iwl4965_txstatus_to_ieee(struct iwl4965_priv *priv,
  2889. struct iwl4965_tx_info *tx_sta)
  2890. {
  2891. tx_sta->status.ack_signal = 0;
  2892. tx_sta->status.excessive_retries = 0;
  2893. tx_sta->status.queue_length = 0;
  2894. tx_sta->status.queue_number = 0;
  2895. if (in_interrupt())
  2896. ieee80211_tx_status_irqsafe(priv->hw,
  2897. tx_sta->skb[0], &(tx_sta->status));
  2898. else
  2899. ieee80211_tx_status(priv->hw,
  2900. tx_sta->skb[0], &(tx_sta->status));
  2901. tx_sta->skb[0] = NULL;
  2902. }
  2903. /**
  2904. * iwl4965_tx_queue_reclaim - Reclaim Tx queue entries already Tx'd
  2905. *
  2906. * When FW advances 'R' index, all entries between old and new 'R' index
  2907. * need to be reclaimed. As result, some free space forms. If there is
  2908. * enough free space (> low mark), wake the stack that feeds us.
  2909. */
  2910. int iwl4965_tx_queue_reclaim(struct iwl4965_priv *priv, int txq_id, int index)
  2911. {
  2912. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  2913. struct iwl4965_queue *q = &txq->q;
  2914. int nfreed = 0;
  2915. if ((index >= q->n_bd) || (x2_queue_used(q, index) == 0)) {
  2916. IWL_ERROR("Read index for DMA queue txq id (%d), index %d, "
  2917. "is out of range [0-%d] %d %d.\n", txq_id,
  2918. index, q->n_bd, q->write_ptr, q->read_ptr);
  2919. return 0;
  2920. }
  2921. for (index = iwl4965_queue_inc_wrap(index, q->n_bd);
  2922. q->read_ptr != index;
  2923. q->read_ptr = iwl4965_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2924. if (txq_id != IWL_CMD_QUEUE_NUM) {
  2925. iwl4965_txstatus_to_ieee(priv,
  2926. &(txq->txb[txq->q.read_ptr]));
  2927. iwl4965_hw_txq_free_tfd(priv, txq);
  2928. } else if (nfreed > 1) {
  2929. IWL_ERROR("HCMD skipped: index (%d) %d %d\n", index,
  2930. q->write_ptr, q->read_ptr);
  2931. queue_work(priv->workqueue, &priv->restart);
  2932. }
  2933. nfreed++;
  2934. }
  2935. /* if (iwl4965_queue_space(q) > q->low_mark && (txq_id >= 0) &&
  2936. (txq_id != IWL_CMD_QUEUE_NUM) &&
  2937. priv->mac80211_registered)
  2938. ieee80211_wake_queue(priv->hw, txq_id); */
  2939. return nfreed;
  2940. }
  2941. static int iwl4965_is_tx_success(u32 status)
  2942. {
  2943. status &= TX_STATUS_MSK;
  2944. return (status == TX_STATUS_SUCCESS)
  2945. || (status == TX_STATUS_DIRECT_DONE);
  2946. }
  2947. /******************************************************************************
  2948. *
  2949. * Generic RX handler implementations
  2950. *
  2951. ******************************************************************************/
  2952. #ifdef CONFIG_IWL4965_HT
  2953. static inline int iwl4965_get_ra_sta_id(struct iwl4965_priv *priv,
  2954. struct ieee80211_hdr *hdr)
  2955. {
  2956. if (priv->iw_mode == IEEE80211_IF_TYPE_STA)
  2957. return IWL_AP_ID;
  2958. else {
  2959. u8 *da = ieee80211_get_DA(hdr);
  2960. return iwl4965_hw_find_station(priv, da);
  2961. }
  2962. }
  2963. static struct ieee80211_hdr *iwl4965_tx_queue_get_hdr(
  2964. struct iwl4965_priv *priv, int txq_id, int idx)
  2965. {
  2966. if (priv->txq[txq_id].txb[idx].skb[0])
  2967. return (struct ieee80211_hdr *)priv->txq[txq_id].
  2968. txb[idx].skb[0]->data;
  2969. return NULL;
  2970. }
  2971. static inline u32 iwl4965_get_scd_ssn(struct iwl4965_tx_resp *tx_resp)
  2972. {
  2973. __le32 *scd_ssn = (__le32 *)((u32 *)&tx_resp->status +
  2974. tx_resp->frame_count);
  2975. return le32_to_cpu(*scd_ssn) & MAX_SN;
  2976. }
  2977. /**
  2978. * iwl4965_tx_status_reply_tx - Handle Tx rspnse for frames in aggregation queue
  2979. */
  2980. static int iwl4965_tx_status_reply_tx(struct iwl4965_priv *priv,
  2981. struct iwl4965_ht_agg *agg,
  2982. struct iwl4965_tx_resp_agg *tx_resp,
  2983. u16 start_idx)
  2984. {
  2985. u16 status;
  2986. struct agg_tx_status *frame_status = &tx_resp->status;
  2987. struct ieee80211_tx_status *tx_status = NULL;
  2988. struct ieee80211_hdr *hdr = NULL;
  2989. int i, sh;
  2990. int txq_id, idx;
  2991. u16 seq;
  2992. if (agg->wait_for_ba)
  2993. IWL_DEBUG_TX_REPLY("got tx response w/o block-ack\n");
  2994. agg->frame_count = tx_resp->frame_count;
  2995. agg->start_idx = start_idx;
  2996. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  2997. agg->bitmap = 0;
  2998. /* # frames attempted by Tx command */
  2999. if (agg->frame_count == 1) {
  3000. /* Only one frame was attempted; no block-ack will arrive */
  3001. status = le16_to_cpu(frame_status[0].status);
  3002. seq = le16_to_cpu(frame_status[0].sequence);
  3003. idx = SEQ_TO_INDEX(seq);
  3004. txq_id = SEQ_TO_QUEUE(seq);
  3005. /* FIXME: code repetition */
  3006. IWL_DEBUG_TX_REPLY("FrameCnt = %d, StartIdx=%d idx=%d\n",
  3007. agg->frame_count, agg->start_idx, idx);
  3008. tx_status = &(priv->txq[txq_id].txb[idx].status);
  3009. tx_status->retry_count = tx_resp->failure_frame;
  3010. tx_status->queue_number = status & 0xff;
  3011. tx_status->queue_length = tx_resp->failure_rts;
  3012. tx_status->control.flags &= ~IEEE80211_TXCTL_AMPDU;
  3013. tx_status->flags = iwl4965_is_tx_success(status)?
  3014. IEEE80211_TX_STATUS_ACK : 0;
  3015. tx_status->control.tx_rate =
  3016. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags);
  3017. /* FIXME: code repetition end */
  3018. IWL_DEBUG_TX_REPLY("1 Frame 0x%x failure :%d\n",
  3019. status & 0xff, tx_resp->failure_frame);
  3020. IWL_DEBUG_TX_REPLY("Rate Info rate_n_flags=%x\n",
  3021. iwl4965_hw_get_rate_n_flags(tx_resp->rate_n_flags));
  3022. agg->wait_for_ba = 0;
  3023. } else {
  3024. /* Two or more frames were attempted; expect block-ack */
  3025. u64 bitmap = 0;
  3026. int start = agg->start_idx;
  3027. /* Construct bit-map of pending frames within Tx window */
  3028. for (i = 0; i < agg->frame_count; i++) {
  3029. u16 sc;
  3030. status = le16_to_cpu(frame_status[i].status);
  3031. seq = le16_to_cpu(frame_status[i].sequence);
  3032. idx = SEQ_TO_INDEX(seq);
  3033. txq_id = SEQ_TO_QUEUE(seq);
  3034. if (status & (AGG_TX_STATE_FEW_BYTES_MSK |
  3035. AGG_TX_STATE_ABORT_MSK))
  3036. continue;
  3037. IWL_DEBUG_TX_REPLY("FrameCnt = %d, txq_id=%d idx=%d\n",
  3038. agg->frame_count, txq_id, idx);
  3039. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, idx);
  3040. sc = le16_to_cpu(hdr->seq_ctrl);
  3041. if (idx != (SEQ_TO_SN(sc) & 0xff)) {
  3042. IWL_ERROR("BUG_ON idx doesn't match seq control"
  3043. " idx=%d, seq_idx=%d, seq=%d\n",
  3044. idx, SEQ_TO_SN(sc),
  3045. hdr->seq_ctrl);
  3046. return -1;
  3047. }
  3048. IWL_DEBUG_TX_REPLY("AGG Frame i=%d idx %d seq=%d\n",
  3049. i, idx, SEQ_TO_SN(sc));
  3050. sh = idx - start;
  3051. if (sh > 64) {
  3052. sh = (start - idx) + 0xff;
  3053. bitmap = bitmap << sh;
  3054. sh = 0;
  3055. start = idx;
  3056. } else if (sh < -64)
  3057. sh = 0xff - (start - idx);
  3058. else if (sh < 0) {
  3059. sh = start - idx;
  3060. start = idx;
  3061. bitmap = bitmap << sh;
  3062. sh = 0;
  3063. }
  3064. bitmap |= (1 << sh);
  3065. IWL_DEBUG_TX_REPLY("start=%d bitmap=0x%x\n",
  3066. start, (u32)(bitmap & 0xFFFFFFFF));
  3067. }
  3068. agg->bitmap = bitmap;
  3069. agg->start_idx = start;
  3070. agg->rate_n_flags = le32_to_cpu(tx_resp->rate_n_flags);
  3071. IWL_DEBUG_TX_REPLY("Frames %d start_idx=%d bitmap=0x%llx\n",
  3072. agg->frame_count, agg->start_idx,
  3073. agg->bitmap);
  3074. if (bitmap)
  3075. agg->wait_for_ba = 1;
  3076. }
  3077. return 0;
  3078. }
  3079. #endif
  3080. /**
  3081. * iwl4965_rx_reply_tx - Handle standard (non-aggregation) Tx response
  3082. */
  3083. static void iwl4965_rx_reply_tx(struct iwl4965_priv *priv,
  3084. struct iwl4965_rx_mem_buffer *rxb)
  3085. {
  3086. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3087. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3088. int txq_id = SEQ_TO_QUEUE(sequence);
  3089. int index = SEQ_TO_INDEX(sequence);
  3090. struct iwl4965_tx_queue *txq = &priv->txq[txq_id];
  3091. struct ieee80211_tx_status *tx_status;
  3092. struct iwl4965_tx_resp *tx_resp = (void *)&pkt->u.raw[0];
  3093. u32 status = le32_to_cpu(tx_resp->status);
  3094. #ifdef CONFIG_IWL4965_HT
  3095. int tid = MAX_TID_COUNT, sta_id = IWL_INVALID_STATION;
  3096. struct ieee80211_hdr *hdr;
  3097. __le16 *qc;
  3098. #endif
  3099. if ((index >= txq->q.n_bd) || (x2_queue_used(&txq->q, index) == 0)) {
  3100. IWL_ERROR("Read index for DMA queue txq_id (%d) index %d "
  3101. "is out of range [0-%d] %d %d\n", txq_id,
  3102. index, txq->q.n_bd, txq->q.write_ptr,
  3103. txq->q.read_ptr);
  3104. return;
  3105. }
  3106. #ifdef CONFIG_IWL4965_HT
  3107. hdr = iwl4965_tx_queue_get_hdr(priv, txq_id, index);
  3108. qc = ieee80211_get_qos_ctrl(hdr);
  3109. if (qc)
  3110. tid = le16_to_cpu(*qc) & 0xf;
  3111. sta_id = iwl4965_get_ra_sta_id(priv, hdr);
  3112. if (txq->sched_retry && unlikely(sta_id == IWL_INVALID_STATION)) {
  3113. IWL_ERROR("Station not known\n");
  3114. return;
  3115. }
  3116. if (txq->sched_retry) {
  3117. const u32 scd_ssn = iwl4965_get_scd_ssn(tx_resp);
  3118. struct iwl4965_ht_agg *agg = NULL;
  3119. if (!qc)
  3120. return;
  3121. agg = &priv->stations[sta_id].tid[tid].agg;
  3122. iwl4965_tx_status_reply_tx(priv, agg,
  3123. (struct iwl4965_tx_resp_agg *)tx_resp, index);
  3124. if ((tx_resp->frame_count == 1) &&
  3125. !iwl4965_is_tx_success(status)) {
  3126. /* TODO: send BAR */
  3127. }
  3128. if (txq->q.read_ptr != (scd_ssn & 0xff)) {
  3129. int freed;
  3130. index = iwl4965_queue_dec_wrap(scd_ssn & 0xff, txq->q.n_bd);
  3131. IWL_DEBUG_TX_REPLY("Retry scheduler reclaim scd_ssn "
  3132. "%d index %d\n", scd_ssn , index);
  3133. freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3134. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  3135. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  3136. txq_id >= 0 && priv->mac80211_registered &&
  3137. agg->state != IWL_EMPTYING_HW_QUEUE_DELBA)
  3138. ieee80211_wake_queue(priv->hw, txq_id);
  3139. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  3140. }
  3141. } else {
  3142. #endif /* CONFIG_IWL4965_HT */
  3143. tx_status = &(txq->txb[txq->q.read_ptr].status);
  3144. tx_status->retry_count = tx_resp->failure_frame;
  3145. tx_status->queue_number = status;
  3146. tx_status->queue_length = tx_resp->bt_kill_count;
  3147. tx_status->queue_length |= tx_resp->failure_rts;
  3148. tx_status->flags =
  3149. iwl4965_is_tx_success(status) ? IEEE80211_TX_STATUS_ACK : 0;
  3150. IWL_DEBUG_TX("Tx queue %d Status %s (0x%08x) rate_n_flags 0x%x "
  3151. "retries %d\n", txq_id, iwl4965_get_tx_fail_reason(status),
  3152. status, le32_to_cpu(tx_resp->rate_n_flags),
  3153. tx_resp->failure_frame);
  3154. IWL_DEBUG_TX_REPLY("Tx queue reclaim %d\n", index);
  3155. if (index != -1) {
  3156. int freed = iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3157. #ifdef CONFIG_IWL4965_HT
  3158. if (tid != MAX_TID_COUNT)
  3159. priv->stations[sta_id].tid[tid].tfds_in_queue -= freed;
  3160. if (iwl4965_queue_space(&txq->q) > txq->q.low_mark &&
  3161. (txq_id >= 0) &&
  3162. priv->mac80211_registered)
  3163. ieee80211_wake_queue(priv->hw, txq_id);
  3164. if (tid != MAX_TID_COUNT)
  3165. iwl4965_check_empty_hw_queue(priv, sta_id, tid, txq_id);
  3166. #endif
  3167. }
  3168. #ifdef CONFIG_IWL4965_HT
  3169. }
  3170. #endif /* CONFIG_IWL4965_HT */
  3171. if (iwl_check_bits(status, TX_ABORT_REQUIRED_MSK))
  3172. IWL_ERROR("TODO: Implement Tx ABORT REQUIRED!!!\n");
  3173. }
  3174. static void iwl4965_rx_reply_alive(struct iwl4965_priv *priv,
  3175. struct iwl4965_rx_mem_buffer *rxb)
  3176. {
  3177. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3178. struct iwl4965_alive_resp *palive;
  3179. struct delayed_work *pwork;
  3180. palive = &pkt->u.alive_frame;
  3181. IWL_DEBUG_INFO("Alive ucode status 0x%08X revision "
  3182. "0x%01X 0x%01X\n",
  3183. palive->is_valid, palive->ver_type,
  3184. palive->ver_subtype);
  3185. if (palive->ver_subtype == INITIALIZE_SUBTYPE) {
  3186. IWL_DEBUG_INFO("Initialization Alive received.\n");
  3187. memcpy(&priv->card_alive_init,
  3188. &pkt->u.alive_frame,
  3189. sizeof(struct iwl4965_init_alive_resp));
  3190. pwork = &priv->init_alive_start;
  3191. } else {
  3192. IWL_DEBUG_INFO("Runtime Alive received.\n");
  3193. memcpy(&priv->card_alive, &pkt->u.alive_frame,
  3194. sizeof(struct iwl4965_alive_resp));
  3195. pwork = &priv->alive_start;
  3196. }
  3197. /* We delay the ALIVE response by 5ms to
  3198. * give the HW RF Kill time to activate... */
  3199. if (palive->is_valid == UCODE_VALID_OK)
  3200. queue_delayed_work(priv->workqueue, pwork,
  3201. msecs_to_jiffies(5));
  3202. else
  3203. IWL_WARNING("uCode did not respond OK.\n");
  3204. }
  3205. static void iwl4965_rx_reply_add_sta(struct iwl4965_priv *priv,
  3206. struct iwl4965_rx_mem_buffer *rxb)
  3207. {
  3208. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3209. IWL_DEBUG_RX("Received REPLY_ADD_STA: 0x%02X\n", pkt->u.status);
  3210. return;
  3211. }
  3212. static void iwl4965_rx_reply_error(struct iwl4965_priv *priv,
  3213. struct iwl4965_rx_mem_buffer *rxb)
  3214. {
  3215. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3216. IWL_ERROR("Error Reply type 0x%08X cmd %s (0x%02X) "
  3217. "seq 0x%04X ser 0x%08X\n",
  3218. le32_to_cpu(pkt->u.err_resp.error_type),
  3219. get_cmd_string(pkt->u.err_resp.cmd_id),
  3220. pkt->u.err_resp.cmd_id,
  3221. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  3222. le32_to_cpu(pkt->u.err_resp.error_info));
  3223. }
  3224. #define TX_STATUS_ENTRY(x) case TX_STATUS_FAIL_ ## x: return #x
  3225. static void iwl4965_rx_csa(struct iwl4965_priv *priv, struct iwl4965_rx_mem_buffer *rxb)
  3226. {
  3227. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3228. struct iwl4965_rxon_cmd *rxon = (void *)&priv->active_rxon;
  3229. struct iwl4965_csa_notification *csa = &(pkt->u.csa_notif);
  3230. IWL_DEBUG_11H("CSA notif: channel %d, status %d\n",
  3231. le16_to_cpu(csa->channel), le32_to_cpu(csa->status));
  3232. rxon->channel = csa->channel;
  3233. priv->staging_rxon.channel = csa->channel;
  3234. }
  3235. static void iwl4965_rx_spectrum_measure_notif(struct iwl4965_priv *priv,
  3236. struct iwl4965_rx_mem_buffer *rxb)
  3237. {
  3238. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  3239. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3240. struct iwl4965_spectrum_notification *report = &(pkt->u.spectrum_notif);
  3241. if (!report->state) {
  3242. IWL_DEBUG(IWL_DL_11H | IWL_DL_INFO,
  3243. "Spectrum Measure Notification: Start\n");
  3244. return;
  3245. }
  3246. memcpy(&priv->measure_report, report, sizeof(*report));
  3247. priv->measurement_status |= MEASUREMENT_READY;
  3248. #endif
  3249. }
  3250. static void iwl4965_rx_pm_sleep_notif(struct iwl4965_priv *priv,
  3251. struct iwl4965_rx_mem_buffer *rxb)
  3252. {
  3253. #ifdef CONFIG_IWL4965_DEBUG
  3254. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3255. struct iwl4965_sleep_notification *sleep = &(pkt->u.sleep_notif);
  3256. IWL_DEBUG_RX("sleep mode: %d, src: %d\n",
  3257. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  3258. #endif
  3259. }
  3260. static void iwl4965_rx_pm_debug_statistics_notif(struct iwl4965_priv *priv,
  3261. struct iwl4965_rx_mem_buffer *rxb)
  3262. {
  3263. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3264. IWL_DEBUG_RADIO("Dumping %d bytes of unhandled "
  3265. "notification for %s:\n",
  3266. le32_to_cpu(pkt->len), get_cmd_string(pkt->hdr.cmd));
  3267. iwl4965_print_hex_dump(IWL_DL_RADIO, pkt->u.raw, le32_to_cpu(pkt->len));
  3268. }
  3269. static void iwl4965_bg_beacon_update(struct work_struct *work)
  3270. {
  3271. struct iwl4965_priv *priv =
  3272. container_of(work, struct iwl4965_priv, beacon_update);
  3273. struct sk_buff *beacon;
  3274. /* Pull updated AP beacon from mac80211. will fail if not in AP mode */
  3275. beacon = ieee80211_beacon_get(priv->hw, priv->vif, NULL);
  3276. if (!beacon) {
  3277. IWL_ERROR("update beacon failed\n");
  3278. return;
  3279. }
  3280. mutex_lock(&priv->mutex);
  3281. /* new beacon skb is allocated every time; dispose previous.*/
  3282. if (priv->ibss_beacon)
  3283. dev_kfree_skb(priv->ibss_beacon);
  3284. priv->ibss_beacon = beacon;
  3285. mutex_unlock(&priv->mutex);
  3286. iwl4965_send_beacon_cmd(priv);
  3287. }
  3288. static void iwl4965_rx_beacon_notif(struct iwl4965_priv *priv,
  3289. struct iwl4965_rx_mem_buffer *rxb)
  3290. {
  3291. #ifdef CONFIG_IWL4965_DEBUG
  3292. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3293. struct iwl4965_beacon_notif *beacon = &(pkt->u.beacon_status);
  3294. u8 rate = iwl4965_hw_get_rate(beacon->beacon_notify_hdr.rate_n_flags);
  3295. IWL_DEBUG_RX("beacon status %x retries %d iss %d "
  3296. "tsf %d %d rate %d\n",
  3297. le32_to_cpu(beacon->beacon_notify_hdr.status) & TX_STATUS_MSK,
  3298. beacon->beacon_notify_hdr.failure_frame,
  3299. le32_to_cpu(beacon->ibss_mgr_status),
  3300. le32_to_cpu(beacon->high_tsf),
  3301. le32_to_cpu(beacon->low_tsf), rate);
  3302. #endif
  3303. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  3304. (!test_bit(STATUS_EXIT_PENDING, &priv->status)))
  3305. queue_work(priv->workqueue, &priv->beacon_update);
  3306. }
  3307. /* Service response to REPLY_SCAN_CMD (0x80) */
  3308. static void iwl4965_rx_reply_scan(struct iwl4965_priv *priv,
  3309. struct iwl4965_rx_mem_buffer *rxb)
  3310. {
  3311. #ifdef CONFIG_IWL4965_DEBUG
  3312. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3313. struct iwl4965_scanreq_notification *notif =
  3314. (struct iwl4965_scanreq_notification *)pkt->u.raw;
  3315. IWL_DEBUG_RX("Scan request status = 0x%x\n", notif->status);
  3316. #endif
  3317. }
  3318. /* Service SCAN_START_NOTIFICATION (0x82) */
  3319. static void iwl4965_rx_scan_start_notif(struct iwl4965_priv *priv,
  3320. struct iwl4965_rx_mem_buffer *rxb)
  3321. {
  3322. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3323. struct iwl4965_scanstart_notification *notif =
  3324. (struct iwl4965_scanstart_notification *)pkt->u.raw;
  3325. priv->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  3326. IWL_DEBUG_SCAN("Scan start: "
  3327. "%d [802.11%s] "
  3328. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n",
  3329. notif->channel,
  3330. notif->band ? "bg" : "a",
  3331. notif->tsf_high,
  3332. notif->tsf_low, notif->status, notif->beacon_timer);
  3333. }
  3334. /* Service SCAN_RESULTS_NOTIFICATION (0x83) */
  3335. static void iwl4965_rx_scan_results_notif(struct iwl4965_priv *priv,
  3336. struct iwl4965_rx_mem_buffer *rxb)
  3337. {
  3338. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3339. struct iwl4965_scanresults_notification *notif =
  3340. (struct iwl4965_scanresults_notification *)pkt->u.raw;
  3341. IWL_DEBUG_SCAN("Scan ch.res: "
  3342. "%d [802.11%s] "
  3343. "(TSF: 0x%08X:%08X) - %d "
  3344. "elapsed=%lu usec (%dms since last)\n",
  3345. notif->channel,
  3346. notif->band ? "bg" : "a",
  3347. le32_to_cpu(notif->tsf_high),
  3348. le32_to_cpu(notif->tsf_low),
  3349. le32_to_cpu(notif->statistics[0]),
  3350. le32_to_cpu(notif->tsf_low) - priv->scan_start_tsf,
  3351. jiffies_to_msecs(elapsed_jiffies
  3352. (priv->last_scan_jiffies, jiffies)));
  3353. priv->last_scan_jiffies = jiffies;
  3354. priv->next_scan_jiffies = 0;
  3355. }
  3356. /* Service SCAN_COMPLETE_NOTIFICATION (0x84) */
  3357. static void iwl4965_rx_scan_complete_notif(struct iwl4965_priv *priv,
  3358. struct iwl4965_rx_mem_buffer *rxb)
  3359. {
  3360. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3361. struct iwl4965_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  3362. IWL_DEBUG_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  3363. scan_notif->scanned_channels,
  3364. scan_notif->tsf_low,
  3365. scan_notif->tsf_high, scan_notif->status);
  3366. /* The HW is no longer scanning */
  3367. clear_bit(STATUS_SCAN_HW, &priv->status);
  3368. /* The scan completion notification came in, so kill that timer... */
  3369. cancel_delayed_work(&priv->scan_check);
  3370. IWL_DEBUG_INFO("Scan pass on %sGHz took %dms\n",
  3371. (priv->scan_bands == 2) ? "2.4" : "5.2",
  3372. jiffies_to_msecs(elapsed_jiffies
  3373. (priv->scan_pass_start, jiffies)));
  3374. /* Remove this scanned band from the list
  3375. * of pending bands to scan */
  3376. priv->scan_bands--;
  3377. /* If a request to abort was given, or the scan did not succeed
  3378. * then we reset the scan state machine and terminate,
  3379. * re-queuing another scan if one has been requested */
  3380. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  3381. IWL_DEBUG_INFO("Aborted scan completed.\n");
  3382. clear_bit(STATUS_SCAN_ABORTING, &priv->status);
  3383. } else {
  3384. /* If there are more bands on this scan pass reschedule */
  3385. if (priv->scan_bands > 0)
  3386. goto reschedule;
  3387. }
  3388. priv->last_scan_jiffies = jiffies;
  3389. priv->next_scan_jiffies = 0;
  3390. IWL_DEBUG_INFO("Setting scan to off\n");
  3391. clear_bit(STATUS_SCANNING, &priv->status);
  3392. IWL_DEBUG_INFO("Scan took %dms\n",
  3393. jiffies_to_msecs(elapsed_jiffies(priv->scan_start, jiffies)));
  3394. queue_work(priv->workqueue, &priv->scan_completed);
  3395. return;
  3396. reschedule:
  3397. priv->scan_pass_start = jiffies;
  3398. queue_work(priv->workqueue, &priv->request_scan);
  3399. }
  3400. /* Handle notification from uCode that card's power state is changing
  3401. * due to software, hardware, or critical temperature RFKILL */
  3402. static void iwl4965_rx_card_state_notif(struct iwl4965_priv *priv,
  3403. struct iwl4965_rx_mem_buffer *rxb)
  3404. {
  3405. struct iwl4965_rx_packet *pkt = (void *)rxb->skb->data;
  3406. u32 flags = le32_to_cpu(pkt->u.card_state_notif.flags);
  3407. unsigned long status = priv->status;
  3408. IWL_DEBUG_RF_KILL("Card state received: HW:%s SW:%s\n",
  3409. (flags & HW_CARD_DISABLED) ? "Kill" : "On",
  3410. (flags & SW_CARD_DISABLED) ? "Kill" : "On");
  3411. if (flags & (SW_CARD_DISABLED | HW_CARD_DISABLED |
  3412. RF_CARD_DISABLED)) {
  3413. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3414. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3415. if (!iwl4965_grab_nic_access(priv)) {
  3416. iwl4965_write_direct32(
  3417. priv, HBUS_TARG_MBX_C,
  3418. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3419. iwl4965_release_nic_access(priv);
  3420. }
  3421. if (!(flags & RXON_CARD_DISABLED)) {
  3422. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  3423. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  3424. if (!iwl4965_grab_nic_access(priv)) {
  3425. iwl4965_write_direct32(
  3426. priv, HBUS_TARG_MBX_C,
  3427. HBUS_TARG_MBX_C_REG_BIT_CMD_BLOCKED);
  3428. iwl4965_release_nic_access(priv);
  3429. }
  3430. }
  3431. if (flags & RF_CARD_DISABLED) {
  3432. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_SET,
  3433. CSR_UCODE_DRV_GP1_REG_BIT_CT_KILL_EXIT);
  3434. iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3435. if (!iwl4965_grab_nic_access(priv))
  3436. iwl4965_release_nic_access(priv);
  3437. }
  3438. }
  3439. if (flags & HW_CARD_DISABLED)
  3440. set_bit(STATUS_RF_KILL_HW, &priv->status);
  3441. else
  3442. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  3443. if (flags & SW_CARD_DISABLED)
  3444. set_bit(STATUS_RF_KILL_SW, &priv->status);
  3445. else
  3446. clear_bit(STATUS_RF_KILL_SW, &priv->status);
  3447. if (!(flags & RXON_CARD_DISABLED))
  3448. iwl4965_scan_cancel(priv);
  3449. if ((test_bit(STATUS_RF_KILL_HW, &status) !=
  3450. test_bit(STATUS_RF_KILL_HW, &priv->status)) ||
  3451. (test_bit(STATUS_RF_KILL_SW, &status) !=
  3452. test_bit(STATUS_RF_KILL_SW, &priv->status)))
  3453. queue_work(priv->workqueue, &priv->rf_kill);
  3454. else
  3455. wake_up_interruptible(&priv->wait_command_queue);
  3456. }
  3457. /**
  3458. * iwl4965_setup_rx_handlers - Initialize Rx handler callbacks
  3459. *
  3460. * Setup the RX handlers for each of the reply types sent from the uCode
  3461. * to the host.
  3462. *
  3463. * This function chains into the hardware specific files for them to setup
  3464. * any hardware specific handlers as well.
  3465. */
  3466. static void iwl4965_setup_rx_handlers(struct iwl4965_priv *priv)
  3467. {
  3468. priv->rx_handlers[REPLY_ALIVE] = iwl4965_rx_reply_alive;
  3469. priv->rx_handlers[REPLY_ADD_STA] = iwl4965_rx_reply_add_sta;
  3470. priv->rx_handlers[REPLY_ERROR] = iwl4965_rx_reply_error;
  3471. priv->rx_handlers[CHANNEL_SWITCH_NOTIFICATION] = iwl4965_rx_csa;
  3472. priv->rx_handlers[SPECTRUM_MEASURE_NOTIFICATION] =
  3473. iwl4965_rx_spectrum_measure_notif;
  3474. priv->rx_handlers[PM_SLEEP_NOTIFICATION] = iwl4965_rx_pm_sleep_notif;
  3475. priv->rx_handlers[PM_DEBUG_STATISTIC_NOTIFIC] =
  3476. iwl4965_rx_pm_debug_statistics_notif;
  3477. priv->rx_handlers[BEACON_NOTIFICATION] = iwl4965_rx_beacon_notif;
  3478. /*
  3479. * The same handler is used for both the REPLY to a discrete
  3480. * statistics request from the host as well as for the periodic
  3481. * statistics notifications (after received beacons) from the uCode.
  3482. */
  3483. priv->rx_handlers[REPLY_STATISTICS_CMD] = iwl4965_hw_rx_statistics;
  3484. priv->rx_handlers[STATISTICS_NOTIFICATION] = iwl4965_hw_rx_statistics;
  3485. priv->rx_handlers[REPLY_SCAN_CMD] = iwl4965_rx_reply_scan;
  3486. priv->rx_handlers[SCAN_START_NOTIFICATION] = iwl4965_rx_scan_start_notif;
  3487. priv->rx_handlers[SCAN_RESULTS_NOTIFICATION] =
  3488. iwl4965_rx_scan_results_notif;
  3489. priv->rx_handlers[SCAN_COMPLETE_NOTIFICATION] =
  3490. iwl4965_rx_scan_complete_notif;
  3491. priv->rx_handlers[CARD_STATE_NOTIFICATION] = iwl4965_rx_card_state_notif;
  3492. priv->rx_handlers[REPLY_TX] = iwl4965_rx_reply_tx;
  3493. /* Set up hardware specific Rx handlers */
  3494. iwl4965_hw_rx_handler_setup(priv);
  3495. }
  3496. /**
  3497. * iwl4965_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  3498. * @rxb: Rx buffer to reclaim
  3499. *
  3500. * If an Rx buffer has an async callback associated with it the callback
  3501. * will be executed. The attached skb (if present) will only be freed
  3502. * if the callback returns 1
  3503. */
  3504. static void iwl4965_tx_cmd_complete(struct iwl4965_priv *priv,
  3505. struct iwl4965_rx_mem_buffer *rxb)
  3506. {
  3507. struct iwl4965_rx_packet *pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3508. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  3509. int txq_id = SEQ_TO_QUEUE(sequence);
  3510. int index = SEQ_TO_INDEX(sequence);
  3511. int huge = sequence & SEQ_HUGE_FRAME;
  3512. int cmd_index;
  3513. struct iwl4965_cmd *cmd;
  3514. /* If a Tx command is being handled and it isn't in the actual
  3515. * command queue then there a command routing bug has been introduced
  3516. * in the queue management code. */
  3517. if (txq_id != IWL_CMD_QUEUE_NUM)
  3518. IWL_ERROR("Error wrong command queue %d command id 0x%X\n",
  3519. txq_id, pkt->hdr.cmd);
  3520. BUG_ON(txq_id != IWL_CMD_QUEUE_NUM);
  3521. cmd_index = get_cmd_index(&priv->txq[IWL_CMD_QUEUE_NUM].q, index, huge);
  3522. cmd = &priv->txq[IWL_CMD_QUEUE_NUM].cmd[cmd_index];
  3523. /* Input error checking is done when commands are added to queue. */
  3524. if (cmd->meta.flags & CMD_WANT_SKB) {
  3525. cmd->meta.source->u.skb = rxb->skb;
  3526. rxb->skb = NULL;
  3527. } else if (cmd->meta.u.callback &&
  3528. !cmd->meta.u.callback(priv, cmd, rxb->skb))
  3529. rxb->skb = NULL;
  3530. iwl4965_tx_queue_reclaim(priv, txq_id, index);
  3531. if (!(cmd->meta.flags & CMD_ASYNC)) {
  3532. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  3533. wake_up_interruptible(&priv->wait_command_queue);
  3534. }
  3535. }
  3536. /************************** RX-FUNCTIONS ****************************/
  3537. /*
  3538. * Rx theory of operation
  3539. *
  3540. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  3541. * each of which point to Receive Buffers to be filled by 4965. These get
  3542. * used not only for Rx frames, but for any command response or notification
  3543. * from the 4965. The driver and 4965 manage the Rx buffers by means
  3544. * of indexes into the circular buffer.
  3545. *
  3546. * Rx Queue Indexes
  3547. * The host/firmware share two index registers for managing the Rx buffers.
  3548. *
  3549. * The READ index maps to the first position that the firmware may be writing
  3550. * to -- the driver can read up to (but not including) this position and get
  3551. * good data.
  3552. * The READ index is managed by the firmware once the card is enabled.
  3553. *
  3554. * The WRITE index maps to the last position the driver has read from -- the
  3555. * position preceding WRITE is the last slot the firmware can place a packet.
  3556. *
  3557. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  3558. * WRITE = READ.
  3559. *
  3560. * During initialization, the host sets up the READ queue position to the first
  3561. * INDEX position, and WRITE to the last (READ - 1 wrapped)
  3562. *
  3563. * When the firmware places a packet in a buffer, it will advance the READ index
  3564. * and fire the RX interrupt. The driver can then query the READ index and
  3565. * process as many packets as possible, moving the WRITE index forward as it
  3566. * resets the Rx queue buffers with new memory.
  3567. *
  3568. * The management in the driver is as follows:
  3569. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  3570. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  3571. * to replenish the iwl->rxq->rx_free.
  3572. * + In iwl4965_rx_replenish (scheduled) if 'processed' != 'read' then the
  3573. * iwl->rxq is replenished and the READ INDEX is updated (updating the
  3574. * 'processed' and 'read' driver indexes as well)
  3575. * + A received packet is processed and handed to the kernel network stack,
  3576. * detached from the iwl->rxq. The driver 'processed' index is updated.
  3577. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  3578. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  3579. * INDEX is not incremented and iwl->status(RX_STALLED) is set. If there
  3580. * were enough free buffers and RX_STALLED is set it is cleared.
  3581. *
  3582. *
  3583. * Driver sequence:
  3584. *
  3585. * iwl4965_rx_queue_alloc() Allocates rx_free
  3586. * iwl4965_rx_replenish() Replenishes rx_free list from rx_used, and calls
  3587. * iwl4965_rx_queue_restock
  3588. * iwl4965_rx_queue_restock() Moves available buffers from rx_free into Rx
  3589. * queue, updates firmware pointers, and updates
  3590. * the WRITE index. If insufficient rx_free buffers
  3591. * are available, schedules iwl4965_rx_replenish
  3592. *
  3593. * -- enable interrupts --
  3594. * ISR - iwl4965_rx() Detach iwl4965_rx_mem_buffers from pool up to the
  3595. * READ INDEX, detaching the SKB from the pool.
  3596. * Moves the packet buffer from queue to rx_used.
  3597. * Calls iwl4965_rx_queue_restock to refill any empty
  3598. * slots.
  3599. * ...
  3600. *
  3601. */
  3602. /**
  3603. * iwl4965_rx_queue_space - Return number of free slots available in queue.
  3604. */
  3605. static int iwl4965_rx_queue_space(const struct iwl4965_rx_queue *q)
  3606. {
  3607. int s = q->read - q->write;
  3608. if (s <= 0)
  3609. s += RX_QUEUE_SIZE;
  3610. /* keep some buffer to not confuse full and empty queue */
  3611. s -= 2;
  3612. if (s < 0)
  3613. s = 0;
  3614. return s;
  3615. }
  3616. /**
  3617. * iwl4965_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  3618. */
  3619. int iwl4965_rx_queue_update_write_ptr(struct iwl4965_priv *priv, struct iwl4965_rx_queue *q)
  3620. {
  3621. u32 reg = 0;
  3622. int rc = 0;
  3623. unsigned long flags;
  3624. spin_lock_irqsave(&q->lock, flags);
  3625. if (q->need_update == 0)
  3626. goto exit_unlock;
  3627. /* If power-saving is in use, make sure device is awake */
  3628. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  3629. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  3630. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  3631. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  3632. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  3633. goto exit_unlock;
  3634. }
  3635. rc = iwl4965_grab_nic_access(priv);
  3636. if (rc)
  3637. goto exit_unlock;
  3638. /* Device expects a multiple of 8 */
  3639. iwl4965_write_direct32(priv, FH_RSCSR_CHNL0_WPTR,
  3640. q->write & ~0x7);
  3641. iwl4965_release_nic_access(priv);
  3642. /* Else device is assumed to be awake */
  3643. } else
  3644. /* Device expects a multiple of 8 */
  3645. iwl4965_write32(priv, FH_RSCSR_CHNL0_WPTR, q->write & ~0x7);
  3646. q->need_update = 0;
  3647. exit_unlock:
  3648. spin_unlock_irqrestore(&q->lock, flags);
  3649. return rc;
  3650. }
  3651. /**
  3652. * iwl4965_dma_addr2rbd_ptr - convert a DMA address to a uCode read buffer ptr
  3653. */
  3654. static inline __le32 iwl4965_dma_addr2rbd_ptr(struct iwl4965_priv *priv,
  3655. dma_addr_t dma_addr)
  3656. {
  3657. return cpu_to_le32((u32)(dma_addr >> 8));
  3658. }
  3659. /**
  3660. * iwl4965_rx_queue_restock - refill RX queue from pre-allocated pool
  3661. *
  3662. * If there are slots in the RX queue that need to be restocked,
  3663. * and we have free pre-allocated buffers, fill the ranks as much
  3664. * as we can, pulling from rx_free.
  3665. *
  3666. * This moves the 'write' index forward to catch up with 'processed', and
  3667. * also updates the memory address in the firmware to reference the new
  3668. * target buffer.
  3669. */
  3670. static int iwl4965_rx_queue_restock(struct iwl4965_priv *priv)
  3671. {
  3672. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3673. struct list_head *element;
  3674. struct iwl4965_rx_mem_buffer *rxb;
  3675. unsigned long flags;
  3676. int write, rc;
  3677. spin_lock_irqsave(&rxq->lock, flags);
  3678. write = rxq->write & ~0x7;
  3679. while ((iwl4965_rx_queue_space(rxq) > 0) && (rxq->free_count)) {
  3680. /* Get next free Rx buffer, remove from free list */
  3681. element = rxq->rx_free.next;
  3682. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3683. list_del(element);
  3684. /* Point to Rx buffer via next RBD in circular buffer */
  3685. rxq->bd[rxq->write] = iwl4965_dma_addr2rbd_ptr(priv, rxb->dma_addr);
  3686. rxq->queue[rxq->write] = rxb;
  3687. rxq->write = (rxq->write + 1) & RX_QUEUE_MASK;
  3688. rxq->free_count--;
  3689. }
  3690. spin_unlock_irqrestore(&rxq->lock, flags);
  3691. /* If the pre-allocated buffer pool is dropping low, schedule to
  3692. * refill it */
  3693. if (rxq->free_count <= RX_LOW_WATERMARK)
  3694. queue_work(priv->workqueue, &priv->rx_replenish);
  3695. /* If we've added more space for the firmware to place data, tell it.
  3696. * Increment device's write pointer in multiples of 8. */
  3697. if ((write != (rxq->write & ~0x7))
  3698. || (abs(rxq->write - rxq->read) > 7)) {
  3699. spin_lock_irqsave(&rxq->lock, flags);
  3700. rxq->need_update = 1;
  3701. spin_unlock_irqrestore(&rxq->lock, flags);
  3702. rc = iwl4965_rx_queue_update_write_ptr(priv, rxq);
  3703. if (rc)
  3704. return rc;
  3705. }
  3706. return 0;
  3707. }
  3708. /**
  3709. * iwl4965_rx_replenish - Move all used packet from rx_used to rx_free
  3710. *
  3711. * When moving to rx_free an SKB is allocated for the slot.
  3712. *
  3713. * Also restock the Rx queue via iwl4965_rx_queue_restock.
  3714. * This is called as a scheduled work item (except for during initialization)
  3715. */
  3716. static void iwl4965_rx_allocate(struct iwl4965_priv *priv)
  3717. {
  3718. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3719. struct list_head *element;
  3720. struct iwl4965_rx_mem_buffer *rxb;
  3721. unsigned long flags;
  3722. spin_lock_irqsave(&rxq->lock, flags);
  3723. while (!list_empty(&rxq->rx_used)) {
  3724. element = rxq->rx_used.next;
  3725. rxb = list_entry(element, struct iwl4965_rx_mem_buffer, list);
  3726. /* Alloc a new receive buffer */
  3727. rxb->skb =
  3728. alloc_skb(priv->hw_setting.rx_buf_size,
  3729. __GFP_NOWARN | GFP_ATOMIC);
  3730. if (!rxb->skb) {
  3731. if (net_ratelimit())
  3732. printk(KERN_CRIT DRV_NAME
  3733. ": Can not allocate SKB buffers\n");
  3734. /* We don't reschedule replenish work here -- we will
  3735. * call the restock method and if it still needs
  3736. * more buffers it will schedule replenish */
  3737. break;
  3738. }
  3739. priv->alloc_rxb_skb++;
  3740. list_del(element);
  3741. /* Get physical address of RB/SKB */
  3742. rxb->dma_addr =
  3743. pci_map_single(priv->pci_dev, rxb->skb->data,
  3744. priv->hw_setting.rx_buf_size, PCI_DMA_FROMDEVICE);
  3745. list_add_tail(&rxb->list, &rxq->rx_free);
  3746. rxq->free_count++;
  3747. }
  3748. spin_unlock_irqrestore(&rxq->lock, flags);
  3749. }
  3750. /*
  3751. * this should be called while priv->lock is locked
  3752. */
  3753. static void __iwl4965_rx_replenish(void *data)
  3754. {
  3755. struct iwl4965_priv *priv = data;
  3756. iwl4965_rx_allocate(priv);
  3757. iwl4965_rx_queue_restock(priv);
  3758. }
  3759. void iwl4965_rx_replenish(void *data)
  3760. {
  3761. struct iwl4965_priv *priv = data;
  3762. unsigned long flags;
  3763. iwl4965_rx_allocate(priv);
  3764. spin_lock_irqsave(&priv->lock, flags);
  3765. iwl4965_rx_queue_restock(priv);
  3766. spin_unlock_irqrestore(&priv->lock, flags);
  3767. }
  3768. /* Assumes that the skb field of the buffers in 'pool' is kept accurate.
  3769. * If an SKB has been detached, the POOL needs to have its SKB set to NULL
  3770. * This free routine walks the list of POOL entries and if SKB is set to
  3771. * non NULL it is unmapped and freed
  3772. */
  3773. static void iwl4965_rx_queue_free(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3774. {
  3775. int i;
  3776. for (i = 0; i < RX_QUEUE_SIZE + RX_FREE_BUFFERS; i++) {
  3777. if (rxq->pool[i].skb != NULL) {
  3778. pci_unmap_single(priv->pci_dev,
  3779. rxq->pool[i].dma_addr,
  3780. priv->hw_setting.rx_buf_size,
  3781. PCI_DMA_FROMDEVICE);
  3782. dev_kfree_skb(rxq->pool[i].skb);
  3783. }
  3784. }
  3785. pci_free_consistent(priv->pci_dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  3786. rxq->dma_addr);
  3787. rxq->bd = NULL;
  3788. }
  3789. int iwl4965_rx_queue_alloc(struct iwl4965_priv *priv)
  3790. {
  3791. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3792. struct pci_dev *dev = priv->pci_dev;
  3793. int i;
  3794. spin_lock_init(&rxq->lock);
  3795. INIT_LIST_HEAD(&rxq->rx_free);
  3796. INIT_LIST_HEAD(&rxq->rx_used);
  3797. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  3798. rxq->bd = pci_alloc_consistent(dev, 4 * RX_QUEUE_SIZE, &rxq->dma_addr);
  3799. if (!rxq->bd)
  3800. return -ENOMEM;
  3801. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3802. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  3803. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3804. /* Set us so that we have processed and used all buffers, but have
  3805. * not restocked the Rx queue with fresh buffers */
  3806. rxq->read = rxq->write = 0;
  3807. rxq->free_count = 0;
  3808. rxq->need_update = 0;
  3809. return 0;
  3810. }
  3811. void iwl4965_rx_queue_reset(struct iwl4965_priv *priv, struct iwl4965_rx_queue *rxq)
  3812. {
  3813. unsigned long flags;
  3814. int i;
  3815. spin_lock_irqsave(&rxq->lock, flags);
  3816. INIT_LIST_HEAD(&rxq->rx_free);
  3817. INIT_LIST_HEAD(&rxq->rx_used);
  3818. /* Fill the rx_used queue with _all_ of the Rx buffers */
  3819. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++) {
  3820. /* In the reset function, these buffers may have been allocated
  3821. * to an SKB, so we need to unmap and free potential storage */
  3822. if (rxq->pool[i].skb != NULL) {
  3823. pci_unmap_single(priv->pci_dev,
  3824. rxq->pool[i].dma_addr,
  3825. priv->hw_setting.rx_buf_size,
  3826. PCI_DMA_FROMDEVICE);
  3827. priv->alloc_rxb_skb--;
  3828. dev_kfree_skb(rxq->pool[i].skb);
  3829. rxq->pool[i].skb = NULL;
  3830. }
  3831. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  3832. }
  3833. /* Set us so that we have processed and used all buffers, but have
  3834. * not restocked the Rx queue with fresh buffers */
  3835. rxq->read = rxq->write = 0;
  3836. rxq->free_count = 0;
  3837. spin_unlock_irqrestore(&rxq->lock, flags);
  3838. }
  3839. /* Convert linear signal-to-noise ratio into dB */
  3840. static u8 ratio2dB[100] = {
  3841. /* 0 1 2 3 4 5 6 7 8 9 */
  3842. 0, 0, 6, 10, 12, 14, 16, 17, 18, 19, /* 00 - 09 */
  3843. 20, 21, 22, 22, 23, 23, 24, 25, 26, 26, /* 10 - 19 */
  3844. 26, 26, 26, 27, 27, 28, 28, 28, 29, 29, /* 20 - 29 */
  3845. 29, 30, 30, 30, 31, 31, 31, 31, 32, 32, /* 30 - 39 */
  3846. 32, 32, 32, 33, 33, 33, 33, 33, 34, 34, /* 40 - 49 */
  3847. 34, 34, 34, 34, 35, 35, 35, 35, 35, 35, /* 50 - 59 */
  3848. 36, 36, 36, 36, 36, 36, 36, 37, 37, 37, /* 60 - 69 */
  3849. 37, 37, 37, 37, 37, 38, 38, 38, 38, 38, /* 70 - 79 */
  3850. 38, 38, 38, 38, 38, 39, 39, 39, 39, 39, /* 80 - 89 */
  3851. 39, 39, 39, 39, 39, 40, 40, 40, 40, 40 /* 90 - 99 */
  3852. };
  3853. /* Calculates a relative dB value from a ratio of linear
  3854. * (i.e. not dB) signal levels.
  3855. * Conversion assumes that levels are voltages (20*log), not powers (10*log). */
  3856. int iwl4965_calc_db_from_ratio(int sig_ratio)
  3857. {
  3858. /* 1000:1 or higher just report as 60 dB */
  3859. if (sig_ratio >= 1000)
  3860. return 60;
  3861. /* 100:1 or higher, divide by 10 and use table,
  3862. * add 20 dB to make up for divide by 10 */
  3863. if (sig_ratio >= 100)
  3864. return (20 + (int)ratio2dB[sig_ratio/10]);
  3865. /* We shouldn't see this */
  3866. if (sig_ratio < 1)
  3867. return 0;
  3868. /* Use table for ratios 1:1 - 99:1 */
  3869. return (int)ratio2dB[sig_ratio];
  3870. }
  3871. #define PERFECT_RSSI (-20) /* dBm */
  3872. #define WORST_RSSI (-95) /* dBm */
  3873. #define RSSI_RANGE (PERFECT_RSSI - WORST_RSSI)
  3874. /* Calculate an indication of rx signal quality (a percentage, not dBm!).
  3875. * See http://www.ces.clemson.edu/linux/signal_quality.shtml for info
  3876. * about formulas used below. */
  3877. int iwl4965_calc_sig_qual(int rssi_dbm, int noise_dbm)
  3878. {
  3879. int sig_qual;
  3880. int degradation = PERFECT_RSSI - rssi_dbm;
  3881. /* If we get a noise measurement, use signal-to-noise ratio (SNR)
  3882. * as indicator; formula is (signal dbm - noise dbm).
  3883. * SNR at or above 40 is a great signal (100%).
  3884. * Below that, scale to fit SNR of 0 - 40 dB within 0 - 100% indicator.
  3885. * Weakest usable signal is usually 10 - 15 dB SNR. */
  3886. if (noise_dbm) {
  3887. if (rssi_dbm - noise_dbm >= 40)
  3888. return 100;
  3889. else if (rssi_dbm < noise_dbm)
  3890. return 0;
  3891. sig_qual = ((rssi_dbm - noise_dbm) * 5) / 2;
  3892. /* Else use just the signal level.
  3893. * This formula is a least squares fit of data points collected and
  3894. * compared with a reference system that had a percentage (%) display
  3895. * for signal quality. */
  3896. } else
  3897. sig_qual = (100 * (RSSI_RANGE * RSSI_RANGE) - degradation *
  3898. (15 * RSSI_RANGE + 62 * degradation)) /
  3899. (RSSI_RANGE * RSSI_RANGE);
  3900. if (sig_qual > 100)
  3901. sig_qual = 100;
  3902. else if (sig_qual < 1)
  3903. sig_qual = 0;
  3904. return sig_qual;
  3905. }
  3906. /**
  3907. * iwl4965_rx_handle - Main entry function for receiving responses from uCode
  3908. *
  3909. * Uses the priv->rx_handlers callback function array to invoke
  3910. * the appropriate handlers, including command responses,
  3911. * frame-received notifications, and other notifications.
  3912. */
  3913. static void iwl4965_rx_handle(struct iwl4965_priv *priv)
  3914. {
  3915. struct iwl4965_rx_mem_buffer *rxb;
  3916. struct iwl4965_rx_packet *pkt;
  3917. struct iwl4965_rx_queue *rxq = &priv->rxq;
  3918. u32 r, i;
  3919. int reclaim;
  3920. unsigned long flags;
  3921. u8 fill_rx = 0;
  3922. u32 count = 8;
  3923. /* uCode's read index (stored in shared DRAM) indicates the last Rx
  3924. * buffer that the driver may process (last buffer filled by ucode). */
  3925. r = iwl4965_hw_get_rx_read(priv);
  3926. i = rxq->read;
  3927. /* Rx interrupt, but nothing sent from uCode */
  3928. if (i == r)
  3929. IWL_DEBUG(IWL_DL_RX | IWL_DL_ISR, "r = %d, i = %d\n", r, i);
  3930. if (iwl4965_rx_queue_space(rxq) > (RX_QUEUE_SIZE / 2))
  3931. fill_rx = 1;
  3932. while (i != r) {
  3933. rxb = rxq->queue[i];
  3934. /* If an RXB doesn't have a Rx queue slot associated with it,
  3935. * then a bug has been introduced in the queue refilling
  3936. * routines -- catch it here */
  3937. BUG_ON(rxb == NULL);
  3938. rxq->queue[i] = NULL;
  3939. pci_dma_sync_single_for_cpu(priv->pci_dev, rxb->dma_addr,
  3940. priv->hw_setting.rx_buf_size,
  3941. PCI_DMA_FROMDEVICE);
  3942. pkt = (struct iwl4965_rx_packet *)rxb->skb->data;
  3943. /* Reclaim a command buffer only if this packet is a response
  3944. * to a (driver-originated) command.
  3945. * If the packet (e.g. Rx frame) originated from uCode,
  3946. * there is no command buffer to reclaim.
  3947. * Ucode should set SEQ_RX_FRAME bit if ucode-originated,
  3948. * but apparently a few don't get set; catch them here. */
  3949. reclaim = !(pkt->hdr.sequence & SEQ_RX_FRAME) &&
  3950. (pkt->hdr.cmd != REPLY_RX_PHY_CMD) &&
  3951. (pkt->hdr.cmd != REPLY_4965_RX) &&
  3952. (pkt->hdr.cmd != REPLY_COMPRESSED_BA) &&
  3953. (pkt->hdr.cmd != STATISTICS_NOTIFICATION) &&
  3954. (pkt->hdr.cmd != REPLY_TX);
  3955. /* Based on type of command response or notification,
  3956. * handle those that need handling via function in
  3957. * rx_handlers table. See iwl4965_setup_rx_handlers() */
  3958. if (priv->rx_handlers[pkt->hdr.cmd]) {
  3959. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3960. "r = %d, i = %d, %s, 0x%02x\n", r, i,
  3961. get_cmd_string(pkt->hdr.cmd), pkt->hdr.cmd);
  3962. priv->rx_handlers[pkt->hdr.cmd] (priv, rxb);
  3963. } else {
  3964. /* No handling needed */
  3965. IWL_DEBUG(IWL_DL_HOST_COMMAND | IWL_DL_RX | IWL_DL_ISR,
  3966. "r %d i %d No handler needed for %s, 0x%02x\n",
  3967. r, i, get_cmd_string(pkt->hdr.cmd),
  3968. pkt->hdr.cmd);
  3969. }
  3970. if (reclaim) {
  3971. /* Invoke any callbacks, transfer the skb to caller, and
  3972. * fire off the (possibly) blocking iwl4965_send_cmd()
  3973. * as we reclaim the driver command queue */
  3974. if (rxb && rxb->skb)
  3975. iwl4965_tx_cmd_complete(priv, rxb);
  3976. else
  3977. IWL_WARNING("Claim null rxb?\n");
  3978. }
  3979. /* For now we just don't re-use anything. We can tweak this
  3980. * later to try and re-use notification packets and SKBs that
  3981. * fail to Rx correctly */
  3982. if (rxb->skb != NULL) {
  3983. priv->alloc_rxb_skb--;
  3984. dev_kfree_skb_any(rxb->skb);
  3985. rxb->skb = NULL;
  3986. }
  3987. pci_unmap_single(priv->pci_dev, rxb->dma_addr,
  3988. priv->hw_setting.rx_buf_size,
  3989. PCI_DMA_FROMDEVICE);
  3990. spin_lock_irqsave(&rxq->lock, flags);
  3991. list_add_tail(&rxb->list, &priv->rxq.rx_used);
  3992. spin_unlock_irqrestore(&rxq->lock, flags);
  3993. i = (i + 1) & RX_QUEUE_MASK;
  3994. /* If there are a lot of unused frames,
  3995. * restock the Rx queue so ucode wont assert. */
  3996. if (fill_rx) {
  3997. count++;
  3998. if (count >= 8) {
  3999. priv->rxq.read = i;
  4000. __iwl4965_rx_replenish(priv);
  4001. count = 0;
  4002. }
  4003. }
  4004. }
  4005. /* Backtrack one entry */
  4006. priv->rxq.read = i;
  4007. iwl4965_rx_queue_restock(priv);
  4008. }
  4009. /**
  4010. * iwl4965_tx_queue_update_write_ptr - Send new write index to hardware
  4011. */
  4012. static int iwl4965_tx_queue_update_write_ptr(struct iwl4965_priv *priv,
  4013. struct iwl4965_tx_queue *txq)
  4014. {
  4015. u32 reg = 0;
  4016. int rc = 0;
  4017. int txq_id = txq->q.id;
  4018. if (txq->need_update == 0)
  4019. return rc;
  4020. /* if we're trying to save power */
  4021. if (test_bit(STATUS_POWER_PMI, &priv->status)) {
  4022. /* wake up nic if it's powered down ...
  4023. * uCode will wake up, and interrupt us again, so next
  4024. * time we'll skip this part. */
  4025. reg = iwl4965_read32(priv, CSR_UCODE_DRV_GP1);
  4026. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  4027. IWL_DEBUG_INFO("Requesting wakeup, GP1 = 0x%x\n", reg);
  4028. iwl4965_set_bit(priv, CSR_GP_CNTRL,
  4029. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  4030. return rc;
  4031. }
  4032. /* restore this queue's parameters in nic hardware. */
  4033. rc = iwl4965_grab_nic_access(priv);
  4034. if (rc)
  4035. return rc;
  4036. iwl4965_write_direct32(priv, HBUS_TARG_WRPTR,
  4037. txq->q.write_ptr | (txq_id << 8));
  4038. iwl4965_release_nic_access(priv);
  4039. /* else not in power-save mode, uCode will never sleep when we're
  4040. * trying to tx (during RFKILL, we're not trying to tx). */
  4041. } else
  4042. iwl4965_write32(priv, HBUS_TARG_WRPTR,
  4043. txq->q.write_ptr | (txq_id << 8));
  4044. txq->need_update = 0;
  4045. return rc;
  4046. }
  4047. #ifdef CONFIG_IWL4965_DEBUG
  4048. static void iwl4965_print_rx_config_cmd(struct iwl4965_rxon_cmd *rxon)
  4049. {
  4050. DECLARE_MAC_BUF(mac);
  4051. IWL_DEBUG_RADIO("RX CONFIG:\n");
  4052. iwl4965_print_hex_dump(IWL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  4053. IWL_DEBUG_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  4054. IWL_DEBUG_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  4055. IWL_DEBUG_RADIO("u32 filter_flags: 0x%08x\n",
  4056. le32_to_cpu(rxon->filter_flags));
  4057. IWL_DEBUG_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  4058. IWL_DEBUG_RADIO("u8 ofdm_basic_rates: 0x%02x\n",
  4059. rxon->ofdm_basic_rates);
  4060. IWL_DEBUG_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  4061. IWL_DEBUG_RADIO("u8[6] node_addr: %s\n",
  4062. print_mac(mac, rxon->node_addr));
  4063. IWL_DEBUG_RADIO("u8[6] bssid_addr: %s\n",
  4064. print_mac(mac, rxon->bssid_addr));
  4065. IWL_DEBUG_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  4066. }
  4067. #endif
  4068. static void iwl4965_enable_interrupts(struct iwl4965_priv *priv)
  4069. {
  4070. IWL_DEBUG_ISR("Enabling interrupts\n");
  4071. set_bit(STATUS_INT_ENABLED, &priv->status);
  4072. iwl4965_write32(priv, CSR_INT_MASK, CSR_INI_SET_MASK);
  4073. }
  4074. static inline void iwl4965_disable_interrupts(struct iwl4965_priv *priv)
  4075. {
  4076. clear_bit(STATUS_INT_ENABLED, &priv->status);
  4077. /* disable interrupts from uCode/NIC to host */
  4078. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  4079. /* acknowledge/clear/reset any interrupts still pending
  4080. * from uCode or flow handler (Rx/Tx DMA) */
  4081. iwl4965_write32(priv, CSR_INT, 0xffffffff);
  4082. iwl4965_write32(priv, CSR_FH_INT_STATUS, 0xffffffff);
  4083. IWL_DEBUG_ISR("Disabled interrupts\n");
  4084. }
  4085. static const char *desc_lookup(int i)
  4086. {
  4087. switch (i) {
  4088. case 1:
  4089. return "FAIL";
  4090. case 2:
  4091. return "BAD_PARAM";
  4092. case 3:
  4093. return "BAD_CHECKSUM";
  4094. case 4:
  4095. return "NMI_INTERRUPT";
  4096. case 5:
  4097. return "SYSASSERT";
  4098. case 6:
  4099. return "FATAL_ERROR";
  4100. }
  4101. return "UNKNOWN";
  4102. }
  4103. #define ERROR_START_OFFSET (1 * sizeof(u32))
  4104. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  4105. static void iwl4965_dump_nic_error_log(struct iwl4965_priv *priv)
  4106. {
  4107. u32 data2, line;
  4108. u32 desc, time, count, base, data1;
  4109. u32 blink1, blink2, ilink1, ilink2;
  4110. int rc;
  4111. base = le32_to_cpu(priv->card_alive.error_event_table_ptr);
  4112. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  4113. IWL_ERROR("Not valid error log pointer 0x%08X\n", base);
  4114. return;
  4115. }
  4116. rc = iwl4965_grab_nic_access(priv);
  4117. if (rc) {
  4118. IWL_WARNING("Can not read from adapter at this time.\n");
  4119. return;
  4120. }
  4121. count = iwl4965_read_targ_mem(priv, base);
  4122. if (ERROR_START_OFFSET <= count * ERROR_ELEM_SIZE) {
  4123. IWL_ERROR("Start IWL Error Log Dump:\n");
  4124. IWL_ERROR("Status: 0x%08lX, Config: %08X count: %d\n",
  4125. priv->status, priv->config, count);
  4126. }
  4127. desc = iwl4965_read_targ_mem(priv, base + 1 * sizeof(u32));
  4128. blink1 = iwl4965_read_targ_mem(priv, base + 3 * sizeof(u32));
  4129. blink2 = iwl4965_read_targ_mem(priv, base + 4 * sizeof(u32));
  4130. ilink1 = iwl4965_read_targ_mem(priv, base + 5 * sizeof(u32));
  4131. ilink2 = iwl4965_read_targ_mem(priv, base + 6 * sizeof(u32));
  4132. data1 = iwl4965_read_targ_mem(priv, base + 7 * sizeof(u32));
  4133. data2 = iwl4965_read_targ_mem(priv, base + 8 * sizeof(u32));
  4134. line = iwl4965_read_targ_mem(priv, base + 9 * sizeof(u32));
  4135. time = iwl4965_read_targ_mem(priv, base + 11 * sizeof(u32));
  4136. IWL_ERROR("Desc Time "
  4137. "data1 data2 line\n");
  4138. IWL_ERROR("%-13s (#%d) %010u 0x%08X 0x%08X %u\n",
  4139. desc_lookup(desc), desc, time, data1, data2, line);
  4140. IWL_ERROR("blink1 blink2 ilink1 ilink2\n");
  4141. IWL_ERROR("0x%05X 0x%05X 0x%05X 0x%05X\n", blink1, blink2,
  4142. ilink1, ilink2);
  4143. iwl4965_release_nic_access(priv);
  4144. }
  4145. #define EVENT_START_OFFSET (4 * sizeof(u32))
  4146. /**
  4147. * iwl4965_print_event_log - Dump error event log to syslog
  4148. *
  4149. * NOTE: Must be called with iwl4965_grab_nic_access() already obtained!
  4150. */
  4151. static void iwl4965_print_event_log(struct iwl4965_priv *priv, u32 start_idx,
  4152. u32 num_events, u32 mode)
  4153. {
  4154. u32 i;
  4155. u32 base; /* SRAM byte address of event log header */
  4156. u32 event_size; /* 2 u32s, or 3 u32s if timestamp recorded */
  4157. u32 ptr; /* SRAM byte address of log data */
  4158. u32 ev, time, data; /* event log data */
  4159. if (num_events == 0)
  4160. return;
  4161. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4162. if (mode == 0)
  4163. event_size = 2 * sizeof(u32);
  4164. else
  4165. event_size = 3 * sizeof(u32);
  4166. ptr = base + EVENT_START_OFFSET + (start_idx * event_size);
  4167. /* "time" is actually "data" for mode 0 (no timestamp).
  4168. * place event id # at far right for easier visual parsing. */
  4169. for (i = 0; i < num_events; i++) {
  4170. ev = iwl4965_read_targ_mem(priv, ptr);
  4171. ptr += sizeof(u32);
  4172. time = iwl4965_read_targ_mem(priv, ptr);
  4173. ptr += sizeof(u32);
  4174. if (mode == 0)
  4175. IWL_ERROR("0x%08x\t%04u\n", time, ev); /* data, ev */
  4176. else {
  4177. data = iwl4965_read_targ_mem(priv, ptr);
  4178. ptr += sizeof(u32);
  4179. IWL_ERROR("%010u\t0x%08x\t%04u\n", time, data, ev);
  4180. }
  4181. }
  4182. }
  4183. static void iwl4965_dump_nic_event_log(struct iwl4965_priv *priv)
  4184. {
  4185. int rc;
  4186. u32 base; /* SRAM byte address of event log header */
  4187. u32 capacity; /* event log capacity in # entries */
  4188. u32 mode; /* 0 - no timestamp, 1 - timestamp recorded */
  4189. u32 num_wraps; /* # times uCode wrapped to top of log */
  4190. u32 next_entry; /* index of next entry to be written by uCode */
  4191. u32 size; /* # entries that we'll print */
  4192. base = le32_to_cpu(priv->card_alive.log_event_table_ptr);
  4193. if (!iwl4965_hw_valid_rtc_data_addr(base)) {
  4194. IWL_ERROR("Invalid event log pointer 0x%08X\n", base);
  4195. return;
  4196. }
  4197. rc = iwl4965_grab_nic_access(priv);
  4198. if (rc) {
  4199. IWL_WARNING("Can not read from adapter at this time.\n");
  4200. return;
  4201. }
  4202. /* event log header */
  4203. capacity = iwl4965_read_targ_mem(priv, base);
  4204. mode = iwl4965_read_targ_mem(priv, base + (1 * sizeof(u32)));
  4205. num_wraps = iwl4965_read_targ_mem(priv, base + (2 * sizeof(u32)));
  4206. next_entry = iwl4965_read_targ_mem(priv, base + (3 * sizeof(u32)));
  4207. size = num_wraps ? capacity : next_entry;
  4208. /* bail out if nothing in log */
  4209. if (size == 0) {
  4210. IWL_ERROR("Start IWL Event Log Dump: nothing in log\n");
  4211. iwl4965_release_nic_access(priv);
  4212. return;
  4213. }
  4214. IWL_ERROR("Start IWL Event Log Dump: display count %d, wraps %d\n",
  4215. size, num_wraps);
  4216. /* if uCode has wrapped back to top of log, start at the oldest entry,
  4217. * i.e the next one that uCode would fill. */
  4218. if (num_wraps)
  4219. iwl4965_print_event_log(priv, next_entry,
  4220. capacity - next_entry, mode);
  4221. /* (then/else) start at top of log */
  4222. iwl4965_print_event_log(priv, 0, next_entry, mode);
  4223. iwl4965_release_nic_access(priv);
  4224. }
  4225. /**
  4226. * iwl4965_irq_handle_error - called for HW or SW error interrupt from card
  4227. */
  4228. static void iwl4965_irq_handle_error(struct iwl4965_priv *priv)
  4229. {
  4230. /* Set the FW error flag -- cleared on iwl4965_down */
  4231. set_bit(STATUS_FW_ERROR, &priv->status);
  4232. /* Cancel currently queued command. */
  4233. clear_bit(STATUS_HCMD_ACTIVE, &priv->status);
  4234. #ifdef CONFIG_IWL4965_DEBUG
  4235. if (iwl4965_debug_level & IWL_DL_FW_ERRORS) {
  4236. iwl4965_dump_nic_error_log(priv);
  4237. iwl4965_dump_nic_event_log(priv);
  4238. iwl4965_print_rx_config_cmd(&priv->staging_rxon);
  4239. }
  4240. #endif
  4241. wake_up_interruptible(&priv->wait_command_queue);
  4242. /* Keep the restart process from trying to send host
  4243. * commands by clearing the INIT status bit */
  4244. clear_bit(STATUS_READY, &priv->status);
  4245. if (!test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  4246. IWL_DEBUG(IWL_DL_INFO | IWL_DL_FW_ERRORS,
  4247. "Restarting adapter due to uCode error.\n");
  4248. if (iwl4965_is_associated(priv)) {
  4249. memcpy(&priv->recovery_rxon, &priv->active_rxon,
  4250. sizeof(priv->recovery_rxon));
  4251. priv->error_recovering = 1;
  4252. }
  4253. queue_work(priv->workqueue, &priv->restart);
  4254. }
  4255. }
  4256. static void iwl4965_error_recovery(struct iwl4965_priv *priv)
  4257. {
  4258. unsigned long flags;
  4259. memcpy(&priv->staging_rxon, &priv->recovery_rxon,
  4260. sizeof(priv->staging_rxon));
  4261. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4262. iwl4965_commit_rxon(priv);
  4263. iwl4965_rxon_add_station(priv, priv->bssid, 1);
  4264. spin_lock_irqsave(&priv->lock, flags);
  4265. priv->assoc_id = le16_to_cpu(priv->staging_rxon.assoc_id);
  4266. priv->error_recovering = 0;
  4267. spin_unlock_irqrestore(&priv->lock, flags);
  4268. }
  4269. static void iwl4965_irq_tasklet(struct iwl4965_priv *priv)
  4270. {
  4271. u32 inta, handled = 0;
  4272. u32 inta_fh;
  4273. unsigned long flags;
  4274. #ifdef CONFIG_IWL4965_DEBUG
  4275. u32 inta_mask;
  4276. #endif
  4277. spin_lock_irqsave(&priv->lock, flags);
  4278. /* Ack/clear/reset pending uCode interrupts.
  4279. * Note: Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
  4280. * and will clear only when CSR_FH_INT_STATUS gets cleared. */
  4281. inta = iwl4965_read32(priv, CSR_INT);
  4282. iwl4965_write32(priv, CSR_INT, inta);
  4283. /* Ack/clear/reset pending flow-handler (DMA) interrupts.
  4284. * Any new interrupts that happen after this, either while we're
  4285. * in this tasklet, or later, will show up in next ISR/tasklet. */
  4286. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4287. iwl4965_write32(priv, CSR_FH_INT_STATUS, inta_fh);
  4288. #ifdef CONFIG_IWL4965_DEBUG
  4289. if (iwl4965_debug_level & IWL_DL_ISR) {
  4290. /* just for debug */
  4291. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4292. IWL_DEBUG_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4293. inta, inta_mask, inta_fh);
  4294. }
  4295. #endif
  4296. /* Since CSR_INT and CSR_FH_INT_STATUS reads and clears are not
  4297. * atomic, make sure that inta covers all the interrupts that
  4298. * we've discovered, even if FH interrupt came in just after
  4299. * reading CSR_INT. */
  4300. if (inta_fh & CSR_FH_INT_RX_MASK)
  4301. inta |= CSR_INT_BIT_FH_RX;
  4302. if (inta_fh & CSR_FH_INT_TX_MASK)
  4303. inta |= CSR_INT_BIT_FH_TX;
  4304. /* Now service all interrupt bits discovered above. */
  4305. if (inta & CSR_INT_BIT_HW_ERR) {
  4306. IWL_ERROR("Microcode HW error detected. Restarting.\n");
  4307. /* Tell the device to stop sending interrupts */
  4308. iwl4965_disable_interrupts(priv);
  4309. iwl4965_irq_handle_error(priv);
  4310. handled |= CSR_INT_BIT_HW_ERR;
  4311. spin_unlock_irqrestore(&priv->lock, flags);
  4312. return;
  4313. }
  4314. #ifdef CONFIG_IWL4965_DEBUG
  4315. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4316. /* NIC fires this, but we don't use it, redundant with WAKEUP */
  4317. if (inta & CSR_INT_BIT_SCD)
  4318. IWL_DEBUG_ISR("Scheduler finished to transmit "
  4319. "the frame/frames.\n");
  4320. /* Alive notification via Rx interrupt will do the real work */
  4321. if (inta & CSR_INT_BIT_ALIVE)
  4322. IWL_DEBUG_ISR("Alive interrupt\n");
  4323. }
  4324. #endif
  4325. /* Safely ignore these bits for debug checks below */
  4326. inta &= ~(CSR_INT_BIT_SCD | CSR_INT_BIT_ALIVE);
  4327. /* HW RF KILL switch toggled */
  4328. if (inta & CSR_INT_BIT_RF_KILL) {
  4329. int hw_rf_kill = 0;
  4330. if (!(iwl4965_read32(priv, CSR_GP_CNTRL) &
  4331. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  4332. hw_rf_kill = 1;
  4333. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL | IWL_DL_ISR,
  4334. "RF_KILL bit toggled to %s.\n",
  4335. hw_rf_kill ? "disable radio":"enable radio");
  4336. /* Queue restart only if RF_KILL switch was set to "kill"
  4337. * when we loaded driver, and is now set to "enable".
  4338. * After we're Alive, RF_KILL gets handled by
  4339. * iwl_rx_card_state_notif() */
  4340. if (!hw_rf_kill && !test_bit(STATUS_ALIVE, &priv->status)) {
  4341. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  4342. queue_work(priv->workqueue, &priv->restart);
  4343. }
  4344. handled |= CSR_INT_BIT_RF_KILL;
  4345. }
  4346. /* Chip got too hot and stopped itself */
  4347. if (inta & CSR_INT_BIT_CT_KILL) {
  4348. IWL_ERROR("Microcode CT kill error detected.\n");
  4349. handled |= CSR_INT_BIT_CT_KILL;
  4350. }
  4351. /* Error detected by uCode */
  4352. if (inta & CSR_INT_BIT_SW_ERR) {
  4353. IWL_ERROR("Microcode SW error detected. Restarting 0x%X.\n",
  4354. inta);
  4355. iwl4965_irq_handle_error(priv);
  4356. handled |= CSR_INT_BIT_SW_ERR;
  4357. }
  4358. /* uCode wakes up after power-down sleep */
  4359. if (inta & CSR_INT_BIT_WAKEUP) {
  4360. IWL_DEBUG_ISR("Wakeup interrupt\n");
  4361. iwl4965_rx_queue_update_write_ptr(priv, &priv->rxq);
  4362. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[0]);
  4363. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[1]);
  4364. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[2]);
  4365. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[3]);
  4366. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[4]);
  4367. iwl4965_tx_queue_update_write_ptr(priv, &priv->txq[5]);
  4368. handled |= CSR_INT_BIT_WAKEUP;
  4369. }
  4370. /* All uCode command responses, including Tx command responses,
  4371. * Rx "responses" (frame-received notification), and other
  4372. * notifications from uCode come through here*/
  4373. if (inta & (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX)) {
  4374. iwl4965_rx_handle(priv);
  4375. handled |= (CSR_INT_BIT_FH_RX | CSR_INT_BIT_SW_RX);
  4376. }
  4377. if (inta & CSR_INT_BIT_FH_TX) {
  4378. IWL_DEBUG_ISR("Tx interrupt\n");
  4379. handled |= CSR_INT_BIT_FH_TX;
  4380. }
  4381. if (inta & ~handled)
  4382. IWL_ERROR("Unhandled INTA bits 0x%08x\n", inta & ~handled);
  4383. if (inta & ~CSR_INI_SET_MASK) {
  4384. IWL_WARNING("Disabled INTA bits 0x%08x were pending\n",
  4385. inta & ~CSR_INI_SET_MASK);
  4386. IWL_WARNING(" with FH_INT = 0x%08x\n", inta_fh);
  4387. }
  4388. /* Re-enable all interrupts */
  4389. iwl4965_enable_interrupts(priv);
  4390. #ifdef CONFIG_IWL4965_DEBUG
  4391. if (iwl4965_debug_level & (IWL_DL_ISR)) {
  4392. inta = iwl4965_read32(priv, CSR_INT);
  4393. inta_mask = iwl4965_read32(priv, CSR_INT_MASK);
  4394. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4395. IWL_DEBUG_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
  4396. "flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
  4397. }
  4398. #endif
  4399. spin_unlock_irqrestore(&priv->lock, flags);
  4400. }
  4401. static irqreturn_t iwl4965_isr(int irq, void *data)
  4402. {
  4403. struct iwl4965_priv *priv = data;
  4404. u32 inta, inta_mask;
  4405. u32 inta_fh;
  4406. if (!priv)
  4407. return IRQ_NONE;
  4408. spin_lock(&priv->lock);
  4409. /* Disable (but don't clear!) interrupts here to avoid
  4410. * back-to-back ISRs and sporadic interrupts from our NIC.
  4411. * If we have something to service, the tasklet will re-enable ints.
  4412. * If we *don't* have something, we'll re-enable before leaving here. */
  4413. inta_mask = iwl4965_read32(priv, CSR_INT_MASK); /* just for debug */
  4414. iwl4965_write32(priv, CSR_INT_MASK, 0x00000000);
  4415. /* Discover which interrupts are active/pending */
  4416. inta = iwl4965_read32(priv, CSR_INT);
  4417. inta_fh = iwl4965_read32(priv, CSR_FH_INT_STATUS);
  4418. /* Ignore interrupt if there's nothing in NIC to service.
  4419. * This may be due to IRQ shared with another device,
  4420. * or due to sporadic interrupts thrown from our NIC. */
  4421. if (!inta && !inta_fh) {
  4422. IWL_DEBUG_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  4423. goto none;
  4424. }
  4425. if ((inta == 0xFFFFFFFF) || ((inta & 0xFFFFFFF0) == 0xa5a5a5a0)) {
  4426. /* Hardware disappeared. It might have already raised
  4427. * an interrupt */
  4428. IWL_WARNING("HARDWARE GONE?? INTA == 0x%080x\n", inta);
  4429. goto unplugged;
  4430. }
  4431. IWL_DEBUG_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
  4432. inta, inta_mask, inta_fh);
  4433. inta &= ~CSR_INT_BIT_SCD;
  4434. /* iwl4965_irq_tasklet() will service interrupts and re-enable them */
  4435. if (likely(inta || inta_fh))
  4436. tasklet_schedule(&priv->irq_tasklet);
  4437. unplugged:
  4438. spin_unlock(&priv->lock);
  4439. return IRQ_HANDLED;
  4440. none:
  4441. /* re-enable interrupts here since we don't have anything to service. */
  4442. iwl4965_enable_interrupts(priv);
  4443. spin_unlock(&priv->lock);
  4444. return IRQ_NONE;
  4445. }
  4446. /************************** EEPROM BANDS ****************************
  4447. *
  4448. * The iwl4965_eeprom_band definitions below provide the mapping from the
  4449. * EEPROM contents to the specific channel number supported for each
  4450. * band.
  4451. *
  4452. * For example, iwl4965_priv->eeprom.band_3_channels[4] from the band_3
  4453. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  4454. * The specific geography and calibration information for that channel
  4455. * is contained in the eeprom map itself.
  4456. *
  4457. * During init, we copy the eeprom information and channel map
  4458. * information into priv->channel_info_24/52 and priv->channel_map_24/52
  4459. *
  4460. * channel_map_24/52 provides the index in the channel_info array for a
  4461. * given channel. We have to have two separate maps as there is channel
  4462. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  4463. * band_2
  4464. *
  4465. * A value of 0xff stored in the channel_map indicates that the channel
  4466. * is not supported by the hardware at all.
  4467. *
  4468. * A value of 0xfe in the channel_map indicates that the channel is not
  4469. * valid for Tx with the current hardware. This means that
  4470. * while the system can tune and receive on a given channel, it may not
  4471. * be able to associate or transmit any frames on that
  4472. * channel. There is no corresponding channel information for that
  4473. * entry.
  4474. *
  4475. *********************************************************************/
  4476. /* 2.4 GHz */
  4477. static const u8 iwl4965_eeprom_band_1[14] = {
  4478. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  4479. };
  4480. /* 5.2 GHz bands */
  4481. static const u8 iwl4965_eeprom_band_2[] = { /* 4915-5080MHz */
  4482. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  4483. };
  4484. static const u8 iwl4965_eeprom_band_3[] = { /* 5170-5320MHz */
  4485. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  4486. };
  4487. static const u8 iwl4965_eeprom_band_4[] = { /* 5500-5700MHz */
  4488. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  4489. };
  4490. static const u8 iwl4965_eeprom_band_5[] = { /* 5725-5825MHz */
  4491. 145, 149, 153, 157, 161, 165
  4492. };
  4493. static u8 iwl4965_eeprom_band_6[] = { /* 2.4 FAT channel */
  4494. 1, 2, 3, 4, 5, 6, 7
  4495. };
  4496. static u8 iwl4965_eeprom_band_7[] = { /* 5.2 FAT channel */
  4497. 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
  4498. };
  4499. static void iwl4965_init_band_reference(const struct iwl4965_priv *priv,
  4500. int band,
  4501. int *eeprom_ch_count,
  4502. const struct iwl4965_eeprom_channel
  4503. **eeprom_ch_info,
  4504. const u8 **eeprom_ch_index)
  4505. {
  4506. switch (band) {
  4507. case 1: /* 2.4GHz band */
  4508. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_1);
  4509. *eeprom_ch_info = priv->eeprom.band_1_channels;
  4510. *eeprom_ch_index = iwl4965_eeprom_band_1;
  4511. break;
  4512. case 2: /* 4.9GHz band */
  4513. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_2);
  4514. *eeprom_ch_info = priv->eeprom.band_2_channels;
  4515. *eeprom_ch_index = iwl4965_eeprom_band_2;
  4516. break;
  4517. case 3: /* 5.2GHz band */
  4518. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_3);
  4519. *eeprom_ch_info = priv->eeprom.band_3_channels;
  4520. *eeprom_ch_index = iwl4965_eeprom_band_3;
  4521. break;
  4522. case 4: /* 5.5GHz band */
  4523. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_4);
  4524. *eeprom_ch_info = priv->eeprom.band_4_channels;
  4525. *eeprom_ch_index = iwl4965_eeprom_band_4;
  4526. break;
  4527. case 5: /* 5.7GHz band */
  4528. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_5);
  4529. *eeprom_ch_info = priv->eeprom.band_5_channels;
  4530. *eeprom_ch_index = iwl4965_eeprom_band_5;
  4531. break;
  4532. case 6: /* 2.4GHz FAT channels */
  4533. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_6);
  4534. *eeprom_ch_info = priv->eeprom.band_24_channels;
  4535. *eeprom_ch_index = iwl4965_eeprom_band_6;
  4536. break;
  4537. case 7: /* 5 GHz FAT channels */
  4538. *eeprom_ch_count = ARRAY_SIZE(iwl4965_eeprom_band_7);
  4539. *eeprom_ch_info = priv->eeprom.band_52_channels;
  4540. *eeprom_ch_index = iwl4965_eeprom_band_7;
  4541. break;
  4542. default:
  4543. BUG();
  4544. return;
  4545. }
  4546. }
  4547. /**
  4548. * iwl4965_get_channel_info - Find driver's private channel info
  4549. *
  4550. * Based on band and channel number.
  4551. */
  4552. const struct iwl4965_channel_info *iwl4965_get_channel_info(const struct iwl4965_priv *priv,
  4553. enum ieee80211_band band, u16 channel)
  4554. {
  4555. int i;
  4556. switch (band) {
  4557. case IEEE80211_BAND_5GHZ:
  4558. for (i = 14; i < priv->channel_count; i++) {
  4559. if (priv->channel_info[i].channel == channel)
  4560. return &priv->channel_info[i];
  4561. }
  4562. break;
  4563. case IEEE80211_BAND_2GHZ:
  4564. if (channel >= 1 && channel <= 14)
  4565. return &priv->channel_info[channel - 1];
  4566. break;
  4567. default:
  4568. BUG();
  4569. }
  4570. return NULL;
  4571. }
  4572. #define CHECK_AND_PRINT(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  4573. ? # x " " : "")
  4574. /**
  4575. * iwl4965_init_channel_map - Set up driver's info for all possible channels
  4576. */
  4577. static int iwl4965_init_channel_map(struct iwl4965_priv *priv)
  4578. {
  4579. int eeprom_ch_count = 0;
  4580. const u8 *eeprom_ch_index = NULL;
  4581. const struct iwl4965_eeprom_channel *eeprom_ch_info = NULL;
  4582. int band, ch;
  4583. struct iwl4965_channel_info *ch_info;
  4584. if (priv->channel_count) {
  4585. IWL_DEBUG_INFO("Channel map already initialized.\n");
  4586. return 0;
  4587. }
  4588. if (priv->eeprom.version < 0x2f) {
  4589. IWL_WARNING("Unsupported EEPROM version: 0x%04X\n",
  4590. priv->eeprom.version);
  4591. return -EINVAL;
  4592. }
  4593. IWL_DEBUG_INFO("Initializing regulatory info from EEPROM\n");
  4594. priv->channel_count =
  4595. ARRAY_SIZE(iwl4965_eeprom_band_1) +
  4596. ARRAY_SIZE(iwl4965_eeprom_band_2) +
  4597. ARRAY_SIZE(iwl4965_eeprom_band_3) +
  4598. ARRAY_SIZE(iwl4965_eeprom_band_4) +
  4599. ARRAY_SIZE(iwl4965_eeprom_band_5);
  4600. IWL_DEBUG_INFO("Parsing data for %d channels.\n", priv->channel_count);
  4601. priv->channel_info = kzalloc(sizeof(struct iwl4965_channel_info) *
  4602. priv->channel_count, GFP_KERNEL);
  4603. if (!priv->channel_info) {
  4604. IWL_ERROR("Could not allocate channel_info\n");
  4605. priv->channel_count = 0;
  4606. return -ENOMEM;
  4607. }
  4608. ch_info = priv->channel_info;
  4609. /* Loop through the 5 EEPROM bands adding them in order to the
  4610. * channel map we maintain (that contains additional information than
  4611. * what just in the EEPROM) */
  4612. for (band = 1; band <= 5; band++) {
  4613. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4614. &eeprom_ch_info, &eeprom_ch_index);
  4615. /* Loop through each band adding each of the channels */
  4616. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4617. ch_info->channel = eeprom_ch_index[ch];
  4618. ch_info->band = (band == 1) ? IEEE80211_BAND_2GHZ :
  4619. IEEE80211_BAND_5GHZ;
  4620. /* permanently store EEPROM's channel regulatory flags
  4621. * and max power in channel info database. */
  4622. ch_info->eeprom = eeprom_ch_info[ch];
  4623. /* Copy the run-time flags so they are there even on
  4624. * invalid channels */
  4625. ch_info->flags = eeprom_ch_info[ch].flags;
  4626. if (!(is_channel_valid(ch_info))) {
  4627. IWL_DEBUG_INFO("Ch. %d Flags %x [%sGHz] - "
  4628. "No traffic\n",
  4629. ch_info->channel,
  4630. ch_info->flags,
  4631. is_channel_a_band(ch_info) ?
  4632. "5.2" : "2.4");
  4633. ch_info++;
  4634. continue;
  4635. }
  4636. /* Initialize regulatory-based run-time data */
  4637. ch_info->max_power_avg = ch_info->curr_txpow =
  4638. eeprom_ch_info[ch].max_power_avg;
  4639. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  4640. ch_info->min_power = 0;
  4641. IWL_DEBUG_INFO("Ch. %d [%sGHz] %s%s%s%s%s%s(0x%02x"
  4642. " %ddBm): Ad-Hoc %ssupported\n",
  4643. ch_info->channel,
  4644. is_channel_a_band(ch_info) ?
  4645. "5.2" : "2.4",
  4646. CHECK_AND_PRINT(IBSS),
  4647. CHECK_AND_PRINT(ACTIVE),
  4648. CHECK_AND_PRINT(RADAR),
  4649. CHECK_AND_PRINT(WIDE),
  4650. CHECK_AND_PRINT(NARROW),
  4651. CHECK_AND_PRINT(DFS),
  4652. eeprom_ch_info[ch].flags,
  4653. eeprom_ch_info[ch].max_power_avg,
  4654. ((eeprom_ch_info[ch].
  4655. flags & EEPROM_CHANNEL_IBSS)
  4656. && !(eeprom_ch_info[ch].
  4657. flags & EEPROM_CHANNEL_RADAR))
  4658. ? "" : "not ");
  4659. /* Set the user_txpower_limit to the highest power
  4660. * supported by any channel */
  4661. if (eeprom_ch_info[ch].max_power_avg >
  4662. priv->user_txpower_limit)
  4663. priv->user_txpower_limit =
  4664. eeprom_ch_info[ch].max_power_avg;
  4665. ch_info++;
  4666. }
  4667. }
  4668. /* Two additional EEPROM bands for 2.4 and 5 GHz FAT channels */
  4669. for (band = 6; band <= 7; band++) {
  4670. enum ieee80211_band ieeeband;
  4671. u8 fat_extension_chan;
  4672. iwl4965_init_band_reference(priv, band, &eeprom_ch_count,
  4673. &eeprom_ch_info, &eeprom_ch_index);
  4674. /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
  4675. ieeeband = (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  4676. /* Loop through each band adding each of the channels */
  4677. for (ch = 0; ch < eeprom_ch_count; ch++) {
  4678. if ((band == 6) &&
  4679. ((eeprom_ch_index[ch] == 5) ||
  4680. (eeprom_ch_index[ch] == 6) ||
  4681. (eeprom_ch_index[ch] == 7)))
  4682. fat_extension_chan = HT_IE_EXT_CHANNEL_MAX;
  4683. else
  4684. fat_extension_chan = HT_IE_EXT_CHANNEL_ABOVE;
  4685. /* Set up driver's info for lower half */
  4686. iwl4965_set_fat_chan_info(priv, ieeeband,
  4687. eeprom_ch_index[ch],
  4688. &(eeprom_ch_info[ch]),
  4689. fat_extension_chan);
  4690. /* Set up driver's info for upper half */
  4691. iwl4965_set_fat_chan_info(priv, ieeeband,
  4692. (eeprom_ch_index[ch] + 4),
  4693. &(eeprom_ch_info[ch]),
  4694. HT_IE_EXT_CHANNEL_BELOW);
  4695. }
  4696. }
  4697. return 0;
  4698. }
  4699. /*
  4700. * iwl4965_free_channel_map - undo allocations in iwl4965_init_channel_map
  4701. */
  4702. static void iwl4965_free_channel_map(struct iwl4965_priv *priv)
  4703. {
  4704. kfree(priv->channel_info);
  4705. priv->channel_count = 0;
  4706. }
  4707. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  4708. * sending probe req. This should be set long enough to hear probe responses
  4709. * from more than one AP. */
  4710. #define IWL_ACTIVE_DWELL_TIME_24 (20) /* all times in msec */
  4711. #define IWL_ACTIVE_DWELL_TIME_52 (10)
  4712. /* For faster active scanning, scan will move to the next channel if fewer than
  4713. * PLCP_QUIET_THRESH packets are heard on this channel within
  4714. * ACTIVE_QUIET_TIME after sending probe request. This shortens the dwell
  4715. * time if it's a quiet channel (nothing responded to our probe, and there's
  4716. * no other traffic).
  4717. * Disable "quiet" feature by setting PLCP_QUIET_THRESH to 0. */
  4718. #define IWL_PLCP_QUIET_THRESH __constant_cpu_to_le16(1) /* packets */
  4719. #define IWL_ACTIVE_QUIET_TIME __constant_cpu_to_le16(5) /* msec */
  4720. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  4721. * Must be set longer than active dwell time.
  4722. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  4723. #define IWL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  4724. #define IWL_PASSIVE_DWELL_TIME_52 (10)
  4725. #define IWL_PASSIVE_DWELL_BASE (100)
  4726. #define IWL_CHANNEL_TUNE_TIME 5
  4727. static inline u16 iwl4965_get_active_dwell_time(struct iwl4965_priv *priv,
  4728. enum ieee80211_band band)
  4729. {
  4730. if (band == IEEE80211_BAND_5GHZ)
  4731. return IWL_ACTIVE_DWELL_TIME_52;
  4732. else
  4733. return IWL_ACTIVE_DWELL_TIME_24;
  4734. }
  4735. static u16 iwl4965_get_passive_dwell_time(struct iwl4965_priv *priv,
  4736. enum ieee80211_band band)
  4737. {
  4738. u16 active = iwl4965_get_active_dwell_time(priv, band);
  4739. u16 passive = (band != IEEE80211_BAND_5GHZ) ?
  4740. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_24 :
  4741. IWL_PASSIVE_DWELL_BASE + IWL_PASSIVE_DWELL_TIME_52;
  4742. if (iwl4965_is_associated(priv)) {
  4743. /* If we're associated, we clamp the maximum passive
  4744. * dwell time to be 98% of the beacon interval (minus
  4745. * 2 * channel tune time) */
  4746. passive = priv->beacon_int;
  4747. if ((passive > IWL_PASSIVE_DWELL_BASE) || !passive)
  4748. passive = IWL_PASSIVE_DWELL_BASE;
  4749. passive = (passive * 98) / 100 - IWL_CHANNEL_TUNE_TIME * 2;
  4750. }
  4751. if (passive <= active)
  4752. passive = active + 1;
  4753. return passive;
  4754. }
  4755. static int iwl4965_get_channels_for_scan(struct iwl4965_priv *priv,
  4756. enum ieee80211_band band,
  4757. u8 is_active, u8 direct_mask,
  4758. struct iwl4965_scan_channel *scan_ch)
  4759. {
  4760. const struct ieee80211_channel *channels = NULL;
  4761. const struct ieee80211_supported_band *sband;
  4762. const struct iwl4965_channel_info *ch_info;
  4763. u16 passive_dwell = 0;
  4764. u16 active_dwell = 0;
  4765. int added, i;
  4766. sband = iwl4965_get_hw_mode(priv, band);
  4767. if (!sband)
  4768. return 0;
  4769. channels = sband->channels;
  4770. active_dwell = iwl4965_get_active_dwell_time(priv, band);
  4771. passive_dwell = iwl4965_get_passive_dwell_time(priv, band);
  4772. for (i = 0, added = 0; i < sband->n_channels; i++) {
  4773. if (ieee80211_frequency_to_channel(channels[i].center_freq) ==
  4774. le16_to_cpu(priv->active_rxon.channel)) {
  4775. if (iwl4965_is_associated(priv)) {
  4776. IWL_DEBUG_SCAN
  4777. ("Skipping current channel %d\n",
  4778. le16_to_cpu(priv->active_rxon.channel));
  4779. continue;
  4780. }
  4781. } else if (priv->only_active_channel)
  4782. continue;
  4783. scan_ch->channel = ieee80211_frequency_to_channel(channels[i].center_freq);
  4784. ch_info = iwl4965_get_channel_info(priv, band,
  4785. scan_ch->channel);
  4786. if (!is_channel_valid(ch_info)) {
  4787. IWL_DEBUG_SCAN("Channel %d is INVALID for this SKU.\n",
  4788. scan_ch->channel);
  4789. continue;
  4790. }
  4791. if (!is_active || is_channel_passive(ch_info) ||
  4792. (channels[i].flags & IEEE80211_CHAN_PASSIVE_SCAN))
  4793. scan_ch->type = 0; /* passive */
  4794. else
  4795. scan_ch->type = 1; /* active */
  4796. if (scan_ch->type & 1)
  4797. scan_ch->type |= (direct_mask << 1);
  4798. if (is_channel_narrow(ch_info))
  4799. scan_ch->type |= (1 << 7);
  4800. scan_ch->active_dwell = cpu_to_le16(active_dwell);
  4801. scan_ch->passive_dwell = cpu_to_le16(passive_dwell);
  4802. /* Set txpower levels to defaults */
  4803. scan_ch->tpc.dsp_atten = 110;
  4804. /* scan_pwr_info->tpc.dsp_atten; */
  4805. /*scan_pwr_info->tpc.tx_gain; */
  4806. if (band == IEEE80211_BAND_5GHZ)
  4807. scan_ch->tpc.tx_gain = ((1 << 5) | (3 << 3)) | 3;
  4808. else {
  4809. scan_ch->tpc.tx_gain = ((1 << 5) | (5 << 3));
  4810. /* NOTE: if we were doing 6Mb OFDM for scans we'd use
  4811. * power level:
  4812. * scan_ch->tpc.tx_gain = ((1 << 5) | (2 << 3)) | 3;
  4813. */
  4814. }
  4815. IWL_DEBUG_SCAN("Scanning %d [%s %d]\n",
  4816. scan_ch->channel,
  4817. (scan_ch->type & 1) ? "ACTIVE" : "PASSIVE",
  4818. (scan_ch->type & 1) ?
  4819. active_dwell : passive_dwell);
  4820. scan_ch++;
  4821. added++;
  4822. }
  4823. IWL_DEBUG_SCAN("total channels to scan %d \n", added);
  4824. return added;
  4825. }
  4826. static void iwl4965_init_hw_rates(struct iwl4965_priv *priv,
  4827. struct ieee80211_rate *rates)
  4828. {
  4829. int i;
  4830. for (i = 0; i < IWL_RATE_COUNT; i++) {
  4831. rates[i].bitrate = iwl4965_rates[i].ieee * 5;
  4832. rates[i].hw_value = i; /* Rate scaling will work on indexes */
  4833. rates[i].hw_value_short = i;
  4834. rates[i].flags = 0;
  4835. if ((i > IWL_LAST_OFDM_RATE) || (i < IWL_FIRST_OFDM_RATE)) {
  4836. /*
  4837. * If CCK != 1M then set short preamble rate flag.
  4838. */
  4839. rates[i].flags |= (iwl4965_rates[i].plcp == 10) ?
  4840. 0 : IEEE80211_RATE_SHORT_PREAMBLE;
  4841. }
  4842. }
  4843. }
  4844. /**
  4845. * iwl4965_init_geos - Initialize mac80211's geo/channel info based from eeprom
  4846. */
  4847. static int iwl4965_init_geos(struct iwl4965_priv *priv)
  4848. {
  4849. struct iwl4965_channel_info *ch;
  4850. struct ieee80211_supported_band *band;
  4851. struct ieee80211_channel *channels;
  4852. struct ieee80211_channel *geo_ch;
  4853. struct ieee80211_rate *rates;
  4854. int i = 0;
  4855. if (priv->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  4856. priv->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  4857. IWL_DEBUG_INFO("Geography modes already initialized.\n");
  4858. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4859. return 0;
  4860. }
  4861. channels = kzalloc(sizeof(struct ieee80211_channel) *
  4862. priv->channel_count, GFP_KERNEL);
  4863. if (!channels)
  4864. return -ENOMEM;
  4865. rates = kzalloc((sizeof(struct ieee80211_rate) * (IWL_MAX_RATES + 1)),
  4866. GFP_KERNEL);
  4867. if (!rates) {
  4868. kfree(channels);
  4869. return -ENOMEM;
  4870. }
  4871. /* 5.2GHz channels start after the 2.4GHz channels */
  4872. #ifdef CONFIG_IWL4965_HT
  4873. iwl4965_init_ht_hw_capab(&modes[A].ht_info, MODE_IEEE80211A);
  4874. #endif
  4875. #ifdef CONFIG_IWL4965_HT
  4876. iwl4965_init_ht_hw_capab(&modes[G].ht_info, MODE_IEEE80211G);
  4877. #endif
  4878. band = &priv->bands[IEEE80211_BAND_5GHZ];
  4879. band->channels = &channels[ARRAY_SIZE(iwl4965_eeprom_band_1)];
  4880. band->bitrates = &rates[4];
  4881. band->n_bitrates = 8; /* just OFDM */
  4882. band = &priv->bands[IEEE80211_BAND_2GHZ];
  4883. band->channels = channels;
  4884. band->bitrates = rates;
  4885. band->n_bitrates = 12; /* OFDM & CCK */
  4886. priv->ieee_channels = channels;
  4887. priv->ieee_rates = rates;
  4888. iwl4965_init_hw_rates(priv, rates);
  4889. for (i = 0, geo_ch = channels; i < priv->channel_count; i++) {
  4890. ch = &priv->channel_info[i];
  4891. if (!is_channel_valid(ch)) {
  4892. IWL_DEBUG_INFO("Channel %d [%sGHz] is restricted -- "
  4893. "skipping.\n",
  4894. ch->channel, is_channel_a_band(ch) ?
  4895. "5.2" : "2.4");
  4896. continue;
  4897. }
  4898. if (is_channel_a_band(ch)) {
  4899. geo_ch = &priv->bands[IEEE80211_BAND_5GHZ].channels[priv->bands[IEEE80211_BAND_5GHZ].n_channels++];
  4900. } else
  4901. geo_ch = &priv->bands[IEEE80211_BAND_2GHZ].channels[priv->bands[IEEE80211_BAND_2GHZ].n_channels++];
  4902. geo_ch->center_freq = ieee80211chan2mhz(ch->channel);
  4903. geo_ch->max_power = ch->max_power_avg;
  4904. geo_ch->max_antenna_gain = 0xff;
  4905. if (is_channel_valid(ch)) {
  4906. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  4907. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  4908. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  4909. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  4910. if (ch->flags & EEPROM_CHANNEL_RADAR)
  4911. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  4912. if (ch->max_power_avg > priv->max_channel_txpower_limit)
  4913. priv->max_channel_txpower_limit =
  4914. ch->max_power_avg;
  4915. } else
  4916. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  4917. }
  4918. if ((priv->bands[IEEE80211_BAND_5GHZ].n_channels == 0) && priv->is_abg) {
  4919. printk(KERN_INFO DRV_NAME
  4920. ": Incorrectly detected BG card as ABG. Please send "
  4921. "your PCI ID 0x%04X:0x%04X to maintainer.\n",
  4922. priv->pci_dev->device, priv->pci_dev->subsystem_device);
  4923. priv->is_abg = 0;
  4924. }
  4925. printk(KERN_INFO DRV_NAME
  4926. ": Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  4927. priv->bands[IEEE80211_BAND_2GHZ].n_channels,
  4928. priv->bands[IEEE80211_BAND_5GHZ].n_channels);
  4929. priv->hw->wiphy->bands[IEEE80211_BAND_2GHZ] = &priv->bands[IEEE80211_BAND_2GHZ];
  4930. priv->hw->wiphy->bands[IEEE80211_BAND_5GHZ] = &priv->bands[IEEE80211_BAND_5GHZ];
  4931. set_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4932. return 0;
  4933. }
  4934. /*
  4935. * iwl4965_free_geos - undo allocations in iwl4965_init_geos
  4936. */
  4937. static void iwl4965_free_geos(struct iwl4965_priv *priv)
  4938. {
  4939. kfree(priv->ieee_channels);
  4940. kfree(priv->ieee_rates);
  4941. clear_bit(STATUS_GEO_CONFIGURED, &priv->status);
  4942. }
  4943. /******************************************************************************
  4944. *
  4945. * uCode download functions
  4946. *
  4947. ******************************************************************************/
  4948. static void iwl4965_dealloc_ucode_pci(struct iwl4965_priv *priv)
  4949. {
  4950. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_code);
  4951. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data);
  4952. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  4953. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init);
  4954. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  4955. iwl_free_fw_desc(priv->pci_dev, &priv->ucode_boot);
  4956. }
  4957. /**
  4958. * iwl4965_verify_inst_full - verify runtime uCode image in card vs. host,
  4959. * looking at all data.
  4960. */
  4961. static int iwl4965_verify_inst_full(struct iwl4965_priv *priv, __le32 *image,
  4962. u32 len)
  4963. {
  4964. u32 val;
  4965. u32 save_len = len;
  4966. int rc = 0;
  4967. u32 errcnt;
  4968. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  4969. rc = iwl4965_grab_nic_access(priv);
  4970. if (rc)
  4971. return rc;
  4972. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR, RTC_INST_LOWER_BOUND);
  4973. errcnt = 0;
  4974. for (; len > 0; len -= sizeof(u32), image++) {
  4975. /* read data comes through single port, auto-incr addr */
  4976. /* NOTE: Use the debugless read so we don't flood kernel log
  4977. * if IWL_DL_IO is set */
  4978. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  4979. if (val != le32_to_cpu(*image)) {
  4980. IWL_ERROR("uCode INST section is invalid at "
  4981. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  4982. save_len - len, val, le32_to_cpu(*image));
  4983. rc = -EIO;
  4984. errcnt++;
  4985. if (errcnt >= 20)
  4986. break;
  4987. }
  4988. }
  4989. iwl4965_release_nic_access(priv);
  4990. if (!errcnt)
  4991. IWL_DEBUG_INFO
  4992. ("ucode image in INSTRUCTION memory is good\n");
  4993. return rc;
  4994. }
  4995. /**
  4996. * iwl4965_verify_inst_sparse - verify runtime uCode image in card vs. host,
  4997. * using sample data 100 bytes apart. If these sample points are good,
  4998. * it's a pretty good bet that everything between them is good, too.
  4999. */
  5000. static int iwl4965_verify_inst_sparse(struct iwl4965_priv *priv, __le32 *image, u32 len)
  5001. {
  5002. u32 val;
  5003. int rc = 0;
  5004. u32 errcnt = 0;
  5005. u32 i;
  5006. IWL_DEBUG_INFO("ucode inst image size is %u\n", len);
  5007. rc = iwl4965_grab_nic_access(priv);
  5008. if (rc)
  5009. return rc;
  5010. for (i = 0; i < len; i += 100, image += 100/sizeof(u32)) {
  5011. /* read data comes through single port, auto-incr addr */
  5012. /* NOTE: Use the debugless read so we don't flood kernel log
  5013. * if IWL_DL_IO is set */
  5014. iwl4965_write_direct32(priv, HBUS_TARG_MEM_RADDR,
  5015. i + RTC_INST_LOWER_BOUND);
  5016. val = _iwl4965_read_direct32(priv, HBUS_TARG_MEM_RDAT);
  5017. if (val != le32_to_cpu(*image)) {
  5018. #if 0 /* Enable this if you want to see details */
  5019. IWL_ERROR("uCode INST section is invalid at "
  5020. "offset 0x%x, is 0x%x, s/b 0x%x\n",
  5021. i, val, *image);
  5022. #endif
  5023. rc = -EIO;
  5024. errcnt++;
  5025. if (errcnt >= 3)
  5026. break;
  5027. }
  5028. }
  5029. iwl4965_release_nic_access(priv);
  5030. return rc;
  5031. }
  5032. /**
  5033. * iwl4965_verify_ucode - determine which instruction image is in SRAM,
  5034. * and verify its contents
  5035. */
  5036. static int iwl4965_verify_ucode(struct iwl4965_priv *priv)
  5037. {
  5038. __le32 *image;
  5039. u32 len;
  5040. int rc = 0;
  5041. /* Try bootstrap */
  5042. image = (__le32 *)priv->ucode_boot.v_addr;
  5043. len = priv->ucode_boot.len;
  5044. rc = iwl4965_verify_inst_sparse(priv, image, len);
  5045. if (rc == 0) {
  5046. IWL_DEBUG_INFO("Bootstrap uCode is good in inst SRAM\n");
  5047. return 0;
  5048. }
  5049. /* Try initialize */
  5050. image = (__le32 *)priv->ucode_init.v_addr;
  5051. len = priv->ucode_init.len;
  5052. rc = iwl4965_verify_inst_sparse(priv, image, len);
  5053. if (rc == 0) {
  5054. IWL_DEBUG_INFO("Initialize uCode is good in inst SRAM\n");
  5055. return 0;
  5056. }
  5057. /* Try runtime/protocol */
  5058. image = (__le32 *)priv->ucode_code.v_addr;
  5059. len = priv->ucode_code.len;
  5060. rc = iwl4965_verify_inst_sparse(priv, image, len);
  5061. if (rc == 0) {
  5062. IWL_DEBUG_INFO("Runtime uCode is good in inst SRAM\n");
  5063. return 0;
  5064. }
  5065. IWL_ERROR("NO VALID UCODE IMAGE IN INSTRUCTION SRAM!!\n");
  5066. /* Since nothing seems to match, show first several data entries in
  5067. * instruction SRAM, so maybe visual inspection will give a clue.
  5068. * Selection of bootstrap image (vs. other images) is arbitrary. */
  5069. image = (__le32 *)priv->ucode_boot.v_addr;
  5070. len = priv->ucode_boot.len;
  5071. rc = iwl4965_verify_inst_full(priv, image, len);
  5072. return rc;
  5073. }
  5074. /* check contents of special bootstrap uCode SRAM */
  5075. static int iwl4965_verify_bsm(struct iwl4965_priv *priv)
  5076. {
  5077. __le32 *image = priv->ucode_boot.v_addr;
  5078. u32 len = priv->ucode_boot.len;
  5079. u32 reg;
  5080. u32 val;
  5081. IWL_DEBUG_INFO("Begin verify bsm\n");
  5082. /* verify BSM SRAM contents */
  5083. val = iwl4965_read_prph(priv, BSM_WR_DWCOUNT_REG);
  5084. for (reg = BSM_SRAM_LOWER_BOUND;
  5085. reg < BSM_SRAM_LOWER_BOUND + len;
  5086. reg += sizeof(u32), image ++) {
  5087. val = iwl4965_read_prph(priv, reg);
  5088. if (val != le32_to_cpu(*image)) {
  5089. IWL_ERROR("BSM uCode verification failed at "
  5090. "addr 0x%08X+%u (of %u), is 0x%x, s/b 0x%x\n",
  5091. BSM_SRAM_LOWER_BOUND,
  5092. reg - BSM_SRAM_LOWER_BOUND, len,
  5093. val, le32_to_cpu(*image));
  5094. return -EIO;
  5095. }
  5096. }
  5097. IWL_DEBUG_INFO("BSM bootstrap uCode image OK\n");
  5098. return 0;
  5099. }
  5100. /**
  5101. * iwl4965_load_bsm - Load bootstrap instructions
  5102. *
  5103. * BSM operation:
  5104. *
  5105. * The Bootstrap State Machine (BSM) stores a short bootstrap uCode program
  5106. * in special SRAM that does not power down during RFKILL. When powering back
  5107. * up after power-saving sleeps (or during initial uCode load), the BSM loads
  5108. * the bootstrap program into the on-board processor, and starts it.
  5109. *
  5110. * The bootstrap program loads (via DMA) instructions and data for a new
  5111. * program from host DRAM locations indicated by the host driver in the
  5112. * BSM_DRAM_* registers. Once the new program is loaded, it starts
  5113. * automatically.
  5114. *
  5115. * When initializing the NIC, the host driver points the BSM to the
  5116. * "initialize" uCode image. This uCode sets up some internal data, then
  5117. * notifies host via "initialize alive" that it is complete.
  5118. *
  5119. * The host then replaces the BSM_DRAM_* pointer values to point to the
  5120. * normal runtime uCode instructions and a backup uCode data cache buffer
  5121. * (filled initially with starting data values for the on-board processor),
  5122. * then triggers the "initialize" uCode to load and launch the runtime uCode,
  5123. * which begins normal operation.
  5124. *
  5125. * When doing a power-save shutdown, runtime uCode saves data SRAM into
  5126. * the backup data cache in DRAM before SRAM is powered down.
  5127. *
  5128. * When powering back up, the BSM loads the bootstrap program. This reloads
  5129. * the runtime uCode instructions and the backup data cache into SRAM,
  5130. * and re-launches the runtime uCode from where it left off.
  5131. */
  5132. static int iwl4965_load_bsm(struct iwl4965_priv *priv)
  5133. {
  5134. __le32 *image = priv->ucode_boot.v_addr;
  5135. u32 len = priv->ucode_boot.len;
  5136. dma_addr_t pinst;
  5137. dma_addr_t pdata;
  5138. u32 inst_len;
  5139. u32 data_len;
  5140. int rc;
  5141. int i;
  5142. u32 done;
  5143. u32 reg_offset;
  5144. IWL_DEBUG_INFO("Begin load bsm\n");
  5145. /* make sure bootstrap program is no larger than BSM's SRAM size */
  5146. if (len > IWL_MAX_BSM_SIZE)
  5147. return -EINVAL;
  5148. /* Tell bootstrap uCode where to find the "Initialize" uCode
  5149. * in host DRAM ... host DRAM physical address bits 35:4 for 4965.
  5150. * NOTE: iwl4965_initialize_alive_start() will replace these values,
  5151. * after the "initialize" uCode has run, to point to
  5152. * runtime/protocol instructions and backup data cache. */
  5153. pinst = priv->ucode_init.p_addr >> 4;
  5154. pdata = priv->ucode_init_data.p_addr >> 4;
  5155. inst_len = priv->ucode_init.len;
  5156. data_len = priv->ucode_init_data.len;
  5157. rc = iwl4965_grab_nic_access(priv);
  5158. if (rc)
  5159. return rc;
  5160. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5161. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5162. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG, inst_len);
  5163. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG, data_len);
  5164. /* Fill BSM memory with bootstrap instructions */
  5165. for (reg_offset = BSM_SRAM_LOWER_BOUND;
  5166. reg_offset < BSM_SRAM_LOWER_BOUND + len;
  5167. reg_offset += sizeof(u32), image++)
  5168. _iwl4965_write_prph(priv, reg_offset,
  5169. le32_to_cpu(*image));
  5170. rc = iwl4965_verify_bsm(priv);
  5171. if (rc) {
  5172. iwl4965_release_nic_access(priv);
  5173. return rc;
  5174. }
  5175. /* Tell BSM to copy from BSM SRAM into instruction SRAM, when asked */
  5176. iwl4965_write_prph(priv, BSM_WR_MEM_SRC_REG, 0x0);
  5177. iwl4965_write_prph(priv, BSM_WR_MEM_DST_REG,
  5178. RTC_INST_LOWER_BOUND);
  5179. iwl4965_write_prph(priv, BSM_WR_DWCOUNT_REG, len / sizeof(u32));
  5180. /* Load bootstrap code into instruction SRAM now,
  5181. * to prepare to load "initialize" uCode */
  5182. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  5183. BSM_WR_CTRL_REG_BIT_START);
  5184. /* Wait for load of bootstrap uCode to finish */
  5185. for (i = 0; i < 100; i++) {
  5186. done = iwl4965_read_prph(priv, BSM_WR_CTRL_REG);
  5187. if (!(done & BSM_WR_CTRL_REG_BIT_START))
  5188. break;
  5189. udelay(10);
  5190. }
  5191. if (i < 100)
  5192. IWL_DEBUG_INFO("BSM write complete, poll %d iterations\n", i);
  5193. else {
  5194. IWL_ERROR("BSM write did not complete!\n");
  5195. return -EIO;
  5196. }
  5197. /* Enable future boot loads whenever power management unit triggers it
  5198. * (e.g. when powering back up after power-save shutdown) */
  5199. iwl4965_write_prph(priv, BSM_WR_CTRL_REG,
  5200. BSM_WR_CTRL_REG_BIT_START_EN);
  5201. iwl4965_release_nic_access(priv);
  5202. return 0;
  5203. }
  5204. static void iwl4965_nic_start(struct iwl4965_priv *priv)
  5205. {
  5206. /* Remove all resets to allow NIC to operate */
  5207. iwl4965_write32(priv, CSR_RESET, 0);
  5208. }
  5209. /**
  5210. * iwl4965_read_ucode - Read uCode images from disk file.
  5211. *
  5212. * Copy into buffers for card to fetch via bus-mastering
  5213. */
  5214. static int iwl4965_read_ucode(struct iwl4965_priv *priv)
  5215. {
  5216. struct iwl4965_ucode *ucode;
  5217. int ret;
  5218. const struct firmware *ucode_raw;
  5219. const char *name = "iwlwifi-4965" IWL4965_UCODE_API ".ucode";
  5220. u8 *src;
  5221. size_t len;
  5222. u32 ver, inst_size, data_size, init_size, init_data_size, boot_size;
  5223. /* Ask kernel firmware_class module to get the boot firmware off disk.
  5224. * request_firmware() is synchronous, file is in memory on return. */
  5225. ret = request_firmware(&ucode_raw, name, &priv->pci_dev->dev);
  5226. if (ret < 0) {
  5227. IWL_ERROR("%s firmware file req failed: Reason %d\n",
  5228. name, ret);
  5229. goto error;
  5230. }
  5231. IWL_DEBUG_INFO("Got firmware '%s' file (%zd bytes) from disk\n",
  5232. name, ucode_raw->size);
  5233. /* Make sure that we got at least our header! */
  5234. if (ucode_raw->size < sizeof(*ucode)) {
  5235. IWL_ERROR("File size way too small!\n");
  5236. ret = -EINVAL;
  5237. goto err_release;
  5238. }
  5239. /* Data from ucode file: header followed by uCode images */
  5240. ucode = (void *)ucode_raw->data;
  5241. ver = le32_to_cpu(ucode->ver);
  5242. inst_size = le32_to_cpu(ucode->inst_size);
  5243. data_size = le32_to_cpu(ucode->data_size);
  5244. init_size = le32_to_cpu(ucode->init_size);
  5245. init_data_size = le32_to_cpu(ucode->init_data_size);
  5246. boot_size = le32_to_cpu(ucode->boot_size);
  5247. IWL_DEBUG_INFO("f/w package hdr ucode version = 0x%x\n", ver);
  5248. IWL_DEBUG_INFO("f/w package hdr runtime inst size = %u\n",
  5249. inst_size);
  5250. IWL_DEBUG_INFO("f/w package hdr runtime data size = %u\n",
  5251. data_size);
  5252. IWL_DEBUG_INFO("f/w package hdr init inst size = %u\n",
  5253. init_size);
  5254. IWL_DEBUG_INFO("f/w package hdr init data size = %u\n",
  5255. init_data_size);
  5256. IWL_DEBUG_INFO("f/w package hdr boot inst size = %u\n",
  5257. boot_size);
  5258. /* Verify size of file vs. image size info in file's header */
  5259. if (ucode_raw->size < sizeof(*ucode) +
  5260. inst_size + data_size + init_size +
  5261. init_data_size + boot_size) {
  5262. IWL_DEBUG_INFO("uCode file size %d too small\n",
  5263. (int)ucode_raw->size);
  5264. ret = -EINVAL;
  5265. goto err_release;
  5266. }
  5267. /* Verify that uCode images will fit in card's SRAM */
  5268. if (inst_size > IWL_MAX_INST_SIZE) {
  5269. IWL_DEBUG_INFO("uCode instr len %d too large to fit in\n",
  5270. inst_size);
  5271. ret = -EINVAL;
  5272. goto err_release;
  5273. }
  5274. if (data_size > IWL_MAX_DATA_SIZE) {
  5275. IWL_DEBUG_INFO("uCode data len %d too large to fit in\n",
  5276. data_size);
  5277. ret = -EINVAL;
  5278. goto err_release;
  5279. }
  5280. if (init_size > IWL_MAX_INST_SIZE) {
  5281. IWL_DEBUG_INFO
  5282. ("uCode init instr len %d too large to fit in\n",
  5283. init_size);
  5284. ret = -EINVAL;
  5285. goto err_release;
  5286. }
  5287. if (init_data_size > IWL_MAX_DATA_SIZE) {
  5288. IWL_DEBUG_INFO
  5289. ("uCode init data len %d too large to fit in\n",
  5290. init_data_size);
  5291. ret = -EINVAL;
  5292. goto err_release;
  5293. }
  5294. if (boot_size > IWL_MAX_BSM_SIZE) {
  5295. IWL_DEBUG_INFO
  5296. ("uCode boot instr len %d too large to fit in\n",
  5297. boot_size);
  5298. ret = -EINVAL;
  5299. goto err_release;
  5300. }
  5301. /* Allocate ucode buffers for card's bus-master loading ... */
  5302. /* Runtime instructions and 2 copies of data:
  5303. * 1) unmodified from disk
  5304. * 2) backup cache for save/restore during power-downs */
  5305. priv->ucode_code.len = inst_size;
  5306. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_code);
  5307. priv->ucode_data.len = data_size;
  5308. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data);
  5309. priv->ucode_data_backup.len = data_size;
  5310. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_data_backup);
  5311. /* Initialization instructions and data */
  5312. if (init_size && init_data_size) {
  5313. priv->ucode_init.len = init_size;
  5314. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init);
  5315. priv->ucode_init_data.len = init_data_size;
  5316. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_init_data);
  5317. if (!priv->ucode_init.v_addr || !priv->ucode_init_data.v_addr)
  5318. goto err_pci_alloc;
  5319. }
  5320. /* Bootstrap (instructions only, no data) */
  5321. if (boot_size) {
  5322. priv->ucode_boot.len = boot_size;
  5323. iwl_alloc_fw_desc(priv->pci_dev, &priv->ucode_boot);
  5324. if (!priv->ucode_boot.v_addr)
  5325. goto err_pci_alloc;
  5326. }
  5327. /* Copy images into buffers for card's bus-master reads ... */
  5328. /* Runtime instructions (first block of data in file) */
  5329. src = &ucode->data[0];
  5330. len = priv->ucode_code.len;
  5331. IWL_DEBUG_INFO("Copying (but not loading) uCode instr len %Zd\n", len);
  5332. memcpy(priv->ucode_code.v_addr, src, len);
  5333. IWL_DEBUG_INFO("uCode instr buf vaddr = 0x%p, paddr = 0x%08x\n",
  5334. priv->ucode_code.v_addr, (u32)priv->ucode_code.p_addr);
  5335. /* Runtime data (2nd block)
  5336. * NOTE: Copy into backup buffer will be done in iwl4965_up() */
  5337. src = &ucode->data[inst_size];
  5338. len = priv->ucode_data.len;
  5339. IWL_DEBUG_INFO("Copying (but not loading) uCode data len %Zd\n", len);
  5340. memcpy(priv->ucode_data.v_addr, src, len);
  5341. memcpy(priv->ucode_data_backup.v_addr, src, len);
  5342. /* Initialization instructions (3rd block) */
  5343. if (init_size) {
  5344. src = &ucode->data[inst_size + data_size];
  5345. len = priv->ucode_init.len;
  5346. IWL_DEBUG_INFO("Copying (but not loading) init instr len %Zd\n",
  5347. len);
  5348. memcpy(priv->ucode_init.v_addr, src, len);
  5349. }
  5350. /* Initialization data (4th block) */
  5351. if (init_data_size) {
  5352. src = &ucode->data[inst_size + data_size + init_size];
  5353. len = priv->ucode_init_data.len;
  5354. IWL_DEBUG_INFO("Copying (but not loading) init data len %Zd\n",
  5355. len);
  5356. memcpy(priv->ucode_init_data.v_addr, src, len);
  5357. }
  5358. /* Bootstrap instructions (5th block) */
  5359. src = &ucode->data[inst_size + data_size + init_size + init_data_size];
  5360. len = priv->ucode_boot.len;
  5361. IWL_DEBUG_INFO("Copying (but not loading) boot instr len %Zd\n", len);
  5362. memcpy(priv->ucode_boot.v_addr, src, len);
  5363. /* We have our copies now, allow OS release its copies */
  5364. release_firmware(ucode_raw);
  5365. return 0;
  5366. err_pci_alloc:
  5367. IWL_ERROR("failed to allocate pci memory\n");
  5368. ret = -ENOMEM;
  5369. iwl4965_dealloc_ucode_pci(priv);
  5370. err_release:
  5371. release_firmware(ucode_raw);
  5372. error:
  5373. return ret;
  5374. }
  5375. /**
  5376. * iwl4965_set_ucode_ptrs - Set uCode address location
  5377. *
  5378. * Tell initialization uCode where to find runtime uCode.
  5379. *
  5380. * BSM registers initially contain pointers to initialization uCode.
  5381. * We need to replace them to load runtime uCode inst and data,
  5382. * and to save runtime data when powering down.
  5383. */
  5384. static int iwl4965_set_ucode_ptrs(struct iwl4965_priv *priv)
  5385. {
  5386. dma_addr_t pinst;
  5387. dma_addr_t pdata;
  5388. int rc = 0;
  5389. unsigned long flags;
  5390. /* bits 35:4 for 4965 */
  5391. pinst = priv->ucode_code.p_addr >> 4;
  5392. pdata = priv->ucode_data_backup.p_addr >> 4;
  5393. spin_lock_irqsave(&priv->lock, flags);
  5394. rc = iwl4965_grab_nic_access(priv);
  5395. if (rc) {
  5396. spin_unlock_irqrestore(&priv->lock, flags);
  5397. return rc;
  5398. }
  5399. /* Tell bootstrap uCode where to find image to load */
  5400. iwl4965_write_prph(priv, BSM_DRAM_INST_PTR_REG, pinst);
  5401. iwl4965_write_prph(priv, BSM_DRAM_DATA_PTR_REG, pdata);
  5402. iwl4965_write_prph(priv, BSM_DRAM_DATA_BYTECOUNT_REG,
  5403. priv->ucode_data.len);
  5404. /* Inst bytecount must be last to set up, bit 31 signals uCode
  5405. * that all new ptr/size info is in place */
  5406. iwl4965_write_prph(priv, BSM_DRAM_INST_BYTECOUNT_REG,
  5407. priv->ucode_code.len | BSM_DRAM_INST_LOAD);
  5408. iwl4965_release_nic_access(priv);
  5409. spin_unlock_irqrestore(&priv->lock, flags);
  5410. IWL_DEBUG_INFO("Runtime uCode pointers are set.\n");
  5411. return rc;
  5412. }
  5413. /**
  5414. * iwl4965_init_alive_start - Called after REPLY_ALIVE notification received
  5415. *
  5416. * Called after REPLY_ALIVE notification received from "initialize" uCode.
  5417. *
  5418. * The 4965 "initialize" ALIVE reply contains calibration data for:
  5419. * Voltage, temperature, and MIMO tx gain correction, now stored in priv
  5420. * (3945 does not contain this data).
  5421. *
  5422. * Tell "initialize" uCode to go ahead and load the runtime uCode.
  5423. */
  5424. static void iwl4965_init_alive_start(struct iwl4965_priv *priv)
  5425. {
  5426. /* Check alive response for "valid" sign from uCode */
  5427. if (priv->card_alive_init.is_valid != UCODE_VALID_OK) {
  5428. /* We had an error bringing up the hardware, so take it
  5429. * all the way back down so we can try again */
  5430. IWL_DEBUG_INFO("Initialize Alive failed.\n");
  5431. goto restart;
  5432. }
  5433. /* Bootstrap uCode has loaded initialize uCode ... verify inst image.
  5434. * This is a paranoid check, because we would not have gotten the
  5435. * "initialize" alive if code weren't properly loaded. */
  5436. if (iwl4965_verify_ucode(priv)) {
  5437. /* Runtime instruction load was bad;
  5438. * take it all the way back down so we can try again */
  5439. IWL_DEBUG_INFO("Bad \"initialize\" uCode load.\n");
  5440. goto restart;
  5441. }
  5442. /* Calculate temperature */
  5443. priv->temperature = iwl4965_get_temperature(priv);
  5444. /* Send pointers to protocol/runtime uCode image ... init code will
  5445. * load and launch runtime uCode, which will send us another "Alive"
  5446. * notification. */
  5447. IWL_DEBUG_INFO("Initialization Alive received.\n");
  5448. if (iwl4965_set_ucode_ptrs(priv)) {
  5449. /* Runtime instruction load won't happen;
  5450. * take it all the way back down so we can try again */
  5451. IWL_DEBUG_INFO("Couldn't set up uCode pointers.\n");
  5452. goto restart;
  5453. }
  5454. return;
  5455. restart:
  5456. queue_work(priv->workqueue, &priv->restart);
  5457. }
  5458. /**
  5459. * iwl4965_alive_start - called after REPLY_ALIVE notification received
  5460. * from protocol/runtime uCode (initialization uCode's
  5461. * Alive gets handled by iwl4965_init_alive_start()).
  5462. */
  5463. static void iwl4965_alive_start(struct iwl4965_priv *priv)
  5464. {
  5465. int rc = 0;
  5466. IWL_DEBUG_INFO("Runtime Alive received.\n");
  5467. if (priv->card_alive.is_valid != UCODE_VALID_OK) {
  5468. /* We had an error bringing up the hardware, so take it
  5469. * all the way back down so we can try again */
  5470. IWL_DEBUG_INFO("Alive failed.\n");
  5471. goto restart;
  5472. }
  5473. /* Initialize uCode has loaded Runtime uCode ... verify inst image.
  5474. * This is a paranoid check, because we would not have gotten the
  5475. * "runtime" alive if code weren't properly loaded. */
  5476. if (iwl4965_verify_ucode(priv)) {
  5477. /* Runtime instruction load was bad;
  5478. * take it all the way back down so we can try again */
  5479. IWL_DEBUG_INFO("Bad runtime uCode load.\n");
  5480. goto restart;
  5481. }
  5482. iwl4965_clear_stations_table(priv);
  5483. rc = iwl4965_alive_notify(priv);
  5484. if (rc) {
  5485. IWL_WARNING("Could not complete ALIVE transition [ntf]: %d\n",
  5486. rc);
  5487. goto restart;
  5488. }
  5489. /* After the ALIVE response, we can send host commands to 4965 uCode */
  5490. set_bit(STATUS_ALIVE, &priv->status);
  5491. /* Clear out the uCode error bit if it is set */
  5492. clear_bit(STATUS_FW_ERROR, &priv->status);
  5493. if (iwl4965_is_rfkill(priv))
  5494. return;
  5495. ieee80211_start_queues(priv->hw);
  5496. priv->active_rate = priv->rates_mask;
  5497. priv->active_rate_basic = priv->rates_mask & IWL_BASIC_RATES_MASK;
  5498. iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(priv->power_mode));
  5499. if (iwl4965_is_associated(priv)) {
  5500. struct iwl4965_rxon_cmd *active_rxon =
  5501. (struct iwl4965_rxon_cmd *)(&priv->active_rxon);
  5502. memcpy(&priv->staging_rxon, &priv->active_rxon,
  5503. sizeof(priv->staging_rxon));
  5504. active_rxon->filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5505. } else {
  5506. /* Initialize our rx_config data */
  5507. iwl4965_connection_init_rx_config(priv);
  5508. memcpy(priv->staging_rxon.node_addr, priv->mac_addr, ETH_ALEN);
  5509. }
  5510. /* Configure Bluetooth device coexistence support */
  5511. iwl4965_send_bt_config(priv);
  5512. /* Configure the adapter for unassociated operation */
  5513. iwl4965_commit_rxon(priv);
  5514. /* At this point, the NIC is initialized and operational */
  5515. priv->notif_missed_beacons = 0;
  5516. set_bit(STATUS_READY, &priv->status);
  5517. iwl4965_rf_kill_ct_config(priv);
  5518. IWL_DEBUG_INFO("ALIVE processing complete.\n");
  5519. wake_up_interruptible(&priv->wait_command_queue);
  5520. if (priv->error_recovering)
  5521. iwl4965_error_recovery(priv);
  5522. return;
  5523. restart:
  5524. queue_work(priv->workqueue, &priv->restart);
  5525. }
  5526. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv);
  5527. static void __iwl4965_down(struct iwl4965_priv *priv)
  5528. {
  5529. unsigned long flags;
  5530. int exit_pending = test_bit(STATUS_EXIT_PENDING, &priv->status);
  5531. struct ieee80211_conf *conf = NULL;
  5532. IWL_DEBUG_INFO(DRV_NAME " is going down\n");
  5533. conf = ieee80211_get_hw_conf(priv->hw);
  5534. if (!exit_pending)
  5535. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5536. iwl4965_clear_stations_table(priv);
  5537. /* Unblock any waiting calls */
  5538. wake_up_interruptible_all(&priv->wait_command_queue);
  5539. /* Wipe out the EXIT_PENDING status bit if we are not actually
  5540. * exiting the module */
  5541. if (!exit_pending)
  5542. clear_bit(STATUS_EXIT_PENDING, &priv->status);
  5543. /* stop and reset the on-board processor */
  5544. iwl4965_write32(priv, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
  5545. /* tell the device to stop sending interrupts */
  5546. iwl4965_disable_interrupts(priv);
  5547. if (priv->mac80211_registered)
  5548. ieee80211_stop_queues(priv->hw);
  5549. /* If we have not previously called iwl4965_init() then
  5550. * clear all bits but the RF Kill and SUSPEND bits and return */
  5551. if (!iwl4965_is_init(priv)) {
  5552. priv->status = test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5553. STATUS_RF_KILL_HW |
  5554. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5555. STATUS_RF_KILL_SW |
  5556. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  5557. STATUS_GEO_CONFIGURED |
  5558. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5559. STATUS_IN_SUSPEND;
  5560. goto exit;
  5561. }
  5562. /* ...otherwise clear out all the status bits but the RF Kill and
  5563. * SUSPEND bits and continue taking the NIC down. */
  5564. priv->status &= test_bit(STATUS_RF_KILL_HW, &priv->status) <<
  5565. STATUS_RF_KILL_HW |
  5566. test_bit(STATUS_RF_KILL_SW, &priv->status) <<
  5567. STATUS_RF_KILL_SW |
  5568. test_bit(STATUS_GEO_CONFIGURED, &priv->status) <<
  5569. STATUS_GEO_CONFIGURED |
  5570. test_bit(STATUS_IN_SUSPEND, &priv->status) <<
  5571. STATUS_IN_SUSPEND |
  5572. test_bit(STATUS_FW_ERROR, &priv->status) <<
  5573. STATUS_FW_ERROR;
  5574. spin_lock_irqsave(&priv->lock, flags);
  5575. iwl4965_clear_bit(priv, CSR_GP_CNTRL,
  5576. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  5577. spin_unlock_irqrestore(&priv->lock, flags);
  5578. iwl4965_hw_txq_ctx_stop(priv);
  5579. iwl4965_hw_rxq_stop(priv);
  5580. spin_lock_irqsave(&priv->lock, flags);
  5581. if (!iwl4965_grab_nic_access(priv)) {
  5582. iwl4965_write_prph(priv, APMG_CLK_DIS_REG,
  5583. APMG_CLK_VAL_DMA_CLK_RQT);
  5584. iwl4965_release_nic_access(priv);
  5585. }
  5586. spin_unlock_irqrestore(&priv->lock, flags);
  5587. udelay(5);
  5588. iwl4965_hw_nic_stop_master(priv);
  5589. iwl4965_set_bit(priv, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  5590. iwl4965_hw_nic_reset(priv);
  5591. exit:
  5592. memset(&priv->card_alive, 0, sizeof(struct iwl4965_alive_resp));
  5593. if (priv->ibss_beacon)
  5594. dev_kfree_skb(priv->ibss_beacon);
  5595. priv->ibss_beacon = NULL;
  5596. /* clear out any free frames */
  5597. iwl4965_clear_free_frames(priv);
  5598. }
  5599. static void iwl4965_down(struct iwl4965_priv *priv)
  5600. {
  5601. mutex_lock(&priv->mutex);
  5602. __iwl4965_down(priv);
  5603. mutex_unlock(&priv->mutex);
  5604. iwl4965_cancel_deferred_work(priv);
  5605. }
  5606. #define MAX_HW_RESTARTS 5
  5607. static int __iwl4965_up(struct iwl4965_priv *priv)
  5608. {
  5609. int rc, i;
  5610. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5611. IWL_WARNING("Exit pending; will not bring the NIC up\n");
  5612. return -EIO;
  5613. }
  5614. if (test_bit(STATUS_RF_KILL_SW, &priv->status)) {
  5615. IWL_WARNING("Radio disabled by SW RF kill (module "
  5616. "parameter)\n");
  5617. return -ENODEV;
  5618. }
  5619. if (!priv->ucode_data_backup.v_addr || !priv->ucode_data.v_addr) {
  5620. IWL_ERROR("ucode not available for device bringup\n");
  5621. return -EIO;
  5622. }
  5623. /* If platform's RF_KILL switch is NOT set to KILL */
  5624. if (iwl4965_read32(priv, CSR_GP_CNTRL) &
  5625. CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
  5626. clear_bit(STATUS_RF_KILL_HW, &priv->status);
  5627. else {
  5628. set_bit(STATUS_RF_KILL_HW, &priv->status);
  5629. if (!test_bit(STATUS_IN_SUSPEND, &priv->status)) {
  5630. IWL_WARNING("Radio disabled by HW RF Kill switch\n");
  5631. return -ENODEV;
  5632. }
  5633. }
  5634. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5635. rc = iwl4965_hw_nic_init(priv);
  5636. if (rc) {
  5637. IWL_ERROR("Unable to int nic\n");
  5638. return rc;
  5639. }
  5640. /* make sure rfkill handshake bits are cleared */
  5641. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5642. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR,
  5643. CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
  5644. /* clear (again), then enable host interrupts */
  5645. iwl4965_write32(priv, CSR_INT, 0xFFFFFFFF);
  5646. iwl4965_enable_interrupts(priv);
  5647. /* really make sure rfkill handshake bits are cleared */
  5648. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5649. iwl4965_write32(priv, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
  5650. /* Copy original ucode data image from disk into backup cache.
  5651. * This will be used to initialize the on-board processor's
  5652. * data SRAM for a clean start when the runtime program first loads. */
  5653. memcpy(priv->ucode_data_backup.v_addr, priv->ucode_data.v_addr,
  5654. priv->ucode_data.len);
  5655. /* We return success when we resume from suspend and rf_kill is on. */
  5656. if (test_bit(STATUS_RF_KILL_HW, &priv->status))
  5657. return 0;
  5658. for (i = 0; i < MAX_HW_RESTARTS; i++) {
  5659. iwl4965_clear_stations_table(priv);
  5660. /* load bootstrap state machine,
  5661. * load bootstrap program into processor's memory,
  5662. * prepare to load the "initialize" uCode */
  5663. rc = iwl4965_load_bsm(priv);
  5664. if (rc) {
  5665. IWL_ERROR("Unable to set up bootstrap uCode: %d\n", rc);
  5666. continue;
  5667. }
  5668. /* start card; "initialize" will load runtime ucode */
  5669. iwl4965_nic_start(priv);
  5670. IWL_DEBUG_INFO(DRV_NAME " is coming up\n");
  5671. return 0;
  5672. }
  5673. set_bit(STATUS_EXIT_PENDING, &priv->status);
  5674. __iwl4965_down(priv);
  5675. /* tried to restart and config the device for as long as our
  5676. * patience could withstand */
  5677. IWL_ERROR("Unable to initialize device after %d attempts.\n", i);
  5678. return -EIO;
  5679. }
  5680. /*****************************************************************************
  5681. *
  5682. * Workqueue callbacks
  5683. *
  5684. *****************************************************************************/
  5685. static void iwl4965_bg_init_alive_start(struct work_struct *data)
  5686. {
  5687. struct iwl4965_priv *priv =
  5688. container_of(data, struct iwl4965_priv, init_alive_start.work);
  5689. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5690. return;
  5691. mutex_lock(&priv->mutex);
  5692. iwl4965_init_alive_start(priv);
  5693. mutex_unlock(&priv->mutex);
  5694. }
  5695. static void iwl4965_bg_alive_start(struct work_struct *data)
  5696. {
  5697. struct iwl4965_priv *priv =
  5698. container_of(data, struct iwl4965_priv, alive_start.work);
  5699. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5700. return;
  5701. mutex_lock(&priv->mutex);
  5702. iwl4965_alive_start(priv);
  5703. mutex_unlock(&priv->mutex);
  5704. }
  5705. static void iwl4965_bg_rf_kill(struct work_struct *work)
  5706. {
  5707. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, rf_kill);
  5708. wake_up_interruptible(&priv->wait_command_queue);
  5709. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5710. return;
  5711. mutex_lock(&priv->mutex);
  5712. if (!iwl4965_is_rfkill(priv)) {
  5713. IWL_DEBUG(IWL_DL_INFO | IWL_DL_RF_KILL,
  5714. "HW and/or SW RF Kill no longer active, restarting "
  5715. "device\n");
  5716. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5717. queue_work(priv->workqueue, &priv->restart);
  5718. } else {
  5719. if (!test_bit(STATUS_RF_KILL_HW, &priv->status))
  5720. IWL_DEBUG_RF_KILL("Can not turn radio back on - "
  5721. "disabled by SW switch\n");
  5722. else
  5723. IWL_WARNING("Radio Frequency Kill Switch is On:\n"
  5724. "Kill switch must be turned off for "
  5725. "wireless networking to work.\n");
  5726. }
  5727. mutex_unlock(&priv->mutex);
  5728. }
  5729. #define IWL_SCAN_CHECK_WATCHDOG (7 * HZ)
  5730. static void iwl4965_bg_scan_check(struct work_struct *data)
  5731. {
  5732. struct iwl4965_priv *priv =
  5733. container_of(data, struct iwl4965_priv, scan_check.work);
  5734. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5735. return;
  5736. mutex_lock(&priv->mutex);
  5737. if (test_bit(STATUS_SCANNING, &priv->status) ||
  5738. test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5739. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN,
  5740. "Scan completion watchdog resetting adapter (%dms)\n",
  5741. jiffies_to_msecs(IWL_SCAN_CHECK_WATCHDOG));
  5742. if (!test_bit(STATUS_EXIT_PENDING, &priv->status))
  5743. iwl4965_send_scan_abort(priv);
  5744. }
  5745. mutex_unlock(&priv->mutex);
  5746. }
  5747. static void iwl4965_bg_request_scan(struct work_struct *data)
  5748. {
  5749. struct iwl4965_priv *priv =
  5750. container_of(data, struct iwl4965_priv, request_scan);
  5751. struct iwl4965_host_cmd cmd = {
  5752. .id = REPLY_SCAN_CMD,
  5753. .len = sizeof(struct iwl4965_scan_cmd),
  5754. .meta.flags = CMD_SIZE_HUGE,
  5755. };
  5756. int rc = 0;
  5757. struct iwl4965_scan_cmd *scan;
  5758. struct ieee80211_conf *conf = NULL;
  5759. u8 direct_mask;
  5760. enum ieee80211_band band;
  5761. conf = ieee80211_get_hw_conf(priv->hw);
  5762. mutex_lock(&priv->mutex);
  5763. if (!iwl4965_is_ready(priv)) {
  5764. IWL_WARNING("request scan called when driver not ready.\n");
  5765. goto done;
  5766. }
  5767. /* Make sure the scan wasn't cancelled before this queued work
  5768. * was given the chance to run... */
  5769. if (!test_bit(STATUS_SCANNING, &priv->status))
  5770. goto done;
  5771. /* This should never be called or scheduled if there is currently
  5772. * a scan active in the hardware. */
  5773. if (test_bit(STATUS_SCAN_HW, &priv->status)) {
  5774. IWL_DEBUG_INFO("Multiple concurrent scan requests in parallel. "
  5775. "Ignoring second request.\n");
  5776. rc = -EIO;
  5777. goto done;
  5778. }
  5779. if (test_bit(STATUS_EXIT_PENDING, &priv->status)) {
  5780. IWL_DEBUG_SCAN("Aborting scan due to device shutdown\n");
  5781. goto done;
  5782. }
  5783. if (test_bit(STATUS_SCAN_ABORTING, &priv->status)) {
  5784. IWL_DEBUG_HC("Scan request while abort pending. Queuing.\n");
  5785. goto done;
  5786. }
  5787. if (iwl4965_is_rfkill(priv)) {
  5788. IWL_DEBUG_HC("Aborting scan due to RF Kill activation\n");
  5789. goto done;
  5790. }
  5791. if (!test_bit(STATUS_READY, &priv->status)) {
  5792. IWL_DEBUG_HC("Scan request while uninitialized. Queuing.\n");
  5793. goto done;
  5794. }
  5795. if (!priv->scan_bands) {
  5796. IWL_DEBUG_HC("Aborting scan due to no requested bands\n");
  5797. goto done;
  5798. }
  5799. if (!priv->scan) {
  5800. priv->scan = kmalloc(sizeof(struct iwl4965_scan_cmd) +
  5801. IWL_MAX_SCAN_SIZE, GFP_KERNEL);
  5802. if (!priv->scan) {
  5803. rc = -ENOMEM;
  5804. goto done;
  5805. }
  5806. }
  5807. scan = priv->scan;
  5808. memset(scan, 0, sizeof(struct iwl4965_scan_cmd) + IWL_MAX_SCAN_SIZE);
  5809. scan->quiet_plcp_th = IWL_PLCP_QUIET_THRESH;
  5810. scan->quiet_time = IWL_ACTIVE_QUIET_TIME;
  5811. if (iwl4965_is_associated(priv)) {
  5812. u16 interval = 0;
  5813. u32 extra;
  5814. u32 suspend_time = 100;
  5815. u32 scan_suspend_time = 100;
  5816. unsigned long flags;
  5817. IWL_DEBUG_INFO("Scanning while associated...\n");
  5818. spin_lock_irqsave(&priv->lock, flags);
  5819. interval = priv->beacon_int;
  5820. spin_unlock_irqrestore(&priv->lock, flags);
  5821. scan->suspend_time = 0;
  5822. scan->max_out_time = cpu_to_le32(200 * 1024);
  5823. if (!interval)
  5824. interval = suspend_time;
  5825. extra = (suspend_time / interval) << 22;
  5826. scan_suspend_time = (extra |
  5827. ((suspend_time % interval) * 1024));
  5828. scan->suspend_time = cpu_to_le32(scan_suspend_time);
  5829. IWL_DEBUG_SCAN("suspend_time 0x%X beacon interval %d\n",
  5830. scan_suspend_time, interval);
  5831. }
  5832. /* We should add the ability for user to lock to PASSIVE ONLY */
  5833. if (priv->one_direct_scan) {
  5834. IWL_DEBUG_SCAN
  5835. ("Kicking off one direct scan for '%s'\n",
  5836. iwl4965_escape_essid(priv->direct_ssid,
  5837. priv->direct_ssid_len));
  5838. scan->direct_scan[0].id = WLAN_EID_SSID;
  5839. scan->direct_scan[0].len = priv->direct_ssid_len;
  5840. memcpy(scan->direct_scan[0].ssid,
  5841. priv->direct_ssid, priv->direct_ssid_len);
  5842. direct_mask = 1;
  5843. } else if (!iwl4965_is_associated(priv) && priv->essid_len) {
  5844. scan->direct_scan[0].id = WLAN_EID_SSID;
  5845. scan->direct_scan[0].len = priv->essid_len;
  5846. memcpy(scan->direct_scan[0].ssid, priv->essid, priv->essid_len);
  5847. direct_mask = 1;
  5848. } else
  5849. direct_mask = 0;
  5850. /* We don't build a direct scan probe request; the uCode will do
  5851. * that based on the direct_mask added to each channel entry */
  5852. scan->tx_cmd.len = cpu_to_le16(
  5853. iwl4965_fill_probe_req(priv, (struct ieee80211_mgmt *)scan->data,
  5854. IWL_MAX_SCAN_SIZE - sizeof(*scan), 0));
  5855. scan->tx_cmd.tx_flags = TX_CMD_FLG_SEQ_CTL_MSK;
  5856. scan->tx_cmd.sta_id = priv->hw_setting.bcast_sta_id;
  5857. scan->tx_cmd.stop_time.life_time = TX_CMD_LIFE_TIME_INFINITE;
  5858. /* flags + rate selection */
  5859. scan->tx_cmd.tx_flags |= cpu_to_le32(0x200);
  5860. switch (priv->scan_bands) {
  5861. case 2:
  5862. scan->flags = RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK;
  5863. scan->tx_cmd.rate_n_flags =
  5864. iwl4965_hw_set_rate_n_flags(IWL_RATE_1M_PLCP,
  5865. RATE_MCS_ANT_B_MSK|RATE_MCS_CCK_MSK);
  5866. scan->good_CRC_th = 0;
  5867. band = IEEE80211_BAND_2GHZ;
  5868. break;
  5869. case 1:
  5870. scan->tx_cmd.rate_n_flags =
  5871. iwl4965_hw_set_rate_n_flags(IWL_RATE_6M_PLCP,
  5872. RATE_MCS_ANT_B_MSK);
  5873. scan->good_CRC_th = IWL_GOOD_CRC_TH;
  5874. band = IEEE80211_BAND_5GHZ;
  5875. break;
  5876. default:
  5877. IWL_WARNING("Invalid scan band count\n");
  5878. goto done;
  5879. }
  5880. /* select Rx chains */
  5881. /* Force use of chains B and C (0x6) for scan Rx.
  5882. * Avoid A (0x1) because of its off-channel reception on A-band.
  5883. * MIMO is not used here, but value is required to make uCode happy. */
  5884. scan->rx_chain = RXON_RX_CHAIN_DRIVER_FORCE_MSK |
  5885. cpu_to_le16((0x7 << RXON_RX_CHAIN_VALID_POS) |
  5886. (0x6 << RXON_RX_CHAIN_FORCE_SEL_POS) |
  5887. (0x7 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS));
  5888. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR)
  5889. scan->filter_flags = RXON_FILTER_PROMISC_MSK;
  5890. if (direct_mask)
  5891. IWL_DEBUG_SCAN
  5892. ("Initiating direct scan for %s.\n",
  5893. iwl4965_escape_essid(priv->essid, priv->essid_len));
  5894. else
  5895. IWL_DEBUG_SCAN("Initiating indirect scan.\n");
  5896. scan->channel_count =
  5897. iwl4965_get_channels_for_scan(
  5898. priv, band, 1, /* active */
  5899. direct_mask,
  5900. (void *)&scan->data[le16_to_cpu(scan->tx_cmd.len)]);
  5901. cmd.len += le16_to_cpu(scan->tx_cmd.len) +
  5902. scan->channel_count * sizeof(struct iwl4965_scan_channel);
  5903. cmd.data = scan;
  5904. scan->len = cpu_to_le16(cmd.len);
  5905. set_bit(STATUS_SCAN_HW, &priv->status);
  5906. rc = iwl4965_send_cmd_sync(priv, &cmd);
  5907. if (rc)
  5908. goto done;
  5909. queue_delayed_work(priv->workqueue, &priv->scan_check,
  5910. IWL_SCAN_CHECK_WATCHDOG);
  5911. mutex_unlock(&priv->mutex);
  5912. return;
  5913. done:
  5914. /* inform mac80211 scan aborted */
  5915. queue_work(priv->workqueue, &priv->scan_completed);
  5916. mutex_unlock(&priv->mutex);
  5917. }
  5918. static void iwl4965_bg_up(struct work_struct *data)
  5919. {
  5920. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, up);
  5921. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5922. return;
  5923. mutex_lock(&priv->mutex);
  5924. __iwl4965_up(priv);
  5925. mutex_unlock(&priv->mutex);
  5926. }
  5927. static void iwl4965_bg_restart(struct work_struct *data)
  5928. {
  5929. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv, restart);
  5930. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5931. return;
  5932. iwl4965_down(priv);
  5933. queue_work(priv->workqueue, &priv->up);
  5934. }
  5935. static void iwl4965_bg_rx_replenish(struct work_struct *data)
  5936. {
  5937. struct iwl4965_priv *priv =
  5938. container_of(data, struct iwl4965_priv, rx_replenish);
  5939. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5940. return;
  5941. mutex_lock(&priv->mutex);
  5942. iwl4965_rx_replenish(priv);
  5943. mutex_unlock(&priv->mutex);
  5944. }
  5945. #define IWL_DELAY_NEXT_SCAN (HZ*2)
  5946. static void iwl4965_bg_post_associate(struct work_struct *data)
  5947. {
  5948. struct iwl4965_priv *priv = container_of(data, struct iwl4965_priv,
  5949. post_associate.work);
  5950. int rc = 0;
  5951. struct ieee80211_conf *conf = NULL;
  5952. DECLARE_MAC_BUF(mac);
  5953. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  5954. IWL_ERROR("%s Should not be called in AP mode\n", __FUNCTION__);
  5955. return;
  5956. }
  5957. IWL_DEBUG_ASSOC("Associated as %d to: %s\n",
  5958. priv->assoc_id,
  5959. print_mac(mac, priv->active_rxon.bssid_addr));
  5960. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  5961. return;
  5962. mutex_lock(&priv->mutex);
  5963. if (!priv->vif || !priv->is_open) {
  5964. mutex_unlock(&priv->mutex);
  5965. return;
  5966. }
  5967. iwl4965_scan_cancel_timeout(priv, 200);
  5968. conf = ieee80211_get_hw_conf(priv->hw);
  5969. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  5970. iwl4965_commit_rxon(priv);
  5971. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  5972. iwl4965_setup_rxon_timing(priv);
  5973. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  5974. sizeof(priv->rxon_timing), &priv->rxon_timing);
  5975. if (rc)
  5976. IWL_WARNING("REPLY_RXON_TIMING failed - "
  5977. "Attempting to continue.\n");
  5978. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  5979. #ifdef CONFIG_IWL4965_HT
  5980. if (priv->current_ht_config.is_ht)
  5981. iwl4965_set_rxon_ht(priv, &priv->current_ht_config);
  5982. #endif /* CONFIG_IWL4965_HT*/
  5983. iwl4965_set_rxon_chain(priv);
  5984. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  5985. IWL_DEBUG_ASSOC("assoc id %d beacon interval %d\n",
  5986. priv->assoc_id, priv->beacon_int);
  5987. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  5988. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  5989. else
  5990. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  5991. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  5992. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_SLOT_TIME)
  5993. priv->staging_rxon.flags |= RXON_FLG_SHORT_SLOT_MSK;
  5994. else
  5995. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5996. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  5997. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  5998. }
  5999. iwl4965_commit_rxon(priv);
  6000. switch (priv->iw_mode) {
  6001. case IEEE80211_IF_TYPE_STA:
  6002. iwl4965_rate_scale_init(priv->hw, IWL_AP_ID);
  6003. break;
  6004. case IEEE80211_IF_TYPE_IBSS:
  6005. /* clear out the station table */
  6006. iwl4965_clear_stations_table(priv);
  6007. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  6008. iwl4965_rxon_add_station(priv, priv->bssid, 0);
  6009. iwl4965_rate_scale_init(priv->hw, IWL_STA_ID);
  6010. iwl4965_send_beacon_cmd(priv);
  6011. break;
  6012. default:
  6013. IWL_ERROR("%s Should not be called in %d mode\n",
  6014. __FUNCTION__, priv->iw_mode);
  6015. break;
  6016. }
  6017. iwl4965_sequence_reset(priv);
  6018. #ifdef CONFIG_IWL4965_SENSITIVITY
  6019. /* Enable Rx differential gain and sensitivity calibrations */
  6020. iwl4965_chain_noise_reset(priv);
  6021. priv->start_calib = 1;
  6022. #endif /* CONFIG_IWL4965_SENSITIVITY */
  6023. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6024. priv->assoc_station_added = 1;
  6025. #ifdef CONFIG_IWL4965_QOS
  6026. iwl4965_activate_qos(priv, 0);
  6027. #endif /* CONFIG_IWL4965_QOS */
  6028. /* we have just associated, don't start scan too early */
  6029. priv->next_scan_jiffies = jiffies + IWL_DELAY_NEXT_SCAN;
  6030. mutex_unlock(&priv->mutex);
  6031. }
  6032. static void iwl4965_bg_abort_scan(struct work_struct *work)
  6033. {
  6034. struct iwl4965_priv *priv = container_of(work, struct iwl4965_priv, abort_scan);
  6035. if (!iwl4965_is_ready(priv))
  6036. return;
  6037. mutex_lock(&priv->mutex);
  6038. set_bit(STATUS_SCAN_ABORTING, &priv->status);
  6039. iwl4965_send_scan_abort(priv);
  6040. mutex_unlock(&priv->mutex);
  6041. }
  6042. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf);
  6043. static void iwl4965_bg_scan_completed(struct work_struct *work)
  6044. {
  6045. struct iwl4965_priv *priv =
  6046. container_of(work, struct iwl4965_priv, scan_completed);
  6047. IWL_DEBUG(IWL_DL_INFO | IWL_DL_SCAN, "SCAN complete scan\n");
  6048. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6049. return;
  6050. if (test_bit(STATUS_CONF_PENDING, &priv->status))
  6051. iwl4965_mac_config(priv->hw, ieee80211_get_hw_conf(priv->hw));
  6052. ieee80211_scan_completed(priv->hw);
  6053. /* Since setting the TXPOWER may have been deferred while
  6054. * performing the scan, fire one off */
  6055. mutex_lock(&priv->mutex);
  6056. iwl4965_hw_reg_send_txpower(priv);
  6057. mutex_unlock(&priv->mutex);
  6058. }
  6059. /*****************************************************************************
  6060. *
  6061. * mac80211 entry point functions
  6062. *
  6063. *****************************************************************************/
  6064. #define UCODE_READY_TIMEOUT (2 * HZ)
  6065. static int iwl4965_mac_start(struct ieee80211_hw *hw)
  6066. {
  6067. struct iwl4965_priv *priv = hw->priv;
  6068. int ret;
  6069. IWL_DEBUG_MAC80211("enter\n");
  6070. if (pci_enable_device(priv->pci_dev)) {
  6071. IWL_ERROR("Fail to pci_enable_device\n");
  6072. return -ENODEV;
  6073. }
  6074. pci_restore_state(priv->pci_dev);
  6075. pci_enable_msi(priv->pci_dev);
  6076. ret = request_irq(priv->pci_dev->irq, iwl4965_isr, IRQF_SHARED,
  6077. DRV_NAME, priv);
  6078. if (ret) {
  6079. IWL_ERROR("Error allocating IRQ %d\n", priv->pci_dev->irq);
  6080. goto out_disable_msi;
  6081. }
  6082. /* we should be verifying the device is ready to be opened */
  6083. mutex_lock(&priv->mutex);
  6084. memset(&priv->staging_rxon, 0, sizeof(struct iwl4965_rxon_cmd));
  6085. /* fetch ucode file from disk, alloc and copy to bus-master buffers ...
  6086. * ucode filename and max sizes are card-specific. */
  6087. if (!priv->ucode_code.len) {
  6088. ret = iwl4965_read_ucode(priv);
  6089. if (ret) {
  6090. IWL_ERROR("Could not read microcode: %d\n", ret);
  6091. mutex_unlock(&priv->mutex);
  6092. goto out_release_irq;
  6093. }
  6094. }
  6095. ret = __iwl4965_up(priv);
  6096. mutex_unlock(&priv->mutex);
  6097. if (ret)
  6098. goto out_release_irq;
  6099. IWL_DEBUG_INFO("Start UP work done.\n");
  6100. if (test_bit(STATUS_IN_SUSPEND, &priv->status))
  6101. return 0;
  6102. /* Wait for START_ALIVE from ucode. Otherwise callbacks from
  6103. * mac80211 will not be run successfully. */
  6104. ret = wait_event_interruptible_timeout(priv->wait_command_queue,
  6105. test_bit(STATUS_READY, &priv->status),
  6106. UCODE_READY_TIMEOUT);
  6107. if (!ret) {
  6108. if (!test_bit(STATUS_READY, &priv->status)) {
  6109. IWL_ERROR("Wait for START_ALIVE timeout after %dms.\n",
  6110. jiffies_to_msecs(UCODE_READY_TIMEOUT));
  6111. ret = -ETIMEDOUT;
  6112. goto out_release_irq;
  6113. }
  6114. }
  6115. priv->is_open = 1;
  6116. IWL_DEBUG_MAC80211("leave\n");
  6117. return 0;
  6118. out_release_irq:
  6119. free_irq(priv->pci_dev->irq, priv);
  6120. out_disable_msi:
  6121. pci_disable_msi(priv->pci_dev);
  6122. pci_disable_device(priv->pci_dev);
  6123. priv->is_open = 0;
  6124. IWL_DEBUG_MAC80211("leave - failed\n");
  6125. return ret;
  6126. }
  6127. static void iwl4965_mac_stop(struct ieee80211_hw *hw)
  6128. {
  6129. struct iwl4965_priv *priv = hw->priv;
  6130. IWL_DEBUG_MAC80211("enter\n");
  6131. if (!priv->is_open) {
  6132. IWL_DEBUG_MAC80211("leave - skip\n");
  6133. return;
  6134. }
  6135. priv->is_open = 0;
  6136. if (iwl4965_is_ready_rf(priv)) {
  6137. /* stop mac, cancel any scan request and clear
  6138. * RXON_FILTER_ASSOC_MSK BIT
  6139. */
  6140. mutex_lock(&priv->mutex);
  6141. iwl4965_scan_cancel_timeout(priv, 100);
  6142. cancel_delayed_work(&priv->post_associate);
  6143. mutex_unlock(&priv->mutex);
  6144. }
  6145. iwl4965_down(priv);
  6146. flush_workqueue(priv->workqueue);
  6147. free_irq(priv->pci_dev->irq, priv);
  6148. pci_disable_msi(priv->pci_dev);
  6149. pci_save_state(priv->pci_dev);
  6150. pci_disable_device(priv->pci_dev);
  6151. IWL_DEBUG_MAC80211("leave\n");
  6152. }
  6153. static int iwl4965_mac_tx(struct ieee80211_hw *hw, struct sk_buff *skb,
  6154. struct ieee80211_tx_control *ctl)
  6155. {
  6156. struct iwl4965_priv *priv = hw->priv;
  6157. IWL_DEBUG_MAC80211("enter\n");
  6158. if (priv->iw_mode == IEEE80211_IF_TYPE_MNTR) {
  6159. IWL_DEBUG_MAC80211("leave - monitor\n");
  6160. return -1;
  6161. }
  6162. IWL_DEBUG_TX("dev->xmit(%d bytes) at rate 0x%02x\n", skb->len,
  6163. ctl->tx_rate->bitrate);
  6164. if (iwl4965_tx_skb(priv, skb, ctl))
  6165. dev_kfree_skb_any(skb);
  6166. IWL_DEBUG_MAC80211("leave\n");
  6167. return 0;
  6168. }
  6169. static int iwl4965_mac_add_interface(struct ieee80211_hw *hw,
  6170. struct ieee80211_if_init_conf *conf)
  6171. {
  6172. struct iwl4965_priv *priv = hw->priv;
  6173. unsigned long flags;
  6174. DECLARE_MAC_BUF(mac);
  6175. IWL_DEBUG_MAC80211("enter: type %d\n", conf->type);
  6176. if (priv->vif) {
  6177. IWL_DEBUG_MAC80211("leave - vif != NULL\n");
  6178. return -EOPNOTSUPP;
  6179. }
  6180. spin_lock_irqsave(&priv->lock, flags);
  6181. priv->vif = conf->vif;
  6182. spin_unlock_irqrestore(&priv->lock, flags);
  6183. mutex_lock(&priv->mutex);
  6184. if (conf->mac_addr) {
  6185. IWL_DEBUG_MAC80211("Set %s\n", print_mac(mac, conf->mac_addr));
  6186. memcpy(priv->mac_addr, conf->mac_addr, ETH_ALEN);
  6187. }
  6188. if (iwl4965_is_ready(priv))
  6189. iwl4965_set_mode(priv, conf->type);
  6190. mutex_unlock(&priv->mutex);
  6191. IWL_DEBUG_MAC80211("leave\n");
  6192. return 0;
  6193. }
  6194. /**
  6195. * iwl4965_mac_config - mac80211 config callback
  6196. *
  6197. * We ignore conf->flags & IEEE80211_CONF_SHORT_SLOT_TIME since it seems to
  6198. * be set inappropriately and the driver currently sets the hardware up to
  6199. * use it whenever needed.
  6200. */
  6201. static int iwl4965_mac_config(struct ieee80211_hw *hw, struct ieee80211_conf *conf)
  6202. {
  6203. struct iwl4965_priv *priv = hw->priv;
  6204. const struct iwl4965_channel_info *ch_info;
  6205. unsigned long flags;
  6206. int ret = 0;
  6207. mutex_lock(&priv->mutex);
  6208. IWL_DEBUG_MAC80211("enter to channel %d\n", conf->channel->hw_value);
  6209. priv->add_radiotap = !!(conf->flags & IEEE80211_CONF_RADIOTAP);
  6210. if (!iwl4965_is_ready(priv)) {
  6211. IWL_DEBUG_MAC80211("leave - not ready\n");
  6212. ret = -EIO;
  6213. goto out;
  6214. }
  6215. if (unlikely(!iwl4965_param_disable_hw_scan &&
  6216. test_bit(STATUS_SCANNING, &priv->status))) {
  6217. IWL_DEBUG_MAC80211("leave - scanning\n");
  6218. set_bit(STATUS_CONF_PENDING, &priv->status);
  6219. mutex_unlock(&priv->mutex);
  6220. return 0;
  6221. }
  6222. spin_lock_irqsave(&priv->lock, flags);
  6223. ch_info = iwl4965_get_channel_info(priv, conf->channel->band,
  6224. ieee80211_frequency_to_channel(conf->channel->center_freq));
  6225. if (!is_channel_valid(ch_info)) {
  6226. IWL_DEBUG_MAC80211("leave - invalid channel\n");
  6227. spin_unlock_irqrestore(&priv->lock, flags);
  6228. ret = -EINVAL;
  6229. goto out;
  6230. }
  6231. #ifdef CONFIG_IWL4965_HT
  6232. /* if we are switching fron ht to 2.4 clear flags
  6233. * from any ht related info since 2.4 does not
  6234. * support ht */
  6235. if ((le16_to_cpu(priv->staging_rxon.channel) != conf->channel)
  6236. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6237. && !(conf->flags & IEEE80211_CONF_CHANNEL_SWITCH)
  6238. #endif
  6239. )
  6240. priv->staging_rxon.flags = 0;
  6241. #endif /* CONFIG_IWL4965_HT */
  6242. iwl4965_set_rxon_channel(priv, conf->channel->band,
  6243. ieee80211_frequency_to_channel(conf->channel->center_freq));
  6244. iwl4965_set_flags_for_phymode(priv, conf->channel->band);
  6245. /* The list of supported rates and rate mask can be different
  6246. * for each band; since the band may have changed, reset
  6247. * the rate mask to what mac80211 lists */
  6248. iwl4965_set_rate(priv);
  6249. spin_unlock_irqrestore(&priv->lock, flags);
  6250. #ifdef IEEE80211_CONF_CHANNEL_SWITCH
  6251. if (conf->flags & IEEE80211_CONF_CHANNEL_SWITCH) {
  6252. iwl4965_hw_channel_switch(priv, conf->channel);
  6253. goto out;
  6254. }
  6255. #endif
  6256. iwl4965_radio_kill_sw(priv, !conf->radio_enabled);
  6257. if (!conf->radio_enabled) {
  6258. IWL_DEBUG_MAC80211("leave - radio disabled\n");
  6259. goto out;
  6260. }
  6261. if (iwl4965_is_rfkill(priv)) {
  6262. IWL_DEBUG_MAC80211("leave - RF kill\n");
  6263. ret = -EIO;
  6264. goto out;
  6265. }
  6266. iwl4965_set_rate(priv);
  6267. if (memcmp(&priv->active_rxon,
  6268. &priv->staging_rxon, sizeof(priv->staging_rxon)))
  6269. iwl4965_commit_rxon(priv);
  6270. else
  6271. IWL_DEBUG_INFO("No re-sending same RXON configuration.\n");
  6272. IWL_DEBUG_MAC80211("leave\n");
  6273. out:
  6274. clear_bit(STATUS_CONF_PENDING, &priv->status);
  6275. mutex_unlock(&priv->mutex);
  6276. return ret;
  6277. }
  6278. static void iwl4965_config_ap(struct iwl4965_priv *priv)
  6279. {
  6280. int rc = 0;
  6281. if (test_bit(STATUS_EXIT_PENDING, &priv->status))
  6282. return;
  6283. /* The following should be done only at AP bring up */
  6284. if ((priv->active_rxon.filter_flags & RXON_FILTER_ASSOC_MSK) == 0) {
  6285. /* RXON - unassoc (to set timing command) */
  6286. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6287. iwl4965_commit_rxon(priv);
  6288. /* RXON Timing */
  6289. memset(&priv->rxon_timing, 0, sizeof(struct iwl4965_rxon_time_cmd));
  6290. iwl4965_setup_rxon_timing(priv);
  6291. rc = iwl4965_send_cmd_pdu(priv, REPLY_RXON_TIMING,
  6292. sizeof(priv->rxon_timing), &priv->rxon_timing);
  6293. if (rc)
  6294. IWL_WARNING("REPLY_RXON_TIMING failed - "
  6295. "Attempting to continue.\n");
  6296. iwl4965_set_rxon_chain(priv);
  6297. /* FIXME: what should be the assoc_id for AP? */
  6298. priv->staging_rxon.assoc_id = cpu_to_le16(priv->assoc_id);
  6299. if (priv->assoc_capability & WLAN_CAPABILITY_SHORT_PREAMBLE)
  6300. priv->staging_rxon.flags |=
  6301. RXON_FLG_SHORT_PREAMBLE_MSK;
  6302. else
  6303. priv->staging_rxon.flags &=
  6304. ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6305. if (priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) {
  6306. if (priv->assoc_capability &
  6307. WLAN_CAPABILITY_SHORT_SLOT_TIME)
  6308. priv->staging_rxon.flags |=
  6309. RXON_FLG_SHORT_SLOT_MSK;
  6310. else
  6311. priv->staging_rxon.flags &=
  6312. ~RXON_FLG_SHORT_SLOT_MSK;
  6313. if (priv->iw_mode == IEEE80211_IF_TYPE_IBSS)
  6314. priv->staging_rxon.flags &=
  6315. ~RXON_FLG_SHORT_SLOT_MSK;
  6316. }
  6317. /* restore RXON assoc */
  6318. priv->staging_rxon.filter_flags |= RXON_FILTER_ASSOC_MSK;
  6319. iwl4965_commit_rxon(priv);
  6320. #ifdef CONFIG_IWL4965_QOS
  6321. iwl4965_activate_qos(priv, 1);
  6322. #endif
  6323. iwl4965_rxon_add_station(priv, iwl4965_broadcast_addr, 0);
  6324. }
  6325. iwl4965_send_beacon_cmd(priv);
  6326. /* FIXME - we need to add code here to detect a totally new
  6327. * configuration, reset the AP, unassoc, rxon timing, assoc,
  6328. * clear sta table, add BCAST sta... */
  6329. }
  6330. static int iwl4965_mac_config_interface(struct ieee80211_hw *hw,
  6331. struct ieee80211_vif *vif,
  6332. struct ieee80211_if_conf *conf)
  6333. {
  6334. struct iwl4965_priv *priv = hw->priv;
  6335. DECLARE_MAC_BUF(mac);
  6336. unsigned long flags;
  6337. int rc;
  6338. if (conf == NULL)
  6339. return -EIO;
  6340. if ((priv->iw_mode == IEEE80211_IF_TYPE_AP) &&
  6341. (!conf->beacon || !conf->ssid_len)) {
  6342. IWL_DEBUG_MAC80211
  6343. ("Leaving in AP mode because HostAPD is not ready.\n");
  6344. return 0;
  6345. }
  6346. if (!iwl4965_is_alive(priv))
  6347. return -EAGAIN;
  6348. mutex_lock(&priv->mutex);
  6349. if (conf->bssid)
  6350. IWL_DEBUG_MAC80211("bssid: %s\n",
  6351. print_mac(mac, conf->bssid));
  6352. /*
  6353. * very dubious code was here; the probe filtering flag is never set:
  6354. *
  6355. if (unlikely(test_bit(STATUS_SCANNING, &priv->status)) &&
  6356. !(priv->hw->flags & IEEE80211_HW_NO_PROBE_FILTERING)) {
  6357. */
  6358. if (unlikely(test_bit(STATUS_SCANNING, &priv->status))) {
  6359. IWL_DEBUG_MAC80211("leave - scanning\n");
  6360. mutex_unlock(&priv->mutex);
  6361. return 0;
  6362. }
  6363. if (priv->vif != vif) {
  6364. IWL_DEBUG_MAC80211("leave - priv->vif != vif\n");
  6365. mutex_unlock(&priv->mutex);
  6366. return 0;
  6367. }
  6368. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) {
  6369. if (!conf->bssid) {
  6370. conf->bssid = priv->mac_addr;
  6371. memcpy(priv->bssid, priv->mac_addr, ETH_ALEN);
  6372. IWL_DEBUG_MAC80211("bssid was set to: %s\n",
  6373. print_mac(mac, conf->bssid));
  6374. }
  6375. if (priv->ibss_beacon)
  6376. dev_kfree_skb(priv->ibss_beacon);
  6377. priv->ibss_beacon = conf->beacon;
  6378. }
  6379. if (iwl4965_is_rfkill(priv))
  6380. goto done;
  6381. if (conf->bssid && !is_zero_ether_addr(conf->bssid) &&
  6382. !is_multicast_ether_addr(conf->bssid)) {
  6383. /* If there is currently a HW scan going on in the background
  6384. * then we need to cancel it else the RXON below will fail. */
  6385. if (iwl4965_scan_cancel_timeout(priv, 100)) {
  6386. IWL_WARNING("Aborted scan still in progress "
  6387. "after 100ms\n");
  6388. IWL_DEBUG_MAC80211("leaving - scan abort failed.\n");
  6389. mutex_unlock(&priv->mutex);
  6390. return -EAGAIN;
  6391. }
  6392. memcpy(priv->staging_rxon.bssid_addr, conf->bssid, ETH_ALEN);
  6393. /* TODO: Audit driver for usage of these members and see
  6394. * if mac80211 deprecates them (priv->bssid looks like it
  6395. * shouldn't be there, but I haven't scanned the IBSS code
  6396. * to verify) - jpk */
  6397. memcpy(priv->bssid, conf->bssid, ETH_ALEN);
  6398. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6399. iwl4965_config_ap(priv);
  6400. else {
  6401. rc = iwl4965_commit_rxon(priv);
  6402. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA) && rc)
  6403. iwl4965_rxon_add_station(
  6404. priv, priv->active_rxon.bssid_addr, 1);
  6405. }
  6406. } else {
  6407. iwl4965_scan_cancel_timeout(priv, 100);
  6408. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6409. iwl4965_commit_rxon(priv);
  6410. }
  6411. done:
  6412. spin_lock_irqsave(&priv->lock, flags);
  6413. if (!conf->ssid_len)
  6414. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6415. else
  6416. memcpy(priv->essid, conf->ssid, conf->ssid_len);
  6417. priv->essid_len = conf->ssid_len;
  6418. spin_unlock_irqrestore(&priv->lock, flags);
  6419. IWL_DEBUG_MAC80211("leave\n");
  6420. mutex_unlock(&priv->mutex);
  6421. return 0;
  6422. }
  6423. static void iwl4965_configure_filter(struct ieee80211_hw *hw,
  6424. unsigned int changed_flags,
  6425. unsigned int *total_flags,
  6426. int mc_count, struct dev_addr_list *mc_list)
  6427. {
  6428. /*
  6429. * XXX: dummy
  6430. * see also iwl4965_connection_init_rx_config
  6431. */
  6432. *total_flags = 0;
  6433. }
  6434. static void iwl4965_mac_remove_interface(struct ieee80211_hw *hw,
  6435. struct ieee80211_if_init_conf *conf)
  6436. {
  6437. struct iwl4965_priv *priv = hw->priv;
  6438. IWL_DEBUG_MAC80211("enter\n");
  6439. mutex_lock(&priv->mutex);
  6440. if (iwl4965_is_ready_rf(priv)) {
  6441. iwl4965_scan_cancel_timeout(priv, 100);
  6442. cancel_delayed_work(&priv->post_associate);
  6443. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6444. iwl4965_commit_rxon(priv);
  6445. }
  6446. if (priv->vif == conf->vif) {
  6447. priv->vif = NULL;
  6448. memset(priv->bssid, 0, ETH_ALEN);
  6449. memset(priv->essid, 0, IW_ESSID_MAX_SIZE);
  6450. priv->essid_len = 0;
  6451. }
  6452. mutex_unlock(&priv->mutex);
  6453. IWL_DEBUG_MAC80211("leave\n");
  6454. }
  6455. static void iwl4965_bss_info_changed(struct ieee80211_hw *hw,
  6456. struct ieee80211_vif *vif,
  6457. struct ieee80211_bss_conf *bss_conf,
  6458. u32 changes)
  6459. {
  6460. struct iwl4965_priv *priv = hw->priv;
  6461. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  6462. if (bss_conf->use_short_preamble)
  6463. priv->staging_rxon.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  6464. else
  6465. priv->staging_rxon.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  6466. }
  6467. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  6468. if (bss_conf->use_cts_prot && (priv->band != IEEE80211_BAND_5GHZ))
  6469. priv->staging_rxon.flags |= RXON_FLG_TGG_PROTECT_MSK;
  6470. else
  6471. priv->staging_rxon.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  6472. }
  6473. if (changes & BSS_CHANGED_ASSOC) {
  6474. /*
  6475. * TODO:
  6476. * do stuff instead of sniffing assoc resp
  6477. */
  6478. }
  6479. if (iwl4965_is_associated(priv))
  6480. iwl4965_send_rxon_assoc(priv);
  6481. }
  6482. static int iwl4965_mac_hw_scan(struct ieee80211_hw *hw, u8 *ssid, size_t len)
  6483. {
  6484. int rc = 0;
  6485. unsigned long flags;
  6486. struct iwl4965_priv *priv = hw->priv;
  6487. IWL_DEBUG_MAC80211("enter\n");
  6488. mutex_lock(&priv->mutex);
  6489. spin_lock_irqsave(&priv->lock, flags);
  6490. if (!iwl4965_is_ready_rf(priv)) {
  6491. rc = -EIO;
  6492. IWL_DEBUG_MAC80211("leave - not ready or exit pending\n");
  6493. goto out_unlock;
  6494. }
  6495. if (priv->iw_mode == IEEE80211_IF_TYPE_AP) { /* APs don't scan */
  6496. rc = -EIO;
  6497. IWL_ERROR("ERROR: APs don't scan\n");
  6498. goto out_unlock;
  6499. }
  6500. /* we don't schedule scan within next_scan_jiffies period */
  6501. if (priv->next_scan_jiffies &&
  6502. time_after(priv->next_scan_jiffies, jiffies)) {
  6503. rc = -EAGAIN;
  6504. goto out_unlock;
  6505. }
  6506. /* if we just finished scan ask for delay */
  6507. if (priv->last_scan_jiffies && time_after(priv->last_scan_jiffies +
  6508. IWL_DELAY_NEXT_SCAN, jiffies)) {
  6509. rc = -EAGAIN;
  6510. goto out_unlock;
  6511. }
  6512. if (len) {
  6513. IWL_DEBUG_SCAN("direct scan for %s [%d]\n ",
  6514. iwl4965_escape_essid(ssid, len), (int)len);
  6515. priv->one_direct_scan = 1;
  6516. priv->direct_ssid_len = (u8)
  6517. min((u8) len, (u8) IW_ESSID_MAX_SIZE);
  6518. memcpy(priv->direct_ssid, ssid, priv->direct_ssid_len);
  6519. } else
  6520. priv->one_direct_scan = 0;
  6521. rc = iwl4965_scan_initiate(priv);
  6522. IWL_DEBUG_MAC80211("leave\n");
  6523. out_unlock:
  6524. spin_unlock_irqrestore(&priv->lock, flags);
  6525. mutex_unlock(&priv->mutex);
  6526. return rc;
  6527. }
  6528. static int iwl4965_mac_set_key(struct ieee80211_hw *hw, enum set_key_cmd cmd,
  6529. const u8 *local_addr, const u8 *addr,
  6530. struct ieee80211_key_conf *key)
  6531. {
  6532. struct iwl4965_priv *priv = hw->priv;
  6533. DECLARE_MAC_BUF(mac);
  6534. int rc = 0;
  6535. u8 sta_id;
  6536. IWL_DEBUG_MAC80211("enter\n");
  6537. if (!iwl4965_param_hwcrypto) {
  6538. IWL_DEBUG_MAC80211("leave - hwcrypto disabled\n");
  6539. return -EOPNOTSUPP;
  6540. }
  6541. if (is_zero_ether_addr(addr))
  6542. /* only support pairwise keys */
  6543. return -EOPNOTSUPP;
  6544. sta_id = iwl4965_hw_find_station(priv, addr);
  6545. if (sta_id == IWL_INVALID_STATION) {
  6546. IWL_DEBUG_MAC80211("leave - %s not in station map.\n",
  6547. print_mac(mac, addr));
  6548. return -EINVAL;
  6549. }
  6550. mutex_lock(&priv->mutex);
  6551. iwl4965_scan_cancel_timeout(priv, 100);
  6552. switch (cmd) {
  6553. case SET_KEY:
  6554. rc = iwl4965_update_sta_key_info(priv, key, sta_id);
  6555. if (!rc) {
  6556. iwl4965_set_rxon_hwcrypto(priv, 1);
  6557. iwl4965_commit_rxon(priv);
  6558. key->hw_key_idx = sta_id;
  6559. IWL_DEBUG_MAC80211("set_key success, using hwcrypto\n");
  6560. key->flags |= IEEE80211_KEY_FLAG_GENERATE_IV;
  6561. }
  6562. break;
  6563. case DISABLE_KEY:
  6564. rc = iwl4965_clear_sta_key_info(priv, sta_id);
  6565. if (!rc) {
  6566. iwl4965_set_rxon_hwcrypto(priv, 0);
  6567. iwl4965_commit_rxon(priv);
  6568. IWL_DEBUG_MAC80211("disable hwcrypto key\n");
  6569. }
  6570. break;
  6571. default:
  6572. rc = -EINVAL;
  6573. }
  6574. IWL_DEBUG_MAC80211("leave\n");
  6575. mutex_unlock(&priv->mutex);
  6576. return rc;
  6577. }
  6578. static int iwl4965_mac_conf_tx(struct ieee80211_hw *hw, int queue,
  6579. const struct ieee80211_tx_queue_params *params)
  6580. {
  6581. struct iwl4965_priv *priv = hw->priv;
  6582. #ifdef CONFIG_IWL4965_QOS
  6583. unsigned long flags;
  6584. int q;
  6585. #endif /* CONFIG_IWL4965_QOS */
  6586. IWL_DEBUG_MAC80211("enter\n");
  6587. if (!iwl4965_is_ready_rf(priv)) {
  6588. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6589. return -EIO;
  6590. }
  6591. if (queue >= AC_NUM) {
  6592. IWL_DEBUG_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  6593. return 0;
  6594. }
  6595. #ifdef CONFIG_IWL4965_QOS
  6596. if (!priv->qos_data.qos_enable) {
  6597. priv->qos_data.qos_active = 0;
  6598. IWL_DEBUG_MAC80211("leave - qos not enabled\n");
  6599. return 0;
  6600. }
  6601. q = AC_NUM - 1 - queue;
  6602. spin_lock_irqsave(&priv->lock, flags);
  6603. priv->qos_data.def_qos_parm.ac[q].cw_min = cpu_to_le16(params->cw_min);
  6604. priv->qos_data.def_qos_parm.ac[q].cw_max = cpu_to_le16(params->cw_max);
  6605. priv->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  6606. priv->qos_data.def_qos_parm.ac[q].edca_txop =
  6607. cpu_to_le16((params->burst_time * 100));
  6608. priv->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  6609. priv->qos_data.qos_active = 1;
  6610. spin_unlock_irqrestore(&priv->lock, flags);
  6611. mutex_lock(&priv->mutex);
  6612. if (priv->iw_mode == IEEE80211_IF_TYPE_AP)
  6613. iwl4965_activate_qos(priv, 1);
  6614. else if (priv->assoc_id && iwl4965_is_associated(priv))
  6615. iwl4965_activate_qos(priv, 0);
  6616. mutex_unlock(&priv->mutex);
  6617. #endif /*CONFIG_IWL4965_QOS */
  6618. IWL_DEBUG_MAC80211("leave\n");
  6619. return 0;
  6620. }
  6621. static int iwl4965_mac_get_tx_stats(struct ieee80211_hw *hw,
  6622. struct ieee80211_tx_queue_stats *stats)
  6623. {
  6624. struct iwl4965_priv *priv = hw->priv;
  6625. int i, avail;
  6626. struct iwl4965_tx_queue *txq;
  6627. struct iwl4965_queue *q;
  6628. unsigned long flags;
  6629. IWL_DEBUG_MAC80211("enter\n");
  6630. if (!iwl4965_is_ready_rf(priv)) {
  6631. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6632. return -EIO;
  6633. }
  6634. spin_lock_irqsave(&priv->lock, flags);
  6635. for (i = 0; i < AC_NUM; i++) {
  6636. txq = &priv->txq[i];
  6637. q = &txq->q;
  6638. avail = iwl4965_queue_space(q);
  6639. stats->data[i].len = q->n_window - avail;
  6640. stats->data[i].limit = q->n_window - q->high_mark;
  6641. stats->data[i].count = q->n_window;
  6642. }
  6643. spin_unlock_irqrestore(&priv->lock, flags);
  6644. IWL_DEBUG_MAC80211("leave\n");
  6645. return 0;
  6646. }
  6647. static int iwl4965_mac_get_stats(struct ieee80211_hw *hw,
  6648. struct ieee80211_low_level_stats *stats)
  6649. {
  6650. IWL_DEBUG_MAC80211("enter\n");
  6651. IWL_DEBUG_MAC80211("leave\n");
  6652. return 0;
  6653. }
  6654. static u64 iwl4965_mac_get_tsf(struct ieee80211_hw *hw)
  6655. {
  6656. IWL_DEBUG_MAC80211("enter\n");
  6657. IWL_DEBUG_MAC80211("leave\n");
  6658. return 0;
  6659. }
  6660. static void iwl4965_mac_reset_tsf(struct ieee80211_hw *hw)
  6661. {
  6662. struct iwl4965_priv *priv = hw->priv;
  6663. unsigned long flags;
  6664. mutex_lock(&priv->mutex);
  6665. IWL_DEBUG_MAC80211("enter\n");
  6666. priv->lq_mngr.lq_ready = 0;
  6667. #ifdef CONFIG_IWL4965_HT
  6668. spin_lock_irqsave(&priv->lock, flags);
  6669. memset(&priv->current_ht_config, 0, sizeof(struct iwl_ht_info));
  6670. spin_unlock_irqrestore(&priv->lock, flags);
  6671. #endif /* CONFIG_IWL4965_HT */
  6672. #ifdef CONFIG_IWL4965_QOS
  6673. iwl4965_reset_qos(priv);
  6674. #endif
  6675. cancel_delayed_work(&priv->post_associate);
  6676. spin_lock_irqsave(&priv->lock, flags);
  6677. priv->assoc_id = 0;
  6678. priv->assoc_capability = 0;
  6679. priv->call_post_assoc_from_beacon = 0;
  6680. priv->assoc_station_added = 0;
  6681. /* new association get rid of ibss beacon skb */
  6682. if (priv->ibss_beacon)
  6683. dev_kfree_skb(priv->ibss_beacon);
  6684. priv->ibss_beacon = NULL;
  6685. priv->beacon_int = priv->hw->conf.beacon_int;
  6686. priv->timestamp1 = 0;
  6687. priv->timestamp0 = 0;
  6688. if ((priv->iw_mode == IEEE80211_IF_TYPE_STA))
  6689. priv->beacon_int = 0;
  6690. spin_unlock_irqrestore(&priv->lock, flags);
  6691. if (!iwl4965_is_ready_rf(priv)) {
  6692. IWL_DEBUG_MAC80211("leave - not ready\n");
  6693. mutex_unlock(&priv->mutex);
  6694. return;
  6695. }
  6696. /* we are restarting association process
  6697. * clear RXON_FILTER_ASSOC_MSK bit
  6698. */
  6699. if (priv->iw_mode != IEEE80211_IF_TYPE_AP) {
  6700. iwl4965_scan_cancel_timeout(priv, 100);
  6701. priv->staging_rxon.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  6702. iwl4965_commit_rxon(priv);
  6703. }
  6704. /* Per mac80211.h: This is only used in IBSS mode... */
  6705. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6706. IWL_DEBUG_MAC80211("leave - not in IBSS\n");
  6707. mutex_unlock(&priv->mutex);
  6708. return;
  6709. }
  6710. priv->only_active_channel = 0;
  6711. iwl4965_set_rate(priv);
  6712. mutex_unlock(&priv->mutex);
  6713. IWL_DEBUG_MAC80211("leave\n");
  6714. }
  6715. static int iwl4965_mac_beacon_update(struct ieee80211_hw *hw, struct sk_buff *skb,
  6716. struct ieee80211_tx_control *control)
  6717. {
  6718. struct iwl4965_priv *priv = hw->priv;
  6719. unsigned long flags;
  6720. mutex_lock(&priv->mutex);
  6721. IWL_DEBUG_MAC80211("enter\n");
  6722. if (!iwl4965_is_ready_rf(priv)) {
  6723. IWL_DEBUG_MAC80211("leave - RF not ready\n");
  6724. mutex_unlock(&priv->mutex);
  6725. return -EIO;
  6726. }
  6727. if (priv->iw_mode != IEEE80211_IF_TYPE_IBSS) {
  6728. IWL_DEBUG_MAC80211("leave - not IBSS\n");
  6729. mutex_unlock(&priv->mutex);
  6730. return -EIO;
  6731. }
  6732. spin_lock_irqsave(&priv->lock, flags);
  6733. if (priv->ibss_beacon)
  6734. dev_kfree_skb(priv->ibss_beacon);
  6735. priv->ibss_beacon = skb;
  6736. priv->assoc_id = 0;
  6737. IWL_DEBUG_MAC80211("leave\n");
  6738. spin_unlock_irqrestore(&priv->lock, flags);
  6739. #ifdef CONFIG_IWL4965_QOS
  6740. iwl4965_reset_qos(priv);
  6741. #endif
  6742. queue_work(priv->workqueue, &priv->post_associate.work);
  6743. mutex_unlock(&priv->mutex);
  6744. return 0;
  6745. }
  6746. #ifdef CONFIG_IWL4965_HT
  6747. static void iwl4965_ht_info_fill(struct ieee80211_conf *conf,
  6748. struct iwl4965_priv *priv)
  6749. {
  6750. struct iwl_ht_info *iwl_conf = &priv->current_ht_config;
  6751. struct ieee80211_ht_info *ht_conf = &conf->ht_conf;
  6752. struct ieee80211_ht_bss_info *ht_bss_conf = &conf->ht_bss_conf;
  6753. IWL_DEBUG_MAC80211("enter: \n");
  6754. if (!(conf->flags & IEEE80211_CONF_SUPPORT_HT_MODE)) {
  6755. iwl_conf->is_ht = 0;
  6756. return;
  6757. }
  6758. iwl_conf->is_ht = 1;
  6759. priv->ps_mode = (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6760. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_20)
  6761. iwl_conf->sgf |= 0x1;
  6762. if (ht_conf->cap & IEEE80211_HT_CAP_SGI_40)
  6763. iwl_conf->sgf |= 0x2;
  6764. iwl_conf->is_green_field = !!(ht_conf->cap & IEEE80211_HT_CAP_GRN_FLD);
  6765. iwl_conf->max_amsdu_size =
  6766. !!(ht_conf->cap & IEEE80211_HT_CAP_MAX_AMSDU);
  6767. iwl_conf->supported_chan_width =
  6768. !!(ht_conf->cap & IEEE80211_HT_CAP_SUP_WIDTH);
  6769. iwl_conf->tx_mimo_ps_mode =
  6770. (u8)((ht_conf->cap & IEEE80211_HT_CAP_MIMO_PS) >> 2);
  6771. memcpy(iwl_conf->supp_mcs_set, ht_conf->supp_mcs_set, 16);
  6772. iwl_conf->control_channel = ht_bss_conf->primary_channel;
  6773. iwl_conf->extension_chan_offset =
  6774. ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_SEC_OFFSET;
  6775. iwl_conf->tx_chan_width =
  6776. !!(ht_bss_conf->bss_cap & IEEE80211_HT_IE_CHA_WIDTH);
  6777. iwl_conf->ht_protection =
  6778. ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_HT_PROTECTION;
  6779. iwl_conf->non_GF_STA_present =
  6780. !!(ht_bss_conf->bss_op_mode & IEEE80211_HT_IE_NON_GF_STA_PRSNT);
  6781. IWL_DEBUG_MAC80211("control channel %d\n",
  6782. iwl_conf->control_channel);
  6783. IWL_DEBUG_MAC80211("leave\n");
  6784. }
  6785. static int iwl4965_mac_conf_ht(struct ieee80211_hw *hw,
  6786. struct ieee80211_conf *conf)
  6787. {
  6788. struct iwl4965_priv *priv = hw->priv;
  6789. IWL_DEBUG_MAC80211("enter: \n");
  6790. iwl4965_ht_info_fill(conf, priv);
  6791. iwl4965_set_rxon_chain(priv);
  6792. if (priv && priv->assoc_id &&
  6793. (priv->iw_mode == IEEE80211_IF_TYPE_STA)) {
  6794. unsigned long flags;
  6795. spin_lock_irqsave(&priv->lock, flags);
  6796. if (priv->beacon_int)
  6797. queue_work(priv->workqueue, &priv->post_associate.work);
  6798. else
  6799. priv->call_post_assoc_from_beacon = 1;
  6800. spin_unlock_irqrestore(&priv->lock, flags);
  6801. }
  6802. IWL_DEBUG_MAC80211("leave:\n");
  6803. return 0;
  6804. }
  6805. static void iwl4965_set_ht_capab(struct ieee80211_hw *hw,
  6806. struct ieee80211_ht_cap *ht_cap,
  6807. u8 use_current_config)
  6808. {
  6809. struct ieee80211_conf *conf = &hw->conf;
  6810. if (use_current_config) {
  6811. ht_cap->cap_info = cpu_to_le16(conf->ht_conf.cap);
  6812. memcpy(ht_cap->supp_mcs_set,
  6813. conf->ht_conf.supp_mcs_set, 16);
  6814. } else {
  6815. ht_cap->cap_info = cpu_to_le16(mode->ht_info.cap);
  6816. memcpy(ht_cap->supp_mcs_set,
  6817. mode->ht_info.supp_mcs_set, 16);
  6818. }
  6819. ht_cap->ampdu_params_info =
  6820. (mode->ht_info.ampdu_factor & IEEE80211_HT_CAP_AMPDU_FACTOR) |
  6821. ((mode->ht_info.ampdu_density << 2) &
  6822. IEEE80211_HT_CAP_AMPDU_DENSITY);
  6823. }
  6824. #endif /*CONFIG_IWL4965_HT*/
  6825. /*****************************************************************************
  6826. *
  6827. * sysfs attributes
  6828. *
  6829. *****************************************************************************/
  6830. #ifdef CONFIG_IWL4965_DEBUG
  6831. /*
  6832. * The following adds a new attribute to the sysfs representation
  6833. * of this device driver (i.e. a new file in /sys/bus/pci/drivers/iwl/)
  6834. * used for controlling the debug level.
  6835. *
  6836. * See the level definitions in iwl for details.
  6837. */
  6838. static ssize_t show_debug_level(struct device_driver *d, char *buf)
  6839. {
  6840. return sprintf(buf, "0x%08X\n", iwl4965_debug_level);
  6841. }
  6842. static ssize_t store_debug_level(struct device_driver *d,
  6843. const char *buf, size_t count)
  6844. {
  6845. char *p = (char *)buf;
  6846. u32 val;
  6847. val = simple_strtoul(p, &p, 0);
  6848. if (p == buf)
  6849. printk(KERN_INFO DRV_NAME
  6850. ": %s is not in hex or decimal form.\n", buf);
  6851. else
  6852. iwl4965_debug_level = val;
  6853. return strnlen(buf, count);
  6854. }
  6855. static DRIVER_ATTR(debug_level, S_IWUSR | S_IRUGO,
  6856. show_debug_level, store_debug_level);
  6857. #endif /* CONFIG_IWL4965_DEBUG */
  6858. static ssize_t show_rf_kill(struct device *d,
  6859. struct device_attribute *attr, char *buf)
  6860. {
  6861. /*
  6862. * 0 - RF kill not enabled
  6863. * 1 - SW based RF kill active (sysfs)
  6864. * 2 - HW based RF kill active
  6865. * 3 - Both HW and SW based RF kill active
  6866. */
  6867. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6868. int val = (test_bit(STATUS_RF_KILL_SW, &priv->status) ? 0x1 : 0x0) |
  6869. (test_bit(STATUS_RF_KILL_HW, &priv->status) ? 0x2 : 0x0);
  6870. return sprintf(buf, "%i\n", val);
  6871. }
  6872. static ssize_t store_rf_kill(struct device *d,
  6873. struct device_attribute *attr,
  6874. const char *buf, size_t count)
  6875. {
  6876. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6877. mutex_lock(&priv->mutex);
  6878. iwl4965_radio_kill_sw(priv, buf[0] == '1');
  6879. mutex_unlock(&priv->mutex);
  6880. return count;
  6881. }
  6882. static DEVICE_ATTR(rf_kill, S_IWUSR | S_IRUGO, show_rf_kill, store_rf_kill);
  6883. static ssize_t show_temperature(struct device *d,
  6884. struct device_attribute *attr, char *buf)
  6885. {
  6886. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6887. if (!iwl4965_is_alive(priv))
  6888. return -EAGAIN;
  6889. return sprintf(buf, "%d\n", iwl4965_hw_get_temperature(priv));
  6890. }
  6891. static DEVICE_ATTR(temperature, S_IRUGO, show_temperature, NULL);
  6892. static ssize_t show_rs_window(struct device *d,
  6893. struct device_attribute *attr,
  6894. char *buf)
  6895. {
  6896. struct iwl4965_priv *priv = d->driver_data;
  6897. return iwl4965_fill_rs_info(priv->hw, buf, IWL_AP_ID);
  6898. }
  6899. static DEVICE_ATTR(rs_window, S_IRUGO, show_rs_window, NULL);
  6900. static ssize_t show_tx_power(struct device *d,
  6901. struct device_attribute *attr, char *buf)
  6902. {
  6903. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6904. return sprintf(buf, "%d\n", priv->user_txpower_limit);
  6905. }
  6906. static ssize_t store_tx_power(struct device *d,
  6907. struct device_attribute *attr,
  6908. const char *buf, size_t count)
  6909. {
  6910. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6911. char *p = (char *)buf;
  6912. u32 val;
  6913. val = simple_strtoul(p, &p, 10);
  6914. if (p == buf)
  6915. printk(KERN_INFO DRV_NAME
  6916. ": %s is not in decimal form.\n", buf);
  6917. else
  6918. iwl4965_hw_reg_set_txpower(priv, val);
  6919. return count;
  6920. }
  6921. static DEVICE_ATTR(tx_power, S_IWUSR | S_IRUGO, show_tx_power, store_tx_power);
  6922. static ssize_t show_flags(struct device *d,
  6923. struct device_attribute *attr, char *buf)
  6924. {
  6925. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6926. return sprintf(buf, "0x%04X\n", priv->active_rxon.flags);
  6927. }
  6928. static ssize_t store_flags(struct device *d,
  6929. struct device_attribute *attr,
  6930. const char *buf, size_t count)
  6931. {
  6932. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6933. u32 flags = simple_strtoul(buf, NULL, 0);
  6934. mutex_lock(&priv->mutex);
  6935. if (le32_to_cpu(priv->staging_rxon.flags) != flags) {
  6936. /* Cancel any currently running scans... */
  6937. if (iwl4965_scan_cancel_timeout(priv, 100))
  6938. IWL_WARNING("Could not cancel scan.\n");
  6939. else {
  6940. IWL_DEBUG_INFO("Committing rxon.flags = 0x%04X\n",
  6941. flags);
  6942. priv->staging_rxon.flags = cpu_to_le32(flags);
  6943. iwl4965_commit_rxon(priv);
  6944. }
  6945. }
  6946. mutex_unlock(&priv->mutex);
  6947. return count;
  6948. }
  6949. static DEVICE_ATTR(flags, S_IWUSR | S_IRUGO, show_flags, store_flags);
  6950. static ssize_t show_filter_flags(struct device *d,
  6951. struct device_attribute *attr, char *buf)
  6952. {
  6953. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6954. return sprintf(buf, "0x%04X\n",
  6955. le32_to_cpu(priv->active_rxon.filter_flags));
  6956. }
  6957. static ssize_t store_filter_flags(struct device *d,
  6958. struct device_attribute *attr,
  6959. const char *buf, size_t count)
  6960. {
  6961. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  6962. u32 filter_flags = simple_strtoul(buf, NULL, 0);
  6963. mutex_lock(&priv->mutex);
  6964. if (le32_to_cpu(priv->staging_rxon.filter_flags) != filter_flags) {
  6965. /* Cancel any currently running scans... */
  6966. if (iwl4965_scan_cancel_timeout(priv, 100))
  6967. IWL_WARNING("Could not cancel scan.\n");
  6968. else {
  6969. IWL_DEBUG_INFO("Committing rxon.filter_flags = "
  6970. "0x%04X\n", filter_flags);
  6971. priv->staging_rxon.filter_flags =
  6972. cpu_to_le32(filter_flags);
  6973. iwl4965_commit_rxon(priv);
  6974. }
  6975. }
  6976. mutex_unlock(&priv->mutex);
  6977. return count;
  6978. }
  6979. static DEVICE_ATTR(filter_flags, S_IWUSR | S_IRUGO, show_filter_flags,
  6980. store_filter_flags);
  6981. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  6982. static ssize_t show_measurement(struct device *d,
  6983. struct device_attribute *attr, char *buf)
  6984. {
  6985. struct iwl4965_priv *priv = dev_get_drvdata(d);
  6986. struct iwl4965_spectrum_notification measure_report;
  6987. u32 size = sizeof(measure_report), len = 0, ofs = 0;
  6988. u8 *data = (u8 *) & measure_report;
  6989. unsigned long flags;
  6990. spin_lock_irqsave(&priv->lock, flags);
  6991. if (!(priv->measurement_status & MEASUREMENT_READY)) {
  6992. spin_unlock_irqrestore(&priv->lock, flags);
  6993. return 0;
  6994. }
  6995. memcpy(&measure_report, &priv->measure_report, size);
  6996. priv->measurement_status = 0;
  6997. spin_unlock_irqrestore(&priv->lock, flags);
  6998. while (size && (PAGE_SIZE - len)) {
  6999. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  7000. PAGE_SIZE - len, 1);
  7001. len = strlen(buf);
  7002. if (PAGE_SIZE - len)
  7003. buf[len++] = '\n';
  7004. ofs += 16;
  7005. size -= min(size, 16U);
  7006. }
  7007. return len;
  7008. }
  7009. static ssize_t store_measurement(struct device *d,
  7010. struct device_attribute *attr,
  7011. const char *buf, size_t count)
  7012. {
  7013. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7014. struct ieee80211_measurement_params params = {
  7015. .channel = le16_to_cpu(priv->active_rxon.channel),
  7016. .start_time = cpu_to_le64(priv->last_tsf),
  7017. .duration = cpu_to_le16(1),
  7018. };
  7019. u8 type = IWL_MEASURE_BASIC;
  7020. u8 buffer[32];
  7021. u8 channel;
  7022. if (count) {
  7023. char *p = buffer;
  7024. strncpy(buffer, buf, min(sizeof(buffer), count));
  7025. channel = simple_strtoul(p, NULL, 0);
  7026. if (channel)
  7027. params.channel = channel;
  7028. p = buffer;
  7029. while (*p && *p != ' ')
  7030. p++;
  7031. if (*p)
  7032. type = simple_strtoul(p + 1, NULL, 0);
  7033. }
  7034. IWL_DEBUG_INFO("Invoking measurement of type %d on "
  7035. "channel %d (for '%s')\n", type, params.channel, buf);
  7036. iwl4965_get_measurement(priv, &params, type);
  7037. return count;
  7038. }
  7039. static DEVICE_ATTR(measurement, S_IRUSR | S_IWUSR,
  7040. show_measurement, store_measurement);
  7041. #endif /* CONFIG_IWL4965_SPECTRUM_MEASUREMENT */
  7042. static ssize_t store_retry_rate(struct device *d,
  7043. struct device_attribute *attr,
  7044. const char *buf, size_t count)
  7045. {
  7046. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7047. priv->retry_rate = simple_strtoul(buf, NULL, 0);
  7048. if (priv->retry_rate <= 0)
  7049. priv->retry_rate = 1;
  7050. return count;
  7051. }
  7052. static ssize_t show_retry_rate(struct device *d,
  7053. struct device_attribute *attr, char *buf)
  7054. {
  7055. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7056. return sprintf(buf, "%d", priv->retry_rate);
  7057. }
  7058. static DEVICE_ATTR(retry_rate, S_IWUSR | S_IRUSR, show_retry_rate,
  7059. store_retry_rate);
  7060. static ssize_t store_power_level(struct device *d,
  7061. struct device_attribute *attr,
  7062. const char *buf, size_t count)
  7063. {
  7064. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7065. int rc;
  7066. int mode;
  7067. mode = simple_strtoul(buf, NULL, 0);
  7068. mutex_lock(&priv->mutex);
  7069. if (!iwl4965_is_ready(priv)) {
  7070. rc = -EAGAIN;
  7071. goto out;
  7072. }
  7073. if ((mode < 1) || (mode > IWL_POWER_LIMIT) || (mode == IWL_POWER_AC))
  7074. mode = IWL_POWER_AC;
  7075. else
  7076. mode |= IWL_POWER_ENABLED;
  7077. if (mode != priv->power_mode) {
  7078. rc = iwl4965_send_power_mode(priv, IWL_POWER_LEVEL(mode));
  7079. if (rc) {
  7080. IWL_DEBUG_MAC80211("failed setting power mode.\n");
  7081. goto out;
  7082. }
  7083. priv->power_mode = mode;
  7084. }
  7085. rc = count;
  7086. out:
  7087. mutex_unlock(&priv->mutex);
  7088. return rc;
  7089. }
  7090. #define MAX_WX_STRING 80
  7091. /* Values are in microsecond */
  7092. static const s32 timeout_duration[] = {
  7093. 350000,
  7094. 250000,
  7095. 75000,
  7096. 37000,
  7097. 25000,
  7098. };
  7099. static const s32 period_duration[] = {
  7100. 400000,
  7101. 700000,
  7102. 1000000,
  7103. 1000000,
  7104. 1000000
  7105. };
  7106. static ssize_t show_power_level(struct device *d,
  7107. struct device_attribute *attr, char *buf)
  7108. {
  7109. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7110. int level = IWL_POWER_LEVEL(priv->power_mode);
  7111. char *p = buf;
  7112. p += sprintf(p, "%d ", level);
  7113. switch (level) {
  7114. case IWL_POWER_MODE_CAM:
  7115. case IWL_POWER_AC:
  7116. p += sprintf(p, "(AC)");
  7117. break;
  7118. case IWL_POWER_BATTERY:
  7119. p += sprintf(p, "(BATTERY)");
  7120. break;
  7121. default:
  7122. p += sprintf(p,
  7123. "(Timeout %dms, Period %dms)",
  7124. timeout_duration[level - 1] / 1000,
  7125. period_duration[level - 1] / 1000);
  7126. }
  7127. if (!(priv->power_mode & IWL_POWER_ENABLED))
  7128. p += sprintf(p, " OFF\n");
  7129. else
  7130. p += sprintf(p, " \n");
  7131. return (p - buf + 1);
  7132. }
  7133. static DEVICE_ATTR(power_level, S_IWUSR | S_IRUSR, show_power_level,
  7134. store_power_level);
  7135. static ssize_t show_channels(struct device *d,
  7136. struct device_attribute *attr, char *buf)
  7137. {
  7138. /* all this shit doesn't belong into sysfs anyway */
  7139. return 0;
  7140. }
  7141. static DEVICE_ATTR(channels, S_IRUSR, show_channels, NULL);
  7142. static ssize_t show_statistics(struct device *d,
  7143. struct device_attribute *attr, char *buf)
  7144. {
  7145. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7146. u32 size = sizeof(struct iwl4965_notif_statistics);
  7147. u32 len = 0, ofs = 0;
  7148. u8 *data = (u8 *) & priv->statistics;
  7149. int rc = 0;
  7150. if (!iwl4965_is_alive(priv))
  7151. return -EAGAIN;
  7152. mutex_lock(&priv->mutex);
  7153. rc = iwl4965_send_statistics_request(priv);
  7154. mutex_unlock(&priv->mutex);
  7155. if (rc) {
  7156. len = sprintf(buf,
  7157. "Error sending statistics request: 0x%08X\n", rc);
  7158. return len;
  7159. }
  7160. while (size && (PAGE_SIZE - len)) {
  7161. hex_dump_to_buffer(data + ofs, size, 16, 1, buf + len,
  7162. PAGE_SIZE - len, 1);
  7163. len = strlen(buf);
  7164. if (PAGE_SIZE - len)
  7165. buf[len++] = '\n';
  7166. ofs += 16;
  7167. size -= min(size, 16U);
  7168. }
  7169. return len;
  7170. }
  7171. static DEVICE_ATTR(statistics, S_IRUGO, show_statistics, NULL);
  7172. static ssize_t show_antenna(struct device *d,
  7173. struct device_attribute *attr, char *buf)
  7174. {
  7175. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7176. if (!iwl4965_is_alive(priv))
  7177. return -EAGAIN;
  7178. return sprintf(buf, "%d\n", priv->antenna);
  7179. }
  7180. static ssize_t store_antenna(struct device *d,
  7181. struct device_attribute *attr,
  7182. const char *buf, size_t count)
  7183. {
  7184. int ant;
  7185. struct iwl4965_priv *priv = dev_get_drvdata(d);
  7186. if (count == 0)
  7187. return 0;
  7188. if (sscanf(buf, "%1i", &ant) != 1) {
  7189. IWL_DEBUG_INFO("not in hex or decimal form.\n");
  7190. return count;
  7191. }
  7192. if ((ant >= 0) && (ant <= 2)) {
  7193. IWL_DEBUG_INFO("Setting antenna select to %d.\n", ant);
  7194. priv->antenna = (enum iwl4965_antenna)ant;
  7195. } else
  7196. IWL_DEBUG_INFO("Bad antenna select value %d.\n", ant);
  7197. return count;
  7198. }
  7199. static DEVICE_ATTR(antenna, S_IWUSR | S_IRUGO, show_antenna, store_antenna);
  7200. static ssize_t show_status(struct device *d,
  7201. struct device_attribute *attr, char *buf)
  7202. {
  7203. struct iwl4965_priv *priv = (struct iwl4965_priv *)d->driver_data;
  7204. if (!iwl4965_is_alive(priv))
  7205. return -EAGAIN;
  7206. return sprintf(buf, "0x%08x\n", (int)priv->status);
  7207. }
  7208. static DEVICE_ATTR(status, S_IRUGO, show_status, NULL);
  7209. static ssize_t dump_error_log(struct device *d,
  7210. struct device_attribute *attr,
  7211. const char *buf, size_t count)
  7212. {
  7213. char *p = (char *)buf;
  7214. if (p[0] == '1')
  7215. iwl4965_dump_nic_error_log((struct iwl4965_priv *)d->driver_data);
  7216. return strnlen(buf, count);
  7217. }
  7218. static DEVICE_ATTR(dump_errors, S_IWUSR, NULL, dump_error_log);
  7219. static ssize_t dump_event_log(struct device *d,
  7220. struct device_attribute *attr,
  7221. const char *buf, size_t count)
  7222. {
  7223. char *p = (char *)buf;
  7224. if (p[0] == '1')
  7225. iwl4965_dump_nic_event_log((struct iwl4965_priv *)d->driver_data);
  7226. return strnlen(buf, count);
  7227. }
  7228. static DEVICE_ATTR(dump_events, S_IWUSR, NULL, dump_event_log);
  7229. /*****************************************************************************
  7230. *
  7231. * driver setup and teardown
  7232. *
  7233. *****************************************************************************/
  7234. static void iwl4965_setup_deferred_work(struct iwl4965_priv *priv)
  7235. {
  7236. priv->workqueue = create_workqueue(DRV_NAME);
  7237. init_waitqueue_head(&priv->wait_command_queue);
  7238. INIT_WORK(&priv->up, iwl4965_bg_up);
  7239. INIT_WORK(&priv->restart, iwl4965_bg_restart);
  7240. INIT_WORK(&priv->rx_replenish, iwl4965_bg_rx_replenish);
  7241. INIT_WORK(&priv->scan_completed, iwl4965_bg_scan_completed);
  7242. INIT_WORK(&priv->request_scan, iwl4965_bg_request_scan);
  7243. INIT_WORK(&priv->abort_scan, iwl4965_bg_abort_scan);
  7244. INIT_WORK(&priv->rf_kill, iwl4965_bg_rf_kill);
  7245. INIT_WORK(&priv->beacon_update, iwl4965_bg_beacon_update);
  7246. INIT_DELAYED_WORK(&priv->post_associate, iwl4965_bg_post_associate);
  7247. INIT_DELAYED_WORK(&priv->init_alive_start, iwl4965_bg_init_alive_start);
  7248. INIT_DELAYED_WORK(&priv->alive_start, iwl4965_bg_alive_start);
  7249. INIT_DELAYED_WORK(&priv->scan_check, iwl4965_bg_scan_check);
  7250. iwl4965_hw_setup_deferred_work(priv);
  7251. tasklet_init(&priv->irq_tasklet, (void (*)(unsigned long))
  7252. iwl4965_irq_tasklet, (unsigned long)priv);
  7253. }
  7254. static void iwl4965_cancel_deferred_work(struct iwl4965_priv *priv)
  7255. {
  7256. iwl4965_hw_cancel_deferred_work(priv);
  7257. cancel_delayed_work_sync(&priv->init_alive_start);
  7258. cancel_delayed_work(&priv->scan_check);
  7259. cancel_delayed_work(&priv->alive_start);
  7260. cancel_delayed_work(&priv->post_associate);
  7261. cancel_work_sync(&priv->beacon_update);
  7262. }
  7263. static struct attribute *iwl4965_sysfs_entries[] = {
  7264. &dev_attr_antenna.attr,
  7265. &dev_attr_channels.attr,
  7266. &dev_attr_dump_errors.attr,
  7267. &dev_attr_dump_events.attr,
  7268. &dev_attr_flags.attr,
  7269. &dev_attr_filter_flags.attr,
  7270. #ifdef CONFIG_IWL4965_SPECTRUM_MEASUREMENT
  7271. &dev_attr_measurement.attr,
  7272. #endif
  7273. &dev_attr_power_level.attr,
  7274. &dev_attr_retry_rate.attr,
  7275. &dev_attr_rf_kill.attr,
  7276. &dev_attr_rs_window.attr,
  7277. &dev_attr_statistics.attr,
  7278. &dev_attr_status.attr,
  7279. &dev_attr_temperature.attr,
  7280. &dev_attr_tx_power.attr,
  7281. NULL
  7282. };
  7283. static struct attribute_group iwl4965_attribute_group = {
  7284. .name = NULL, /* put in device directory */
  7285. .attrs = iwl4965_sysfs_entries,
  7286. };
  7287. static struct ieee80211_ops iwl4965_hw_ops = {
  7288. .tx = iwl4965_mac_tx,
  7289. .start = iwl4965_mac_start,
  7290. .stop = iwl4965_mac_stop,
  7291. .add_interface = iwl4965_mac_add_interface,
  7292. .remove_interface = iwl4965_mac_remove_interface,
  7293. .config = iwl4965_mac_config,
  7294. .config_interface = iwl4965_mac_config_interface,
  7295. .configure_filter = iwl4965_configure_filter,
  7296. .set_key = iwl4965_mac_set_key,
  7297. .get_stats = iwl4965_mac_get_stats,
  7298. .get_tx_stats = iwl4965_mac_get_tx_stats,
  7299. .conf_tx = iwl4965_mac_conf_tx,
  7300. .get_tsf = iwl4965_mac_get_tsf,
  7301. .reset_tsf = iwl4965_mac_reset_tsf,
  7302. .beacon_update = iwl4965_mac_beacon_update,
  7303. .bss_info_changed = iwl4965_bss_info_changed,
  7304. #ifdef CONFIG_IWL4965_HT
  7305. .conf_ht = iwl4965_mac_conf_ht,
  7306. .ampdu_action = iwl4965_mac_ampdu_action,
  7307. #endif /* CONFIG_IWL4965_HT */
  7308. .hw_scan = iwl4965_mac_hw_scan
  7309. };
  7310. static int iwl4965_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  7311. {
  7312. int err = 0;
  7313. struct iwl4965_priv *priv;
  7314. struct ieee80211_hw *hw;
  7315. int i;
  7316. DECLARE_MAC_BUF(mac);
  7317. /* Disabling hardware scan means that mac80211 will perform scans
  7318. * "the hard way", rather than using device's scan. */
  7319. if (iwl4965_param_disable_hw_scan) {
  7320. IWL_DEBUG_INFO("Disabling hw_scan\n");
  7321. iwl4965_hw_ops.hw_scan = NULL;
  7322. }
  7323. if ((iwl4965_param_queues_num > IWL_MAX_NUM_QUEUES) ||
  7324. (iwl4965_param_queues_num < IWL_MIN_NUM_QUEUES)) {
  7325. IWL_ERROR("invalid queues_num, should be between %d and %d\n",
  7326. IWL_MIN_NUM_QUEUES, IWL_MAX_NUM_QUEUES);
  7327. err = -EINVAL;
  7328. goto out;
  7329. }
  7330. /* mac80211 allocates memory for this device instance, including
  7331. * space for this driver's private structure */
  7332. hw = ieee80211_alloc_hw(sizeof(struct iwl4965_priv), &iwl4965_hw_ops);
  7333. if (hw == NULL) {
  7334. IWL_ERROR("Can not allocate network device\n");
  7335. err = -ENOMEM;
  7336. goto out;
  7337. }
  7338. SET_IEEE80211_DEV(hw, &pdev->dev);
  7339. hw->rate_control_algorithm = "iwl-4965-rs";
  7340. IWL_DEBUG_INFO("*** LOAD DRIVER ***\n");
  7341. priv = hw->priv;
  7342. priv->hw = hw;
  7343. priv->pci_dev = pdev;
  7344. priv->antenna = (enum iwl4965_antenna)iwl4965_param_antenna;
  7345. #ifdef CONFIG_IWL4965_DEBUG
  7346. iwl4965_debug_level = iwl4965_param_debug;
  7347. atomic_set(&priv->restrict_refcnt, 0);
  7348. #endif
  7349. priv->retry_rate = 1;
  7350. priv->ibss_beacon = NULL;
  7351. /* Tell mac80211 and its clients (e.g. Wireless Extensions)
  7352. * the range of signal quality values that we'll provide.
  7353. * Negative values for level/noise indicate that we'll provide dBm.
  7354. * For WE, at least, non-0 values here *enable* display of values
  7355. * in app (iwconfig). */
  7356. hw->max_rssi = -20; /* signal level, negative indicates dBm */
  7357. hw->max_noise = -20; /* noise level, negative indicates dBm */
  7358. hw->max_signal = 100; /* link quality indication (%) */
  7359. /* Tell mac80211 our Tx characteristics */
  7360. hw->flags = IEEE80211_HW_HOST_GEN_BEACON_TEMPLATE;
  7361. /* Default value; 4 EDCA QOS priorities */
  7362. hw->queues = 4;
  7363. #ifdef CONFIG_IWL4965_HT
  7364. /* Enhanced value; more queues, to support 11n aggregation */
  7365. hw->queues = 16;
  7366. #endif /* CONFIG_IWL4965_HT */
  7367. spin_lock_init(&priv->lock);
  7368. spin_lock_init(&priv->power_data.lock);
  7369. spin_lock_init(&priv->sta_lock);
  7370. spin_lock_init(&priv->hcmd_lock);
  7371. spin_lock_init(&priv->lq_mngr.lock);
  7372. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++)
  7373. INIT_LIST_HEAD(&priv->ibss_mac_hash[i]);
  7374. INIT_LIST_HEAD(&priv->free_frames);
  7375. mutex_init(&priv->mutex);
  7376. if (pci_enable_device(pdev)) {
  7377. err = -ENODEV;
  7378. goto out_ieee80211_free_hw;
  7379. }
  7380. pci_set_master(pdev);
  7381. /* Clear the driver's (not device's) station table */
  7382. iwl4965_clear_stations_table(priv);
  7383. priv->data_retry_limit = -1;
  7384. priv->ieee_channels = NULL;
  7385. priv->ieee_rates = NULL;
  7386. priv->band = IEEE80211_BAND_2GHZ;
  7387. err = pci_set_dma_mask(pdev, DMA_32BIT_MASK);
  7388. if (!err)
  7389. err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK);
  7390. if (err) {
  7391. printk(KERN_WARNING DRV_NAME ": No suitable DMA available.\n");
  7392. goto out_pci_disable_device;
  7393. }
  7394. pci_set_drvdata(pdev, priv);
  7395. err = pci_request_regions(pdev, DRV_NAME);
  7396. if (err)
  7397. goto out_pci_disable_device;
  7398. /* We disable the RETRY_TIMEOUT register (0x41) to keep
  7399. * PCI Tx retries from interfering with C3 CPU state */
  7400. pci_write_config_byte(pdev, 0x41, 0x00);
  7401. priv->hw_base = pci_iomap(pdev, 0, 0);
  7402. if (!priv->hw_base) {
  7403. err = -ENODEV;
  7404. goto out_pci_release_regions;
  7405. }
  7406. IWL_DEBUG_INFO("pci_resource_len = 0x%08llx\n",
  7407. (unsigned long long) pci_resource_len(pdev, 0));
  7408. IWL_DEBUG_INFO("pci_resource_base = %p\n", priv->hw_base);
  7409. /* Initialize module parameter values here */
  7410. /* Disable radio (SW RF KILL) via parameter when loading driver */
  7411. if (iwl4965_param_disable) {
  7412. set_bit(STATUS_RF_KILL_SW, &priv->status);
  7413. IWL_DEBUG_INFO("Radio disabled.\n");
  7414. }
  7415. priv->iw_mode = IEEE80211_IF_TYPE_STA;
  7416. priv->ps_mode = 0;
  7417. priv->use_ant_b_for_management_frame = 1; /* start with ant B */
  7418. priv->valid_antenna = 0x7; /* assume all 3 connected */
  7419. priv->ps_mode = IWL_MIMO_PS_NONE;
  7420. /* Choose which receivers/antennas to use */
  7421. iwl4965_set_rxon_chain(priv);
  7422. printk(KERN_INFO DRV_NAME
  7423. ": Detected Intel Wireless WiFi Link 4965AGN\n");
  7424. /* Device-specific setup */
  7425. if (iwl4965_hw_set_hw_setting(priv)) {
  7426. IWL_ERROR("failed to set hw settings\n");
  7427. goto out_iounmap;
  7428. }
  7429. #ifdef CONFIG_IWL4965_QOS
  7430. if (iwl4965_param_qos_enable)
  7431. priv->qos_data.qos_enable = 1;
  7432. iwl4965_reset_qos(priv);
  7433. priv->qos_data.qos_active = 0;
  7434. priv->qos_data.qos_cap.val = 0;
  7435. #endif /* CONFIG_IWL4965_QOS */
  7436. iwl4965_set_rxon_channel(priv, IEEE80211_BAND_2GHZ, 6);
  7437. iwl4965_setup_deferred_work(priv);
  7438. iwl4965_setup_rx_handlers(priv);
  7439. priv->rates_mask = IWL_RATES_MASK;
  7440. /* If power management is turned on, default to AC mode */
  7441. priv->power_mode = IWL_POWER_AC;
  7442. priv->user_txpower_limit = IWL_DEFAULT_TX_POWER;
  7443. iwl4965_disable_interrupts(priv);
  7444. err = sysfs_create_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7445. if (err) {
  7446. IWL_ERROR("failed to create sysfs device attributes\n");
  7447. goto out_release_irq;
  7448. }
  7449. /* nic init */
  7450. iwl4965_set_bit(priv, CSR_GIO_CHICKEN_BITS,
  7451. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  7452. iwl4965_set_bit(priv, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  7453. err = iwl4965_poll_bit(priv, CSR_GP_CNTRL,
  7454. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  7455. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  7456. if (err < 0) {
  7457. IWL_DEBUG_INFO("Failed to init the card\n");
  7458. goto out_remove_sysfs;
  7459. }
  7460. /* Read the EEPROM */
  7461. err = iwl4965_eeprom_init(priv);
  7462. if (err) {
  7463. IWL_ERROR("Unable to init EEPROM\n");
  7464. goto out_remove_sysfs;
  7465. }
  7466. /* MAC Address location in EEPROM same for 3945/4965 */
  7467. get_eeprom_mac(priv, priv->mac_addr);
  7468. IWL_DEBUG_INFO("MAC address: %s\n", print_mac(mac, priv->mac_addr));
  7469. SET_IEEE80211_PERM_ADDR(priv->hw, priv->mac_addr);
  7470. err = iwl4965_init_channel_map(priv);
  7471. if (err) {
  7472. IWL_ERROR("initializing regulatory failed: %d\n", err);
  7473. goto out_remove_sysfs;
  7474. }
  7475. err = iwl4965_init_geos(priv);
  7476. if (err) {
  7477. IWL_ERROR("initializing geos failed: %d\n", err);
  7478. goto out_free_channel_map;
  7479. }
  7480. iwl4965_rate_control_register(priv->hw);
  7481. err = ieee80211_register_hw(priv->hw);
  7482. if (err) {
  7483. IWL_ERROR("Failed to register network device (error %d)\n", err);
  7484. goto out_free_geos;
  7485. }
  7486. priv->hw->conf.beacon_int = 100;
  7487. priv->mac80211_registered = 1;
  7488. pci_save_state(pdev);
  7489. pci_disable_device(pdev);
  7490. return 0;
  7491. out_free_geos:
  7492. iwl4965_free_geos(priv);
  7493. out_free_channel_map:
  7494. iwl4965_free_channel_map(priv);
  7495. out_remove_sysfs:
  7496. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7497. out_release_irq:
  7498. destroy_workqueue(priv->workqueue);
  7499. priv->workqueue = NULL;
  7500. iwl4965_unset_hw_setting(priv);
  7501. out_iounmap:
  7502. pci_iounmap(pdev, priv->hw_base);
  7503. out_pci_release_regions:
  7504. pci_release_regions(pdev);
  7505. out_pci_disable_device:
  7506. pci_disable_device(pdev);
  7507. pci_set_drvdata(pdev, NULL);
  7508. out_ieee80211_free_hw:
  7509. ieee80211_free_hw(priv->hw);
  7510. out:
  7511. return err;
  7512. }
  7513. static void iwl4965_pci_remove(struct pci_dev *pdev)
  7514. {
  7515. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7516. struct list_head *p, *q;
  7517. int i;
  7518. if (!priv)
  7519. return;
  7520. IWL_DEBUG_INFO("*** UNLOAD DRIVER ***\n");
  7521. set_bit(STATUS_EXIT_PENDING, &priv->status);
  7522. iwl4965_down(priv);
  7523. /* Free MAC hash list for ADHOC */
  7524. for (i = 0; i < IWL_IBSS_MAC_HASH_SIZE; i++) {
  7525. list_for_each_safe(p, q, &priv->ibss_mac_hash[i]) {
  7526. list_del(p);
  7527. kfree(list_entry(p, struct iwl4965_ibss_seq, list));
  7528. }
  7529. }
  7530. sysfs_remove_group(&pdev->dev.kobj, &iwl4965_attribute_group);
  7531. iwl4965_dealloc_ucode_pci(priv);
  7532. if (priv->rxq.bd)
  7533. iwl4965_rx_queue_free(priv, &priv->rxq);
  7534. iwl4965_hw_txq_ctx_free(priv);
  7535. iwl4965_unset_hw_setting(priv);
  7536. iwl4965_clear_stations_table(priv);
  7537. if (priv->mac80211_registered) {
  7538. ieee80211_unregister_hw(priv->hw);
  7539. iwl4965_rate_control_unregister(priv->hw);
  7540. }
  7541. /*netif_stop_queue(dev); */
  7542. flush_workqueue(priv->workqueue);
  7543. /* ieee80211_unregister_hw calls iwl4965_mac_stop, which flushes
  7544. * priv->workqueue... so we can't take down the workqueue
  7545. * until now... */
  7546. destroy_workqueue(priv->workqueue);
  7547. priv->workqueue = NULL;
  7548. pci_iounmap(pdev, priv->hw_base);
  7549. pci_release_regions(pdev);
  7550. pci_disable_device(pdev);
  7551. pci_set_drvdata(pdev, NULL);
  7552. iwl4965_free_channel_map(priv);
  7553. iwl4965_free_geos(priv);
  7554. if (priv->ibss_beacon)
  7555. dev_kfree_skb(priv->ibss_beacon);
  7556. ieee80211_free_hw(priv->hw);
  7557. }
  7558. #ifdef CONFIG_PM
  7559. static int iwl4965_pci_suspend(struct pci_dev *pdev, pm_message_t state)
  7560. {
  7561. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7562. if (priv->is_open) {
  7563. set_bit(STATUS_IN_SUSPEND, &priv->status);
  7564. iwl4965_mac_stop(priv->hw);
  7565. priv->is_open = 1;
  7566. }
  7567. pci_set_power_state(pdev, PCI_D3hot);
  7568. return 0;
  7569. }
  7570. static int iwl4965_pci_resume(struct pci_dev *pdev)
  7571. {
  7572. struct iwl4965_priv *priv = pci_get_drvdata(pdev);
  7573. pci_set_power_state(pdev, PCI_D0);
  7574. if (priv->is_open)
  7575. iwl4965_mac_start(priv->hw);
  7576. clear_bit(STATUS_IN_SUSPEND, &priv->status);
  7577. return 0;
  7578. }
  7579. #endif /* CONFIG_PM */
  7580. /*****************************************************************************
  7581. *
  7582. * driver and module entry point
  7583. *
  7584. *****************************************************************************/
  7585. static struct pci_driver iwl4965_driver = {
  7586. .name = DRV_NAME,
  7587. .id_table = iwl4965_hw_card_ids,
  7588. .probe = iwl4965_pci_probe,
  7589. .remove = __devexit_p(iwl4965_pci_remove),
  7590. #ifdef CONFIG_PM
  7591. .suspend = iwl4965_pci_suspend,
  7592. .resume = iwl4965_pci_resume,
  7593. #endif
  7594. };
  7595. static int __init iwl4965_init(void)
  7596. {
  7597. int ret;
  7598. printk(KERN_INFO DRV_NAME ": " DRV_DESCRIPTION ", " DRV_VERSION "\n");
  7599. printk(KERN_INFO DRV_NAME ": " DRV_COPYRIGHT "\n");
  7600. ret = pci_register_driver(&iwl4965_driver);
  7601. if (ret) {
  7602. IWL_ERROR("Unable to initialize PCI module\n");
  7603. return ret;
  7604. }
  7605. #ifdef CONFIG_IWL4965_DEBUG
  7606. ret = driver_create_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7607. if (ret) {
  7608. IWL_ERROR("Unable to create driver sysfs file\n");
  7609. pci_unregister_driver(&iwl4965_driver);
  7610. return ret;
  7611. }
  7612. #endif
  7613. return ret;
  7614. }
  7615. static void __exit iwl4965_exit(void)
  7616. {
  7617. #ifdef CONFIG_IWL4965_DEBUG
  7618. driver_remove_file(&iwl4965_driver.driver, &driver_attr_debug_level);
  7619. #endif
  7620. pci_unregister_driver(&iwl4965_driver);
  7621. }
  7622. module_param_named(antenna, iwl4965_param_antenna, int, 0444);
  7623. MODULE_PARM_DESC(antenna, "select antenna (1=Main, 2=Aux, default 0 [both])");
  7624. module_param_named(disable, iwl4965_param_disable, int, 0444);
  7625. MODULE_PARM_DESC(disable, "manually disable the radio (default 0 [radio on])");
  7626. module_param_named(hwcrypto, iwl4965_param_hwcrypto, int, 0444);
  7627. MODULE_PARM_DESC(hwcrypto,
  7628. "using hardware crypto engine (default 0 [software])\n");
  7629. module_param_named(debug, iwl4965_param_debug, int, 0444);
  7630. MODULE_PARM_DESC(debug, "debug output mask");
  7631. module_param_named(disable_hw_scan, iwl4965_param_disable_hw_scan, int, 0444);
  7632. MODULE_PARM_DESC(disable_hw_scan, "disable hardware scanning (default 0)");
  7633. module_param_named(queues_num, iwl4965_param_queues_num, int, 0444);
  7634. MODULE_PARM_DESC(queues_num, "number of hw queues.");
  7635. /* QoS */
  7636. module_param_named(qos_enable, iwl4965_param_qos_enable, int, 0444);
  7637. MODULE_PARM_DESC(qos_enable, "enable all QoS functionality");
  7638. module_param_named(amsdu_size_8K, iwl4965_param_amsdu_size_8K, int, 0444);
  7639. MODULE_PARM_DESC(amsdu_size_8K, "enable 8K amsdu size");
  7640. module_exit(iwl4965_exit);
  7641. module_init(iwl4965_init);