tvaudio.c 53 KB

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  1. /*
  2. * experimental driver for simple i2c audio chips.
  3. *
  4. * Copyright (c) 2000 Gerd Knorr
  5. * based on code by:
  6. * Eric Sandeen (eric_sandeen@bigfoot.com)
  7. * Steve VanDeBogart (vandebo@uclink.berkeley.edu)
  8. * Greg Alexander (galexand@acm.org)
  9. *
  10. * This code is placed under the terms of the GNU General Public License
  11. *
  12. * OPTIONS:
  13. * debug - set to 1 if you'd like to see debug messages
  14. *
  15. */
  16. #include <linux/module.h>
  17. #include <linux/moduleparam.h>
  18. #include <linux/kernel.h>
  19. #include <linux/sched.h>
  20. #include <linux/string.h>
  21. #include <linux/timer.h>
  22. #include <linux/delay.h>
  23. #include <linux/errno.h>
  24. #include <linux/slab.h>
  25. #include <linux/videodev.h>
  26. #include <linux/i2c.h>
  27. #include <linux/init.h>
  28. #include <linux/kthread.h>
  29. #include <linux/freezer.h>
  30. #include <media/tvaudio.h>
  31. #include <media/v4l2-common.h>
  32. #include <media/v4l2-chip-ident.h>
  33. #include <media/i2c-addr.h>
  34. /* ---------------------------------------------------------------------- */
  35. /* insmod args */
  36. static int debug = 0; /* insmod parameter */
  37. module_param(debug, int, 0644);
  38. MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips");
  39. MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr");
  40. MODULE_LICENSE("GPL");
  41. #define UNSET (-1U)
  42. /* ---------------------------------------------------------------------- */
  43. /* our structs */
  44. #define MAXREGS 64
  45. struct CHIPSTATE;
  46. typedef int (*getvalue)(int);
  47. typedef int (*checkit)(struct CHIPSTATE*);
  48. typedef int (*initialize)(struct CHIPSTATE*);
  49. typedef int (*getmode)(struct CHIPSTATE*);
  50. typedef void (*setmode)(struct CHIPSTATE*, int mode);
  51. typedef void (*checkmode)(struct CHIPSTATE*);
  52. /* i2c command */
  53. typedef struct AUDIOCMD {
  54. int count; /* # of bytes to send */
  55. unsigned char bytes[MAXREGS+1]; /* addr, data, data, ... */
  56. } audiocmd;
  57. /* chip description */
  58. struct CHIPDESC {
  59. char *name; /* chip name */
  60. int id; /* ID */
  61. int addr_lo, addr_hi; /* i2c address range */
  62. int registers; /* # of registers */
  63. int *insmodopt;
  64. checkit checkit;
  65. initialize initialize;
  66. int flags;
  67. #define CHIP_HAS_VOLUME 1
  68. #define CHIP_HAS_BASSTREBLE 2
  69. #define CHIP_HAS_INPUTSEL 4
  70. /* various i2c command sequences */
  71. audiocmd init;
  72. /* which register has which value */
  73. int leftreg,rightreg,treblereg,bassreg;
  74. /* initialize with (defaults to 65535/65535/32768/32768 */
  75. int leftinit,rightinit,trebleinit,bassinit;
  76. /* functions to convert the values (v4l -> chip) */
  77. getvalue volfunc,treblefunc,bassfunc;
  78. /* get/set mode */
  79. getmode getmode;
  80. setmode setmode;
  81. /* check / autoswitch audio after channel switches */
  82. checkmode checkmode;
  83. /* input switch register + values for v4l inputs */
  84. int inputreg;
  85. int inputmap[4];
  86. int inputmute;
  87. int inputmask;
  88. };
  89. static struct CHIPDESC chiplist[];
  90. /* current state of the chip */
  91. struct CHIPSTATE {
  92. struct i2c_client c;
  93. /* index into CHIPDESC array */
  94. int type;
  95. /* shadow register set */
  96. audiocmd shadow;
  97. /* current settings */
  98. __u16 left,right,treble,bass,muted,mode;
  99. int prevmode;
  100. int radio;
  101. int input;
  102. /* thread */
  103. struct task_struct *thread;
  104. struct timer_list wt;
  105. int watch_stereo;
  106. int audmode;
  107. };
  108. /* ---------------------------------------------------------------------- */
  109. /* i2c addresses */
  110. static unsigned short normal_i2c[] = {
  111. I2C_ADDR_TDA8425 >> 1,
  112. I2C_ADDR_TEA6300 >> 1,
  113. I2C_ADDR_TEA6420 >> 1,
  114. I2C_ADDR_TDA9840 >> 1,
  115. I2C_ADDR_TDA985x_L >> 1,
  116. I2C_ADDR_TDA985x_H >> 1,
  117. I2C_ADDR_TDA9874 >> 1,
  118. I2C_ADDR_PIC16C54 >> 1,
  119. I2C_CLIENT_END };
  120. I2C_CLIENT_INSMOD;
  121. static struct i2c_driver driver;
  122. static struct i2c_client client_template;
  123. /* ---------------------------------------------------------------------- */
  124. /* i2c I/O functions */
  125. static int chip_write(struct CHIPSTATE *chip, int subaddr, int val)
  126. {
  127. unsigned char buffer[2];
  128. if (-1 == subaddr) {
  129. v4l_dbg(1, debug, &chip->c, "%s: chip_write: 0x%x\n",
  130. chip->c.name, val);
  131. chip->shadow.bytes[1] = val;
  132. buffer[0] = val;
  133. if (1 != i2c_master_send(&chip->c,buffer,1)) {
  134. v4l_warn(&chip->c, "%s: I/O error (write 0x%x)\n",
  135. chip->c.name, val);
  136. return -1;
  137. }
  138. } else {
  139. v4l_dbg(1, debug, &chip->c, "%s: chip_write: reg%d=0x%x\n",
  140. chip->c.name, subaddr, val);
  141. chip->shadow.bytes[subaddr+1] = val;
  142. buffer[0] = subaddr;
  143. buffer[1] = val;
  144. if (2 != i2c_master_send(&chip->c,buffer,2)) {
  145. v4l_warn(&chip->c, "%s: I/O error (write reg%d=0x%x)\n",
  146. chip->c.name, subaddr, val);
  147. return -1;
  148. }
  149. }
  150. return 0;
  151. }
  152. static int chip_write_masked(struct CHIPSTATE *chip, int subaddr, int val, int mask)
  153. {
  154. if (mask != 0) {
  155. if (-1 == subaddr) {
  156. val = (chip->shadow.bytes[1] & ~mask) | (val & mask);
  157. } else {
  158. val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask);
  159. }
  160. }
  161. return chip_write(chip, subaddr, val);
  162. }
  163. static int chip_read(struct CHIPSTATE *chip)
  164. {
  165. unsigned char buffer;
  166. if (1 != i2c_master_recv(&chip->c,&buffer,1)) {
  167. v4l_warn(&chip->c, "%s: I/O error (read)\n",
  168. chip->c.name);
  169. return -1;
  170. }
  171. v4l_dbg(1, debug, &chip->c, "%s: chip_read: 0x%x\n",chip->c.name, buffer);
  172. return buffer;
  173. }
  174. static int chip_read2(struct CHIPSTATE *chip, int subaddr)
  175. {
  176. unsigned char write[1];
  177. unsigned char read[1];
  178. struct i2c_msg msgs[2] = {
  179. { chip->c.addr, 0, 1, write },
  180. { chip->c.addr, I2C_M_RD, 1, read }
  181. };
  182. write[0] = subaddr;
  183. if (2 != i2c_transfer(chip->c.adapter,msgs,2)) {
  184. v4l_warn(&chip->c, "%s: I/O error (read2)\n", chip->c.name);
  185. return -1;
  186. }
  187. v4l_dbg(1, debug, &chip->c, "%s: chip_read2: reg%d=0x%x\n",
  188. chip->c.name, subaddr,read[0]);
  189. return read[0];
  190. }
  191. static int chip_cmd(struct CHIPSTATE *chip, char *name, audiocmd *cmd)
  192. {
  193. int i;
  194. if (0 == cmd->count)
  195. return 0;
  196. /* update our shadow register set; print bytes if (debug > 0) */
  197. v4l_dbg(1, debug, &chip->c, "%s: chip_cmd(%s): reg=%d, data:",
  198. chip->c.name, name,cmd->bytes[0]);
  199. for (i = 1; i < cmd->count; i++) {
  200. if (debug)
  201. printk(" 0x%x",cmd->bytes[i]);
  202. chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i];
  203. }
  204. if (debug)
  205. printk("\n");
  206. /* send data to the chip */
  207. if (cmd->count != i2c_master_send(&chip->c,cmd->bytes,cmd->count)) {
  208. v4l_warn(&chip->c, "%s: I/O error (%s)\n", chip->c.name, name);
  209. return -1;
  210. }
  211. return 0;
  212. }
  213. /* ---------------------------------------------------------------------- */
  214. /* kernel thread for doing i2c stuff asyncronly
  215. * right now it is used only to check the audio mode (mono/stereo/whatever)
  216. * some time after switching to another TV channel, then turn on stereo
  217. * if available, ...
  218. */
  219. static void chip_thread_wake(unsigned long data)
  220. {
  221. struct CHIPSTATE *chip = (struct CHIPSTATE*)data;
  222. wake_up_process(chip->thread);
  223. }
  224. static int chip_thread(void *data)
  225. {
  226. struct CHIPSTATE *chip = data;
  227. struct CHIPDESC *desc = chiplist + chip->type;
  228. v4l_dbg(1, debug, &chip->c, "%s: thread started\n", chip->c.name);
  229. set_freezable();
  230. for (;;) {
  231. set_current_state(TASK_INTERRUPTIBLE);
  232. if (!kthread_should_stop())
  233. schedule();
  234. set_current_state(TASK_RUNNING);
  235. try_to_freeze();
  236. if (kthread_should_stop())
  237. break;
  238. v4l_dbg(1, debug, &chip->c, "%s: thread wakeup\n", chip->c.name);
  239. /* don't do anything for radio or if mode != auto */
  240. if (chip->radio || chip->mode != 0)
  241. continue;
  242. /* have a look what's going on */
  243. desc->checkmode(chip);
  244. /* schedule next check */
  245. mod_timer(&chip->wt, jiffies+2*HZ);
  246. }
  247. v4l_dbg(1, debug, &chip->c, "%s: thread exiting\n", chip->c.name);
  248. return 0;
  249. }
  250. static void generic_checkmode(struct CHIPSTATE *chip)
  251. {
  252. struct CHIPDESC *desc = chiplist + chip->type;
  253. int mode = desc->getmode(chip);
  254. if (mode == chip->prevmode)
  255. return;
  256. v4l_dbg(1, debug, &chip->c, "%s: thread checkmode\n", chip->c.name);
  257. chip->prevmode = mode;
  258. if (mode & VIDEO_SOUND_STEREO)
  259. desc->setmode(chip,VIDEO_SOUND_STEREO);
  260. else if (mode & VIDEO_SOUND_LANG1)
  261. desc->setmode(chip,VIDEO_SOUND_LANG1);
  262. else if (mode & VIDEO_SOUND_LANG2)
  263. desc->setmode(chip,VIDEO_SOUND_LANG2);
  264. else
  265. desc->setmode(chip,VIDEO_SOUND_MONO);
  266. }
  267. /* ---------------------------------------------------------------------- */
  268. /* audio chip descriptions - defines+functions for tda9840 */
  269. #define TDA9840_SW 0x00
  270. #define TDA9840_LVADJ 0x02
  271. #define TDA9840_STADJ 0x03
  272. #define TDA9840_TEST 0x04
  273. #define TDA9840_MONO 0x10
  274. #define TDA9840_STEREO 0x2a
  275. #define TDA9840_DUALA 0x12
  276. #define TDA9840_DUALB 0x1e
  277. #define TDA9840_DUALAB 0x1a
  278. #define TDA9840_DUALBA 0x16
  279. #define TDA9840_EXTERNAL 0x7a
  280. #define TDA9840_DS_DUAL 0x20 /* Dual sound identified */
  281. #define TDA9840_ST_STEREO 0x40 /* Stereo sound identified */
  282. #define TDA9840_PONRES 0x80 /* Power-on reset detected if = 1 */
  283. #define TDA9840_TEST_INT1SN 0x1 /* Integration time 0.5s when set */
  284. #define TDA9840_TEST_INTFU 0x02 /* Disables integrator function */
  285. static int tda9840_getmode(struct CHIPSTATE *chip)
  286. {
  287. int val, mode;
  288. val = chip_read(chip);
  289. mode = VIDEO_SOUND_MONO;
  290. if (val & TDA9840_DS_DUAL)
  291. mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
  292. if (val & TDA9840_ST_STEREO)
  293. mode |= VIDEO_SOUND_STEREO;
  294. v4l_dbg(1, debug, &chip->c, "tda9840_getmode(): raw chip read: %d, return: %d\n",
  295. val, mode);
  296. return mode;
  297. }
  298. static void tda9840_setmode(struct CHIPSTATE *chip, int mode)
  299. {
  300. int update = 1;
  301. int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e;
  302. switch (mode) {
  303. case VIDEO_SOUND_MONO:
  304. t |= TDA9840_MONO;
  305. break;
  306. case VIDEO_SOUND_STEREO:
  307. t |= TDA9840_STEREO;
  308. break;
  309. case VIDEO_SOUND_LANG1:
  310. t |= TDA9840_DUALA;
  311. break;
  312. case VIDEO_SOUND_LANG2:
  313. t |= TDA9840_DUALB;
  314. break;
  315. default:
  316. update = 0;
  317. }
  318. if (update)
  319. chip_write(chip, TDA9840_SW, t);
  320. }
  321. static int tda9840_checkit(struct CHIPSTATE *chip)
  322. {
  323. int rc;
  324. rc = chip_read(chip);
  325. /* lower 5 bits should be 0 */
  326. return ((rc & 0x1f) == 0) ? 1 : 0;
  327. }
  328. /* ---------------------------------------------------------------------- */
  329. /* audio chip descriptions - defines+functions for tda985x */
  330. /* subaddresses for TDA9855 */
  331. #define TDA9855_VR 0x00 /* Volume, right */
  332. #define TDA9855_VL 0x01 /* Volume, left */
  333. #define TDA9855_BA 0x02 /* Bass */
  334. #define TDA9855_TR 0x03 /* Treble */
  335. #define TDA9855_SW 0x04 /* Subwoofer - not connected on DTV2000 */
  336. /* subaddresses for TDA9850 */
  337. #define TDA9850_C4 0x04 /* Control 1 for TDA9850 */
  338. /* subaddesses for both chips */
  339. #define TDA985x_C5 0x05 /* Control 2 for TDA9850, Control 1 for TDA9855 */
  340. #define TDA985x_C6 0x06 /* Control 3 for TDA9850, Control 2 for TDA9855 */
  341. #define TDA985x_C7 0x07 /* Control 4 for TDA9850, Control 3 for TDA9855 */
  342. #define TDA985x_A1 0x08 /* Alignment 1 for both chips */
  343. #define TDA985x_A2 0x09 /* Alignment 2 for both chips */
  344. #define TDA985x_A3 0x0a /* Alignment 3 for both chips */
  345. /* Masks for bits in TDA9855 subaddresses */
  346. /* 0x00 - VR in TDA9855 */
  347. /* 0x01 - VL in TDA9855 */
  348. /* lower 7 bits control gain from -71dB (0x28) to 16dB (0x7f)
  349. * in 1dB steps - mute is 0x27 */
  350. /* 0x02 - BA in TDA9855 */
  351. /* lower 5 bits control bass gain from -12dB (0x06) to 16.5dB (0x19)
  352. * in .5dB steps - 0 is 0x0E */
  353. /* 0x03 - TR in TDA9855 */
  354. /* 4 bits << 1 control treble gain from -12dB (0x3) to 12dB (0xb)
  355. * in 3dB steps - 0 is 0x7 */
  356. /* Masks for bits in both chips' subaddresses */
  357. /* 0x04 - SW in TDA9855, C4/Control 1 in TDA9850 */
  358. /* Unique to TDA9855: */
  359. /* 4 bits << 2 control subwoofer/surround gain from -14db (0x1) to 14db (0xf)
  360. * in 3dB steps - mute is 0x0 */
  361. /* Unique to TDA9850: */
  362. /* lower 4 bits control stereo noise threshold, over which stereo turns off
  363. * set to values of 0x00 through 0x0f for Ster1 through Ster16 */
  364. /* 0x05 - C5 - Control 1 in TDA9855 , Control 2 in TDA9850*/
  365. /* Unique to TDA9855: */
  366. #define TDA9855_MUTE 1<<7 /* GMU, Mute at outputs */
  367. #define TDA9855_AVL 1<<6 /* AVL, Automatic Volume Level */
  368. #define TDA9855_LOUD 1<<5 /* Loudness, 1==off */
  369. #define TDA9855_SUR 1<<3 /* Surround / Subwoofer 1==.5(L-R) 0==.5(L+R) */
  370. /* Bits 0 to 3 select various combinations
  371. * of line in and line out, only the
  372. * interesting ones are defined */
  373. #define TDA9855_EXT 1<<2 /* Selects inputs LIR and LIL. Pins 41 & 12 */
  374. #define TDA9855_INT 0 /* Selects inputs LOR and LOL. (internal) */
  375. /* Unique to TDA9850: */
  376. /* lower 4 bits contol SAP noise threshold, over which SAP turns off
  377. * set to values of 0x00 through 0x0f for SAP1 through SAP16 */
  378. /* 0x06 - C6 - Control 2 in TDA9855, Control 3 in TDA9850 */
  379. /* Common to TDA9855 and TDA9850: */
  380. #define TDA985x_SAP 3<<6 /* Selects SAP output, mute if not received */
  381. #define TDA985x_STEREO 1<<6 /* Selects Stereo ouput, mono if not received */
  382. #define TDA985x_MONO 0 /* Forces Mono output */
  383. #define TDA985x_LMU 1<<3 /* Mute (LOR/LOL for 9855, OUTL/OUTR for 9850) */
  384. /* Unique to TDA9855: */
  385. #define TDA9855_TZCM 1<<5 /* If set, don't mute till zero crossing */
  386. #define TDA9855_VZCM 1<<4 /* If set, don't change volume till zero crossing*/
  387. #define TDA9855_LINEAR 0 /* Linear Stereo */
  388. #define TDA9855_PSEUDO 1 /* Pseudo Stereo */
  389. #define TDA9855_SPAT_30 2 /* Spatial Stereo, 30% anti-phase crosstalk */
  390. #define TDA9855_SPAT_50 3 /* Spatial Stereo, 52% anti-phase crosstalk */
  391. #define TDA9855_E_MONO 7 /* Forced mono - mono select elseware, so useless*/
  392. /* 0x07 - C7 - Control 3 in TDA9855, Control 4 in TDA9850 */
  393. /* Common to both TDA9855 and TDA9850: */
  394. /* lower 4 bits control input gain from -3.5dB (0x0) to 4dB (0xF)
  395. * in .5dB steps - 0dB is 0x7 */
  396. /* 0x08, 0x09 - A1 and A2 (read/write) */
  397. /* Common to both TDA9855 and TDA9850: */
  398. /* lower 5 bites are wideband and spectral expander alignment
  399. * from 0x00 to 0x1f - nominal at 0x0f and 0x10 (read/write) */
  400. #define TDA985x_STP 1<<5 /* Stereo Pilot/detect (read-only) */
  401. #define TDA985x_SAPP 1<<6 /* SAP Pilot/detect (read-only) */
  402. #define TDA985x_STS 1<<7 /* Stereo trigger 1= <35mV 0= <30mV (write-only)*/
  403. /* 0x0a - A3 */
  404. /* Common to both TDA9855 and TDA9850: */
  405. /* lower 3 bits control timing current for alignment: -30% (0x0), -20% (0x1),
  406. * -10% (0x2), nominal (0x3), +10% (0x6), +20% (0x5), +30% (0x4) */
  407. #define TDA985x_ADJ 1<<7 /* Stereo adjust on/off (wideband and spectral */
  408. static int tda9855_volume(int val) { return val/0x2e8+0x27; }
  409. static int tda9855_bass(int val) { return val/0xccc+0x06; }
  410. static int tda9855_treble(int val) { return (val/0x1c71+0x3)<<1; }
  411. static int tda985x_getmode(struct CHIPSTATE *chip)
  412. {
  413. int mode;
  414. mode = ((TDA985x_STP | TDA985x_SAPP) &
  415. chip_read(chip)) >> 4;
  416. /* Add mono mode regardless of SAP and stereo */
  417. /* Allows forced mono */
  418. return mode | VIDEO_SOUND_MONO;
  419. }
  420. static void tda985x_setmode(struct CHIPSTATE *chip, int mode)
  421. {
  422. int update = 1;
  423. int c6 = chip->shadow.bytes[TDA985x_C6+1] & 0x3f;
  424. switch (mode) {
  425. case VIDEO_SOUND_MONO:
  426. c6 |= TDA985x_MONO;
  427. break;
  428. case VIDEO_SOUND_STEREO:
  429. c6 |= TDA985x_STEREO;
  430. break;
  431. case VIDEO_SOUND_LANG1:
  432. c6 |= TDA985x_SAP;
  433. break;
  434. default:
  435. update = 0;
  436. }
  437. if (update)
  438. chip_write(chip,TDA985x_C6,c6);
  439. }
  440. /* ---------------------------------------------------------------------- */
  441. /* audio chip descriptions - defines+functions for tda9873h */
  442. /* Subaddresses for TDA9873H */
  443. #define TDA9873_SW 0x00 /* Switching */
  444. #define TDA9873_AD 0x01 /* Adjust */
  445. #define TDA9873_PT 0x02 /* Port */
  446. /* Subaddress 0x00: Switching Data
  447. * B7..B0:
  448. *
  449. * B1, B0: Input source selection
  450. * 0, 0 internal
  451. * 1, 0 external stereo
  452. * 0, 1 external mono
  453. */
  454. #define TDA9873_INP_MASK 3
  455. #define TDA9873_INTERNAL 0
  456. #define TDA9873_EXT_STEREO 2
  457. #define TDA9873_EXT_MONO 1
  458. /* B3, B2: output signal select
  459. * B4 : transmission mode
  460. * 0, 0, 1 Mono
  461. * 1, 0, 0 Stereo
  462. * 1, 1, 1 Stereo (reversed channel)
  463. * 0, 0, 0 Dual AB
  464. * 0, 0, 1 Dual AA
  465. * 0, 1, 0 Dual BB
  466. * 0, 1, 1 Dual BA
  467. */
  468. #define TDA9873_TR_MASK (7 << 2)
  469. #define TDA9873_TR_MONO 4
  470. #define TDA9873_TR_STEREO 1 << 4
  471. #define TDA9873_TR_REVERSE (1 << 3) & (1 << 2)
  472. #define TDA9873_TR_DUALA 1 << 2
  473. #define TDA9873_TR_DUALB 1 << 3
  474. /* output level controls
  475. * B5: output level switch (0 = reduced gain, 1 = normal gain)
  476. * B6: mute (1 = muted)
  477. * B7: auto-mute (1 = auto-mute enabled)
  478. */
  479. #define TDA9873_GAIN_NORMAL 1 << 5
  480. #define TDA9873_MUTE 1 << 6
  481. #define TDA9873_AUTOMUTE 1 << 7
  482. /* Subaddress 0x01: Adjust/standard */
  483. /* Lower 4 bits (C3..C0) control stereo adjustment on R channel (-0.6 - +0.7 dB)
  484. * Recommended value is +0 dB
  485. */
  486. #define TDA9873_STEREO_ADJ 0x06 /* 0dB gain */
  487. /* Bits C6..C4 control FM stantard
  488. * C6, C5, C4
  489. * 0, 0, 0 B/G (PAL FM)
  490. * 0, 0, 1 M
  491. * 0, 1, 0 D/K(1)
  492. * 0, 1, 1 D/K(2)
  493. * 1, 0, 0 D/K(3)
  494. * 1, 0, 1 I
  495. */
  496. #define TDA9873_BG 0
  497. #define TDA9873_M 1
  498. #define TDA9873_DK1 2
  499. #define TDA9873_DK2 3
  500. #define TDA9873_DK3 4
  501. #define TDA9873_I 5
  502. /* C7 controls identification response time (1=fast/0=normal)
  503. */
  504. #define TDA9873_IDR_NORM 0
  505. #define TDA9873_IDR_FAST 1 << 7
  506. /* Subaddress 0x02: Port data */
  507. /* E1, E0 free programmable ports P1/P2
  508. 0, 0 both ports low
  509. 0, 1 P1 high
  510. 1, 0 P2 high
  511. 1, 1 both ports high
  512. */
  513. #define TDA9873_PORTS 3
  514. /* E2: test port */
  515. #define TDA9873_TST_PORT 1 << 2
  516. /* E5..E3 control mono output channel (together with transmission mode bit B4)
  517. *
  518. * E5 E4 E3 B4 OUTM
  519. * 0 0 0 0 mono
  520. * 0 0 1 0 DUAL B
  521. * 0 1 0 1 mono (from stereo decoder)
  522. */
  523. #define TDA9873_MOUT_MONO 0
  524. #define TDA9873_MOUT_FMONO 0
  525. #define TDA9873_MOUT_DUALA 0
  526. #define TDA9873_MOUT_DUALB 1 << 3
  527. #define TDA9873_MOUT_ST 1 << 4
  528. #define TDA9873_MOUT_EXTM (1 << 4 ) & (1 << 3)
  529. #define TDA9873_MOUT_EXTL 1 << 5
  530. #define TDA9873_MOUT_EXTR (1 << 5 ) & (1 << 3)
  531. #define TDA9873_MOUT_EXTLR (1 << 5 ) & (1 << 4)
  532. #define TDA9873_MOUT_MUTE (1 << 5 ) & (1 << 4) & (1 << 3)
  533. /* Status bits: (chip read) */
  534. #define TDA9873_PONR 0 /* Power-on reset detected if = 1 */
  535. #define TDA9873_STEREO 2 /* Stereo sound is identified */
  536. #define TDA9873_DUAL 4 /* Dual sound is identified */
  537. static int tda9873_getmode(struct CHIPSTATE *chip)
  538. {
  539. int val,mode;
  540. val = chip_read(chip);
  541. mode = VIDEO_SOUND_MONO;
  542. if (val & TDA9873_STEREO)
  543. mode |= VIDEO_SOUND_STEREO;
  544. if (val & TDA9873_DUAL)
  545. mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
  546. v4l_dbg(1, debug, &chip->c, "tda9873_getmode(): raw chip read: %d, return: %d\n",
  547. val, mode);
  548. return mode;
  549. }
  550. static void tda9873_setmode(struct CHIPSTATE *chip, int mode)
  551. {
  552. int sw_data = chip->shadow.bytes[TDA9873_SW+1] & ~ TDA9873_TR_MASK;
  553. /* int adj_data = chip->shadow.bytes[TDA9873_AD+1] ; */
  554. if ((sw_data & TDA9873_INP_MASK) != TDA9873_INTERNAL) {
  555. v4l_dbg(1, debug, &chip->c, "tda9873_setmode(): external input\n");
  556. return;
  557. }
  558. v4l_dbg(1, debug, &chip->c, "tda9873_setmode(): chip->shadow.bytes[%d] = %d\n", TDA9873_SW+1, chip->shadow.bytes[TDA9873_SW+1]);
  559. v4l_dbg(1, debug, &chip->c, "tda9873_setmode(): sw_data = %d\n", sw_data);
  560. switch (mode) {
  561. case VIDEO_SOUND_MONO:
  562. sw_data |= TDA9873_TR_MONO;
  563. break;
  564. case VIDEO_SOUND_STEREO:
  565. sw_data |= TDA9873_TR_STEREO;
  566. break;
  567. case VIDEO_SOUND_LANG1:
  568. sw_data |= TDA9873_TR_DUALA;
  569. break;
  570. case VIDEO_SOUND_LANG2:
  571. sw_data |= TDA9873_TR_DUALB;
  572. break;
  573. default:
  574. chip->mode = 0;
  575. return;
  576. }
  577. chip_write(chip, TDA9873_SW, sw_data);
  578. v4l_dbg(1, debug, &chip->c, "tda9873_setmode(): req. mode %d; chip_write: %d\n",
  579. mode, sw_data);
  580. }
  581. static int tda9873_checkit(struct CHIPSTATE *chip)
  582. {
  583. int rc;
  584. if (-1 == (rc = chip_read2(chip,254)))
  585. return 0;
  586. return (rc & ~0x1f) == 0x80;
  587. }
  588. /* ---------------------------------------------------------------------- */
  589. /* audio chip description - defines+functions for tda9874h and tda9874a */
  590. /* Dariusz Kowalewski <darekk@automex.pl> */
  591. /* Subaddresses for TDA9874H and TDA9874A (slave rx) */
  592. #define TDA9874A_AGCGR 0x00 /* AGC gain */
  593. #define TDA9874A_GCONR 0x01 /* general config */
  594. #define TDA9874A_MSR 0x02 /* monitor select */
  595. #define TDA9874A_C1FRA 0x03 /* carrier 1 freq. */
  596. #define TDA9874A_C1FRB 0x04 /* carrier 1 freq. */
  597. #define TDA9874A_C1FRC 0x05 /* carrier 1 freq. */
  598. #define TDA9874A_C2FRA 0x06 /* carrier 2 freq. */
  599. #define TDA9874A_C2FRB 0x07 /* carrier 2 freq. */
  600. #define TDA9874A_C2FRC 0x08 /* carrier 2 freq. */
  601. #define TDA9874A_DCR 0x09 /* demodulator config */
  602. #define TDA9874A_FMER 0x0a /* FM de-emphasis */
  603. #define TDA9874A_FMMR 0x0b /* FM dematrix */
  604. #define TDA9874A_C1OLAR 0x0c /* ch.1 output level adj. */
  605. #define TDA9874A_C2OLAR 0x0d /* ch.2 output level adj. */
  606. #define TDA9874A_NCONR 0x0e /* NICAM config */
  607. #define TDA9874A_NOLAR 0x0f /* NICAM output level adj. */
  608. #define TDA9874A_NLELR 0x10 /* NICAM lower error limit */
  609. #define TDA9874A_NUELR 0x11 /* NICAM upper error limit */
  610. #define TDA9874A_AMCONR 0x12 /* audio mute control */
  611. #define TDA9874A_SDACOSR 0x13 /* stereo DAC output select */
  612. #define TDA9874A_AOSR 0x14 /* analog output select */
  613. #define TDA9874A_DAICONR 0x15 /* digital audio interface config */
  614. #define TDA9874A_I2SOSR 0x16 /* I2S-bus output select */
  615. #define TDA9874A_I2SOLAR 0x17 /* I2S-bus output level adj. */
  616. #define TDA9874A_MDACOSR 0x18 /* mono DAC output select (tda9874a) */
  617. #define TDA9874A_ESP 0xFF /* easy standard progr. (tda9874a) */
  618. /* Subaddresses for TDA9874H and TDA9874A (slave tx) */
  619. #define TDA9874A_DSR 0x00 /* device status */
  620. #define TDA9874A_NSR 0x01 /* NICAM status */
  621. #define TDA9874A_NECR 0x02 /* NICAM error count */
  622. #define TDA9874A_DR1 0x03 /* add. data LSB */
  623. #define TDA9874A_DR2 0x04 /* add. data MSB */
  624. #define TDA9874A_LLRA 0x05 /* monitor level read-out LSB */
  625. #define TDA9874A_LLRB 0x06 /* monitor level read-out MSB */
  626. #define TDA9874A_SIFLR 0x07 /* SIF level */
  627. #define TDA9874A_TR2 252 /* test reg. 2 */
  628. #define TDA9874A_TR1 253 /* test reg. 1 */
  629. #define TDA9874A_DIC 254 /* device id. code */
  630. #define TDA9874A_SIC 255 /* software id. code */
  631. static int tda9874a_mode = 1; /* 0: A2, 1: NICAM */
  632. static int tda9874a_GCONR = 0xc0; /* default config. input pin: SIFSEL=0 */
  633. static int tda9874a_NCONR = 0x01; /* default NICAM config.: AMSEL=0,AMUTE=1 */
  634. static int tda9874a_ESP = 0x07; /* default standard: NICAM D/K */
  635. static int tda9874a_dic = -1; /* device id. code */
  636. /* insmod options for tda9874a */
  637. static unsigned int tda9874a_SIF = UNSET;
  638. static unsigned int tda9874a_AMSEL = UNSET;
  639. static unsigned int tda9874a_STD = UNSET;
  640. module_param(tda9874a_SIF, int, 0444);
  641. module_param(tda9874a_AMSEL, int, 0444);
  642. module_param(tda9874a_STD, int, 0444);
  643. /*
  644. * initialization table for tda9874 decoder:
  645. * - carrier 1 freq. registers (3 bytes)
  646. * - carrier 2 freq. registers (3 bytes)
  647. * - demudulator config register
  648. * - FM de-emphasis register (slow identification mode)
  649. * Note: frequency registers must be written in single i2c transfer.
  650. */
  651. static struct tda9874a_MODES {
  652. char *name;
  653. audiocmd cmd;
  654. } tda9874a_modelist[9] = {
  655. { "A2, B/G",
  656. { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
  657. { "A2, M (Korea)",
  658. { 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
  659. { "A2, D/K (1)",
  660. { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
  661. { "A2, D/K (2)",
  662. { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
  663. { "A2, D/K (3)",
  664. { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
  665. { "NICAM, I",
  666. { 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
  667. { "NICAM, B/G",
  668. { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} },
  669. { "NICAM, D/K", /* default */
  670. { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} },
  671. { "NICAM, L",
  672. { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} }
  673. };
  674. static int tda9874a_setup(struct CHIPSTATE *chip)
  675. {
  676. chip_write(chip, TDA9874A_AGCGR, 0x00); /* 0 dB */
  677. chip_write(chip, TDA9874A_GCONR, tda9874a_GCONR);
  678. chip_write(chip, TDA9874A_MSR, (tda9874a_mode) ? 0x03:0x02);
  679. if(tda9874a_dic == 0x11) {
  680. chip_write(chip, TDA9874A_FMMR, 0x80);
  681. } else { /* dic == 0x07 */
  682. chip_cmd(chip,"tda9874_modelist",&tda9874a_modelist[tda9874a_STD].cmd);
  683. chip_write(chip, TDA9874A_FMMR, 0x00);
  684. }
  685. chip_write(chip, TDA9874A_C1OLAR, 0x00); /* 0 dB */
  686. chip_write(chip, TDA9874A_C2OLAR, 0x00); /* 0 dB */
  687. chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
  688. chip_write(chip, TDA9874A_NOLAR, 0x00); /* 0 dB */
  689. /* Note: If signal quality is poor you may want to change NICAM */
  690. /* error limit registers (NLELR and NUELR) to some greater values. */
  691. /* Then the sound would remain stereo, but won't be so clear. */
  692. chip_write(chip, TDA9874A_NLELR, 0x14); /* default */
  693. chip_write(chip, TDA9874A_NUELR, 0x50); /* default */
  694. if(tda9874a_dic == 0x11) {
  695. chip_write(chip, TDA9874A_AMCONR, 0xf9);
  696. chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
  697. chip_write(chip, TDA9874A_AOSR, 0x80);
  698. chip_write(chip, TDA9874A_MDACOSR, (tda9874a_mode) ? 0x82:0x80);
  699. chip_write(chip, TDA9874A_ESP, tda9874a_ESP);
  700. } else { /* dic == 0x07 */
  701. chip_write(chip, TDA9874A_AMCONR, 0xfb);
  702. chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
  703. chip_write(chip, TDA9874A_AOSR, 0x00); /* or 0x10 */
  704. }
  705. v4l_dbg(1, debug, &chip->c, "tda9874a_setup(): %s [0x%02X].\n",
  706. tda9874a_modelist[tda9874a_STD].name,tda9874a_STD);
  707. return 1;
  708. }
  709. static int tda9874a_getmode(struct CHIPSTATE *chip)
  710. {
  711. int dsr,nsr,mode;
  712. int necr; /* just for debugging */
  713. mode = VIDEO_SOUND_MONO;
  714. if(-1 == (dsr = chip_read2(chip,TDA9874A_DSR)))
  715. return mode;
  716. if(-1 == (nsr = chip_read2(chip,TDA9874A_NSR)))
  717. return mode;
  718. if(-1 == (necr = chip_read2(chip,TDA9874A_NECR)))
  719. return mode;
  720. /* need to store dsr/nsr somewhere */
  721. chip->shadow.bytes[MAXREGS-2] = dsr;
  722. chip->shadow.bytes[MAXREGS-1] = nsr;
  723. if(tda9874a_mode) {
  724. /* Note: DSR.RSSF and DSR.AMSTAT bits are also checked.
  725. * If NICAM auto-muting is enabled, DSR.AMSTAT=1 indicates
  726. * that sound has (temporarily) switched from NICAM to
  727. * mono FM (or AM) on 1st sound carrier due to high NICAM bit
  728. * error count. So in fact there is no stereo in this case :-(
  729. * But changing the mode to VIDEO_SOUND_MONO would switch
  730. * external 4052 multiplexer in audio_hook().
  731. */
  732. if(nsr & 0x02) /* NSR.S/MB=1 */
  733. mode |= VIDEO_SOUND_STEREO;
  734. if(nsr & 0x01) /* NSR.D/SB=1 */
  735. mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
  736. } else {
  737. if(dsr & 0x02) /* DSR.IDSTE=1 */
  738. mode |= VIDEO_SOUND_STEREO;
  739. if(dsr & 0x04) /* DSR.IDDUA=1 */
  740. mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
  741. }
  742. v4l_dbg(1, debug, &chip->c, "tda9874a_getmode(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n",
  743. dsr, nsr, necr, mode);
  744. return mode;
  745. }
  746. static void tda9874a_setmode(struct CHIPSTATE *chip, int mode)
  747. {
  748. /* Disable/enable NICAM auto-muting (based on DSR.RSSF status bit). */
  749. /* If auto-muting is disabled, we can hear a signal of degrading quality. */
  750. if(tda9874a_mode) {
  751. if(chip->shadow.bytes[MAXREGS-2] & 0x20) /* DSR.RSSF=1 */
  752. tda9874a_NCONR &= 0xfe; /* enable */
  753. else
  754. tda9874a_NCONR |= 0x01; /* disable */
  755. chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
  756. }
  757. /* Note: TDA9874A supports automatic FM dematrixing (FMMR register)
  758. * and has auto-select function for audio output (AOSR register).
  759. * Old TDA9874H doesn't support these features.
  760. * TDA9874A also has additional mono output pin (OUTM), which
  761. * on same (all?) tv-cards is not used, anyway (as well as MONOIN).
  762. */
  763. if(tda9874a_dic == 0x11) {
  764. int aosr = 0x80;
  765. int mdacosr = (tda9874a_mode) ? 0x82:0x80;
  766. switch(mode) {
  767. case VIDEO_SOUND_MONO:
  768. case VIDEO_SOUND_STEREO:
  769. break;
  770. case VIDEO_SOUND_LANG1:
  771. aosr = 0x80; /* auto-select, dual A/A */
  772. mdacosr = (tda9874a_mode) ? 0x82:0x80;
  773. break;
  774. case VIDEO_SOUND_LANG2:
  775. aosr = 0xa0; /* auto-select, dual B/B */
  776. mdacosr = (tda9874a_mode) ? 0x83:0x81;
  777. break;
  778. default:
  779. chip->mode = 0;
  780. return;
  781. }
  782. chip_write(chip, TDA9874A_AOSR, aosr);
  783. chip_write(chip, TDA9874A_MDACOSR, mdacosr);
  784. v4l_dbg(1, debug, &chip->c, "tda9874a_setmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n",
  785. mode, aosr, mdacosr);
  786. } else { /* dic == 0x07 */
  787. int fmmr,aosr;
  788. switch(mode) {
  789. case VIDEO_SOUND_MONO:
  790. fmmr = 0x00; /* mono */
  791. aosr = 0x10; /* A/A */
  792. break;
  793. case VIDEO_SOUND_STEREO:
  794. if(tda9874a_mode) {
  795. fmmr = 0x00;
  796. aosr = 0x00; /* handled by NICAM auto-mute */
  797. } else {
  798. fmmr = (tda9874a_ESP == 1) ? 0x05 : 0x04; /* stereo */
  799. aosr = 0x00;
  800. }
  801. break;
  802. case VIDEO_SOUND_LANG1:
  803. fmmr = 0x02; /* dual */
  804. aosr = 0x10; /* dual A/A */
  805. break;
  806. case VIDEO_SOUND_LANG2:
  807. fmmr = 0x02; /* dual */
  808. aosr = 0x20; /* dual B/B */
  809. break;
  810. default:
  811. chip->mode = 0;
  812. return;
  813. }
  814. chip_write(chip, TDA9874A_FMMR, fmmr);
  815. chip_write(chip, TDA9874A_AOSR, aosr);
  816. v4l_dbg(1, debug, &chip->c, "tda9874a_setmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n",
  817. mode, fmmr, aosr);
  818. }
  819. }
  820. static int tda9874a_checkit(struct CHIPSTATE *chip)
  821. {
  822. int dic,sic; /* device id. and software id. codes */
  823. if(-1 == (dic = chip_read2(chip,TDA9874A_DIC)))
  824. return 0;
  825. if(-1 == (sic = chip_read2(chip,TDA9874A_SIC)))
  826. return 0;
  827. v4l_dbg(1, debug, &chip->c, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic, sic);
  828. if((dic == 0x11)||(dic == 0x07)) {
  829. v4l_info(&chip->c, "found tda9874%s.\n", (dic == 0x11) ? "a":"h");
  830. tda9874a_dic = dic; /* remember device id. */
  831. return 1;
  832. }
  833. return 0; /* not found */
  834. }
  835. static int tda9874a_initialize(struct CHIPSTATE *chip)
  836. {
  837. if (tda9874a_SIF > 2)
  838. tda9874a_SIF = 1;
  839. if (tda9874a_STD > 8)
  840. tda9874a_STD = 0;
  841. if(tda9874a_AMSEL > 1)
  842. tda9874a_AMSEL = 0;
  843. if(tda9874a_SIF == 1)
  844. tda9874a_GCONR = 0xc0; /* sound IF input 1 */
  845. else
  846. tda9874a_GCONR = 0xc1; /* sound IF input 2 */
  847. tda9874a_ESP = tda9874a_STD;
  848. tda9874a_mode = (tda9874a_STD < 5) ? 0 : 1;
  849. if(tda9874a_AMSEL == 0)
  850. tda9874a_NCONR = 0x01; /* auto-mute: analog mono input */
  851. else
  852. tda9874a_NCONR = 0x05; /* auto-mute: 1st carrier FM or AM */
  853. tda9874a_setup(chip);
  854. return 0;
  855. }
  856. /* ---------------------------------------------------------------------- */
  857. /* audio chip descriptions - defines+functions for tea6420 */
  858. #define TEA6300_VL 0x00 /* volume left */
  859. #define TEA6300_VR 0x01 /* volume right */
  860. #define TEA6300_BA 0x02 /* bass */
  861. #define TEA6300_TR 0x03 /* treble */
  862. #define TEA6300_FA 0x04 /* fader control */
  863. #define TEA6300_S 0x05 /* switch register */
  864. /* values for those registers: */
  865. #define TEA6300_S_SA 0x01 /* stereo A input */
  866. #define TEA6300_S_SB 0x02 /* stereo B */
  867. #define TEA6300_S_SC 0x04 /* stereo C */
  868. #define TEA6300_S_GMU 0x80 /* general mute */
  869. #define TEA6320_V 0x00 /* volume (0-5)/loudness off (6)/zero crossing mute(7) */
  870. #define TEA6320_FFR 0x01 /* fader front right (0-5) */
  871. #define TEA6320_FFL 0x02 /* fader front left (0-5) */
  872. #define TEA6320_FRR 0x03 /* fader rear right (0-5) */
  873. #define TEA6320_FRL 0x04 /* fader rear left (0-5) */
  874. #define TEA6320_BA 0x05 /* bass (0-4) */
  875. #define TEA6320_TR 0x06 /* treble (0-4) */
  876. #define TEA6320_S 0x07 /* switch register */
  877. /* values for those registers: */
  878. #define TEA6320_S_SA 0x07 /* stereo A input */
  879. #define TEA6320_S_SB 0x06 /* stereo B */
  880. #define TEA6320_S_SC 0x05 /* stereo C */
  881. #define TEA6320_S_SD 0x04 /* stereo D */
  882. #define TEA6320_S_GMU 0x80 /* general mute */
  883. #define TEA6420_S_SA 0x00 /* stereo A input */
  884. #define TEA6420_S_SB 0x01 /* stereo B */
  885. #define TEA6420_S_SC 0x02 /* stereo C */
  886. #define TEA6420_S_SD 0x03 /* stereo D */
  887. #define TEA6420_S_SE 0x04 /* stereo E */
  888. #define TEA6420_S_GMU 0x05 /* general mute */
  889. static int tea6300_shift10(int val) { return val >> 10; }
  890. static int tea6300_shift12(int val) { return val >> 12; }
  891. /* Assumes 16bit input (values 0x3f to 0x0c are unique, values less than */
  892. /* 0x0c mirror those immediately higher) */
  893. static int tea6320_volume(int val) { return (val / (65535/(63-12)) + 12) & 0x3f; }
  894. static int tea6320_shift11(int val) { return val >> 11; }
  895. static int tea6320_initialize(struct CHIPSTATE * chip)
  896. {
  897. chip_write(chip, TEA6320_FFR, 0x3f);
  898. chip_write(chip, TEA6320_FFL, 0x3f);
  899. chip_write(chip, TEA6320_FRR, 0x3f);
  900. chip_write(chip, TEA6320_FRL, 0x3f);
  901. return 0;
  902. }
  903. /* ---------------------------------------------------------------------- */
  904. /* audio chip descriptions - defines+functions for tda8425 */
  905. #define TDA8425_VL 0x00 /* volume left */
  906. #define TDA8425_VR 0x01 /* volume right */
  907. #define TDA8425_BA 0x02 /* bass */
  908. #define TDA8425_TR 0x03 /* treble */
  909. #define TDA8425_S1 0x08 /* switch functions */
  910. /* values for those registers: */
  911. #define TDA8425_S1_OFF 0xEE /* audio off (mute on) */
  912. #define TDA8425_S1_CH1 0xCE /* audio channel 1 (mute off) - "linear stereo" mode */
  913. #define TDA8425_S1_CH2 0xCF /* audio channel 2 (mute off) - "linear stereo" mode */
  914. #define TDA8425_S1_MU 0x20 /* mute bit */
  915. #define TDA8425_S1_STEREO 0x18 /* stereo bits */
  916. #define TDA8425_S1_STEREO_SPATIAL 0x18 /* spatial stereo */
  917. #define TDA8425_S1_STEREO_LINEAR 0x08 /* linear stereo */
  918. #define TDA8425_S1_STEREO_PSEUDO 0x10 /* pseudo stereo */
  919. #define TDA8425_S1_STEREO_MONO 0x00 /* forced mono */
  920. #define TDA8425_S1_ML 0x06 /* language selector */
  921. #define TDA8425_S1_ML_SOUND_A 0x02 /* sound a */
  922. #define TDA8425_S1_ML_SOUND_B 0x04 /* sound b */
  923. #define TDA8425_S1_ML_STEREO 0x06 /* stereo */
  924. #define TDA8425_S1_IS 0x01 /* channel selector */
  925. static int tda8425_shift10(int val) { return (val >> 10) | 0xc0; }
  926. static int tda8425_shift12(int val) { return (val >> 12) | 0xf0; }
  927. static int tda8425_initialize(struct CHIPSTATE *chip)
  928. {
  929. struct CHIPDESC *desc = chiplist + chip->type;
  930. int inputmap[4] = { /* tuner */ TDA8425_S1_CH2, /* radio */ TDA8425_S1_CH1,
  931. /* extern */ TDA8425_S1_CH1, /* intern */ TDA8425_S1_OFF};
  932. if (chip->c.adapter->id == I2C_HW_B_RIVA) {
  933. memcpy (desc->inputmap, inputmap, sizeof (inputmap));
  934. }
  935. return 0;
  936. }
  937. static void tda8425_setmode(struct CHIPSTATE *chip, int mode)
  938. {
  939. int s1 = chip->shadow.bytes[TDA8425_S1+1] & 0xe1;
  940. if (mode & VIDEO_SOUND_LANG1) {
  941. s1 |= TDA8425_S1_ML_SOUND_A;
  942. s1 |= TDA8425_S1_STEREO_PSEUDO;
  943. } else if (mode & VIDEO_SOUND_LANG2) {
  944. s1 |= TDA8425_S1_ML_SOUND_B;
  945. s1 |= TDA8425_S1_STEREO_PSEUDO;
  946. } else {
  947. s1 |= TDA8425_S1_ML_STEREO;
  948. if (mode & VIDEO_SOUND_MONO)
  949. s1 |= TDA8425_S1_STEREO_MONO;
  950. if (mode & VIDEO_SOUND_STEREO)
  951. s1 |= TDA8425_S1_STEREO_SPATIAL;
  952. }
  953. chip_write(chip,TDA8425_S1,s1);
  954. }
  955. /* ---------------------------------------------------------------------- */
  956. /* audio chip descriptions - defines+functions for pic16c54 (PV951) */
  957. /* the registers of 16C54, I2C sub address. */
  958. #define PIC16C54_REG_KEY_CODE 0x01 /* Not use. */
  959. #define PIC16C54_REG_MISC 0x02
  960. /* bit definition of the RESET register, I2C data. */
  961. #define PIC16C54_MISC_RESET_REMOTE_CTL 0x01 /* bit 0, Reset to receive the key */
  962. /* code of remote controller */
  963. #define PIC16C54_MISC_MTS_MAIN 0x02 /* bit 1 */
  964. #define PIC16C54_MISC_MTS_SAP 0x04 /* bit 2 */
  965. #define PIC16C54_MISC_MTS_BOTH 0x08 /* bit 3 */
  966. #define PIC16C54_MISC_SND_MUTE 0x10 /* bit 4, Mute Audio(Line-in and Tuner) */
  967. #define PIC16C54_MISC_SND_NOTMUTE 0x20 /* bit 5 */
  968. #define PIC16C54_MISC_SWITCH_TUNER 0x40 /* bit 6 , Switch to Line-in */
  969. #define PIC16C54_MISC_SWITCH_LINE 0x80 /* bit 7 , Switch to Tuner */
  970. /* ---------------------------------------------------------------------- */
  971. /* audio chip descriptions - defines+functions for TA8874Z */
  972. /* write 1st byte */
  973. #define TA8874Z_LED_STE 0x80
  974. #define TA8874Z_LED_BIL 0x40
  975. #define TA8874Z_LED_EXT 0x20
  976. #define TA8874Z_MONO_SET 0x10
  977. #define TA8874Z_MUTE 0x08
  978. #define TA8874Z_F_MONO 0x04
  979. #define TA8874Z_MODE_SUB 0x02
  980. #define TA8874Z_MODE_MAIN 0x01
  981. /* write 2nd byte */
  982. /*#define TA8874Z_TI 0x80 */ /* test mode */
  983. #define TA8874Z_SEPARATION 0x3f
  984. #define TA8874Z_SEPARATION_DEFAULT 0x10
  985. /* read */
  986. #define TA8874Z_B1 0x80
  987. #define TA8874Z_B0 0x40
  988. #define TA8874Z_CHAG_FLAG 0x20
  989. /*
  990. * B1 B0
  991. * mono L H
  992. * stereo L L
  993. * BIL H L
  994. */
  995. static int ta8874z_getmode(struct CHIPSTATE *chip)
  996. {
  997. int val, mode;
  998. val = chip_read(chip);
  999. mode = VIDEO_SOUND_MONO;
  1000. if (val & TA8874Z_B1){
  1001. mode |= VIDEO_SOUND_LANG1 | VIDEO_SOUND_LANG2;
  1002. }else if (!(val & TA8874Z_B0)){
  1003. mode |= VIDEO_SOUND_STEREO;
  1004. }
  1005. /* v4l_dbg(1, debug, &chip->c, "ta8874z_getmode(): raw chip read: 0x%02x, return: 0x%02x\n", val, mode); */
  1006. return mode;
  1007. }
  1008. static audiocmd ta8874z_stereo = { 2, {0, TA8874Z_SEPARATION_DEFAULT}};
  1009. static audiocmd ta8874z_mono = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}};
  1010. static audiocmd ta8874z_main = {2, { 0, TA8874Z_SEPARATION_DEFAULT}};
  1011. static audiocmd ta8874z_sub = {2, { TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
  1012. static void ta8874z_setmode(struct CHIPSTATE *chip, int mode)
  1013. {
  1014. int update = 1;
  1015. audiocmd *t = NULL;
  1016. v4l_dbg(1, debug, &chip->c, "ta8874z_setmode(): mode: 0x%02x\n", mode);
  1017. switch(mode){
  1018. case VIDEO_SOUND_MONO:
  1019. t = &ta8874z_mono;
  1020. break;
  1021. case VIDEO_SOUND_STEREO:
  1022. t = &ta8874z_stereo;
  1023. break;
  1024. case VIDEO_SOUND_LANG1:
  1025. t = &ta8874z_main;
  1026. break;
  1027. case VIDEO_SOUND_LANG2:
  1028. t = &ta8874z_sub;
  1029. break;
  1030. default:
  1031. update = 0;
  1032. }
  1033. if(update)
  1034. chip_cmd(chip, "TA8874Z", t);
  1035. }
  1036. static int ta8874z_checkit(struct CHIPSTATE *chip)
  1037. {
  1038. int rc;
  1039. rc = chip_read(chip);
  1040. return ((rc & 0x1f) == 0x1f) ? 1 : 0;
  1041. }
  1042. /* ---------------------------------------------------------------------- */
  1043. /* audio chip descriptions - struct CHIPDESC */
  1044. /* insmod options to enable/disable individual audio chips */
  1045. static int tda8425 = 1;
  1046. static int tda9840 = 1;
  1047. static int tda9850 = 1;
  1048. static int tda9855 = 1;
  1049. static int tda9873 = 1;
  1050. static int tda9874a = 1;
  1051. static int tea6300 = 0; /* address clash with msp34xx */
  1052. static int tea6320 = 0; /* address clash with msp34xx */
  1053. static int tea6420 = 1;
  1054. static int pic16c54 = 1;
  1055. static int ta8874z = 0; /* address clash with tda9840 */
  1056. module_param(tda8425, int, 0444);
  1057. module_param(tda9840, int, 0444);
  1058. module_param(tda9850, int, 0444);
  1059. module_param(tda9855, int, 0444);
  1060. module_param(tda9873, int, 0444);
  1061. module_param(tda9874a, int, 0444);
  1062. module_param(tea6300, int, 0444);
  1063. module_param(tea6320, int, 0444);
  1064. module_param(tea6420, int, 0444);
  1065. module_param(pic16c54, int, 0444);
  1066. module_param(ta8874z, int, 0444);
  1067. static struct CHIPDESC chiplist[] = {
  1068. {
  1069. .name = "tda9840",
  1070. .id = I2C_DRIVERID_TDA9840,
  1071. .insmodopt = &tda9840,
  1072. .addr_lo = I2C_ADDR_TDA9840 >> 1,
  1073. .addr_hi = I2C_ADDR_TDA9840 >> 1,
  1074. .registers = 5,
  1075. .checkit = tda9840_checkit,
  1076. .getmode = tda9840_getmode,
  1077. .setmode = tda9840_setmode,
  1078. .checkmode = generic_checkmode,
  1079. .init = { 2, { TDA9840_TEST, TDA9840_TEST_INT1SN
  1080. /* ,TDA9840_SW, TDA9840_MONO */} }
  1081. },
  1082. {
  1083. .name = "tda9873h",
  1084. .id = I2C_DRIVERID_TDA9873,
  1085. .checkit = tda9873_checkit,
  1086. .insmodopt = &tda9873,
  1087. .addr_lo = I2C_ADDR_TDA985x_L >> 1,
  1088. .addr_hi = I2C_ADDR_TDA985x_H >> 1,
  1089. .registers = 3,
  1090. .flags = CHIP_HAS_INPUTSEL,
  1091. .getmode = tda9873_getmode,
  1092. .setmode = tda9873_setmode,
  1093. .checkmode = generic_checkmode,
  1094. .init = { 4, { TDA9873_SW, 0xa4, 0x06, 0x03 } },
  1095. .inputreg = TDA9873_SW,
  1096. .inputmute = TDA9873_MUTE | TDA9873_AUTOMUTE,
  1097. .inputmap = {0xa0, 0xa2, 0xa0, 0xa0},
  1098. .inputmask = TDA9873_INP_MASK|TDA9873_MUTE|TDA9873_AUTOMUTE,
  1099. },
  1100. {
  1101. .name = "tda9874h/a",
  1102. .id = I2C_DRIVERID_TDA9874,
  1103. .checkit = tda9874a_checkit,
  1104. .initialize = tda9874a_initialize,
  1105. .insmodopt = &tda9874a,
  1106. .addr_lo = I2C_ADDR_TDA9874 >> 1,
  1107. .addr_hi = I2C_ADDR_TDA9874 >> 1,
  1108. .getmode = tda9874a_getmode,
  1109. .setmode = tda9874a_setmode,
  1110. .checkmode = generic_checkmode,
  1111. },
  1112. {
  1113. .name = "tda9850",
  1114. .id = I2C_DRIVERID_TDA9850,
  1115. .insmodopt = &tda9850,
  1116. .addr_lo = I2C_ADDR_TDA985x_L >> 1,
  1117. .addr_hi = I2C_ADDR_TDA985x_H >> 1,
  1118. .registers = 11,
  1119. .getmode = tda985x_getmode,
  1120. .setmode = tda985x_setmode,
  1121. .init = { 8, { TDA9850_C4, 0x08, 0x08, TDA985x_STEREO, 0x07, 0x10, 0x10, 0x03 } }
  1122. },
  1123. {
  1124. .name = "tda9855",
  1125. .id = I2C_DRIVERID_TDA9855,
  1126. .insmodopt = &tda9855,
  1127. .addr_lo = I2C_ADDR_TDA985x_L >> 1,
  1128. .addr_hi = I2C_ADDR_TDA985x_H >> 1,
  1129. .registers = 11,
  1130. .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
  1131. .leftreg = TDA9855_VL,
  1132. .rightreg = TDA9855_VR,
  1133. .bassreg = TDA9855_BA,
  1134. .treblereg = TDA9855_TR,
  1135. .volfunc = tda9855_volume,
  1136. .bassfunc = tda9855_bass,
  1137. .treblefunc = tda9855_treble,
  1138. .getmode = tda985x_getmode,
  1139. .setmode = tda985x_setmode,
  1140. .init = { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2,
  1141. TDA9855_MUTE | TDA9855_AVL | TDA9855_LOUD | TDA9855_INT,
  1142. TDA985x_STEREO | TDA9855_LINEAR | TDA9855_TZCM | TDA9855_VZCM,
  1143. 0x07, 0x10, 0x10, 0x03 }}
  1144. },
  1145. {
  1146. .name = "tea6300",
  1147. .id = I2C_DRIVERID_TEA6300,
  1148. .insmodopt = &tea6300,
  1149. .addr_lo = I2C_ADDR_TEA6300 >> 1,
  1150. .addr_hi = I2C_ADDR_TEA6300 >> 1,
  1151. .registers = 6,
  1152. .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
  1153. .leftreg = TEA6300_VR,
  1154. .rightreg = TEA6300_VL,
  1155. .bassreg = TEA6300_BA,
  1156. .treblereg = TEA6300_TR,
  1157. .volfunc = tea6300_shift10,
  1158. .bassfunc = tea6300_shift12,
  1159. .treblefunc = tea6300_shift12,
  1160. .inputreg = TEA6300_S,
  1161. .inputmap = { TEA6300_S_SA, TEA6300_S_SB, TEA6300_S_SC },
  1162. .inputmute = TEA6300_S_GMU,
  1163. },
  1164. {
  1165. .name = "tea6320",
  1166. .id = I2C_DRIVERID_TEA6300,
  1167. .initialize = tea6320_initialize,
  1168. .insmodopt = &tea6320,
  1169. .addr_lo = I2C_ADDR_TEA6300 >> 1,
  1170. .addr_hi = I2C_ADDR_TEA6300 >> 1,
  1171. .registers = 8,
  1172. .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
  1173. .leftreg = TEA6320_V,
  1174. .rightreg = TEA6320_V,
  1175. .bassreg = TEA6320_BA,
  1176. .treblereg = TEA6320_TR,
  1177. .volfunc = tea6320_volume,
  1178. .bassfunc = tea6320_shift11,
  1179. .treblefunc = tea6320_shift11,
  1180. .inputreg = TEA6320_S,
  1181. .inputmap = { TEA6320_S_SA, TEA6420_S_SB, TEA6300_S_SC, TEA6320_S_SD },
  1182. .inputmute = TEA6300_S_GMU,
  1183. },
  1184. {
  1185. .name = "tea6420",
  1186. .id = I2C_DRIVERID_TEA6420,
  1187. .insmodopt = &tea6420,
  1188. .addr_lo = I2C_ADDR_TEA6420 >> 1,
  1189. .addr_hi = I2C_ADDR_TEA6420 >> 1,
  1190. .registers = 1,
  1191. .flags = CHIP_HAS_INPUTSEL,
  1192. .inputreg = -1,
  1193. .inputmap = { TEA6420_S_SA, TEA6420_S_SB, TEA6420_S_SC },
  1194. .inputmute = TEA6300_S_GMU,
  1195. },
  1196. {
  1197. .name = "tda8425",
  1198. .id = I2C_DRIVERID_TDA8425,
  1199. .insmodopt = &tda8425,
  1200. .addr_lo = I2C_ADDR_TDA8425 >> 1,
  1201. .addr_hi = I2C_ADDR_TDA8425 >> 1,
  1202. .registers = 9,
  1203. .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
  1204. .leftreg = TDA8425_VL,
  1205. .rightreg = TDA8425_VR,
  1206. .bassreg = TDA8425_BA,
  1207. .treblereg = TDA8425_TR,
  1208. .volfunc = tda8425_shift10,
  1209. .bassfunc = tda8425_shift12,
  1210. .treblefunc = tda8425_shift12,
  1211. .inputreg = TDA8425_S1,
  1212. .inputmap = { TDA8425_S1_CH1, TDA8425_S1_CH1, TDA8425_S1_CH1 },
  1213. .inputmute = TDA8425_S1_OFF,
  1214. .setmode = tda8425_setmode,
  1215. .initialize = tda8425_initialize,
  1216. },
  1217. {
  1218. .name = "pic16c54 (PV951)",
  1219. .id = I2C_DRIVERID_PIC16C54_PV9,
  1220. .insmodopt = &pic16c54,
  1221. .addr_lo = I2C_ADDR_PIC16C54 >> 1,
  1222. .addr_hi = I2C_ADDR_PIC16C54>> 1,
  1223. .registers = 2,
  1224. .flags = CHIP_HAS_INPUTSEL,
  1225. .inputreg = PIC16C54_REG_MISC,
  1226. .inputmap = {PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_TUNER,
  1227. PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
  1228. PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
  1229. PIC16C54_MISC_SND_MUTE},
  1230. .inputmute = PIC16C54_MISC_SND_MUTE,
  1231. },
  1232. {
  1233. .name = "ta8874z",
  1234. .id = -1,
  1235. /*.id = I2C_DRIVERID_TA8874Z, */
  1236. .checkit = ta8874z_checkit,
  1237. .insmodopt = &ta8874z,
  1238. .addr_lo = I2C_ADDR_TDA9840 >> 1,
  1239. .addr_hi = I2C_ADDR_TDA9840 >> 1,
  1240. .registers = 2,
  1241. .getmode = ta8874z_getmode,
  1242. .setmode = ta8874z_setmode,
  1243. .checkmode = generic_checkmode,
  1244. .init = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}},
  1245. },
  1246. { .name = NULL } /* EOF */
  1247. };
  1248. /* ---------------------------------------------------------------------- */
  1249. /* i2c registration */
  1250. static int chip_attach(struct i2c_adapter *adap, int addr, int kind)
  1251. {
  1252. struct CHIPSTATE *chip;
  1253. struct CHIPDESC *desc;
  1254. chip = kzalloc(sizeof(*chip),GFP_KERNEL);
  1255. if (!chip)
  1256. return -ENOMEM;
  1257. memcpy(&chip->c,&client_template,sizeof(struct i2c_client));
  1258. chip->c.adapter = adap;
  1259. chip->c.addr = addr;
  1260. i2c_set_clientdata(&chip->c, chip);
  1261. /* find description for the chip */
  1262. v4l_dbg(1, debug, &chip->c, "chip found @ 0x%x\n", addr<<1);
  1263. for (desc = chiplist; desc->name != NULL; desc++) {
  1264. if (0 == *(desc->insmodopt))
  1265. continue;
  1266. if (addr < desc->addr_lo ||
  1267. addr > desc->addr_hi)
  1268. continue;
  1269. if (desc->checkit && !desc->checkit(chip))
  1270. continue;
  1271. break;
  1272. }
  1273. if (desc->name == NULL) {
  1274. v4l_dbg(1, debug, &chip->c, "no matching chip description found\n");
  1275. return -EIO;
  1276. }
  1277. v4l_info(&chip->c, "%s found @ 0x%x (%s)\n", desc->name, addr<<1, adap->name);
  1278. if (desc->flags) {
  1279. v4l_dbg(1, debug, &chip->c, "matches:%s%s%s.\n",
  1280. (desc->flags & CHIP_HAS_VOLUME) ? " volume" : "",
  1281. (desc->flags & CHIP_HAS_BASSTREBLE) ? " bass/treble" : "",
  1282. (desc->flags & CHIP_HAS_INPUTSEL) ? " audiomux" : "");
  1283. }
  1284. /* fill required data structures */
  1285. strcpy(chip->c.name, desc->name);
  1286. chip->type = desc-chiplist;
  1287. chip->shadow.count = desc->registers+1;
  1288. chip->prevmode = -1;
  1289. chip->audmode = V4L2_TUNER_MODE_LANG1;
  1290. /* register */
  1291. i2c_attach_client(&chip->c);
  1292. /* initialization */
  1293. if (desc->initialize != NULL)
  1294. desc->initialize(chip);
  1295. else
  1296. chip_cmd(chip,"init",&desc->init);
  1297. if (desc->flags & CHIP_HAS_VOLUME) {
  1298. chip->left = desc->leftinit ? desc->leftinit : 65535;
  1299. chip->right = desc->rightinit ? desc->rightinit : 65535;
  1300. chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
  1301. chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
  1302. }
  1303. if (desc->flags & CHIP_HAS_BASSTREBLE) {
  1304. chip->treble = desc->trebleinit ? desc->trebleinit : 32768;
  1305. chip->bass = desc->bassinit ? desc->bassinit : 32768;
  1306. chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
  1307. chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
  1308. }
  1309. chip->thread = NULL;
  1310. if (desc->checkmode) {
  1311. /* start async thread */
  1312. init_timer(&chip->wt);
  1313. chip->wt.function = chip_thread_wake;
  1314. chip->wt.data = (unsigned long)chip;
  1315. chip->thread = kthread_run(chip_thread, chip, chip->c.name);
  1316. if (IS_ERR(chip->thread)) {
  1317. v4l_warn(&chip->c, "%s: failed to create kthread\n",
  1318. chip->c.name);
  1319. chip->thread = NULL;
  1320. }
  1321. }
  1322. return 0;
  1323. }
  1324. static int chip_probe(struct i2c_adapter *adap)
  1325. {
  1326. /* don't attach on saa7146 based cards,
  1327. because dedicated drivers are used */
  1328. if ((adap->id == I2C_HW_SAA7146))
  1329. return 0;
  1330. if (adap->class & I2C_CLASS_TV_ANALOG)
  1331. return i2c_probe(adap, &addr_data, chip_attach);
  1332. return 0;
  1333. }
  1334. static int chip_detach(struct i2c_client *client)
  1335. {
  1336. struct CHIPSTATE *chip = i2c_get_clientdata(client);
  1337. del_timer_sync(&chip->wt);
  1338. if (chip->thread) {
  1339. /* shutdown async thread */
  1340. kthread_stop(chip->thread);
  1341. chip->thread = NULL;
  1342. }
  1343. i2c_detach_client(&chip->c);
  1344. kfree(chip);
  1345. return 0;
  1346. }
  1347. static int tvaudio_set_ctrl(struct CHIPSTATE *chip, struct v4l2_control *ctrl)
  1348. {
  1349. struct CHIPDESC *desc = chiplist + chip->type;
  1350. switch (ctrl->id) {
  1351. case V4L2_CID_AUDIO_MUTE:
  1352. if (ctrl->value < 0 || ctrl->value >= 2)
  1353. return -ERANGE;
  1354. chip->muted = ctrl->value;
  1355. if (chip->muted)
  1356. chip_write_masked(chip,desc->inputreg,desc->inputmute,desc->inputmask);
  1357. else
  1358. chip_write_masked(chip,desc->inputreg,
  1359. desc->inputmap[chip->input],desc->inputmask);
  1360. break;
  1361. default:
  1362. return -EINVAL;
  1363. }
  1364. return 0;
  1365. }
  1366. /* ---------------------------------------------------------------------- */
  1367. /* video4linux interface */
  1368. static int chip_command(struct i2c_client *client,
  1369. unsigned int cmd, void *arg)
  1370. {
  1371. struct CHIPSTATE *chip = i2c_get_clientdata(client);
  1372. struct CHIPDESC *desc = chiplist + chip->type;
  1373. v4l_dbg(1, debug, &chip->c, "%s: chip_command 0x%x\n", chip->c.name, cmd);
  1374. switch (cmd) {
  1375. case AUDC_SET_RADIO:
  1376. chip->radio = 1;
  1377. chip->watch_stereo = 0;
  1378. /* del_timer(&chip->wt); */
  1379. break;
  1380. /* --- v4l ioctls --- */
  1381. /* take care: bttv does userspace copying, we'll get a
  1382. kernel pointer here... */
  1383. case VIDIOCGAUDIO:
  1384. {
  1385. struct video_audio *va = arg;
  1386. if (desc->flags & CHIP_HAS_VOLUME) {
  1387. va->flags |= VIDEO_AUDIO_VOLUME;
  1388. va->volume = max(chip->left,chip->right);
  1389. if (va->volume)
  1390. va->balance = (32768*min(chip->left,chip->right))/
  1391. va->volume;
  1392. else
  1393. va->balance = 32768;
  1394. }
  1395. if (desc->flags & CHIP_HAS_BASSTREBLE) {
  1396. va->flags |= VIDEO_AUDIO_BASS | VIDEO_AUDIO_TREBLE;
  1397. va->bass = chip->bass;
  1398. va->treble = chip->treble;
  1399. }
  1400. if (!chip->radio) {
  1401. if (desc->getmode)
  1402. va->mode = desc->getmode(chip);
  1403. else
  1404. va->mode = VIDEO_SOUND_MONO;
  1405. }
  1406. break;
  1407. }
  1408. case VIDIOCSAUDIO:
  1409. {
  1410. struct video_audio *va = arg;
  1411. if (desc->flags & CHIP_HAS_VOLUME) {
  1412. chip->left = (min(65536 - va->balance,32768) *
  1413. va->volume) / 32768;
  1414. chip->right = (min(va->balance,(__u16)32768) *
  1415. va->volume) / 32768;
  1416. chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
  1417. chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
  1418. }
  1419. if (desc->flags & CHIP_HAS_BASSTREBLE) {
  1420. chip->bass = va->bass;
  1421. chip->treble = va->treble;
  1422. chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
  1423. chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
  1424. }
  1425. if (desc->setmode && va->mode) {
  1426. chip->watch_stereo = 0;
  1427. /* del_timer(&chip->wt); */
  1428. chip->mode = va->mode;
  1429. desc->setmode(chip,va->mode);
  1430. }
  1431. break;
  1432. }
  1433. case VIDIOC_S_CTRL:
  1434. return tvaudio_set_ctrl(chip, arg);
  1435. case VIDIOC_INT_G_AUDIO_ROUTING:
  1436. {
  1437. struct v4l2_routing *rt = arg;
  1438. rt->input = chip->input;
  1439. rt->output = 0;
  1440. break;
  1441. }
  1442. case VIDIOC_INT_S_AUDIO_ROUTING:
  1443. {
  1444. struct v4l2_routing *rt = arg;
  1445. if (!(desc->flags & CHIP_HAS_INPUTSEL) || rt->input >= 4)
  1446. return -EINVAL;
  1447. /* There are four inputs: tuner, radio, extern and intern. */
  1448. chip->input = rt->input;
  1449. if (chip->muted)
  1450. break;
  1451. chip_write_masked(chip, desc->inputreg,
  1452. desc->inputmap[chip->input], desc->inputmask);
  1453. break;
  1454. }
  1455. case VIDIOC_S_TUNER:
  1456. {
  1457. struct v4l2_tuner *vt = arg;
  1458. int mode = 0;
  1459. if (chip->radio)
  1460. break;
  1461. switch (vt->audmode) {
  1462. case V4L2_TUNER_MODE_MONO:
  1463. mode = VIDEO_SOUND_MONO;
  1464. break;
  1465. case V4L2_TUNER_MODE_STEREO:
  1466. case V4L2_TUNER_MODE_LANG1_LANG2:
  1467. mode = VIDEO_SOUND_STEREO;
  1468. break;
  1469. case V4L2_TUNER_MODE_LANG1:
  1470. mode = VIDEO_SOUND_LANG1;
  1471. break;
  1472. case V4L2_TUNER_MODE_LANG2:
  1473. mode = VIDEO_SOUND_LANG2;
  1474. break;
  1475. default:
  1476. return -EINVAL;
  1477. }
  1478. chip->audmode = vt->audmode;
  1479. if (desc->setmode && mode) {
  1480. chip->watch_stereo = 0;
  1481. /* del_timer(&chip->wt); */
  1482. chip->mode = mode;
  1483. desc->setmode(chip, mode);
  1484. }
  1485. break;
  1486. }
  1487. case VIDIOC_G_TUNER:
  1488. {
  1489. struct v4l2_tuner *vt = arg;
  1490. int mode = VIDEO_SOUND_MONO;
  1491. if (chip->radio)
  1492. break;
  1493. vt->audmode = chip->audmode;
  1494. vt->rxsubchans = 0;
  1495. vt->capability = V4L2_TUNER_CAP_STEREO |
  1496. V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
  1497. if (desc->getmode)
  1498. mode = desc->getmode(chip);
  1499. if (mode & VIDEO_SOUND_MONO)
  1500. vt->rxsubchans |= V4L2_TUNER_SUB_MONO;
  1501. if (mode & VIDEO_SOUND_STEREO)
  1502. vt->rxsubchans |= V4L2_TUNER_SUB_STEREO;
  1503. /* Note: for SAP it should be mono/lang2 or stereo/lang2.
  1504. When this module is converted fully to v4l2, then this
  1505. should change for those chips that can detect SAP. */
  1506. if (mode & VIDEO_SOUND_LANG1)
  1507. vt->rxsubchans = V4L2_TUNER_SUB_LANG1 |
  1508. V4L2_TUNER_SUB_LANG2;
  1509. break;
  1510. }
  1511. case VIDIOCSCHAN:
  1512. case VIDIOC_S_STD:
  1513. chip->radio = 0;
  1514. break;
  1515. case VIDIOCSFREQ:
  1516. case VIDIOC_S_FREQUENCY:
  1517. chip->mode = 0; /* automatic */
  1518. if (desc->checkmode) {
  1519. desc->setmode(chip,VIDEO_SOUND_MONO);
  1520. if (chip->prevmode != VIDEO_SOUND_MONO)
  1521. chip->prevmode = -1; /* reset previous mode */
  1522. mod_timer(&chip->wt, jiffies+2*HZ);
  1523. /* the thread will call checkmode() later */
  1524. }
  1525. break;
  1526. case VIDIOC_G_CHIP_IDENT:
  1527. return v4l2_chip_ident_i2c_client(client, arg, V4L2_IDENT_TVAUDIO, 0);
  1528. }
  1529. return 0;
  1530. }
  1531. static struct i2c_driver driver = {
  1532. .driver = {
  1533. .name = "tvaudio",
  1534. },
  1535. .id = I2C_DRIVERID_TVAUDIO,
  1536. .attach_adapter = chip_probe,
  1537. .detach_client = chip_detach,
  1538. .command = chip_command,
  1539. };
  1540. static struct i2c_client client_template =
  1541. {
  1542. .name = "(unset)",
  1543. .driver = &driver,
  1544. };
  1545. static int __init audiochip_init_module(void)
  1546. {
  1547. struct CHIPDESC *desc;
  1548. if (debug) {
  1549. printk(KERN_INFO "tvaudio: TV audio decoder + audio/video mux driver\n");
  1550. printk(KERN_INFO "tvaudio: known chips: ");
  1551. for (desc = chiplist; desc->name != NULL; desc++)
  1552. printk("%s%s", (desc == chiplist) ? "" : ", ", desc->name);
  1553. printk("\n");
  1554. }
  1555. return i2c_add_driver(&driver);
  1556. }
  1557. static void __exit audiochip_cleanup_module(void)
  1558. {
  1559. i2c_del_driver(&driver);
  1560. }
  1561. module_init(audiochip_init_module);
  1562. module_exit(audiochip_cleanup_module);
  1563. /*
  1564. * Local variables:
  1565. * c-basic-offset: 8
  1566. * End:
  1567. */