common.c 148 KB

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  1. /******************************************************************************
  2. *
  3. * GPL LICENSE SUMMARY
  4. *
  5. * Copyright(c) 2008 - 2011 Intel Corporation. All rights reserved.
  6. *
  7. * This program is free software; you can redistribute it and/or modify
  8. * it under the terms of version 2 of the GNU General Public License as
  9. * published by the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but
  12. * WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  14. * General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, write to the Free Software
  18. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  19. * USA
  20. *
  21. * The full GNU General Public License is included in this distribution
  22. * in the file called LICENSE.GPL.
  23. *
  24. * Contact Information:
  25. * Intel Linux Wireless <ilw@linux.intel.com>
  26. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  27. *****************************************************************************/
  28. #include <linux/kernel.h>
  29. #include <linux/module.h>
  30. #include <linux/etherdevice.h>
  31. #include <linux/sched.h>
  32. #include <linux/slab.h>
  33. #include <linux/types.h>
  34. #include <linux/lockdep.h>
  35. #include <linux/init.h>
  36. #include <linux/pci.h>
  37. #include <linux/dma-mapping.h>
  38. #include <linux/delay.h>
  39. #include <linux/skbuff.h>
  40. #include <net/mac80211.h>
  41. #include "common.h"
  42. int
  43. _il_poll_bit(struct il_priv *il, u32 addr, u32 bits, u32 mask, int timeout)
  44. {
  45. const int interval = 10; /* microseconds */
  46. int t = 0;
  47. do {
  48. if ((_il_rd(il, addr) & mask) == (bits & mask))
  49. return t;
  50. udelay(interval);
  51. t += interval;
  52. } while (t < timeout);
  53. return -ETIMEDOUT;
  54. }
  55. EXPORT_SYMBOL(_il_poll_bit);
  56. void
  57. il_set_bit(struct il_priv *p, u32 r, u32 m)
  58. {
  59. unsigned long reg_flags;
  60. spin_lock_irqsave(&p->reg_lock, reg_flags);
  61. _il_set_bit(p, r, m);
  62. spin_unlock_irqrestore(&p->reg_lock, reg_flags);
  63. }
  64. EXPORT_SYMBOL(il_set_bit);
  65. void
  66. il_clear_bit(struct il_priv *p, u32 r, u32 m)
  67. {
  68. unsigned long reg_flags;
  69. spin_lock_irqsave(&p->reg_lock, reg_flags);
  70. _il_clear_bit(p, r, m);
  71. spin_unlock_irqrestore(&p->reg_lock, reg_flags);
  72. }
  73. EXPORT_SYMBOL(il_clear_bit);
  74. int
  75. _il_grab_nic_access(struct il_priv *il)
  76. {
  77. int ret;
  78. u32 val;
  79. /* this bit wakes up the NIC */
  80. _il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  81. /*
  82. * These bits say the device is running, and should keep running for
  83. * at least a short while (at least as long as MAC_ACCESS_REQ stays 1),
  84. * but they do not indicate that embedded SRAM is restored yet;
  85. * 3945 and 4965 have volatile SRAM, and must save/restore contents
  86. * to/from host DRAM when sleeping/waking for power-saving.
  87. * Each direction takes approximately 1/4 millisecond; with this
  88. * overhead, it's a good idea to grab and hold MAC_ACCESS_REQUEST if a
  89. * series of register accesses are expected (e.g. reading Event Log),
  90. * to keep device from sleeping.
  91. *
  92. * CSR_UCODE_DRV_GP1 register bit MAC_SLEEP == 0 indicates that
  93. * SRAM is okay/restored. We don't check that here because this call
  94. * is just for hardware register access; but GP1 MAC_SLEEP check is a
  95. * good idea before accessing 3945/4965 SRAM (e.g. reading Event Log).
  96. *
  97. */
  98. ret =
  99. _il_poll_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_VAL_MAC_ACCESS_EN,
  100. (CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY |
  101. CSR_GP_CNTRL_REG_FLAG_GOING_TO_SLEEP), 15000);
  102. if (ret < 0) {
  103. val = _il_rd(il, CSR_GP_CNTRL);
  104. IL_ERR("MAC is in deep sleep!. CSR_GP_CNTRL = 0x%08X\n", val);
  105. _il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_FORCE_NMI);
  106. return -EIO;
  107. }
  108. return 0;
  109. }
  110. EXPORT_SYMBOL_GPL(_il_grab_nic_access);
  111. int
  112. il_poll_bit(struct il_priv *il, u32 addr, u32 mask, int timeout)
  113. {
  114. const int interval = 10; /* microseconds */
  115. int t = 0;
  116. do {
  117. if ((il_rd(il, addr) & mask) == mask)
  118. return t;
  119. udelay(interval);
  120. t += interval;
  121. } while (t < timeout);
  122. return -ETIMEDOUT;
  123. }
  124. EXPORT_SYMBOL(il_poll_bit);
  125. u32
  126. il_rd_prph(struct il_priv *il, u32 reg)
  127. {
  128. unsigned long reg_flags;
  129. u32 val;
  130. spin_lock_irqsave(&il->reg_lock, reg_flags);
  131. _il_grab_nic_access(il);
  132. val = _il_rd_prph(il, reg);
  133. _il_release_nic_access(il);
  134. spin_unlock_irqrestore(&il->reg_lock, reg_flags);
  135. return val;
  136. }
  137. EXPORT_SYMBOL(il_rd_prph);
  138. void
  139. il_wr_prph(struct il_priv *il, u32 addr, u32 val)
  140. {
  141. unsigned long reg_flags;
  142. spin_lock_irqsave(&il->reg_lock, reg_flags);
  143. if (!_il_grab_nic_access(il)) {
  144. _il_wr_prph(il, addr, val);
  145. _il_release_nic_access(il);
  146. }
  147. spin_unlock_irqrestore(&il->reg_lock, reg_flags);
  148. }
  149. EXPORT_SYMBOL(il_wr_prph);
  150. u32
  151. il_read_targ_mem(struct il_priv *il, u32 addr)
  152. {
  153. unsigned long reg_flags;
  154. u32 value;
  155. spin_lock_irqsave(&il->reg_lock, reg_flags);
  156. _il_grab_nic_access(il);
  157. _il_wr(il, HBUS_TARG_MEM_RADDR, addr);
  158. rmb();
  159. value = _il_rd(il, HBUS_TARG_MEM_RDAT);
  160. _il_release_nic_access(il);
  161. spin_unlock_irqrestore(&il->reg_lock, reg_flags);
  162. return value;
  163. }
  164. EXPORT_SYMBOL(il_read_targ_mem);
  165. void
  166. il_write_targ_mem(struct il_priv *il, u32 addr, u32 val)
  167. {
  168. unsigned long reg_flags;
  169. spin_lock_irqsave(&il->reg_lock, reg_flags);
  170. if (!_il_grab_nic_access(il)) {
  171. _il_wr(il, HBUS_TARG_MEM_WADDR, addr);
  172. wmb();
  173. _il_wr(il, HBUS_TARG_MEM_WDAT, val);
  174. _il_release_nic_access(il);
  175. }
  176. spin_unlock_irqrestore(&il->reg_lock, reg_flags);
  177. }
  178. EXPORT_SYMBOL(il_write_targ_mem);
  179. const char *
  180. il_get_cmd_string(u8 cmd)
  181. {
  182. switch (cmd) {
  183. IL_CMD(N_ALIVE);
  184. IL_CMD(N_ERROR);
  185. IL_CMD(C_RXON);
  186. IL_CMD(C_RXON_ASSOC);
  187. IL_CMD(C_QOS_PARAM);
  188. IL_CMD(C_RXON_TIMING);
  189. IL_CMD(C_ADD_STA);
  190. IL_CMD(C_REM_STA);
  191. IL_CMD(C_WEPKEY);
  192. IL_CMD(N_3945_RX);
  193. IL_CMD(C_TX);
  194. IL_CMD(C_RATE_SCALE);
  195. IL_CMD(C_LEDS);
  196. IL_CMD(C_TX_LINK_QUALITY_CMD);
  197. IL_CMD(C_CHANNEL_SWITCH);
  198. IL_CMD(N_CHANNEL_SWITCH);
  199. IL_CMD(C_SPECTRUM_MEASUREMENT);
  200. IL_CMD(N_SPECTRUM_MEASUREMENT);
  201. IL_CMD(C_POWER_TBL);
  202. IL_CMD(N_PM_SLEEP);
  203. IL_CMD(N_PM_DEBUG_STATS);
  204. IL_CMD(C_SCAN);
  205. IL_CMD(C_SCAN_ABORT);
  206. IL_CMD(N_SCAN_START);
  207. IL_CMD(N_SCAN_RESULTS);
  208. IL_CMD(N_SCAN_COMPLETE);
  209. IL_CMD(N_BEACON);
  210. IL_CMD(C_TX_BEACON);
  211. IL_CMD(C_TX_PWR_TBL);
  212. IL_CMD(C_BT_CONFIG);
  213. IL_CMD(C_STATS);
  214. IL_CMD(N_STATS);
  215. IL_CMD(N_CARD_STATE);
  216. IL_CMD(N_MISSED_BEACONS);
  217. IL_CMD(C_CT_KILL_CONFIG);
  218. IL_CMD(C_SENSITIVITY);
  219. IL_CMD(C_PHY_CALIBRATION);
  220. IL_CMD(N_RX_PHY);
  221. IL_CMD(N_RX_MPDU);
  222. IL_CMD(N_RX);
  223. IL_CMD(N_COMPRESSED_BA);
  224. default:
  225. return "UNKNOWN";
  226. }
  227. }
  228. EXPORT_SYMBOL(il_get_cmd_string);
  229. #define HOST_COMPLETE_TIMEOUT (HZ / 2)
  230. static void
  231. il_generic_cmd_callback(struct il_priv *il, struct il_device_cmd *cmd,
  232. struct il_rx_pkt *pkt)
  233. {
  234. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  235. IL_ERR("Bad return from %s (0x%08X)\n",
  236. il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
  237. return;
  238. }
  239. #ifdef CONFIG_IWLEGACY_DEBUG
  240. switch (cmd->hdr.cmd) {
  241. case C_TX_LINK_QUALITY_CMD:
  242. case C_SENSITIVITY:
  243. D_HC_DUMP("back from %s (0x%08X)\n",
  244. il_get_cmd_string(cmd->hdr.cmd), pkt->hdr.flags);
  245. break;
  246. default:
  247. D_HC("back from %s (0x%08X)\n", il_get_cmd_string(cmd->hdr.cmd),
  248. pkt->hdr.flags);
  249. }
  250. #endif
  251. }
  252. static int
  253. il_send_cmd_async(struct il_priv *il, struct il_host_cmd *cmd)
  254. {
  255. int ret;
  256. BUG_ON(!(cmd->flags & CMD_ASYNC));
  257. /* An asynchronous command can not expect an SKB to be set. */
  258. BUG_ON(cmd->flags & CMD_WANT_SKB);
  259. /* Assign a generic callback if one is not provided */
  260. if (!cmd->callback)
  261. cmd->callback = il_generic_cmd_callback;
  262. if (test_bit(S_EXIT_PENDING, &il->status))
  263. return -EBUSY;
  264. ret = il_enqueue_hcmd(il, cmd);
  265. if (ret < 0) {
  266. IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n",
  267. il_get_cmd_string(cmd->id), ret);
  268. return ret;
  269. }
  270. return 0;
  271. }
  272. int
  273. il_send_cmd_sync(struct il_priv *il, struct il_host_cmd *cmd)
  274. {
  275. int cmd_idx;
  276. int ret;
  277. lockdep_assert_held(&il->mutex);
  278. BUG_ON(cmd->flags & CMD_ASYNC);
  279. /* A synchronous command can not have a callback set. */
  280. BUG_ON(cmd->callback);
  281. D_INFO("Attempting to send sync command %s\n",
  282. il_get_cmd_string(cmd->id));
  283. set_bit(S_HCMD_ACTIVE, &il->status);
  284. D_INFO("Setting HCMD_ACTIVE for command %s\n",
  285. il_get_cmd_string(cmd->id));
  286. cmd_idx = il_enqueue_hcmd(il, cmd);
  287. if (cmd_idx < 0) {
  288. ret = cmd_idx;
  289. IL_ERR("Error sending %s: enqueue_hcmd failed: %d\n",
  290. il_get_cmd_string(cmd->id), ret);
  291. goto out;
  292. }
  293. ret = wait_event_timeout(il->wait_command_queue,
  294. !test_bit(S_HCMD_ACTIVE, &il->status),
  295. HOST_COMPLETE_TIMEOUT);
  296. if (!ret) {
  297. if (test_bit(S_HCMD_ACTIVE, &il->status)) {
  298. IL_ERR("Error sending %s: time out after %dms.\n",
  299. il_get_cmd_string(cmd->id),
  300. jiffies_to_msecs(HOST_COMPLETE_TIMEOUT));
  301. clear_bit(S_HCMD_ACTIVE, &il->status);
  302. D_INFO("Clearing HCMD_ACTIVE for command %s\n",
  303. il_get_cmd_string(cmd->id));
  304. ret = -ETIMEDOUT;
  305. goto cancel;
  306. }
  307. }
  308. if (test_bit(S_RF_KILL_HW, &il->status)) {
  309. IL_ERR("Command %s aborted: RF KILL Switch\n",
  310. il_get_cmd_string(cmd->id));
  311. ret = -ECANCELED;
  312. goto fail;
  313. }
  314. if (test_bit(S_FW_ERROR, &il->status)) {
  315. IL_ERR("Command %s failed: FW Error\n",
  316. il_get_cmd_string(cmd->id));
  317. ret = -EIO;
  318. goto fail;
  319. }
  320. if ((cmd->flags & CMD_WANT_SKB) && !cmd->reply_page) {
  321. IL_ERR("Error: Response NULL in '%s'\n",
  322. il_get_cmd_string(cmd->id));
  323. ret = -EIO;
  324. goto cancel;
  325. }
  326. ret = 0;
  327. goto out;
  328. cancel:
  329. if (cmd->flags & CMD_WANT_SKB) {
  330. /*
  331. * Cancel the CMD_WANT_SKB flag for the cmd in the
  332. * TX cmd queue. Otherwise in case the cmd comes
  333. * in later, it will possibly set an invalid
  334. * address (cmd->meta.source).
  335. */
  336. il->txq[il->cmd_queue].meta[cmd_idx].flags &= ~CMD_WANT_SKB;
  337. }
  338. fail:
  339. if (cmd->reply_page) {
  340. il_free_pages(il, cmd->reply_page);
  341. cmd->reply_page = 0;
  342. }
  343. out:
  344. return ret;
  345. }
  346. EXPORT_SYMBOL(il_send_cmd_sync);
  347. int
  348. il_send_cmd(struct il_priv *il, struct il_host_cmd *cmd)
  349. {
  350. if (cmd->flags & CMD_ASYNC)
  351. return il_send_cmd_async(il, cmd);
  352. return il_send_cmd_sync(il, cmd);
  353. }
  354. EXPORT_SYMBOL(il_send_cmd);
  355. int
  356. il_send_cmd_pdu(struct il_priv *il, u8 id, u16 len, const void *data)
  357. {
  358. struct il_host_cmd cmd = {
  359. .id = id,
  360. .len = len,
  361. .data = data,
  362. };
  363. return il_send_cmd_sync(il, &cmd);
  364. }
  365. EXPORT_SYMBOL(il_send_cmd_pdu);
  366. int
  367. il_send_cmd_pdu_async(struct il_priv *il, u8 id, u16 len, const void *data,
  368. void (*callback) (struct il_priv *il,
  369. struct il_device_cmd *cmd,
  370. struct il_rx_pkt *pkt))
  371. {
  372. struct il_host_cmd cmd = {
  373. .id = id,
  374. .len = len,
  375. .data = data,
  376. };
  377. cmd.flags |= CMD_ASYNC;
  378. cmd.callback = callback;
  379. return il_send_cmd_async(il, &cmd);
  380. }
  381. EXPORT_SYMBOL(il_send_cmd_pdu_async);
  382. /* default: IL_LED_BLINK(0) using blinking idx table */
  383. static int led_mode;
  384. module_param(led_mode, int, S_IRUGO);
  385. MODULE_PARM_DESC(led_mode,
  386. "0=system default, " "1=On(RF On)/Off(RF Off), 2=blinking");
  387. /* Throughput OFF time(ms) ON time (ms)
  388. * >300 25 25
  389. * >200 to 300 40 40
  390. * >100 to 200 55 55
  391. * >70 to 100 65 65
  392. * >50 to 70 75 75
  393. * >20 to 50 85 85
  394. * >10 to 20 95 95
  395. * >5 to 10 110 110
  396. * >1 to 5 130 130
  397. * >0 to 1 167 167
  398. * <=0 SOLID ON
  399. */
  400. static const struct ieee80211_tpt_blink il_blink[] = {
  401. {.throughput = 0, .blink_time = 334},
  402. {.throughput = 1 * 1024 - 1, .blink_time = 260},
  403. {.throughput = 5 * 1024 - 1, .blink_time = 220},
  404. {.throughput = 10 * 1024 - 1, .blink_time = 190},
  405. {.throughput = 20 * 1024 - 1, .blink_time = 170},
  406. {.throughput = 50 * 1024 - 1, .blink_time = 150},
  407. {.throughput = 70 * 1024 - 1, .blink_time = 130},
  408. {.throughput = 100 * 1024 - 1, .blink_time = 110},
  409. {.throughput = 200 * 1024 - 1, .blink_time = 80},
  410. {.throughput = 300 * 1024 - 1, .blink_time = 50},
  411. };
  412. /*
  413. * Adjust led blink rate to compensate on a MAC Clock difference on every HW
  414. * Led blink rate analysis showed an average deviation of 0% on 3945,
  415. * 5% on 4965 HW.
  416. * Need to compensate on the led on/off time per HW according to the deviation
  417. * to achieve the desired led frequency
  418. * The calculation is: (100-averageDeviation)/100 * blinkTime
  419. * For code efficiency the calculation will be:
  420. * compensation = (100 - averageDeviation) * 64 / 100
  421. * NewBlinkTime = (compensation * BlinkTime) / 64
  422. */
  423. static inline u8
  424. il_blink_compensation(struct il_priv *il, u8 time, u16 compensation)
  425. {
  426. if (!compensation) {
  427. IL_ERR("undefined blink compensation: "
  428. "use pre-defined blinking time\n");
  429. return time;
  430. }
  431. return (u8) ((time * compensation) >> 6);
  432. }
  433. /* Set led pattern command */
  434. static int
  435. il_led_cmd(struct il_priv *il, unsigned long on, unsigned long off)
  436. {
  437. struct il_led_cmd led_cmd = {
  438. .id = IL_LED_LINK,
  439. .interval = IL_DEF_LED_INTRVL
  440. };
  441. int ret;
  442. if (!test_bit(S_READY, &il->status))
  443. return -EBUSY;
  444. if (il->blink_on == on && il->blink_off == off)
  445. return 0;
  446. if (off == 0) {
  447. /* led is SOLID_ON */
  448. on = IL_LED_SOLID;
  449. }
  450. D_LED("Led blink time compensation=%u\n",
  451. il->cfg->base_params->led_compensation);
  452. led_cmd.on =
  453. il_blink_compensation(il, on,
  454. il->cfg->base_params->led_compensation);
  455. led_cmd.off =
  456. il_blink_compensation(il, off,
  457. il->cfg->base_params->led_compensation);
  458. ret = il->cfg->ops->led->cmd(il, &led_cmd);
  459. if (!ret) {
  460. il->blink_on = on;
  461. il->blink_off = off;
  462. }
  463. return ret;
  464. }
  465. static void
  466. il_led_brightness_set(struct led_classdev *led_cdev,
  467. enum led_brightness brightness)
  468. {
  469. struct il_priv *il = container_of(led_cdev, struct il_priv, led);
  470. unsigned long on = 0;
  471. if (brightness > 0)
  472. on = IL_LED_SOLID;
  473. il_led_cmd(il, on, 0);
  474. }
  475. static int
  476. il_led_blink_set(struct led_classdev *led_cdev, unsigned long *delay_on,
  477. unsigned long *delay_off)
  478. {
  479. struct il_priv *il = container_of(led_cdev, struct il_priv, led);
  480. return il_led_cmd(il, *delay_on, *delay_off);
  481. }
  482. void
  483. il_leds_init(struct il_priv *il)
  484. {
  485. int mode = led_mode;
  486. int ret;
  487. if (mode == IL_LED_DEFAULT)
  488. mode = il->cfg->led_mode;
  489. il->led.name =
  490. kasprintf(GFP_KERNEL, "%s-led", wiphy_name(il->hw->wiphy));
  491. il->led.brightness_set = il_led_brightness_set;
  492. il->led.blink_set = il_led_blink_set;
  493. il->led.max_brightness = 1;
  494. switch (mode) {
  495. case IL_LED_DEFAULT:
  496. WARN_ON(1);
  497. break;
  498. case IL_LED_BLINK:
  499. il->led.default_trigger =
  500. ieee80211_create_tpt_led_trigger(il->hw,
  501. IEEE80211_TPT_LEDTRIG_FL_CONNECTED,
  502. il_blink,
  503. ARRAY_SIZE(il_blink));
  504. break;
  505. case IL_LED_RF_STATE:
  506. il->led.default_trigger = ieee80211_get_radio_led_name(il->hw);
  507. break;
  508. }
  509. ret = led_classdev_register(&il->pci_dev->dev, &il->led);
  510. if (ret) {
  511. kfree(il->led.name);
  512. return;
  513. }
  514. il->led_registered = true;
  515. }
  516. EXPORT_SYMBOL(il_leds_init);
  517. void
  518. il_leds_exit(struct il_priv *il)
  519. {
  520. if (!il->led_registered)
  521. return;
  522. led_classdev_unregister(&il->led);
  523. kfree(il->led.name);
  524. }
  525. EXPORT_SYMBOL(il_leds_exit);
  526. /************************** EEPROM BANDS ****************************
  527. *
  528. * The il_eeprom_band definitions below provide the mapping from the
  529. * EEPROM contents to the specific channel number supported for each
  530. * band.
  531. *
  532. * For example, il_priv->eeprom.band_3_channels[4] from the band_3
  533. * definition below maps to physical channel 42 in the 5.2GHz spectrum.
  534. * The specific geography and calibration information for that channel
  535. * is contained in the eeprom map itself.
  536. *
  537. * During init, we copy the eeprom information and channel map
  538. * information into il->channel_info_24/52 and il->channel_map_24/52
  539. *
  540. * channel_map_24/52 provides the idx in the channel_info array for a
  541. * given channel. We have to have two separate maps as there is channel
  542. * overlap with the 2.4GHz and 5.2GHz spectrum as seen in band_1 and
  543. * band_2
  544. *
  545. * A value of 0xff stored in the channel_map indicates that the channel
  546. * is not supported by the hardware at all.
  547. *
  548. * A value of 0xfe in the channel_map indicates that the channel is not
  549. * valid for Tx with the current hardware. This means that
  550. * while the system can tune and receive on a given channel, it may not
  551. * be able to associate or transmit any frames on that
  552. * channel. There is no corresponding channel information for that
  553. * entry.
  554. *
  555. *********************************************************************/
  556. /* 2.4 GHz */
  557. const u8 il_eeprom_band_1[14] = {
  558. 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14
  559. };
  560. /* 5.2 GHz bands */
  561. static const u8 il_eeprom_band_2[] = { /* 4915-5080MHz */
  562. 183, 184, 185, 187, 188, 189, 192, 196, 7, 8, 11, 12, 16
  563. };
  564. static const u8 il_eeprom_band_3[] = { /* 5170-5320MHz */
  565. 34, 36, 38, 40, 42, 44, 46, 48, 52, 56, 60, 64
  566. };
  567. static const u8 il_eeprom_band_4[] = { /* 5500-5700MHz */
  568. 100, 104, 108, 112, 116, 120, 124, 128, 132, 136, 140
  569. };
  570. static const u8 il_eeprom_band_5[] = { /* 5725-5825MHz */
  571. 145, 149, 153, 157, 161, 165
  572. };
  573. static const u8 il_eeprom_band_6[] = { /* 2.4 ht40 channel */
  574. 1, 2, 3, 4, 5, 6, 7
  575. };
  576. static const u8 il_eeprom_band_7[] = { /* 5.2 ht40 channel */
  577. 36, 44, 52, 60, 100, 108, 116, 124, 132, 149, 157
  578. };
  579. /******************************************************************************
  580. *
  581. * EEPROM related functions
  582. *
  583. ******************************************************************************/
  584. static int
  585. il_eeprom_verify_signature(struct il_priv *il)
  586. {
  587. u32 gp = _il_rd(il, CSR_EEPROM_GP) & CSR_EEPROM_GP_VALID_MSK;
  588. int ret = 0;
  589. D_EEPROM("EEPROM signature=0x%08x\n", gp);
  590. switch (gp) {
  591. case CSR_EEPROM_GP_GOOD_SIG_EEP_LESS_THAN_4K:
  592. case CSR_EEPROM_GP_GOOD_SIG_EEP_MORE_THAN_4K:
  593. break;
  594. default:
  595. IL_ERR("bad EEPROM signature," "EEPROM_GP=0x%08x\n", gp);
  596. ret = -ENOENT;
  597. break;
  598. }
  599. return ret;
  600. }
  601. const u8 *
  602. il_eeprom_query_addr(const struct il_priv *il, size_t offset)
  603. {
  604. BUG_ON(offset >= il->cfg->base_params->eeprom_size);
  605. return &il->eeprom[offset];
  606. }
  607. EXPORT_SYMBOL(il_eeprom_query_addr);
  608. u16
  609. il_eeprom_query16(const struct il_priv *il, size_t offset)
  610. {
  611. if (!il->eeprom)
  612. return 0;
  613. return (u16) il->eeprom[offset] | ((u16) il->eeprom[offset + 1] << 8);
  614. }
  615. EXPORT_SYMBOL(il_eeprom_query16);
  616. /**
  617. * il_eeprom_init - read EEPROM contents
  618. *
  619. * Load the EEPROM contents from adapter into il->eeprom
  620. *
  621. * NOTE: This routine uses the non-debug IO access functions.
  622. */
  623. int
  624. il_eeprom_init(struct il_priv *il)
  625. {
  626. __le16 *e;
  627. u32 gp = _il_rd(il, CSR_EEPROM_GP);
  628. int sz;
  629. int ret;
  630. u16 addr;
  631. /* allocate eeprom */
  632. sz = il->cfg->base_params->eeprom_size;
  633. D_EEPROM("NVM size = %d\n", sz);
  634. il->eeprom = kzalloc(sz, GFP_KERNEL);
  635. if (!il->eeprom) {
  636. ret = -ENOMEM;
  637. goto alloc_err;
  638. }
  639. e = (__le16 *) il->eeprom;
  640. il->cfg->ops->lib->apm_ops.init(il);
  641. ret = il_eeprom_verify_signature(il);
  642. if (ret < 0) {
  643. IL_ERR("EEPROM not found, EEPROM_GP=0x%08x\n", gp);
  644. ret = -ENOENT;
  645. goto err;
  646. }
  647. /* Make sure driver (instead of uCode) is allowed to read EEPROM */
  648. ret = il->cfg->ops->lib->eeprom_ops.acquire_semaphore(il);
  649. if (ret < 0) {
  650. IL_ERR("Failed to acquire EEPROM semaphore.\n");
  651. ret = -ENOENT;
  652. goto err;
  653. }
  654. /* eeprom is an array of 16bit values */
  655. for (addr = 0; addr < sz; addr += sizeof(u16)) {
  656. u32 r;
  657. _il_wr(il, CSR_EEPROM_REG,
  658. CSR_EEPROM_REG_MSK_ADDR & (addr << 1));
  659. ret =
  660. _il_poll_bit(il, CSR_EEPROM_REG,
  661. CSR_EEPROM_REG_READ_VALID_MSK,
  662. CSR_EEPROM_REG_READ_VALID_MSK,
  663. IL_EEPROM_ACCESS_TIMEOUT);
  664. if (ret < 0) {
  665. IL_ERR("Time out reading EEPROM[%d]\n", addr);
  666. goto done;
  667. }
  668. r = _il_rd(il, CSR_EEPROM_REG);
  669. e[addr / 2] = cpu_to_le16(r >> 16);
  670. }
  671. D_EEPROM("NVM Type: %s, version: 0x%x\n", "EEPROM",
  672. il_eeprom_query16(il, EEPROM_VERSION));
  673. ret = 0;
  674. done:
  675. il->cfg->ops->lib->eeprom_ops.release_semaphore(il);
  676. err:
  677. if (ret)
  678. il_eeprom_free(il);
  679. /* Reset chip to save power until we load uCode during "up". */
  680. il_apm_stop(il);
  681. alloc_err:
  682. return ret;
  683. }
  684. EXPORT_SYMBOL(il_eeprom_init);
  685. void
  686. il_eeprom_free(struct il_priv *il)
  687. {
  688. kfree(il->eeprom);
  689. il->eeprom = NULL;
  690. }
  691. EXPORT_SYMBOL(il_eeprom_free);
  692. static void
  693. il_init_band_reference(const struct il_priv *il, int eep_band,
  694. int *eeprom_ch_count,
  695. const struct il_eeprom_channel **eeprom_ch_info,
  696. const u8 **eeprom_ch_idx)
  697. {
  698. u32 offset =
  699. il->cfg->ops->lib->eeprom_ops.regulatory_bands[eep_band - 1];
  700. switch (eep_band) {
  701. case 1: /* 2.4GHz band */
  702. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_1);
  703. *eeprom_ch_info =
  704. (struct il_eeprom_channel *)il_eeprom_query_addr(il,
  705. offset);
  706. *eeprom_ch_idx = il_eeprom_band_1;
  707. break;
  708. case 2: /* 4.9GHz band */
  709. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_2);
  710. *eeprom_ch_info =
  711. (struct il_eeprom_channel *)il_eeprom_query_addr(il,
  712. offset);
  713. *eeprom_ch_idx = il_eeprom_band_2;
  714. break;
  715. case 3: /* 5.2GHz band */
  716. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_3);
  717. *eeprom_ch_info =
  718. (struct il_eeprom_channel *)il_eeprom_query_addr(il,
  719. offset);
  720. *eeprom_ch_idx = il_eeprom_band_3;
  721. break;
  722. case 4: /* 5.5GHz band */
  723. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_4);
  724. *eeprom_ch_info =
  725. (struct il_eeprom_channel *)il_eeprom_query_addr(il,
  726. offset);
  727. *eeprom_ch_idx = il_eeprom_band_4;
  728. break;
  729. case 5: /* 5.7GHz band */
  730. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_5);
  731. *eeprom_ch_info =
  732. (struct il_eeprom_channel *)il_eeprom_query_addr(il,
  733. offset);
  734. *eeprom_ch_idx = il_eeprom_band_5;
  735. break;
  736. case 6: /* 2.4GHz ht40 channels */
  737. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_6);
  738. *eeprom_ch_info =
  739. (struct il_eeprom_channel *)il_eeprom_query_addr(il,
  740. offset);
  741. *eeprom_ch_idx = il_eeprom_band_6;
  742. break;
  743. case 7: /* 5 GHz ht40 channels */
  744. *eeprom_ch_count = ARRAY_SIZE(il_eeprom_band_7);
  745. *eeprom_ch_info =
  746. (struct il_eeprom_channel *)il_eeprom_query_addr(il,
  747. offset);
  748. *eeprom_ch_idx = il_eeprom_band_7;
  749. break;
  750. default:
  751. BUG();
  752. }
  753. }
  754. #define CHECK_AND_PRINT(x) ((eeprom_ch->flags & EEPROM_CHANNEL_##x) \
  755. ? # x " " : "")
  756. /**
  757. * il_mod_ht40_chan_info - Copy ht40 channel info into driver's il.
  758. *
  759. * Does not set up a command, or touch hardware.
  760. */
  761. static int
  762. il_mod_ht40_chan_info(struct il_priv *il, enum ieee80211_band band, u16 channel,
  763. const struct il_eeprom_channel *eeprom_ch,
  764. u8 clear_ht40_extension_channel)
  765. {
  766. struct il_channel_info *ch_info;
  767. ch_info =
  768. (struct il_channel_info *)il_get_channel_info(il, band, channel);
  769. if (!il_is_channel_valid(ch_info))
  770. return -1;
  771. D_EEPROM("HT40 Ch. %d [%sGHz] %s%s%s%s%s(0x%02x %ddBm):"
  772. " Ad-Hoc %ssupported\n", ch_info->channel,
  773. il_is_channel_a_band(ch_info) ? "5.2" : "2.4",
  774. CHECK_AND_PRINT(IBSS), CHECK_AND_PRINT(ACTIVE),
  775. CHECK_AND_PRINT(RADAR), CHECK_AND_PRINT(WIDE),
  776. CHECK_AND_PRINT(DFS), eeprom_ch->flags,
  777. eeprom_ch->max_power_avg,
  778. ((eeprom_ch->flags & EEPROM_CHANNEL_IBSS) &&
  779. !(eeprom_ch->flags & EEPROM_CHANNEL_RADAR)) ? "" : "not ");
  780. ch_info->ht40_eeprom = *eeprom_ch;
  781. ch_info->ht40_max_power_avg = eeprom_ch->max_power_avg;
  782. ch_info->ht40_flags = eeprom_ch->flags;
  783. if (eeprom_ch->flags & EEPROM_CHANNEL_VALID)
  784. ch_info->ht40_extension_channel &=
  785. ~clear_ht40_extension_channel;
  786. return 0;
  787. }
  788. #define CHECK_AND_PRINT_I(x) ((eeprom_ch_info[ch].flags & EEPROM_CHANNEL_##x) \
  789. ? # x " " : "")
  790. /**
  791. * il_init_channel_map - Set up driver's info for all possible channels
  792. */
  793. int
  794. il_init_channel_map(struct il_priv *il)
  795. {
  796. int eeprom_ch_count = 0;
  797. const u8 *eeprom_ch_idx = NULL;
  798. const struct il_eeprom_channel *eeprom_ch_info = NULL;
  799. int band, ch;
  800. struct il_channel_info *ch_info;
  801. if (il->channel_count) {
  802. D_EEPROM("Channel map already initialized.\n");
  803. return 0;
  804. }
  805. D_EEPROM("Initializing regulatory info from EEPROM\n");
  806. il->channel_count =
  807. ARRAY_SIZE(il_eeprom_band_1) + ARRAY_SIZE(il_eeprom_band_2) +
  808. ARRAY_SIZE(il_eeprom_band_3) + ARRAY_SIZE(il_eeprom_band_4) +
  809. ARRAY_SIZE(il_eeprom_band_5);
  810. D_EEPROM("Parsing data for %d channels.\n", il->channel_count);
  811. il->channel_info =
  812. kzalloc(sizeof(struct il_channel_info) * il->channel_count,
  813. GFP_KERNEL);
  814. if (!il->channel_info) {
  815. IL_ERR("Could not allocate channel_info\n");
  816. il->channel_count = 0;
  817. return -ENOMEM;
  818. }
  819. ch_info = il->channel_info;
  820. /* Loop through the 5 EEPROM bands adding them in order to the
  821. * channel map we maintain (that contains additional information than
  822. * what just in the EEPROM) */
  823. for (band = 1; band <= 5; band++) {
  824. il_init_band_reference(il, band, &eeprom_ch_count,
  825. &eeprom_ch_info, &eeprom_ch_idx);
  826. /* Loop through each band adding each of the channels */
  827. for (ch = 0; ch < eeprom_ch_count; ch++) {
  828. ch_info->channel = eeprom_ch_idx[ch];
  829. ch_info->band =
  830. (band ==
  831. 1) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  832. /* permanently store EEPROM's channel regulatory flags
  833. * and max power in channel info database. */
  834. ch_info->eeprom = eeprom_ch_info[ch];
  835. /* Copy the run-time flags so they are there even on
  836. * invalid channels */
  837. ch_info->flags = eeprom_ch_info[ch].flags;
  838. /* First write that ht40 is not enabled, and then enable
  839. * one by one */
  840. ch_info->ht40_extension_channel =
  841. IEEE80211_CHAN_NO_HT40;
  842. if (!(il_is_channel_valid(ch_info))) {
  843. D_EEPROM("Ch. %d Flags %x [%sGHz] - "
  844. "No traffic\n", ch_info->channel,
  845. ch_info->flags,
  846. il_is_channel_a_band(ch_info) ? "5.2" :
  847. "2.4");
  848. ch_info++;
  849. continue;
  850. }
  851. /* Initialize regulatory-based run-time data */
  852. ch_info->max_power_avg = ch_info->curr_txpow =
  853. eeprom_ch_info[ch].max_power_avg;
  854. ch_info->scan_power = eeprom_ch_info[ch].max_power_avg;
  855. ch_info->min_power = 0;
  856. D_EEPROM("Ch. %d [%sGHz] " "%s%s%s%s%s%s(0x%02x %ddBm):"
  857. " Ad-Hoc %ssupported\n", ch_info->channel,
  858. il_is_channel_a_band(ch_info) ? "5.2" : "2.4",
  859. CHECK_AND_PRINT_I(VALID),
  860. CHECK_AND_PRINT_I(IBSS),
  861. CHECK_AND_PRINT_I(ACTIVE),
  862. CHECK_AND_PRINT_I(RADAR),
  863. CHECK_AND_PRINT_I(WIDE),
  864. CHECK_AND_PRINT_I(DFS),
  865. eeprom_ch_info[ch].flags,
  866. eeprom_ch_info[ch].max_power_avg,
  867. ((eeprom_ch_info[ch].
  868. flags & EEPROM_CHANNEL_IBSS) &&
  869. !(eeprom_ch_info[ch].
  870. flags & EEPROM_CHANNEL_RADAR)) ? "" :
  871. "not ");
  872. ch_info++;
  873. }
  874. }
  875. /* Check if we do have HT40 channels */
  876. if (il->cfg->ops->lib->eeprom_ops.regulatory_bands[5] ==
  877. EEPROM_REGULATORY_BAND_NO_HT40 &&
  878. il->cfg->ops->lib->eeprom_ops.regulatory_bands[6] ==
  879. EEPROM_REGULATORY_BAND_NO_HT40)
  880. return 0;
  881. /* Two additional EEPROM bands for 2.4 and 5 GHz HT40 channels */
  882. for (band = 6; band <= 7; band++) {
  883. enum ieee80211_band ieeeband;
  884. il_init_band_reference(il, band, &eeprom_ch_count,
  885. &eeprom_ch_info, &eeprom_ch_idx);
  886. /* EEPROM band 6 is 2.4, band 7 is 5 GHz */
  887. ieeeband =
  888. (band == 6) ? IEEE80211_BAND_2GHZ : IEEE80211_BAND_5GHZ;
  889. /* Loop through each band adding each of the channels */
  890. for (ch = 0; ch < eeprom_ch_count; ch++) {
  891. /* Set up driver's info for lower half */
  892. il_mod_ht40_chan_info(il, ieeeband, eeprom_ch_idx[ch],
  893. &eeprom_ch_info[ch],
  894. IEEE80211_CHAN_NO_HT40PLUS);
  895. /* Set up driver's info for upper half */
  896. il_mod_ht40_chan_info(il, ieeeband,
  897. eeprom_ch_idx[ch] + 4,
  898. &eeprom_ch_info[ch],
  899. IEEE80211_CHAN_NO_HT40MINUS);
  900. }
  901. }
  902. return 0;
  903. }
  904. EXPORT_SYMBOL(il_init_channel_map);
  905. /*
  906. * il_free_channel_map - undo allocations in il_init_channel_map
  907. */
  908. void
  909. il_free_channel_map(struct il_priv *il)
  910. {
  911. kfree(il->channel_info);
  912. il->channel_count = 0;
  913. }
  914. EXPORT_SYMBOL(il_free_channel_map);
  915. /**
  916. * il_get_channel_info - Find driver's ilate channel info
  917. *
  918. * Based on band and channel number.
  919. */
  920. const struct il_channel_info *
  921. il_get_channel_info(const struct il_priv *il, enum ieee80211_band band,
  922. u16 channel)
  923. {
  924. int i;
  925. switch (band) {
  926. case IEEE80211_BAND_5GHZ:
  927. for (i = 14; i < il->channel_count; i++) {
  928. if (il->channel_info[i].channel == channel)
  929. return &il->channel_info[i];
  930. }
  931. break;
  932. case IEEE80211_BAND_2GHZ:
  933. if (channel >= 1 && channel <= 14)
  934. return &il->channel_info[channel - 1];
  935. break;
  936. default:
  937. BUG();
  938. }
  939. return NULL;
  940. }
  941. EXPORT_SYMBOL(il_get_channel_info);
  942. /*
  943. * Setting power level allows the card to go to sleep when not busy.
  944. *
  945. * We calculate a sleep command based on the required latency, which
  946. * we get from mac80211. In order to handle thermal throttling, we can
  947. * also use pre-defined power levels.
  948. */
  949. /*
  950. * This defines the old power levels. They are still used by default
  951. * (level 1) and for thermal throttle (levels 3 through 5)
  952. */
  953. struct il_power_vec_entry {
  954. struct il_powertable_cmd cmd;
  955. u8 no_dtim; /* number of skip dtim */
  956. };
  957. static void
  958. il_power_sleep_cam_cmd(struct il_priv *il, struct il_powertable_cmd *cmd)
  959. {
  960. memset(cmd, 0, sizeof(*cmd));
  961. if (il->power_data.pci_pm)
  962. cmd->flags |= IL_POWER_PCI_PM_MSK;
  963. D_POWER("Sleep command for CAM\n");
  964. }
  965. static int
  966. il_set_power(struct il_priv *il, struct il_powertable_cmd *cmd)
  967. {
  968. D_POWER("Sending power/sleep command\n");
  969. D_POWER("Flags value = 0x%08X\n", cmd->flags);
  970. D_POWER("Tx timeout = %u\n", le32_to_cpu(cmd->tx_data_timeout));
  971. D_POWER("Rx timeout = %u\n", le32_to_cpu(cmd->rx_data_timeout));
  972. D_POWER("Sleep interval vector = { %d , %d , %d , %d , %d }\n",
  973. le32_to_cpu(cmd->sleep_interval[0]),
  974. le32_to_cpu(cmd->sleep_interval[1]),
  975. le32_to_cpu(cmd->sleep_interval[2]),
  976. le32_to_cpu(cmd->sleep_interval[3]),
  977. le32_to_cpu(cmd->sleep_interval[4]));
  978. return il_send_cmd_pdu(il, C_POWER_TBL,
  979. sizeof(struct il_powertable_cmd), cmd);
  980. }
  981. int
  982. il_power_set_mode(struct il_priv *il, struct il_powertable_cmd *cmd, bool force)
  983. {
  984. int ret;
  985. bool update_chains;
  986. lockdep_assert_held(&il->mutex);
  987. /* Don't update the RX chain when chain noise calibration is running */
  988. update_chains = il->chain_noise_data.state == IL_CHAIN_NOISE_DONE ||
  989. il->chain_noise_data.state == IL_CHAIN_NOISE_ALIVE;
  990. if (!memcmp(&il->power_data.sleep_cmd, cmd, sizeof(*cmd)) && !force)
  991. return 0;
  992. if (!il_is_ready_rf(il))
  993. return -EIO;
  994. /* scan complete use sleep_power_next, need to be updated */
  995. memcpy(&il->power_data.sleep_cmd_next, cmd, sizeof(*cmd));
  996. if (test_bit(S_SCANNING, &il->status) && !force) {
  997. D_INFO("Defer power set mode while scanning\n");
  998. return 0;
  999. }
  1000. if (cmd->flags & IL_POWER_DRIVER_ALLOW_SLEEP_MSK)
  1001. set_bit(S_POWER_PMI, &il->status);
  1002. ret = il_set_power(il, cmd);
  1003. if (!ret) {
  1004. if (!(cmd->flags & IL_POWER_DRIVER_ALLOW_SLEEP_MSK))
  1005. clear_bit(S_POWER_PMI, &il->status);
  1006. if (il->cfg->ops->lib->update_chain_flags && update_chains)
  1007. il->cfg->ops->lib->update_chain_flags(il);
  1008. else if (il->cfg->ops->lib->update_chain_flags)
  1009. D_POWER("Cannot update the power, chain noise "
  1010. "calibration running: %d\n",
  1011. il->chain_noise_data.state);
  1012. memcpy(&il->power_data.sleep_cmd, cmd, sizeof(*cmd));
  1013. } else
  1014. IL_ERR("set power fail, ret = %d", ret);
  1015. return ret;
  1016. }
  1017. int
  1018. il_power_update_mode(struct il_priv *il, bool force)
  1019. {
  1020. struct il_powertable_cmd cmd;
  1021. il_power_sleep_cam_cmd(il, &cmd);
  1022. return il_power_set_mode(il, &cmd, force);
  1023. }
  1024. EXPORT_SYMBOL(il_power_update_mode);
  1025. /* initialize to default */
  1026. void
  1027. il_power_initialize(struct il_priv *il)
  1028. {
  1029. u16 lctl = il_pcie_link_ctl(il);
  1030. il->power_data.pci_pm = !(lctl & PCI_CFG_LINK_CTRL_VAL_L0S_EN);
  1031. il->power_data.debug_sleep_level_override = -1;
  1032. memset(&il->power_data.sleep_cmd, 0, sizeof(il->power_data.sleep_cmd));
  1033. }
  1034. EXPORT_SYMBOL(il_power_initialize);
  1035. /* For active scan, listen ACTIVE_DWELL_TIME (msec) on each channel after
  1036. * sending probe req. This should be set long enough to hear probe responses
  1037. * from more than one AP. */
  1038. #define IL_ACTIVE_DWELL_TIME_24 (30) /* all times in msec */
  1039. #define IL_ACTIVE_DWELL_TIME_52 (20)
  1040. #define IL_ACTIVE_DWELL_FACTOR_24GHZ (3)
  1041. #define IL_ACTIVE_DWELL_FACTOR_52GHZ (2)
  1042. /* For passive scan, listen PASSIVE_DWELL_TIME (msec) on each channel.
  1043. * Must be set longer than active dwell time.
  1044. * For the most reliable scan, set > AP beacon interval (typically 100msec). */
  1045. #define IL_PASSIVE_DWELL_TIME_24 (20) /* all times in msec */
  1046. #define IL_PASSIVE_DWELL_TIME_52 (10)
  1047. #define IL_PASSIVE_DWELL_BASE (100)
  1048. #define IL_CHANNEL_TUNE_TIME 5
  1049. static int
  1050. il_send_scan_abort(struct il_priv *il)
  1051. {
  1052. int ret;
  1053. struct il_rx_pkt *pkt;
  1054. struct il_host_cmd cmd = {
  1055. .id = C_SCAN_ABORT,
  1056. .flags = CMD_WANT_SKB,
  1057. };
  1058. /* Exit instantly with error when device is not ready
  1059. * to receive scan abort command or it does not perform
  1060. * hardware scan currently */
  1061. if (!test_bit(S_READY, &il->status) ||
  1062. !test_bit(S_GEO_CONFIGURED, &il->status) ||
  1063. !test_bit(S_SCAN_HW, &il->status) ||
  1064. test_bit(S_FW_ERROR, &il->status) ||
  1065. test_bit(S_EXIT_PENDING, &il->status))
  1066. return -EIO;
  1067. ret = il_send_cmd_sync(il, &cmd);
  1068. if (ret)
  1069. return ret;
  1070. pkt = (struct il_rx_pkt *)cmd.reply_page;
  1071. if (pkt->u.status != CAN_ABORT_STATUS) {
  1072. /* The scan abort will return 1 for success or
  1073. * 2 for "failure". A failure condition can be
  1074. * due to simply not being in an active scan which
  1075. * can occur if we send the scan abort before we
  1076. * the microcode has notified us that a scan is
  1077. * completed. */
  1078. D_SCAN("SCAN_ABORT ret %d.\n", pkt->u.status);
  1079. ret = -EIO;
  1080. }
  1081. il_free_pages(il, cmd.reply_page);
  1082. return ret;
  1083. }
  1084. static void
  1085. il_complete_scan(struct il_priv *il, bool aborted)
  1086. {
  1087. /* check if scan was requested from mac80211 */
  1088. if (il->scan_request) {
  1089. D_SCAN("Complete scan in mac80211\n");
  1090. ieee80211_scan_completed(il->hw, aborted);
  1091. }
  1092. il->scan_vif = NULL;
  1093. il->scan_request = NULL;
  1094. }
  1095. void
  1096. il_force_scan_end(struct il_priv *il)
  1097. {
  1098. lockdep_assert_held(&il->mutex);
  1099. if (!test_bit(S_SCANNING, &il->status)) {
  1100. D_SCAN("Forcing scan end while not scanning\n");
  1101. return;
  1102. }
  1103. D_SCAN("Forcing scan end\n");
  1104. clear_bit(S_SCANNING, &il->status);
  1105. clear_bit(S_SCAN_HW, &il->status);
  1106. clear_bit(S_SCAN_ABORTING, &il->status);
  1107. il_complete_scan(il, true);
  1108. }
  1109. static void
  1110. il_do_scan_abort(struct il_priv *il)
  1111. {
  1112. int ret;
  1113. lockdep_assert_held(&il->mutex);
  1114. if (!test_bit(S_SCANNING, &il->status)) {
  1115. D_SCAN("Not performing scan to abort\n");
  1116. return;
  1117. }
  1118. if (test_and_set_bit(S_SCAN_ABORTING, &il->status)) {
  1119. D_SCAN("Scan abort in progress\n");
  1120. return;
  1121. }
  1122. ret = il_send_scan_abort(il);
  1123. if (ret) {
  1124. D_SCAN("Send scan abort failed %d\n", ret);
  1125. il_force_scan_end(il);
  1126. } else
  1127. D_SCAN("Successfully send scan abort\n");
  1128. }
  1129. /**
  1130. * il_scan_cancel - Cancel any currently executing HW scan
  1131. */
  1132. int
  1133. il_scan_cancel(struct il_priv *il)
  1134. {
  1135. D_SCAN("Queuing abort scan\n");
  1136. queue_work(il->workqueue, &il->abort_scan);
  1137. return 0;
  1138. }
  1139. EXPORT_SYMBOL(il_scan_cancel);
  1140. /**
  1141. * il_scan_cancel_timeout - Cancel any currently executing HW scan
  1142. * @ms: amount of time to wait (in milliseconds) for scan to abort
  1143. *
  1144. */
  1145. int
  1146. il_scan_cancel_timeout(struct il_priv *il, unsigned long ms)
  1147. {
  1148. unsigned long timeout = jiffies + msecs_to_jiffies(ms);
  1149. lockdep_assert_held(&il->mutex);
  1150. D_SCAN("Scan cancel timeout\n");
  1151. il_do_scan_abort(il);
  1152. while (time_before_eq(jiffies, timeout)) {
  1153. if (!test_bit(S_SCAN_HW, &il->status))
  1154. break;
  1155. msleep(20);
  1156. }
  1157. return test_bit(S_SCAN_HW, &il->status);
  1158. }
  1159. EXPORT_SYMBOL(il_scan_cancel_timeout);
  1160. /* Service response to C_SCAN (0x80) */
  1161. static void
  1162. il_hdl_scan(struct il_priv *il, struct il_rx_buf *rxb)
  1163. {
  1164. #ifdef CONFIG_IWLEGACY_DEBUG
  1165. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1166. struct il_scanreq_notification *notif =
  1167. (struct il_scanreq_notification *)pkt->u.raw;
  1168. D_SCAN("Scan request status = 0x%x\n", notif->status);
  1169. #endif
  1170. }
  1171. /* Service N_SCAN_START (0x82) */
  1172. static void
  1173. il_hdl_scan_start(struct il_priv *il, struct il_rx_buf *rxb)
  1174. {
  1175. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1176. struct il_scanstart_notification *notif =
  1177. (struct il_scanstart_notification *)pkt->u.raw;
  1178. il->scan_start_tsf = le32_to_cpu(notif->tsf_low);
  1179. D_SCAN("Scan start: " "%d [802.11%s] "
  1180. "(TSF: 0x%08X:%08X) - %d (beacon timer %u)\n", notif->channel,
  1181. notif->band ? "bg" : "a", le32_to_cpu(notif->tsf_high),
  1182. le32_to_cpu(notif->tsf_low), notif->status, notif->beacon_timer);
  1183. }
  1184. /* Service N_SCAN_RESULTS (0x83) */
  1185. static void
  1186. il_hdl_scan_results(struct il_priv *il, struct il_rx_buf *rxb)
  1187. {
  1188. #ifdef CONFIG_IWLEGACY_DEBUG
  1189. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1190. struct il_scanresults_notification *notif =
  1191. (struct il_scanresults_notification *)pkt->u.raw;
  1192. D_SCAN("Scan ch.res: " "%d [802.11%s] " "(TSF: 0x%08X:%08X) - %d "
  1193. "elapsed=%lu usec\n", notif->channel, notif->band ? "bg" : "a",
  1194. le32_to_cpu(notif->tsf_high), le32_to_cpu(notif->tsf_low),
  1195. le32_to_cpu(notif->stats[0]),
  1196. le32_to_cpu(notif->tsf_low) - il->scan_start_tsf);
  1197. #endif
  1198. }
  1199. /* Service N_SCAN_COMPLETE (0x84) */
  1200. static void
  1201. il_hdl_scan_complete(struct il_priv *il, struct il_rx_buf *rxb)
  1202. {
  1203. #ifdef CONFIG_IWLEGACY_DEBUG
  1204. struct il_rx_pkt *pkt = rxb_addr(rxb);
  1205. struct il_scancomplete_notification *scan_notif = (void *)pkt->u.raw;
  1206. #endif
  1207. D_SCAN("Scan complete: %d channels (TSF 0x%08X:%08X) - %d\n",
  1208. scan_notif->scanned_channels, scan_notif->tsf_low,
  1209. scan_notif->tsf_high, scan_notif->status);
  1210. /* The HW is no longer scanning */
  1211. clear_bit(S_SCAN_HW, &il->status);
  1212. D_SCAN("Scan on %sGHz took %dms\n",
  1213. (il->scan_band == IEEE80211_BAND_2GHZ) ? "2.4" : "5.2",
  1214. jiffies_to_msecs(jiffies - il->scan_start));
  1215. queue_work(il->workqueue, &il->scan_completed);
  1216. }
  1217. void
  1218. il_setup_rx_scan_handlers(struct il_priv *il)
  1219. {
  1220. /* scan handlers */
  1221. il->handlers[C_SCAN] = il_hdl_scan;
  1222. il->handlers[N_SCAN_START] = il_hdl_scan_start;
  1223. il->handlers[N_SCAN_RESULTS] = il_hdl_scan_results;
  1224. il->handlers[N_SCAN_COMPLETE] = il_hdl_scan_complete;
  1225. }
  1226. EXPORT_SYMBOL(il_setup_rx_scan_handlers);
  1227. inline u16
  1228. il_get_active_dwell_time(struct il_priv *il, enum ieee80211_band band,
  1229. u8 n_probes)
  1230. {
  1231. if (band == IEEE80211_BAND_5GHZ)
  1232. return IL_ACTIVE_DWELL_TIME_52 +
  1233. IL_ACTIVE_DWELL_FACTOR_52GHZ * (n_probes + 1);
  1234. else
  1235. return IL_ACTIVE_DWELL_TIME_24 +
  1236. IL_ACTIVE_DWELL_FACTOR_24GHZ * (n_probes + 1);
  1237. }
  1238. EXPORT_SYMBOL(il_get_active_dwell_time);
  1239. u16
  1240. il_get_passive_dwell_time(struct il_priv *il, enum ieee80211_band band,
  1241. struct ieee80211_vif *vif)
  1242. {
  1243. u16 value;
  1244. u16 passive =
  1245. (band ==
  1246. IEEE80211_BAND_2GHZ) ? IL_PASSIVE_DWELL_BASE +
  1247. IL_PASSIVE_DWELL_TIME_24 : IL_PASSIVE_DWELL_BASE +
  1248. IL_PASSIVE_DWELL_TIME_52;
  1249. if (il_is_any_associated(il)) {
  1250. /*
  1251. * If we're associated, we clamp the maximum passive
  1252. * dwell time to be 98% of the smallest beacon interval
  1253. * (minus 2 * channel tune time)
  1254. */
  1255. value = il->vif ? il->vif->bss_conf.beacon_int : 0;
  1256. if (value > IL_PASSIVE_DWELL_BASE || !value)
  1257. value = IL_PASSIVE_DWELL_BASE;
  1258. value = (value * 98) / 100 - IL_CHANNEL_TUNE_TIME * 2;
  1259. passive = min(value, passive);
  1260. }
  1261. return passive;
  1262. }
  1263. EXPORT_SYMBOL(il_get_passive_dwell_time);
  1264. void
  1265. il_init_scan_params(struct il_priv *il)
  1266. {
  1267. u8 ant_idx = fls(il->hw_params.valid_tx_ant) - 1;
  1268. if (!il->scan_tx_ant[IEEE80211_BAND_5GHZ])
  1269. il->scan_tx_ant[IEEE80211_BAND_5GHZ] = ant_idx;
  1270. if (!il->scan_tx_ant[IEEE80211_BAND_2GHZ])
  1271. il->scan_tx_ant[IEEE80211_BAND_2GHZ] = ant_idx;
  1272. }
  1273. EXPORT_SYMBOL(il_init_scan_params);
  1274. static int
  1275. il_scan_initiate(struct il_priv *il, struct ieee80211_vif *vif)
  1276. {
  1277. int ret;
  1278. lockdep_assert_held(&il->mutex);
  1279. if (WARN_ON(!il->cfg->ops->utils->request_scan))
  1280. return -EOPNOTSUPP;
  1281. cancel_delayed_work(&il->scan_check);
  1282. if (!il_is_ready_rf(il)) {
  1283. IL_WARN("Request scan called when driver not ready.\n");
  1284. return -EIO;
  1285. }
  1286. if (test_bit(S_SCAN_HW, &il->status)) {
  1287. D_SCAN("Multiple concurrent scan requests in parallel.\n");
  1288. return -EBUSY;
  1289. }
  1290. if (test_bit(S_SCAN_ABORTING, &il->status)) {
  1291. D_SCAN("Scan request while abort pending.\n");
  1292. return -EBUSY;
  1293. }
  1294. D_SCAN("Starting scan...\n");
  1295. set_bit(S_SCANNING, &il->status);
  1296. il->scan_start = jiffies;
  1297. ret = il->cfg->ops->utils->request_scan(il, vif);
  1298. if (ret) {
  1299. clear_bit(S_SCANNING, &il->status);
  1300. return ret;
  1301. }
  1302. queue_delayed_work(il->workqueue, &il->scan_check,
  1303. IL_SCAN_CHECK_WATCHDOG);
  1304. return 0;
  1305. }
  1306. int
  1307. il_mac_hw_scan(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  1308. struct cfg80211_scan_request *req)
  1309. {
  1310. struct il_priv *il = hw->priv;
  1311. int ret;
  1312. D_MAC80211("enter\n");
  1313. if (req->n_channels == 0)
  1314. return -EINVAL;
  1315. mutex_lock(&il->mutex);
  1316. if (test_bit(S_SCANNING, &il->status)) {
  1317. D_SCAN("Scan already in progress.\n");
  1318. ret = -EAGAIN;
  1319. goto out_unlock;
  1320. }
  1321. /* mac80211 will only ask for one band at a time */
  1322. il->scan_request = req;
  1323. il->scan_vif = vif;
  1324. il->scan_band = req->channels[0]->band;
  1325. ret = il_scan_initiate(il, vif);
  1326. D_MAC80211("leave\n");
  1327. out_unlock:
  1328. mutex_unlock(&il->mutex);
  1329. return ret;
  1330. }
  1331. EXPORT_SYMBOL(il_mac_hw_scan);
  1332. static void
  1333. il_bg_scan_check(struct work_struct *data)
  1334. {
  1335. struct il_priv *il =
  1336. container_of(data, struct il_priv, scan_check.work);
  1337. D_SCAN("Scan check work\n");
  1338. /* Since we are here firmware does not finish scan and
  1339. * most likely is in bad shape, so we don't bother to
  1340. * send abort command, just force scan complete to mac80211 */
  1341. mutex_lock(&il->mutex);
  1342. il_force_scan_end(il);
  1343. mutex_unlock(&il->mutex);
  1344. }
  1345. /**
  1346. * il_fill_probe_req - fill in all required fields and IE for probe request
  1347. */
  1348. u16
  1349. il_fill_probe_req(struct il_priv *il, struct ieee80211_mgmt *frame,
  1350. const u8 *ta, const u8 *ies, int ie_len, int left)
  1351. {
  1352. int len = 0;
  1353. u8 *pos = NULL;
  1354. /* Make sure there is enough space for the probe request,
  1355. * two mandatory IEs and the data */
  1356. left -= 24;
  1357. if (left < 0)
  1358. return 0;
  1359. frame->frame_control = cpu_to_le16(IEEE80211_STYPE_PROBE_REQ);
  1360. memcpy(frame->da, il_bcast_addr, ETH_ALEN);
  1361. memcpy(frame->sa, ta, ETH_ALEN);
  1362. memcpy(frame->bssid, il_bcast_addr, ETH_ALEN);
  1363. frame->seq_ctrl = 0;
  1364. len += 24;
  1365. /* ...next IE... */
  1366. pos = &frame->u.probe_req.variable[0];
  1367. /* fill in our indirect SSID IE */
  1368. left -= 2;
  1369. if (left < 0)
  1370. return 0;
  1371. *pos++ = WLAN_EID_SSID;
  1372. *pos++ = 0;
  1373. len += 2;
  1374. if (WARN_ON(left < ie_len))
  1375. return len;
  1376. if (ies && ie_len) {
  1377. memcpy(pos, ies, ie_len);
  1378. len += ie_len;
  1379. }
  1380. return (u16) len;
  1381. }
  1382. EXPORT_SYMBOL(il_fill_probe_req);
  1383. static void
  1384. il_bg_abort_scan(struct work_struct *work)
  1385. {
  1386. struct il_priv *il = container_of(work, struct il_priv, abort_scan);
  1387. D_SCAN("Abort scan work\n");
  1388. /* We keep scan_check work queued in case when firmware will not
  1389. * report back scan completed notification */
  1390. mutex_lock(&il->mutex);
  1391. il_scan_cancel_timeout(il, 200);
  1392. mutex_unlock(&il->mutex);
  1393. }
  1394. static void
  1395. il_bg_scan_completed(struct work_struct *work)
  1396. {
  1397. struct il_priv *il = container_of(work, struct il_priv, scan_completed);
  1398. bool aborted;
  1399. D_SCAN("Completed scan.\n");
  1400. cancel_delayed_work(&il->scan_check);
  1401. mutex_lock(&il->mutex);
  1402. aborted = test_and_clear_bit(S_SCAN_ABORTING, &il->status);
  1403. if (aborted)
  1404. D_SCAN("Aborted scan completed.\n");
  1405. if (!test_and_clear_bit(S_SCANNING, &il->status)) {
  1406. D_SCAN("Scan already completed.\n");
  1407. goto out_settings;
  1408. }
  1409. il_complete_scan(il, aborted);
  1410. out_settings:
  1411. /* Can we still talk to firmware ? */
  1412. if (!il_is_ready_rf(il))
  1413. goto out;
  1414. /*
  1415. * We do not commit power settings while scan is pending,
  1416. * do it now if the settings changed.
  1417. */
  1418. il_power_set_mode(il, &il->power_data.sleep_cmd_next, false);
  1419. il_set_tx_power(il, il->tx_power_next, false);
  1420. il->cfg->ops->utils->post_scan(il);
  1421. out:
  1422. mutex_unlock(&il->mutex);
  1423. }
  1424. void
  1425. il_setup_scan_deferred_work(struct il_priv *il)
  1426. {
  1427. INIT_WORK(&il->scan_completed, il_bg_scan_completed);
  1428. INIT_WORK(&il->abort_scan, il_bg_abort_scan);
  1429. INIT_DELAYED_WORK(&il->scan_check, il_bg_scan_check);
  1430. }
  1431. EXPORT_SYMBOL(il_setup_scan_deferred_work);
  1432. void
  1433. il_cancel_scan_deferred_work(struct il_priv *il)
  1434. {
  1435. cancel_work_sync(&il->abort_scan);
  1436. cancel_work_sync(&il->scan_completed);
  1437. if (cancel_delayed_work_sync(&il->scan_check)) {
  1438. mutex_lock(&il->mutex);
  1439. il_force_scan_end(il);
  1440. mutex_unlock(&il->mutex);
  1441. }
  1442. }
  1443. EXPORT_SYMBOL(il_cancel_scan_deferred_work);
  1444. /* il->sta_lock must be held */
  1445. static void
  1446. il_sta_ucode_activate(struct il_priv *il, u8 sta_id)
  1447. {
  1448. if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE))
  1449. IL_ERR("ACTIVATE a non DRIVER active station id %u addr %pM\n",
  1450. sta_id, il->stations[sta_id].sta.sta.addr);
  1451. if (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) {
  1452. D_ASSOC("STA id %u addr %pM already present"
  1453. " in uCode (according to driver)\n", sta_id,
  1454. il->stations[sta_id].sta.sta.addr);
  1455. } else {
  1456. il->stations[sta_id].used |= IL_STA_UCODE_ACTIVE;
  1457. D_ASSOC("Added STA id %u addr %pM to uCode\n", sta_id,
  1458. il->stations[sta_id].sta.sta.addr);
  1459. }
  1460. }
  1461. static int
  1462. il_process_add_sta_resp(struct il_priv *il, struct il_addsta_cmd *addsta,
  1463. struct il_rx_pkt *pkt, bool sync)
  1464. {
  1465. u8 sta_id = addsta->sta.sta_id;
  1466. unsigned long flags;
  1467. int ret = -EIO;
  1468. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  1469. IL_ERR("Bad return from C_ADD_STA (0x%08X)\n", pkt->hdr.flags);
  1470. return ret;
  1471. }
  1472. D_INFO("Processing response for adding station %u\n", sta_id);
  1473. spin_lock_irqsave(&il->sta_lock, flags);
  1474. switch (pkt->u.add_sta.status) {
  1475. case ADD_STA_SUCCESS_MSK:
  1476. D_INFO("C_ADD_STA PASSED\n");
  1477. il_sta_ucode_activate(il, sta_id);
  1478. ret = 0;
  1479. break;
  1480. case ADD_STA_NO_ROOM_IN_TBL:
  1481. IL_ERR("Adding station %d failed, no room in table.\n", sta_id);
  1482. break;
  1483. case ADD_STA_NO_BLOCK_ACK_RESOURCE:
  1484. IL_ERR("Adding station %d failed, no block ack resource.\n",
  1485. sta_id);
  1486. break;
  1487. case ADD_STA_MODIFY_NON_EXIST_STA:
  1488. IL_ERR("Attempting to modify non-existing station %d\n",
  1489. sta_id);
  1490. break;
  1491. default:
  1492. D_ASSOC("Received C_ADD_STA:(0x%08X)\n", pkt->u.add_sta.status);
  1493. break;
  1494. }
  1495. D_INFO("%s station id %u addr %pM\n",
  1496. il->stations[sta_id].sta.mode ==
  1497. STA_CONTROL_MODIFY_MSK ? "Modified" : "Added", sta_id,
  1498. il->stations[sta_id].sta.sta.addr);
  1499. /*
  1500. * XXX: The MAC address in the command buffer is often changed from
  1501. * the original sent to the device. That is, the MAC address
  1502. * written to the command buffer often is not the same MAC address
  1503. * read from the command buffer when the command returns. This
  1504. * issue has not yet been resolved and this debugging is left to
  1505. * observe the problem.
  1506. */
  1507. D_INFO("%s station according to cmd buffer %pM\n",
  1508. il->stations[sta_id].sta.mode ==
  1509. STA_CONTROL_MODIFY_MSK ? "Modified" : "Added", addsta->sta.addr);
  1510. spin_unlock_irqrestore(&il->sta_lock, flags);
  1511. return ret;
  1512. }
  1513. static void
  1514. il_add_sta_callback(struct il_priv *il, struct il_device_cmd *cmd,
  1515. struct il_rx_pkt *pkt)
  1516. {
  1517. struct il_addsta_cmd *addsta = (struct il_addsta_cmd *)cmd->cmd.payload;
  1518. il_process_add_sta_resp(il, addsta, pkt, false);
  1519. }
  1520. int
  1521. il_send_add_sta(struct il_priv *il, struct il_addsta_cmd *sta, u8 flags)
  1522. {
  1523. struct il_rx_pkt *pkt = NULL;
  1524. int ret = 0;
  1525. u8 data[sizeof(*sta)];
  1526. struct il_host_cmd cmd = {
  1527. .id = C_ADD_STA,
  1528. .flags = flags,
  1529. .data = data,
  1530. };
  1531. u8 sta_id __maybe_unused = sta->sta.sta_id;
  1532. D_INFO("Adding sta %u (%pM) %ssynchronously\n", sta_id, sta->sta.addr,
  1533. flags & CMD_ASYNC ? "a" : "");
  1534. if (flags & CMD_ASYNC)
  1535. cmd.callback = il_add_sta_callback;
  1536. else {
  1537. cmd.flags |= CMD_WANT_SKB;
  1538. might_sleep();
  1539. }
  1540. cmd.len = il->cfg->ops->utils->build_addsta_hcmd(sta, data);
  1541. ret = il_send_cmd(il, &cmd);
  1542. if (ret || (flags & CMD_ASYNC))
  1543. return ret;
  1544. if (ret == 0) {
  1545. pkt = (struct il_rx_pkt *)cmd.reply_page;
  1546. ret = il_process_add_sta_resp(il, sta, pkt, true);
  1547. }
  1548. il_free_pages(il, cmd.reply_page);
  1549. return ret;
  1550. }
  1551. EXPORT_SYMBOL(il_send_add_sta);
  1552. static void
  1553. il_set_ht_add_station(struct il_priv *il, u8 idx, struct ieee80211_sta *sta)
  1554. {
  1555. struct ieee80211_sta_ht_cap *sta_ht_inf = &sta->ht_cap;
  1556. __le32 sta_flags;
  1557. u8 mimo_ps_mode;
  1558. if (!sta || !sta_ht_inf->ht_supported)
  1559. goto done;
  1560. mimo_ps_mode = (sta_ht_inf->cap & IEEE80211_HT_CAP_SM_PS) >> 2;
  1561. D_ASSOC("spatial multiplexing power save mode: %s\n",
  1562. (mimo_ps_mode == WLAN_HT_CAP_SM_PS_STATIC) ? "static" :
  1563. (mimo_ps_mode == WLAN_HT_CAP_SM_PS_DYNAMIC) ? "dynamic" :
  1564. "disabled");
  1565. sta_flags = il->stations[idx].sta.station_flags;
  1566. sta_flags &= ~(STA_FLG_RTS_MIMO_PROT_MSK | STA_FLG_MIMO_DIS_MSK);
  1567. switch (mimo_ps_mode) {
  1568. case WLAN_HT_CAP_SM_PS_STATIC:
  1569. sta_flags |= STA_FLG_MIMO_DIS_MSK;
  1570. break;
  1571. case WLAN_HT_CAP_SM_PS_DYNAMIC:
  1572. sta_flags |= STA_FLG_RTS_MIMO_PROT_MSK;
  1573. break;
  1574. case WLAN_HT_CAP_SM_PS_DISABLED:
  1575. break;
  1576. default:
  1577. IL_WARN("Invalid MIMO PS mode %d\n", mimo_ps_mode);
  1578. break;
  1579. }
  1580. sta_flags |=
  1581. cpu_to_le32((u32) sta_ht_inf->
  1582. ampdu_factor << STA_FLG_MAX_AGG_SIZE_POS);
  1583. sta_flags |=
  1584. cpu_to_le32((u32) sta_ht_inf->
  1585. ampdu_density << STA_FLG_AGG_MPDU_DENSITY_POS);
  1586. if (il_is_ht40_tx_allowed(il, &sta->ht_cap))
  1587. sta_flags |= STA_FLG_HT40_EN_MSK;
  1588. else
  1589. sta_flags &= ~STA_FLG_HT40_EN_MSK;
  1590. il->stations[idx].sta.station_flags = sta_flags;
  1591. done:
  1592. return;
  1593. }
  1594. /**
  1595. * il_prep_station - Prepare station information for addition
  1596. *
  1597. * should be called with sta_lock held
  1598. */
  1599. u8
  1600. il_prep_station(struct il_priv *il, const u8 *addr, bool is_ap,
  1601. struct ieee80211_sta *sta)
  1602. {
  1603. struct il_station_entry *station;
  1604. int i;
  1605. u8 sta_id = IL_INVALID_STATION;
  1606. u16 rate;
  1607. if (is_ap)
  1608. sta_id = IL_AP_ID;
  1609. else if (is_broadcast_ether_addr(addr))
  1610. sta_id = il->hw_params.bcast_id;
  1611. else
  1612. for (i = IL_STA_ID; i < il->hw_params.max_stations; i++) {
  1613. if (!compare_ether_addr
  1614. (il->stations[i].sta.sta.addr, addr)) {
  1615. sta_id = i;
  1616. break;
  1617. }
  1618. if (!il->stations[i].used &&
  1619. sta_id == IL_INVALID_STATION)
  1620. sta_id = i;
  1621. }
  1622. /*
  1623. * These two conditions have the same outcome, but keep them
  1624. * separate
  1625. */
  1626. if (unlikely(sta_id == IL_INVALID_STATION))
  1627. return sta_id;
  1628. /*
  1629. * uCode is not able to deal with multiple requests to add a
  1630. * station. Keep track if one is in progress so that we do not send
  1631. * another.
  1632. */
  1633. if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) {
  1634. D_INFO("STA %d already in process of being added.\n", sta_id);
  1635. return sta_id;
  1636. }
  1637. if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) &&
  1638. (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE) &&
  1639. !compare_ether_addr(il->stations[sta_id].sta.sta.addr, addr)) {
  1640. D_ASSOC("STA %d (%pM) already added, not adding again.\n",
  1641. sta_id, addr);
  1642. return sta_id;
  1643. }
  1644. station = &il->stations[sta_id];
  1645. station->used = IL_STA_DRIVER_ACTIVE;
  1646. D_ASSOC("Add STA to driver ID %d: %pM\n", sta_id, addr);
  1647. il->num_stations++;
  1648. /* Set up the C_ADD_STA command to send to device */
  1649. memset(&station->sta, 0, sizeof(struct il_addsta_cmd));
  1650. memcpy(station->sta.sta.addr, addr, ETH_ALEN);
  1651. station->sta.mode = 0;
  1652. station->sta.sta.sta_id = sta_id;
  1653. station->sta.station_flags = 0;
  1654. /*
  1655. * OK to call unconditionally, since local stations (IBSS BSSID
  1656. * STA and broadcast STA) pass in a NULL sta, and mac80211
  1657. * doesn't allow HT IBSS.
  1658. */
  1659. il_set_ht_add_station(il, sta_id, sta);
  1660. /* 3945 only */
  1661. rate = (il->band == IEEE80211_BAND_5GHZ) ? RATE_6M_PLCP : RATE_1M_PLCP;
  1662. /* Turn on both antennas for the station... */
  1663. station->sta.rate_n_flags = cpu_to_le16(rate | RATE_MCS_ANT_AB_MSK);
  1664. return sta_id;
  1665. }
  1666. EXPORT_SYMBOL_GPL(il_prep_station);
  1667. #define STA_WAIT_TIMEOUT (HZ/2)
  1668. /**
  1669. * il_add_station_common -
  1670. */
  1671. int
  1672. il_add_station_common(struct il_priv *il, const u8 *addr, bool is_ap,
  1673. struct ieee80211_sta *sta, u8 *sta_id_r)
  1674. {
  1675. unsigned long flags_spin;
  1676. int ret = 0;
  1677. u8 sta_id;
  1678. struct il_addsta_cmd sta_cmd;
  1679. *sta_id_r = 0;
  1680. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1681. sta_id = il_prep_station(il, addr, is_ap, sta);
  1682. if (sta_id == IL_INVALID_STATION) {
  1683. IL_ERR("Unable to prepare station %pM for addition\n", addr);
  1684. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1685. return -EINVAL;
  1686. }
  1687. /*
  1688. * uCode is not able to deal with multiple requests to add a
  1689. * station. Keep track if one is in progress so that we do not send
  1690. * another.
  1691. */
  1692. if (il->stations[sta_id].used & IL_STA_UCODE_INPROGRESS) {
  1693. D_INFO("STA %d already in process of being added.\n", sta_id);
  1694. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1695. return -EEXIST;
  1696. }
  1697. if ((il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE) &&
  1698. (il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) {
  1699. D_ASSOC("STA %d (%pM) already added, not adding again.\n",
  1700. sta_id, addr);
  1701. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1702. return -EEXIST;
  1703. }
  1704. il->stations[sta_id].used |= IL_STA_UCODE_INPROGRESS;
  1705. memcpy(&sta_cmd, &il->stations[sta_id].sta,
  1706. sizeof(struct il_addsta_cmd));
  1707. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1708. /* Add station to device's station table */
  1709. ret = il_send_add_sta(il, &sta_cmd, CMD_SYNC);
  1710. if (ret) {
  1711. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1712. IL_ERR("Adding station %pM failed.\n",
  1713. il->stations[sta_id].sta.sta.addr);
  1714. il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE;
  1715. il->stations[sta_id].used &= ~IL_STA_UCODE_INPROGRESS;
  1716. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1717. }
  1718. *sta_id_r = sta_id;
  1719. return ret;
  1720. }
  1721. EXPORT_SYMBOL(il_add_station_common);
  1722. /**
  1723. * il_sta_ucode_deactivate - deactivate ucode status for a station
  1724. *
  1725. * il->sta_lock must be held
  1726. */
  1727. static void
  1728. il_sta_ucode_deactivate(struct il_priv *il, u8 sta_id)
  1729. {
  1730. /* Ucode must be active and driver must be non active */
  1731. if ((il->stations[sta_id].
  1732. used & (IL_STA_UCODE_ACTIVE | IL_STA_DRIVER_ACTIVE)) !=
  1733. IL_STA_UCODE_ACTIVE)
  1734. IL_ERR("removed non active STA %u\n", sta_id);
  1735. il->stations[sta_id].used &= ~IL_STA_UCODE_ACTIVE;
  1736. memset(&il->stations[sta_id], 0, sizeof(struct il_station_entry));
  1737. D_ASSOC("Removed STA %u\n", sta_id);
  1738. }
  1739. static int
  1740. il_send_remove_station(struct il_priv *il, const u8 * addr, int sta_id,
  1741. bool temporary)
  1742. {
  1743. struct il_rx_pkt *pkt;
  1744. int ret;
  1745. unsigned long flags_spin;
  1746. struct il_rem_sta_cmd rm_sta_cmd;
  1747. struct il_host_cmd cmd = {
  1748. .id = C_REM_STA,
  1749. .len = sizeof(struct il_rem_sta_cmd),
  1750. .flags = CMD_SYNC,
  1751. .data = &rm_sta_cmd,
  1752. };
  1753. memset(&rm_sta_cmd, 0, sizeof(rm_sta_cmd));
  1754. rm_sta_cmd.num_sta = 1;
  1755. memcpy(&rm_sta_cmd.addr, addr, ETH_ALEN);
  1756. cmd.flags |= CMD_WANT_SKB;
  1757. ret = il_send_cmd(il, &cmd);
  1758. if (ret)
  1759. return ret;
  1760. pkt = (struct il_rx_pkt *)cmd.reply_page;
  1761. if (pkt->hdr.flags & IL_CMD_FAILED_MSK) {
  1762. IL_ERR("Bad return from C_REM_STA (0x%08X)\n", pkt->hdr.flags);
  1763. ret = -EIO;
  1764. }
  1765. if (!ret) {
  1766. switch (pkt->u.rem_sta.status) {
  1767. case REM_STA_SUCCESS_MSK:
  1768. if (!temporary) {
  1769. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1770. il_sta_ucode_deactivate(il, sta_id);
  1771. spin_unlock_irqrestore(&il->sta_lock,
  1772. flags_spin);
  1773. }
  1774. D_ASSOC("C_REM_STA PASSED\n");
  1775. break;
  1776. default:
  1777. ret = -EIO;
  1778. IL_ERR("C_REM_STA failed\n");
  1779. break;
  1780. }
  1781. }
  1782. il_free_pages(il, cmd.reply_page);
  1783. return ret;
  1784. }
  1785. /**
  1786. * il_remove_station - Remove driver's knowledge of station.
  1787. */
  1788. int
  1789. il_remove_station(struct il_priv *il, const u8 sta_id, const u8 * addr)
  1790. {
  1791. unsigned long flags;
  1792. if (!il_is_ready(il)) {
  1793. D_INFO("Unable to remove station %pM, device not ready.\n",
  1794. addr);
  1795. /*
  1796. * It is typical for stations to be removed when we are
  1797. * going down. Return success since device will be down
  1798. * soon anyway
  1799. */
  1800. return 0;
  1801. }
  1802. D_ASSOC("Removing STA from driver:%d %pM\n", sta_id, addr);
  1803. if (WARN_ON(sta_id == IL_INVALID_STATION))
  1804. return -EINVAL;
  1805. spin_lock_irqsave(&il->sta_lock, flags);
  1806. if (!(il->stations[sta_id].used & IL_STA_DRIVER_ACTIVE)) {
  1807. D_INFO("Removing %pM but non DRIVER active\n", addr);
  1808. goto out_err;
  1809. }
  1810. if (!(il->stations[sta_id].used & IL_STA_UCODE_ACTIVE)) {
  1811. D_INFO("Removing %pM but non UCODE active\n", addr);
  1812. goto out_err;
  1813. }
  1814. if (il->stations[sta_id].used & IL_STA_LOCAL) {
  1815. kfree(il->stations[sta_id].lq);
  1816. il->stations[sta_id].lq = NULL;
  1817. }
  1818. il->stations[sta_id].used &= ~IL_STA_DRIVER_ACTIVE;
  1819. il->num_stations--;
  1820. BUG_ON(il->num_stations < 0);
  1821. spin_unlock_irqrestore(&il->sta_lock, flags);
  1822. return il_send_remove_station(il, addr, sta_id, false);
  1823. out_err:
  1824. spin_unlock_irqrestore(&il->sta_lock, flags);
  1825. return -EINVAL;
  1826. }
  1827. EXPORT_SYMBOL_GPL(il_remove_station);
  1828. /**
  1829. * il_clear_ucode_stations - clear ucode station table bits
  1830. *
  1831. * This function clears all the bits in the driver indicating
  1832. * which stations are active in the ucode. Call when something
  1833. * other than explicit station management would cause this in
  1834. * the ucode, e.g. unassociated RXON.
  1835. */
  1836. void
  1837. il_clear_ucode_stations(struct il_priv *il)
  1838. {
  1839. int i;
  1840. unsigned long flags_spin;
  1841. bool cleared = false;
  1842. D_INFO("Clearing ucode stations in driver\n");
  1843. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1844. for (i = 0; i < il->hw_params.max_stations; i++) {
  1845. if (il->stations[i].used & IL_STA_UCODE_ACTIVE) {
  1846. D_INFO("Clearing ucode active for station %d\n", i);
  1847. il->stations[i].used &= ~IL_STA_UCODE_ACTIVE;
  1848. cleared = true;
  1849. }
  1850. }
  1851. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1852. if (!cleared)
  1853. D_INFO("No active stations found to be cleared\n");
  1854. }
  1855. EXPORT_SYMBOL(il_clear_ucode_stations);
  1856. /**
  1857. * il_restore_stations() - Restore driver known stations to device
  1858. *
  1859. * All stations considered active by driver, but not present in ucode, is
  1860. * restored.
  1861. *
  1862. * Function sleeps.
  1863. */
  1864. void
  1865. il_restore_stations(struct il_priv *il)
  1866. {
  1867. struct il_addsta_cmd sta_cmd;
  1868. struct il_link_quality_cmd lq;
  1869. unsigned long flags_spin;
  1870. int i;
  1871. bool found = false;
  1872. int ret;
  1873. bool send_lq;
  1874. if (!il_is_ready(il)) {
  1875. D_INFO("Not ready yet, not restoring any stations.\n");
  1876. return;
  1877. }
  1878. D_ASSOC("Restoring all known stations ... start.\n");
  1879. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1880. for (i = 0; i < il->hw_params.max_stations; i++) {
  1881. if ((il->stations[i].used & IL_STA_DRIVER_ACTIVE) &&
  1882. !(il->stations[i].used & IL_STA_UCODE_ACTIVE)) {
  1883. D_ASSOC("Restoring sta %pM\n",
  1884. il->stations[i].sta.sta.addr);
  1885. il->stations[i].sta.mode = 0;
  1886. il->stations[i].used |= IL_STA_UCODE_INPROGRESS;
  1887. found = true;
  1888. }
  1889. }
  1890. for (i = 0; i < il->hw_params.max_stations; i++) {
  1891. if ((il->stations[i].used & IL_STA_UCODE_INPROGRESS)) {
  1892. memcpy(&sta_cmd, &il->stations[i].sta,
  1893. sizeof(struct il_addsta_cmd));
  1894. send_lq = false;
  1895. if (il->stations[i].lq) {
  1896. memcpy(&lq, il->stations[i].lq,
  1897. sizeof(struct il_link_quality_cmd));
  1898. send_lq = true;
  1899. }
  1900. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1901. ret = il_send_add_sta(il, &sta_cmd, CMD_SYNC);
  1902. if (ret) {
  1903. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1904. IL_ERR("Adding station %pM failed.\n",
  1905. il->stations[i].sta.sta.addr);
  1906. il->stations[i].used &= ~IL_STA_DRIVER_ACTIVE;
  1907. il->stations[i].used &=
  1908. ~IL_STA_UCODE_INPROGRESS;
  1909. spin_unlock_irqrestore(&il->sta_lock,
  1910. flags_spin);
  1911. }
  1912. /*
  1913. * Rate scaling has already been initialized, send
  1914. * current LQ command
  1915. */
  1916. if (send_lq)
  1917. il_send_lq_cmd(il, &lq, CMD_SYNC, true);
  1918. spin_lock_irqsave(&il->sta_lock, flags_spin);
  1919. il->stations[i].used &= ~IL_STA_UCODE_INPROGRESS;
  1920. }
  1921. }
  1922. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  1923. if (!found)
  1924. D_INFO("Restoring all known stations"
  1925. " .... no stations to be restored.\n");
  1926. else
  1927. D_INFO("Restoring all known stations" " .... complete.\n");
  1928. }
  1929. EXPORT_SYMBOL(il_restore_stations);
  1930. int
  1931. il_get_free_ucode_key_idx(struct il_priv *il)
  1932. {
  1933. int i;
  1934. for (i = 0; i < il->sta_key_max_num; i++)
  1935. if (!test_and_set_bit(i, &il->ucode_key_table))
  1936. return i;
  1937. return WEP_INVALID_OFFSET;
  1938. }
  1939. EXPORT_SYMBOL(il_get_free_ucode_key_idx);
  1940. void
  1941. il_dealloc_bcast_stations(struct il_priv *il)
  1942. {
  1943. unsigned long flags;
  1944. int i;
  1945. spin_lock_irqsave(&il->sta_lock, flags);
  1946. for (i = 0; i < il->hw_params.max_stations; i++) {
  1947. if (!(il->stations[i].used & IL_STA_BCAST))
  1948. continue;
  1949. il->stations[i].used &= ~IL_STA_UCODE_ACTIVE;
  1950. il->num_stations--;
  1951. BUG_ON(il->num_stations < 0);
  1952. kfree(il->stations[i].lq);
  1953. il->stations[i].lq = NULL;
  1954. }
  1955. spin_unlock_irqrestore(&il->sta_lock, flags);
  1956. }
  1957. EXPORT_SYMBOL_GPL(il_dealloc_bcast_stations);
  1958. #ifdef CONFIG_IWLEGACY_DEBUG
  1959. static void
  1960. il_dump_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq)
  1961. {
  1962. int i;
  1963. D_RATE("lq station id 0x%x\n", lq->sta_id);
  1964. D_RATE("lq ant 0x%X 0x%X\n", lq->general_params.single_stream_ant_msk,
  1965. lq->general_params.dual_stream_ant_msk);
  1966. for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++)
  1967. D_RATE("lq idx %d 0x%X\n", i, lq->rs_table[i].rate_n_flags);
  1968. }
  1969. #else
  1970. static inline void
  1971. il_dump_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq)
  1972. {
  1973. }
  1974. #endif
  1975. /**
  1976. * il_is_lq_table_valid() - Test one aspect of LQ cmd for validity
  1977. *
  1978. * It sometimes happens when a HT rate has been in use and we
  1979. * loose connectivity with AP then mac80211 will first tell us that the
  1980. * current channel is not HT anymore before removing the station. In such a
  1981. * scenario the RXON flags will be updated to indicate we are not
  1982. * communicating HT anymore, but the LQ command may still contain HT rates.
  1983. * Test for this to prevent driver from sending LQ command between the time
  1984. * RXON flags are updated and when LQ command is updated.
  1985. */
  1986. static bool
  1987. il_is_lq_table_valid(struct il_priv *il, struct il_link_quality_cmd *lq)
  1988. {
  1989. int i;
  1990. if (il->ht.enabled)
  1991. return true;
  1992. D_INFO("Channel %u is not an HT channel\n", il->active.channel);
  1993. for (i = 0; i < LINK_QUAL_MAX_RETRY_NUM; i++) {
  1994. if (le32_to_cpu(lq->rs_table[i].rate_n_flags) & RATE_MCS_HT_MSK) {
  1995. D_INFO("idx %d of LQ expects HT channel\n", i);
  1996. return false;
  1997. }
  1998. }
  1999. return true;
  2000. }
  2001. /**
  2002. * il_send_lq_cmd() - Send link quality command
  2003. * @init: This command is sent as part of station initialization right
  2004. * after station has been added.
  2005. *
  2006. * The link quality command is sent as the last step of station creation.
  2007. * This is the special case in which init is set and we call a callback in
  2008. * this case to clear the state indicating that station creation is in
  2009. * progress.
  2010. */
  2011. int
  2012. il_send_lq_cmd(struct il_priv *il, struct il_link_quality_cmd *lq,
  2013. u8 flags, bool init)
  2014. {
  2015. int ret = 0;
  2016. unsigned long flags_spin;
  2017. struct il_host_cmd cmd = {
  2018. .id = C_TX_LINK_QUALITY_CMD,
  2019. .len = sizeof(struct il_link_quality_cmd),
  2020. .flags = flags,
  2021. .data = lq,
  2022. };
  2023. if (WARN_ON(lq->sta_id == IL_INVALID_STATION))
  2024. return -EINVAL;
  2025. spin_lock_irqsave(&il->sta_lock, flags_spin);
  2026. if (!(il->stations[lq->sta_id].used & IL_STA_DRIVER_ACTIVE)) {
  2027. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  2028. return -EINVAL;
  2029. }
  2030. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  2031. il_dump_lq_cmd(il, lq);
  2032. BUG_ON(init && (cmd.flags & CMD_ASYNC));
  2033. if (il_is_lq_table_valid(il, lq))
  2034. ret = il_send_cmd(il, &cmd);
  2035. else
  2036. ret = -EINVAL;
  2037. if (cmd.flags & CMD_ASYNC)
  2038. return ret;
  2039. if (init) {
  2040. D_INFO("init LQ command complete,"
  2041. " clearing sta addition status for sta %d\n",
  2042. lq->sta_id);
  2043. spin_lock_irqsave(&il->sta_lock, flags_spin);
  2044. il->stations[lq->sta_id].used &= ~IL_STA_UCODE_INPROGRESS;
  2045. spin_unlock_irqrestore(&il->sta_lock, flags_spin);
  2046. }
  2047. return ret;
  2048. }
  2049. EXPORT_SYMBOL(il_send_lq_cmd);
  2050. int
  2051. il_mac_sta_remove(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  2052. struct ieee80211_sta *sta)
  2053. {
  2054. struct il_priv *il = hw->priv;
  2055. struct il_station_priv_common *sta_common = (void *)sta->drv_priv;
  2056. int ret;
  2057. D_INFO("received request to remove station %pM\n", sta->addr);
  2058. mutex_lock(&il->mutex);
  2059. D_INFO("proceeding to remove station %pM\n", sta->addr);
  2060. ret = il_remove_station(il, sta_common->sta_id, sta->addr);
  2061. if (ret)
  2062. IL_ERR("Error removing station %pM\n", sta->addr);
  2063. mutex_unlock(&il->mutex);
  2064. return ret;
  2065. }
  2066. EXPORT_SYMBOL(il_mac_sta_remove);
  2067. /************************** RX-FUNCTIONS ****************************/
  2068. /*
  2069. * Rx theory of operation
  2070. *
  2071. * Driver allocates a circular buffer of Receive Buffer Descriptors (RBDs),
  2072. * each of which point to Receive Buffers to be filled by the NIC. These get
  2073. * used not only for Rx frames, but for any command response or notification
  2074. * from the NIC. The driver and NIC manage the Rx buffers by means
  2075. * of idxes into the circular buffer.
  2076. *
  2077. * Rx Queue Indexes
  2078. * The host/firmware share two idx registers for managing the Rx buffers.
  2079. *
  2080. * The READ idx maps to the first position that the firmware may be writing
  2081. * to -- the driver can read up to (but not including) this position and get
  2082. * good data.
  2083. * The READ idx is managed by the firmware once the card is enabled.
  2084. *
  2085. * The WRITE idx maps to the last position the driver has read from -- the
  2086. * position preceding WRITE is the last slot the firmware can place a packet.
  2087. *
  2088. * The queue is empty (no good data) if WRITE = READ - 1, and is full if
  2089. * WRITE = READ.
  2090. *
  2091. * During initialization, the host sets up the READ queue position to the first
  2092. * IDX position, and WRITE to the last (READ - 1 wrapped)
  2093. *
  2094. * When the firmware places a packet in a buffer, it will advance the READ idx
  2095. * and fire the RX interrupt. The driver can then query the READ idx and
  2096. * process as many packets as possible, moving the WRITE idx forward as it
  2097. * resets the Rx queue buffers with new memory.
  2098. *
  2099. * The management in the driver is as follows:
  2100. * + A list of pre-allocated SKBs is stored in iwl->rxq->rx_free. When
  2101. * iwl->rxq->free_count drops to or below RX_LOW_WATERMARK, work is scheduled
  2102. * to replenish the iwl->rxq->rx_free.
  2103. * + In il_rx_replenish (scheduled) if 'processed' != 'read' then the
  2104. * iwl->rxq is replenished and the READ IDX is updated (updating the
  2105. * 'processed' and 'read' driver idxes as well)
  2106. * + A received packet is processed and handed to the kernel network stack,
  2107. * detached from the iwl->rxq. The driver 'processed' idx is updated.
  2108. * + The Host/Firmware iwl->rxq is replenished at tasklet time from the rx_free
  2109. * list. If there are no allocated buffers in iwl->rxq->rx_free, the READ
  2110. * IDX is not incremented and iwl->status(RX_STALLED) is set. If there
  2111. * were enough free buffers and RX_STALLED is set it is cleared.
  2112. *
  2113. *
  2114. * Driver sequence:
  2115. *
  2116. * il_rx_queue_alloc() Allocates rx_free
  2117. * il_rx_replenish() Replenishes rx_free list from rx_used, and calls
  2118. * il_rx_queue_restock
  2119. * il_rx_queue_restock() Moves available buffers from rx_free into Rx
  2120. * queue, updates firmware pointers, and updates
  2121. * the WRITE idx. If insufficient rx_free buffers
  2122. * are available, schedules il_rx_replenish
  2123. *
  2124. * -- enable interrupts --
  2125. * ISR - il_rx() Detach il_rx_bufs from pool up to the
  2126. * READ IDX, detaching the SKB from the pool.
  2127. * Moves the packet buffer from queue to rx_used.
  2128. * Calls il_rx_queue_restock to refill any empty
  2129. * slots.
  2130. * ...
  2131. *
  2132. */
  2133. /**
  2134. * il_rx_queue_space - Return number of free slots available in queue.
  2135. */
  2136. int
  2137. il_rx_queue_space(const struct il_rx_queue *q)
  2138. {
  2139. int s = q->read - q->write;
  2140. if (s <= 0)
  2141. s += RX_QUEUE_SIZE;
  2142. /* keep some buffer to not confuse full and empty queue */
  2143. s -= 2;
  2144. if (s < 0)
  2145. s = 0;
  2146. return s;
  2147. }
  2148. EXPORT_SYMBOL(il_rx_queue_space);
  2149. /**
  2150. * il_rx_queue_update_write_ptr - Update the write pointer for the RX queue
  2151. */
  2152. void
  2153. il_rx_queue_update_write_ptr(struct il_priv *il, struct il_rx_queue *q)
  2154. {
  2155. unsigned long flags;
  2156. u32 rx_wrt_ptr_reg = il->hw_params.rx_wrt_ptr_reg;
  2157. u32 reg;
  2158. spin_lock_irqsave(&q->lock, flags);
  2159. if (q->need_update == 0)
  2160. goto exit_unlock;
  2161. /* If power-saving is in use, make sure device is awake */
  2162. if (test_bit(S_POWER_PMI, &il->status)) {
  2163. reg = _il_rd(il, CSR_UCODE_DRV_GP1);
  2164. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  2165. D_INFO("Rx queue requesting wakeup," " GP1 = 0x%x\n",
  2166. reg);
  2167. il_set_bit(il, CSR_GP_CNTRL,
  2168. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  2169. goto exit_unlock;
  2170. }
  2171. q->write_actual = (q->write & ~0x7);
  2172. il_wr(il, rx_wrt_ptr_reg, q->write_actual);
  2173. /* Else device is assumed to be awake */
  2174. } else {
  2175. /* Device expects a multiple of 8 */
  2176. q->write_actual = (q->write & ~0x7);
  2177. il_wr(il, rx_wrt_ptr_reg, q->write_actual);
  2178. }
  2179. q->need_update = 0;
  2180. exit_unlock:
  2181. spin_unlock_irqrestore(&q->lock, flags);
  2182. }
  2183. EXPORT_SYMBOL(il_rx_queue_update_write_ptr);
  2184. int
  2185. il_rx_queue_alloc(struct il_priv *il)
  2186. {
  2187. struct il_rx_queue *rxq = &il->rxq;
  2188. struct device *dev = &il->pci_dev->dev;
  2189. int i;
  2190. spin_lock_init(&rxq->lock);
  2191. INIT_LIST_HEAD(&rxq->rx_free);
  2192. INIT_LIST_HEAD(&rxq->rx_used);
  2193. /* Alloc the circular buffer of Read Buffer Descriptors (RBDs) */
  2194. rxq->bd =
  2195. dma_alloc_coherent(dev, 4 * RX_QUEUE_SIZE, &rxq->bd_dma,
  2196. GFP_KERNEL);
  2197. if (!rxq->bd)
  2198. goto err_bd;
  2199. rxq->rb_stts =
  2200. dma_alloc_coherent(dev, sizeof(struct il_rb_status),
  2201. &rxq->rb_stts_dma, GFP_KERNEL);
  2202. if (!rxq->rb_stts)
  2203. goto err_rb;
  2204. /* Fill the rx_used queue with _all_ of the Rx buffers */
  2205. for (i = 0; i < RX_FREE_BUFFERS + RX_QUEUE_SIZE; i++)
  2206. list_add_tail(&rxq->pool[i].list, &rxq->rx_used);
  2207. /* Set us so that we have processed and used all buffers, but have
  2208. * not restocked the Rx queue with fresh buffers */
  2209. rxq->read = rxq->write = 0;
  2210. rxq->write_actual = 0;
  2211. rxq->free_count = 0;
  2212. rxq->need_update = 0;
  2213. return 0;
  2214. err_rb:
  2215. dma_free_coherent(&il->pci_dev->dev, 4 * RX_QUEUE_SIZE, rxq->bd,
  2216. rxq->bd_dma);
  2217. err_bd:
  2218. return -ENOMEM;
  2219. }
  2220. EXPORT_SYMBOL(il_rx_queue_alloc);
  2221. void
  2222. il_hdl_spectrum_measurement(struct il_priv *il, struct il_rx_buf *rxb)
  2223. {
  2224. struct il_rx_pkt *pkt = rxb_addr(rxb);
  2225. struct il_spectrum_notification *report = &(pkt->u.spectrum_notif);
  2226. if (!report->state) {
  2227. D_11H("Spectrum Measure Notification: Start\n");
  2228. return;
  2229. }
  2230. memcpy(&il->measure_report, report, sizeof(*report));
  2231. il->measurement_status |= MEASUREMENT_READY;
  2232. }
  2233. EXPORT_SYMBOL(il_hdl_spectrum_measurement);
  2234. /*
  2235. * returns non-zero if packet should be dropped
  2236. */
  2237. int
  2238. il_set_decrypted_flag(struct il_priv *il, struct ieee80211_hdr *hdr,
  2239. u32 decrypt_res, struct ieee80211_rx_status *stats)
  2240. {
  2241. u16 fc = le16_to_cpu(hdr->frame_control);
  2242. /*
  2243. * All contexts have the same setting here due to it being
  2244. * a module parameter, so OK to check any context.
  2245. */
  2246. if (il->active.filter_flags & RXON_FILTER_DIS_DECRYPT_MSK)
  2247. return 0;
  2248. if (!(fc & IEEE80211_FCTL_PROTECTED))
  2249. return 0;
  2250. D_RX("decrypt_res:0x%x\n", decrypt_res);
  2251. switch (decrypt_res & RX_RES_STATUS_SEC_TYPE_MSK) {
  2252. case RX_RES_STATUS_SEC_TYPE_TKIP:
  2253. /* The uCode has got a bad phase 1 Key, pushes the packet.
  2254. * Decryption will be done in SW. */
  2255. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2256. RX_RES_STATUS_BAD_KEY_TTAK)
  2257. break;
  2258. case RX_RES_STATUS_SEC_TYPE_WEP:
  2259. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2260. RX_RES_STATUS_BAD_ICV_MIC) {
  2261. /* bad ICV, the packet is destroyed since the
  2262. * decryption is inplace, drop it */
  2263. D_RX("Packet destroyed\n");
  2264. return -1;
  2265. }
  2266. case RX_RES_STATUS_SEC_TYPE_CCMP:
  2267. if ((decrypt_res & RX_RES_STATUS_DECRYPT_TYPE_MSK) ==
  2268. RX_RES_STATUS_DECRYPT_OK) {
  2269. D_RX("hw decrypt successfully!!!\n");
  2270. stats->flag |= RX_FLAG_DECRYPTED;
  2271. }
  2272. break;
  2273. default:
  2274. break;
  2275. }
  2276. return 0;
  2277. }
  2278. EXPORT_SYMBOL(il_set_decrypted_flag);
  2279. /**
  2280. * il_txq_update_write_ptr - Send new write idx to hardware
  2281. */
  2282. void
  2283. il_txq_update_write_ptr(struct il_priv *il, struct il_tx_queue *txq)
  2284. {
  2285. u32 reg = 0;
  2286. int txq_id = txq->q.id;
  2287. if (txq->need_update == 0)
  2288. return;
  2289. /* if we're trying to save power */
  2290. if (test_bit(S_POWER_PMI, &il->status)) {
  2291. /* wake up nic if it's powered down ...
  2292. * uCode will wake up, and interrupt us again, so next
  2293. * time we'll skip this part. */
  2294. reg = _il_rd(il, CSR_UCODE_DRV_GP1);
  2295. if (reg & CSR_UCODE_DRV_GP1_BIT_MAC_SLEEP) {
  2296. D_INFO("Tx queue %d requesting wakeup," " GP1 = 0x%x\n",
  2297. txq_id, reg);
  2298. il_set_bit(il, CSR_GP_CNTRL,
  2299. CSR_GP_CNTRL_REG_FLAG_MAC_ACCESS_REQ);
  2300. return;
  2301. }
  2302. il_wr(il, HBUS_TARG_WRPTR, txq->q.write_ptr | (txq_id << 8));
  2303. /*
  2304. * else not in power-save mode,
  2305. * uCode will never sleep when we're
  2306. * trying to tx (during RFKILL, we're not trying to tx).
  2307. */
  2308. } else
  2309. _il_wr(il, HBUS_TARG_WRPTR, txq->q.write_ptr | (txq_id << 8));
  2310. txq->need_update = 0;
  2311. }
  2312. EXPORT_SYMBOL(il_txq_update_write_ptr);
  2313. /**
  2314. * il_tx_queue_unmap - Unmap any remaining DMA mappings and free skb's
  2315. */
  2316. void
  2317. il_tx_queue_unmap(struct il_priv *il, int txq_id)
  2318. {
  2319. struct il_tx_queue *txq = &il->txq[txq_id];
  2320. struct il_queue *q = &txq->q;
  2321. if (q->n_bd == 0)
  2322. return;
  2323. while (q->write_ptr != q->read_ptr) {
  2324. il->cfg->ops->lib->txq_free_tfd(il, txq);
  2325. q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd);
  2326. }
  2327. }
  2328. EXPORT_SYMBOL(il_tx_queue_unmap);
  2329. /**
  2330. * il_tx_queue_free - Deallocate DMA queue.
  2331. * @txq: Transmit queue to deallocate.
  2332. *
  2333. * Empty queue by removing and destroying all BD's.
  2334. * Free all buffers.
  2335. * 0-fill, but do not free "txq" descriptor structure.
  2336. */
  2337. void
  2338. il_tx_queue_free(struct il_priv *il, int txq_id)
  2339. {
  2340. struct il_tx_queue *txq = &il->txq[txq_id];
  2341. struct device *dev = &il->pci_dev->dev;
  2342. int i;
  2343. il_tx_queue_unmap(il, txq_id);
  2344. /* De-alloc array of command/tx buffers */
  2345. for (i = 0; i < TFD_TX_CMD_SLOTS; i++)
  2346. kfree(txq->cmd[i]);
  2347. /* De-alloc circular buffer of TFDs */
  2348. if (txq->q.n_bd)
  2349. dma_free_coherent(dev, il->hw_params.tfd_size * txq->q.n_bd,
  2350. txq->tfds, txq->q.dma_addr);
  2351. /* De-alloc array of per-TFD driver data */
  2352. kfree(txq->txb);
  2353. txq->txb = NULL;
  2354. /* deallocate arrays */
  2355. kfree(txq->cmd);
  2356. kfree(txq->meta);
  2357. txq->cmd = NULL;
  2358. txq->meta = NULL;
  2359. /* 0-fill queue descriptor structure */
  2360. memset(txq, 0, sizeof(*txq));
  2361. }
  2362. EXPORT_SYMBOL(il_tx_queue_free);
  2363. /**
  2364. * il_cmd_queue_unmap - Unmap any remaining DMA mappings from command queue
  2365. */
  2366. void
  2367. il_cmd_queue_unmap(struct il_priv *il)
  2368. {
  2369. struct il_tx_queue *txq = &il->txq[il->cmd_queue];
  2370. struct il_queue *q = &txq->q;
  2371. int i;
  2372. if (q->n_bd == 0)
  2373. return;
  2374. while (q->read_ptr != q->write_ptr) {
  2375. i = il_get_cmd_idx(q, q->read_ptr, 0);
  2376. if (txq->meta[i].flags & CMD_MAPPED) {
  2377. pci_unmap_single(il->pci_dev,
  2378. dma_unmap_addr(&txq->meta[i], mapping),
  2379. dma_unmap_len(&txq->meta[i], len),
  2380. PCI_DMA_BIDIRECTIONAL);
  2381. txq->meta[i].flags = 0;
  2382. }
  2383. q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd);
  2384. }
  2385. i = q->n_win;
  2386. if (txq->meta[i].flags & CMD_MAPPED) {
  2387. pci_unmap_single(il->pci_dev,
  2388. dma_unmap_addr(&txq->meta[i], mapping),
  2389. dma_unmap_len(&txq->meta[i], len),
  2390. PCI_DMA_BIDIRECTIONAL);
  2391. txq->meta[i].flags = 0;
  2392. }
  2393. }
  2394. EXPORT_SYMBOL(il_cmd_queue_unmap);
  2395. /**
  2396. * il_cmd_queue_free - Deallocate DMA queue.
  2397. * @txq: Transmit queue to deallocate.
  2398. *
  2399. * Empty queue by removing and destroying all BD's.
  2400. * Free all buffers.
  2401. * 0-fill, but do not free "txq" descriptor structure.
  2402. */
  2403. void
  2404. il_cmd_queue_free(struct il_priv *il)
  2405. {
  2406. struct il_tx_queue *txq = &il->txq[il->cmd_queue];
  2407. struct device *dev = &il->pci_dev->dev;
  2408. int i;
  2409. il_cmd_queue_unmap(il);
  2410. /* De-alloc array of command/tx buffers */
  2411. for (i = 0; i <= TFD_CMD_SLOTS; i++)
  2412. kfree(txq->cmd[i]);
  2413. /* De-alloc circular buffer of TFDs */
  2414. if (txq->q.n_bd)
  2415. dma_free_coherent(dev, il->hw_params.tfd_size * txq->q.n_bd,
  2416. txq->tfds, txq->q.dma_addr);
  2417. /* deallocate arrays */
  2418. kfree(txq->cmd);
  2419. kfree(txq->meta);
  2420. txq->cmd = NULL;
  2421. txq->meta = NULL;
  2422. /* 0-fill queue descriptor structure */
  2423. memset(txq, 0, sizeof(*txq));
  2424. }
  2425. EXPORT_SYMBOL(il_cmd_queue_free);
  2426. /*************** DMA-QUEUE-GENERAL-FUNCTIONS *****
  2427. * DMA services
  2428. *
  2429. * Theory of operation
  2430. *
  2431. * A Tx or Rx queue resides in host DRAM, and is comprised of a circular buffer
  2432. * of buffer descriptors, each of which points to one or more data buffers for
  2433. * the device to read from or fill. Driver and device exchange status of each
  2434. * queue via "read" and "write" pointers. Driver keeps minimum of 2 empty
  2435. * entries in each circular buffer, to protect against confusing empty and full
  2436. * queue states.
  2437. *
  2438. * The device reads or writes the data in the queues via the device's several
  2439. * DMA/FIFO channels. Each queue is mapped to a single DMA channel.
  2440. *
  2441. * For Tx queue, there are low mark and high mark limits. If, after queuing
  2442. * the packet for Tx, free space become < low mark, Tx queue stopped. When
  2443. * reclaiming packets (on 'tx done IRQ), if free space become > high mark,
  2444. * Tx queue resumed.
  2445. *
  2446. * See more detailed info in 4965.h.
  2447. ***************************************************/
  2448. int
  2449. il_queue_space(const struct il_queue *q)
  2450. {
  2451. int s = q->read_ptr - q->write_ptr;
  2452. if (q->read_ptr > q->write_ptr)
  2453. s -= q->n_bd;
  2454. if (s <= 0)
  2455. s += q->n_win;
  2456. /* keep some reserve to not confuse empty and full situations */
  2457. s -= 2;
  2458. if (s < 0)
  2459. s = 0;
  2460. return s;
  2461. }
  2462. EXPORT_SYMBOL(il_queue_space);
  2463. /**
  2464. * il_queue_init - Initialize queue's high/low-water and read/write idxes
  2465. */
  2466. static int
  2467. il_queue_init(struct il_priv *il, struct il_queue *q, int count, int slots_num,
  2468. u32 id)
  2469. {
  2470. q->n_bd = count;
  2471. q->n_win = slots_num;
  2472. q->id = id;
  2473. /* count must be power-of-two size, otherwise il_queue_inc_wrap
  2474. * and il_queue_dec_wrap are broken. */
  2475. BUG_ON(!is_power_of_2(count));
  2476. /* slots_num must be power-of-two size, otherwise
  2477. * il_get_cmd_idx is broken. */
  2478. BUG_ON(!is_power_of_2(slots_num));
  2479. q->low_mark = q->n_win / 4;
  2480. if (q->low_mark < 4)
  2481. q->low_mark = 4;
  2482. q->high_mark = q->n_win / 8;
  2483. if (q->high_mark < 2)
  2484. q->high_mark = 2;
  2485. q->write_ptr = q->read_ptr = 0;
  2486. return 0;
  2487. }
  2488. /**
  2489. * il_tx_queue_alloc - Alloc driver data and TFD CB for one Tx/cmd queue
  2490. */
  2491. static int
  2492. il_tx_queue_alloc(struct il_priv *il, struct il_tx_queue *txq, u32 id)
  2493. {
  2494. struct device *dev = &il->pci_dev->dev;
  2495. size_t tfd_sz = il->hw_params.tfd_size * TFD_QUEUE_SIZE_MAX;
  2496. /* Driver ilate data, only for Tx (not command) queues,
  2497. * not shared with device. */
  2498. if (id != il->cmd_queue) {
  2499. txq->txb = kcalloc(TFD_QUEUE_SIZE_MAX, sizeof(txq->txb[0]),
  2500. GFP_KERNEL);
  2501. if (!txq->txb) {
  2502. IL_ERR("kmalloc for auxiliary BD "
  2503. "structures failed\n");
  2504. goto error;
  2505. }
  2506. } else {
  2507. txq->txb = NULL;
  2508. }
  2509. /* Circular buffer of transmit frame descriptors (TFDs),
  2510. * shared with device */
  2511. txq->tfds =
  2512. dma_alloc_coherent(dev, tfd_sz, &txq->q.dma_addr, GFP_KERNEL);
  2513. if (!txq->tfds) {
  2514. IL_ERR("pci_alloc_consistent(%zd) failed\n", tfd_sz);
  2515. goto error;
  2516. }
  2517. txq->q.id = id;
  2518. return 0;
  2519. error:
  2520. kfree(txq->txb);
  2521. txq->txb = NULL;
  2522. return -ENOMEM;
  2523. }
  2524. /**
  2525. * il_tx_queue_init - Allocate and initialize one tx/cmd queue
  2526. */
  2527. int
  2528. il_tx_queue_init(struct il_priv *il, struct il_tx_queue *txq, int slots_num,
  2529. u32 txq_id)
  2530. {
  2531. int i, len;
  2532. int ret;
  2533. int actual_slots = slots_num;
  2534. /*
  2535. * Alloc buffer array for commands (Tx or other types of commands).
  2536. * For the command queue (#4/#9), allocate command space + one big
  2537. * command for scan, since scan command is very huge; the system will
  2538. * not have two scans at the same time, so only one is needed.
  2539. * For normal Tx queues (all other queues), no super-size command
  2540. * space is needed.
  2541. */
  2542. if (txq_id == il->cmd_queue)
  2543. actual_slots++;
  2544. txq->meta =
  2545. kzalloc(sizeof(struct il_cmd_meta) * actual_slots, GFP_KERNEL);
  2546. txq->cmd =
  2547. kzalloc(sizeof(struct il_device_cmd *) * actual_slots, GFP_KERNEL);
  2548. if (!txq->meta || !txq->cmd)
  2549. goto out_free_arrays;
  2550. len = sizeof(struct il_device_cmd);
  2551. for (i = 0; i < actual_slots; i++) {
  2552. /* only happens for cmd queue */
  2553. if (i == slots_num)
  2554. len = IL_MAX_CMD_SIZE;
  2555. txq->cmd[i] = kmalloc(len, GFP_KERNEL);
  2556. if (!txq->cmd[i])
  2557. goto err;
  2558. }
  2559. /* Alloc driver data array and TFD circular buffer */
  2560. ret = il_tx_queue_alloc(il, txq, txq_id);
  2561. if (ret)
  2562. goto err;
  2563. txq->need_update = 0;
  2564. /*
  2565. * For the default queues 0-3, set up the swq_id
  2566. * already -- all others need to get one later
  2567. * (if they need one at all).
  2568. */
  2569. if (txq_id < 4)
  2570. il_set_swq_id(txq, txq_id, txq_id);
  2571. /* TFD_QUEUE_SIZE_MAX must be power-of-two size, otherwise
  2572. * il_queue_inc_wrap and il_queue_dec_wrap are broken. */
  2573. BUILD_BUG_ON(TFD_QUEUE_SIZE_MAX & (TFD_QUEUE_SIZE_MAX - 1));
  2574. /* Initialize queue's high/low-water marks, and head/tail idxes */
  2575. il_queue_init(il, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  2576. /* Tell device where to find queue */
  2577. il->cfg->ops->lib->txq_init(il, txq);
  2578. return 0;
  2579. err:
  2580. for (i = 0; i < actual_slots; i++)
  2581. kfree(txq->cmd[i]);
  2582. out_free_arrays:
  2583. kfree(txq->meta);
  2584. kfree(txq->cmd);
  2585. return -ENOMEM;
  2586. }
  2587. EXPORT_SYMBOL(il_tx_queue_init);
  2588. void
  2589. il_tx_queue_reset(struct il_priv *il, struct il_tx_queue *txq, int slots_num,
  2590. u32 txq_id)
  2591. {
  2592. int actual_slots = slots_num;
  2593. if (txq_id == il->cmd_queue)
  2594. actual_slots++;
  2595. memset(txq->meta, 0, sizeof(struct il_cmd_meta) * actual_slots);
  2596. txq->need_update = 0;
  2597. /* Initialize queue's high/low-water marks, and head/tail idxes */
  2598. il_queue_init(il, &txq->q, TFD_QUEUE_SIZE_MAX, slots_num, txq_id);
  2599. /* Tell device where to find queue */
  2600. il->cfg->ops->lib->txq_init(il, txq);
  2601. }
  2602. EXPORT_SYMBOL(il_tx_queue_reset);
  2603. /*************** HOST COMMAND QUEUE FUNCTIONS *****/
  2604. /**
  2605. * il_enqueue_hcmd - enqueue a uCode command
  2606. * @il: device ilate data point
  2607. * @cmd: a point to the ucode command structure
  2608. *
  2609. * The function returns < 0 values to indicate the operation is
  2610. * failed. On success, it turns the idx (> 0) of command in the
  2611. * command queue.
  2612. */
  2613. int
  2614. il_enqueue_hcmd(struct il_priv *il, struct il_host_cmd *cmd)
  2615. {
  2616. struct il_tx_queue *txq = &il->txq[il->cmd_queue];
  2617. struct il_queue *q = &txq->q;
  2618. struct il_device_cmd *out_cmd;
  2619. struct il_cmd_meta *out_meta;
  2620. dma_addr_t phys_addr;
  2621. unsigned long flags;
  2622. int len;
  2623. u32 idx;
  2624. u16 fix_size;
  2625. cmd->len = il->cfg->ops->utils->get_hcmd_size(cmd->id, cmd->len);
  2626. fix_size = (u16) (cmd->len + sizeof(out_cmd->hdr));
  2627. /* If any of the command structures end up being larger than
  2628. * the TFD_MAX_PAYLOAD_SIZE, and it sent as a 'small' command then
  2629. * we will need to increase the size of the TFD entries
  2630. * Also, check to see if command buffer should not exceed the size
  2631. * of device_cmd and max_cmd_size. */
  2632. BUG_ON((fix_size > TFD_MAX_PAYLOAD_SIZE) &&
  2633. !(cmd->flags & CMD_SIZE_HUGE));
  2634. BUG_ON(fix_size > IL_MAX_CMD_SIZE);
  2635. if (il_is_rfkill(il) || il_is_ctkill(il)) {
  2636. IL_WARN("Not sending command - %s KILL\n",
  2637. il_is_rfkill(il) ? "RF" : "CT");
  2638. return -EIO;
  2639. }
  2640. spin_lock_irqsave(&il->hcmd_lock, flags);
  2641. if (il_queue_space(q) < ((cmd->flags & CMD_ASYNC) ? 2 : 1)) {
  2642. spin_unlock_irqrestore(&il->hcmd_lock, flags);
  2643. IL_ERR("Restarting adapter due to command queue full\n");
  2644. queue_work(il->workqueue, &il->restart);
  2645. return -ENOSPC;
  2646. }
  2647. idx = il_get_cmd_idx(q, q->write_ptr, cmd->flags & CMD_SIZE_HUGE);
  2648. out_cmd = txq->cmd[idx];
  2649. out_meta = &txq->meta[idx];
  2650. if (WARN_ON(out_meta->flags & CMD_MAPPED)) {
  2651. spin_unlock_irqrestore(&il->hcmd_lock, flags);
  2652. return -ENOSPC;
  2653. }
  2654. memset(out_meta, 0, sizeof(*out_meta)); /* re-initialize to NULL */
  2655. out_meta->flags = cmd->flags | CMD_MAPPED;
  2656. if (cmd->flags & CMD_WANT_SKB)
  2657. out_meta->source = cmd;
  2658. if (cmd->flags & CMD_ASYNC)
  2659. out_meta->callback = cmd->callback;
  2660. out_cmd->hdr.cmd = cmd->id;
  2661. memcpy(&out_cmd->cmd.payload, cmd->data, cmd->len);
  2662. /* At this point, the out_cmd now has all of the incoming cmd
  2663. * information */
  2664. out_cmd->hdr.flags = 0;
  2665. out_cmd->hdr.sequence =
  2666. cpu_to_le16(QUEUE_TO_SEQ(il->cmd_queue) | IDX_TO_SEQ(q->write_ptr));
  2667. if (cmd->flags & CMD_SIZE_HUGE)
  2668. out_cmd->hdr.sequence |= SEQ_HUGE_FRAME;
  2669. len = sizeof(struct il_device_cmd);
  2670. if (idx == TFD_CMD_SLOTS)
  2671. len = IL_MAX_CMD_SIZE;
  2672. #ifdef CONFIG_IWLEGACY_DEBUG
  2673. switch (out_cmd->hdr.cmd) {
  2674. case C_TX_LINK_QUALITY_CMD:
  2675. case C_SENSITIVITY:
  2676. D_HC_DUMP("Sending command %s (#%x), seq: 0x%04X, "
  2677. "%d bytes at %d[%d]:%d\n",
  2678. il_get_cmd_string(out_cmd->hdr.cmd), out_cmd->hdr.cmd,
  2679. le16_to_cpu(out_cmd->hdr.sequence), fix_size,
  2680. q->write_ptr, idx, il->cmd_queue);
  2681. break;
  2682. default:
  2683. D_HC("Sending command %s (#%x), seq: 0x%04X, "
  2684. "%d bytes at %d[%d]:%d\n",
  2685. il_get_cmd_string(out_cmd->hdr.cmd), out_cmd->hdr.cmd,
  2686. le16_to_cpu(out_cmd->hdr.sequence), fix_size, q->write_ptr,
  2687. idx, il->cmd_queue);
  2688. }
  2689. #endif
  2690. txq->need_update = 1;
  2691. if (il->cfg->ops->lib->txq_update_byte_cnt_tbl)
  2692. /* Set up entry in queue's byte count circular buffer */
  2693. il->cfg->ops->lib->txq_update_byte_cnt_tbl(il, txq, 0);
  2694. phys_addr =
  2695. pci_map_single(il->pci_dev, &out_cmd->hdr, fix_size,
  2696. PCI_DMA_BIDIRECTIONAL);
  2697. dma_unmap_addr_set(out_meta, mapping, phys_addr);
  2698. dma_unmap_len_set(out_meta, len, fix_size);
  2699. il->cfg->ops->lib->txq_attach_buf_to_tfd(il, txq, phys_addr, fix_size,
  2700. 1, U32_PAD(cmd->len));
  2701. /* Increment and update queue's write idx */
  2702. q->write_ptr = il_queue_inc_wrap(q->write_ptr, q->n_bd);
  2703. il_txq_update_write_ptr(il, txq);
  2704. spin_unlock_irqrestore(&il->hcmd_lock, flags);
  2705. return idx;
  2706. }
  2707. /**
  2708. * il_hcmd_queue_reclaim - Reclaim TX command queue entries already Tx'd
  2709. *
  2710. * When FW advances 'R' idx, all entries between old and new 'R' idx
  2711. * need to be reclaimed. As result, some free space forms. If there is
  2712. * enough free space (> low mark), wake the stack that feeds us.
  2713. */
  2714. static void
  2715. il_hcmd_queue_reclaim(struct il_priv *il, int txq_id, int idx, int cmd_idx)
  2716. {
  2717. struct il_tx_queue *txq = &il->txq[txq_id];
  2718. struct il_queue *q = &txq->q;
  2719. int nfreed = 0;
  2720. if (idx >= q->n_bd || il_queue_used(q, idx) == 0) {
  2721. IL_ERR("Read idx for DMA queue txq id (%d), idx %d, "
  2722. "is out of range [0-%d] %d %d.\n", txq_id, idx, q->n_bd,
  2723. q->write_ptr, q->read_ptr);
  2724. return;
  2725. }
  2726. for (idx = il_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx;
  2727. q->read_ptr = il_queue_inc_wrap(q->read_ptr, q->n_bd)) {
  2728. if (nfreed++ > 0) {
  2729. IL_ERR("HCMD skipped: idx (%d) %d %d\n", idx,
  2730. q->write_ptr, q->read_ptr);
  2731. queue_work(il->workqueue, &il->restart);
  2732. }
  2733. }
  2734. }
  2735. /**
  2736. * il_tx_cmd_complete - Pull unused buffers off the queue and reclaim them
  2737. * @rxb: Rx buffer to reclaim
  2738. *
  2739. * If an Rx buffer has an async callback associated with it the callback
  2740. * will be executed. The attached skb (if present) will only be freed
  2741. * if the callback returns 1
  2742. */
  2743. void
  2744. il_tx_cmd_complete(struct il_priv *il, struct il_rx_buf *rxb)
  2745. {
  2746. struct il_rx_pkt *pkt = rxb_addr(rxb);
  2747. u16 sequence = le16_to_cpu(pkt->hdr.sequence);
  2748. int txq_id = SEQ_TO_QUEUE(sequence);
  2749. int idx = SEQ_TO_IDX(sequence);
  2750. int cmd_idx;
  2751. bool huge = !!(pkt->hdr.sequence & SEQ_HUGE_FRAME);
  2752. struct il_device_cmd *cmd;
  2753. struct il_cmd_meta *meta;
  2754. struct il_tx_queue *txq = &il->txq[il->cmd_queue];
  2755. unsigned long flags;
  2756. /* If a Tx command is being handled and it isn't in the actual
  2757. * command queue then there a command routing bug has been introduced
  2758. * in the queue management code. */
  2759. if (WARN
  2760. (txq_id != il->cmd_queue,
  2761. "wrong command queue %d (should be %d), sequence 0x%X readp=%d writep=%d\n",
  2762. txq_id, il->cmd_queue, sequence, il->txq[il->cmd_queue].q.read_ptr,
  2763. il->txq[il->cmd_queue].q.write_ptr)) {
  2764. il_print_hex_error(il, pkt, 32);
  2765. return;
  2766. }
  2767. cmd_idx = il_get_cmd_idx(&txq->q, idx, huge);
  2768. cmd = txq->cmd[cmd_idx];
  2769. meta = &txq->meta[cmd_idx];
  2770. txq->time_stamp = jiffies;
  2771. pci_unmap_single(il->pci_dev, dma_unmap_addr(meta, mapping),
  2772. dma_unmap_len(meta, len), PCI_DMA_BIDIRECTIONAL);
  2773. /* Input error checking is done when commands are added to queue. */
  2774. if (meta->flags & CMD_WANT_SKB) {
  2775. meta->source->reply_page = (unsigned long)rxb_addr(rxb);
  2776. rxb->page = NULL;
  2777. } else if (meta->callback)
  2778. meta->callback(il, cmd, pkt);
  2779. spin_lock_irqsave(&il->hcmd_lock, flags);
  2780. il_hcmd_queue_reclaim(il, txq_id, idx, cmd_idx);
  2781. if (!(meta->flags & CMD_ASYNC)) {
  2782. clear_bit(S_HCMD_ACTIVE, &il->status);
  2783. D_INFO("Clearing HCMD_ACTIVE for command %s\n",
  2784. il_get_cmd_string(cmd->hdr.cmd));
  2785. wake_up(&il->wait_command_queue);
  2786. }
  2787. /* Mark as unmapped */
  2788. meta->flags = 0;
  2789. spin_unlock_irqrestore(&il->hcmd_lock, flags);
  2790. }
  2791. EXPORT_SYMBOL(il_tx_cmd_complete);
  2792. MODULE_DESCRIPTION("iwl-legacy: common functions for 3945 and 4965");
  2793. MODULE_VERSION(IWLWIFI_VERSION);
  2794. MODULE_AUTHOR(DRV_COPYRIGHT " " DRV_AUTHOR);
  2795. MODULE_LICENSE("GPL");
  2796. /*
  2797. * set bt_coex_active to true, uCode will do kill/defer
  2798. * every time the priority line is asserted (BT is sending signals on the
  2799. * priority line in the PCIx).
  2800. * set bt_coex_active to false, uCode will ignore the BT activity and
  2801. * perform the normal operation
  2802. *
  2803. * User might experience transmit issue on some platform due to WiFi/BT
  2804. * co-exist problem. The possible behaviors are:
  2805. * Able to scan and finding all the available AP
  2806. * Not able to associate with any AP
  2807. * On those platforms, WiFi communication can be restored by set
  2808. * "bt_coex_active" module parameter to "false"
  2809. *
  2810. * default: bt_coex_active = true (BT_COEX_ENABLE)
  2811. */
  2812. static bool bt_coex_active = true;
  2813. module_param(bt_coex_active, bool, S_IRUGO);
  2814. MODULE_PARM_DESC(bt_coex_active, "enable wifi/bluetooth co-exist");
  2815. u32 il_debug_level;
  2816. EXPORT_SYMBOL(il_debug_level);
  2817. const u8 il_bcast_addr[ETH_ALEN] = { 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF };
  2818. EXPORT_SYMBOL(il_bcast_addr);
  2819. /* This function both allocates and initializes hw and il. */
  2820. struct ieee80211_hw *
  2821. il_alloc_all(struct il_cfg *cfg)
  2822. {
  2823. struct il_priv *il;
  2824. /* mac80211 allocates memory for this device instance, including
  2825. * space for this driver's ilate structure */
  2826. struct ieee80211_hw *hw;
  2827. hw = ieee80211_alloc_hw(sizeof(struct il_priv),
  2828. cfg->ops->ieee80211_ops);
  2829. if (hw == NULL) {
  2830. pr_err("%s: Can not allocate network device\n", cfg->name);
  2831. goto out;
  2832. }
  2833. il = hw->priv;
  2834. il->hw = hw;
  2835. out:
  2836. return hw;
  2837. }
  2838. EXPORT_SYMBOL(il_alloc_all);
  2839. #define MAX_BIT_RATE_40_MHZ 150 /* Mbps */
  2840. #define MAX_BIT_RATE_20_MHZ 72 /* Mbps */
  2841. static void
  2842. il_init_ht_hw_capab(const struct il_priv *il,
  2843. struct ieee80211_sta_ht_cap *ht_info,
  2844. enum ieee80211_band band)
  2845. {
  2846. u16 max_bit_rate = 0;
  2847. u8 rx_chains_num = il->hw_params.rx_chains_num;
  2848. u8 tx_chains_num = il->hw_params.tx_chains_num;
  2849. ht_info->cap = 0;
  2850. memset(&ht_info->mcs, 0, sizeof(ht_info->mcs));
  2851. ht_info->ht_supported = true;
  2852. ht_info->cap |= IEEE80211_HT_CAP_SGI_20;
  2853. max_bit_rate = MAX_BIT_RATE_20_MHZ;
  2854. if (il->hw_params.ht40_channel & BIT(band)) {
  2855. ht_info->cap |= IEEE80211_HT_CAP_SUP_WIDTH_20_40;
  2856. ht_info->cap |= IEEE80211_HT_CAP_SGI_40;
  2857. ht_info->mcs.rx_mask[4] = 0x01;
  2858. max_bit_rate = MAX_BIT_RATE_40_MHZ;
  2859. }
  2860. if (il->cfg->mod_params->amsdu_size_8K)
  2861. ht_info->cap |= IEEE80211_HT_CAP_MAX_AMSDU;
  2862. ht_info->ampdu_factor = CFG_HT_RX_AMPDU_FACTOR_DEF;
  2863. ht_info->ampdu_density = CFG_HT_MPDU_DENSITY_DEF;
  2864. ht_info->mcs.rx_mask[0] = 0xFF;
  2865. if (rx_chains_num >= 2)
  2866. ht_info->mcs.rx_mask[1] = 0xFF;
  2867. if (rx_chains_num >= 3)
  2868. ht_info->mcs.rx_mask[2] = 0xFF;
  2869. /* Highest supported Rx data rate */
  2870. max_bit_rate *= rx_chains_num;
  2871. WARN_ON(max_bit_rate & ~IEEE80211_HT_MCS_RX_HIGHEST_MASK);
  2872. ht_info->mcs.rx_highest = cpu_to_le16(max_bit_rate);
  2873. /* Tx MCS capabilities */
  2874. ht_info->mcs.tx_params = IEEE80211_HT_MCS_TX_DEFINED;
  2875. if (tx_chains_num != rx_chains_num) {
  2876. ht_info->mcs.tx_params |= IEEE80211_HT_MCS_TX_RX_DIFF;
  2877. ht_info->mcs.tx_params |=
  2878. ((tx_chains_num -
  2879. 1) << IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT);
  2880. }
  2881. }
  2882. /**
  2883. * il_init_geos - Initialize mac80211's geo/channel info based from eeprom
  2884. */
  2885. int
  2886. il_init_geos(struct il_priv *il)
  2887. {
  2888. struct il_channel_info *ch;
  2889. struct ieee80211_supported_band *sband;
  2890. struct ieee80211_channel *channels;
  2891. struct ieee80211_channel *geo_ch;
  2892. struct ieee80211_rate *rates;
  2893. int i = 0;
  2894. s8 max_tx_power = 0;
  2895. if (il->bands[IEEE80211_BAND_2GHZ].n_bitrates ||
  2896. il->bands[IEEE80211_BAND_5GHZ].n_bitrates) {
  2897. D_INFO("Geography modes already initialized.\n");
  2898. set_bit(S_GEO_CONFIGURED, &il->status);
  2899. return 0;
  2900. }
  2901. channels =
  2902. kzalloc(sizeof(struct ieee80211_channel) * il->channel_count,
  2903. GFP_KERNEL);
  2904. if (!channels)
  2905. return -ENOMEM;
  2906. rates =
  2907. kzalloc((sizeof(struct ieee80211_rate) * RATE_COUNT_LEGACY),
  2908. GFP_KERNEL);
  2909. if (!rates) {
  2910. kfree(channels);
  2911. return -ENOMEM;
  2912. }
  2913. /* 5.2GHz channels start after the 2.4GHz channels */
  2914. sband = &il->bands[IEEE80211_BAND_5GHZ];
  2915. sband->channels = &channels[ARRAY_SIZE(il_eeprom_band_1)];
  2916. /* just OFDM */
  2917. sband->bitrates = &rates[IL_FIRST_OFDM_RATE];
  2918. sband->n_bitrates = RATE_COUNT_LEGACY - IL_FIRST_OFDM_RATE;
  2919. if (il->cfg->sku & IL_SKU_N)
  2920. il_init_ht_hw_capab(il, &sband->ht_cap, IEEE80211_BAND_5GHZ);
  2921. sband = &il->bands[IEEE80211_BAND_2GHZ];
  2922. sband->channels = channels;
  2923. /* OFDM & CCK */
  2924. sband->bitrates = rates;
  2925. sband->n_bitrates = RATE_COUNT_LEGACY;
  2926. if (il->cfg->sku & IL_SKU_N)
  2927. il_init_ht_hw_capab(il, &sband->ht_cap, IEEE80211_BAND_2GHZ);
  2928. il->ieee_channels = channels;
  2929. il->ieee_rates = rates;
  2930. for (i = 0; i < il->channel_count; i++) {
  2931. ch = &il->channel_info[i];
  2932. if (!il_is_channel_valid(ch))
  2933. continue;
  2934. sband = &il->bands[ch->band];
  2935. geo_ch = &sband->channels[sband->n_channels++];
  2936. geo_ch->center_freq =
  2937. ieee80211_channel_to_frequency(ch->channel, ch->band);
  2938. geo_ch->max_power = ch->max_power_avg;
  2939. geo_ch->max_antenna_gain = 0xff;
  2940. geo_ch->hw_value = ch->channel;
  2941. if (il_is_channel_valid(ch)) {
  2942. if (!(ch->flags & EEPROM_CHANNEL_IBSS))
  2943. geo_ch->flags |= IEEE80211_CHAN_NO_IBSS;
  2944. if (!(ch->flags & EEPROM_CHANNEL_ACTIVE))
  2945. geo_ch->flags |= IEEE80211_CHAN_PASSIVE_SCAN;
  2946. if (ch->flags & EEPROM_CHANNEL_RADAR)
  2947. geo_ch->flags |= IEEE80211_CHAN_RADAR;
  2948. geo_ch->flags |= ch->ht40_extension_channel;
  2949. if (ch->max_power_avg > max_tx_power)
  2950. max_tx_power = ch->max_power_avg;
  2951. } else {
  2952. geo_ch->flags |= IEEE80211_CHAN_DISABLED;
  2953. }
  2954. D_INFO("Channel %d Freq=%d[%sGHz] %s flag=0x%X\n", ch->channel,
  2955. geo_ch->center_freq,
  2956. il_is_channel_a_band(ch) ? "5.2" : "2.4",
  2957. geo_ch->
  2958. flags & IEEE80211_CHAN_DISABLED ? "restricted" : "valid",
  2959. geo_ch->flags);
  2960. }
  2961. il->tx_power_device_lmt = max_tx_power;
  2962. il->tx_power_user_lmt = max_tx_power;
  2963. il->tx_power_next = max_tx_power;
  2964. if (il->bands[IEEE80211_BAND_5GHZ].n_channels == 0 &&
  2965. (il->cfg->sku & IL_SKU_A)) {
  2966. IL_INFO("Incorrectly detected BG card as ABG. "
  2967. "Please send your PCI ID 0x%04X:0x%04X to maintainer.\n",
  2968. il->pci_dev->device, il->pci_dev->subsystem_device);
  2969. il->cfg->sku &= ~IL_SKU_A;
  2970. }
  2971. IL_INFO("Tunable channels: %d 802.11bg, %d 802.11a channels\n",
  2972. il->bands[IEEE80211_BAND_2GHZ].n_channels,
  2973. il->bands[IEEE80211_BAND_5GHZ].n_channels);
  2974. set_bit(S_GEO_CONFIGURED, &il->status);
  2975. return 0;
  2976. }
  2977. EXPORT_SYMBOL(il_init_geos);
  2978. /*
  2979. * il_free_geos - undo allocations in il_init_geos
  2980. */
  2981. void
  2982. il_free_geos(struct il_priv *il)
  2983. {
  2984. kfree(il->ieee_channels);
  2985. kfree(il->ieee_rates);
  2986. clear_bit(S_GEO_CONFIGURED, &il->status);
  2987. }
  2988. EXPORT_SYMBOL(il_free_geos);
  2989. static bool
  2990. il_is_channel_extension(struct il_priv *il, enum ieee80211_band band,
  2991. u16 channel, u8 extension_chan_offset)
  2992. {
  2993. const struct il_channel_info *ch_info;
  2994. ch_info = il_get_channel_info(il, band, channel);
  2995. if (!il_is_channel_valid(ch_info))
  2996. return false;
  2997. if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_ABOVE)
  2998. return !(ch_info->
  2999. ht40_extension_channel & IEEE80211_CHAN_NO_HT40PLUS);
  3000. else if (extension_chan_offset == IEEE80211_HT_PARAM_CHA_SEC_BELOW)
  3001. return !(ch_info->
  3002. ht40_extension_channel & IEEE80211_CHAN_NO_HT40MINUS);
  3003. return false;
  3004. }
  3005. bool
  3006. il_is_ht40_tx_allowed(struct il_priv *il, struct ieee80211_sta_ht_cap *ht_cap)
  3007. {
  3008. if (!il->ht.enabled || !il->ht.is_40mhz)
  3009. return false;
  3010. /*
  3011. * We do not check for IEEE80211_HT_CAP_SUP_WIDTH_20_40
  3012. * the bit will not set if it is pure 40MHz case
  3013. */
  3014. if (ht_cap && !ht_cap->ht_supported)
  3015. return false;
  3016. #ifdef CONFIG_IWLEGACY_DEBUGFS
  3017. if (il->disable_ht40)
  3018. return false;
  3019. #endif
  3020. return il_is_channel_extension(il, il->band,
  3021. le16_to_cpu(il->staging.channel),
  3022. il->ht.extension_chan_offset);
  3023. }
  3024. EXPORT_SYMBOL(il_is_ht40_tx_allowed);
  3025. static u16
  3026. il_adjust_beacon_interval(u16 beacon_val, u16 max_beacon_val)
  3027. {
  3028. u16 new_val;
  3029. u16 beacon_factor;
  3030. /*
  3031. * If mac80211 hasn't given us a beacon interval, program
  3032. * the default into the device.
  3033. */
  3034. if (!beacon_val)
  3035. return DEFAULT_BEACON_INTERVAL;
  3036. /*
  3037. * If the beacon interval we obtained from the peer
  3038. * is too large, we'll have to wake up more often
  3039. * (and in IBSS case, we'll beacon too much)
  3040. *
  3041. * For example, if max_beacon_val is 4096, and the
  3042. * requested beacon interval is 7000, we'll have to
  3043. * use 3500 to be able to wake up on the beacons.
  3044. *
  3045. * This could badly influence beacon detection stats.
  3046. */
  3047. beacon_factor = (beacon_val + max_beacon_val) / max_beacon_val;
  3048. new_val = beacon_val / beacon_factor;
  3049. if (!new_val)
  3050. new_val = max_beacon_val;
  3051. return new_val;
  3052. }
  3053. int
  3054. il_send_rxon_timing(struct il_priv *il)
  3055. {
  3056. u64 tsf;
  3057. s32 interval_tm, rem;
  3058. struct ieee80211_conf *conf = NULL;
  3059. u16 beacon_int;
  3060. struct ieee80211_vif *vif = il->vif;
  3061. conf = &il->hw->conf;
  3062. lockdep_assert_held(&il->mutex);
  3063. memset(&il->timing, 0, sizeof(struct il_rxon_time_cmd));
  3064. il->timing.timestamp = cpu_to_le64(il->timestamp);
  3065. il->timing.listen_interval = cpu_to_le16(conf->listen_interval);
  3066. beacon_int = vif ? vif->bss_conf.beacon_int : 0;
  3067. /*
  3068. * TODO: For IBSS we need to get atim_win from mac80211,
  3069. * for now just always use 0
  3070. */
  3071. il->timing.atim_win = 0;
  3072. beacon_int =
  3073. il_adjust_beacon_interval(beacon_int,
  3074. il->hw_params.max_beacon_itrvl *
  3075. TIME_UNIT);
  3076. il->timing.beacon_interval = cpu_to_le16(beacon_int);
  3077. tsf = il->timestamp; /* tsf is modifed by do_div: copy it */
  3078. interval_tm = beacon_int * TIME_UNIT;
  3079. rem = do_div(tsf, interval_tm);
  3080. il->timing.beacon_init_val = cpu_to_le32(interval_tm - rem);
  3081. il->timing.dtim_period = vif ? (vif->bss_conf.dtim_period ? : 1) : 1;
  3082. D_ASSOC("beacon interval %d beacon timer %d beacon tim %d\n",
  3083. le16_to_cpu(il->timing.beacon_interval),
  3084. le32_to_cpu(il->timing.beacon_init_val),
  3085. le16_to_cpu(il->timing.atim_win));
  3086. return il_send_cmd_pdu(il, C_RXON_TIMING, sizeof(il->timing),
  3087. &il->timing);
  3088. }
  3089. EXPORT_SYMBOL(il_send_rxon_timing);
  3090. void
  3091. il_set_rxon_hwcrypto(struct il_priv *il, int hw_decrypt)
  3092. {
  3093. struct il_rxon_cmd *rxon = &il->staging;
  3094. if (hw_decrypt)
  3095. rxon->filter_flags &= ~RXON_FILTER_DIS_DECRYPT_MSK;
  3096. else
  3097. rxon->filter_flags |= RXON_FILTER_DIS_DECRYPT_MSK;
  3098. }
  3099. EXPORT_SYMBOL(il_set_rxon_hwcrypto);
  3100. /* validate RXON structure is valid */
  3101. int
  3102. il_check_rxon_cmd(struct il_priv *il)
  3103. {
  3104. struct il_rxon_cmd *rxon = &il->staging;
  3105. bool error = false;
  3106. if (rxon->flags & RXON_FLG_BAND_24G_MSK) {
  3107. if (rxon->flags & RXON_FLG_TGJ_NARROW_BAND_MSK) {
  3108. IL_WARN("check 2.4G: wrong narrow\n");
  3109. error = true;
  3110. }
  3111. if (rxon->flags & RXON_FLG_RADAR_DETECT_MSK) {
  3112. IL_WARN("check 2.4G: wrong radar\n");
  3113. error = true;
  3114. }
  3115. } else {
  3116. if (!(rxon->flags & RXON_FLG_SHORT_SLOT_MSK)) {
  3117. IL_WARN("check 5.2G: not short slot!\n");
  3118. error = true;
  3119. }
  3120. if (rxon->flags & RXON_FLG_CCK_MSK) {
  3121. IL_WARN("check 5.2G: CCK!\n");
  3122. error = true;
  3123. }
  3124. }
  3125. if ((rxon->node_addr[0] | rxon->bssid_addr[0]) & 0x1) {
  3126. IL_WARN("mac/bssid mcast!\n");
  3127. error = true;
  3128. }
  3129. /* make sure basic rates 6Mbps and 1Mbps are supported */
  3130. if ((rxon->ofdm_basic_rates & RATE_6M_MASK) == 0 &&
  3131. (rxon->cck_basic_rates & RATE_1M_MASK) == 0) {
  3132. IL_WARN("neither 1 nor 6 are basic\n");
  3133. error = true;
  3134. }
  3135. if (le16_to_cpu(rxon->assoc_id) > 2007) {
  3136. IL_WARN("aid > 2007\n");
  3137. error = true;
  3138. }
  3139. if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) ==
  3140. (RXON_FLG_CCK_MSK | RXON_FLG_SHORT_SLOT_MSK)) {
  3141. IL_WARN("CCK and short slot\n");
  3142. error = true;
  3143. }
  3144. if ((rxon->flags & (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) ==
  3145. (RXON_FLG_CCK_MSK | RXON_FLG_AUTO_DETECT_MSK)) {
  3146. IL_WARN("CCK and auto detect");
  3147. error = true;
  3148. }
  3149. if ((rxon->
  3150. flags & (RXON_FLG_AUTO_DETECT_MSK | RXON_FLG_TGG_PROTECT_MSK)) ==
  3151. RXON_FLG_TGG_PROTECT_MSK) {
  3152. IL_WARN("TGg but no auto-detect\n");
  3153. error = true;
  3154. }
  3155. if (error)
  3156. IL_WARN("Tuning to channel %d\n", le16_to_cpu(rxon->channel));
  3157. if (error) {
  3158. IL_ERR("Invalid RXON\n");
  3159. return -EINVAL;
  3160. }
  3161. return 0;
  3162. }
  3163. EXPORT_SYMBOL(il_check_rxon_cmd);
  3164. /**
  3165. * il_full_rxon_required - check if full RXON (vs RXON_ASSOC) cmd is needed
  3166. * @il: staging_rxon is compared to active_rxon
  3167. *
  3168. * If the RXON structure is changing enough to require a new tune,
  3169. * or is clearing the RXON_FILTER_ASSOC_MSK, then return 1 to indicate that
  3170. * a new tune (full RXON command, rather than RXON_ASSOC cmd) is required.
  3171. */
  3172. int
  3173. il_full_rxon_required(struct il_priv *il)
  3174. {
  3175. const struct il_rxon_cmd *staging = &il->staging;
  3176. const struct il_rxon_cmd *active = &il->active;
  3177. #define CHK(cond) \
  3178. if ((cond)) { \
  3179. D_INFO("need full RXON - " #cond "\n"); \
  3180. return 1; \
  3181. }
  3182. #define CHK_NEQ(c1, c2) \
  3183. if ((c1) != (c2)) { \
  3184. D_INFO("need full RXON - " \
  3185. #c1 " != " #c2 " - %d != %d\n", \
  3186. (c1), (c2)); \
  3187. return 1; \
  3188. }
  3189. /* These items are only settable from the full RXON command */
  3190. CHK(!il_is_associated(il));
  3191. CHK(compare_ether_addr(staging->bssid_addr, active->bssid_addr));
  3192. CHK(compare_ether_addr(staging->node_addr, active->node_addr));
  3193. CHK(compare_ether_addr
  3194. (staging->wlap_bssid_addr, active->wlap_bssid_addr));
  3195. CHK_NEQ(staging->dev_type, active->dev_type);
  3196. CHK_NEQ(staging->channel, active->channel);
  3197. CHK_NEQ(staging->air_propagation, active->air_propagation);
  3198. CHK_NEQ(staging->ofdm_ht_single_stream_basic_rates,
  3199. active->ofdm_ht_single_stream_basic_rates);
  3200. CHK_NEQ(staging->ofdm_ht_dual_stream_basic_rates,
  3201. active->ofdm_ht_dual_stream_basic_rates);
  3202. CHK_NEQ(staging->assoc_id, active->assoc_id);
  3203. /* flags, filter_flags, ofdm_basic_rates, and cck_basic_rates can
  3204. * be updated with the RXON_ASSOC command -- however only some
  3205. * flag transitions are allowed using RXON_ASSOC */
  3206. /* Check if we are not switching bands */
  3207. CHK_NEQ(staging->flags & RXON_FLG_BAND_24G_MSK,
  3208. active->flags & RXON_FLG_BAND_24G_MSK);
  3209. /* Check if we are switching association toggle */
  3210. CHK_NEQ(staging->filter_flags & RXON_FILTER_ASSOC_MSK,
  3211. active->filter_flags & RXON_FILTER_ASSOC_MSK);
  3212. #undef CHK
  3213. #undef CHK_NEQ
  3214. return 0;
  3215. }
  3216. EXPORT_SYMBOL(il_full_rxon_required);
  3217. u8
  3218. il_get_lowest_plcp(struct il_priv *il)
  3219. {
  3220. /*
  3221. * Assign the lowest rate -- should really get this from
  3222. * the beacon skb from mac80211.
  3223. */
  3224. if (il->staging.flags & RXON_FLG_BAND_24G_MSK)
  3225. return RATE_1M_PLCP;
  3226. else
  3227. return RATE_6M_PLCP;
  3228. }
  3229. EXPORT_SYMBOL(il_get_lowest_plcp);
  3230. static void
  3231. _il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf)
  3232. {
  3233. struct il_rxon_cmd *rxon = &il->staging;
  3234. if (!il->ht.enabled) {
  3235. rxon->flags &=
  3236. ~(RXON_FLG_CHANNEL_MODE_MSK |
  3237. RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK | RXON_FLG_HT40_PROT_MSK
  3238. | RXON_FLG_HT_PROT_MSK);
  3239. return;
  3240. }
  3241. rxon->flags |=
  3242. cpu_to_le32(il->ht.protection << RXON_FLG_HT_OPERATING_MODE_POS);
  3243. /* Set up channel bandwidth:
  3244. * 20 MHz only, 20/40 mixed or pure 40 if ht40 ok */
  3245. /* clear the HT channel mode before set the mode */
  3246. rxon->flags &=
  3247. ~(RXON_FLG_CHANNEL_MODE_MSK | RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  3248. if (il_is_ht40_tx_allowed(il, NULL)) {
  3249. /* pure ht40 */
  3250. if (il->ht.protection == IEEE80211_HT_OP_MODE_PROTECTION_20MHZ) {
  3251. rxon->flags |= RXON_FLG_CHANNEL_MODE_PURE_40;
  3252. /* Note: control channel is opposite of extension channel */
  3253. switch (il->ht.extension_chan_offset) {
  3254. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  3255. rxon->flags &=
  3256. ~RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  3257. break;
  3258. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  3259. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  3260. break;
  3261. }
  3262. } else {
  3263. /* Note: control channel is opposite of extension channel */
  3264. switch (il->ht.extension_chan_offset) {
  3265. case IEEE80211_HT_PARAM_CHA_SEC_ABOVE:
  3266. rxon->flags &=
  3267. ~(RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK);
  3268. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  3269. break;
  3270. case IEEE80211_HT_PARAM_CHA_SEC_BELOW:
  3271. rxon->flags |= RXON_FLG_CTRL_CHANNEL_LOC_HI_MSK;
  3272. rxon->flags |= RXON_FLG_CHANNEL_MODE_MIXED;
  3273. break;
  3274. case IEEE80211_HT_PARAM_CHA_SEC_NONE:
  3275. default:
  3276. /* channel location only valid if in Mixed mode */
  3277. IL_ERR("invalid extension channel offset\n");
  3278. break;
  3279. }
  3280. }
  3281. } else {
  3282. rxon->flags |= RXON_FLG_CHANNEL_MODE_LEGACY;
  3283. }
  3284. if (il->cfg->ops->hcmd->set_rxon_chain)
  3285. il->cfg->ops->hcmd->set_rxon_chain(il);
  3286. D_ASSOC("rxon flags 0x%X operation mode :0x%X "
  3287. "extension channel offset 0x%x\n", le32_to_cpu(rxon->flags),
  3288. il->ht.protection, il->ht.extension_chan_offset);
  3289. }
  3290. void
  3291. il_set_rxon_ht(struct il_priv *il, struct il_ht_config *ht_conf)
  3292. {
  3293. _il_set_rxon_ht(il, ht_conf);
  3294. }
  3295. EXPORT_SYMBOL(il_set_rxon_ht);
  3296. /* Return valid, unused, channel for a passive scan to reset the RF */
  3297. u8
  3298. il_get_single_channel_number(struct il_priv *il, enum ieee80211_band band)
  3299. {
  3300. const struct il_channel_info *ch_info;
  3301. int i;
  3302. u8 channel = 0;
  3303. u8 min, max;
  3304. if (band == IEEE80211_BAND_5GHZ) {
  3305. min = 14;
  3306. max = il->channel_count;
  3307. } else {
  3308. min = 0;
  3309. max = 14;
  3310. }
  3311. for (i = min; i < max; i++) {
  3312. channel = il->channel_info[i].channel;
  3313. if (channel == le16_to_cpu(il->staging.channel))
  3314. continue;
  3315. ch_info = il_get_channel_info(il, band, channel);
  3316. if (il_is_channel_valid(ch_info))
  3317. break;
  3318. }
  3319. return channel;
  3320. }
  3321. EXPORT_SYMBOL(il_get_single_channel_number);
  3322. /**
  3323. * il_set_rxon_channel - Set the band and channel values in staging RXON
  3324. * @ch: requested channel as a pointer to struct ieee80211_channel
  3325. * NOTE: Does not commit to the hardware; it sets appropriate bit fields
  3326. * in the staging RXON flag structure based on the ch->band
  3327. */
  3328. int
  3329. il_set_rxon_channel(struct il_priv *il, struct ieee80211_channel *ch)
  3330. {
  3331. enum ieee80211_band band = ch->band;
  3332. u16 channel = ch->hw_value;
  3333. if (le16_to_cpu(il->staging.channel) == channel && il->band == band)
  3334. return 0;
  3335. il->staging.channel = cpu_to_le16(channel);
  3336. if (band == IEEE80211_BAND_5GHZ)
  3337. il->staging.flags &= ~RXON_FLG_BAND_24G_MSK;
  3338. else
  3339. il->staging.flags |= RXON_FLG_BAND_24G_MSK;
  3340. il->band = band;
  3341. D_INFO("Staging channel set to %d [%d]\n", channel, band);
  3342. return 0;
  3343. }
  3344. EXPORT_SYMBOL(il_set_rxon_channel);
  3345. void
  3346. il_set_flags_for_band(struct il_priv *il, enum ieee80211_band band,
  3347. struct ieee80211_vif *vif)
  3348. {
  3349. if (band == IEEE80211_BAND_5GHZ) {
  3350. il->staging.flags &=
  3351. ~(RXON_FLG_BAND_24G_MSK | RXON_FLG_AUTO_DETECT_MSK |
  3352. RXON_FLG_CCK_MSK);
  3353. il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  3354. } else {
  3355. /* Copied from il_post_associate() */
  3356. if (vif && vif->bss_conf.use_short_slot)
  3357. il->staging.flags |= RXON_FLG_SHORT_SLOT_MSK;
  3358. else
  3359. il->staging.flags &= ~RXON_FLG_SHORT_SLOT_MSK;
  3360. il->staging.flags |= RXON_FLG_BAND_24G_MSK;
  3361. il->staging.flags |= RXON_FLG_AUTO_DETECT_MSK;
  3362. il->staging.flags &= ~RXON_FLG_CCK_MSK;
  3363. }
  3364. }
  3365. EXPORT_SYMBOL(il_set_flags_for_band);
  3366. /*
  3367. * initialize rxon structure with default values from eeprom
  3368. */
  3369. void
  3370. il_connection_init_rx_config(struct il_priv *il)
  3371. {
  3372. const struct il_channel_info *ch_info;
  3373. memset(&il->staging, 0, sizeof(il->staging));
  3374. if (!il->vif) {
  3375. il->staging.dev_type = RXON_DEV_TYPE_ESS;
  3376. } else if (il->vif->type == NL80211_IFTYPE_STATION) {
  3377. il->staging.dev_type = RXON_DEV_TYPE_ESS;
  3378. il->staging.filter_flags = RXON_FILTER_ACCEPT_GRP_MSK;
  3379. } else if (il->vif->type == NL80211_IFTYPE_ADHOC) {
  3380. il->staging.dev_type = RXON_DEV_TYPE_IBSS;
  3381. il->staging.flags = RXON_FLG_SHORT_PREAMBLE_MSK;
  3382. il->staging.filter_flags =
  3383. RXON_FILTER_BCON_AWARE_MSK | RXON_FILTER_ACCEPT_GRP_MSK;
  3384. } else {
  3385. IL_ERR("Unsupported interface type %d\n", il->vif->type);
  3386. return;
  3387. }
  3388. #if 0
  3389. /* TODO: Figure out when short_preamble would be set and cache from
  3390. * that */
  3391. if (!hw_to_local(il->hw)->short_preamble)
  3392. il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  3393. else
  3394. il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  3395. #endif
  3396. ch_info =
  3397. il_get_channel_info(il, il->band, le16_to_cpu(il->active.channel));
  3398. if (!ch_info)
  3399. ch_info = &il->channel_info[0];
  3400. il->staging.channel = cpu_to_le16(ch_info->channel);
  3401. il->band = ch_info->band;
  3402. il_set_flags_for_band(il, il->band, il->vif);
  3403. il->staging.ofdm_basic_rates =
  3404. (IL_OFDM_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
  3405. il->staging.cck_basic_rates =
  3406. (IL_CCK_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF;
  3407. /* clear both MIX and PURE40 mode flag */
  3408. il->staging.flags &=
  3409. ~(RXON_FLG_CHANNEL_MODE_MIXED | RXON_FLG_CHANNEL_MODE_PURE_40);
  3410. if (il->vif)
  3411. memcpy(il->staging.node_addr, il->vif->addr, ETH_ALEN);
  3412. il->staging.ofdm_ht_single_stream_basic_rates = 0xff;
  3413. il->staging.ofdm_ht_dual_stream_basic_rates = 0xff;
  3414. }
  3415. EXPORT_SYMBOL(il_connection_init_rx_config);
  3416. void
  3417. il_set_rate(struct il_priv *il)
  3418. {
  3419. const struct ieee80211_supported_band *hw = NULL;
  3420. struct ieee80211_rate *rate;
  3421. int i;
  3422. hw = il_get_hw_mode(il, il->band);
  3423. if (!hw) {
  3424. IL_ERR("Failed to set rate: unable to get hw mode\n");
  3425. return;
  3426. }
  3427. il->active_rate = 0;
  3428. for (i = 0; i < hw->n_bitrates; i++) {
  3429. rate = &(hw->bitrates[i]);
  3430. if (rate->hw_value < RATE_COUNT_LEGACY)
  3431. il->active_rate |= (1 << rate->hw_value);
  3432. }
  3433. D_RATE("Set active_rate = %0x\n", il->active_rate);
  3434. il->staging.cck_basic_rates =
  3435. (IL_CCK_BASIC_RATES_MASK >> IL_FIRST_CCK_RATE) & 0xF;
  3436. il->staging.ofdm_basic_rates =
  3437. (IL_OFDM_BASIC_RATES_MASK >> IL_FIRST_OFDM_RATE) & 0xFF;
  3438. }
  3439. EXPORT_SYMBOL(il_set_rate);
  3440. void
  3441. il_chswitch_done(struct il_priv *il, bool is_success)
  3442. {
  3443. if (test_bit(S_EXIT_PENDING, &il->status))
  3444. return;
  3445. if (test_and_clear_bit(S_CHANNEL_SWITCH_PENDING, &il->status))
  3446. ieee80211_chswitch_done(il->vif, is_success);
  3447. }
  3448. EXPORT_SYMBOL(il_chswitch_done);
  3449. void
  3450. il_hdl_csa(struct il_priv *il, struct il_rx_buf *rxb)
  3451. {
  3452. struct il_rx_pkt *pkt = rxb_addr(rxb);
  3453. struct il_csa_notification *csa = &(pkt->u.csa_notif);
  3454. struct il_rxon_cmd *rxon = (void *)&il->active;
  3455. if (!test_bit(S_CHANNEL_SWITCH_PENDING, &il->status))
  3456. return;
  3457. if (!le32_to_cpu(csa->status) && csa->channel == il->switch_channel) {
  3458. rxon->channel = csa->channel;
  3459. il->staging.channel = csa->channel;
  3460. D_11H("CSA notif: channel %d\n", le16_to_cpu(csa->channel));
  3461. il_chswitch_done(il, true);
  3462. } else {
  3463. IL_ERR("CSA notif (fail) : channel %d\n",
  3464. le16_to_cpu(csa->channel));
  3465. il_chswitch_done(il, false);
  3466. }
  3467. }
  3468. EXPORT_SYMBOL(il_hdl_csa);
  3469. #ifdef CONFIG_IWLEGACY_DEBUG
  3470. void
  3471. il_print_rx_config_cmd(struct il_priv *il)
  3472. {
  3473. struct il_rxon_cmd *rxon = &il->staging;
  3474. D_RADIO("RX CONFIG:\n");
  3475. il_print_hex_dump(il, IL_DL_RADIO, (u8 *) rxon, sizeof(*rxon));
  3476. D_RADIO("u16 channel: 0x%x\n", le16_to_cpu(rxon->channel));
  3477. D_RADIO("u32 flags: 0x%08X\n", le32_to_cpu(rxon->flags));
  3478. D_RADIO("u32 filter_flags: 0x%08x\n", le32_to_cpu(rxon->filter_flags));
  3479. D_RADIO("u8 dev_type: 0x%x\n", rxon->dev_type);
  3480. D_RADIO("u8 ofdm_basic_rates: 0x%02x\n", rxon->ofdm_basic_rates);
  3481. D_RADIO("u8 cck_basic_rates: 0x%02x\n", rxon->cck_basic_rates);
  3482. D_RADIO("u8[6] node_addr: %pM\n", rxon->node_addr);
  3483. D_RADIO("u8[6] bssid_addr: %pM\n", rxon->bssid_addr);
  3484. D_RADIO("u16 assoc_id: 0x%x\n", le16_to_cpu(rxon->assoc_id));
  3485. }
  3486. EXPORT_SYMBOL(il_print_rx_config_cmd);
  3487. #endif
  3488. /**
  3489. * il_irq_handle_error - called for HW or SW error interrupt from card
  3490. */
  3491. void
  3492. il_irq_handle_error(struct il_priv *il)
  3493. {
  3494. /* Set the FW error flag -- cleared on il_down */
  3495. set_bit(S_FW_ERROR, &il->status);
  3496. /* Cancel currently queued command. */
  3497. clear_bit(S_HCMD_ACTIVE, &il->status);
  3498. IL_ERR("Loaded firmware version: %s\n", il->hw->wiphy->fw_version);
  3499. il->cfg->ops->lib->dump_nic_error_log(il);
  3500. if (il->cfg->ops->lib->dump_fh)
  3501. il->cfg->ops->lib->dump_fh(il, NULL, false);
  3502. #ifdef CONFIG_IWLEGACY_DEBUG
  3503. if (il_get_debug_level(il) & IL_DL_FW_ERRORS)
  3504. il_print_rx_config_cmd(il);
  3505. #endif
  3506. wake_up(&il->wait_command_queue);
  3507. /* Keep the restart process from trying to send host
  3508. * commands by clearing the INIT status bit */
  3509. clear_bit(S_READY, &il->status);
  3510. if (!test_bit(S_EXIT_PENDING, &il->status)) {
  3511. IL_DBG(IL_DL_FW_ERRORS,
  3512. "Restarting adapter due to uCode error.\n");
  3513. if (il->cfg->mod_params->restart_fw)
  3514. queue_work(il->workqueue, &il->restart);
  3515. }
  3516. }
  3517. EXPORT_SYMBOL(il_irq_handle_error);
  3518. static int
  3519. il_apm_stop_master(struct il_priv *il)
  3520. {
  3521. int ret = 0;
  3522. /* stop device's busmaster DMA activity */
  3523. il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_STOP_MASTER);
  3524. ret =
  3525. _il_poll_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_MASTER_DISABLED,
  3526. CSR_RESET_REG_FLAG_MASTER_DISABLED, 100);
  3527. if (ret)
  3528. IL_WARN("Master Disable Timed Out, 100 usec\n");
  3529. D_INFO("stop master\n");
  3530. return ret;
  3531. }
  3532. void
  3533. il_apm_stop(struct il_priv *il)
  3534. {
  3535. D_INFO("Stop card, put in low power state\n");
  3536. /* Stop device's DMA activity */
  3537. il_apm_stop_master(il);
  3538. /* Reset the entire device */
  3539. il_set_bit(il, CSR_RESET, CSR_RESET_REG_FLAG_SW_RESET);
  3540. udelay(10);
  3541. /*
  3542. * Clear "initialization complete" bit to move adapter from
  3543. * D0A* (powered-up Active) --> D0U* (Uninitialized) state.
  3544. */
  3545. il_clear_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  3546. }
  3547. EXPORT_SYMBOL(il_apm_stop);
  3548. /*
  3549. * Start up NIC's basic functionality after it has been reset
  3550. * (e.g. after platform boot, or shutdown via il_apm_stop())
  3551. * NOTE: This does not load uCode nor start the embedded processor
  3552. */
  3553. int
  3554. il_apm_init(struct il_priv *il)
  3555. {
  3556. int ret = 0;
  3557. u16 lctl;
  3558. D_INFO("Init card's basic functions\n");
  3559. /*
  3560. * Use "set_bit" below rather than "write", to preserve any hardware
  3561. * bits already set by default after reset.
  3562. */
  3563. /* Disable L0S exit timer (platform NMI Work/Around) */
  3564. il_set_bit(il, CSR_GIO_CHICKEN_BITS,
  3565. CSR_GIO_CHICKEN_BITS_REG_BIT_DIS_L0S_EXIT_TIMER);
  3566. /*
  3567. * Disable L0s without affecting L1;
  3568. * don't wait for ICH L0s (ICH bug W/A)
  3569. */
  3570. il_set_bit(il, CSR_GIO_CHICKEN_BITS,
  3571. CSR_GIO_CHICKEN_BITS_REG_BIT_L1A_NO_L0S_RX);
  3572. /* Set FH wait threshold to maximum (HW error during stress W/A) */
  3573. il_set_bit(il, CSR_DBG_HPET_MEM_REG, CSR_DBG_HPET_MEM_REG_VAL);
  3574. /*
  3575. * Enable HAP INTA (interrupt from management bus) to
  3576. * wake device's PCI Express link L1a -> L0s
  3577. * NOTE: This is no-op for 3945 (non-existent bit)
  3578. */
  3579. il_set_bit(il, CSR_HW_IF_CONFIG_REG,
  3580. CSR_HW_IF_CONFIG_REG_BIT_HAP_WAKE_L1A);
  3581. /*
  3582. * HW bug W/A for instability in PCIe bus L0->L0S->L1 transition.
  3583. * Check if BIOS (or OS) enabled L1-ASPM on this device.
  3584. * If so (likely), disable L0S, so device moves directly L0->L1;
  3585. * costs negligible amount of power savings.
  3586. * If not (unlikely), enable L0S, so there is at least some
  3587. * power savings, even without L1.
  3588. */
  3589. if (il->cfg->base_params->set_l0s) {
  3590. lctl = il_pcie_link_ctl(il);
  3591. if ((lctl & PCI_CFG_LINK_CTRL_VAL_L1_EN) ==
  3592. PCI_CFG_LINK_CTRL_VAL_L1_EN) {
  3593. /* L1-ASPM enabled; disable(!) L0S */
  3594. il_set_bit(il, CSR_GIO_REG,
  3595. CSR_GIO_REG_VAL_L0S_ENABLED);
  3596. D_POWER("L1 Enabled; Disabling L0S\n");
  3597. } else {
  3598. /* L1-ASPM disabled; enable(!) L0S */
  3599. il_clear_bit(il, CSR_GIO_REG,
  3600. CSR_GIO_REG_VAL_L0S_ENABLED);
  3601. D_POWER("L1 Disabled; Enabling L0S\n");
  3602. }
  3603. }
  3604. /* Configure analog phase-lock-loop before activating to D0A */
  3605. if (il->cfg->base_params->pll_cfg_val)
  3606. il_set_bit(il, CSR_ANA_PLL_CFG,
  3607. il->cfg->base_params->pll_cfg_val);
  3608. /*
  3609. * Set "initialization complete" bit to move adapter from
  3610. * D0U* --> D0A* (powered-up active) state.
  3611. */
  3612. il_set_bit(il, CSR_GP_CNTRL, CSR_GP_CNTRL_REG_FLAG_INIT_DONE);
  3613. /*
  3614. * Wait for clock stabilization; once stabilized, access to
  3615. * device-internal resources is supported, e.g. il_wr_prph()
  3616. * and accesses to uCode SRAM.
  3617. */
  3618. ret =
  3619. _il_poll_bit(il, CSR_GP_CNTRL,
  3620. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY,
  3621. CSR_GP_CNTRL_REG_FLAG_MAC_CLOCK_READY, 25000);
  3622. if (ret < 0) {
  3623. D_INFO("Failed to init the card\n");
  3624. goto out;
  3625. }
  3626. /*
  3627. * Enable DMA and BSM (if used) clocks, wait for them to stabilize.
  3628. * BSM (Boostrap State Machine) is only in 3945 and 4965.
  3629. *
  3630. * Write to "CLK_EN_REG"; "1" bits enable clocks, while "0" bits
  3631. * do not disable clocks. This preserves any hardware bits already
  3632. * set by default in "CLK_CTRL_REG" after reset.
  3633. */
  3634. if (il->cfg->base_params->use_bsm)
  3635. il_wr_prph(il, APMG_CLK_EN_REG,
  3636. APMG_CLK_VAL_DMA_CLK_RQT | APMG_CLK_VAL_BSM_CLK_RQT);
  3637. else
  3638. il_wr_prph(il, APMG_CLK_EN_REG, APMG_CLK_VAL_DMA_CLK_RQT);
  3639. udelay(20);
  3640. /* Disable L1-Active */
  3641. il_set_bits_prph(il, APMG_PCIDEV_STT_REG,
  3642. APMG_PCIDEV_STT_VAL_L1_ACT_DIS);
  3643. out:
  3644. return ret;
  3645. }
  3646. EXPORT_SYMBOL(il_apm_init);
  3647. int
  3648. il_set_tx_power(struct il_priv *il, s8 tx_power, bool force)
  3649. {
  3650. int ret;
  3651. s8 prev_tx_power;
  3652. bool defer;
  3653. lockdep_assert_held(&il->mutex);
  3654. if (il->tx_power_user_lmt == tx_power && !force)
  3655. return 0;
  3656. if (!il->cfg->ops->lib->send_tx_power)
  3657. return -EOPNOTSUPP;
  3658. /* 0 dBm mean 1 milliwatt */
  3659. if (tx_power < 0) {
  3660. IL_WARN("Requested user TXPOWER %d below 1 mW.\n", tx_power);
  3661. return -EINVAL;
  3662. }
  3663. if (tx_power > il->tx_power_device_lmt) {
  3664. IL_WARN("Requested user TXPOWER %d above upper limit %d.\n",
  3665. tx_power, il->tx_power_device_lmt);
  3666. return -EINVAL;
  3667. }
  3668. if (!il_is_ready_rf(il))
  3669. return -EIO;
  3670. /* scan complete and commit_rxon use tx_power_next value,
  3671. * it always need to be updated for newest request */
  3672. il->tx_power_next = tx_power;
  3673. /* do not set tx power when scanning or channel changing */
  3674. defer = test_bit(S_SCANNING, &il->status) ||
  3675. memcmp(&il->active, &il->staging, sizeof(il->staging));
  3676. if (defer && !force) {
  3677. D_INFO("Deferring tx power set\n");
  3678. return 0;
  3679. }
  3680. prev_tx_power = il->tx_power_user_lmt;
  3681. il->tx_power_user_lmt = tx_power;
  3682. ret = il->cfg->ops->lib->send_tx_power(il);
  3683. /* if fail to set tx_power, restore the orig. tx power */
  3684. if (ret) {
  3685. il->tx_power_user_lmt = prev_tx_power;
  3686. il->tx_power_next = prev_tx_power;
  3687. }
  3688. return ret;
  3689. }
  3690. EXPORT_SYMBOL(il_set_tx_power);
  3691. void
  3692. il_send_bt_config(struct il_priv *il)
  3693. {
  3694. struct il_bt_cmd bt_cmd = {
  3695. .lead_time = BT_LEAD_TIME_DEF,
  3696. .max_kill = BT_MAX_KILL_DEF,
  3697. .kill_ack_mask = 0,
  3698. .kill_cts_mask = 0,
  3699. };
  3700. if (!bt_coex_active)
  3701. bt_cmd.flags = BT_COEX_DISABLE;
  3702. else
  3703. bt_cmd.flags = BT_COEX_ENABLE;
  3704. D_INFO("BT coex %s\n",
  3705. (bt_cmd.flags == BT_COEX_DISABLE) ? "disable" : "active");
  3706. if (il_send_cmd_pdu(il, C_BT_CONFIG, sizeof(struct il_bt_cmd), &bt_cmd))
  3707. IL_ERR("failed to send BT Coex Config\n");
  3708. }
  3709. EXPORT_SYMBOL(il_send_bt_config);
  3710. int
  3711. il_send_stats_request(struct il_priv *il, u8 flags, bool clear)
  3712. {
  3713. struct il_stats_cmd stats_cmd = {
  3714. .configuration_flags = clear ? IL_STATS_CONF_CLEAR_STATS : 0,
  3715. };
  3716. if (flags & CMD_ASYNC)
  3717. return il_send_cmd_pdu_async(il, C_STATS, sizeof(struct il_stats_cmd),
  3718. &stats_cmd, NULL);
  3719. else
  3720. return il_send_cmd_pdu(il, C_STATS, sizeof(struct il_stats_cmd),
  3721. &stats_cmd);
  3722. }
  3723. EXPORT_SYMBOL(il_send_stats_request);
  3724. void
  3725. il_hdl_pm_sleep(struct il_priv *il, struct il_rx_buf *rxb)
  3726. {
  3727. #ifdef CONFIG_IWLEGACY_DEBUG
  3728. struct il_rx_pkt *pkt = rxb_addr(rxb);
  3729. struct il_sleep_notification *sleep = &(pkt->u.sleep_notif);
  3730. D_RX("sleep mode: %d, src: %d\n",
  3731. sleep->pm_sleep_mode, sleep->pm_wakeup_src);
  3732. #endif
  3733. }
  3734. EXPORT_SYMBOL(il_hdl_pm_sleep);
  3735. void
  3736. il_hdl_pm_debug_stats(struct il_priv *il, struct il_rx_buf *rxb)
  3737. {
  3738. struct il_rx_pkt *pkt = rxb_addr(rxb);
  3739. u32 len = le32_to_cpu(pkt->len_n_flags) & IL_RX_FRAME_SIZE_MSK;
  3740. D_RADIO("Dumping %d bytes of unhandled notification for %s:\n", len,
  3741. il_get_cmd_string(pkt->hdr.cmd));
  3742. il_print_hex_dump(il, IL_DL_RADIO, pkt->u.raw, len);
  3743. }
  3744. EXPORT_SYMBOL(il_hdl_pm_debug_stats);
  3745. void
  3746. il_hdl_error(struct il_priv *il, struct il_rx_buf *rxb)
  3747. {
  3748. struct il_rx_pkt *pkt = rxb_addr(rxb);
  3749. IL_ERR("Error Reply type 0x%08X cmd %s (0x%02X) "
  3750. "seq 0x%04X ser 0x%08X\n",
  3751. le32_to_cpu(pkt->u.err_resp.error_type),
  3752. il_get_cmd_string(pkt->u.err_resp.cmd_id),
  3753. pkt->u.err_resp.cmd_id,
  3754. le16_to_cpu(pkt->u.err_resp.bad_cmd_seq_num),
  3755. le32_to_cpu(pkt->u.err_resp.error_info));
  3756. }
  3757. EXPORT_SYMBOL(il_hdl_error);
  3758. void
  3759. il_clear_isr_stats(struct il_priv *il)
  3760. {
  3761. memset(&il->isr_stats, 0, sizeof(il->isr_stats));
  3762. }
  3763. int
  3764. il_mac_conf_tx(struct ieee80211_hw *hw, struct ieee80211_vif *vif, u16 queue,
  3765. const struct ieee80211_tx_queue_params *params)
  3766. {
  3767. struct il_priv *il = hw->priv;
  3768. unsigned long flags;
  3769. int q;
  3770. D_MAC80211("enter\n");
  3771. if (!il_is_ready_rf(il)) {
  3772. D_MAC80211("leave - RF not ready\n");
  3773. return -EIO;
  3774. }
  3775. if (queue >= AC_NUM) {
  3776. D_MAC80211("leave - queue >= AC_NUM %d\n", queue);
  3777. return 0;
  3778. }
  3779. q = AC_NUM - 1 - queue;
  3780. spin_lock_irqsave(&il->lock, flags);
  3781. il->qos_data.def_qos_parm.ac[q].cw_min =
  3782. cpu_to_le16(params->cw_min);
  3783. il->qos_data.def_qos_parm.ac[q].cw_max =
  3784. cpu_to_le16(params->cw_max);
  3785. il->qos_data.def_qos_parm.ac[q].aifsn = params->aifs;
  3786. il->qos_data.def_qos_parm.ac[q].edca_txop =
  3787. cpu_to_le16((params->txop * 32));
  3788. il->qos_data.def_qos_parm.ac[q].reserved1 = 0;
  3789. spin_unlock_irqrestore(&il->lock, flags);
  3790. D_MAC80211("leave\n");
  3791. return 0;
  3792. }
  3793. EXPORT_SYMBOL(il_mac_conf_tx);
  3794. int
  3795. il_mac_tx_last_beacon(struct ieee80211_hw *hw)
  3796. {
  3797. struct il_priv *il = hw->priv;
  3798. return il->ibss_manager == IL_IBSS_MANAGER;
  3799. }
  3800. EXPORT_SYMBOL_GPL(il_mac_tx_last_beacon);
  3801. static int
  3802. il_set_mode(struct il_priv *il)
  3803. {
  3804. il_connection_init_rx_config(il);
  3805. if (il->cfg->ops->hcmd->set_rxon_chain)
  3806. il->cfg->ops->hcmd->set_rxon_chain(il);
  3807. return il_commit_rxon(il);
  3808. }
  3809. int
  3810. il_mac_add_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  3811. {
  3812. struct il_priv *il = hw->priv;
  3813. int err;
  3814. D_MAC80211("enter: type %d, addr %pM\n", vif->type, vif->addr);
  3815. mutex_lock(&il->mutex);
  3816. if (!il_is_ready_rf(il)) {
  3817. IL_WARN("Try to add interface when device not ready\n");
  3818. err = -EINVAL;
  3819. goto out;
  3820. }
  3821. if (il->vif) {
  3822. err = -EOPNOTSUPP;
  3823. goto out;
  3824. }
  3825. il->vif = vif;
  3826. il->iw_mode = vif->type;
  3827. err = il_set_mode(il);
  3828. if (err) {
  3829. il->vif = NULL;
  3830. il->iw_mode = NL80211_IFTYPE_STATION;
  3831. }
  3832. out:
  3833. mutex_unlock(&il->mutex);
  3834. D_MAC80211("leave\n");
  3835. return err;
  3836. }
  3837. EXPORT_SYMBOL(il_mac_add_interface);
  3838. static void
  3839. il_teardown_interface(struct il_priv *il, struct ieee80211_vif *vif,
  3840. bool mode_change)
  3841. {
  3842. lockdep_assert_held(&il->mutex);
  3843. if (il->scan_vif == vif) {
  3844. il_scan_cancel_timeout(il, 200);
  3845. il_force_scan_end(il);
  3846. }
  3847. if (!mode_change)
  3848. il_set_mode(il);
  3849. }
  3850. void
  3851. il_mac_remove_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  3852. {
  3853. struct il_priv *il = hw->priv;
  3854. D_MAC80211("enter\n");
  3855. mutex_lock(&il->mutex);
  3856. WARN_ON(il->vif != vif);
  3857. il->vif = NULL;
  3858. il_teardown_interface(il, vif, false);
  3859. memset(il->bssid, 0, ETH_ALEN);
  3860. mutex_unlock(&il->mutex);
  3861. D_MAC80211("leave\n");
  3862. }
  3863. EXPORT_SYMBOL(il_mac_remove_interface);
  3864. int
  3865. il_alloc_txq_mem(struct il_priv *il)
  3866. {
  3867. if (!il->txq)
  3868. il->txq =
  3869. kzalloc(sizeof(struct il_tx_queue) *
  3870. il->cfg->base_params->num_of_queues, GFP_KERNEL);
  3871. if (!il->txq) {
  3872. IL_ERR("Not enough memory for txq\n");
  3873. return -ENOMEM;
  3874. }
  3875. return 0;
  3876. }
  3877. EXPORT_SYMBOL(il_alloc_txq_mem);
  3878. void
  3879. il_txq_mem(struct il_priv *il)
  3880. {
  3881. kfree(il->txq);
  3882. il->txq = NULL;
  3883. }
  3884. EXPORT_SYMBOL(il_txq_mem);
  3885. #ifdef CONFIG_IWLEGACY_DEBUGFS
  3886. #define IL_TRAFFIC_DUMP_SIZE (IL_TRAFFIC_ENTRY_SIZE * IL_TRAFFIC_ENTRIES)
  3887. void
  3888. il_reset_traffic_log(struct il_priv *il)
  3889. {
  3890. il->tx_traffic_idx = 0;
  3891. il->rx_traffic_idx = 0;
  3892. if (il->tx_traffic)
  3893. memset(il->tx_traffic, 0, IL_TRAFFIC_DUMP_SIZE);
  3894. if (il->rx_traffic)
  3895. memset(il->rx_traffic, 0, IL_TRAFFIC_DUMP_SIZE);
  3896. }
  3897. int
  3898. il_alloc_traffic_mem(struct il_priv *il)
  3899. {
  3900. u32 traffic_size = IL_TRAFFIC_DUMP_SIZE;
  3901. if (il_debug_level & IL_DL_TX) {
  3902. if (!il->tx_traffic) {
  3903. il->tx_traffic = kzalloc(traffic_size, GFP_KERNEL);
  3904. if (!il->tx_traffic)
  3905. return -ENOMEM;
  3906. }
  3907. }
  3908. if (il_debug_level & IL_DL_RX) {
  3909. if (!il->rx_traffic) {
  3910. il->rx_traffic = kzalloc(traffic_size, GFP_KERNEL);
  3911. if (!il->rx_traffic)
  3912. return -ENOMEM;
  3913. }
  3914. }
  3915. il_reset_traffic_log(il);
  3916. return 0;
  3917. }
  3918. EXPORT_SYMBOL(il_alloc_traffic_mem);
  3919. void
  3920. il_free_traffic_mem(struct il_priv *il)
  3921. {
  3922. kfree(il->tx_traffic);
  3923. il->tx_traffic = NULL;
  3924. kfree(il->rx_traffic);
  3925. il->rx_traffic = NULL;
  3926. }
  3927. EXPORT_SYMBOL(il_free_traffic_mem);
  3928. void
  3929. il_dbg_log_tx_data_frame(struct il_priv *il, u16 length,
  3930. struct ieee80211_hdr *header)
  3931. {
  3932. __le16 fc;
  3933. u16 len;
  3934. if (likely(!(il_debug_level & IL_DL_TX)))
  3935. return;
  3936. if (!il->tx_traffic)
  3937. return;
  3938. fc = header->frame_control;
  3939. if (ieee80211_is_data(fc)) {
  3940. len =
  3941. (length >
  3942. IL_TRAFFIC_ENTRY_SIZE) ? IL_TRAFFIC_ENTRY_SIZE : length;
  3943. memcpy((il->tx_traffic +
  3944. (il->tx_traffic_idx * IL_TRAFFIC_ENTRY_SIZE)), header,
  3945. len);
  3946. il->tx_traffic_idx =
  3947. (il->tx_traffic_idx + 1) % IL_TRAFFIC_ENTRIES;
  3948. }
  3949. }
  3950. EXPORT_SYMBOL(il_dbg_log_tx_data_frame);
  3951. void
  3952. il_dbg_log_rx_data_frame(struct il_priv *il, u16 length,
  3953. struct ieee80211_hdr *header)
  3954. {
  3955. __le16 fc;
  3956. u16 len;
  3957. if (likely(!(il_debug_level & IL_DL_RX)))
  3958. return;
  3959. if (!il->rx_traffic)
  3960. return;
  3961. fc = header->frame_control;
  3962. if (ieee80211_is_data(fc)) {
  3963. len =
  3964. (length >
  3965. IL_TRAFFIC_ENTRY_SIZE) ? IL_TRAFFIC_ENTRY_SIZE : length;
  3966. memcpy((il->rx_traffic +
  3967. (il->rx_traffic_idx * IL_TRAFFIC_ENTRY_SIZE)), header,
  3968. len);
  3969. il->rx_traffic_idx =
  3970. (il->rx_traffic_idx + 1) % IL_TRAFFIC_ENTRIES;
  3971. }
  3972. }
  3973. EXPORT_SYMBOL(il_dbg_log_rx_data_frame);
  3974. const char *
  3975. il_get_mgmt_string(int cmd)
  3976. {
  3977. switch (cmd) {
  3978. IL_CMD(MANAGEMENT_ASSOC_REQ);
  3979. IL_CMD(MANAGEMENT_ASSOC_RESP);
  3980. IL_CMD(MANAGEMENT_REASSOC_REQ);
  3981. IL_CMD(MANAGEMENT_REASSOC_RESP);
  3982. IL_CMD(MANAGEMENT_PROBE_REQ);
  3983. IL_CMD(MANAGEMENT_PROBE_RESP);
  3984. IL_CMD(MANAGEMENT_BEACON);
  3985. IL_CMD(MANAGEMENT_ATIM);
  3986. IL_CMD(MANAGEMENT_DISASSOC);
  3987. IL_CMD(MANAGEMENT_AUTH);
  3988. IL_CMD(MANAGEMENT_DEAUTH);
  3989. IL_CMD(MANAGEMENT_ACTION);
  3990. default:
  3991. return "UNKNOWN";
  3992. }
  3993. }
  3994. const char *
  3995. il_get_ctrl_string(int cmd)
  3996. {
  3997. switch (cmd) {
  3998. IL_CMD(CONTROL_BACK_REQ);
  3999. IL_CMD(CONTROL_BACK);
  4000. IL_CMD(CONTROL_PSPOLL);
  4001. IL_CMD(CONTROL_RTS);
  4002. IL_CMD(CONTROL_CTS);
  4003. IL_CMD(CONTROL_ACK);
  4004. IL_CMD(CONTROL_CFEND);
  4005. IL_CMD(CONTROL_CFENDACK);
  4006. default:
  4007. return "UNKNOWN";
  4008. }
  4009. }
  4010. void
  4011. il_clear_traffic_stats(struct il_priv *il)
  4012. {
  4013. memset(&il->tx_stats, 0, sizeof(struct traffic_stats));
  4014. memset(&il->rx_stats, 0, sizeof(struct traffic_stats));
  4015. }
  4016. /*
  4017. * if CONFIG_IWLEGACY_DEBUGFS defined,
  4018. * il_update_stats function will
  4019. * record all the MGMT, CTRL and DATA pkt for both TX and Rx pass
  4020. * Use debugFs to display the rx/rx_stats
  4021. * if CONFIG_IWLEGACY_DEBUGFS not being defined, then no MGMT and CTRL
  4022. * information will be recorded, but DATA pkt still will be recorded
  4023. * for the reason of il_led.c need to control the led blinking based on
  4024. * number of tx and rx data.
  4025. *
  4026. */
  4027. void
  4028. il_update_stats(struct il_priv *il, bool is_tx, __le16 fc, u16 len)
  4029. {
  4030. struct traffic_stats *stats;
  4031. if (is_tx)
  4032. stats = &il->tx_stats;
  4033. else
  4034. stats = &il->rx_stats;
  4035. if (ieee80211_is_mgmt(fc)) {
  4036. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  4037. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  4038. stats->mgmt[MANAGEMENT_ASSOC_REQ]++;
  4039. break;
  4040. case cpu_to_le16(IEEE80211_STYPE_ASSOC_RESP):
  4041. stats->mgmt[MANAGEMENT_ASSOC_RESP]++;
  4042. break;
  4043. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  4044. stats->mgmt[MANAGEMENT_REASSOC_REQ]++;
  4045. break;
  4046. case cpu_to_le16(IEEE80211_STYPE_REASSOC_RESP):
  4047. stats->mgmt[MANAGEMENT_REASSOC_RESP]++;
  4048. break;
  4049. case cpu_to_le16(IEEE80211_STYPE_PROBE_REQ):
  4050. stats->mgmt[MANAGEMENT_PROBE_REQ]++;
  4051. break;
  4052. case cpu_to_le16(IEEE80211_STYPE_PROBE_RESP):
  4053. stats->mgmt[MANAGEMENT_PROBE_RESP]++;
  4054. break;
  4055. case cpu_to_le16(IEEE80211_STYPE_BEACON):
  4056. stats->mgmt[MANAGEMENT_BEACON]++;
  4057. break;
  4058. case cpu_to_le16(IEEE80211_STYPE_ATIM):
  4059. stats->mgmt[MANAGEMENT_ATIM]++;
  4060. break;
  4061. case cpu_to_le16(IEEE80211_STYPE_DISASSOC):
  4062. stats->mgmt[MANAGEMENT_DISASSOC]++;
  4063. break;
  4064. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  4065. stats->mgmt[MANAGEMENT_AUTH]++;
  4066. break;
  4067. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  4068. stats->mgmt[MANAGEMENT_DEAUTH]++;
  4069. break;
  4070. case cpu_to_le16(IEEE80211_STYPE_ACTION):
  4071. stats->mgmt[MANAGEMENT_ACTION]++;
  4072. break;
  4073. }
  4074. } else if (ieee80211_is_ctl(fc)) {
  4075. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  4076. case cpu_to_le16(IEEE80211_STYPE_BACK_REQ):
  4077. stats->ctrl[CONTROL_BACK_REQ]++;
  4078. break;
  4079. case cpu_to_le16(IEEE80211_STYPE_BACK):
  4080. stats->ctrl[CONTROL_BACK]++;
  4081. break;
  4082. case cpu_to_le16(IEEE80211_STYPE_PSPOLL):
  4083. stats->ctrl[CONTROL_PSPOLL]++;
  4084. break;
  4085. case cpu_to_le16(IEEE80211_STYPE_RTS):
  4086. stats->ctrl[CONTROL_RTS]++;
  4087. break;
  4088. case cpu_to_le16(IEEE80211_STYPE_CTS):
  4089. stats->ctrl[CONTROL_CTS]++;
  4090. break;
  4091. case cpu_to_le16(IEEE80211_STYPE_ACK):
  4092. stats->ctrl[CONTROL_ACK]++;
  4093. break;
  4094. case cpu_to_le16(IEEE80211_STYPE_CFEND):
  4095. stats->ctrl[CONTROL_CFEND]++;
  4096. break;
  4097. case cpu_to_le16(IEEE80211_STYPE_CFENDACK):
  4098. stats->ctrl[CONTROL_CFENDACK]++;
  4099. break;
  4100. }
  4101. } else {
  4102. /* data */
  4103. stats->data_cnt++;
  4104. stats->data_bytes += len;
  4105. }
  4106. }
  4107. EXPORT_SYMBOL(il_update_stats);
  4108. #endif
  4109. int
  4110. il_force_reset(struct il_priv *il, bool external)
  4111. {
  4112. struct il_force_reset *force_reset;
  4113. if (test_bit(S_EXIT_PENDING, &il->status))
  4114. return -EINVAL;
  4115. force_reset = &il->force_reset;
  4116. force_reset->reset_request_count++;
  4117. if (!external) {
  4118. if (force_reset->last_force_reset_jiffies &&
  4119. time_after(force_reset->last_force_reset_jiffies +
  4120. force_reset->reset_duration, jiffies)) {
  4121. D_INFO("force reset rejected\n");
  4122. force_reset->reset_reject_count++;
  4123. return -EAGAIN;
  4124. }
  4125. }
  4126. force_reset->reset_success_count++;
  4127. force_reset->last_force_reset_jiffies = jiffies;
  4128. /*
  4129. * if the request is from external(ex: debugfs),
  4130. * then always perform the request in regardless the module
  4131. * parameter setting
  4132. * if the request is from internal (uCode error or driver
  4133. * detect failure), then fw_restart module parameter
  4134. * need to be check before performing firmware reload
  4135. */
  4136. if (!external && !il->cfg->mod_params->restart_fw) {
  4137. D_INFO("Cancel firmware reload based on "
  4138. "module parameter setting\n");
  4139. return 0;
  4140. }
  4141. IL_ERR("On demand firmware reload\n");
  4142. /* Set the FW error flag -- cleared on il_down */
  4143. set_bit(S_FW_ERROR, &il->status);
  4144. wake_up(&il->wait_command_queue);
  4145. /*
  4146. * Keep the restart process from trying to send host
  4147. * commands by clearing the INIT status bit
  4148. */
  4149. clear_bit(S_READY, &il->status);
  4150. queue_work(il->workqueue, &il->restart);
  4151. return 0;
  4152. }
  4153. int
  4154. il_mac_change_interface(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  4155. enum nl80211_iftype newtype, bool newp2p)
  4156. {
  4157. struct il_priv *il = hw->priv;
  4158. int err;
  4159. if (newp2p)
  4160. return -EOPNOTSUPP;
  4161. mutex_lock(&il->mutex);
  4162. if (!il->vif || !il_is_ready_rf(il)) {
  4163. /*
  4164. * Huh? But wait ... this can maybe happen when
  4165. * we're in the middle of a firmware restart!
  4166. */
  4167. err = -EBUSY;
  4168. goto out;
  4169. }
  4170. /* success */
  4171. il_teardown_interface(il, vif, true);
  4172. vif->type = newtype;
  4173. vif->p2p = false;
  4174. err = il_set_mode(il);
  4175. WARN_ON(err);
  4176. /*
  4177. * We've switched internally, but submitting to the
  4178. * device may have failed for some reason. Mask this
  4179. * error, because otherwise mac80211 will not switch
  4180. * (and set the interface type back) and we'll be
  4181. * out of sync with it.
  4182. */
  4183. err = 0;
  4184. out:
  4185. mutex_unlock(&il->mutex);
  4186. return err;
  4187. }
  4188. EXPORT_SYMBOL(il_mac_change_interface);
  4189. /*
  4190. * On every watchdog tick we check (latest) time stamp. If it does not
  4191. * change during timeout period and queue is not empty we reset firmware.
  4192. */
  4193. static int
  4194. il_check_stuck_queue(struct il_priv *il, int cnt)
  4195. {
  4196. struct il_tx_queue *txq = &il->txq[cnt];
  4197. struct il_queue *q = &txq->q;
  4198. unsigned long timeout;
  4199. int ret;
  4200. if (q->read_ptr == q->write_ptr) {
  4201. txq->time_stamp = jiffies;
  4202. return 0;
  4203. }
  4204. timeout =
  4205. txq->time_stamp +
  4206. msecs_to_jiffies(il->cfg->base_params->wd_timeout);
  4207. if (time_after(jiffies, timeout)) {
  4208. IL_ERR("Queue %d stuck for %u ms.\n", q->id,
  4209. il->cfg->base_params->wd_timeout);
  4210. ret = il_force_reset(il, false);
  4211. return (ret == -EAGAIN) ? 0 : 1;
  4212. }
  4213. return 0;
  4214. }
  4215. /*
  4216. * Making watchdog tick be a quarter of timeout assure we will
  4217. * discover the queue hung between timeout and 1.25*timeout
  4218. */
  4219. #define IL_WD_TICK(timeout) ((timeout) / 4)
  4220. /*
  4221. * Watchdog timer callback, we check each tx queue for stuck, if if hung
  4222. * we reset the firmware. If everything is fine just rearm the timer.
  4223. */
  4224. void
  4225. il_bg_watchdog(unsigned long data)
  4226. {
  4227. struct il_priv *il = (struct il_priv *)data;
  4228. int cnt;
  4229. unsigned long timeout;
  4230. if (test_bit(S_EXIT_PENDING, &il->status))
  4231. return;
  4232. timeout = il->cfg->base_params->wd_timeout;
  4233. if (timeout == 0)
  4234. return;
  4235. /* monitor and check for stuck cmd queue */
  4236. if (il_check_stuck_queue(il, il->cmd_queue))
  4237. return;
  4238. /* monitor and check for other stuck queues */
  4239. if (il_is_any_associated(il)) {
  4240. for (cnt = 0; cnt < il->hw_params.max_txq_num; cnt++) {
  4241. /* skip as we already checked the command queue */
  4242. if (cnt == il->cmd_queue)
  4243. continue;
  4244. if (il_check_stuck_queue(il, cnt))
  4245. return;
  4246. }
  4247. }
  4248. mod_timer(&il->watchdog,
  4249. jiffies + msecs_to_jiffies(IL_WD_TICK(timeout)));
  4250. }
  4251. EXPORT_SYMBOL(il_bg_watchdog);
  4252. void
  4253. il_setup_watchdog(struct il_priv *il)
  4254. {
  4255. unsigned int timeout = il->cfg->base_params->wd_timeout;
  4256. if (timeout)
  4257. mod_timer(&il->watchdog,
  4258. jiffies + msecs_to_jiffies(IL_WD_TICK(timeout)));
  4259. else
  4260. del_timer(&il->watchdog);
  4261. }
  4262. EXPORT_SYMBOL(il_setup_watchdog);
  4263. /*
  4264. * extended beacon time format
  4265. * time in usec will be changed into a 32-bit value in extended:internal format
  4266. * the extended part is the beacon counts
  4267. * the internal part is the time in usec within one beacon interval
  4268. */
  4269. u32
  4270. il_usecs_to_beacons(struct il_priv *il, u32 usec, u32 beacon_interval)
  4271. {
  4272. u32 quot;
  4273. u32 rem;
  4274. u32 interval = beacon_interval * TIME_UNIT;
  4275. if (!interval || !usec)
  4276. return 0;
  4277. quot =
  4278. (usec /
  4279. interval) & (il_beacon_time_mask_high(il,
  4280. il->hw_params.
  4281. beacon_time_tsf_bits) >> il->
  4282. hw_params.beacon_time_tsf_bits);
  4283. rem =
  4284. (usec % interval) & il_beacon_time_mask_low(il,
  4285. il->hw_params.
  4286. beacon_time_tsf_bits);
  4287. return (quot << il->hw_params.beacon_time_tsf_bits) + rem;
  4288. }
  4289. EXPORT_SYMBOL(il_usecs_to_beacons);
  4290. /* base is usually what we get from ucode with each received frame,
  4291. * the same as HW timer counter counting down
  4292. */
  4293. __le32
  4294. il_add_beacon_time(struct il_priv *il, u32 base, u32 addon,
  4295. u32 beacon_interval)
  4296. {
  4297. u32 base_low = base & il_beacon_time_mask_low(il,
  4298. il->hw_params.
  4299. beacon_time_tsf_bits);
  4300. u32 addon_low = addon & il_beacon_time_mask_low(il,
  4301. il->hw_params.
  4302. beacon_time_tsf_bits);
  4303. u32 interval = beacon_interval * TIME_UNIT;
  4304. u32 res = (base & il_beacon_time_mask_high(il,
  4305. il->hw_params.
  4306. beacon_time_tsf_bits)) +
  4307. (addon & il_beacon_time_mask_high(il,
  4308. il->hw_params.
  4309. beacon_time_tsf_bits));
  4310. if (base_low > addon_low)
  4311. res += base_low - addon_low;
  4312. else if (base_low < addon_low) {
  4313. res += interval + base_low - addon_low;
  4314. res += (1 << il->hw_params.beacon_time_tsf_bits);
  4315. } else
  4316. res += (1 << il->hw_params.beacon_time_tsf_bits);
  4317. return cpu_to_le32(res);
  4318. }
  4319. EXPORT_SYMBOL(il_add_beacon_time);
  4320. #ifdef CONFIG_PM
  4321. int
  4322. il_pci_suspend(struct device *device)
  4323. {
  4324. struct pci_dev *pdev = to_pci_dev(device);
  4325. struct il_priv *il = pci_get_drvdata(pdev);
  4326. /*
  4327. * This function is called when system goes into suspend state
  4328. * mac80211 will call il_mac_stop() from the mac80211 suspend function
  4329. * first but since il_mac_stop() has no knowledge of who the caller is,
  4330. * it will not call apm_ops.stop() to stop the DMA operation.
  4331. * Calling apm_ops.stop here to make sure we stop the DMA.
  4332. */
  4333. il_apm_stop(il);
  4334. return 0;
  4335. }
  4336. EXPORT_SYMBOL(il_pci_suspend);
  4337. int
  4338. il_pci_resume(struct device *device)
  4339. {
  4340. struct pci_dev *pdev = to_pci_dev(device);
  4341. struct il_priv *il = pci_get_drvdata(pdev);
  4342. bool hw_rfkill = false;
  4343. /*
  4344. * We disable the RETRY_TIMEOUT register (0x41) to keep
  4345. * PCI Tx retries from interfering with C3 CPU state.
  4346. */
  4347. pci_write_config_byte(pdev, PCI_CFG_RETRY_TIMEOUT, 0x00);
  4348. il_enable_interrupts(il);
  4349. if (!(_il_rd(il, CSR_GP_CNTRL) & CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW))
  4350. hw_rfkill = true;
  4351. if (hw_rfkill)
  4352. set_bit(S_RF_KILL_HW, &il->status);
  4353. else
  4354. clear_bit(S_RF_KILL_HW, &il->status);
  4355. wiphy_rfkill_set_hw_state(il->hw->wiphy, hw_rfkill);
  4356. return 0;
  4357. }
  4358. EXPORT_SYMBOL(il_pci_resume);
  4359. const struct dev_pm_ops il_pm_ops = {
  4360. .suspend = il_pci_suspend,
  4361. .resume = il_pci_resume,
  4362. .freeze = il_pci_suspend,
  4363. .thaw = il_pci_resume,
  4364. .poweroff = il_pci_suspend,
  4365. .restore = il_pci_resume,
  4366. };
  4367. EXPORT_SYMBOL(il_pm_ops);
  4368. #endif /* CONFIG_PM */
  4369. static void
  4370. il_update_qos(struct il_priv *il)
  4371. {
  4372. if (test_bit(S_EXIT_PENDING, &il->status))
  4373. return;
  4374. il->qos_data.def_qos_parm.qos_flags = 0;
  4375. if (il->qos_data.qos_active)
  4376. il->qos_data.def_qos_parm.qos_flags |=
  4377. QOS_PARAM_FLG_UPDATE_EDCA_MSK;
  4378. if (il->ht.enabled)
  4379. il->qos_data.def_qos_parm.qos_flags |= QOS_PARAM_FLG_TGN_MSK;
  4380. D_QOS("send QoS cmd with Qos active=%d FLAGS=0x%X\n",
  4381. il->qos_data.qos_active, il->qos_data.def_qos_parm.qos_flags);
  4382. il_send_cmd_pdu_async(il, C_QOS_PARAM, sizeof(struct il_qosparam_cmd),
  4383. &il->qos_data.def_qos_parm, NULL);
  4384. }
  4385. /**
  4386. * il_mac_config - mac80211 config callback
  4387. */
  4388. int
  4389. il_mac_config(struct ieee80211_hw *hw, u32 changed)
  4390. {
  4391. struct il_priv *il = hw->priv;
  4392. const struct il_channel_info *ch_info;
  4393. struct ieee80211_conf *conf = &hw->conf;
  4394. struct ieee80211_channel *channel = conf->channel;
  4395. struct il_ht_config *ht_conf = &il->current_ht_config;
  4396. unsigned long flags = 0;
  4397. int ret = 0;
  4398. u16 ch;
  4399. int scan_active = 0;
  4400. bool ht_changed = false;
  4401. if (WARN_ON(!il->cfg->ops->legacy))
  4402. return -EOPNOTSUPP;
  4403. mutex_lock(&il->mutex);
  4404. D_MAC80211("enter to channel %d changed 0x%X\n", channel->hw_value,
  4405. changed);
  4406. if (unlikely(test_bit(S_SCANNING, &il->status))) {
  4407. scan_active = 1;
  4408. D_MAC80211("scan active\n");
  4409. }
  4410. if (changed &
  4411. (IEEE80211_CONF_CHANGE_SMPS | IEEE80211_CONF_CHANGE_CHANNEL)) {
  4412. /* mac80211 uses static for non-HT which is what we want */
  4413. il->current_ht_config.smps = conf->smps_mode;
  4414. /*
  4415. * Recalculate chain counts.
  4416. *
  4417. * If monitor mode is enabled then mac80211 will
  4418. * set up the SM PS mode to OFF if an HT channel is
  4419. * configured.
  4420. */
  4421. if (il->cfg->ops->hcmd->set_rxon_chain)
  4422. il->cfg->ops->hcmd->set_rxon_chain(il);
  4423. }
  4424. /* during scanning mac80211 will delay channel setting until
  4425. * scan finish with changed = 0
  4426. */
  4427. if (!changed || (changed & IEEE80211_CONF_CHANGE_CHANNEL)) {
  4428. if (scan_active)
  4429. goto set_ch_out;
  4430. ch = channel->hw_value;
  4431. ch_info = il_get_channel_info(il, channel->band, ch);
  4432. if (!il_is_channel_valid(ch_info)) {
  4433. D_MAC80211("leave - invalid channel\n");
  4434. ret = -EINVAL;
  4435. goto set_ch_out;
  4436. }
  4437. if (il->iw_mode == NL80211_IFTYPE_ADHOC &&
  4438. !il_is_channel_ibss(ch_info)) {
  4439. D_MAC80211("leave - not IBSS channel\n");
  4440. ret = -EINVAL;
  4441. goto set_ch_out;
  4442. }
  4443. spin_lock_irqsave(&il->lock, flags);
  4444. /* Configure HT40 channels */
  4445. if (il->ht.enabled != conf_is_ht(conf)) {
  4446. il->ht.enabled = conf_is_ht(conf);
  4447. ht_changed = true;
  4448. }
  4449. if (il->ht.enabled) {
  4450. if (conf_is_ht40_minus(conf)) {
  4451. il->ht.extension_chan_offset =
  4452. IEEE80211_HT_PARAM_CHA_SEC_BELOW;
  4453. il->ht.is_40mhz = true;
  4454. } else if (conf_is_ht40_plus(conf)) {
  4455. il->ht.extension_chan_offset =
  4456. IEEE80211_HT_PARAM_CHA_SEC_ABOVE;
  4457. il->ht.is_40mhz = true;
  4458. } else {
  4459. il->ht.extension_chan_offset =
  4460. IEEE80211_HT_PARAM_CHA_SEC_NONE;
  4461. il->ht.is_40mhz = false;
  4462. }
  4463. } else
  4464. il->ht.is_40mhz = false;
  4465. /*
  4466. * Default to no protection. Protection mode will
  4467. * later be set from BSS config in il_ht_conf
  4468. */
  4469. il->ht.protection = IEEE80211_HT_OP_MODE_PROTECTION_NONE;
  4470. /* if we are switching from ht to 2.4 clear flags
  4471. * from any ht related info since 2.4 does not
  4472. * support ht */
  4473. if ((le16_to_cpu(il->staging.channel) != ch))
  4474. il->staging.flags = 0;
  4475. il_set_rxon_channel(il, channel);
  4476. il_set_rxon_ht(il, ht_conf);
  4477. il_set_flags_for_band(il, channel->band, il->vif);
  4478. spin_unlock_irqrestore(&il->lock, flags);
  4479. if (il->cfg->ops->legacy->update_bcast_stations)
  4480. ret = il->cfg->ops->legacy->update_bcast_stations(il);
  4481. set_ch_out:
  4482. /* The list of supported rates and rate mask can be different
  4483. * for each band; since the band may have changed, reset
  4484. * the rate mask to what mac80211 lists */
  4485. il_set_rate(il);
  4486. }
  4487. if (changed & (IEEE80211_CONF_CHANGE_PS | IEEE80211_CONF_CHANGE_IDLE)) {
  4488. ret = il_power_update_mode(il, false);
  4489. if (ret)
  4490. D_MAC80211("Error setting sleep level\n");
  4491. }
  4492. if (changed & IEEE80211_CONF_CHANGE_POWER) {
  4493. D_MAC80211("TX Power old=%d new=%d\n", il->tx_power_user_lmt,
  4494. conf->power_level);
  4495. il_set_tx_power(il, conf->power_level, false);
  4496. }
  4497. if (!il_is_ready(il)) {
  4498. D_MAC80211("leave - not ready\n");
  4499. goto out;
  4500. }
  4501. if (scan_active)
  4502. goto out;
  4503. if (memcmp(&il->active, &il->staging, sizeof(il->staging)))
  4504. il_commit_rxon(il);
  4505. else
  4506. D_INFO("Not re-sending same RXON configuration.\n");
  4507. if (ht_changed)
  4508. il_update_qos(il);
  4509. out:
  4510. D_MAC80211("leave\n");
  4511. mutex_unlock(&il->mutex);
  4512. return ret;
  4513. }
  4514. EXPORT_SYMBOL(il_mac_config);
  4515. void
  4516. il_mac_reset_tsf(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  4517. {
  4518. struct il_priv *il = hw->priv;
  4519. unsigned long flags;
  4520. if (WARN_ON(!il->cfg->ops->legacy))
  4521. return;
  4522. mutex_lock(&il->mutex);
  4523. D_MAC80211("enter\n");
  4524. spin_lock_irqsave(&il->lock, flags);
  4525. memset(&il->current_ht_config, 0, sizeof(struct il_ht_config));
  4526. spin_unlock_irqrestore(&il->lock, flags);
  4527. spin_lock_irqsave(&il->lock, flags);
  4528. /* new association get rid of ibss beacon skb */
  4529. if (il->beacon_skb)
  4530. dev_kfree_skb(il->beacon_skb);
  4531. il->beacon_skb = NULL;
  4532. il->timestamp = 0;
  4533. spin_unlock_irqrestore(&il->lock, flags);
  4534. il_scan_cancel_timeout(il, 100);
  4535. if (!il_is_ready_rf(il)) {
  4536. D_MAC80211("leave - not ready\n");
  4537. mutex_unlock(&il->mutex);
  4538. return;
  4539. }
  4540. /* we are restarting association process
  4541. * clear RXON_FILTER_ASSOC_MSK bit
  4542. */
  4543. il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4544. il_commit_rxon(il);
  4545. il_set_rate(il);
  4546. mutex_unlock(&il->mutex);
  4547. D_MAC80211("leave\n");
  4548. }
  4549. EXPORT_SYMBOL(il_mac_reset_tsf);
  4550. static void
  4551. il_ht_conf(struct il_priv *il, struct ieee80211_vif *vif)
  4552. {
  4553. struct il_ht_config *ht_conf = &il->current_ht_config;
  4554. struct ieee80211_sta *sta;
  4555. struct ieee80211_bss_conf *bss_conf = &vif->bss_conf;
  4556. D_ASSOC("enter:\n");
  4557. if (!il->ht.enabled)
  4558. return;
  4559. il->ht.protection =
  4560. bss_conf->ht_operation_mode & IEEE80211_HT_OP_MODE_PROTECTION;
  4561. il->ht.non_gf_sta_present =
  4562. !!(bss_conf->
  4563. ht_operation_mode & IEEE80211_HT_OP_MODE_NON_GF_STA_PRSNT);
  4564. ht_conf->single_chain_sufficient = false;
  4565. switch (vif->type) {
  4566. case NL80211_IFTYPE_STATION:
  4567. rcu_read_lock();
  4568. sta = ieee80211_find_sta(vif, bss_conf->bssid);
  4569. if (sta) {
  4570. struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
  4571. int maxstreams;
  4572. maxstreams =
  4573. (ht_cap->mcs.
  4574. tx_params & IEEE80211_HT_MCS_TX_MAX_STREAMS_MASK)
  4575. >> IEEE80211_HT_MCS_TX_MAX_STREAMS_SHIFT;
  4576. maxstreams += 1;
  4577. if (ht_cap->mcs.rx_mask[1] == 0 &&
  4578. ht_cap->mcs.rx_mask[2] == 0)
  4579. ht_conf->single_chain_sufficient = true;
  4580. if (maxstreams <= 1)
  4581. ht_conf->single_chain_sufficient = true;
  4582. } else {
  4583. /*
  4584. * If at all, this can only happen through a race
  4585. * when the AP disconnects us while we're still
  4586. * setting up the connection, in that case mac80211
  4587. * will soon tell us about that.
  4588. */
  4589. ht_conf->single_chain_sufficient = true;
  4590. }
  4591. rcu_read_unlock();
  4592. break;
  4593. case NL80211_IFTYPE_ADHOC:
  4594. ht_conf->single_chain_sufficient = true;
  4595. break;
  4596. default:
  4597. break;
  4598. }
  4599. D_ASSOC("leave\n");
  4600. }
  4601. static inline void
  4602. il_set_no_assoc(struct il_priv *il, struct ieee80211_vif *vif)
  4603. {
  4604. /*
  4605. * inform the ucode that there is no longer an
  4606. * association and that no more packets should be
  4607. * sent
  4608. */
  4609. il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4610. il->staging.assoc_id = 0;
  4611. il_commit_rxon(il);
  4612. }
  4613. static void
  4614. il_beacon_update(struct ieee80211_hw *hw, struct ieee80211_vif *vif)
  4615. {
  4616. struct il_priv *il = hw->priv;
  4617. unsigned long flags;
  4618. __le64 timestamp;
  4619. struct sk_buff *skb = ieee80211_beacon_get(hw, vif);
  4620. if (!skb)
  4621. return;
  4622. D_MAC80211("enter\n");
  4623. lockdep_assert_held(&il->mutex);
  4624. if (!il->beacon_enabled) {
  4625. IL_ERR("update beacon with no beaconing enabled\n");
  4626. dev_kfree_skb(skb);
  4627. return;
  4628. }
  4629. spin_lock_irqsave(&il->lock, flags);
  4630. if (il->beacon_skb)
  4631. dev_kfree_skb(il->beacon_skb);
  4632. il->beacon_skb = skb;
  4633. timestamp = ((struct ieee80211_mgmt *)skb->data)->u.beacon.timestamp;
  4634. il->timestamp = le64_to_cpu(timestamp);
  4635. D_MAC80211("leave\n");
  4636. spin_unlock_irqrestore(&il->lock, flags);
  4637. if (!il_is_ready_rf(il)) {
  4638. D_MAC80211("leave - RF not ready\n");
  4639. return;
  4640. }
  4641. il->cfg->ops->legacy->post_associate(il);
  4642. }
  4643. void
  4644. il_mac_bss_info_changed(struct ieee80211_hw *hw, struct ieee80211_vif *vif,
  4645. struct ieee80211_bss_conf *bss_conf, u32 changes)
  4646. {
  4647. struct il_priv *il = hw->priv;
  4648. int ret;
  4649. if (WARN_ON(!il->cfg->ops->legacy))
  4650. return;
  4651. D_MAC80211("changes = 0x%X\n", changes);
  4652. mutex_lock(&il->mutex);
  4653. if (!il_is_alive(il)) {
  4654. mutex_unlock(&il->mutex);
  4655. return;
  4656. }
  4657. if (changes & BSS_CHANGED_QOS) {
  4658. unsigned long flags;
  4659. spin_lock_irqsave(&il->lock, flags);
  4660. il->qos_data.qos_active = bss_conf->qos;
  4661. il_update_qos(il);
  4662. spin_unlock_irqrestore(&il->lock, flags);
  4663. }
  4664. if (changes & BSS_CHANGED_BEACON_ENABLED) {
  4665. /* FIXME: can we remove beacon_enabled ? */
  4666. if (vif->bss_conf.enable_beacon)
  4667. il->beacon_enabled = true;
  4668. else
  4669. il->beacon_enabled = false;
  4670. }
  4671. if (changes & BSS_CHANGED_BSSID) {
  4672. D_MAC80211("BSSID %pM\n", bss_conf->bssid);
  4673. /*
  4674. * If there is currently a HW scan going on in the
  4675. * background then we need to cancel it else the RXON
  4676. * below/in post_associate will fail.
  4677. */
  4678. if (il_scan_cancel_timeout(il, 100)) {
  4679. IL_WARN("Aborted scan still in progress after 100ms\n");
  4680. D_MAC80211("leaving - scan abort failed.\n");
  4681. mutex_unlock(&il->mutex);
  4682. return;
  4683. }
  4684. /* mac80211 only sets assoc when in STATION mode */
  4685. if (vif->type == NL80211_IFTYPE_ADHOC || bss_conf->assoc) {
  4686. memcpy(il->staging.bssid_addr, bss_conf->bssid,
  4687. ETH_ALEN);
  4688. /* currently needed in a few places */
  4689. memcpy(il->bssid, bss_conf->bssid, ETH_ALEN);
  4690. } else {
  4691. il->staging.filter_flags &= ~RXON_FILTER_ASSOC_MSK;
  4692. }
  4693. }
  4694. /*
  4695. * This needs to be after setting the BSSID in case
  4696. * mac80211 decides to do both changes at once because
  4697. * it will invoke post_associate.
  4698. */
  4699. if (vif->type == NL80211_IFTYPE_ADHOC && (changes & BSS_CHANGED_BEACON))
  4700. il_beacon_update(hw, vif);
  4701. if (changes & BSS_CHANGED_ERP_PREAMBLE) {
  4702. D_MAC80211("ERP_PREAMBLE %d\n", bss_conf->use_short_preamble);
  4703. if (bss_conf->use_short_preamble)
  4704. il->staging.flags |= RXON_FLG_SHORT_PREAMBLE_MSK;
  4705. else
  4706. il->staging.flags &= ~RXON_FLG_SHORT_PREAMBLE_MSK;
  4707. }
  4708. if (changes & BSS_CHANGED_ERP_CTS_PROT) {
  4709. D_MAC80211("ERP_CTS %d\n", bss_conf->use_cts_prot);
  4710. if (bss_conf->use_cts_prot && il->band != IEEE80211_BAND_5GHZ)
  4711. il->staging.flags |= RXON_FLG_TGG_PROTECT_MSK;
  4712. else
  4713. il->staging.flags &= ~RXON_FLG_TGG_PROTECT_MSK;
  4714. if (bss_conf->use_cts_prot)
  4715. il->staging.flags |= RXON_FLG_SELF_CTS_EN;
  4716. else
  4717. il->staging.flags &= ~RXON_FLG_SELF_CTS_EN;
  4718. }
  4719. if (changes & BSS_CHANGED_BASIC_RATES) {
  4720. /* XXX use this information
  4721. *
  4722. * To do that, remove code from il_set_rate() and put something
  4723. * like this here:
  4724. *
  4725. if (A-band)
  4726. il->staging.ofdm_basic_rates =
  4727. bss_conf->basic_rates;
  4728. else
  4729. il->staging.ofdm_basic_rates =
  4730. bss_conf->basic_rates >> 4;
  4731. il->staging.cck_basic_rates =
  4732. bss_conf->basic_rates & 0xF;
  4733. */
  4734. }
  4735. if (changes & BSS_CHANGED_HT) {
  4736. il_ht_conf(il, vif);
  4737. if (il->cfg->ops->hcmd->set_rxon_chain)
  4738. il->cfg->ops->hcmd->set_rxon_chain(il);
  4739. }
  4740. if (changes & BSS_CHANGED_ASSOC) {
  4741. D_MAC80211("ASSOC %d\n", bss_conf->assoc);
  4742. if (bss_conf->assoc) {
  4743. il->timestamp = bss_conf->timestamp;
  4744. if (!il_is_rfkill(il))
  4745. il->cfg->ops->legacy->post_associate(il);
  4746. } else
  4747. il_set_no_assoc(il, vif);
  4748. }
  4749. if (changes && il_is_associated(il) && bss_conf->aid) {
  4750. D_MAC80211("Changes (%#x) while associated\n", changes);
  4751. ret = il_send_rxon_assoc(il);
  4752. if (!ret) {
  4753. /* Sync active_rxon with latest change. */
  4754. memcpy((void *)&il->active, &il->staging,
  4755. sizeof(struct il_rxon_cmd));
  4756. }
  4757. }
  4758. if (changes & BSS_CHANGED_BEACON_ENABLED) {
  4759. if (vif->bss_conf.enable_beacon) {
  4760. memcpy(il->staging.bssid_addr, bss_conf->bssid,
  4761. ETH_ALEN);
  4762. memcpy(il->bssid, bss_conf->bssid, ETH_ALEN);
  4763. il->cfg->ops->legacy->config_ap(il);
  4764. } else
  4765. il_set_no_assoc(il, vif);
  4766. }
  4767. if (changes & BSS_CHANGED_IBSS) {
  4768. ret =
  4769. il->cfg->ops->legacy->manage_ibss_station(il, vif,
  4770. bss_conf->
  4771. ibss_joined);
  4772. if (ret)
  4773. IL_ERR("failed to %s IBSS station %pM\n",
  4774. bss_conf->ibss_joined ? "add" : "remove",
  4775. bss_conf->bssid);
  4776. }
  4777. mutex_unlock(&il->mutex);
  4778. D_MAC80211("leave\n");
  4779. }
  4780. EXPORT_SYMBOL(il_mac_bss_info_changed);
  4781. irqreturn_t
  4782. il_isr(int irq, void *data)
  4783. {
  4784. struct il_priv *il = data;
  4785. u32 inta, inta_mask;
  4786. u32 inta_fh;
  4787. unsigned long flags;
  4788. if (!il)
  4789. return IRQ_NONE;
  4790. spin_lock_irqsave(&il->lock, flags);
  4791. /* Disable (but don't clear!) interrupts here to avoid
  4792. * back-to-back ISRs and sporadic interrupts from our NIC.
  4793. * If we have something to service, the tasklet will re-enable ints.
  4794. * If we *don't* have something, we'll re-enable before leaving here. */
  4795. inta_mask = _il_rd(il, CSR_INT_MASK); /* just for debug */
  4796. _il_wr(il, CSR_INT_MASK, 0x00000000);
  4797. /* Discover which interrupts are active/pending */
  4798. inta = _il_rd(il, CSR_INT);
  4799. inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
  4800. /* Ignore interrupt if there's nothing in NIC to service.
  4801. * This may be due to IRQ shared with another device,
  4802. * or due to sporadic interrupts thrown from our NIC. */
  4803. if (!inta && !inta_fh) {
  4804. D_ISR("Ignore interrupt, inta == 0, inta_fh == 0\n");
  4805. goto none;
  4806. }
  4807. if (inta == 0xFFFFFFFF || (inta & 0xFFFFFFF0) == 0xa5a5a5a0) {
  4808. /* Hardware disappeared. It might have already raised
  4809. * an interrupt */
  4810. IL_WARN("HARDWARE GONE?? INTA == 0x%08x\n", inta);
  4811. goto unplugged;
  4812. }
  4813. D_ISR("ISR inta 0x%08x, enabled 0x%08x, fh 0x%08x\n", inta, inta_mask,
  4814. inta_fh);
  4815. inta &= ~CSR_INT_BIT_SCD;
  4816. /* il_irq_tasklet() will service interrupts and re-enable them */
  4817. if (likely(inta || inta_fh))
  4818. tasklet_schedule(&il->irq_tasklet);
  4819. unplugged:
  4820. spin_unlock_irqrestore(&il->lock, flags);
  4821. return IRQ_HANDLED;
  4822. none:
  4823. /* re-enable interrupts here since we don't have anything to service. */
  4824. /* only Re-enable if disabled by irq */
  4825. if (test_bit(S_INT_ENABLED, &il->status))
  4826. il_enable_interrupts(il);
  4827. spin_unlock_irqrestore(&il->lock, flags);
  4828. return IRQ_NONE;
  4829. }
  4830. EXPORT_SYMBOL(il_isr);
  4831. /*
  4832. * il_tx_cmd_protection: Set rts/cts. 3945 and 4965 only share this
  4833. * function.
  4834. */
  4835. void
  4836. il_tx_cmd_protection(struct il_priv *il, struct ieee80211_tx_info *info,
  4837. __le16 fc, __le32 *tx_flags)
  4838. {
  4839. if (info->control.rates[0].flags & IEEE80211_TX_RC_USE_RTS_CTS) {
  4840. *tx_flags |= TX_CMD_FLG_RTS_MSK;
  4841. *tx_flags &= ~TX_CMD_FLG_CTS_MSK;
  4842. *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  4843. if (!ieee80211_is_mgmt(fc))
  4844. return;
  4845. switch (fc & cpu_to_le16(IEEE80211_FCTL_STYPE)) {
  4846. case cpu_to_le16(IEEE80211_STYPE_AUTH):
  4847. case cpu_to_le16(IEEE80211_STYPE_DEAUTH):
  4848. case cpu_to_le16(IEEE80211_STYPE_ASSOC_REQ):
  4849. case cpu_to_le16(IEEE80211_STYPE_REASSOC_REQ):
  4850. *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  4851. *tx_flags |= TX_CMD_FLG_CTS_MSK;
  4852. break;
  4853. }
  4854. } else if (info->control.rates[0].
  4855. flags & IEEE80211_TX_RC_USE_CTS_PROTECT) {
  4856. *tx_flags &= ~TX_CMD_FLG_RTS_MSK;
  4857. *tx_flags |= TX_CMD_FLG_CTS_MSK;
  4858. *tx_flags |= TX_CMD_FLG_FULL_TXOP_PROT_MSK;
  4859. }
  4860. }
  4861. EXPORT_SYMBOL(il_tx_cmd_protection);