eeprom.c 22 KB

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  1. /*!*****************************************************************************
  2. *!
  3. *! Implements an interface for i2c compatible eeproms to run under Linux.
  4. *! Supports 2k, 8k(?) and 16k. Uses adaptive timing adjustments by
  5. *! Johan.Adolfsson@axis.com
  6. *!
  7. *! Probing results:
  8. *! 8k or not is detected (the assumes 2k or 16k)
  9. *! 2k or 16k detected using test reads and writes.
  10. *!
  11. *!------------------------------------------------------------------------
  12. *! HISTORY
  13. *!
  14. *! DATE NAME CHANGES
  15. *! ---- ---- -------
  16. *! Aug 28 1999 Edgar Iglesias Initial Version
  17. *! Aug 31 1999 Edgar Iglesias Allow simultaneous users.
  18. *! Sep 03 1999 Edgar Iglesias Updated probe.
  19. *! Sep 03 1999 Edgar Iglesias Added bail-out stuff if we get interrupted
  20. *! in the spin-lock.
  21. *!
  22. *! (c) 1999 Axis Communications AB, Lund, Sweden
  23. *!*****************************************************************************/
  24. #include <linux/kernel.h>
  25. #include <linux/sched.h>
  26. #include <linux/fs.h>
  27. #include <linux/init.h>
  28. #include <linux/delay.h>
  29. #include <linux/interrupt.h>
  30. #include <linux/smp_lock.h>
  31. #include <linux/wait.h>
  32. #include <asm/uaccess.h>
  33. #include "i2c.h"
  34. #define D(x)
  35. /* If we should use adaptive timing or not: */
  36. /* #define EEPROM_ADAPTIVE_TIMING */
  37. #define EEPROM_MAJOR_NR 122 /* use a LOCAL/EXPERIMENTAL major for now */
  38. #define EEPROM_MINOR_NR 0
  39. /* Empirical sane initial value of the delay, the value will be adapted to
  40. * what the chip needs when using EEPROM_ADAPTIVE_TIMING.
  41. */
  42. #define INITIAL_WRITEDELAY_US 4000
  43. #define MAX_WRITEDELAY_US 10000 /* 10 ms according to spec for 2KB EEPROM */
  44. /* This one defines how many times to try when eeprom fails. */
  45. #define EEPROM_RETRIES 10
  46. #define EEPROM_2KB (2 * 1024)
  47. /*#define EEPROM_4KB (4 * 1024)*/ /* Exists but not used in Axis products */
  48. #define EEPROM_8KB (8 * 1024 - 1 ) /* Last byte has write protection bit */
  49. #define EEPROM_16KB (16 * 1024)
  50. #define i2c_delay(x) udelay(x)
  51. /*
  52. * This structure describes the attached eeprom chip.
  53. * The values are probed for.
  54. */
  55. struct eeprom_type
  56. {
  57. unsigned long size;
  58. unsigned long sequential_write_pagesize;
  59. unsigned char select_cmd;
  60. unsigned long usec_delay_writecycles; /* Min time between write cycles
  61. (up to 10ms for some models) */
  62. unsigned long usec_delay_step; /* For adaptive algorithm */
  63. int adapt_state; /* 1 = To high , 0 = Even, -1 = To low */
  64. /* this one is to keep the read/write operations atomic */
  65. struct mutex lock;
  66. int retry_cnt_addr; /* Used to keep track of number of retries for
  67. adaptive timing adjustments */
  68. int retry_cnt_read;
  69. };
  70. static int eeprom_open(struct inode * inode, struct file * file);
  71. static loff_t eeprom_lseek(struct file * file, loff_t offset, int orig);
  72. static ssize_t eeprom_read(struct file * file, char * buf, size_t count,
  73. loff_t *off);
  74. static ssize_t eeprom_write(struct file * file, const char * buf, size_t count,
  75. loff_t *off);
  76. static int eeprom_close(struct inode * inode, struct file * file);
  77. static int eeprom_address(unsigned long addr);
  78. static int read_from_eeprom(char * buf, int count);
  79. static int eeprom_write_buf(loff_t addr, const char * buf, int count);
  80. static int eeprom_read_buf(loff_t addr, char * buf, int count);
  81. static void eeprom_disable_write_protect(void);
  82. static const char eeprom_name[] = "eeprom";
  83. /* chip description */
  84. static struct eeprom_type eeprom;
  85. /* This is the exported file-operations structure for this device. */
  86. const struct file_operations eeprom_fops =
  87. {
  88. .llseek = eeprom_lseek,
  89. .read = eeprom_read,
  90. .write = eeprom_write,
  91. .open = eeprom_open,
  92. .release = eeprom_close
  93. };
  94. /* eeprom init call. Probes for different eeprom models. */
  95. int __init eeprom_init(void)
  96. {
  97. mutex_init(&eeprom.lock);
  98. #ifdef CONFIG_ETRAX_I2C_EEPROM_PROBE
  99. #define EETEXT "Found"
  100. #else
  101. #define EETEXT "Assuming"
  102. #endif
  103. if (register_chrdev(EEPROM_MAJOR_NR, eeprom_name, &eeprom_fops))
  104. {
  105. printk(KERN_INFO "%s: unable to get major %d for eeprom device\n",
  106. eeprom_name, EEPROM_MAJOR_NR);
  107. return -1;
  108. }
  109. printk("EEPROM char device v0.3, (c) 2000 Axis Communications AB\n");
  110. /*
  111. * Note: Most of this probing method was taken from the printserver (5470e)
  112. * codebase. It did not contain a way of finding the 16kB chips
  113. * (M24128 or variants). The method used here might not work
  114. * for all models. If you encounter problems the easiest way
  115. * is probably to define your model within #ifdef's, and hard-
  116. * code it.
  117. */
  118. eeprom.size = 0;
  119. eeprom.usec_delay_writecycles = INITIAL_WRITEDELAY_US;
  120. eeprom.usec_delay_step = 128;
  121. eeprom.adapt_state = 0;
  122. #ifdef CONFIG_ETRAX_I2C_EEPROM_PROBE
  123. i2c_start();
  124. i2c_outbyte(0x80);
  125. if(!i2c_getack())
  126. {
  127. /* It's not 8k.. */
  128. int success = 0;
  129. unsigned char buf_2k_start[16];
  130. /* Im not sure this will work... :) */
  131. /* assume 2kB, if failure go for 16kB */
  132. /* Test with 16kB settings.. */
  133. /* If it's a 2kB EEPROM and we address it outside it's range
  134. * it will mirror the address space:
  135. * 1. We read two locations (that are mirrored),
  136. * if the content differs * it's a 16kB EEPROM.
  137. * 2. if it doesn't differ - write different value to one of the locations,
  138. * check the other - if content still is the same it's a 2k EEPROM,
  139. * restore original data.
  140. */
  141. #define LOC1 8
  142. #define LOC2 (0x1fb) /*1fb, 3ed, 5df, 7d1 */
  143. /* 2k settings */
  144. i2c_stop();
  145. eeprom.size = EEPROM_2KB;
  146. eeprom.select_cmd = 0xA0;
  147. eeprom.sequential_write_pagesize = 16;
  148. if( eeprom_read_buf( 0, buf_2k_start, 16 ) == 16 )
  149. {
  150. D(printk("2k start: '%16.16s'\n", buf_2k_start));
  151. }
  152. else
  153. {
  154. printk(KERN_INFO "%s: Failed to read in 2k mode!\n", eeprom_name);
  155. }
  156. /* 16k settings */
  157. eeprom.size = EEPROM_16KB;
  158. eeprom.select_cmd = 0xA0;
  159. eeprom.sequential_write_pagesize = 64;
  160. {
  161. unsigned char loc1[4], loc2[4], tmp[4];
  162. if( eeprom_read_buf(LOC2, loc2, 4) == 4)
  163. {
  164. if( eeprom_read_buf(LOC1, loc1, 4) == 4)
  165. {
  166. D(printk("0 loc1: (%i) '%4.4s' loc2 (%i) '%4.4s'\n",
  167. LOC1, loc1, LOC2, loc2));
  168. #if 0
  169. if (memcmp(loc1, loc2, 4) != 0 )
  170. {
  171. /* It's 16k */
  172. printk(KERN_INFO "%s: 16k detected in step 1\n", eeprom_name);
  173. eeprom.size = EEPROM_16KB;
  174. success = 1;
  175. }
  176. else
  177. #endif
  178. {
  179. /* Do step 2 check */
  180. /* Invert value */
  181. loc1[0] = ~loc1[0];
  182. if (eeprom_write_buf(LOC1, loc1, 1) == 1)
  183. {
  184. /* If 2k EEPROM this write will actually write 10 bytes
  185. * from pos 0
  186. */
  187. D(printk("1 loc1: (%i) '%4.4s' loc2 (%i) '%4.4s'\n",
  188. LOC1, loc1, LOC2, loc2));
  189. if( eeprom_read_buf(LOC1, tmp, 4) == 4)
  190. {
  191. D(printk("2 loc1: (%i) '%4.4s' tmp '%4.4s'\n",
  192. LOC1, loc1, tmp));
  193. if (memcmp(loc1, tmp, 4) != 0 )
  194. {
  195. printk(KERN_INFO "%s: read and write differs! Not 16kB\n",
  196. eeprom_name);
  197. loc1[0] = ~loc1[0];
  198. if (eeprom_write_buf(LOC1, loc1, 1) == 1)
  199. {
  200. success = 1;
  201. }
  202. else
  203. {
  204. printk(KERN_INFO "%s: Restore 2k failed during probe,"
  205. " EEPROM might be corrupt!\n", eeprom_name);
  206. }
  207. i2c_stop();
  208. /* Go to 2k mode and write original data */
  209. eeprom.size = EEPROM_2KB;
  210. eeprom.select_cmd = 0xA0;
  211. eeprom.sequential_write_pagesize = 16;
  212. if( eeprom_write_buf(0, buf_2k_start, 16) == 16)
  213. {
  214. }
  215. else
  216. {
  217. printk(KERN_INFO "%s: Failed to write back 2k start!\n",
  218. eeprom_name);
  219. }
  220. eeprom.size = EEPROM_2KB;
  221. }
  222. }
  223. if(!success)
  224. {
  225. if( eeprom_read_buf(LOC2, loc2, 1) == 1)
  226. {
  227. D(printk("0 loc1: (%i) '%4.4s' loc2 (%i) '%4.4s'\n",
  228. LOC1, loc1, LOC2, loc2));
  229. if (memcmp(loc1, loc2, 4) == 0 )
  230. {
  231. /* Data the same, must be mirrored -> 2k */
  232. /* Restore data */
  233. printk(KERN_INFO "%s: 2k detected in step 2\n", eeprom_name);
  234. loc1[0] = ~loc1[0];
  235. if (eeprom_write_buf(LOC1, loc1, 1) == 1)
  236. {
  237. success = 1;
  238. }
  239. else
  240. {
  241. printk(KERN_INFO "%s: Restore 2k failed during probe,"
  242. " EEPROM might be corrupt!\n", eeprom_name);
  243. }
  244. eeprom.size = EEPROM_2KB;
  245. }
  246. else
  247. {
  248. printk(KERN_INFO "%s: 16k detected in step 2\n",
  249. eeprom_name);
  250. loc1[0] = ~loc1[0];
  251. /* Data differs, assume 16k */
  252. /* Restore data */
  253. if (eeprom_write_buf(LOC1, loc1, 1) == 1)
  254. {
  255. success = 1;
  256. }
  257. else
  258. {
  259. printk(KERN_INFO "%s: Restore 16k failed during probe,"
  260. " EEPROM might be corrupt!\n", eeprom_name);
  261. }
  262. eeprom.size = EEPROM_16KB;
  263. }
  264. }
  265. }
  266. }
  267. } /* read LOC1 */
  268. } /* address LOC1 */
  269. if (!success)
  270. {
  271. printk(KERN_INFO "%s: Probing failed!, using 2KB!\n", eeprom_name);
  272. eeprom.size = EEPROM_2KB;
  273. }
  274. } /* read */
  275. }
  276. }
  277. else
  278. {
  279. i2c_outbyte(0x00);
  280. if(!i2c_getack())
  281. {
  282. /* No 8k */
  283. eeprom.size = EEPROM_2KB;
  284. }
  285. else
  286. {
  287. i2c_start();
  288. i2c_outbyte(0x81);
  289. if (!i2c_getack())
  290. {
  291. eeprom.size = EEPROM_2KB;
  292. }
  293. else
  294. {
  295. /* It's a 8kB */
  296. i2c_inbyte();
  297. eeprom.size = EEPROM_8KB;
  298. }
  299. }
  300. }
  301. i2c_stop();
  302. #elif defined(CONFIG_ETRAX_I2C_EEPROM_16KB)
  303. eeprom.size = EEPROM_16KB;
  304. #elif defined(CONFIG_ETRAX_I2C_EEPROM_8KB)
  305. eeprom.size = EEPROM_8KB;
  306. #elif defined(CONFIG_ETRAX_I2C_EEPROM_2KB)
  307. eeprom.size = EEPROM_2KB;
  308. #endif
  309. switch(eeprom.size)
  310. {
  311. case (EEPROM_2KB):
  312. printk("%s: " EETEXT " i2c compatible 2kB eeprom.\n", eeprom_name);
  313. eeprom.sequential_write_pagesize = 16;
  314. eeprom.select_cmd = 0xA0;
  315. break;
  316. case (EEPROM_8KB):
  317. printk("%s: " EETEXT " i2c compatible 8kB eeprom.\n", eeprom_name);
  318. eeprom.sequential_write_pagesize = 16;
  319. eeprom.select_cmd = 0x80;
  320. break;
  321. case (EEPROM_16KB):
  322. printk("%s: " EETEXT " i2c compatible 16kB eeprom.\n", eeprom_name);
  323. eeprom.sequential_write_pagesize = 64;
  324. eeprom.select_cmd = 0xA0;
  325. break;
  326. default:
  327. eeprom.size = 0;
  328. printk("%s: Did not find a supported eeprom\n", eeprom_name);
  329. break;
  330. }
  331. eeprom_disable_write_protect();
  332. return 0;
  333. }
  334. /* Opens the device. */
  335. static int eeprom_open(struct inode * inode, struct file * file)
  336. {
  337. cycle_kernel_lock();
  338. if(iminor(inode) != EEPROM_MINOR_NR)
  339. return -ENXIO;
  340. if(imajor(inode) != EEPROM_MAJOR_NR)
  341. return -ENXIO;
  342. if( eeprom.size > 0 )
  343. {
  344. /* OK */
  345. return 0;
  346. }
  347. /* No EEprom found */
  348. return -EFAULT;
  349. }
  350. /* Changes the current file position. */
  351. static loff_t eeprom_lseek(struct file * file, loff_t offset, int orig)
  352. {
  353. /*
  354. * orig 0: position from begning of eeprom
  355. * orig 1: relative from current position
  356. * orig 2: position from last eeprom address
  357. */
  358. switch (orig)
  359. {
  360. case 0:
  361. file->f_pos = offset;
  362. break;
  363. case 1:
  364. file->f_pos += offset;
  365. break;
  366. case 2:
  367. file->f_pos = eeprom.size - offset;
  368. break;
  369. default:
  370. return -EINVAL;
  371. }
  372. /* truncate position */
  373. if (file->f_pos < 0)
  374. {
  375. file->f_pos = 0;
  376. return(-EOVERFLOW);
  377. }
  378. if (file->f_pos >= eeprom.size)
  379. {
  380. file->f_pos = eeprom.size - 1;
  381. return(-EOVERFLOW);
  382. }
  383. return ( file->f_pos );
  384. }
  385. /* Reads data from eeprom. */
  386. static int eeprom_read_buf(loff_t addr, char * buf, int count)
  387. {
  388. return eeprom_read(NULL, buf, count, &addr);
  389. }
  390. /* Reads data from eeprom. */
  391. static ssize_t eeprom_read(struct file * file, char * buf, size_t count, loff_t *off)
  392. {
  393. int read=0;
  394. unsigned long p = *off;
  395. unsigned char page;
  396. if(p >= eeprom.size) /* Address i 0 - (size-1) */
  397. {
  398. return -EFAULT;
  399. }
  400. if (mutex_lock_interruptible(&eeprom.lock))
  401. return -EINTR;
  402. page = (unsigned char) (p >> 8);
  403. if(!eeprom_address(p))
  404. {
  405. printk(KERN_INFO "%s: Read failed to address the eeprom: "
  406. "0x%08X (%i) page: %i\n", eeprom_name, (int)p, (int)p, page);
  407. i2c_stop();
  408. /* don't forget to wake them up */
  409. mutex_unlock(&eeprom.lock);
  410. return -EFAULT;
  411. }
  412. if( (p + count) > eeprom.size)
  413. {
  414. /* truncate count */
  415. count = eeprom.size - p;
  416. }
  417. /* stop dummy write op and initiate the read op */
  418. i2c_start();
  419. /* special case for small eeproms */
  420. if(eeprom.size < EEPROM_16KB)
  421. {
  422. i2c_outbyte( eeprom.select_cmd | 1 | (page << 1) );
  423. }
  424. /* go on with the actual read */
  425. read = read_from_eeprom( buf, count);
  426. if(read > 0)
  427. {
  428. *off += read;
  429. }
  430. mutex_unlock(&eeprom.lock);
  431. return read;
  432. }
  433. /* Writes data to eeprom. */
  434. static int eeprom_write_buf(loff_t addr, const char * buf, int count)
  435. {
  436. return eeprom_write(NULL, buf, count, &addr);
  437. }
  438. /* Writes data to eeprom. */
  439. static ssize_t eeprom_write(struct file * file, const char * buf, size_t count,
  440. loff_t *off)
  441. {
  442. int i, written, restart=1;
  443. unsigned long p;
  444. if (!access_ok(VERIFY_READ, buf, count))
  445. {
  446. return -EFAULT;
  447. }
  448. /* bail out if we get interrupted */
  449. if (mutex_lock_interruptible(&eeprom.lock))
  450. return -EINTR;
  451. for(i = 0; (i < EEPROM_RETRIES) && (restart > 0); i++)
  452. {
  453. restart = 0;
  454. written = 0;
  455. p = *off;
  456. while( (written < count) && (p < eeprom.size))
  457. {
  458. /* address the eeprom */
  459. if(!eeprom_address(p))
  460. {
  461. printk(KERN_INFO "%s: Write failed to address the eeprom: "
  462. "0x%08X (%i) \n", eeprom_name, (int)p, (int)p);
  463. i2c_stop();
  464. /* don't forget to wake them up */
  465. mutex_unlock(&eeprom.lock);
  466. return -EFAULT;
  467. }
  468. #ifdef EEPROM_ADAPTIVE_TIMING
  469. /* Adaptive algorithm to adjust timing */
  470. if (eeprom.retry_cnt_addr > 0)
  471. {
  472. /* To Low now */
  473. D(printk(">D=%i d=%i\n",
  474. eeprom.usec_delay_writecycles, eeprom.usec_delay_step));
  475. if (eeprom.usec_delay_step < 4)
  476. {
  477. eeprom.usec_delay_step++;
  478. eeprom.usec_delay_writecycles += eeprom.usec_delay_step;
  479. }
  480. else
  481. {
  482. if (eeprom.adapt_state > 0)
  483. {
  484. /* To Low before */
  485. eeprom.usec_delay_step *= 2;
  486. if (eeprom.usec_delay_step > 2)
  487. {
  488. eeprom.usec_delay_step--;
  489. }
  490. eeprom.usec_delay_writecycles += eeprom.usec_delay_step;
  491. }
  492. else if (eeprom.adapt_state < 0)
  493. {
  494. /* To High before (toggle dir) */
  495. eeprom.usec_delay_writecycles += eeprom.usec_delay_step;
  496. if (eeprom.usec_delay_step > 1)
  497. {
  498. eeprom.usec_delay_step /= 2;
  499. eeprom.usec_delay_step--;
  500. }
  501. }
  502. }
  503. eeprom.adapt_state = 1;
  504. }
  505. else
  506. {
  507. /* To High (or good) now */
  508. D(printk("<D=%i d=%i\n",
  509. eeprom.usec_delay_writecycles, eeprom.usec_delay_step));
  510. if (eeprom.adapt_state < 0)
  511. {
  512. /* To High before */
  513. if (eeprom.usec_delay_step > 1)
  514. {
  515. eeprom.usec_delay_step *= 2;
  516. eeprom.usec_delay_step--;
  517. if (eeprom.usec_delay_writecycles > eeprom.usec_delay_step)
  518. {
  519. eeprom.usec_delay_writecycles -= eeprom.usec_delay_step;
  520. }
  521. }
  522. }
  523. else if (eeprom.adapt_state > 0)
  524. {
  525. /* To Low before (toggle dir) */
  526. if (eeprom.usec_delay_writecycles > eeprom.usec_delay_step)
  527. {
  528. eeprom.usec_delay_writecycles -= eeprom.usec_delay_step;
  529. }
  530. if (eeprom.usec_delay_step > 1)
  531. {
  532. eeprom.usec_delay_step /= 2;
  533. eeprom.usec_delay_step--;
  534. }
  535. eeprom.adapt_state = -1;
  536. }
  537. if (eeprom.adapt_state > -100)
  538. {
  539. eeprom.adapt_state--;
  540. }
  541. else
  542. {
  543. /* Restart adaption */
  544. D(printk("#Restart\n"));
  545. eeprom.usec_delay_step++;
  546. }
  547. }
  548. #endif /* EEPROM_ADAPTIVE_TIMING */
  549. /* write until we hit a page boundary or count */
  550. do
  551. {
  552. i2c_outbyte(buf[written]);
  553. if(!i2c_getack())
  554. {
  555. restart=1;
  556. printk(KERN_INFO "%s: write error, retrying. %d\n", eeprom_name, i);
  557. i2c_stop();
  558. break;
  559. }
  560. written++;
  561. p++;
  562. } while( written < count && ( p % eeprom.sequential_write_pagesize ));
  563. /* end write cycle */
  564. i2c_stop();
  565. i2c_delay(eeprom.usec_delay_writecycles);
  566. } /* while */
  567. } /* for */
  568. mutex_unlock(&eeprom.lock);
  569. if (written == 0 && p >= eeprom.size){
  570. return -ENOSPC;
  571. }
  572. *off = p;
  573. return written;
  574. }
  575. /* Closes the device. */
  576. static int eeprom_close(struct inode * inode, struct file * file)
  577. {
  578. /* do nothing for now */
  579. return 0;
  580. }
  581. /* Sets the current address of the eeprom. */
  582. static int eeprom_address(unsigned long addr)
  583. {
  584. int i;
  585. unsigned char page, offset;
  586. page = (unsigned char) (addr >> 8);
  587. offset = (unsigned char) addr;
  588. for(i = 0; i < EEPROM_RETRIES; i++)
  589. {
  590. /* start a dummy write for addressing */
  591. i2c_start();
  592. if(eeprom.size == EEPROM_16KB)
  593. {
  594. i2c_outbyte( eeprom.select_cmd );
  595. i2c_getack();
  596. i2c_outbyte(page);
  597. }
  598. else
  599. {
  600. i2c_outbyte( eeprom.select_cmd | (page << 1) );
  601. }
  602. if(!i2c_getack())
  603. {
  604. /* retry */
  605. i2c_stop();
  606. /* Must have a delay here.. 500 works, >50, 100->works 5th time*/
  607. i2c_delay(MAX_WRITEDELAY_US / EEPROM_RETRIES * i);
  608. /* The chip needs up to 10 ms from write stop to next start */
  609. }
  610. else
  611. {
  612. i2c_outbyte(offset);
  613. if(!i2c_getack())
  614. {
  615. /* retry */
  616. i2c_stop();
  617. }
  618. else
  619. break;
  620. }
  621. }
  622. eeprom.retry_cnt_addr = i;
  623. D(printk("%i\n", eeprom.retry_cnt_addr));
  624. if(eeprom.retry_cnt_addr == EEPROM_RETRIES)
  625. {
  626. /* failed */
  627. return 0;
  628. }
  629. return 1;
  630. }
  631. /* Reads from current address. */
  632. static int read_from_eeprom(char * buf, int count)
  633. {
  634. int i, read=0;
  635. for(i = 0; i < EEPROM_RETRIES; i++)
  636. {
  637. if(eeprom.size == EEPROM_16KB)
  638. {
  639. i2c_outbyte( eeprom.select_cmd | 1 );
  640. }
  641. if(i2c_getack())
  642. {
  643. break;
  644. }
  645. }
  646. if(i == EEPROM_RETRIES)
  647. {
  648. printk(KERN_INFO "%s: failed to read from eeprom\n", eeprom_name);
  649. i2c_stop();
  650. return -EFAULT;
  651. }
  652. while( (read < count))
  653. {
  654. if (put_user(i2c_inbyte(), &buf[read++]))
  655. {
  656. i2c_stop();
  657. return -EFAULT;
  658. }
  659. /*
  660. * make sure we don't ack last byte or you will get very strange
  661. * results!
  662. */
  663. if(read < count)
  664. {
  665. i2c_sendack();
  666. }
  667. }
  668. /* stop the operation */
  669. i2c_stop();
  670. return read;
  671. }
  672. /* Disables write protection if applicable. */
  673. #define DBP_SAVE(x)
  674. #define ax_printf printk
  675. static void eeprom_disable_write_protect(void)
  676. {
  677. /* Disable write protect */
  678. if (eeprom.size == EEPROM_8KB)
  679. {
  680. /* Step 1 Set WEL = 1 (write 00000010 to address 1FFFh */
  681. i2c_start();
  682. i2c_outbyte(0xbe);
  683. if(!i2c_getack())
  684. {
  685. DBP_SAVE(ax_printf("Get ack returns false\n"));
  686. }
  687. i2c_outbyte(0xFF);
  688. if(!i2c_getack())
  689. {
  690. DBP_SAVE(ax_printf("Get ack returns false 2\n"));
  691. }
  692. i2c_outbyte(0x02);
  693. if(!i2c_getack())
  694. {
  695. DBP_SAVE(ax_printf("Get ack returns false 3\n"));
  696. }
  697. i2c_stop();
  698. i2c_delay(1000);
  699. /* Step 2 Set RWEL = 1 (write 00000110 to address 1FFFh */
  700. i2c_start();
  701. i2c_outbyte(0xbe);
  702. if(!i2c_getack())
  703. {
  704. DBP_SAVE(ax_printf("Get ack returns false 55\n"));
  705. }
  706. i2c_outbyte(0xFF);
  707. if(!i2c_getack())
  708. {
  709. DBP_SAVE(ax_printf("Get ack returns false 52\n"));
  710. }
  711. i2c_outbyte(0x06);
  712. if(!i2c_getack())
  713. {
  714. DBP_SAVE(ax_printf("Get ack returns false 53\n"));
  715. }
  716. i2c_stop();
  717. /* Step 3 Set BP1, BP0, and/or WPEN bits (write 00000110 to address 1FFFh */
  718. i2c_start();
  719. i2c_outbyte(0xbe);
  720. if(!i2c_getack())
  721. {
  722. DBP_SAVE(ax_printf("Get ack returns false 56\n"));
  723. }
  724. i2c_outbyte(0xFF);
  725. if(!i2c_getack())
  726. {
  727. DBP_SAVE(ax_printf("Get ack returns false 57\n"));
  728. }
  729. i2c_outbyte(0x06);
  730. if(!i2c_getack())
  731. {
  732. DBP_SAVE(ax_printf("Get ack returns false 58\n"));
  733. }
  734. i2c_stop();
  735. /* Write protect disabled */
  736. }
  737. }
  738. module_init(eeprom_init);