i2s.c 26 KB

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  1. /* sound/soc/samsung/i2s.c
  2. *
  3. * ALSA SoC Audio Layer - Samsung I2S Controller driver
  4. *
  5. * Copyright (c) 2010 Samsung Electronics Co. Ltd.
  6. * Jaswinder Singh <jassisinghbrar@gmail.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. #include <linux/delay.h>
  13. #include <linux/slab.h>
  14. #include <linux/clk.h>
  15. #include <linux/io.h>
  16. #include <linux/module.h>
  17. #include <linux/pm_runtime.h>
  18. #include <sound/soc.h>
  19. #include <sound/pcm_params.h>
  20. #include <linux/platform_data/asoc-s3c.h>
  21. #include "dma.h"
  22. #include "idma.h"
  23. #include "i2s.h"
  24. #include "i2s-regs.h"
  25. #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t)
  26. struct i2s_dai {
  27. /* Platform device for this DAI */
  28. struct platform_device *pdev;
  29. /* IOREMAP'd SFRs */
  30. void __iomem *addr;
  31. /* Physical base address of SFRs */
  32. u32 base;
  33. /* Rate of RCLK source clock */
  34. unsigned long rclk_srcrate;
  35. /* Frame Clock */
  36. unsigned frmclk;
  37. /*
  38. * Specifically requested RCLK,BCLK by MACHINE Driver.
  39. * 0 indicates CPU driver is free to choose any value.
  40. */
  41. unsigned rfs, bfs;
  42. /* I2S Controller's core clock */
  43. struct clk *clk;
  44. /* Clock for generating I2S signals */
  45. struct clk *op_clk;
  46. /* Pointer to the Primary_Fifo if this is Sec_Fifo, NULL otherwise */
  47. struct i2s_dai *pri_dai;
  48. /* Pointer to the Secondary_Fifo if it has one, NULL otherwise */
  49. struct i2s_dai *sec_dai;
  50. #define DAI_OPENED (1 << 0) /* Dai is opened */
  51. #define DAI_MANAGER (1 << 1) /* Dai is the manager */
  52. unsigned mode;
  53. /* Driver for this DAI */
  54. struct snd_soc_dai_driver i2s_dai_drv;
  55. /* DMA parameters */
  56. struct s3c_dma_params dma_playback;
  57. struct s3c_dma_params dma_capture;
  58. struct s3c_dma_params idma_playback;
  59. u32 quirks;
  60. u32 suspend_i2smod;
  61. u32 suspend_i2scon;
  62. u32 suspend_i2spsr;
  63. };
  64. /* Lock for cross i/f checks */
  65. static DEFINE_SPINLOCK(lock);
  66. /* If this is the 'overlay' stereo DAI */
  67. static inline bool is_secondary(struct i2s_dai *i2s)
  68. {
  69. return i2s->pri_dai ? true : false;
  70. }
  71. /* If operating in SoC-Slave mode */
  72. static inline bool is_slave(struct i2s_dai *i2s)
  73. {
  74. return (readl(i2s->addr + I2SMOD) & MOD_SLAVE) ? true : false;
  75. }
  76. /* If this interface of the controller is transmitting data */
  77. static inline bool tx_active(struct i2s_dai *i2s)
  78. {
  79. u32 active;
  80. if (!i2s)
  81. return false;
  82. active = readl(i2s->addr + I2SCON);
  83. if (is_secondary(i2s))
  84. active &= CON_TXSDMA_ACTIVE;
  85. else
  86. active &= CON_TXDMA_ACTIVE;
  87. return active ? true : false;
  88. }
  89. /* If the other interface of the controller is transmitting data */
  90. static inline bool other_tx_active(struct i2s_dai *i2s)
  91. {
  92. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  93. return tx_active(other);
  94. }
  95. /* If any interface of the controller is transmitting data */
  96. static inline bool any_tx_active(struct i2s_dai *i2s)
  97. {
  98. return tx_active(i2s) || other_tx_active(i2s);
  99. }
  100. /* If this interface of the controller is receiving data */
  101. static inline bool rx_active(struct i2s_dai *i2s)
  102. {
  103. u32 active;
  104. if (!i2s)
  105. return false;
  106. active = readl(i2s->addr + I2SCON) & CON_RXDMA_ACTIVE;
  107. return active ? true : false;
  108. }
  109. /* If the other interface of the controller is receiving data */
  110. static inline bool other_rx_active(struct i2s_dai *i2s)
  111. {
  112. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  113. return rx_active(other);
  114. }
  115. /* If any interface of the controller is receiving data */
  116. static inline bool any_rx_active(struct i2s_dai *i2s)
  117. {
  118. return rx_active(i2s) || other_rx_active(i2s);
  119. }
  120. /* If the other DAI is transmitting or receiving data */
  121. static inline bool other_active(struct i2s_dai *i2s)
  122. {
  123. return other_rx_active(i2s) || other_tx_active(i2s);
  124. }
  125. /* If this DAI is transmitting or receiving data */
  126. static inline bool this_active(struct i2s_dai *i2s)
  127. {
  128. return tx_active(i2s) || rx_active(i2s);
  129. }
  130. /* If the controller is active anyway */
  131. static inline bool any_active(struct i2s_dai *i2s)
  132. {
  133. return this_active(i2s) || other_active(i2s);
  134. }
  135. static inline struct i2s_dai *to_info(struct snd_soc_dai *dai)
  136. {
  137. return snd_soc_dai_get_drvdata(dai);
  138. }
  139. static inline bool is_opened(struct i2s_dai *i2s)
  140. {
  141. if (i2s && (i2s->mode & DAI_OPENED))
  142. return true;
  143. else
  144. return false;
  145. }
  146. static inline bool is_manager(struct i2s_dai *i2s)
  147. {
  148. if (is_opened(i2s) && (i2s->mode & DAI_MANAGER))
  149. return true;
  150. else
  151. return false;
  152. }
  153. /* Read RCLK of I2S (in multiples of LRCLK) */
  154. static inline unsigned get_rfs(struct i2s_dai *i2s)
  155. {
  156. u32 rfs = (readl(i2s->addr + I2SMOD) >> 3) & 0x3;
  157. switch (rfs) {
  158. case 3: return 768;
  159. case 2: return 384;
  160. case 1: return 512;
  161. default: return 256;
  162. }
  163. }
  164. /* Write RCLK of I2S (in multiples of LRCLK) */
  165. static inline void set_rfs(struct i2s_dai *i2s, unsigned rfs)
  166. {
  167. u32 mod = readl(i2s->addr + I2SMOD);
  168. mod &= ~MOD_RCLK_MASK;
  169. switch (rfs) {
  170. case 768:
  171. mod |= MOD_RCLK_768FS;
  172. break;
  173. case 512:
  174. mod |= MOD_RCLK_512FS;
  175. break;
  176. case 384:
  177. mod |= MOD_RCLK_384FS;
  178. break;
  179. default:
  180. mod |= MOD_RCLK_256FS;
  181. break;
  182. }
  183. writel(mod, i2s->addr + I2SMOD);
  184. }
  185. /* Read Bit-Clock of I2S (in multiples of LRCLK) */
  186. static inline unsigned get_bfs(struct i2s_dai *i2s)
  187. {
  188. u32 bfs = (readl(i2s->addr + I2SMOD) >> 1) & 0x3;
  189. switch (bfs) {
  190. case 3: return 24;
  191. case 2: return 16;
  192. case 1: return 48;
  193. default: return 32;
  194. }
  195. }
  196. /* Write Bit-Clock of I2S (in multiples of LRCLK) */
  197. static inline void set_bfs(struct i2s_dai *i2s, unsigned bfs)
  198. {
  199. u32 mod = readl(i2s->addr + I2SMOD);
  200. mod &= ~MOD_BCLK_MASK;
  201. switch (bfs) {
  202. case 48:
  203. mod |= MOD_BCLK_48FS;
  204. break;
  205. case 32:
  206. mod |= MOD_BCLK_32FS;
  207. break;
  208. case 24:
  209. mod |= MOD_BCLK_24FS;
  210. break;
  211. case 16:
  212. mod |= MOD_BCLK_16FS;
  213. break;
  214. default:
  215. dev_err(&i2s->pdev->dev, "Wrong BCLK Divider!\n");
  216. return;
  217. }
  218. writel(mod, i2s->addr + I2SMOD);
  219. }
  220. /* Sample-Size */
  221. static inline int get_blc(struct i2s_dai *i2s)
  222. {
  223. int blc = readl(i2s->addr + I2SMOD);
  224. blc = (blc >> 13) & 0x3;
  225. switch (blc) {
  226. case 2: return 24;
  227. case 1: return 8;
  228. default: return 16;
  229. }
  230. }
  231. /* TX Channel Control */
  232. static void i2s_txctrl(struct i2s_dai *i2s, int on)
  233. {
  234. void __iomem *addr = i2s->addr;
  235. u32 con = readl(addr + I2SCON);
  236. u32 mod = readl(addr + I2SMOD) & ~MOD_MASK;
  237. if (on) {
  238. con |= CON_ACTIVE;
  239. con &= ~CON_TXCH_PAUSE;
  240. if (is_secondary(i2s)) {
  241. con |= CON_TXSDMA_ACTIVE;
  242. con &= ~CON_TXSDMA_PAUSE;
  243. } else {
  244. con |= CON_TXDMA_ACTIVE;
  245. con &= ~CON_TXDMA_PAUSE;
  246. }
  247. if (any_rx_active(i2s))
  248. mod |= MOD_TXRX;
  249. else
  250. mod |= MOD_TXONLY;
  251. } else {
  252. if (is_secondary(i2s)) {
  253. con |= CON_TXSDMA_PAUSE;
  254. con &= ~CON_TXSDMA_ACTIVE;
  255. } else {
  256. con |= CON_TXDMA_PAUSE;
  257. con &= ~CON_TXDMA_ACTIVE;
  258. }
  259. if (other_tx_active(i2s)) {
  260. writel(con, addr + I2SCON);
  261. return;
  262. }
  263. con |= CON_TXCH_PAUSE;
  264. if (any_rx_active(i2s))
  265. mod |= MOD_RXONLY;
  266. else
  267. con &= ~CON_ACTIVE;
  268. }
  269. writel(mod, addr + I2SMOD);
  270. writel(con, addr + I2SCON);
  271. }
  272. /* RX Channel Control */
  273. static void i2s_rxctrl(struct i2s_dai *i2s, int on)
  274. {
  275. void __iomem *addr = i2s->addr;
  276. u32 con = readl(addr + I2SCON);
  277. u32 mod = readl(addr + I2SMOD) & ~MOD_MASK;
  278. if (on) {
  279. con |= CON_RXDMA_ACTIVE | CON_ACTIVE;
  280. con &= ~(CON_RXDMA_PAUSE | CON_RXCH_PAUSE);
  281. if (any_tx_active(i2s))
  282. mod |= MOD_TXRX;
  283. else
  284. mod |= MOD_RXONLY;
  285. } else {
  286. con |= CON_RXDMA_PAUSE | CON_RXCH_PAUSE;
  287. con &= ~CON_RXDMA_ACTIVE;
  288. if (any_tx_active(i2s))
  289. mod |= MOD_TXONLY;
  290. else
  291. con &= ~CON_ACTIVE;
  292. }
  293. writel(mod, addr + I2SMOD);
  294. writel(con, addr + I2SCON);
  295. }
  296. /* Flush FIFO of an interface */
  297. static inline void i2s_fifo(struct i2s_dai *i2s, u32 flush)
  298. {
  299. void __iomem *fic;
  300. u32 val;
  301. if (!i2s)
  302. return;
  303. if (is_secondary(i2s))
  304. fic = i2s->addr + I2SFICS;
  305. else
  306. fic = i2s->addr + I2SFIC;
  307. /* Flush the FIFO */
  308. writel(readl(fic) | flush, fic);
  309. /* Be patient */
  310. val = msecs_to_loops(1) / 1000; /* 1 usec */
  311. while (--val)
  312. cpu_relax();
  313. writel(readl(fic) & ~flush, fic);
  314. }
  315. static int i2s_set_sysclk(struct snd_soc_dai *dai,
  316. int clk_id, unsigned int rfs, int dir)
  317. {
  318. struct i2s_dai *i2s = to_info(dai);
  319. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  320. u32 mod = readl(i2s->addr + I2SMOD);
  321. switch (clk_id) {
  322. case SAMSUNG_I2S_CDCLK:
  323. /* Shouldn't matter in GATING(CLOCK_IN) mode */
  324. if (dir == SND_SOC_CLOCK_IN)
  325. rfs = 0;
  326. if ((rfs && other->rfs && (other->rfs != rfs)) ||
  327. (any_active(i2s) &&
  328. (((dir == SND_SOC_CLOCK_IN)
  329. && !(mod & MOD_CDCLKCON)) ||
  330. ((dir == SND_SOC_CLOCK_OUT)
  331. && (mod & MOD_CDCLKCON))))) {
  332. dev_err(&i2s->pdev->dev,
  333. "%s:%d Other DAI busy\n", __func__, __LINE__);
  334. return -EAGAIN;
  335. }
  336. if (dir == SND_SOC_CLOCK_IN)
  337. mod |= MOD_CDCLKCON;
  338. else
  339. mod &= ~MOD_CDCLKCON;
  340. i2s->rfs = rfs;
  341. break;
  342. case SAMSUNG_I2S_RCLKSRC_0: /* clock corrsponding to IISMOD[10] := 0 */
  343. case SAMSUNG_I2S_RCLKSRC_1: /* clock corrsponding to IISMOD[10] := 1 */
  344. if ((i2s->quirks & QUIRK_NO_MUXPSR)
  345. || (clk_id == SAMSUNG_I2S_RCLKSRC_0))
  346. clk_id = 0;
  347. else
  348. clk_id = 1;
  349. if (!any_active(i2s)) {
  350. if (i2s->op_clk) {
  351. if ((clk_id && !(mod & MOD_IMS_SYSMUX)) ||
  352. (!clk_id && (mod & MOD_IMS_SYSMUX))) {
  353. clk_disable_unprepare(i2s->op_clk);
  354. clk_put(i2s->op_clk);
  355. } else {
  356. i2s->rclk_srcrate =
  357. clk_get_rate(i2s->op_clk);
  358. return 0;
  359. }
  360. }
  361. if (clk_id)
  362. i2s->op_clk = clk_get(&i2s->pdev->dev,
  363. "i2s_opclk1");
  364. else
  365. i2s->op_clk = clk_get(&i2s->pdev->dev,
  366. "i2s_opclk0");
  367. clk_prepare_enable(i2s->op_clk);
  368. i2s->rclk_srcrate = clk_get_rate(i2s->op_clk);
  369. /* Over-ride the other's */
  370. if (other) {
  371. other->op_clk = i2s->op_clk;
  372. other->rclk_srcrate = i2s->rclk_srcrate;
  373. }
  374. } else if ((!clk_id && (mod & MOD_IMS_SYSMUX))
  375. || (clk_id && !(mod & MOD_IMS_SYSMUX))) {
  376. dev_err(&i2s->pdev->dev,
  377. "%s:%d Other DAI busy\n", __func__, __LINE__);
  378. return -EAGAIN;
  379. } else {
  380. /* Call can't be on the active DAI */
  381. i2s->op_clk = other->op_clk;
  382. i2s->rclk_srcrate = other->rclk_srcrate;
  383. return 0;
  384. }
  385. if (clk_id == 0)
  386. mod &= ~MOD_IMS_SYSMUX;
  387. else
  388. mod |= MOD_IMS_SYSMUX;
  389. break;
  390. default:
  391. dev_err(&i2s->pdev->dev, "We don't serve that!\n");
  392. return -EINVAL;
  393. }
  394. writel(mod, i2s->addr + I2SMOD);
  395. return 0;
  396. }
  397. static int i2s_set_fmt(struct snd_soc_dai *dai,
  398. unsigned int fmt)
  399. {
  400. struct i2s_dai *i2s = to_info(dai);
  401. u32 mod = readl(i2s->addr + I2SMOD);
  402. u32 tmp = 0;
  403. /* Format is priority */
  404. switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
  405. case SND_SOC_DAIFMT_RIGHT_J:
  406. tmp |= MOD_LR_RLOW;
  407. tmp |= MOD_SDF_MSB;
  408. break;
  409. case SND_SOC_DAIFMT_LEFT_J:
  410. tmp |= MOD_LR_RLOW;
  411. tmp |= MOD_SDF_LSB;
  412. break;
  413. case SND_SOC_DAIFMT_I2S:
  414. tmp |= MOD_SDF_IIS;
  415. break;
  416. default:
  417. dev_err(&i2s->pdev->dev, "Format not supported\n");
  418. return -EINVAL;
  419. }
  420. /*
  421. * INV flag is relative to the FORMAT flag - if set it simply
  422. * flips the polarity specified by the Standard
  423. */
  424. switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
  425. case SND_SOC_DAIFMT_NB_NF:
  426. break;
  427. case SND_SOC_DAIFMT_NB_IF:
  428. if (tmp & MOD_LR_RLOW)
  429. tmp &= ~MOD_LR_RLOW;
  430. else
  431. tmp |= MOD_LR_RLOW;
  432. break;
  433. default:
  434. dev_err(&i2s->pdev->dev, "Polarity not supported\n");
  435. return -EINVAL;
  436. }
  437. switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
  438. case SND_SOC_DAIFMT_CBM_CFM:
  439. tmp |= MOD_SLAVE;
  440. break;
  441. case SND_SOC_DAIFMT_CBS_CFS:
  442. /* Set default source clock in Master mode */
  443. if (i2s->rclk_srcrate == 0)
  444. i2s_set_sysclk(dai, SAMSUNG_I2S_RCLKSRC_0,
  445. 0, SND_SOC_CLOCK_IN);
  446. break;
  447. default:
  448. dev_err(&i2s->pdev->dev, "master/slave format not supported\n");
  449. return -EINVAL;
  450. }
  451. if (any_active(i2s) &&
  452. ((mod & (MOD_SDF_MASK | MOD_LR_RLOW
  453. | MOD_SLAVE)) != tmp)) {
  454. dev_err(&i2s->pdev->dev,
  455. "%s:%d Other DAI busy\n", __func__, __LINE__);
  456. return -EAGAIN;
  457. }
  458. mod &= ~(MOD_SDF_MASK | MOD_LR_RLOW | MOD_SLAVE);
  459. mod |= tmp;
  460. writel(mod, i2s->addr + I2SMOD);
  461. return 0;
  462. }
  463. static int i2s_hw_params(struct snd_pcm_substream *substream,
  464. struct snd_pcm_hw_params *params, struct snd_soc_dai *dai)
  465. {
  466. struct i2s_dai *i2s = to_info(dai);
  467. u32 mod = readl(i2s->addr + I2SMOD);
  468. if (!is_secondary(i2s))
  469. mod &= ~(MOD_DC2_EN | MOD_DC1_EN);
  470. switch (params_channels(params)) {
  471. case 6:
  472. mod |= MOD_DC2_EN;
  473. case 4:
  474. mod |= MOD_DC1_EN;
  475. break;
  476. case 2:
  477. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  478. i2s->dma_playback.dma_size = 4;
  479. else
  480. i2s->dma_capture.dma_size = 4;
  481. break;
  482. case 1:
  483. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  484. i2s->dma_playback.dma_size = 2;
  485. else
  486. i2s->dma_capture.dma_size = 2;
  487. break;
  488. default:
  489. dev_err(&i2s->pdev->dev, "%d channels not supported\n",
  490. params_channels(params));
  491. return -EINVAL;
  492. }
  493. if (is_secondary(i2s))
  494. mod &= ~MOD_BLCS_MASK;
  495. else
  496. mod &= ~MOD_BLCP_MASK;
  497. if (is_manager(i2s))
  498. mod &= ~MOD_BLC_MASK;
  499. switch (params_format(params)) {
  500. case SNDRV_PCM_FORMAT_S8:
  501. if (is_secondary(i2s))
  502. mod |= MOD_BLCS_8BIT;
  503. else
  504. mod |= MOD_BLCP_8BIT;
  505. if (is_manager(i2s))
  506. mod |= MOD_BLC_8BIT;
  507. break;
  508. case SNDRV_PCM_FORMAT_S16_LE:
  509. if (is_secondary(i2s))
  510. mod |= MOD_BLCS_16BIT;
  511. else
  512. mod |= MOD_BLCP_16BIT;
  513. if (is_manager(i2s))
  514. mod |= MOD_BLC_16BIT;
  515. break;
  516. case SNDRV_PCM_FORMAT_S24_LE:
  517. if (is_secondary(i2s))
  518. mod |= MOD_BLCS_24BIT;
  519. else
  520. mod |= MOD_BLCP_24BIT;
  521. if (is_manager(i2s))
  522. mod |= MOD_BLC_24BIT;
  523. break;
  524. default:
  525. dev_err(&i2s->pdev->dev, "Format(%d) not supported\n",
  526. params_format(params));
  527. return -EINVAL;
  528. }
  529. writel(mod, i2s->addr + I2SMOD);
  530. if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
  531. snd_soc_dai_set_dma_data(dai, substream,
  532. (void *)&i2s->dma_playback);
  533. else
  534. snd_soc_dai_set_dma_data(dai, substream,
  535. (void *)&i2s->dma_capture);
  536. i2s->frmclk = params_rate(params);
  537. return 0;
  538. }
  539. /* We set constraints on the substream acc to the version of I2S */
  540. static int i2s_startup(struct snd_pcm_substream *substream,
  541. struct snd_soc_dai *dai)
  542. {
  543. struct i2s_dai *i2s = to_info(dai);
  544. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  545. unsigned long flags;
  546. spin_lock_irqsave(&lock, flags);
  547. i2s->mode |= DAI_OPENED;
  548. if (is_manager(other))
  549. i2s->mode &= ~DAI_MANAGER;
  550. else
  551. i2s->mode |= DAI_MANAGER;
  552. /* Enforce set_sysclk in Master mode */
  553. i2s->rclk_srcrate = 0;
  554. spin_unlock_irqrestore(&lock, flags);
  555. return 0;
  556. }
  557. static void i2s_shutdown(struct snd_pcm_substream *substream,
  558. struct snd_soc_dai *dai)
  559. {
  560. struct i2s_dai *i2s = to_info(dai);
  561. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  562. unsigned long flags;
  563. spin_lock_irqsave(&lock, flags);
  564. i2s->mode &= ~DAI_OPENED;
  565. i2s->mode &= ~DAI_MANAGER;
  566. if (is_opened(other))
  567. other->mode |= DAI_MANAGER;
  568. /* Reset any constraint on RFS and BFS */
  569. i2s->rfs = 0;
  570. i2s->bfs = 0;
  571. spin_unlock_irqrestore(&lock, flags);
  572. /* Gate CDCLK by default */
  573. if (!is_opened(other))
  574. i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
  575. 0, SND_SOC_CLOCK_IN);
  576. }
  577. static int config_setup(struct i2s_dai *i2s)
  578. {
  579. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  580. unsigned rfs, bfs, blc;
  581. u32 psr;
  582. blc = get_blc(i2s);
  583. bfs = i2s->bfs;
  584. if (!bfs && other)
  585. bfs = other->bfs;
  586. /* Select least possible multiple(2) if no constraint set */
  587. if (!bfs)
  588. bfs = blc * 2;
  589. rfs = i2s->rfs;
  590. if (!rfs && other)
  591. rfs = other->rfs;
  592. if ((rfs == 256 || rfs == 512) && (blc == 24)) {
  593. dev_err(&i2s->pdev->dev,
  594. "%d-RFS not supported for 24-blc\n", rfs);
  595. return -EINVAL;
  596. }
  597. if (!rfs) {
  598. if (bfs == 16 || bfs == 32)
  599. rfs = 256;
  600. else
  601. rfs = 384;
  602. }
  603. /* If already setup and running */
  604. if (any_active(i2s) && (get_rfs(i2s) != rfs || get_bfs(i2s) != bfs)) {
  605. dev_err(&i2s->pdev->dev,
  606. "%s:%d Other DAI busy\n", __func__, __LINE__);
  607. return -EAGAIN;
  608. }
  609. /* Don't bother RFS, BFS & PSR in Slave mode */
  610. if (is_slave(i2s))
  611. return 0;
  612. set_bfs(i2s, bfs);
  613. set_rfs(i2s, rfs);
  614. if (!(i2s->quirks & QUIRK_NO_MUXPSR)) {
  615. psr = i2s->rclk_srcrate / i2s->frmclk / rfs;
  616. writel(((psr - 1) << 8) | PSR_PSREN, i2s->addr + I2SPSR);
  617. dev_dbg(&i2s->pdev->dev,
  618. "RCLK_SRC=%luHz PSR=%u, RCLK=%dfs, BCLK=%dfs\n",
  619. i2s->rclk_srcrate, psr, rfs, bfs);
  620. }
  621. return 0;
  622. }
  623. static int i2s_trigger(struct snd_pcm_substream *substream,
  624. int cmd, struct snd_soc_dai *dai)
  625. {
  626. int capture = (substream->stream == SNDRV_PCM_STREAM_CAPTURE);
  627. struct snd_soc_pcm_runtime *rtd = substream->private_data;
  628. struct i2s_dai *i2s = to_info(rtd->cpu_dai);
  629. unsigned long flags;
  630. switch (cmd) {
  631. case SNDRV_PCM_TRIGGER_START:
  632. case SNDRV_PCM_TRIGGER_RESUME:
  633. case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
  634. local_irq_save(flags);
  635. if (config_setup(i2s)) {
  636. local_irq_restore(flags);
  637. return -EINVAL;
  638. }
  639. if (capture)
  640. i2s_rxctrl(i2s, 1);
  641. else
  642. i2s_txctrl(i2s, 1);
  643. local_irq_restore(flags);
  644. break;
  645. case SNDRV_PCM_TRIGGER_STOP:
  646. case SNDRV_PCM_TRIGGER_SUSPEND:
  647. case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
  648. local_irq_save(flags);
  649. if (capture) {
  650. i2s_rxctrl(i2s, 0);
  651. i2s_fifo(i2s, FIC_RXFLUSH);
  652. } else {
  653. i2s_txctrl(i2s, 0);
  654. i2s_fifo(i2s, FIC_TXFLUSH);
  655. }
  656. local_irq_restore(flags);
  657. break;
  658. }
  659. return 0;
  660. }
  661. static int i2s_set_clkdiv(struct snd_soc_dai *dai,
  662. int div_id, int div)
  663. {
  664. struct i2s_dai *i2s = to_info(dai);
  665. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  666. switch (div_id) {
  667. case SAMSUNG_I2S_DIV_BCLK:
  668. if ((any_active(i2s) && div && (get_bfs(i2s) != div))
  669. || (other && other->bfs && (other->bfs != div))) {
  670. dev_err(&i2s->pdev->dev,
  671. "%s:%d Other DAI busy\n", __func__, __LINE__);
  672. return -EAGAIN;
  673. }
  674. i2s->bfs = div;
  675. break;
  676. default:
  677. dev_err(&i2s->pdev->dev,
  678. "Invalid clock divider(%d)\n", div_id);
  679. return -EINVAL;
  680. }
  681. return 0;
  682. }
  683. static snd_pcm_sframes_t
  684. i2s_delay(struct snd_pcm_substream *substream, struct snd_soc_dai *dai)
  685. {
  686. struct i2s_dai *i2s = to_info(dai);
  687. u32 reg = readl(i2s->addr + I2SFIC);
  688. snd_pcm_sframes_t delay;
  689. if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
  690. delay = FIC_RXCOUNT(reg);
  691. else if (is_secondary(i2s))
  692. delay = FICS_TXCOUNT(readl(i2s->addr + I2SFICS));
  693. else
  694. delay = FIC_TXCOUNT(reg);
  695. return delay;
  696. }
  697. #ifdef CONFIG_PM
  698. static int i2s_suspend(struct snd_soc_dai *dai)
  699. {
  700. struct i2s_dai *i2s = to_info(dai);
  701. if (dai->active) {
  702. i2s->suspend_i2smod = readl(i2s->addr + I2SMOD);
  703. i2s->suspend_i2scon = readl(i2s->addr + I2SCON);
  704. i2s->suspend_i2spsr = readl(i2s->addr + I2SPSR);
  705. }
  706. return 0;
  707. }
  708. static int i2s_resume(struct snd_soc_dai *dai)
  709. {
  710. struct i2s_dai *i2s = to_info(dai);
  711. if (dai->active) {
  712. writel(i2s->suspend_i2scon, i2s->addr + I2SCON);
  713. writel(i2s->suspend_i2smod, i2s->addr + I2SMOD);
  714. writel(i2s->suspend_i2spsr, i2s->addr + I2SPSR);
  715. }
  716. return 0;
  717. }
  718. #else
  719. #define i2s_suspend NULL
  720. #define i2s_resume NULL
  721. #endif
  722. static int samsung_i2s_dai_probe(struct snd_soc_dai *dai)
  723. {
  724. struct i2s_dai *i2s = to_info(dai);
  725. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  726. if (other && other->clk) /* If this is probe on secondary */
  727. goto probe_exit;
  728. i2s->addr = ioremap(i2s->base, 0x100);
  729. if (i2s->addr == NULL) {
  730. dev_err(&i2s->pdev->dev, "cannot ioremap registers\n");
  731. return -ENXIO;
  732. }
  733. i2s->clk = clk_get(&i2s->pdev->dev, "iis");
  734. if (IS_ERR(i2s->clk)) {
  735. dev_err(&i2s->pdev->dev, "failed to get i2s_clock\n");
  736. iounmap(i2s->addr);
  737. return -ENOENT;
  738. }
  739. clk_prepare_enable(i2s->clk);
  740. if (other) {
  741. other->addr = i2s->addr;
  742. other->clk = i2s->clk;
  743. }
  744. if (i2s->quirks & QUIRK_NEED_RSTCLR)
  745. writel(CON_RSTCLR, i2s->addr + I2SCON);
  746. if (i2s->quirks & QUIRK_SEC_DAI)
  747. idma_reg_addr_init(i2s->addr,
  748. i2s->sec_dai->idma_playback.dma_addr);
  749. probe_exit:
  750. /* Reset any constraint on RFS and BFS */
  751. i2s->rfs = 0;
  752. i2s->bfs = 0;
  753. i2s_txctrl(i2s, 0);
  754. i2s_rxctrl(i2s, 0);
  755. i2s_fifo(i2s, FIC_TXFLUSH);
  756. i2s_fifo(other, FIC_TXFLUSH);
  757. i2s_fifo(i2s, FIC_RXFLUSH);
  758. /* Gate CDCLK by default */
  759. if (!is_opened(other))
  760. i2s_set_sysclk(dai, SAMSUNG_I2S_CDCLK,
  761. 0, SND_SOC_CLOCK_IN);
  762. return 0;
  763. }
  764. static int samsung_i2s_dai_remove(struct snd_soc_dai *dai)
  765. {
  766. struct i2s_dai *i2s = snd_soc_dai_get_drvdata(dai);
  767. struct i2s_dai *other = i2s->pri_dai ? : i2s->sec_dai;
  768. if (!other || !other->clk) {
  769. if (i2s->quirks & QUIRK_NEED_RSTCLR)
  770. writel(0, i2s->addr + I2SCON);
  771. clk_disable_unprepare(i2s->clk);
  772. clk_put(i2s->clk);
  773. iounmap(i2s->addr);
  774. }
  775. i2s->clk = NULL;
  776. return 0;
  777. }
  778. static const struct snd_soc_dai_ops samsung_i2s_dai_ops = {
  779. .trigger = i2s_trigger,
  780. .hw_params = i2s_hw_params,
  781. .set_fmt = i2s_set_fmt,
  782. .set_clkdiv = i2s_set_clkdiv,
  783. .set_sysclk = i2s_set_sysclk,
  784. .startup = i2s_startup,
  785. .shutdown = i2s_shutdown,
  786. .delay = i2s_delay,
  787. };
  788. #define SAMSUNG_I2S_RATES SNDRV_PCM_RATE_8000_96000
  789. #define SAMSUNG_I2S_FMTS (SNDRV_PCM_FMTBIT_S8 | \
  790. SNDRV_PCM_FMTBIT_S16_LE | \
  791. SNDRV_PCM_FMTBIT_S24_LE)
  792. static struct i2s_dai *i2s_alloc_dai(struct platform_device *pdev, bool sec)
  793. {
  794. struct i2s_dai *i2s;
  795. i2s = devm_kzalloc(&pdev->dev, sizeof(struct i2s_dai), GFP_KERNEL);
  796. if (i2s == NULL)
  797. return NULL;
  798. i2s->pdev = pdev;
  799. i2s->pri_dai = NULL;
  800. i2s->sec_dai = NULL;
  801. i2s->i2s_dai_drv.symmetric_rates = 1;
  802. i2s->i2s_dai_drv.probe = samsung_i2s_dai_probe;
  803. i2s->i2s_dai_drv.remove = samsung_i2s_dai_remove;
  804. i2s->i2s_dai_drv.ops = &samsung_i2s_dai_ops;
  805. i2s->i2s_dai_drv.suspend = i2s_suspend;
  806. i2s->i2s_dai_drv.resume = i2s_resume;
  807. i2s->i2s_dai_drv.playback.channels_min = 2;
  808. i2s->i2s_dai_drv.playback.channels_max = 2;
  809. i2s->i2s_dai_drv.playback.rates = SAMSUNG_I2S_RATES;
  810. i2s->i2s_dai_drv.playback.formats = SAMSUNG_I2S_FMTS;
  811. if (!sec) {
  812. i2s->i2s_dai_drv.capture.channels_min = 1;
  813. i2s->i2s_dai_drv.capture.channels_max = 2;
  814. i2s->i2s_dai_drv.capture.rates = SAMSUNG_I2S_RATES;
  815. i2s->i2s_dai_drv.capture.formats = SAMSUNG_I2S_FMTS;
  816. } else { /* Create a new platform_device for Secondary */
  817. i2s->pdev = platform_device_register_resndata(NULL,
  818. pdev->name, pdev->id + SAMSUNG_I2S_SECOFF,
  819. NULL, 0, NULL, 0);
  820. if (IS_ERR(i2s->pdev))
  821. return NULL;
  822. }
  823. /* Pre-assign snd_soc_dai_set_drvdata */
  824. dev_set_drvdata(&i2s->pdev->dev, i2s);
  825. return i2s;
  826. }
  827. static int samsung_i2s_probe(struct platform_device *pdev)
  828. {
  829. u32 dma_pl_chan, dma_cp_chan, dma_pl_sec_chan;
  830. struct i2s_dai *pri_dai, *sec_dai = NULL;
  831. struct s3c_audio_pdata *i2s_pdata;
  832. struct samsung_i2s *i2s_cfg;
  833. struct resource *res;
  834. u32 regs_base, quirks;
  835. int ret = 0;
  836. /* Call during Seconday interface registration */
  837. if (pdev->id >= SAMSUNG_I2S_SECOFF) {
  838. sec_dai = dev_get_drvdata(&pdev->dev);
  839. snd_soc_register_dai(&sec_dai->pdev->dev,
  840. &sec_dai->i2s_dai_drv);
  841. asoc_dma_platform_register(&pdev->dev);
  842. return 0;
  843. }
  844. i2s_pdata = pdev->dev.platform_data;
  845. if (i2s_pdata == NULL) {
  846. dev_err(&pdev->dev, "Can't work without s3c_audio_pdata\n");
  847. return -EINVAL;
  848. }
  849. res = platform_get_resource(pdev, IORESOURCE_DMA, 0);
  850. if (!res) {
  851. dev_err(&pdev->dev, "Unable to get I2S-TX dma resource\n");
  852. return -ENXIO;
  853. }
  854. dma_pl_chan = res->start;
  855. res = platform_get_resource(pdev, IORESOURCE_DMA, 1);
  856. if (!res) {
  857. dev_err(&pdev->dev, "Unable to get I2S-RX dma resource\n");
  858. return -ENXIO;
  859. }
  860. dma_cp_chan = res->start;
  861. res = platform_get_resource(pdev, IORESOURCE_DMA, 2);
  862. if (res)
  863. dma_pl_sec_chan = res->start;
  864. else
  865. dma_pl_sec_chan = 0;
  866. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  867. if (!res) {
  868. dev_err(&pdev->dev, "Unable to get I2S SFR address\n");
  869. return -ENXIO;
  870. }
  871. if (!request_mem_region(res->start, resource_size(res),
  872. "samsung-i2s")) {
  873. dev_err(&pdev->dev, "Unable to request SFR region\n");
  874. return -EBUSY;
  875. }
  876. regs_base = res->start;
  877. i2s_cfg = &i2s_pdata->type.i2s;
  878. quirks = i2s_cfg->quirks;
  879. pri_dai = i2s_alloc_dai(pdev, false);
  880. if (!pri_dai) {
  881. dev_err(&pdev->dev, "Unable to alloc I2S_pri\n");
  882. ret = -ENOMEM;
  883. goto err;
  884. }
  885. pri_dai->dma_playback.dma_addr = regs_base + I2STXD;
  886. pri_dai->dma_capture.dma_addr = regs_base + I2SRXD;
  887. pri_dai->dma_playback.client =
  888. (struct s3c2410_dma_client *)&pri_dai->dma_playback;
  889. pri_dai->dma_capture.client =
  890. (struct s3c2410_dma_client *)&pri_dai->dma_capture;
  891. pri_dai->dma_playback.channel = dma_pl_chan;
  892. pri_dai->dma_capture.channel = dma_cp_chan;
  893. pri_dai->dma_playback.dma_size = 4;
  894. pri_dai->dma_capture.dma_size = 4;
  895. pri_dai->base = regs_base;
  896. pri_dai->quirks = quirks;
  897. if (quirks & QUIRK_PRI_6CHAN)
  898. pri_dai->i2s_dai_drv.playback.channels_max = 6;
  899. if (quirks & QUIRK_SEC_DAI) {
  900. sec_dai = i2s_alloc_dai(pdev, true);
  901. if (!sec_dai) {
  902. dev_err(&pdev->dev, "Unable to alloc I2S_sec\n");
  903. ret = -ENOMEM;
  904. goto err;
  905. }
  906. sec_dai->dma_playback.dma_addr = regs_base + I2STXDS;
  907. sec_dai->dma_playback.client =
  908. (struct s3c2410_dma_client *)&sec_dai->dma_playback;
  909. /* Use iDMA always if SysDMA not provided */
  910. sec_dai->dma_playback.channel = dma_pl_sec_chan ? : -1;
  911. sec_dai->dma_playback.dma_size = 4;
  912. sec_dai->base = regs_base;
  913. sec_dai->quirks = quirks;
  914. sec_dai->idma_playback.dma_addr = i2s_cfg->idma_addr;
  915. sec_dai->pri_dai = pri_dai;
  916. pri_dai->sec_dai = sec_dai;
  917. }
  918. if (i2s_pdata->cfg_gpio && i2s_pdata->cfg_gpio(pdev)) {
  919. dev_err(&pdev->dev, "Unable to configure gpio\n");
  920. ret = -EINVAL;
  921. goto err;
  922. }
  923. snd_soc_register_dai(&pri_dai->pdev->dev, &pri_dai->i2s_dai_drv);
  924. pm_runtime_enable(&pdev->dev);
  925. asoc_dma_platform_register(&pdev->dev);
  926. return 0;
  927. err:
  928. release_mem_region(regs_base, resource_size(res));
  929. return ret;
  930. }
  931. static int samsung_i2s_remove(struct platform_device *pdev)
  932. {
  933. struct i2s_dai *i2s, *other;
  934. struct resource *res;
  935. i2s = dev_get_drvdata(&pdev->dev);
  936. other = i2s->pri_dai ? : i2s->sec_dai;
  937. if (other) {
  938. other->pri_dai = NULL;
  939. other->sec_dai = NULL;
  940. } else {
  941. pm_runtime_disable(&pdev->dev);
  942. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  943. if (res)
  944. release_mem_region(res->start, resource_size(res));
  945. }
  946. i2s->pri_dai = NULL;
  947. i2s->sec_dai = NULL;
  948. asoc_dma_platform_unregister(&pdev->dev);
  949. snd_soc_unregister_dai(&pdev->dev);
  950. return 0;
  951. }
  952. static struct platform_driver samsung_i2s_driver = {
  953. .probe = samsung_i2s_probe,
  954. .remove = samsung_i2s_remove,
  955. .driver = {
  956. .name = "samsung-i2s",
  957. .owner = THIS_MODULE,
  958. },
  959. };
  960. module_platform_driver(samsung_i2s_driver);
  961. /* Module information */
  962. MODULE_AUTHOR("Jaswinder Singh, <jassisinghbrar@gmail.com>");
  963. MODULE_DESCRIPTION("Samsung I2S Interface");
  964. MODULE_ALIAS("platform:samsung-i2s");
  965. MODULE_LICENSE("GPL");