ak4104.c 6.7 KB

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  1. /*
  2. * AK4104 ALSA SoC (ASoC) driver
  3. *
  4. * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de>
  5. *
  6. * This program is free software; you can redistribute it and/or modify it
  7. * under the terms of the GNU General Public License as published by the
  8. * Free Software Foundation; either version 2 of the License, or (at your
  9. * option) any later version.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/slab.h>
  13. #include <sound/core.h>
  14. #include <sound/soc.h>
  15. #include <sound/initval.h>
  16. #include <linux/spi/spi.h>
  17. #include <linux/of_device.h>
  18. #include <linux/of_gpio.h>
  19. #include <sound/asoundef.h>
  20. /* AK4104 registers addresses */
  21. #define AK4104_REG_CONTROL1 0x00
  22. #define AK4104_REG_RESERVED 0x01
  23. #define AK4104_REG_CONTROL2 0x02
  24. #define AK4104_REG_TX 0x03
  25. #define AK4104_REG_CHN_STATUS(x) ((x) + 0x04)
  26. #define AK4104_NUM_REGS 10
  27. #define AK4104_REG_MASK 0x1f
  28. #define AK4104_READ 0xc0
  29. #define AK4104_WRITE 0xe0
  30. #define AK4104_RESERVED_VAL 0x5b
  31. /* Bit masks for AK4104 registers */
  32. #define AK4104_CONTROL1_RSTN (1 << 0)
  33. #define AK4104_CONTROL1_PW (1 << 1)
  34. #define AK4104_CONTROL1_DIF0 (1 << 2)
  35. #define AK4104_CONTROL1_DIF1 (1 << 3)
  36. #define AK4104_CONTROL2_SEL0 (1 << 0)
  37. #define AK4104_CONTROL2_SEL1 (1 << 1)
  38. #define AK4104_CONTROL2_MODE (1 << 2)
  39. #define AK4104_TX_TXE (1 << 0)
  40. #define AK4104_TX_V (1 << 1)
  41. #define DRV_NAME "ak4104-codec"
  42. struct ak4104_private {
  43. struct regmap *regmap;
  44. };
  45. static int ak4104_set_dai_fmt(struct snd_soc_dai *codec_dai,
  46. unsigned int format)
  47. {
  48. struct snd_soc_codec *codec = codec_dai->codec;
  49. int val = 0;
  50. int ret;
  51. /* set DAI format */
  52. switch (format & SND_SOC_DAIFMT_FORMAT_MASK) {
  53. case SND_SOC_DAIFMT_RIGHT_J:
  54. break;
  55. case SND_SOC_DAIFMT_LEFT_J:
  56. val |= AK4104_CONTROL1_DIF0;
  57. break;
  58. case SND_SOC_DAIFMT_I2S:
  59. val |= AK4104_CONTROL1_DIF0 | AK4104_CONTROL1_DIF1;
  60. break;
  61. default:
  62. dev_err(codec->dev, "invalid dai format\n");
  63. return -EINVAL;
  64. }
  65. /* This device can only be slave */
  66. if ((format & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS)
  67. return -EINVAL;
  68. ret = snd_soc_update_bits(codec, AK4104_REG_CONTROL1,
  69. AK4104_CONTROL1_DIF0 | AK4104_CONTROL1_DIF1,
  70. val);
  71. if (ret < 0)
  72. return ret;
  73. return 0;
  74. }
  75. static int ak4104_hw_params(struct snd_pcm_substream *substream,
  76. struct snd_pcm_hw_params *params,
  77. struct snd_soc_dai *dai)
  78. {
  79. struct snd_soc_codec *codec = dai->codec;
  80. int val = 0;
  81. /* set the IEC958 bits: consumer mode, no copyright bit */
  82. val |= IEC958_AES0_CON_NOT_COPYRIGHT;
  83. snd_soc_write(codec, AK4104_REG_CHN_STATUS(0), val);
  84. val = 0;
  85. switch (params_rate(params)) {
  86. case 22050:
  87. val |= IEC958_AES3_CON_FS_22050;
  88. break;
  89. case 24000:
  90. val |= IEC958_AES3_CON_FS_24000;
  91. break;
  92. case 32000:
  93. val |= IEC958_AES3_CON_FS_32000;
  94. break;
  95. case 44100:
  96. val |= IEC958_AES3_CON_FS_44100;
  97. break;
  98. case 48000:
  99. val |= IEC958_AES3_CON_FS_48000;
  100. break;
  101. case 88200:
  102. val |= IEC958_AES3_CON_FS_88200;
  103. break;
  104. case 96000:
  105. val |= IEC958_AES3_CON_FS_96000;
  106. break;
  107. case 176400:
  108. val |= IEC958_AES3_CON_FS_176400;
  109. break;
  110. case 192000:
  111. val |= IEC958_AES3_CON_FS_192000;
  112. break;
  113. default:
  114. dev_err(codec->dev, "unsupported sampling rate\n");
  115. return -EINVAL;
  116. }
  117. return snd_soc_write(codec, AK4104_REG_CHN_STATUS(3), val);
  118. }
  119. static const struct snd_soc_dai_ops ak4101_dai_ops = {
  120. .hw_params = ak4104_hw_params,
  121. .set_fmt = ak4104_set_dai_fmt,
  122. };
  123. static struct snd_soc_dai_driver ak4104_dai = {
  124. .name = "ak4104-hifi",
  125. .playback = {
  126. .stream_name = "Playback",
  127. .channels_min = 2,
  128. .channels_max = 2,
  129. .rates = SNDRV_PCM_RATE_8000_192000,
  130. .formats = SNDRV_PCM_FMTBIT_S16_LE |
  131. SNDRV_PCM_FMTBIT_S24_3LE |
  132. SNDRV_PCM_FMTBIT_S24_LE
  133. },
  134. .ops = &ak4101_dai_ops,
  135. };
  136. static int ak4104_probe(struct snd_soc_codec *codec)
  137. {
  138. struct ak4104_private *ak4104 = snd_soc_codec_get_drvdata(codec);
  139. int ret;
  140. codec->control_data = ak4104->regmap;
  141. ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_REGMAP);
  142. if (ret != 0)
  143. return ret;
  144. /* set power-up and non-reset bits */
  145. ret = snd_soc_update_bits(codec, AK4104_REG_CONTROL1,
  146. AK4104_CONTROL1_PW | AK4104_CONTROL1_RSTN,
  147. AK4104_CONTROL1_PW | AK4104_CONTROL1_RSTN);
  148. if (ret < 0)
  149. return ret;
  150. /* enable transmitter */
  151. ret = snd_soc_update_bits(codec, AK4104_REG_TX,
  152. AK4104_TX_TXE, AK4104_TX_TXE);
  153. if (ret < 0)
  154. return ret;
  155. return 0;
  156. }
  157. static int ak4104_remove(struct snd_soc_codec *codec)
  158. {
  159. snd_soc_update_bits(codec, AK4104_REG_CONTROL1,
  160. AK4104_CONTROL1_PW | AK4104_CONTROL1_RSTN, 0);
  161. return 0;
  162. }
  163. static struct snd_soc_codec_driver soc_codec_device_ak4104 = {
  164. .probe = ak4104_probe,
  165. .remove = ak4104_remove,
  166. };
  167. static const struct regmap_config ak4104_regmap = {
  168. .reg_bits = 8,
  169. .val_bits = 8,
  170. .max_register = AK4104_NUM_REGS - 1,
  171. .read_flag_mask = AK4104_READ,
  172. .write_flag_mask = AK4104_WRITE,
  173. .cache_type = REGCACHE_RBTREE,
  174. };
  175. static int ak4104_spi_probe(struct spi_device *spi)
  176. {
  177. struct device_node *np = spi->dev.of_node;
  178. struct ak4104_private *ak4104;
  179. unsigned int val;
  180. int ret;
  181. spi->bits_per_word = 8;
  182. spi->mode = SPI_MODE_0;
  183. ret = spi_setup(spi);
  184. if (ret < 0)
  185. return ret;
  186. ak4104 = devm_kzalloc(&spi->dev, sizeof(struct ak4104_private),
  187. GFP_KERNEL);
  188. if (ak4104 == NULL)
  189. return -ENOMEM;
  190. ak4104->regmap = devm_regmap_init_spi(spi, &ak4104_regmap);
  191. if (IS_ERR(ak4104->regmap)) {
  192. ret = PTR_ERR(ak4104->regmap);
  193. return ret;
  194. }
  195. if (np) {
  196. enum of_gpio_flags flags;
  197. int gpio = of_get_named_gpio_flags(np, "reset-gpio", 0, &flags);
  198. if (gpio_is_valid(gpio)) {
  199. ret = devm_gpio_request_one(&spi->dev, gpio,
  200. flags & OF_GPIO_ACTIVE_LOW ?
  201. GPIOF_OUT_INIT_LOW : GPIOF_OUT_INIT_HIGH,
  202. "ak4104 reset");
  203. if (ret < 0)
  204. return ret;
  205. }
  206. }
  207. /* read the 'reserved' register - according to the datasheet, it
  208. * should contain 0x5b. Not a good way to verify the presence of
  209. * the device, but there is no hardware ID register. */
  210. ret = regmap_read(ak4104->regmap, AK4104_REG_RESERVED, &val);
  211. if (ret != 0)
  212. return ret;
  213. if (val != AK4104_RESERVED_VAL)
  214. return -ENODEV;
  215. spi_set_drvdata(spi, ak4104);
  216. ret = snd_soc_register_codec(&spi->dev,
  217. &soc_codec_device_ak4104, &ak4104_dai, 1);
  218. return ret;
  219. }
  220. static int ak4104_spi_remove(struct spi_device *spi)
  221. {
  222. snd_soc_unregister_codec(&spi->dev);
  223. return 0;
  224. }
  225. static const struct of_device_id ak4104_of_match[] = {
  226. { .compatible = "asahi-kasei,ak4104", },
  227. { }
  228. };
  229. MODULE_DEVICE_TABLE(of, ak4104_of_match);
  230. static struct spi_driver ak4104_spi_driver = {
  231. .driver = {
  232. .name = DRV_NAME,
  233. .owner = THIS_MODULE,
  234. .of_match_table = ak4104_of_match,
  235. },
  236. .probe = ak4104_spi_probe,
  237. .remove = ak4104_spi_remove,
  238. };
  239. module_spi_driver(ak4104_spi_driver);
  240. MODULE_AUTHOR("Daniel Mack <daniel@caiaq.de>");
  241. MODULE_DESCRIPTION("Asahi Kasei AK4104 ALSA SoC driver");
  242. MODULE_LICENSE("GPL");