patch_hdmi.c 67 KB

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  1. /*
  2. *
  3. * patch_hdmi.c - routines for HDMI/DisplayPort codecs
  4. *
  5. * Copyright(c) 2008-2010 Intel Corporation. All rights reserved.
  6. * Copyright (c) 2006 ATI Technologies Inc.
  7. * Copyright (c) 2008 NVIDIA Corp. All rights reserved.
  8. * Copyright (c) 2008 Wei Ni <wni@nvidia.com>
  9. *
  10. * Authors:
  11. * Wu Fengguang <wfg@linux.intel.com>
  12. *
  13. * Maintained by:
  14. * Wu Fengguang <wfg@linux.intel.com>
  15. *
  16. * This program is free software; you can redistribute it and/or modify it
  17. * under the terms of the GNU General Public License as published by the Free
  18. * Software Foundation; either version 2 of the License, or (at your option)
  19. * any later version.
  20. *
  21. * This program is distributed in the hope that it will be useful, but
  22. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  23. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  24. * for more details.
  25. *
  26. * You should have received a copy of the GNU General Public License
  27. * along with this program; if not, write to the Free Software Foundation,
  28. * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  29. */
  30. #include <linux/init.h>
  31. #include <linux/delay.h>
  32. #include <linux/slab.h>
  33. #include <linux/module.h>
  34. #include <sound/core.h>
  35. #include <sound/jack.h>
  36. #include <sound/asoundef.h>
  37. #include <sound/tlv.h>
  38. #include "hda_codec.h"
  39. #include "hda_local.h"
  40. #include "hda_jack.h"
  41. static bool static_hdmi_pcm;
  42. module_param(static_hdmi_pcm, bool, 0644);
  43. MODULE_PARM_DESC(static_hdmi_pcm, "Don't restrict PCM parameters per ELD info");
  44. /*
  45. * The HDMI/DisplayPort configuration can be highly dynamic. A graphics device
  46. * could support N independent pipes, each of them can be connected to one or
  47. * more ports (DVI, HDMI or DisplayPort).
  48. *
  49. * The HDA correspondence of pipes/ports are converter/pin nodes.
  50. */
  51. #define MAX_HDMI_CVTS 8
  52. #define MAX_HDMI_PINS 8
  53. struct hdmi_spec_per_cvt {
  54. hda_nid_t cvt_nid;
  55. int assigned;
  56. unsigned int channels_min;
  57. unsigned int channels_max;
  58. u32 rates;
  59. u64 formats;
  60. unsigned int maxbps;
  61. };
  62. struct hdmi_spec_per_pin {
  63. hda_nid_t pin_nid;
  64. int num_mux_nids;
  65. hda_nid_t mux_nids[HDA_MAX_CONNECTIONS];
  66. struct hda_codec *codec;
  67. struct hdmi_eld sink_eld;
  68. struct delayed_work work;
  69. int repoll_count;
  70. bool non_pcm;
  71. bool chmap_set; /* channel-map override by ALSA API? */
  72. unsigned char chmap[8]; /* ALSA API channel-map */
  73. };
  74. struct hdmi_spec {
  75. int num_cvts;
  76. struct hdmi_spec_per_cvt cvts[MAX_HDMI_CVTS];
  77. int num_pins;
  78. struct hdmi_spec_per_pin pins[MAX_HDMI_PINS];
  79. struct hda_pcm pcm_rec[MAX_HDMI_PINS];
  80. unsigned int channels_max; /* max over all cvts */
  81. /*
  82. * Non-generic ATI/NVIDIA specific
  83. */
  84. struct hda_multi_out multiout;
  85. struct hda_pcm_stream pcm_playback;
  86. };
  87. struct hdmi_audio_infoframe {
  88. u8 type; /* 0x84 */
  89. u8 ver; /* 0x01 */
  90. u8 len; /* 0x0a */
  91. u8 checksum;
  92. u8 CC02_CT47; /* CC in bits 0:2, CT in 4:7 */
  93. u8 SS01_SF24;
  94. u8 CXT04;
  95. u8 CA;
  96. u8 LFEPBL01_LSV36_DM_INH7;
  97. };
  98. struct dp_audio_infoframe {
  99. u8 type; /* 0x84 */
  100. u8 len; /* 0x1b */
  101. u8 ver; /* 0x11 << 2 */
  102. u8 CC02_CT47; /* match with HDMI infoframe from this on */
  103. u8 SS01_SF24;
  104. u8 CXT04;
  105. u8 CA;
  106. u8 LFEPBL01_LSV36_DM_INH7;
  107. };
  108. union audio_infoframe {
  109. struct hdmi_audio_infoframe hdmi;
  110. struct dp_audio_infoframe dp;
  111. u8 bytes[0];
  112. };
  113. /*
  114. * CEA speaker placement:
  115. *
  116. * FLH FCH FRH
  117. * FLW FL FLC FC FRC FR FRW
  118. *
  119. * LFE
  120. * TC
  121. *
  122. * RL RLC RC RRC RR
  123. *
  124. * The Left/Right Surround channel _notions_ LS/RS in SMPTE 320M corresponds to
  125. * CEA RL/RR; The SMPTE channel _assignment_ C/LFE is swapped to CEA LFE/FC.
  126. */
  127. enum cea_speaker_placement {
  128. FL = (1 << 0), /* Front Left */
  129. FC = (1 << 1), /* Front Center */
  130. FR = (1 << 2), /* Front Right */
  131. FLC = (1 << 3), /* Front Left Center */
  132. FRC = (1 << 4), /* Front Right Center */
  133. RL = (1 << 5), /* Rear Left */
  134. RC = (1 << 6), /* Rear Center */
  135. RR = (1 << 7), /* Rear Right */
  136. RLC = (1 << 8), /* Rear Left Center */
  137. RRC = (1 << 9), /* Rear Right Center */
  138. LFE = (1 << 10), /* Low Frequency Effect */
  139. FLW = (1 << 11), /* Front Left Wide */
  140. FRW = (1 << 12), /* Front Right Wide */
  141. FLH = (1 << 13), /* Front Left High */
  142. FCH = (1 << 14), /* Front Center High */
  143. FRH = (1 << 15), /* Front Right High */
  144. TC = (1 << 16), /* Top Center */
  145. };
  146. /*
  147. * ELD SA bits in the CEA Speaker Allocation data block
  148. */
  149. static int eld_speaker_allocation_bits[] = {
  150. [0] = FL | FR,
  151. [1] = LFE,
  152. [2] = FC,
  153. [3] = RL | RR,
  154. [4] = RC,
  155. [5] = FLC | FRC,
  156. [6] = RLC | RRC,
  157. /* the following are not defined in ELD yet */
  158. [7] = FLW | FRW,
  159. [8] = FLH | FRH,
  160. [9] = TC,
  161. [10] = FCH,
  162. };
  163. struct cea_channel_speaker_allocation {
  164. int ca_index;
  165. int speakers[8];
  166. /* derived values, just for convenience */
  167. int channels;
  168. int spk_mask;
  169. };
  170. /*
  171. * ALSA sequence is:
  172. *
  173. * surround40 surround41 surround50 surround51 surround71
  174. * ch0 front left = = = =
  175. * ch1 front right = = = =
  176. * ch2 rear left = = = =
  177. * ch3 rear right = = = =
  178. * ch4 LFE center center center
  179. * ch5 LFE LFE
  180. * ch6 side left
  181. * ch7 side right
  182. *
  183. * surround71 = {FL, FR, RLC, RRC, FC, LFE, RL, RR}
  184. */
  185. static int hdmi_channel_mapping[0x32][8] = {
  186. /* stereo */
  187. [0x00] = { 0x00, 0x11, 0xf2, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
  188. /* 2.1 */
  189. [0x01] = { 0x00, 0x11, 0x22, 0xf3, 0xf4, 0xf5, 0xf6, 0xf7 },
  190. /* Dolby Surround */
  191. [0x02] = { 0x00, 0x11, 0x23, 0xf2, 0xf4, 0xf5, 0xf6, 0xf7 },
  192. /* surround40 */
  193. [0x08] = { 0x00, 0x11, 0x24, 0x35, 0xf3, 0xf2, 0xf6, 0xf7 },
  194. /* 4ch */
  195. [0x03] = { 0x00, 0x11, 0x23, 0x32, 0x44, 0xf5, 0xf6, 0xf7 },
  196. /* surround41 */
  197. [0x09] = { 0x00, 0x11, 0x24, 0x35, 0x42, 0xf3, 0xf6, 0xf7 },
  198. /* surround50 */
  199. [0x0a] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0xf2, 0xf6, 0xf7 },
  200. /* surround51 */
  201. [0x0b] = { 0x00, 0x11, 0x24, 0x35, 0x43, 0x52, 0xf6, 0xf7 },
  202. /* 7.1 */
  203. [0x13] = { 0x00, 0x11, 0x26, 0x37, 0x43, 0x52, 0x64, 0x75 },
  204. };
  205. /*
  206. * This is an ordered list!
  207. *
  208. * The preceding ones have better chances to be selected by
  209. * hdmi_channel_allocation().
  210. */
  211. static struct cea_channel_speaker_allocation channel_allocations[] = {
  212. /* channel: 7 6 5 4 3 2 1 0 */
  213. { .ca_index = 0x00, .speakers = { 0, 0, 0, 0, 0, 0, FR, FL } },
  214. /* 2.1 */
  215. { .ca_index = 0x01, .speakers = { 0, 0, 0, 0, 0, LFE, FR, FL } },
  216. /* Dolby Surround */
  217. { .ca_index = 0x02, .speakers = { 0, 0, 0, 0, FC, 0, FR, FL } },
  218. /* surround40 */
  219. { .ca_index = 0x08, .speakers = { 0, 0, RR, RL, 0, 0, FR, FL } },
  220. /* surround41 */
  221. { .ca_index = 0x09, .speakers = { 0, 0, RR, RL, 0, LFE, FR, FL } },
  222. /* surround50 */
  223. { .ca_index = 0x0a, .speakers = { 0, 0, RR, RL, FC, 0, FR, FL } },
  224. /* surround51 */
  225. { .ca_index = 0x0b, .speakers = { 0, 0, RR, RL, FC, LFE, FR, FL } },
  226. /* 6.1 */
  227. { .ca_index = 0x0f, .speakers = { 0, RC, RR, RL, FC, LFE, FR, FL } },
  228. /* surround71 */
  229. { .ca_index = 0x13, .speakers = { RRC, RLC, RR, RL, FC, LFE, FR, FL } },
  230. { .ca_index = 0x03, .speakers = { 0, 0, 0, 0, FC, LFE, FR, FL } },
  231. { .ca_index = 0x04, .speakers = { 0, 0, 0, RC, 0, 0, FR, FL } },
  232. { .ca_index = 0x05, .speakers = { 0, 0, 0, RC, 0, LFE, FR, FL } },
  233. { .ca_index = 0x06, .speakers = { 0, 0, 0, RC, FC, 0, FR, FL } },
  234. { .ca_index = 0x07, .speakers = { 0, 0, 0, RC, FC, LFE, FR, FL } },
  235. { .ca_index = 0x0c, .speakers = { 0, RC, RR, RL, 0, 0, FR, FL } },
  236. { .ca_index = 0x0d, .speakers = { 0, RC, RR, RL, 0, LFE, FR, FL } },
  237. { .ca_index = 0x0e, .speakers = { 0, RC, RR, RL, FC, 0, FR, FL } },
  238. { .ca_index = 0x10, .speakers = { RRC, RLC, RR, RL, 0, 0, FR, FL } },
  239. { .ca_index = 0x11, .speakers = { RRC, RLC, RR, RL, 0, LFE, FR, FL } },
  240. { .ca_index = 0x12, .speakers = { RRC, RLC, RR, RL, FC, 0, FR, FL } },
  241. { .ca_index = 0x14, .speakers = { FRC, FLC, 0, 0, 0, 0, FR, FL } },
  242. { .ca_index = 0x15, .speakers = { FRC, FLC, 0, 0, 0, LFE, FR, FL } },
  243. { .ca_index = 0x16, .speakers = { FRC, FLC, 0, 0, FC, 0, FR, FL } },
  244. { .ca_index = 0x17, .speakers = { FRC, FLC, 0, 0, FC, LFE, FR, FL } },
  245. { .ca_index = 0x18, .speakers = { FRC, FLC, 0, RC, 0, 0, FR, FL } },
  246. { .ca_index = 0x19, .speakers = { FRC, FLC, 0, RC, 0, LFE, FR, FL } },
  247. { .ca_index = 0x1a, .speakers = { FRC, FLC, 0, RC, FC, 0, FR, FL } },
  248. { .ca_index = 0x1b, .speakers = { FRC, FLC, 0, RC, FC, LFE, FR, FL } },
  249. { .ca_index = 0x1c, .speakers = { FRC, FLC, RR, RL, 0, 0, FR, FL } },
  250. { .ca_index = 0x1d, .speakers = { FRC, FLC, RR, RL, 0, LFE, FR, FL } },
  251. { .ca_index = 0x1e, .speakers = { FRC, FLC, RR, RL, FC, 0, FR, FL } },
  252. { .ca_index = 0x1f, .speakers = { FRC, FLC, RR, RL, FC, LFE, FR, FL } },
  253. { .ca_index = 0x20, .speakers = { 0, FCH, RR, RL, FC, 0, FR, FL } },
  254. { .ca_index = 0x21, .speakers = { 0, FCH, RR, RL, FC, LFE, FR, FL } },
  255. { .ca_index = 0x22, .speakers = { TC, 0, RR, RL, FC, 0, FR, FL } },
  256. { .ca_index = 0x23, .speakers = { TC, 0, RR, RL, FC, LFE, FR, FL } },
  257. { .ca_index = 0x24, .speakers = { FRH, FLH, RR, RL, 0, 0, FR, FL } },
  258. { .ca_index = 0x25, .speakers = { FRH, FLH, RR, RL, 0, LFE, FR, FL } },
  259. { .ca_index = 0x26, .speakers = { FRW, FLW, RR, RL, 0, 0, FR, FL } },
  260. { .ca_index = 0x27, .speakers = { FRW, FLW, RR, RL, 0, LFE, FR, FL } },
  261. { .ca_index = 0x28, .speakers = { TC, RC, RR, RL, FC, 0, FR, FL } },
  262. { .ca_index = 0x29, .speakers = { TC, RC, RR, RL, FC, LFE, FR, FL } },
  263. { .ca_index = 0x2a, .speakers = { FCH, RC, RR, RL, FC, 0, FR, FL } },
  264. { .ca_index = 0x2b, .speakers = { FCH, RC, RR, RL, FC, LFE, FR, FL } },
  265. { .ca_index = 0x2c, .speakers = { TC, FCH, RR, RL, FC, 0, FR, FL } },
  266. { .ca_index = 0x2d, .speakers = { TC, FCH, RR, RL, FC, LFE, FR, FL } },
  267. { .ca_index = 0x2e, .speakers = { FRH, FLH, RR, RL, FC, 0, FR, FL } },
  268. { .ca_index = 0x2f, .speakers = { FRH, FLH, RR, RL, FC, LFE, FR, FL } },
  269. { .ca_index = 0x30, .speakers = { FRW, FLW, RR, RL, FC, 0, FR, FL } },
  270. { .ca_index = 0x31, .speakers = { FRW, FLW, RR, RL, FC, LFE, FR, FL } },
  271. };
  272. /*
  273. * HDMI routines
  274. */
  275. static int pin_nid_to_pin_index(struct hdmi_spec *spec, hda_nid_t pin_nid)
  276. {
  277. int pin_idx;
  278. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
  279. if (spec->pins[pin_idx].pin_nid == pin_nid)
  280. return pin_idx;
  281. snd_printk(KERN_WARNING "HDMI: pin nid %d not registered\n", pin_nid);
  282. return -EINVAL;
  283. }
  284. static int hinfo_to_pin_index(struct hdmi_spec *spec,
  285. struct hda_pcm_stream *hinfo)
  286. {
  287. int pin_idx;
  288. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++)
  289. if (&spec->pcm_rec[pin_idx].stream[0] == hinfo)
  290. return pin_idx;
  291. snd_printk(KERN_WARNING "HDMI: hinfo %p not registered\n", hinfo);
  292. return -EINVAL;
  293. }
  294. static int cvt_nid_to_cvt_index(struct hdmi_spec *spec, hda_nid_t cvt_nid)
  295. {
  296. int cvt_idx;
  297. for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++)
  298. if (spec->cvts[cvt_idx].cvt_nid == cvt_nid)
  299. return cvt_idx;
  300. snd_printk(KERN_WARNING "HDMI: cvt nid %d not registered\n", cvt_nid);
  301. return -EINVAL;
  302. }
  303. static int hdmi_eld_ctl_info(struct snd_kcontrol *kcontrol,
  304. struct snd_ctl_elem_info *uinfo)
  305. {
  306. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  307. struct hdmi_spec *spec;
  308. int pin_idx;
  309. spec = codec->spec;
  310. uinfo->type = SNDRV_CTL_ELEM_TYPE_BYTES;
  311. pin_idx = kcontrol->private_value;
  312. uinfo->count = spec->pins[pin_idx].sink_eld.eld_size;
  313. return 0;
  314. }
  315. static int hdmi_eld_ctl_get(struct snd_kcontrol *kcontrol,
  316. struct snd_ctl_elem_value *ucontrol)
  317. {
  318. struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
  319. struct hdmi_spec *spec;
  320. int pin_idx;
  321. spec = codec->spec;
  322. pin_idx = kcontrol->private_value;
  323. memcpy(ucontrol->value.bytes.data,
  324. spec->pins[pin_idx].sink_eld.eld_buffer, ELD_MAX_SIZE);
  325. return 0;
  326. }
  327. static struct snd_kcontrol_new eld_bytes_ctl = {
  328. .access = SNDRV_CTL_ELEM_ACCESS_READ | SNDRV_CTL_ELEM_ACCESS_VOLATILE,
  329. .iface = SNDRV_CTL_ELEM_IFACE_PCM,
  330. .name = "ELD",
  331. .info = hdmi_eld_ctl_info,
  332. .get = hdmi_eld_ctl_get,
  333. };
  334. static int hdmi_create_eld_ctl(struct hda_codec *codec, int pin_idx,
  335. int device)
  336. {
  337. struct snd_kcontrol *kctl;
  338. struct hdmi_spec *spec = codec->spec;
  339. int err;
  340. kctl = snd_ctl_new1(&eld_bytes_ctl, codec);
  341. if (!kctl)
  342. return -ENOMEM;
  343. kctl->private_value = pin_idx;
  344. kctl->id.device = device;
  345. err = snd_hda_ctl_add(codec, spec->pins[pin_idx].pin_nid, kctl);
  346. if (err < 0)
  347. return err;
  348. return 0;
  349. }
  350. #ifdef BE_PARANOID
  351. static void hdmi_get_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  352. int *packet_index, int *byte_index)
  353. {
  354. int val;
  355. val = snd_hda_codec_read(codec, pin_nid, 0,
  356. AC_VERB_GET_HDMI_DIP_INDEX, 0);
  357. *packet_index = val >> 5;
  358. *byte_index = val & 0x1f;
  359. }
  360. #endif
  361. static void hdmi_set_dip_index(struct hda_codec *codec, hda_nid_t pin_nid,
  362. int packet_index, int byte_index)
  363. {
  364. int val;
  365. val = (packet_index << 5) | (byte_index & 0x1f);
  366. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_INDEX, val);
  367. }
  368. static void hdmi_write_dip_byte(struct hda_codec *codec, hda_nid_t pin_nid,
  369. unsigned char val)
  370. {
  371. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_DATA, val);
  372. }
  373. static void hdmi_init_pin(struct hda_codec *codec, hda_nid_t pin_nid)
  374. {
  375. /* Unmute */
  376. if (get_wcaps(codec, pin_nid) & AC_WCAP_OUT_AMP)
  377. snd_hda_codec_write(codec, pin_nid, 0,
  378. AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_UNMUTE);
  379. /* Enable pin out: some machines with GM965 gets broken output when
  380. * the pin is disabled or changed while using with HDMI
  381. */
  382. snd_hda_codec_write(codec, pin_nid, 0,
  383. AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
  384. }
  385. static int hdmi_get_channel_count(struct hda_codec *codec, hda_nid_t cvt_nid)
  386. {
  387. return 1 + snd_hda_codec_read(codec, cvt_nid, 0,
  388. AC_VERB_GET_CVT_CHAN_COUNT, 0);
  389. }
  390. static void hdmi_set_channel_count(struct hda_codec *codec,
  391. hda_nid_t cvt_nid, int chs)
  392. {
  393. if (chs != hdmi_get_channel_count(codec, cvt_nid))
  394. snd_hda_codec_write(codec, cvt_nid, 0,
  395. AC_VERB_SET_CVT_CHAN_COUNT, chs - 1);
  396. }
  397. /*
  398. * Channel mapping routines
  399. */
  400. /*
  401. * Compute derived values in channel_allocations[].
  402. */
  403. static void init_channel_allocations(void)
  404. {
  405. int i, j;
  406. struct cea_channel_speaker_allocation *p;
  407. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  408. p = channel_allocations + i;
  409. p->channels = 0;
  410. p->spk_mask = 0;
  411. for (j = 0; j < ARRAY_SIZE(p->speakers); j++)
  412. if (p->speakers[j]) {
  413. p->channels++;
  414. p->spk_mask |= p->speakers[j];
  415. }
  416. }
  417. }
  418. static int get_channel_allocation_order(int ca)
  419. {
  420. int i;
  421. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  422. if (channel_allocations[i].ca_index == ca)
  423. break;
  424. }
  425. return i;
  426. }
  427. /*
  428. * The transformation takes two steps:
  429. *
  430. * eld->spk_alloc => (eld_speaker_allocation_bits[]) => spk_mask
  431. * spk_mask => (channel_allocations[]) => ai->CA
  432. *
  433. * TODO: it could select the wrong CA from multiple candidates.
  434. */
  435. static int hdmi_channel_allocation(struct hdmi_eld *eld, int channels)
  436. {
  437. int i;
  438. int ca = 0;
  439. int spk_mask = 0;
  440. char buf[SND_PRINT_CHANNEL_ALLOCATION_ADVISED_BUFSIZE];
  441. /*
  442. * CA defaults to 0 for basic stereo audio
  443. */
  444. if (channels <= 2)
  445. return 0;
  446. /*
  447. * expand ELD's speaker allocation mask
  448. *
  449. * ELD tells the speaker mask in a compact(paired) form,
  450. * expand ELD's notions to match the ones used by Audio InfoFrame.
  451. */
  452. for (i = 0; i < ARRAY_SIZE(eld_speaker_allocation_bits); i++) {
  453. if (eld->spk_alloc & (1 << i))
  454. spk_mask |= eld_speaker_allocation_bits[i];
  455. }
  456. /* search for the first working match in the CA table */
  457. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  458. if (channels == channel_allocations[i].channels &&
  459. (spk_mask & channel_allocations[i].spk_mask) ==
  460. channel_allocations[i].spk_mask) {
  461. ca = channel_allocations[i].ca_index;
  462. break;
  463. }
  464. }
  465. snd_print_channel_allocation(eld->spk_alloc, buf, sizeof(buf));
  466. snd_printdd("HDMI: select CA 0x%x for %d-channel allocation: %s\n",
  467. ca, channels, buf);
  468. return ca;
  469. }
  470. static void hdmi_debug_channel_mapping(struct hda_codec *codec,
  471. hda_nid_t pin_nid)
  472. {
  473. #ifdef CONFIG_SND_DEBUG_VERBOSE
  474. int i;
  475. int slot;
  476. for (i = 0; i < 8; i++) {
  477. slot = snd_hda_codec_read(codec, pin_nid, 0,
  478. AC_VERB_GET_HDMI_CHAN_SLOT, i);
  479. printk(KERN_DEBUG "HDMI: ASP channel %d => slot %d\n",
  480. slot >> 4, slot & 0xf);
  481. }
  482. #endif
  483. }
  484. static void hdmi_std_setup_channel_mapping(struct hda_codec *codec,
  485. hda_nid_t pin_nid,
  486. bool non_pcm,
  487. int ca)
  488. {
  489. int i;
  490. int err;
  491. int order;
  492. int non_pcm_mapping[8];
  493. order = get_channel_allocation_order(ca);
  494. if (hdmi_channel_mapping[ca][1] == 0) {
  495. for (i = 0; i < channel_allocations[order].channels; i++)
  496. hdmi_channel_mapping[ca][i] = i | (i << 4);
  497. for (; i < 8; i++)
  498. hdmi_channel_mapping[ca][i] = 0xf | (i << 4);
  499. }
  500. if (non_pcm) {
  501. for (i = 0; i < channel_allocations[order].channels; i++)
  502. non_pcm_mapping[i] = i | (i << 4);
  503. for (; i < 8; i++)
  504. non_pcm_mapping[i] = 0xf | (i << 4);
  505. }
  506. for (i = 0; i < 8; i++) {
  507. err = snd_hda_codec_write(codec, pin_nid, 0,
  508. AC_VERB_SET_HDMI_CHAN_SLOT,
  509. non_pcm ? non_pcm_mapping[i] : hdmi_channel_mapping[ca][i]);
  510. if (err) {
  511. snd_printdd(KERN_NOTICE
  512. "HDMI: channel mapping failed\n");
  513. break;
  514. }
  515. }
  516. hdmi_debug_channel_mapping(codec, pin_nid);
  517. }
  518. struct channel_map_table {
  519. unsigned char map; /* ALSA API channel map position */
  520. unsigned char cea_slot; /* CEA slot value */
  521. int spk_mask; /* speaker position bit mask */
  522. };
  523. static struct channel_map_table map_tables[] = {
  524. { SNDRV_CHMAP_FL, 0x00, FL },
  525. { SNDRV_CHMAP_FR, 0x01, FR },
  526. { SNDRV_CHMAP_RL, 0x04, RL },
  527. { SNDRV_CHMAP_RR, 0x05, RR },
  528. { SNDRV_CHMAP_LFE, 0x02, LFE },
  529. { SNDRV_CHMAP_FC, 0x03, FC },
  530. { SNDRV_CHMAP_RLC, 0x06, RLC },
  531. { SNDRV_CHMAP_RRC, 0x07, RRC },
  532. {} /* terminator */
  533. };
  534. /* from ALSA API channel position to speaker bit mask */
  535. static int to_spk_mask(unsigned char c)
  536. {
  537. struct channel_map_table *t = map_tables;
  538. for (; t->map; t++) {
  539. if (t->map == c)
  540. return t->spk_mask;
  541. }
  542. return 0;
  543. }
  544. /* from ALSA API channel position to CEA slot */
  545. static int to_cea_slot(unsigned char c)
  546. {
  547. struct channel_map_table *t = map_tables;
  548. for (; t->map; t++) {
  549. if (t->map == c)
  550. return t->cea_slot;
  551. }
  552. return 0x0f;
  553. }
  554. /* from CEA slot to ALSA API channel position */
  555. static int from_cea_slot(unsigned char c)
  556. {
  557. struct channel_map_table *t = map_tables;
  558. for (; t->map; t++) {
  559. if (t->cea_slot == c)
  560. return t->map;
  561. }
  562. return 0;
  563. }
  564. /* from speaker bit mask to ALSA API channel position */
  565. static int spk_to_chmap(int spk)
  566. {
  567. struct channel_map_table *t = map_tables;
  568. for (; t->map; t++) {
  569. if (t->spk_mask == spk)
  570. return t->map;
  571. }
  572. return 0;
  573. }
  574. /* get the CA index corresponding to the given ALSA API channel map */
  575. static int hdmi_manual_channel_allocation(int chs, unsigned char *map)
  576. {
  577. int i, spks = 0, spk_mask = 0;
  578. for (i = 0; i < chs; i++) {
  579. int mask = to_spk_mask(map[i]);
  580. if (mask) {
  581. spk_mask |= mask;
  582. spks++;
  583. }
  584. }
  585. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++) {
  586. if ((chs == channel_allocations[i].channels ||
  587. spks == channel_allocations[i].channels) &&
  588. (spk_mask & channel_allocations[i].spk_mask) ==
  589. channel_allocations[i].spk_mask)
  590. return channel_allocations[i].ca_index;
  591. }
  592. return -1;
  593. }
  594. /* set up the channel slots for the given ALSA API channel map */
  595. static int hdmi_manual_setup_channel_mapping(struct hda_codec *codec,
  596. hda_nid_t pin_nid,
  597. int chs, unsigned char *map)
  598. {
  599. int i;
  600. for (i = 0; i < 8; i++) {
  601. int val, err;
  602. if (i < chs)
  603. val = to_cea_slot(map[i]);
  604. else
  605. val = 0xf;
  606. val |= (i << 4);
  607. err = snd_hda_codec_write(codec, pin_nid, 0,
  608. AC_VERB_SET_HDMI_CHAN_SLOT, val);
  609. if (err)
  610. return -EINVAL;
  611. }
  612. return 0;
  613. }
  614. /* store ALSA API channel map from the current default map */
  615. static void hdmi_setup_fake_chmap(unsigned char *map, int ca)
  616. {
  617. int i;
  618. for (i = 0; i < 8; i++) {
  619. if (i < channel_allocations[ca].channels)
  620. map[i] = from_cea_slot((hdmi_channel_mapping[ca][i] >> 4) & 0x0f);
  621. else
  622. map[i] = 0;
  623. }
  624. }
  625. static void hdmi_setup_channel_mapping(struct hda_codec *codec,
  626. hda_nid_t pin_nid, bool non_pcm, int ca,
  627. int channels, unsigned char *map)
  628. {
  629. if (!non_pcm && map) {
  630. hdmi_manual_setup_channel_mapping(codec, pin_nid,
  631. channels, map);
  632. } else {
  633. hdmi_std_setup_channel_mapping(codec, pin_nid, non_pcm, ca);
  634. hdmi_setup_fake_chmap(map, ca);
  635. }
  636. }
  637. /*
  638. * Audio InfoFrame routines
  639. */
  640. /*
  641. * Enable Audio InfoFrame Transmission
  642. */
  643. static void hdmi_start_infoframe_trans(struct hda_codec *codec,
  644. hda_nid_t pin_nid)
  645. {
  646. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  647. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  648. AC_DIPXMIT_BEST);
  649. }
  650. /*
  651. * Disable Audio InfoFrame Transmission
  652. */
  653. static void hdmi_stop_infoframe_trans(struct hda_codec *codec,
  654. hda_nid_t pin_nid)
  655. {
  656. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  657. snd_hda_codec_write(codec, pin_nid, 0, AC_VERB_SET_HDMI_DIP_XMIT,
  658. AC_DIPXMIT_DISABLE);
  659. }
  660. static void hdmi_debug_dip_size(struct hda_codec *codec, hda_nid_t pin_nid)
  661. {
  662. #ifdef CONFIG_SND_DEBUG_VERBOSE
  663. int i;
  664. int size;
  665. size = snd_hdmi_get_eld_size(codec, pin_nid);
  666. printk(KERN_DEBUG "HDMI: ELD buf size is %d\n", size);
  667. for (i = 0; i < 8; i++) {
  668. size = snd_hda_codec_read(codec, pin_nid, 0,
  669. AC_VERB_GET_HDMI_DIP_SIZE, i);
  670. printk(KERN_DEBUG "HDMI: DIP GP[%d] buf size is %d\n", i, size);
  671. }
  672. #endif
  673. }
  674. static void hdmi_clear_dip_buffers(struct hda_codec *codec, hda_nid_t pin_nid)
  675. {
  676. #ifdef BE_PARANOID
  677. int i, j;
  678. int size;
  679. int pi, bi;
  680. for (i = 0; i < 8; i++) {
  681. size = snd_hda_codec_read(codec, pin_nid, 0,
  682. AC_VERB_GET_HDMI_DIP_SIZE, i);
  683. if (size == 0)
  684. continue;
  685. hdmi_set_dip_index(codec, pin_nid, i, 0x0);
  686. for (j = 1; j < 1000; j++) {
  687. hdmi_write_dip_byte(codec, pin_nid, 0x0);
  688. hdmi_get_dip_index(codec, pin_nid, &pi, &bi);
  689. if (pi != i)
  690. snd_printd(KERN_INFO "dip index %d: %d != %d\n",
  691. bi, pi, i);
  692. if (bi == 0) /* byte index wrapped around */
  693. break;
  694. }
  695. snd_printd(KERN_INFO
  696. "HDMI: DIP GP[%d] buf reported size=%d, written=%d\n",
  697. i, size, j);
  698. }
  699. #endif
  700. }
  701. static void hdmi_checksum_audio_infoframe(struct hdmi_audio_infoframe *hdmi_ai)
  702. {
  703. u8 *bytes = (u8 *)hdmi_ai;
  704. u8 sum = 0;
  705. int i;
  706. hdmi_ai->checksum = 0;
  707. for (i = 0; i < sizeof(*hdmi_ai); i++)
  708. sum += bytes[i];
  709. hdmi_ai->checksum = -sum;
  710. }
  711. static void hdmi_fill_audio_infoframe(struct hda_codec *codec,
  712. hda_nid_t pin_nid,
  713. u8 *dip, int size)
  714. {
  715. int i;
  716. hdmi_debug_dip_size(codec, pin_nid);
  717. hdmi_clear_dip_buffers(codec, pin_nid); /* be paranoid */
  718. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  719. for (i = 0; i < size; i++)
  720. hdmi_write_dip_byte(codec, pin_nid, dip[i]);
  721. }
  722. static bool hdmi_infoframe_uptodate(struct hda_codec *codec, hda_nid_t pin_nid,
  723. u8 *dip, int size)
  724. {
  725. u8 val;
  726. int i;
  727. if (snd_hda_codec_read(codec, pin_nid, 0, AC_VERB_GET_HDMI_DIP_XMIT, 0)
  728. != AC_DIPXMIT_BEST)
  729. return false;
  730. hdmi_set_dip_index(codec, pin_nid, 0x0, 0x0);
  731. for (i = 0; i < size; i++) {
  732. val = snd_hda_codec_read(codec, pin_nid, 0,
  733. AC_VERB_GET_HDMI_DIP_DATA, 0);
  734. if (val != dip[i])
  735. return false;
  736. }
  737. return true;
  738. }
  739. static void hdmi_setup_audio_infoframe(struct hda_codec *codec, int pin_idx,
  740. bool non_pcm,
  741. struct snd_pcm_substream *substream)
  742. {
  743. struct hdmi_spec *spec = codec->spec;
  744. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  745. hda_nid_t pin_nid = per_pin->pin_nid;
  746. int channels = substream->runtime->channels;
  747. struct hdmi_eld *eld;
  748. int ca;
  749. union audio_infoframe ai;
  750. eld = &spec->pins[pin_idx].sink_eld;
  751. if (!eld->monitor_present)
  752. return;
  753. if (!non_pcm && per_pin->chmap_set)
  754. ca = hdmi_manual_channel_allocation(channels, per_pin->chmap);
  755. else
  756. ca = hdmi_channel_allocation(eld, channels);
  757. if (ca < 0)
  758. ca = 0;
  759. memset(&ai, 0, sizeof(ai));
  760. if (eld->conn_type == 0) { /* HDMI */
  761. struct hdmi_audio_infoframe *hdmi_ai = &ai.hdmi;
  762. hdmi_ai->type = 0x84;
  763. hdmi_ai->ver = 0x01;
  764. hdmi_ai->len = 0x0a;
  765. hdmi_ai->CC02_CT47 = channels - 1;
  766. hdmi_ai->CA = ca;
  767. hdmi_checksum_audio_infoframe(hdmi_ai);
  768. } else if (eld->conn_type == 1) { /* DisplayPort */
  769. struct dp_audio_infoframe *dp_ai = &ai.dp;
  770. dp_ai->type = 0x84;
  771. dp_ai->len = 0x1b;
  772. dp_ai->ver = 0x11 << 2;
  773. dp_ai->CC02_CT47 = channels - 1;
  774. dp_ai->CA = ca;
  775. } else {
  776. snd_printd("HDMI: unknown connection type at pin %d\n",
  777. pin_nid);
  778. return;
  779. }
  780. /*
  781. * sizeof(ai) is used instead of sizeof(*hdmi_ai) or
  782. * sizeof(*dp_ai) to avoid partial match/update problems when
  783. * the user switches between HDMI/DP monitors.
  784. */
  785. if (!hdmi_infoframe_uptodate(codec, pin_nid, ai.bytes,
  786. sizeof(ai))) {
  787. snd_printdd("hdmi_setup_audio_infoframe: "
  788. "pin=%d channels=%d\n",
  789. pin_nid,
  790. channels);
  791. hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
  792. channels, per_pin->chmap);
  793. hdmi_stop_infoframe_trans(codec, pin_nid);
  794. hdmi_fill_audio_infoframe(codec, pin_nid,
  795. ai.bytes, sizeof(ai));
  796. hdmi_start_infoframe_trans(codec, pin_nid);
  797. } else {
  798. /* For non-pcm audio switch, setup new channel mapping
  799. * accordingly */
  800. if (per_pin->non_pcm != non_pcm)
  801. hdmi_setup_channel_mapping(codec, pin_nid, non_pcm, ca,
  802. channels, per_pin->chmap);
  803. }
  804. per_pin->non_pcm = non_pcm;
  805. }
  806. /*
  807. * Unsolicited events
  808. */
  809. static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll);
  810. static void hdmi_intrinsic_event(struct hda_codec *codec, unsigned int res)
  811. {
  812. struct hdmi_spec *spec = codec->spec;
  813. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  814. int pin_nid;
  815. int pin_idx;
  816. struct hda_jack_tbl *jack;
  817. jack = snd_hda_jack_tbl_get_from_tag(codec, tag);
  818. if (!jack)
  819. return;
  820. pin_nid = jack->nid;
  821. jack->jack_dirty = 1;
  822. _snd_printd(SND_PR_VERBOSE,
  823. "HDMI hot plug event: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
  824. codec->addr, pin_nid,
  825. !!(res & AC_UNSOL_RES_PD), !!(res & AC_UNSOL_RES_ELDV));
  826. pin_idx = pin_nid_to_pin_index(spec, pin_nid);
  827. if (pin_idx < 0)
  828. return;
  829. hdmi_present_sense(&spec->pins[pin_idx], 1);
  830. snd_hda_jack_report_sync(codec);
  831. }
  832. static void hdmi_non_intrinsic_event(struct hda_codec *codec, unsigned int res)
  833. {
  834. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  835. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  836. int cp_state = !!(res & AC_UNSOL_RES_CP_STATE);
  837. int cp_ready = !!(res & AC_UNSOL_RES_CP_READY);
  838. printk(KERN_INFO
  839. "HDMI CP event: CODEC=%d TAG=%d SUBTAG=0x%x CP_STATE=%d CP_READY=%d\n",
  840. codec->addr,
  841. tag,
  842. subtag,
  843. cp_state,
  844. cp_ready);
  845. /* TODO */
  846. if (cp_state)
  847. ;
  848. if (cp_ready)
  849. ;
  850. }
  851. static void hdmi_unsol_event(struct hda_codec *codec, unsigned int res)
  852. {
  853. int tag = res >> AC_UNSOL_RES_TAG_SHIFT;
  854. int subtag = (res & AC_UNSOL_RES_SUBTAG) >> AC_UNSOL_RES_SUBTAG_SHIFT;
  855. if (!snd_hda_jack_tbl_get_from_tag(codec, tag)) {
  856. snd_printd(KERN_INFO "Unexpected HDMI event tag 0x%x\n", tag);
  857. return;
  858. }
  859. if (subtag == 0)
  860. hdmi_intrinsic_event(codec, res);
  861. else
  862. hdmi_non_intrinsic_event(codec, res);
  863. }
  864. /*
  865. * Callbacks
  866. */
  867. /* HBR should be Non-PCM, 8 channels */
  868. #define is_hbr_format(format) \
  869. ((format & AC_FMT_TYPE_NON_PCM) && (format & AC_FMT_CHAN_MASK) == 7)
  870. static int hdmi_setup_stream(struct hda_codec *codec, hda_nid_t cvt_nid,
  871. hda_nid_t pin_nid, u32 stream_tag, int format)
  872. {
  873. int pinctl;
  874. int new_pinctl = 0;
  875. if (snd_hda_query_pin_caps(codec, pin_nid) & AC_PINCAP_HBR) {
  876. pinctl = snd_hda_codec_read(codec, pin_nid, 0,
  877. AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
  878. new_pinctl = pinctl & ~AC_PINCTL_EPT;
  879. if (is_hbr_format(format))
  880. new_pinctl |= AC_PINCTL_EPT_HBR;
  881. else
  882. new_pinctl |= AC_PINCTL_EPT_NATIVE;
  883. snd_printdd("hdmi_setup_stream: "
  884. "NID=0x%x, %spinctl=0x%x\n",
  885. pin_nid,
  886. pinctl == new_pinctl ? "" : "new-",
  887. new_pinctl);
  888. if (pinctl != new_pinctl)
  889. snd_hda_codec_write(codec, pin_nid, 0,
  890. AC_VERB_SET_PIN_WIDGET_CONTROL,
  891. new_pinctl);
  892. }
  893. if (is_hbr_format(format) && !new_pinctl) {
  894. snd_printdd("hdmi_setup_stream: HBR is not supported\n");
  895. return -EINVAL;
  896. }
  897. snd_hda_codec_setup_stream(codec, cvt_nid, stream_tag, 0, format);
  898. return 0;
  899. }
  900. /*
  901. * HDA PCM callbacks
  902. */
  903. static int hdmi_pcm_open(struct hda_pcm_stream *hinfo,
  904. struct hda_codec *codec,
  905. struct snd_pcm_substream *substream)
  906. {
  907. struct hdmi_spec *spec = codec->spec;
  908. struct snd_pcm_runtime *runtime = substream->runtime;
  909. int pin_idx, cvt_idx, mux_idx = 0;
  910. struct hdmi_spec_per_pin *per_pin;
  911. struct hdmi_eld *eld;
  912. struct hdmi_spec_per_cvt *per_cvt = NULL;
  913. /* Validate hinfo */
  914. pin_idx = hinfo_to_pin_index(spec, hinfo);
  915. if (snd_BUG_ON(pin_idx < 0))
  916. return -EINVAL;
  917. per_pin = &spec->pins[pin_idx];
  918. eld = &per_pin->sink_eld;
  919. /* Dynamically assign converter to stream */
  920. for (cvt_idx = 0; cvt_idx < spec->num_cvts; cvt_idx++) {
  921. per_cvt = &spec->cvts[cvt_idx];
  922. /* Must not already be assigned */
  923. if (per_cvt->assigned)
  924. continue;
  925. /* Must be in pin's mux's list of converters */
  926. for (mux_idx = 0; mux_idx < per_pin->num_mux_nids; mux_idx++)
  927. if (per_pin->mux_nids[mux_idx] == per_cvt->cvt_nid)
  928. break;
  929. /* Not in mux list */
  930. if (mux_idx == per_pin->num_mux_nids)
  931. continue;
  932. break;
  933. }
  934. /* No free converters */
  935. if (cvt_idx == spec->num_cvts)
  936. return -ENODEV;
  937. /* Claim converter */
  938. per_cvt->assigned = 1;
  939. hinfo->nid = per_cvt->cvt_nid;
  940. snd_hda_codec_write(codec, per_pin->pin_nid, 0,
  941. AC_VERB_SET_CONNECT_SEL,
  942. mux_idx);
  943. snd_hda_spdif_ctls_assign(codec, pin_idx, per_cvt->cvt_nid);
  944. /* Initially set the converter's capabilities */
  945. hinfo->channels_min = per_cvt->channels_min;
  946. hinfo->channels_max = per_cvt->channels_max;
  947. hinfo->rates = per_cvt->rates;
  948. hinfo->formats = per_cvt->formats;
  949. hinfo->maxbps = per_cvt->maxbps;
  950. /* Restrict capabilities by ELD if this isn't disabled */
  951. if (!static_hdmi_pcm && eld->eld_valid) {
  952. snd_hdmi_eld_update_pcm_info(eld, hinfo);
  953. if (hinfo->channels_min > hinfo->channels_max ||
  954. !hinfo->rates || !hinfo->formats)
  955. return -ENODEV;
  956. }
  957. /* Store the updated parameters */
  958. runtime->hw.channels_min = hinfo->channels_min;
  959. runtime->hw.channels_max = hinfo->channels_max;
  960. runtime->hw.formats = hinfo->formats;
  961. runtime->hw.rates = hinfo->rates;
  962. snd_pcm_hw_constraint_step(substream->runtime, 0,
  963. SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  964. return 0;
  965. }
  966. /*
  967. * HDA/HDMI auto parsing
  968. */
  969. static int hdmi_read_pin_conn(struct hda_codec *codec, int pin_idx)
  970. {
  971. struct hdmi_spec *spec = codec->spec;
  972. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  973. hda_nid_t pin_nid = per_pin->pin_nid;
  974. if (!(get_wcaps(codec, pin_nid) & AC_WCAP_CONN_LIST)) {
  975. snd_printk(KERN_WARNING
  976. "HDMI: pin %d wcaps %#x "
  977. "does not support connection list\n",
  978. pin_nid, get_wcaps(codec, pin_nid));
  979. return -EINVAL;
  980. }
  981. per_pin->num_mux_nids = snd_hda_get_connections(codec, pin_nid,
  982. per_pin->mux_nids,
  983. HDA_MAX_CONNECTIONS);
  984. return 0;
  985. }
  986. static void hdmi_present_sense(struct hdmi_spec_per_pin *per_pin, int repoll)
  987. {
  988. struct hda_codec *codec = per_pin->codec;
  989. struct hdmi_eld *eld = &per_pin->sink_eld;
  990. hda_nid_t pin_nid = per_pin->pin_nid;
  991. /*
  992. * Always execute a GetPinSense verb here, even when called from
  993. * hdmi_intrinsic_event; for some NVIDIA HW, the unsolicited
  994. * response's PD bit is not the real PD value, but indicates that
  995. * the real PD value changed. An older version of the HD-audio
  996. * specification worked this way. Hence, we just ignore the data in
  997. * the unsolicited response to avoid custom WARs.
  998. */
  999. int present = snd_hda_pin_sense(codec, pin_nid);
  1000. bool eld_valid = false;
  1001. memset(eld, 0, offsetof(struct hdmi_eld, eld_buffer));
  1002. eld->monitor_present = !!(present & AC_PINSENSE_PRESENCE);
  1003. if (eld->monitor_present)
  1004. eld_valid = !!(present & AC_PINSENSE_ELDV);
  1005. _snd_printd(SND_PR_VERBOSE,
  1006. "HDMI status: Codec=%d Pin=%d Presence_Detect=%d ELD_Valid=%d\n",
  1007. codec->addr, pin_nid, eld->monitor_present, eld_valid);
  1008. if (eld_valid) {
  1009. if (!snd_hdmi_get_eld(eld, codec, pin_nid))
  1010. snd_hdmi_show_eld(eld);
  1011. else if (repoll) {
  1012. queue_delayed_work(codec->bus->workq,
  1013. &per_pin->work,
  1014. msecs_to_jiffies(300));
  1015. }
  1016. }
  1017. }
  1018. static void hdmi_repoll_eld(struct work_struct *work)
  1019. {
  1020. struct hdmi_spec_per_pin *per_pin =
  1021. container_of(to_delayed_work(work), struct hdmi_spec_per_pin, work);
  1022. if (per_pin->repoll_count++ > 6)
  1023. per_pin->repoll_count = 0;
  1024. hdmi_present_sense(per_pin, per_pin->repoll_count);
  1025. }
  1026. static int hdmi_add_pin(struct hda_codec *codec, hda_nid_t pin_nid)
  1027. {
  1028. struct hdmi_spec *spec = codec->spec;
  1029. unsigned int caps, config;
  1030. int pin_idx;
  1031. struct hdmi_spec_per_pin *per_pin;
  1032. int err;
  1033. caps = snd_hda_query_pin_caps(codec, pin_nid);
  1034. if (!(caps & (AC_PINCAP_HDMI | AC_PINCAP_DP)))
  1035. return 0;
  1036. config = snd_hda_codec_get_pincfg(codec, pin_nid);
  1037. if (get_defcfg_connect(config) == AC_JACK_PORT_NONE)
  1038. return 0;
  1039. if (snd_BUG_ON(spec->num_pins >= MAX_HDMI_PINS))
  1040. return -E2BIG;
  1041. pin_idx = spec->num_pins;
  1042. per_pin = &spec->pins[pin_idx];
  1043. per_pin->pin_nid = pin_nid;
  1044. per_pin->non_pcm = false;
  1045. err = hdmi_read_pin_conn(codec, pin_idx);
  1046. if (err < 0)
  1047. return err;
  1048. spec->num_pins++;
  1049. return 0;
  1050. }
  1051. static int hdmi_add_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
  1052. {
  1053. struct hdmi_spec *spec = codec->spec;
  1054. int cvt_idx;
  1055. struct hdmi_spec_per_cvt *per_cvt;
  1056. unsigned int chans;
  1057. int err;
  1058. if (snd_BUG_ON(spec->num_cvts >= MAX_HDMI_CVTS))
  1059. return -E2BIG;
  1060. chans = get_wcaps(codec, cvt_nid);
  1061. chans = get_wcaps_channels(chans);
  1062. cvt_idx = spec->num_cvts;
  1063. per_cvt = &spec->cvts[cvt_idx];
  1064. per_cvt->cvt_nid = cvt_nid;
  1065. per_cvt->channels_min = 2;
  1066. if (chans <= 16) {
  1067. per_cvt->channels_max = chans;
  1068. if (chans > spec->channels_max)
  1069. spec->channels_max = chans;
  1070. }
  1071. err = snd_hda_query_supported_pcm(codec, cvt_nid,
  1072. &per_cvt->rates,
  1073. &per_cvt->formats,
  1074. &per_cvt->maxbps);
  1075. if (err < 0)
  1076. return err;
  1077. spec->num_cvts++;
  1078. return 0;
  1079. }
  1080. static int hdmi_parse_codec(struct hda_codec *codec)
  1081. {
  1082. hda_nid_t nid;
  1083. int i, nodes;
  1084. nodes = snd_hda_get_sub_nodes(codec, codec->afg, &nid);
  1085. if (!nid || nodes < 0) {
  1086. snd_printk(KERN_WARNING "HDMI: failed to get afg sub nodes\n");
  1087. return -EINVAL;
  1088. }
  1089. for (i = 0; i < nodes; i++, nid++) {
  1090. unsigned int caps;
  1091. unsigned int type;
  1092. caps = get_wcaps(codec, nid);
  1093. type = get_wcaps_type(caps);
  1094. if (!(caps & AC_WCAP_DIGITAL))
  1095. continue;
  1096. switch (type) {
  1097. case AC_WID_AUD_OUT:
  1098. hdmi_add_cvt(codec, nid);
  1099. break;
  1100. case AC_WID_PIN:
  1101. hdmi_add_pin(codec, nid);
  1102. break;
  1103. }
  1104. }
  1105. #ifdef CONFIG_PM
  1106. /* We're seeing some problems with unsolicited hot plug events on
  1107. * PantherPoint after S3, if this is not enabled */
  1108. if (codec->vendor_id == 0x80862806)
  1109. codec->bus->power_keep_link_on = 1;
  1110. /*
  1111. * G45/IbexPeak don't support EPSS: the unsolicited pin hot plug event
  1112. * can be lost and presence sense verb will become inaccurate if the
  1113. * HDA link is powered off at hot plug or hw initialization time.
  1114. */
  1115. else if (!(snd_hda_param_read(codec, codec->afg, AC_PAR_POWER_STATE) &
  1116. AC_PWRST_EPSS))
  1117. codec->bus->power_keep_link_on = 1;
  1118. #endif
  1119. return 0;
  1120. }
  1121. /*
  1122. */
  1123. static char *get_hdmi_pcm_name(int idx)
  1124. {
  1125. static char names[MAX_HDMI_PINS][8];
  1126. sprintf(&names[idx][0], "HDMI %d", idx);
  1127. return &names[idx][0];
  1128. }
  1129. static bool check_non_pcm_per_cvt(struct hda_codec *codec, hda_nid_t cvt_nid)
  1130. {
  1131. struct hda_spdif_out *spdif;
  1132. bool non_pcm;
  1133. mutex_lock(&codec->spdif_mutex);
  1134. spdif = snd_hda_spdif_out_of_nid(codec, cvt_nid);
  1135. non_pcm = !!(spdif->status & IEC958_AES0_NONAUDIO);
  1136. mutex_unlock(&codec->spdif_mutex);
  1137. return non_pcm;
  1138. }
  1139. /*
  1140. * HDMI callbacks
  1141. */
  1142. static int generic_hdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1143. struct hda_codec *codec,
  1144. unsigned int stream_tag,
  1145. unsigned int format,
  1146. struct snd_pcm_substream *substream)
  1147. {
  1148. hda_nid_t cvt_nid = hinfo->nid;
  1149. struct hdmi_spec *spec = codec->spec;
  1150. int pin_idx = hinfo_to_pin_index(spec, hinfo);
  1151. hda_nid_t pin_nid = spec->pins[pin_idx].pin_nid;
  1152. bool non_pcm;
  1153. non_pcm = check_non_pcm_per_cvt(codec, cvt_nid);
  1154. hdmi_set_channel_count(codec, cvt_nid, substream->runtime->channels);
  1155. hdmi_setup_audio_infoframe(codec, pin_idx, non_pcm, substream);
  1156. return hdmi_setup_stream(codec, cvt_nid, pin_nid, stream_tag, format);
  1157. }
  1158. static int generic_hdmi_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
  1159. struct hda_codec *codec,
  1160. struct snd_pcm_substream *substream)
  1161. {
  1162. snd_hda_codec_cleanup_stream(codec, hinfo->nid);
  1163. return 0;
  1164. }
  1165. static int hdmi_pcm_close(struct hda_pcm_stream *hinfo,
  1166. struct hda_codec *codec,
  1167. struct snd_pcm_substream *substream)
  1168. {
  1169. struct hdmi_spec *spec = codec->spec;
  1170. int cvt_idx, pin_idx;
  1171. struct hdmi_spec_per_cvt *per_cvt;
  1172. struct hdmi_spec_per_pin *per_pin;
  1173. if (hinfo->nid) {
  1174. cvt_idx = cvt_nid_to_cvt_index(spec, hinfo->nid);
  1175. if (snd_BUG_ON(cvt_idx < 0))
  1176. return -EINVAL;
  1177. per_cvt = &spec->cvts[cvt_idx];
  1178. snd_BUG_ON(!per_cvt->assigned);
  1179. per_cvt->assigned = 0;
  1180. hinfo->nid = 0;
  1181. pin_idx = hinfo_to_pin_index(spec, hinfo);
  1182. if (snd_BUG_ON(pin_idx < 0))
  1183. return -EINVAL;
  1184. per_pin = &spec->pins[pin_idx];
  1185. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1186. per_pin->chmap_set = false;
  1187. memset(per_pin->chmap, 0, sizeof(per_pin->chmap));
  1188. }
  1189. return 0;
  1190. }
  1191. static const struct hda_pcm_ops generic_ops = {
  1192. .open = hdmi_pcm_open,
  1193. .close = hdmi_pcm_close,
  1194. .prepare = generic_hdmi_playback_pcm_prepare,
  1195. .cleanup = generic_hdmi_playback_pcm_cleanup,
  1196. };
  1197. /*
  1198. * ALSA API channel-map control callbacks
  1199. */
  1200. static int hdmi_chmap_ctl_info(struct snd_kcontrol *kcontrol,
  1201. struct snd_ctl_elem_info *uinfo)
  1202. {
  1203. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1204. struct hda_codec *codec = info->private_data;
  1205. struct hdmi_spec *spec = codec->spec;
  1206. uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
  1207. uinfo->count = spec->channels_max;
  1208. uinfo->value.integer.min = 0;
  1209. uinfo->value.integer.max = SNDRV_CHMAP_LAST;
  1210. return 0;
  1211. }
  1212. static int hdmi_chmap_ctl_tlv(struct snd_kcontrol *kcontrol, int op_flag,
  1213. unsigned int size, unsigned int __user *tlv)
  1214. {
  1215. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1216. struct hda_codec *codec = info->private_data;
  1217. struct hdmi_spec *spec = codec->spec;
  1218. const unsigned int valid_mask =
  1219. FL | FR | RL | RR | LFE | FC | RLC | RRC;
  1220. unsigned int __user *dst;
  1221. int chs, count = 0;
  1222. if (size < 8)
  1223. return -ENOMEM;
  1224. if (put_user(SNDRV_CTL_TLVT_CONTAINER, tlv))
  1225. return -EFAULT;
  1226. size -= 8;
  1227. dst = tlv + 2;
  1228. for (chs = 2; chs <= spec->channels_max; chs++) {
  1229. int i, c;
  1230. struct cea_channel_speaker_allocation *cap;
  1231. cap = channel_allocations;
  1232. for (i = 0; i < ARRAY_SIZE(channel_allocations); i++, cap++) {
  1233. int chs_bytes = chs * 4;
  1234. if (cap->channels != chs)
  1235. continue;
  1236. if (cap->spk_mask & ~valid_mask)
  1237. continue;
  1238. if (size < 8)
  1239. return -ENOMEM;
  1240. if (put_user(SNDRV_CTL_TLVT_CHMAP_VAR, dst) ||
  1241. put_user(chs_bytes, dst + 1))
  1242. return -EFAULT;
  1243. dst += 2;
  1244. size -= 8;
  1245. count += 8;
  1246. if (size < chs_bytes)
  1247. return -ENOMEM;
  1248. size -= chs_bytes;
  1249. count += chs_bytes;
  1250. for (c = 7; c >= 0; c--) {
  1251. int spk = cap->speakers[c];
  1252. if (!spk)
  1253. continue;
  1254. if (put_user(spk_to_chmap(spk), dst))
  1255. return -EFAULT;
  1256. dst++;
  1257. }
  1258. }
  1259. }
  1260. if (put_user(count, tlv + 1))
  1261. return -EFAULT;
  1262. return 0;
  1263. }
  1264. static int hdmi_chmap_ctl_get(struct snd_kcontrol *kcontrol,
  1265. struct snd_ctl_elem_value *ucontrol)
  1266. {
  1267. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1268. struct hda_codec *codec = info->private_data;
  1269. struct hdmi_spec *spec = codec->spec;
  1270. int pin_idx = kcontrol->private_value;
  1271. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1272. int i;
  1273. for (i = 0; i < ARRAY_SIZE(per_pin->chmap); i++)
  1274. ucontrol->value.integer.value[i] = per_pin->chmap[i];
  1275. return 0;
  1276. }
  1277. static int hdmi_chmap_ctl_put(struct snd_kcontrol *kcontrol,
  1278. struct snd_ctl_elem_value *ucontrol)
  1279. {
  1280. struct snd_pcm_chmap *info = snd_kcontrol_chip(kcontrol);
  1281. struct hda_codec *codec = info->private_data;
  1282. struct hdmi_spec *spec = codec->spec;
  1283. int pin_idx = kcontrol->private_value;
  1284. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1285. unsigned int ctl_idx;
  1286. struct snd_pcm_substream *substream;
  1287. unsigned char chmap[8];
  1288. int i, ca, prepared = 0;
  1289. ctl_idx = snd_ctl_get_ioffidx(kcontrol, &ucontrol->id);
  1290. substream = snd_pcm_chmap_substream(info, ctl_idx);
  1291. if (!substream || !substream->runtime)
  1292. return -EBADFD;
  1293. switch (substream->runtime->status->state) {
  1294. case SNDRV_PCM_STATE_OPEN:
  1295. case SNDRV_PCM_STATE_SETUP:
  1296. break;
  1297. case SNDRV_PCM_STATE_PREPARED:
  1298. prepared = 1;
  1299. break;
  1300. default:
  1301. return -EBUSY;
  1302. }
  1303. memset(chmap, 0, sizeof(chmap));
  1304. for (i = 0; i < ARRAY_SIZE(chmap); i++)
  1305. chmap[i] = ucontrol->value.integer.value[i];
  1306. if (!memcmp(chmap, per_pin->chmap, sizeof(chmap)))
  1307. return 0;
  1308. ca = hdmi_manual_channel_allocation(ARRAY_SIZE(chmap), chmap);
  1309. if (ca < 0)
  1310. return -EINVAL;
  1311. per_pin->chmap_set = true;
  1312. memcpy(per_pin->chmap, chmap, sizeof(chmap));
  1313. if (prepared)
  1314. hdmi_setup_audio_infoframe(codec, pin_idx, per_pin->non_pcm,
  1315. substream);
  1316. return 0;
  1317. }
  1318. static int generic_hdmi_build_pcms(struct hda_codec *codec)
  1319. {
  1320. struct hdmi_spec *spec = codec->spec;
  1321. int pin_idx;
  1322. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1323. struct hda_pcm *info;
  1324. struct hda_pcm_stream *pstr;
  1325. info = &spec->pcm_rec[pin_idx];
  1326. info->name = get_hdmi_pcm_name(pin_idx);
  1327. info->pcm_type = HDA_PCM_TYPE_HDMI;
  1328. info->own_chmap = true;
  1329. pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
  1330. pstr->substreams = 1;
  1331. pstr->ops = generic_ops;
  1332. /* other pstr fields are set in open */
  1333. }
  1334. codec->num_pcms = spec->num_pins;
  1335. codec->pcm_info = spec->pcm_rec;
  1336. return 0;
  1337. }
  1338. static int generic_hdmi_build_jack(struct hda_codec *codec, int pin_idx)
  1339. {
  1340. char hdmi_str[32] = "HDMI/DP";
  1341. struct hdmi_spec *spec = codec->spec;
  1342. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1343. int pcmdev = spec->pcm_rec[pin_idx].device;
  1344. if (pcmdev > 0)
  1345. sprintf(hdmi_str + strlen(hdmi_str), ",pcm=%d", pcmdev);
  1346. return snd_hda_jack_add_kctl(codec, per_pin->pin_nid, hdmi_str, 0);
  1347. }
  1348. static int generic_hdmi_build_controls(struct hda_codec *codec)
  1349. {
  1350. struct hdmi_spec *spec = codec->spec;
  1351. int err;
  1352. int pin_idx;
  1353. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1354. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1355. err = generic_hdmi_build_jack(codec, pin_idx);
  1356. if (err < 0)
  1357. return err;
  1358. err = snd_hda_create_dig_out_ctls(codec,
  1359. per_pin->pin_nid,
  1360. per_pin->mux_nids[0],
  1361. HDA_PCM_TYPE_HDMI);
  1362. if (err < 0)
  1363. return err;
  1364. snd_hda_spdif_ctls_unassign(codec, pin_idx);
  1365. /* add control for ELD Bytes */
  1366. err = hdmi_create_eld_ctl(codec,
  1367. pin_idx,
  1368. spec->pcm_rec[pin_idx].device);
  1369. if (err < 0)
  1370. return err;
  1371. hdmi_present_sense(per_pin, 0);
  1372. }
  1373. /* add channel maps */
  1374. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1375. struct snd_pcm_chmap *chmap;
  1376. struct snd_kcontrol *kctl;
  1377. int i;
  1378. err = snd_pcm_add_chmap_ctls(codec->pcm_info[pin_idx].pcm,
  1379. SNDRV_PCM_STREAM_PLAYBACK,
  1380. NULL, 0, pin_idx, &chmap);
  1381. if (err < 0)
  1382. return err;
  1383. /* override handlers */
  1384. chmap->private_data = codec;
  1385. kctl = chmap->kctl;
  1386. for (i = 0; i < kctl->count; i++)
  1387. kctl->vd[i].access |= SNDRV_CTL_ELEM_ACCESS_WRITE;
  1388. kctl->info = hdmi_chmap_ctl_info;
  1389. kctl->get = hdmi_chmap_ctl_get;
  1390. kctl->put = hdmi_chmap_ctl_put;
  1391. kctl->tlv.c = hdmi_chmap_ctl_tlv;
  1392. }
  1393. return 0;
  1394. }
  1395. static int generic_hdmi_init_per_pins(struct hda_codec *codec)
  1396. {
  1397. struct hdmi_spec *spec = codec->spec;
  1398. int pin_idx;
  1399. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1400. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1401. struct hdmi_eld *eld = &per_pin->sink_eld;
  1402. per_pin->codec = codec;
  1403. INIT_DELAYED_WORK(&per_pin->work, hdmi_repoll_eld);
  1404. snd_hda_eld_proc_new(codec, eld, pin_idx);
  1405. }
  1406. return 0;
  1407. }
  1408. static int generic_hdmi_init(struct hda_codec *codec)
  1409. {
  1410. struct hdmi_spec *spec = codec->spec;
  1411. int pin_idx;
  1412. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1413. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1414. hda_nid_t pin_nid = per_pin->pin_nid;
  1415. hdmi_init_pin(codec, pin_nid);
  1416. snd_hda_jack_detect_enable(codec, pin_nid, pin_nid);
  1417. }
  1418. return 0;
  1419. }
  1420. static void generic_hdmi_free(struct hda_codec *codec)
  1421. {
  1422. struct hdmi_spec *spec = codec->spec;
  1423. int pin_idx;
  1424. for (pin_idx = 0; pin_idx < spec->num_pins; pin_idx++) {
  1425. struct hdmi_spec_per_pin *per_pin = &spec->pins[pin_idx];
  1426. struct hdmi_eld *eld = &per_pin->sink_eld;
  1427. cancel_delayed_work(&per_pin->work);
  1428. snd_hda_eld_proc_free(codec, eld);
  1429. }
  1430. flush_workqueue(codec->bus->workq);
  1431. kfree(spec);
  1432. }
  1433. static const struct hda_codec_ops generic_hdmi_patch_ops = {
  1434. .init = generic_hdmi_init,
  1435. .free = generic_hdmi_free,
  1436. .build_pcms = generic_hdmi_build_pcms,
  1437. .build_controls = generic_hdmi_build_controls,
  1438. .unsol_event = hdmi_unsol_event,
  1439. };
  1440. static void intel_haswell_fixup_connect_list(struct hda_codec *codec)
  1441. {
  1442. unsigned int vendor_param;
  1443. hda_nid_t list[3] = {0x2, 0x3, 0x4};
  1444. vendor_param = snd_hda_codec_read(codec, 0x08, 0, 0xf81, 0);
  1445. if (vendor_param == -1 || vendor_param & 0x02)
  1446. return;
  1447. /* enable DP1.2 mode */
  1448. vendor_param |= 0x02;
  1449. snd_hda_codec_read(codec, 0x08, 0, 0x781, vendor_param);
  1450. vendor_param = snd_hda_codec_read(codec, 0x08, 0, 0xf81, 0);
  1451. if (vendor_param == -1 || !(vendor_param & 0x02))
  1452. return;
  1453. /* override 3 pins connection list */
  1454. snd_hda_override_conn_list(codec, 0x05, 3, list);
  1455. snd_hda_override_conn_list(codec, 0x06, 3, list);
  1456. snd_hda_override_conn_list(codec, 0x07, 3, list);
  1457. }
  1458. static int patch_generic_hdmi(struct hda_codec *codec)
  1459. {
  1460. struct hdmi_spec *spec;
  1461. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  1462. if (spec == NULL)
  1463. return -ENOMEM;
  1464. codec->spec = spec;
  1465. if (codec->vendor_id == 0x80862807)
  1466. intel_haswell_fixup_connect_list(codec);
  1467. if (hdmi_parse_codec(codec) < 0) {
  1468. codec->spec = NULL;
  1469. kfree(spec);
  1470. return -EINVAL;
  1471. }
  1472. codec->patch_ops = generic_hdmi_patch_ops;
  1473. generic_hdmi_init_per_pins(codec);
  1474. init_channel_allocations();
  1475. return 0;
  1476. }
  1477. /*
  1478. * Shared non-generic implementations
  1479. */
  1480. static int simple_playback_build_pcms(struct hda_codec *codec)
  1481. {
  1482. struct hdmi_spec *spec = codec->spec;
  1483. struct hda_pcm *info = spec->pcm_rec;
  1484. unsigned int chans;
  1485. struct hda_pcm_stream *pstr;
  1486. codec->num_pcms = 1;
  1487. codec->pcm_info = info;
  1488. chans = get_wcaps(codec, spec->cvts[0].cvt_nid);
  1489. chans = get_wcaps_channels(chans);
  1490. info->name = get_hdmi_pcm_name(0);
  1491. info->pcm_type = HDA_PCM_TYPE_HDMI;
  1492. pstr = &info->stream[SNDRV_PCM_STREAM_PLAYBACK];
  1493. *pstr = spec->pcm_playback;
  1494. pstr->nid = spec->cvts[0].cvt_nid;
  1495. if (pstr->channels_max <= 2 && chans && chans <= 16)
  1496. pstr->channels_max = chans;
  1497. return 0;
  1498. }
  1499. /* unsolicited event for jack sensing */
  1500. static void simple_hdmi_unsol_event(struct hda_codec *codec,
  1501. unsigned int res)
  1502. {
  1503. snd_hda_jack_set_dirty_all(codec);
  1504. snd_hda_jack_report_sync(codec);
  1505. }
  1506. /* generic_hdmi_build_jack can be used for simple_hdmi, too,
  1507. * as long as spec->pins[] is set correctly
  1508. */
  1509. #define simple_hdmi_build_jack generic_hdmi_build_jack
  1510. static int simple_playback_build_controls(struct hda_codec *codec)
  1511. {
  1512. struct hdmi_spec *spec = codec->spec;
  1513. int err;
  1514. err = snd_hda_create_spdif_out_ctls(codec,
  1515. spec->cvts[0].cvt_nid,
  1516. spec->cvts[0].cvt_nid);
  1517. if (err < 0)
  1518. return err;
  1519. return simple_hdmi_build_jack(codec, 0);
  1520. }
  1521. static int simple_playback_init(struct hda_codec *codec)
  1522. {
  1523. struct hdmi_spec *spec = codec->spec;
  1524. hda_nid_t pin = spec->pins[0].pin_nid;
  1525. snd_hda_codec_write(codec, pin, 0,
  1526. AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT);
  1527. /* some codecs require to unmute the pin */
  1528. if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
  1529. snd_hda_codec_write(codec, pin, 0, AC_VERB_SET_AMP_GAIN_MUTE,
  1530. AMP_OUT_UNMUTE);
  1531. snd_hda_jack_detect_enable(codec, pin, pin);
  1532. return 0;
  1533. }
  1534. static void simple_playback_free(struct hda_codec *codec)
  1535. {
  1536. struct hdmi_spec *spec = codec->spec;
  1537. kfree(spec);
  1538. }
  1539. /*
  1540. * Nvidia specific implementations
  1541. */
  1542. #define Nv_VERB_SET_Channel_Allocation 0xF79
  1543. #define Nv_VERB_SET_Info_Frame_Checksum 0xF7A
  1544. #define Nv_VERB_SET_Audio_Protection_On 0xF98
  1545. #define Nv_VERB_SET_Audio_Protection_Off 0xF99
  1546. #define nvhdmi_master_con_nid_7x 0x04
  1547. #define nvhdmi_master_pin_nid_7x 0x05
  1548. static const hda_nid_t nvhdmi_con_nids_7x[4] = {
  1549. /*front, rear, clfe, rear_surr */
  1550. 0x6, 0x8, 0xa, 0xc,
  1551. };
  1552. static const struct hda_verb nvhdmi_basic_init_7x_2ch[] = {
  1553. /* set audio protect on */
  1554. { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
  1555. /* enable digital output on pin widget */
  1556. { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1557. {} /* terminator */
  1558. };
  1559. static const struct hda_verb nvhdmi_basic_init_7x_8ch[] = {
  1560. /* set audio protect on */
  1561. { 0x1, Nv_VERB_SET_Audio_Protection_On, 0x1},
  1562. /* enable digital output on pin widget */
  1563. { 0x5, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1564. { 0x7, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1565. { 0x9, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1566. { 0xb, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1567. { 0xd, AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_OUT | 0x5 },
  1568. {} /* terminator */
  1569. };
  1570. #ifdef LIMITED_RATE_FMT_SUPPORT
  1571. /* support only the safe format and rate */
  1572. #define SUPPORTED_RATES SNDRV_PCM_RATE_48000
  1573. #define SUPPORTED_MAXBPS 16
  1574. #define SUPPORTED_FORMATS SNDRV_PCM_FMTBIT_S16_LE
  1575. #else
  1576. /* support all rates and formats */
  1577. #define SUPPORTED_RATES \
  1578. (SNDRV_PCM_RATE_32000 | SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000 |\
  1579. SNDRV_PCM_RATE_88200 | SNDRV_PCM_RATE_96000 | SNDRV_PCM_RATE_176400 |\
  1580. SNDRV_PCM_RATE_192000)
  1581. #define SUPPORTED_MAXBPS 24
  1582. #define SUPPORTED_FORMATS \
  1583. (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S32_LE)
  1584. #endif
  1585. static int nvhdmi_7x_init_2ch(struct hda_codec *codec)
  1586. {
  1587. snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_2ch);
  1588. return 0;
  1589. }
  1590. static int nvhdmi_7x_init_8ch(struct hda_codec *codec)
  1591. {
  1592. snd_hda_sequence_write(codec, nvhdmi_basic_init_7x_8ch);
  1593. return 0;
  1594. }
  1595. static unsigned int channels_2_6_8[] = {
  1596. 2, 6, 8
  1597. };
  1598. static unsigned int channels_2_8[] = {
  1599. 2, 8
  1600. };
  1601. static struct snd_pcm_hw_constraint_list hw_constraints_2_6_8_channels = {
  1602. .count = ARRAY_SIZE(channels_2_6_8),
  1603. .list = channels_2_6_8,
  1604. .mask = 0,
  1605. };
  1606. static struct snd_pcm_hw_constraint_list hw_constraints_2_8_channels = {
  1607. .count = ARRAY_SIZE(channels_2_8),
  1608. .list = channels_2_8,
  1609. .mask = 0,
  1610. };
  1611. static int simple_playback_pcm_open(struct hda_pcm_stream *hinfo,
  1612. struct hda_codec *codec,
  1613. struct snd_pcm_substream *substream)
  1614. {
  1615. struct hdmi_spec *spec = codec->spec;
  1616. struct snd_pcm_hw_constraint_list *hw_constraints_channels = NULL;
  1617. switch (codec->preset->id) {
  1618. case 0x10de0002:
  1619. case 0x10de0003:
  1620. case 0x10de0005:
  1621. case 0x10de0006:
  1622. hw_constraints_channels = &hw_constraints_2_8_channels;
  1623. break;
  1624. case 0x10de0007:
  1625. hw_constraints_channels = &hw_constraints_2_6_8_channels;
  1626. break;
  1627. default:
  1628. break;
  1629. }
  1630. if (hw_constraints_channels != NULL) {
  1631. snd_pcm_hw_constraint_list(substream->runtime, 0,
  1632. SNDRV_PCM_HW_PARAM_CHANNELS,
  1633. hw_constraints_channels);
  1634. } else {
  1635. snd_pcm_hw_constraint_step(substream->runtime, 0,
  1636. SNDRV_PCM_HW_PARAM_CHANNELS, 2);
  1637. }
  1638. return snd_hda_multi_out_dig_open(codec, &spec->multiout);
  1639. }
  1640. static int simple_playback_pcm_close(struct hda_pcm_stream *hinfo,
  1641. struct hda_codec *codec,
  1642. struct snd_pcm_substream *substream)
  1643. {
  1644. struct hdmi_spec *spec = codec->spec;
  1645. return snd_hda_multi_out_dig_close(codec, &spec->multiout);
  1646. }
  1647. static int simple_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1648. struct hda_codec *codec,
  1649. unsigned int stream_tag,
  1650. unsigned int format,
  1651. struct snd_pcm_substream *substream)
  1652. {
  1653. struct hdmi_spec *spec = codec->spec;
  1654. return snd_hda_multi_out_dig_prepare(codec, &spec->multiout,
  1655. stream_tag, format, substream);
  1656. }
  1657. static const struct hda_pcm_stream simple_pcm_playback = {
  1658. .substreams = 1,
  1659. .channels_min = 2,
  1660. .channels_max = 2,
  1661. .ops = {
  1662. .open = simple_playback_pcm_open,
  1663. .close = simple_playback_pcm_close,
  1664. .prepare = simple_playback_pcm_prepare
  1665. },
  1666. };
  1667. static const struct hda_codec_ops simple_hdmi_patch_ops = {
  1668. .build_controls = simple_playback_build_controls,
  1669. .build_pcms = simple_playback_build_pcms,
  1670. .init = simple_playback_init,
  1671. .free = simple_playback_free,
  1672. .unsol_event = simple_hdmi_unsol_event,
  1673. };
  1674. static int patch_simple_hdmi(struct hda_codec *codec,
  1675. hda_nid_t cvt_nid, hda_nid_t pin_nid)
  1676. {
  1677. struct hdmi_spec *spec;
  1678. spec = kzalloc(sizeof(*spec), GFP_KERNEL);
  1679. if (!spec)
  1680. return -ENOMEM;
  1681. codec->spec = spec;
  1682. spec->multiout.num_dacs = 0; /* no analog */
  1683. spec->multiout.max_channels = 2;
  1684. spec->multiout.dig_out_nid = cvt_nid;
  1685. spec->num_cvts = 1;
  1686. spec->num_pins = 1;
  1687. spec->cvts[0].cvt_nid = cvt_nid;
  1688. spec->pins[0].pin_nid = pin_nid;
  1689. spec->pcm_playback = simple_pcm_playback;
  1690. codec->patch_ops = simple_hdmi_patch_ops;
  1691. return 0;
  1692. }
  1693. static void nvhdmi_8ch_7x_set_info_frame_parameters(struct hda_codec *codec,
  1694. int channels)
  1695. {
  1696. unsigned int chanmask;
  1697. int chan = channels ? (channels - 1) : 1;
  1698. switch (channels) {
  1699. default:
  1700. case 0:
  1701. case 2:
  1702. chanmask = 0x00;
  1703. break;
  1704. case 4:
  1705. chanmask = 0x08;
  1706. break;
  1707. case 6:
  1708. chanmask = 0x0b;
  1709. break;
  1710. case 8:
  1711. chanmask = 0x13;
  1712. break;
  1713. }
  1714. /* Set the audio infoframe channel allocation and checksum fields. The
  1715. * channel count is computed implicitly by the hardware. */
  1716. snd_hda_codec_write(codec, 0x1, 0,
  1717. Nv_VERB_SET_Channel_Allocation, chanmask);
  1718. snd_hda_codec_write(codec, 0x1, 0,
  1719. Nv_VERB_SET_Info_Frame_Checksum,
  1720. (0x71 - chan - chanmask));
  1721. }
  1722. static int nvhdmi_8ch_7x_pcm_close(struct hda_pcm_stream *hinfo,
  1723. struct hda_codec *codec,
  1724. struct snd_pcm_substream *substream)
  1725. {
  1726. struct hdmi_spec *spec = codec->spec;
  1727. int i;
  1728. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x,
  1729. 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
  1730. for (i = 0; i < 4; i++) {
  1731. /* set the stream id */
  1732. snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
  1733. AC_VERB_SET_CHANNEL_STREAMID, 0);
  1734. /* set the stream format */
  1735. snd_hda_codec_write(codec, nvhdmi_con_nids_7x[i], 0,
  1736. AC_VERB_SET_STREAM_FORMAT, 0);
  1737. }
  1738. /* The audio hardware sends a channel count of 0x7 (8ch) when all the
  1739. * streams are disabled. */
  1740. nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
  1741. return snd_hda_multi_out_dig_close(codec, &spec->multiout);
  1742. }
  1743. static int nvhdmi_8ch_7x_pcm_prepare(struct hda_pcm_stream *hinfo,
  1744. struct hda_codec *codec,
  1745. unsigned int stream_tag,
  1746. unsigned int format,
  1747. struct snd_pcm_substream *substream)
  1748. {
  1749. int chs;
  1750. unsigned int dataDCC2, channel_id;
  1751. int i;
  1752. struct hdmi_spec *spec = codec->spec;
  1753. struct hda_spdif_out *spdif;
  1754. mutex_lock(&codec->spdif_mutex);
  1755. spdif = snd_hda_spdif_out_of_nid(codec, spec->cvts[0].cvt_nid);
  1756. chs = substream->runtime->channels;
  1757. dataDCC2 = 0x2;
  1758. /* turn off SPDIF once; otherwise the IEC958 bits won't be updated */
  1759. if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE))
  1760. snd_hda_codec_write(codec,
  1761. nvhdmi_master_con_nid_7x,
  1762. 0,
  1763. AC_VERB_SET_DIGI_CONVERT_1,
  1764. spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
  1765. /* set the stream id */
  1766. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
  1767. AC_VERB_SET_CHANNEL_STREAMID, (stream_tag << 4) | 0x0);
  1768. /* set the stream format */
  1769. snd_hda_codec_write(codec, nvhdmi_master_con_nid_7x, 0,
  1770. AC_VERB_SET_STREAM_FORMAT, format);
  1771. /* turn on again (if needed) */
  1772. /* enable and set the channel status audio/data flag */
  1773. if (codec->spdif_status_reset && (spdif->ctls & AC_DIG1_ENABLE)) {
  1774. snd_hda_codec_write(codec,
  1775. nvhdmi_master_con_nid_7x,
  1776. 0,
  1777. AC_VERB_SET_DIGI_CONVERT_1,
  1778. spdif->ctls & 0xff);
  1779. snd_hda_codec_write(codec,
  1780. nvhdmi_master_con_nid_7x,
  1781. 0,
  1782. AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
  1783. }
  1784. for (i = 0; i < 4; i++) {
  1785. if (chs == 2)
  1786. channel_id = 0;
  1787. else
  1788. channel_id = i * 2;
  1789. /* turn off SPDIF once;
  1790. *otherwise the IEC958 bits won't be updated
  1791. */
  1792. if (codec->spdif_status_reset &&
  1793. (spdif->ctls & AC_DIG1_ENABLE))
  1794. snd_hda_codec_write(codec,
  1795. nvhdmi_con_nids_7x[i],
  1796. 0,
  1797. AC_VERB_SET_DIGI_CONVERT_1,
  1798. spdif->ctls & ~AC_DIG1_ENABLE & 0xff);
  1799. /* set the stream id */
  1800. snd_hda_codec_write(codec,
  1801. nvhdmi_con_nids_7x[i],
  1802. 0,
  1803. AC_VERB_SET_CHANNEL_STREAMID,
  1804. (stream_tag << 4) | channel_id);
  1805. /* set the stream format */
  1806. snd_hda_codec_write(codec,
  1807. nvhdmi_con_nids_7x[i],
  1808. 0,
  1809. AC_VERB_SET_STREAM_FORMAT,
  1810. format);
  1811. /* turn on again (if needed) */
  1812. /* enable and set the channel status audio/data flag */
  1813. if (codec->spdif_status_reset &&
  1814. (spdif->ctls & AC_DIG1_ENABLE)) {
  1815. snd_hda_codec_write(codec,
  1816. nvhdmi_con_nids_7x[i],
  1817. 0,
  1818. AC_VERB_SET_DIGI_CONVERT_1,
  1819. spdif->ctls & 0xff);
  1820. snd_hda_codec_write(codec,
  1821. nvhdmi_con_nids_7x[i],
  1822. 0,
  1823. AC_VERB_SET_DIGI_CONVERT_2, dataDCC2);
  1824. }
  1825. }
  1826. nvhdmi_8ch_7x_set_info_frame_parameters(codec, chs);
  1827. mutex_unlock(&codec->spdif_mutex);
  1828. return 0;
  1829. }
  1830. static const struct hda_pcm_stream nvhdmi_pcm_playback_8ch_7x = {
  1831. .substreams = 1,
  1832. .channels_min = 2,
  1833. .channels_max = 8,
  1834. .nid = nvhdmi_master_con_nid_7x,
  1835. .rates = SUPPORTED_RATES,
  1836. .maxbps = SUPPORTED_MAXBPS,
  1837. .formats = SUPPORTED_FORMATS,
  1838. .ops = {
  1839. .open = simple_playback_pcm_open,
  1840. .close = nvhdmi_8ch_7x_pcm_close,
  1841. .prepare = nvhdmi_8ch_7x_pcm_prepare
  1842. },
  1843. };
  1844. static int patch_nvhdmi_2ch(struct hda_codec *codec)
  1845. {
  1846. struct hdmi_spec *spec;
  1847. int err = patch_simple_hdmi(codec, nvhdmi_master_con_nid_7x,
  1848. nvhdmi_master_pin_nid_7x);
  1849. if (err < 0)
  1850. return err;
  1851. codec->patch_ops.init = nvhdmi_7x_init_2ch;
  1852. /* override the PCM rates, etc, as the codec doesn't give full list */
  1853. spec = codec->spec;
  1854. spec->pcm_playback.rates = SUPPORTED_RATES;
  1855. spec->pcm_playback.maxbps = SUPPORTED_MAXBPS;
  1856. spec->pcm_playback.formats = SUPPORTED_FORMATS;
  1857. return 0;
  1858. }
  1859. static int nvhdmi_7x_8ch_build_pcms(struct hda_codec *codec)
  1860. {
  1861. struct hdmi_spec *spec = codec->spec;
  1862. int err = simple_playback_build_pcms(codec);
  1863. spec->pcm_rec[0].own_chmap = true;
  1864. return err;
  1865. }
  1866. static int nvhdmi_7x_8ch_build_controls(struct hda_codec *codec)
  1867. {
  1868. struct hdmi_spec *spec = codec->spec;
  1869. struct snd_pcm_chmap *chmap;
  1870. int err;
  1871. err = simple_playback_build_controls(codec);
  1872. if (err < 0)
  1873. return err;
  1874. /* add channel maps */
  1875. err = snd_pcm_add_chmap_ctls(spec->pcm_rec[0].pcm,
  1876. SNDRV_PCM_STREAM_PLAYBACK,
  1877. snd_pcm_alt_chmaps, 8, 0, &chmap);
  1878. if (err < 0)
  1879. return err;
  1880. switch (codec->preset->id) {
  1881. case 0x10de0002:
  1882. case 0x10de0003:
  1883. case 0x10de0005:
  1884. case 0x10de0006:
  1885. chmap->channel_mask = (1U << 2) | (1U << 8);
  1886. break;
  1887. case 0x10de0007:
  1888. chmap->channel_mask = (1U << 2) | (1U << 6) | (1U << 8);
  1889. }
  1890. return 0;
  1891. }
  1892. static int patch_nvhdmi_8ch_7x(struct hda_codec *codec)
  1893. {
  1894. struct hdmi_spec *spec;
  1895. int err = patch_nvhdmi_2ch(codec);
  1896. if (err < 0)
  1897. return err;
  1898. spec = codec->spec;
  1899. spec->multiout.max_channels = 8;
  1900. spec->pcm_playback = nvhdmi_pcm_playback_8ch_7x;
  1901. codec->patch_ops.init = nvhdmi_7x_init_8ch;
  1902. codec->patch_ops.build_pcms = nvhdmi_7x_8ch_build_pcms;
  1903. codec->patch_ops.build_controls = nvhdmi_7x_8ch_build_controls;
  1904. /* Initialize the audio infoframe channel mask and checksum to something
  1905. * valid */
  1906. nvhdmi_8ch_7x_set_info_frame_parameters(codec, 8);
  1907. return 0;
  1908. }
  1909. /*
  1910. * ATI-specific implementations
  1911. *
  1912. * FIXME: we may omit the whole this and use the generic code once after
  1913. * it's confirmed to work.
  1914. */
  1915. #define ATIHDMI_CVT_NID 0x02 /* audio converter */
  1916. #define ATIHDMI_PIN_NID 0x03 /* HDMI output pin */
  1917. static int atihdmi_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
  1918. struct hda_codec *codec,
  1919. unsigned int stream_tag,
  1920. unsigned int format,
  1921. struct snd_pcm_substream *substream)
  1922. {
  1923. struct hdmi_spec *spec = codec->spec;
  1924. int chans = substream->runtime->channels;
  1925. int i, err;
  1926. err = simple_playback_pcm_prepare(hinfo, codec, stream_tag, format,
  1927. substream);
  1928. if (err < 0)
  1929. return err;
  1930. snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
  1931. AC_VERB_SET_CVT_CHAN_COUNT, chans - 1);
  1932. /* FIXME: XXX */
  1933. for (i = 0; i < chans; i++) {
  1934. snd_hda_codec_write(codec, spec->cvts[0].cvt_nid, 0,
  1935. AC_VERB_SET_HDMI_CHAN_SLOT,
  1936. (i << 4) | i);
  1937. }
  1938. return 0;
  1939. }
  1940. static int patch_atihdmi(struct hda_codec *codec)
  1941. {
  1942. struct hdmi_spec *spec;
  1943. int err = patch_simple_hdmi(codec, ATIHDMI_CVT_NID, ATIHDMI_PIN_NID);
  1944. if (err < 0)
  1945. return err;
  1946. spec = codec->spec;
  1947. spec->pcm_playback.ops.prepare = atihdmi_playback_pcm_prepare;
  1948. return 0;
  1949. }
  1950. /* VIA HDMI Implementation */
  1951. #define VIAHDMI_CVT_NID 0x02 /* audio converter1 */
  1952. #define VIAHDMI_PIN_NID 0x03 /* HDMI output pin1 */
  1953. static int patch_via_hdmi(struct hda_codec *codec)
  1954. {
  1955. return patch_simple_hdmi(codec, VIAHDMI_CVT_NID, VIAHDMI_PIN_NID);
  1956. }
  1957. /*
  1958. * patch entries
  1959. */
  1960. static const struct hda_codec_preset snd_hda_preset_hdmi[] = {
  1961. { .id = 0x1002793c, .name = "RS600 HDMI", .patch = patch_atihdmi },
  1962. { .id = 0x10027919, .name = "RS600 HDMI", .patch = patch_atihdmi },
  1963. { .id = 0x1002791a, .name = "RS690/780 HDMI", .patch = patch_atihdmi },
  1964. { .id = 0x1002aa01, .name = "R6xx HDMI", .patch = patch_generic_hdmi },
  1965. { .id = 0x10951390, .name = "SiI1390 HDMI", .patch = patch_generic_hdmi },
  1966. { .id = 0x10951392, .name = "SiI1392 HDMI", .patch = patch_generic_hdmi },
  1967. { .id = 0x17e80047, .name = "Chrontel HDMI", .patch = patch_generic_hdmi },
  1968. { .id = 0x10de0002, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  1969. { .id = 0x10de0003, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  1970. { .id = 0x10de0005, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  1971. { .id = 0x10de0006, .name = "MCP77/78 HDMI", .patch = patch_nvhdmi_8ch_7x },
  1972. { .id = 0x10de0007, .name = "MCP79/7A HDMI", .patch = patch_nvhdmi_8ch_7x },
  1973. { .id = 0x10de000a, .name = "GPU 0a HDMI/DP", .patch = patch_generic_hdmi },
  1974. { .id = 0x10de000b, .name = "GPU 0b HDMI/DP", .patch = patch_generic_hdmi },
  1975. { .id = 0x10de000c, .name = "MCP89 HDMI", .patch = patch_generic_hdmi },
  1976. { .id = 0x10de000d, .name = "GPU 0d HDMI/DP", .patch = patch_generic_hdmi },
  1977. { .id = 0x10de0010, .name = "GPU 10 HDMI/DP", .patch = patch_generic_hdmi },
  1978. { .id = 0x10de0011, .name = "GPU 11 HDMI/DP", .patch = patch_generic_hdmi },
  1979. { .id = 0x10de0012, .name = "GPU 12 HDMI/DP", .patch = patch_generic_hdmi },
  1980. { .id = 0x10de0013, .name = "GPU 13 HDMI/DP", .patch = patch_generic_hdmi },
  1981. { .id = 0x10de0014, .name = "GPU 14 HDMI/DP", .patch = patch_generic_hdmi },
  1982. { .id = 0x10de0015, .name = "GPU 15 HDMI/DP", .patch = patch_generic_hdmi },
  1983. { .id = 0x10de0016, .name = "GPU 16 HDMI/DP", .patch = patch_generic_hdmi },
  1984. /* 17 is known to be absent */
  1985. { .id = 0x10de0018, .name = "GPU 18 HDMI/DP", .patch = patch_generic_hdmi },
  1986. { .id = 0x10de0019, .name = "GPU 19 HDMI/DP", .patch = patch_generic_hdmi },
  1987. { .id = 0x10de001a, .name = "GPU 1a HDMI/DP", .patch = patch_generic_hdmi },
  1988. { .id = 0x10de001b, .name = "GPU 1b HDMI/DP", .patch = patch_generic_hdmi },
  1989. { .id = 0x10de001c, .name = "GPU 1c HDMI/DP", .patch = patch_generic_hdmi },
  1990. { .id = 0x10de0040, .name = "GPU 40 HDMI/DP", .patch = patch_generic_hdmi },
  1991. { .id = 0x10de0041, .name = "GPU 41 HDMI/DP", .patch = patch_generic_hdmi },
  1992. { .id = 0x10de0042, .name = "GPU 42 HDMI/DP", .patch = patch_generic_hdmi },
  1993. { .id = 0x10de0043, .name = "GPU 43 HDMI/DP", .patch = patch_generic_hdmi },
  1994. { .id = 0x10de0044, .name = "GPU 44 HDMI/DP", .patch = patch_generic_hdmi },
  1995. { .id = 0x10de0051, .name = "GPU 51 HDMI/DP", .patch = patch_generic_hdmi },
  1996. { .id = 0x10de0067, .name = "MCP67 HDMI", .patch = patch_nvhdmi_2ch },
  1997. { .id = 0x10de8001, .name = "MCP73 HDMI", .patch = patch_nvhdmi_2ch },
  1998. { .id = 0x11069f80, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
  1999. { .id = 0x11069f81, .name = "VX900 HDMI/DP", .patch = patch_via_hdmi },
  2000. { .id = 0x11069f84, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
  2001. { .id = 0x11069f85, .name = "VX11 HDMI/DP", .patch = patch_generic_hdmi },
  2002. { .id = 0x80860054, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
  2003. { .id = 0x80862801, .name = "Bearlake HDMI", .patch = patch_generic_hdmi },
  2004. { .id = 0x80862802, .name = "Cantiga HDMI", .patch = patch_generic_hdmi },
  2005. { .id = 0x80862803, .name = "Eaglelake HDMI", .patch = patch_generic_hdmi },
  2006. { .id = 0x80862804, .name = "IbexPeak HDMI", .patch = patch_generic_hdmi },
  2007. { .id = 0x80862805, .name = "CougarPoint HDMI", .patch = patch_generic_hdmi },
  2008. { .id = 0x80862806, .name = "PantherPoint HDMI", .patch = patch_generic_hdmi },
  2009. { .id = 0x80862807, .name = "Haswell HDMI", .patch = patch_generic_hdmi },
  2010. { .id = 0x80862880, .name = "CedarTrail HDMI", .patch = patch_generic_hdmi },
  2011. { .id = 0x808629fb, .name = "Crestline HDMI", .patch = patch_generic_hdmi },
  2012. {} /* terminator */
  2013. };
  2014. MODULE_ALIAS("snd-hda-codec-id:1002793c");
  2015. MODULE_ALIAS("snd-hda-codec-id:10027919");
  2016. MODULE_ALIAS("snd-hda-codec-id:1002791a");
  2017. MODULE_ALIAS("snd-hda-codec-id:1002aa01");
  2018. MODULE_ALIAS("snd-hda-codec-id:10951390");
  2019. MODULE_ALIAS("snd-hda-codec-id:10951392");
  2020. MODULE_ALIAS("snd-hda-codec-id:10de0002");
  2021. MODULE_ALIAS("snd-hda-codec-id:10de0003");
  2022. MODULE_ALIAS("snd-hda-codec-id:10de0005");
  2023. MODULE_ALIAS("snd-hda-codec-id:10de0006");
  2024. MODULE_ALIAS("snd-hda-codec-id:10de0007");
  2025. MODULE_ALIAS("snd-hda-codec-id:10de000a");
  2026. MODULE_ALIAS("snd-hda-codec-id:10de000b");
  2027. MODULE_ALIAS("snd-hda-codec-id:10de000c");
  2028. MODULE_ALIAS("snd-hda-codec-id:10de000d");
  2029. MODULE_ALIAS("snd-hda-codec-id:10de0010");
  2030. MODULE_ALIAS("snd-hda-codec-id:10de0011");
  2031. MODULE_ALIAS("snd-hda-codec-id:10de0012");
  2032. MODULE_ALIAS("snd-hda-codec-id:10de0013");
  2033. MODULE_ALIAS("snd-hda-codec-id:10de0014");
  2034. MODULE_ALIAS("snd-hda-codec-id:10de0015");
  2035. MODULE_ALIAS("snd-hda-codec-id:10de0016");
  2036. MODULE_ALIAS("snd-hda-codec-id:10de0018");
  2037. MODULE_ALIAS("snd-hda-codec-id:10de0019");
  2038. MODULE_ALIAS("snd-hda-codec-id:10de001a");
  2039. MODULE_ALIAS("snd-hda-codec-id:10de001b");
  2040. MODULE_ALIAS("snd-hda-codec-id:10de001c");
  2041. MODULE_ALIAS("snd-hda-codec-id:10de0040");
  2042. MODULE_ALIAS("snd-hda-codec-id:10de0041");
  2043. MODULE_ALIAS("snd-hda-codec-id:10de0042");
  2044. MODULE_ALIAS("snd-hda-codec-id:10de0043");
  2045. MODULE_ALIAS("snd-hda-codec-id:10de0044");
  2046. MODULE_ALIAS("snd-hda-codec-id:10de0051");
  2047. MODULE_ALIAS("snd-hda-codec-id:10de0067");
  2048. MODULE_ALIAS("snd-hda-codec-id:10de8001");
  2049. MODULE_ALIAS("snd-hda-codec-id:11069f80");
  2050. MODULE_ALIAS("snd-hda-codec-id:11069f81");
  2051. MODULE_ALIAS("snd-hda-codec-id:11069f84");
  2052. MODULE_ALIAS("snd-hda-codec-id:11069f85");
  2053. MODULE_ALIAS("snd-hda-codec-id:17e80047");
  2054. MODULE_ALIAS("snd-hda-codec-id:80860054");
  2055. MODULE_ALIAS("snd-hda-codec-id:80862801");
  2056. MODULE_ALIAS("snd-hda-codec-id:80862802");
  2057. MODULE_ALIAS("snd-hda-codec-id:80862803");
  2058. MODULE_ALIAS("snd-hda-codec-id:80862804");
  2059. MODULE_ALIAS("snd-hda-codec-id:80862805");
  2060. MODULE_ALIAS("snd-hda-codec-id:80862806");
  2061. MODULE_ALIAS("snd-hda-codec-id:80862807");
  2062. MODULE_ALIAS("snd-hda-codec-id:80862880");
  2063. MODULE_ALIAS("snd-hda-codec-id:808629fb");
  2064. MODULE_LICENSE("GPL");
  2065. MODULE_DESCRIPTION("HDMI HD-audio codec");
  2066. MODULE_ALIAS("snd-hda-codec-intelhdmi");
  2067. MODULE_ALIAS("snd-hda-codec-nvhdmi");
  2068. MODULE_ALIAS("snd-hda-codec-atihdmi");
  2069. static struct hda_codec_preset_list intel_list = {
  2070. .preset = snd_hda_preset_hdmi,
  2071. .owner = THIS_MODULE,
  2072. };
  2073. static int __init patch_hdmi_init(void)
  2074. {
  2075. return snd_hda_add_codec_preset(&intel_list);
  2076. }
  2077. static void __exit patch_hdmi_exit(void)
  2078. {
  2079. snd_hda_delete_codec_preset(&intel_list);
  2080. }
  2081. module_init(patch_hdmi_init)
  2082. module_exit(patch_hdmi_exit)